osprey/kg++fe/gnu/config/ia64/ia64.h File Reference

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Data Types

type  ia64_args

Defines

#define TARGET_CPU_CPP_BUILTINS()
#define EXTRA_SPECS   { "asm_extra", ASM_EXTRA_SPEC },
#define CC1_SPEC   "%(cc1_cpu) "
#define ASM_EXTRA_SPEC   ""
#define MASK_BIG_ENDIAN   0x00000001
#define MASK_GNU_AS   0x00000002
#define MASK_GNU_LD   0x00000004
#define MASK_NO_PIC   0x00000008
#define MASK_VOL_ASM_STOP   0x00000010
#define MASK_ILP32   0x00000020
#define MASK_B_STEP   0x00000040
#define MASK_REG_NAMES   0x00000080
#define MASK_NO_SDATA   0x00000100
#define MASK_CONST_GP   0x00000200
#define MASK_AUTO_PIC   0x00000400
#define MASK_INLINE_FLOAT_DIV_LAT   0x00000800
#define MASK_INLINE_FLOAT_DIV_THR   0x00001000
#define MASK_INLINE_INT_DIV_LAT   0x00000800
#define MASK_INLINE_INT_DIV_THR   0x00001000
#define MASK_DWARF2_ASM   0x40000000
#define TARGET_BIG_ENDIAN   (target_flags & MASK_BIG_ENDIAN)
#define TARGET_GNU_AS   (target_flags & MASK_GNU_AS)
#define TARGET_GNU_LD   (target_flags & MASK_GNU_LD)
#define TARGET_NO_PIC   (target_flags & MASK_NO_PIC)
#define TARGET_VOL_ASM_STOP   (target_flags & MASK_VOL_ASM_STOP)
#define TARGET_ILP32   (target_flags & MASK_ILP32)
#define TARGET_B_STEP   (target_flags & MASK_B_STEP)
#define TARGET_REG_NAMES   (target_flags & MASK_REG_NAMES)
#define TARGET_NO_SDATA   (target_flags & MASK_NO_SDATA)
#define TARGET_CONST_GP   (target_flags & MASK_CONST_GP)
#define TARGET_AUTO_PIC   (target_flags & MASK_AUTO_PIC)
#define TARGET_INLINE_FLOAT_DIV_LAT   (target_flags & MASK_INLINE_FLOAT_DIV_LAT)
#define TARGET_INLINE_FLOAT_DIV_THR   (target_flags & MASK_INLINE_FLOAT_DIV_THR)
#define TARGET_INLINE_INT_DIV_LAT   (target_flags & MASK_INLINE_INT_DIV_LAT)
#define TARGET_INLINE_INT_DIV_THR   (target_flags & MASK_INLINE_INT_DIV_THR)
#define TARGET_INLINE_FLOAT_DIV   (target_flags & (MASK_INLINE_FLOAT_DIV_LAT | MASK_INLINE_FLOAT_DIV_THR))
#define TARGET_INLINE_INT_DIV   (target_flags & (MASK_INLINE_INT_DIV_LAT | MASK_INLINE_INT_DIV_THR))
#define TARGET_DWARF2_ASM   (target_flags & MASK_DWARF2_ASM)
#define TARGET_TLS14   (ia64_tls_size == 14)
#define TARGET_TLS22   (ia64_tls_size == 22)
#define TARGET_TLS64   (ia64_tls_size == 64)
#define TARGET_HPUX_LD   0
#define HAVE_AS_LTOFFX_LDXMOV_RELOCS   0
#define TARGET_SWITCHES
#define TARGET_DEFAULT   MASK_DWARF2_ASM
#define TARGET_CPU_DEFAULT   0
#define TARGET_OPTIONS
#define OVERRIDE_OPTIONS   ia64_override_options ()
#define CC1_SPEC   "%{G*}"
#define BITS_BIG_ENDIAN   0
#define BYTES_BIG_ENDIAN   (TARGET_BIG_ENDIAN != 0)
#define WORDS_BIG_ENDIAN   (TARGET_BIG_ENDIAN != 0)
#define LIBGCC2_WORDS_BIG_ENDIAN   0
#define UNITS_PER_WORD   8
#define POINTER_SIZE   (TARGET_ILP32 ? 32 : 64)
#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)
#define PARM_BOUNDARY   64
#define STACK_BOUNDARY   128
#define IA64_STACK_ALIGN(LOC)   (((LOC) + 15) & ~15)
#define FUNCTION_BOUNDARY   128
#define BIGGEST_ALIGNMENT   128
#define DATA_ALIGNMENT(TYPE, ALIGN)
#define CONSTANT_ALIGNMENT(EXP, ALIGN)
#define STRICT_ALIGNMENT   1
#define PCC_BITFIELD_TYPE_MATTERS   1
#define MAX_FIXED_MODE_SIZE   GET_MODE_BITSIZE (TImode)
#define TARGET_VTABLE_USES_DESCRIPTORS   (TARGET_ILP32 ? 4 : 2)
#define TARGET_VTABLE_ENTRY_ALIGN   64
#define TARGET_VTABLE_DATA_ENTRY_DISTANCE   (TARGET_ILP32 ? 2 : 1)
#define INT_TYPE_SIZE   32
#define SHORT_TYPE_SIZE   16
#define LONG_TYPE_SIZE   (TARGET_ILP32 ? 32 : 64)
#define MAX_LONG_TYPE_SIZE   64
#define LONG_LONG_TYPE_SIZE   64
#define FLOAT_TYPE_SIZE   32
#define DOUBLE_TYPE_SIZE   64
#define LONG_DOUBLE_TYPE_SIZE   128
#define INTEL_EXTENDED_IEEE_FORMAT   1
#define DEFAULT_SIGNED_CHAR   1
#define FIRST_PSEUDO_REGISTER   335
#define ADDL_REGNO_P(REGNO)   ((unsigned HOST_WIDE_INT) (REGNO) <= 3)
#define GR_REGNO_P(REGNO)   ((unsigned HOST_WIDE_INT) (REGNO) <= 127)
#define FR_REGNO_P(REGNO)   ((REGNO) >= 128 && (REGNO) <= 255)
#define PR_REGNO_P(REGNO)   ((REGNO) >= 256 && (REGNO) <= 319)
#define BR_REGNO_P(REGNO)   ((REGNO) >= 320 && (REGNO) <= 327)
#define GENERAL_REGNO_P(REGNO)
#define GR_REG(REGNO)   ((REGNO) + 0)
#define FR_REG(REGNO)   ((REGNO) + 128)
#define PR_REG(REGNO)   ((REGNO) + 256)
#define BR_REG(REGNO)   ((REGNO) + 320)
#define OUT_REG(REGNO)   ((REGNO) + 120)
#define IN_REG(REGNO)   ((REGNO) + 112)
#define LOC_REG(REGNO)   ((REGNO) + 32)
#define AR_CCV_REGNUM   330
#define AR_UNAT_REGNUM   331
#define AR_PFS_REGNUM   332
#define AR_LC_REGNUM   333
#define AR_EC_REGNUM   334
#define IN_REGNO_P(REGNO)   ((REGNO) >= IN_REG (0) && (REGNO) <= IN_REG (7))
#define LOC_REGNO_P(REGNO)   ((REGNO) >= LOC_REG (0) && (REGNO) <= LOC_REG (79))
#define OUT_REGNO_P(REGNO)   ((REGNO) >= OUT_REG (0) && (REGNO) <= OUT_REG (7))
#define AR_M_REGNO_P(REGNO)
#define AR_I_REGNO_P(REGNO)
#define AR_REGNO_P(REGNO)
#define R_GR(REGNO)   GR_REG (REGNO)
#define R_FR(REGNO)   FR_REG (REGNO)
#define R_PR(REGNO)   PR_REG (REGNO)
#define R_BR(REGNO)   BR_REG (REGNO)
#define FIXED_REGISTERS
#define CALL_USED_REGISTERS
#define CALL_REALLY_USED_REGISTERS
#define INCOMING_REGNO(OUT)   ((unsigned) ((OUT) - OUT_REG (0)) < 8 ? IN_REG ((OUT) - OUT_REG (0)) : (OUT))
#define OUTGOING_REGNO(IN)   ((unsigned) ((IN) - IN_REG (0)) < 8 ? OUT_REG ((IN) - IN_REG (0)) : (IN))
#define LOCAL_REGNO(REGNO)   (IN_REGNO_P (REGNO) || LOC_REGNO_P (REGNO))
#define SELECT_CC_MODE(OP, X, Y)   CCmode
#define REG_ALLOC_ORDER
#define HARD_REGNO_NREGS(REGNO, MODE)
#define HARD_REGNO_MODE_OK(REGNO, MODE)
#define MODES_TIEABLE_P(MODE1, MODE2)
#define GENERAL_REGS   GR_REGS
#define N_REG_CLASSES   ((int) LIM_REG_CLASSES)
#define REG_CLASS_NAMES
#define REG_CLASS_CONTENTS
#define REGNO_REG_CLASS(REGNO)
#define BASE_REG_CLASS   GENERAL_REGS
#define INDEX_REG_CLASS   GENERAL_REGS
#define REG_CLASS_FROM_LETTER(CHAR)
#define REGNO_OK_FOR_BASE_P(REGNO)   (GENERAL_REGNO_P (REGNO) || GENERAL_REGNO_P (reg_renumber[REGNO]))
#define REGNO_OK_FOR_INDEX_P(NUM)   REGNO_OK_FOR_BASE_P (NUM)
#define PREFERRED_RELOAD_CLASS(X, CLASS)
#define SECONDARY_RELOAD_CLASS(CLASS, MODE, X)   ia64_secondary_reload_class (CLASS, MODE, X)
#define CLASS_MAX_NREGS(CLASS, MODE)
#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS)
#define CONST_OK_FOR_I(VALUE)   ((unsigned HOST_WIDE_INT)(VALUE) + 0x2000 < 0x4000)
#define CONST_OK_FOR_J(VALUE)   ((unsigned HOST_WIDE_INT)(VALUE) + 0x200000 < 0x400000)
#define CONST_OK_FOR_K(VALUE)   ((unsigned HOST_WIDE_INT)(VALUE) + 0x80 < 0x100)
#define CONST_OK_FOR_L(VALUE)   ((unsigned HOST_WIDE_INT)(VALUE) + 0x7F < 0x100)
#define CONST_OK_FOR_M(VALUE)   ((unsigned HOST_WIDE_INT)(VALUE) < 0x40)
#define CONST_OK_FOR_N(VALUE)   ((unsigned HOST_WIDE_INT)(VALUE) + 0x100 < 0x200)
#define CONST_OK_FOR_O(VALUE)   ((VALUE) == 0)
#define CONST_OK_FOR_P(VALUE)   ((VALUE) == 0 || (VALUE) == -1)
#define CONST_OK_FOR_LETTER_P(VALUE, C)
#define CONST_DOUBLE_OK_FOR_G(VALUE)
#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C)   ((C) == 'G' ? CONST_DOUBLE_OK_FOR_G (VALUE) : 0)
#define CONSTRAINT_OK_FOR_Q(VALUE)   (memory_operand((VALUE), VOIDmode) && ! MEM_VOLATILE_P (VALUE))
#define CONSTRAINT_OK_FOR_R(VALUE)   (GET_CODE (VALUE) == CONST_INT && INTVAL (VALUE) >= 1 && INTVAL (VALUE) <= 4)
#define CONSTRAINT_OK_FOR_S(VALUE)
#define EXTRA_CONSTRAINT(VALUE, C)
#define STACK_GROWS_DOWNWARD   1
#define STARTING_FRAME_OFFSET   0
#define STACK_POINTER_OFFSET   16
#define FIRST_PARM_OFFSET(FUNDECL)   0
#define RETURN_ADDR_RTX(COUNT, FRAME)   ((COUNT) == 0 ? return_address_pointer_rtx : const0_rtx)
#define INCOMING_RETURN_ADDR_RTX   gen_rtx_REG (VOIDmode, BR_REG (0))
#define INCOMING_FRAME_SP_OFFSET   0
#define STACK_POINTER_REGNUM   12
#define FRAME_POINTER_REGNUM   328
#define HARD_FRAME_POINTER_REGNUM   LOC_REG (79)
#define ARG_POINTER_REGNUM   R_GR(0)
#define INIT_EXPANDERS
#define RETURN_ADDRESS_POINTER_REGNUM   329
#define STATIC_CHAIN_REGNUM   15
#define FRAME_POINTER_REQUIRED   0
#define CAN_DEBUG_WITHOUT_FP
#define ELIMINABLE_REGS
#define CAN_ELIMINATE(FROM, TO)   (TO == BR_REG (0) ? current_function_is_leaf : 1)
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)   ((OFFSET) = ia64_initial_elimination_offset ((FROM), (TO)))
#define ACCUMULATE_OUTGOING_ARGS   1
#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE)   0
#define MAX_ARGUMENT_SLOTS   8
#define MAX_INT_RETURN_SLOTS   4
#define GR_ARG_FIRST   IN_REG (0)
#define GR_RET_FIRST   GR_REG (8)
#define GR_RET_LAST   GR_REG (11)
#define FR_ARG_FIRST   FR_REG (8)
#define FR_RET_FIRST   FR_REG (8)
#define FR_RET_LAST   FR_REG (15)
#define AR_ARG_FIRST   OUT_REG (0)
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED)   ia64_function_arg (&CUM, MODE, TYPE, NAMED, 0)
#define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED)   ia64_function_arg (&CUM, MODE, TYPE, NAMED, 1)
#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED)   ia64_function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED)
#define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED)   ia64_function_arg_pass_by_reference (&CUM, MODE, TYPE, NAMED)
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT)
#define INIT_CUMULATIVE_INCOMING_ARGS(CUM, FNTYPE, LIBNAME)
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)   ia64_function_arg_advance (&CUM, MODE, TYPE, NAMED)
#define FUNCTION_ARG_BOUNDARY(MODE, TYPE)
#define FUNCTION_ARG_REGNO_P(REGNO)
#define EXPAND_BUILTIN_VA_ARG(valist, type)   ia64_va_arg (valist, type)
#define FUNCTION_VALUE(VALTYPE, FUNC)   ia64_function_value (VALTYPE, FUNC)
#define LIBCALL_VALUE(MODE)
#define FUNCTION_VALUE_REGNO_P(REGNO)
#define RETURN_IN_MEMORY(TYPE)   ia64_return_in_memory (TYPE)
#define DEFAULT_PCC_STRUCT_RETURN   0
#define STRUCT_VALUE_REGNUM   GR_REG (8)
#define EXIT_IGNORE_STACK   1
#define EPILOGUE_USES(REGNO)   ia64_epilogue_uses (REGNO)
#define EH_USES(REGNO)   ia64_eh_uses (REGNO)
#define ASM_FILE_START(FILE)   emit_safe_across_calls (FILE)
#define ASM_OUTPUT_FDESC(FILE, DECL, PART)
#define FUNCTION_PROFILER(FILE, LABELNO)
#define SETUP_INCOMING_VARARGS(ARGS_SO_FAR, MODE, TYPE, PRETEND_ARGS_SIZE, SECOND_TIME)   ia64_setup_incoming_varargs (ARGS_SO_FAR, MODE, TYPE, & PRETEND_ARGS_SIZE, SECOND_TIME)
#define STRICT_ARGUMENT_NAMING   1
#define STACK_SAVEAREA_MODE(LEVEL)   ((LEVEL) == SAVE_NONLOCAL ? OImode : Pmode)
#define TRAMPOLINE_SIZE   32
#define TRAMPOLINE_ALIGNMENT   64
#define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, STATIC_CHAIN)   ia64_initialize_trampoline((ADDR), (FNADDR), (STATIC_CHAIN))
#define TARGET_MEM_FUNCTIONS
#define HAVE_POST_INCREMENT   1
#define HAVE_POST_DECREMENT   1
#define HAVE_POST_MODIFY_DISP   1
#define HAVE_POST_MODIFY_REG   1
#define CONSTANT_ADDRESS_P(X)   0
#define MAX_REGS_PER_ADDRESS   2
#define LEGITIMATE_ADDRESS_REG(X)
#define LEGITIMATE_ADDRESS_DISP(R, X)
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL)
#define REG_OK_FOR_BASE_P(X)   (GENERAL_REGNO_P (REGNO (X)) || (REGNO (X) >= FIRST_PSEUDO_REGISTER))
#define REG_OK_FOR_INDEX_P(X)   REG_OK_FOR_BASE_P (X)
#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
#define LEGITIMATE_CONSTANT_P(X)
#define CONST_COSTS(X, CODE, OUTER_CODE)
#define RTX_COSTS(X, CODE, OUTER_CODE)
#define ADDRESS_COST(ADDRESS)   0
#define REGISTER_MOVE_COST   ia64_register_move_cost
#define MEMORY_MOVE_COST(MODE, CLASS, IN)
#define BRANCH_COST   6
#define SLOW_BYTE_ACCESS   1
#define NO_FUNCTION_CSE
#define TEXT_SECTION_ASM_OP   "\t.text"
#define DATA_SECTION_ASM_OP   "\t.data"
#define BSS_SECTION_ASM_OP   "\t.bss"
#define ENCODE_SECTION_INFO_CHAR   '@'
#define IA64_DEFAULT_GVALUE   8
#define PIC_OFFSET_TABLE_REGNUM   GR_REG (1)
#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
#define ASM_COMMENT_START   "//"
#define ASM_APP_ON   "#APP\n"
#define ASM_APP_OFF   "#NO_APP\n"
#define ASM_OUTPUT_LABEL(STREAM, NAME)
#define GLOBAL_ASM_OP   "\t.global "
#define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME)   ia64_asm_output_external (FILE, DECL, NAME)
#define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM)
#define ASM_FORMAT_PRIVATE_NAME(OUTVAR, NAME, NUMBER)
#define ASM_OUTPUT_DEF(STREAM, NAME, VALUE)
#define REGISTER_NAMES
#define ADDITIONAL_REGISTER_NAMES
#define PRINT_OPERAND(STREAM, X, CODE)   ia64_print_operand (STREAM, X, CODE)
#define PRINT_OPERAND_PUNCT_VALID_P(CODE)   ((CODE) == '+' || (CODE) == ',')
#define PRINT_OPERAND_ADDRESS(STREAM, X)   ia64_print_operand_address (STREAM, X)
#define REGISTER_PREFIX   ""
#define LOCAL_LABEL_PREFIX   "."
#define USER_LABEL_PREFIX   ""
#define IMMEDIATE_PREFIX   ""
#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL)
#define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)   abort ()
#define ADDR_VEC_ALIGN(ADDR_VEC)   3
#define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL)
#define ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX(FILE, ENCODING, SIZE, ADDR, DONE)
#define ASM_NO_SKIP_IN_TEXT   1
#define ASM_OUTPUT_ALIGN(STREAM, POWER)   fprintf (STREAM, "\t.align %d\n", 1<<(POWER))
#define DWARF2_DEBUGGING_INFO   1
#define DWARF2_ASM_LINE_DEBUG_INFO   (TARGET_DWARF2_ASM)
#define ASM_OUTPUT_DEBUG_LABEL(FILE, PREFIX, NUM)   fprintf (FILE, "[.%s%d:]\n", PREFIX, NUM)
#define ASM_OUTPUT_DWARF_OFFSET(FILE, SIZE, LABEL)
#define ASM_OUTPUT_DWARF_PCREL(FILE, SIZE, LABEL)
#define HARD_REGNO_RENAME_OK(REGNO1, REGNO2)   ia64_hard_regno_rename_ok((REGNO1), (REGNO2))
#define PREDICATE_CODES
#define CASE_VECTOR_MODE   ptr_mode
#define CASE_VECTOR_PC_RELATIVE   1
#define WORD_REGISTER_OPERATIONS
#define LOAD_EXTEND_OP(MODE)   ZERO_EXTEND
#define MOVE_MAX   8
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC)   1
#define STORE_FLAG_VALUE   1
#define Pmode   DImode
#define FUNCTION_MODE   Pmode
#define SIMULTANEOUS_PREFETCHES   6
#define PREFETCH_BLOCK   32
#define HANDLE_SYSV_PRAGMA   1
#define MACHINE_DEPENDENT_REORG(INSN)   ia64_reorg (INSN)
#define MAX_CONDITIONAL_EXECUTE   12
#define IA64_UNWIND_INFO   1
#define IA64_UNWIND_EMIT(f, i)   process_for_unwind_directive (f,i)
#define EH_RETURN_DATA_REGNO(N)   ((N) < 4 ? (N) + 15 : INVALID_REGNUM)
#define TARGET_64BIT   1
#define DONT_USE_BUILTIN_SETJMP
#define PROFILE_BEFORE_PROLOGUE   1
#define FUNCTION_OK_FOR_SIBCALL(DECL)   ia64_function_ok_for_sibcall (DECL)

Typedefs

typedef struct ia64_args CUMULATIVE_ARGS

Enumerations

enum  reg_class {
  NO_REGS, R2, R0_1, INDEX_REGS,
  BASE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  LR0_REGS, GENERAL_REGS, BP_REGS, FC_REGS,
  CR_REGS, Q_REGS, SPECIAL_REGS, ACCUM0_REGS,
  ACCUM_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R24_REG, R25_REG, R27_REG,
  GENERAL_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, LPCOUNT_REG, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, FPU_REGS, LO_REGS,
  STACK_REG, BASE_REGS, HI_REGS, CC_REG,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REG, POINTER_X_REGS, POINTER_Y_REGS, POINTER_Z_REGS,
  STACK_REG, BASE_POINTER_REGS, POINTER_REGS, ADDW_REGS,
  SIMPLE_LD_REGS, LD_REGS, NO_LD_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0R1_REGS,
  R2R3_REGS, EXT_LOW_REGS, EXT_REGS, ADDR_REGS,
  INDEX_REGS, BK_REG, SP_REG, RC_REG,
  COUNTER_REGS, INT_REGS, GENERAL_REGS, DP_REG,
  ST_REG, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, S_REGS, INDEX_REGS, SP_REGS,
  A_REGS, SI_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  REPEAT_REGS, CR_REGS, ACCUM_REGS, OTHER_FLAG_REGS,
  F0_REGS, F1_REGS, BR_FLAG_REGS, FLAG_REGS,
  EVEN_REGS, GPR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, A0H_REG, A0L_REG, A0_REG,
  A1H_REG, ACCUM_HIGH_REGS, A1L_REG, ACCUM_LOW_REGS,
  A1_REG, ACCUM_REGS, X_REG, X_OR_ACCUM_LOW_REGS,
  X_OR_ACCUM_REGS, YH_REG, YH_OR_ACCUM_HIGH_REGS, X_OR_YH_REGS,
  YL_REG, YL_OR_ACCUM_LOW_REGS, X_OR_YL_REGS, X_OR_Y_REGS,
  Y_REG, ACCUM_OR_Y_REGS, PH_REG, X_OR_PH_REGS,
  PL_REG, PL_OR_ACCUM_LOW_REGS, X_OR_PL_REGS, YL_OR_PL_OR_ACCUM_LOW_REGS,
  P_REG, ACCUM_OR_P_REGS, YL_OR_P_REGS, ACCUM_LOW_OR_YL_OR_P_REGS,
  Y_OR_P_REGS, ACCUM_Y_OR_P_REGS, NO_FRAME_Y_ADDR_REGS, Y_ADDR_REGS,
  ACCUM_LOW_OR_Y_ADDR_REGS, ACCUM_OR_Y_ADDR_REGS, X_OR_Y_ADDR_REGS, Y_OR_Y_ADDR_REGS,
  P_OR_Y_ADDR_REGS, NON_HIGH_YBASE_ELIGIBLE_REGS, YBASE_ELIGIBLE_REGS, J_REG,
  J_OR_DAU_16_BIT_REGS, BMU_REGS, NOHIGH_NON_ADDR_REGS, NON_ADDR_REGS,
  SLOW_MEM_LOAD_REGS, NOHIGH_NON_YBASE_REGS, NO_ACCUM_NON_YBASE_REGS, NON_YBASE_REGS,
  YBASE_VIRT_REGS, ACCUM_LOW_OR_YBASE_REGS, ACCUM_OR_YBASE_REGS, X_OR_YBASE_REGS,
  Y_OR_YBASE_REGS, ACCUM_LOW_YL_PL_OR_YBASE_REGS, P_OR_YBASE_REGS, ACCUM_Y_P_OR_YBASE_REGS,
  Y_ADDR_OR_YBASE_REGS, YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS, YBASE_OR_YBASE_ELIGIBLE_REGS, NO_HIGH_ALL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG,
  MULTIPLY_64_REG, LOW_REGS, HIGH_REGS, REAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,
  MAC_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ADDR_REGS, DATA_REGS, FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, AREG, DREG,
  CREG, BREG, SIREG, DIREG,
  AD_REGS, Q_REGS, NON_Q_REGS, INDEX_REGS,
  LEGACY_REGS, GENERAL_REGS, FP_TOP_REG, FP_SECOND_REG,
  FLOAT_REGS, SSE_REGS, MMX_REGS, FP_TOP_SSE_REGS,
  FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS, INT_SSE_REGS,
  FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GLOBAL_REGS, LOCAL_REGS, LOCAL_OR_GLOBAL_REGS,
  FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  PR_REGS, BR_REGS, AR_M_REGS, AR_I_REGS,
  ADDL_REGS, GR_REGS, FR_REGS, GR_AND_BR_REGS,
  GR_AND_FR_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  CARRY_REG, ACCUM_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, D_REGS, X_REGS,
  Y_REGS, SP_REGS, DA_REGS, DB_REGS,
  Z_REGS, D8_REGS, Q_REGS, D_OR_X_REGS,
  D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS, A_REGS,
  X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS, A_OR_D_REGS,
  A_OR_SP_REGS, H_REGS, S_REGS, D_OR_S_REGS,
  X_OR_S_REGS, Y_OR_S_REGS, SP_OR_S_REGS, D_OR_X_OR_S_REGS,
  D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS, A_OR_S_REGS, D_OR_A_OR_S_REGS,
  TMP_REGS, D_OR_A_OR_TMP_REGS, G_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, DATA_REGS, ADDR_REGS,
  FP_REGS, GENERAL_REGS, DATA_OR_FP_REGS, ADDR_OR_FP_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, AP_REG,
  XRF_REGS, GENERAL_REGS, AGRF_REGS, XGRF_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, ONLYR1_REGS,
  LRW_REGS, GENERAL_REGS, C_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, REMAINDER_REG,
  HIMULT_REG, SYSTEM_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, DATA_REGS, ADDRESS_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,
  ADDRESS_REGS, SP_REGS, DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,
  EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS,
  SP_OR_ADDRESS_OR_EXTENDED_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, FLOAT_REG0, LONG_FLOAT_REG0,
  FLOAT_REGS, FP_REGS, GEN_AND_FP_REGS, FRAME_POINTER_REG,
  STACK_POINTER_REG, GEN_AND_MEM_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R1_REGS, GENERAL_REGS, FPUPPER_REGS,
  FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,
  FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, MUL_REGS,
  GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS, FPU_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, OUT_REGS,
  STD_REGS, ARG_REGS, SRC_REGS, DST_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0_REGS,
  R15_REGS, BASE_REGS, GENERAL_REGS, FP_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, BASE_REGS,
  GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS, VRSAVE_REGS,
  NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,
  LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,
  CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, ADDR_REGS, GENERAL_REGS,
  FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REGS, PR_REGS,
  T_REGS, MAC_REGS, FPUL_REGS, SIBCALL_REGS,
  GENERAL_REGS, FP0_REGS, FP_REGS, DF_REGS,
  FPSCR_REGS, GENERAL_FP_REGS, TARGET_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, M16_NA_REGS, M16_REGS,
  T_REG, M16_T_REGS, GR_REGS, FP_REGS,
  HI_REG, LO_REG, HILO_REG, MD_REGS,
  COP0_REGS, COP2_REGS, COP3_REGS, HI_AND_GR_REGS,
  LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS,
  COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS,
  ST_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  FPCC_REGS, I64_REGS, GENERAL_REGS, FP_REGS,
  EXTRA_FP_REGS, GENERAL_OR_FP_REGS, GENERAL_OR_EXTRA_FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REGS, R1_REGS,
  TWO_REGS, R2_REGS, EIGHT_REGS, R8_REGS,
  ICALL_REGS, GENERAL_REGS, CARRY_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, BR_REGS, FP_REGS, ACC_REG,
  SP_REG, RL_REGS, GR_REGS, AR_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,
  M16_REGS, T_REG, M16_T_REGS, GR_REGS,
  FP_REGS, HI_REG, LO_REG, HILO_REG,
  MD_REGS, COP0_REGS, COP2_REGS, COP3_REGS,
  HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS,
  COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS,
  ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, M16_NA_REGS, M16_REGS, T_REG,
  M16_T_REGS, GR_REGS, FP_REGS, HI_REG,
  LO_REG, HILO_REG, MD_REGS, COP0_REGS,
  COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,
  HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS,
  COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R2,
  R0_1, INDEX_REGS, BASE_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, LR0_REGS, GENERAL_REGS,
  BP_REGS, FC_REGS, CR_REGS, Q_REGS,
  SPECIAL_REGS, ACCUM0_REGS, ACCUM_REGS, FLOAT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R24_REG,
  R25_REG, R27_REG, GENERAL_REGS, FLOAT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  FPU_REGS, LO_REGS, STACK_REG, BASE_REGS,
  HI_REGS, CC_REG, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REG, POINTER_X_REGS,
  POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG, BASE_POINTER_REGS,
  POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS, LD_REGS,
  NO_LD_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R0R1_REGS, R2R3_REGS, EXT_LOW_REGS,
  EXT_REGS, ADDR_REGS, INDEX_REGS, BK_REG,
  SP_REG, RC_REG, COUNTER_REGS, INT_REGS,
  GENERAL_REGS, DP_REG, ST_REG, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, FLOAT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, S_REGS,
  INDEX_REGS, SP_REGS, A_REGS, SI_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, REPEAT_REGS, CR_REGS,
  ACCUM_REGS, OTHER_FLAG_REGS, F0_REGS, F1_REGS,
  BR_FLAG_REGS, FLAG_REGS, EVEN_REGS, GPR_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, A0H_REG,
  A0L_REG, A0_REG, A1H_REG, ACCUM_HIGH_REGS,
  A1L_REG, ACCUM_LOW_REGS, A1_REG, ACCUM_REGS,
  X_REG, X_OR_ACCUM_LOW_REGS, X_OR_ACCUM_REGS, YH_REG,
  YH_OR_ACCUM_HIGH_REGS, X_OR_YH_REGS, YL_REG, YL_OR_ACCUM_LOW_REGS,
  X_OR_YL_REGS, X_OR_Y_REGS, Y_REG, ACCUM_OR_Y_REGS,
  PH_REG, X_OR_PH_REGS, PL_REG, PL_OR_ACCUM_LOW_REGS,
  X_OR_PL_REGS, YL_OR_PL_OR_ACCUM_LOW_REGS, P_REG, ACCUM_OR_P_REGS,
  YL_OR_P_REGS, ACCUM_LOW_OR_YL_OR_P_REGS, Y_OR_P_REGS, ACCUM_Y_OR_P_REGS,
  NO_FRAME_Y_ADDR_REGS, Y_ADDR_REGS, ACCUM_LOW_OR_Y_ADDR_REGS, ACCUM_OR_Y_ADDR_REGS,
  X_OR_Y_ADDR_REGS, Y_OR_Y_ADDR_REGS, P_OR_Y_ADDR_REGS, NON_HIGH_YBASE_ELIGIBLE_REGS,
  YBASE_ELIGIBLE_REGS, J_REG, J_OR_DAU_16_BIT_REGS, BMU_REGS,
  NOHIGH_NON_ADDR_REGS, NON_ADDR_REGS, SLOW_MEM_LOAD_REGS, NOHIGH_NON_YBASE_REGS,
  NO_ACCUM_NON_YBASE_REGS, NON_YBASE_REGS, YBASE_VIRT_REGS, ACCUM_LOW_OR_YBASE_REGS,
  ACCUM_OR_YBASE_REGS, X_OR_YBASE_REGS, Y_OR_YBASE_REGS, ACCUM_LOW_YL_PL_OR_YBASE_REGS,
  P_OR_YBASE_REGS, ACCUM_Y_P_OR_YBASE_REGS, Y_ADDR_OR_YBASE_REGS, YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS,
  YBASE_OR_YBASE_ELIGIBLE_REGS, NO_HIGH_ALL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, MULTIPLY_32_REG, MULTIPLY_64_REG, LOW_REGS,
  HIGH_REGS, REAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, MAC_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, ADDR_REGS, DATA_REGS,
  FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  AREG, DREG, CREG, BREG,
  SIREG, DIREG, AD_REGS, Q_REGS,
  NON_Q_REGS, INDEX_REGS, LEGACY_REGS, GENERAL_REGS,
  FP_TOP_REG, FP_SECOND_REG, FLOAT_REGS, SSE_REGS,
  MMX_REGS, FP_TOP_SSE_REGS, FP_SECOND_SSE_REGS, FLOAT_SSE_REGS,
  FLOAT_INT_REGS, INT_SSE_REGS, FLOAT_INT_SSE_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, FP_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GLOBAL_REGS,
  LOCAL_REGS, LOCAL_OR_GLOBAL_REGS, FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, PR_REGS, BR_REGS,
  AR_M_REGS, AR_I_REGS, ADDL_REGS, GR_REGS,
  FR_REGS, GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, CARRY_REG, ACCUM_REGS,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  D_REGS, X_REGS, Y_REGS, SP_REGS,
  DA_REGS, DB_REGS, Z_REGS, D8_REGS,
  Q_REGS, D_OR_X_REGS, D_OR_Y_REGS, D_OR_SP_REGS,
  X_OR_Y_REGS, A_REGS, X_OR_SP_REGS, Y_OR_SP_REGS,
  X_OR_Y_OR_D_REGS, A_OR_D_REGS, A_OR_SP_REGS, H_REGS,
  S_REGS, D_OR_S_REGS, X_OR_S_REGS, Y_OR_S_REGS,
  SP_OR_S_REGS, D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS,
  A_OR_S_REGS, D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS,
  G_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  DATA_REGS, ADDR_REGS, FP_REGS, GENERAL_REGS,
  DATA_OR_FP_REGS, ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS,
  AGRF_REGS, XGRF_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, ONLYR1_REGS, LRW_REGS, GENERAL_REGS,
  C_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, REMAINDER_REG, HIMULT_REG, SYSTEM_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,
  ADDRESS_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS,
  DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS, EXTENDED_REGS, DATA_OR_EXTENDED_REGS,
  ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,
  FLOAT_REG0, LONG_FLOAT_REG0, FLOAT_REGS, FP_REGS,
  GEN_AND_FP_REGS, FRAME_POINTER_REG, STACK_POINTER_REG, GEN_AND_MEM_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,
  GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,
  SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R1_REGS, GENERAL_REGS, FPUPPER_REGS, FP_REGS,
  GENERAL_OR_FP_REGS, SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS,
  NO_LOAD_FPU_REGS, FPU_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, OUT_REGS, STD_REGS, ARG_REGS,
  SRC_REGS, DST_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R0_REGS, R15_REGS, BASE_REGS,
  GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, BASE_REGS, GENERAL_REGS, FLOAT_REGS,
  ALTIVEC_REGS, VRSAVE_REGS, NON_SPECIAL_REGS, MQ_REGS,
  LINK_REGS, CTR_REGS, LINK_OR_CTR_REGS, SPECIAL_REGS,
  SPEC_OR_GEN_REGS, CR0_REGS, CR_REGS, NON_FLOAT_REGS,
  XER_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ADDR_REGS, GENERAL_REGS, FP_REGS, ADDR_FP_REGS,
  GENERAL_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REGS, PR_REGS, T_REGS, MAC_REGS,
  FPUL_REGS, SIBCALL_REGS, GENERAL_REGS, FP0_REGS,
  FP_REGS, DF_REGS, FPSCR_REGS, GENERAL_FP_REGS,
  TARGET_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  M16_NA_REGS, M16_REGS, T_REG, M16_T_REGS,
  GR_REGS, FP_REGS, HI_REG, LO_REG,
  HILO_REG, MD_REGS, COP0_REGS, COP2_REGS,
  COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS,
  HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,
  ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, FPCC_REGS, I64_REGS,
  GENERAL_REGS, FP_REGS, EXTRA_FP_REGS, GENERAL_OR_FP_REGS,
  GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REGS, R1_REGS, TWO_REGS, R2_REGS,
  EIGHT_REGS, R8_REGS, ICALL_REGS, GENERAL_REGS,
  CARRY_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, BR_REGS,
  FP_REGS, ACC_REG, SP_REG, RL_REGS,
  GR_REGS, AR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, M16_NA_REGS, M16_REGS, T_REG,
  M16_T_REGS, GR_REGS, FP_REGS, HI_REG,
  LO_REG, HILO_REG, MD_REGS, COP0_REGS,
  COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,
  HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS,
  COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,
  M16_REGS, T_REG, M16_T_REGS, GR_REGS,
  FP_REGS, HI_REG, LO_REG, HILO_REG,
  MD_REGS, COP0_REGS, COP2_REGS, COP3_REGS,
  HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS,
  COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS,
  ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R0_REG, R24_REG, R25_REG,
  R27_REG, GENERAL_REGS, FLOAT_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, FPA_REGS,
  CIRRUS_REGS, VFP_REGS, IWMMXT_GR_REGS, IWMMXT_REGS,
  LO_REGS, STACK_REG, BASE_REGS, HI_REGS,
  CC_REG, VFPCC_REG, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REG, POINTER_X_REGS,
  POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG, BASE_POINTER_REGS,
  POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS, LD_REGS,
  NO_LD_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, IREGS, BREGS, LREGS,
  MREGS, CIRCREGS, DAGREGS, EVEN_AREGS,
  ODD_AREGS, AREGS, CCREGS, EVEN_DREGS,
  ODD_DREGS, DREGS, PREGS_CLOBBERED, PREGS,
  DPREGS, MOST_REGS, PROLOGUE_REGS, NON_A_CC_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0R1_REGS,
  R2R3_REGS, EXT_LOW_REGS, EXT_REGS, ADDR_REGS,
  INDEX_REGS, BK_REG, SP_REG, RC_REG,
  COUNTER_REGS, INT_REGS, GENERAL_REGS, DP_REG,
  ST_REG, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG,
  MULTIPLY_64_REG, LOW_REGS, HIGH_REGS, REAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, ICC_REGS,
  FCC_REGS, CC_REGS, ICR_REGS, FCR_REGS,
  CR_REGS, LCR_REG, LR_REG, GR8_REGS,
  GR9_REGS, GR89_REGS, FDPIC_REGS, FDPIC_FPTR_REGS,
  FDPIC_CALL_REGS, SPR_REGS, QUAD_ACC_REGS, EVEN_ACC_REGS,
  ACC_REGS, ACCG_REGS, QUAD_FPR_REGS, FEVEN_REGS,
  FPR_REGS, QUAD_REGS, EVEN_REGS, GPR_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, COUNTER_REGS,
  SOURCE_REGS, DESTINATION_REGS, GENERAL_REGS, MAC_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, AREG,
  DREG, CREG, BREG, SIREG,
  DIREG, AD_REGS, Q_REGS, NON_Q_REGS,
  INDEX_REGS, LEGACY_REGS, GENERAL_REGS, FP_TOP_REG,
  FP_SECOND_REG, FLOAT_REGS, SSE_REGS, MMX_REGS,
  FP_TOP_SSE_REGS, FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS,
  INT_SSE_REGS, FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, PR_REGS, BR_REGS,
  AR_M_REGS, AR_I_REGS, ADDL_REGS, GR_REGS,
  FR_REGS, GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, DPH_REGS, DPL_REGS,
  DP_REGS, SP_REGS, IPH_REGS, IPL_REGS,
  IP_REGS, DP_SP_REGS, PTR_REGS, NONPTR_REGS,
  NONSP_REGS, GENERAL_REGS, ALL_REGS = GENERAL_REGS, LIM_REG_CLASSES,
  NO_REGS, GR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, CARRY_REG, ACCUM_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, D_REGS,
  X_REGS, Y_REGS, SP_REGS, DA_REGS,
  DB_REGS, Z_REGS, D8_REGS, Q_REGS,
  D_OR_X_REGS, D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS,
  A_REGS, X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS,
  A_OR_D_REGS, A_OR_SP_REGS, H_REGS, S_REGS,
  D_OR_S_REGS, X_OR_S_REGS, Y_OR_S_REGS, Z_OR_S_REGS,
  SP_OR_S_REGS, D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS,
  A_OR_S_REGS, D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS,
  G_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  DATA_REGS, ADDR_REGS, FP_REGS, GENERAL_REGS,
  DATA_OR_FP_REGS, ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, ONLYR1_REGS, LRW_REGS, GENERAL_REGS,
  C_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  M16_NA_REGS, M16_REGS, T_REG, M16_T_REGS,
  PIC_FN_ADDR_REG, LEA_REGS, GR_REGS, FP_REGS,
  HI_REG, LO_REG, MD_REGS, COP0_REGS,
  COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,
  HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,
  ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, REMAINDER_REG,
  HIMULT_REG, SYSTEM_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS,
  DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS, EXTENDED_REGS, DATA_OR_EXTENDED_REGS,
  ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS, FP_REGS,
  FP_ACC_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, FLOAT_REG0, LONG_FLOAT_REG0,
  FLOAT_REGS, LONG_REGS, FP_REGS, GEN_AND_FP_REGS,
  FRAME_POINTER_REG, STACK_POINTER_REG, GEN_AND_MEM_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,
  FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,
  GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,
  SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS,
  FPU_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  BASE_REGS, GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS,
  VRSAVE_REGS, VSCR_REGS, SPE_ACC_REGS, SPEFSCR_REGS,
  NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,
  LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,
  CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, CC_REGS, ADDR_REGS,
  GENERAL_REGS, ACCESS_REGS, ADDR_CC_REGS, GENERAL_CC_REGS,
  FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REGS, PR_REGS,
  T_REGS, MAC_REGS, FPUL_REGS, SIBCALL_REGS,
  GENERAL_REGS, FP0_REGS, FP_REGS, DF_HI_REGS,
  DF_REGS, FPSCR_REGS, GENERAL_FP_REGS, TARGET_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, FPCC_REGS,
  I64_REGS, GENERAL_REGS, FP_REGS, EXTRA_FP_REGS,
  GENERAL_OR_FP_REGS, GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R0_REGS, R1_REGS, TWO_REGS,
  R2_REGS, EIGHT_REGS, R8_REGS, ICALL_REGS,
  GENERAL_REGS, CARRY_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  BR_REGS, FP_REGS, ACC_REG, SP_REG,
  RL_REGS, GR_REGS, AR_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REG, R24_REG,
  R25_REG, R27_REG, GENERAL_REGS, FLOAT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  FPA_REGS, CIRRUS_REGS, VFP_REGS, IWMMXT_GR_REGS,
  IWMMXT_REGS, LO_REGS, STACK_REG, BASE_REGS,
  HI_REGS, CC_REG, VFPCC_REG, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0_REG,
  POINTER_X_REGS, POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG,
  BASE_POINTER_REGS, POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS,
  LD_REGS, NO_LD_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, IREGS, BREGS,
  LREGS, MREGS, CIRCREGS, DAGREGS,
  EVEN_AREGS, ODD_AREGS, AREGS, CCREGS,
  EVEN_DREGS, ODD_DREGS, DREGS, FDPIC_REGS,
  FDPIC_FPTR_REGS, PREGS_CLOBBERED, PREGS, IPREGS,
  DPREGS, MOST_REGS, LT_REGS, LC_REGS,
  LB_REGS, PROLOGUE_REGS, NON_A_CC_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0R1_REGS, R2R3_REGS,
  EXT_LOW_REGS, EXT_REGS, ADDR_REGS, INDEX_REGS,
  BK_REG, SP_REG, RC_REG, COUNTER_REGS,
  INT_REGS, GENERAL_REGS, DP_REG, ST_REG,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, MOF_REGS,
  CC0_REGS, SPECIAL_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, LO_REGS, HI_REGS,
  HILO_REGS, NOSP_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG, MULTIPLY_64_REG,
  LOW_REGS, HIGH_REGS, REAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, ICC_REGS, FCC_REGS,
  CC_REGS, ICR_REGS, FCR_REGS, CR_REGS,
  LCR_REG, LR_REG, GR8_REGS, GR9_REGS,
  GR89_REGS, FDPIC_REGS, FDPIC_FPTR_REGS, FDPIC_CALL_REGS,
  SPR_REGS, QUAD_ACC_REGS, EVEN_ACC_REGS, ACC_REGS,
  ACCG_REGS, QUAD_FPR_REGS, FEVEN_REGS, FPR_REGS,
  QUAD_REGS, EVEN_REGS, GPR_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, COUNTER_REGS, SOURCE_REGS,
  DESTINATION_REGS, GENERAL_REGS, MAC_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, AREG, DREG,
  CREG, BREG, SIREG, DIREG,
  AD_REGS, Q_REGS, NON_Q_REGS, INDEX_REGS,
  LEGACY_REGS, GENERAL_REGS, FP_TOP_REG, FP_SECOND_REG,
  FLOAT_REGS, SSE_REGS, MMX_REGS, FP_TOP_SSE_REGS,
  FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS, INT_SSE_REGS,
  FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  PR_REGS, BR_REGS, AR_M_REGS, AR_I_REGS,
  ADDL_REGS, GR_REGS, FP_REGS, FR_REGS,
  GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, SP_REGS, FB_REGS, SB_REGS,
  CR_REGS, R0_REGS, R1_REGS, R2_REGS,
  R3_REGS, R02_REGS, HL_REGS, QI_REGS,
  R23_REGS, R03_REGS, DI_REGS, A0_REGS,
  A1_REGS, A_REGS, AD_REGS, PS_REGS,
  SI_REGS, HI_REGS, RA_REGS, GENERAL_REGS,
  FLG_REGS, HC_REGS, MEM_REGS, R02_A_MEM_REGS,
  A_HL_MEM_REGS, R1_R3_A_MEM_REGS, R03_MEM_REGS, A_HI_MEM_REGS,
  A_AD_CR_MEM_SI_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  CARRY_REG, ACCUM_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, D_REGS, X_REGS,
  Y_REGS, SP_REGS, DA_REGS, DB_REGS,
  Z_REGS, D8_REGS, Q_REGS, D_OR_X_REGS,
  D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS, A_REGS,
  X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS, A_OR_D_REGS,
  A_OR_SP_REGS, H_REGS, S_REGS, D_OR_S_REGS,
  X_OR_S_REGS, Y_OR_S_REGS, Z_OR_S_REGS, SP_OR_S_REGS,
  D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS, A_OR_S_REGS,
  D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS, G_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,
  ADDR_REGS, FP_REGS, GENERAL_REGS, DATA_OR_FP_REGS,
  ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ONLYR1_REGS, LRW_REGS, GENERAL_REGS, C_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,
  M16_REGS, T_REG, M16_T_REGS, PIC_FN_ADDR_REG,
  V1_REG, LEA_REGS, GR_REGS, FP_REGS,
  HI_REG, LO_REG, MD_REGS, COP0_REGS,
  COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,
  HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,
  ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, DSP_ACC_REGS,
  ACC_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, REMAINDER_REG, HIMULT_REG, SYSTEM_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,
  ADDRESS_REGS, SP_REGS, DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,
  EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS,
  SP_OR_ADDRESS_OR_EXTENDED_REGS, FP_REGS, FP_ACC_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,
  FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,
  GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,
  SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS,
  FPU_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  BASE_REGS, GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS,
  VRSAVE_REGS, VSCR_REGS, SPE_ACC_REGS, SPEFSCR_REGS,
  NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,
  LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,
  CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, CC_REGS, ADDR_REGS,
  GENERAL_REGS, ACCESS_REGS, ADDR_CC_REGS, GENERAL_CC_REGS,
  FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, G16_REGS, G32_REGS,
  T32_REGS, HI_REG, LO_REG, CE_REGS,
  CN_REG, LC_REG, SC_REG, SP_REGS,
  CR_REGS, CP1_REGS, CP2_REGS, CP3_REGS,
  CPA_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REGS, PR_REGS, T_REGS, MAC_REGS,
  FPUL_REGS, SIBCALL_REGS, GENERAL_REGS, FP0_REGS,
  FP_REGS, DF_HI_REGS, DF_REGS, FPSCR_REGS,
  GENERAL_FP_REGS, GENERAL_DF_REGS, TARGET_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, FPCC_REGS, I64_REGS,
  GENERAL_REGS, FP_REGS, EXTRA_FP_REGS, GENERAL_OR_FP_REGS,
  GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REGS, R1_REGS, TWO_REGS, R2_REGS,
  EIGHT_REGS, R8_REGS, ICALL_REGS, GENERAL_REGS,
  CARRY_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, BR_REGS,
  FP_REGS, ACC_REG, SP_REG, RL_REGS,
  GR_REGS, AR_REGS, ALL_REGS, LIM_REG_CLASSES
}
enum  ia64_builtins {
  IA64_BUILTIN_SYNCHRONIZE, IA64_BUILTIN_FETCH_AND_ADD_SI, IA64_BUILTIN_FETCH_AND_SUB_SI, IA64_BUILTIN_FETCH_AND_OR_SI,
  IA64_BUILTIN_FETCH_AND_AND_SI, IA64_BUILTIN_FETCH_AND_XOR_SI, IA64_BUILTIN_FETCH_AND_NAND_SI, IA64_BUILTIN_ADD_AND_FETCH_SI,
  IA64_BUILTIN_SUB_AND_FETCH_SI, IA64_BUILTIN_OR_AND_FETCH_SI, IA64_BUILTIN_AND_AND_FETCH_SI, IA64_BUILTIN_XOR_AND_FETCH_SI,
  IA64_BUILTIN_NAND_AND_FETCH_SI, IA64_BUILTIN_BOOL_COMPARE_AND_SWAP_SI, IA64_BUILTIN_VAL_COMPARE_AND_SWAP_SI, IA64_BUILTIN_SYNCHRONIZE_SI,
  IA64_BUILTIN_LOCK_TEST_AND_SET_SI, IA64_BUILTIN_LOCK_RELEASE_SI, IA64_BUILTIN_FETCH_AND_ADD_DI, IA64_BUILTIN_FETCH_AND_SUB_DI,
  IA64_BUILTIN_FETCH_AND_OR_DI, IA64_BUILTIN_FETCH_AND_AND_DI, IA64_BUILTIN_FETCH_AND_XOR_DI, IA64_BUILTIN_FETCH_AND_NAND_DI,
  IA64_BUILTIN_ADD_AND_FETCH_DI, IA64_BUILTIN_SUB_AND_FETCH_DI, IA64_BUILTIN_OR_AND_FETCH_DI, IA64_BUILTIN_AND_AND_FETCH_DI,
  IA64_BUILTIN_XOR_AND_FETCH_DI, IA64_BUILTIN_NAND_AND_FETCH_DI, IA64_BUILTIN_BOOL_COMPARE_AND_SWAP_DI, IA64_BUILTIN_VAL_COMPARE_AND_SWAP_DI,
  IA64_BUILTIN_SYNCHRONIZE_DI, IA64_BUILTIN_LOCK_TEST_AND_SET_DI, IA64_BUILTIN_LOCK_RELEASE_DI, IA64_BUILTIN_BSP,
  IA64_BUILTIN_FLUSHRS, IA64_BUILTIN_SYNCHRONIZE, IA64_BUILTIN_FETCH_AND_ADD_SI, IA64_BUILTIN_FETCH_AND_SUB_SI,
  IA64_BUILTIN_FETCH_AND_OR_SI, IA64_BUILTIN_FETCH_AND_AND_SI, IA64_BUILTIN_FETCH_AND_XOR_SI, IA64_BUILTIN_FETCH_AND_NAND_SI,
  IA64_BUILTIN_ADD_AND_FETCH_SI, IA64_BUILTIN_SUB_AND_FETCH_SI, IA64_BUILTIN_OR_AND_FETCH_SI, IA64_BUILTIN_AND_AND_FETCH_SI,
  IA64_BUILTIN_XOR_AND_FETCH_SI, IA64_BUILTIN_NAND_AND_FETCH_SI, IA64_BUILTIN_BOOL_COMPARE_AND_SWAP_SI, IA64_BUILTIN_VAL_COMPARE_AND_SWAP_SI,
  IA64_BUILTIN_SYNCHRONIZE_SI, IA64_BUILTIN_LOCK_TEST_AND_SET_SI, IA64_BUILTIN_LOCK_RELEASE_SI, IA64_BUILTIN_FETCH_AND_ADD_DI,
  IA64_BUILTIN_FETCH_AND_SUB_DI, IA64_BUILTIN_FETCH_AND_OR_DI, IA64_BUILTIN_FETCH_AND_AND_DI, IA64_BUILTIN_FETCH_AND_XOR_DI,
  IA64_BUILTIN_FETCH_AND_NAND_DI, IA64_BUILTIN_ADD_AND_FETCH_DI, IA64_BUILTIN_SUB_AND_FETCH_DI, IA64_BUILTIN_OR_AND_FETCH_DI,
  IA64_BUILTIN_AND_AND_FETCH_DI, IA64_BUILTIN_XOR_AND_FETCH_DI, IA64_BUILTIN_NAND_AND_FETCH_DI, IA64_BUILTIN_BOOL_COMPARE_AND_SWAP_DI,
  IA64_BUILTIN_VAL_COMPARE_AND_SWAP_DI, IA64_BUILTIN_SYNCHRONIZE_DI, IA64_BUILTIN_LOCK_TEST_AND_SET_DI, IA64_BUILTIN_LOCK_RELEASE_DI,
  IA64_BUILTIN_BSP, IA64_BUILTIN_FLUSHRS, IA64_BUILTIN_SYNCHRONIZE, IA64_BUILTIN_FETCH_AND_ADD_SI,
  IA64_BUILTIN_FETCH_AND_SUB_SI, IA64_BUILTIN_FETCH_AND_OR_SI, IA64_BUILTIN_FETCH_AND_AND_SI, IA64_BUILTIN_FETCH_AND_XOR_SI,
  IA64_BUILTIN_FETCH_AND_NAND_SI, IA64_BUILTIN_ADD_AND_FETCH_SI, IA64_BUILTIN_SUB_AND_FETCH_SI, IA64_BUILTIN_OR_AND_FETCH_SI,
  IA64_BUILTIN_AND_AND_FETCH_SI, IA64_BUILTIN_XOR_AND_FETCH_SI, IA64_BUILTIN_NAND_AND_FETCH_SI, IA64_BUILTIN_BOOL_COMPARE_AND_SWAP_SI,
  IA64_BUILTIN_VAL_COMPARE_AND_SWAP_SI, IA64_BUILTIN_SYNCHRONIZE_SI, IA64_BUILTIN_LOCK_TEST_AND_SET_SI, IA64_BUILTIN_LOCK_RELEASE_SI,
  IA64_BUILTIN_FETCH_AND_ADD_DI, IA64_BUILTIN_FETCH_AND_SUB_DI, IA64_BUILTIN_FETCH_AND_OR_DI, IA64_BUILTIN_FETCH_AND_AND_DI,
  IA64_BUILTIN_FETCH_AND_XOR_DI, IA64_BUILTIN_FETCH_AND_NAND_DI, IA64_BUILTIN_ADD_AND_FETCH_DI, IA64_BUILTIN_SUB_AND_FETCH_DI,
  IA64_BUILTIN_OR_AND_FETCH_DI, IA64_BUILTIN_AND_AND_FETCH_DI, IA64_BUILTIN_XOR_AND_FETCH_DI, IA64_BUILTIN_NAND_AND_FETCH_DI,
  IA64_BUILTIN_BOOL_COMPARE_AND_SWAP_DI, IA64_BUILTIN_VAL_COMPARE_AND_SWAP_DI, IA64_BUILTIN_SYNCHRONIZE_DI, IA64_BUILTIN_LOCK_TEST_AND_SET_DI,
  IA64_BUILTIN_LOCK_RELEASE_DI, IA64_BUILTIN_BSP, IA64_BUILTIN_FLUSHRS, IA64_BUILTIN_BSP,
  IA64_BUILTIN_FLUSHRS
}
enum  fetchop_code {
  IA64_ADD_OP, IA64_SUB_OP, IA64_OR_OP, IA64_AND_OP,
  IA64_XOR_OP, IA64_NAND_OP, IA64_ADD_OP, IA64_SUB_OP,
  IA64_OR_OP, IA64_AND_OP, IA64_XOR_OP, IA64_NAND_OP,
  IA64_ADD_OP, IA64_SUB_OP, IA64_OR_OP, IA64_AND_OP,
  IA64_XOR_OP, IA64_NAND_OP
}

Functions/Subroutines

struct machine_function GTY (())

Variables

int target_flags
int ia64_tls_size
const char * ia64_fixed_range_string
const char * ia64_tls_size_string
int ia64_asm_output_label
int ia64_final_schedule


Define Documentation

#define ACCUMULATE_OUTGOING_ARGS   1

Definition at line 1243 of file ia64.h.

#define ADDITIONAL_REGISTER_NAMES

Definition at line 1942 of file ia64.h.

#define ADDL_REGNO_P ( REGNO   )     ((unsigned HOST_WIDE_INT) (REGNO) <= 3)

Definition at line 442 of file ia64.h.

#define ADDR_VEC_ALIGN ( ADDR_VEC   )     3

Definition at line 2096 of file ia64.h.

Referenced by final_scan_insn(), and shorten_branches().

#define ADDRESS_COST ( ADDRESS   )     0

Definition at line 1712 of file ia64.h.

#define AR_ARG_FIRST   OUT_REG (0)

Definition at line 1262 of file ia64.h.

Referenced by ia64_function_arg().

#define AR_CCV_REGNUM   330

#define AR_EC_REGNUM   334

Definition at line 464 of file ia64.h.

Referenced by rtx_needs_barrier().

#define AR_I_REGNO_P ( REGNO   ) 

Value:

Definition at line 472 of file ia64.h.

#define AR_LC_REGNUM   333

#define AR_M_REGNO_P ( REGNO   ) 

Value:

Definition at line 470 of file ia64.h.

#define AR_PFS_REGNUM   332

#define AR_REGNO_P ( REGNO   ) 

Value:

Definition at line 474 of file ia64.h.

#define AR_UNAT_REGNUM   331

#define ARG_POINTER_REGNUM   R_GR(0)

Definition at line 1173 of file ia64.h.

#define ASM_APP_OFF   "#NO_APP\n"

Definition at line 1809 of file ia64.h.

#define ASM_APP_ON   "#APP\n"

Definition at line 1804 of file ia64.h.

#define ASM_COMMENT_START   "//"

Definition at line 1795 of file ia64.h.

#define ASM_EXTRA_SPEC   ""

Definition at line 57 of file ia64.h.

#define ASM_FILE_START ( FILE   )     emit_safe_across_calls (FILE)

Definition at line 1442 of file ia64.h.

#define ASM_FORMAT_PRIVATE_NAME ( OUTVAR,
NAME,
NUMBER   ) 

Value:

do {                  \
  (OUTVAR) = (char *) alloca (strlen (NAME) + 12);      \
  sprintf (OUTVAR, "%s%c%ld", (NAME), (TARGET_GNU_AS ? '.' : '?'),  \
     (long)(NUMBER));           \
} while (0)

Definition at line 1858 of file ia64.h.

#define ASM_GENERATE_INTERNAL_LABEL ( LABEL,
PREFIX,
NUM   ) 

Value:

do {                  \
  sprintf (LABEL, "*.%s%d", PREFIX, NUM);       \
} while (0)

Definition at line 1847 of file ia64.h.

#define ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX ( FILE,
ENCODING,
SIZE,
ADDR,
DONE   ) 

Value:

do {                  \
    const char *reltag = NULL;            \
    if (((ENCODING) & 0xF0) == DW_EH_PE_textrel)      \
      reltag = "@segrel(";            \
    else if (((ENCODING) & 0xF0) == DW_EH_PE_datarel)     \
      reltag = "@gprel(";           \
    if (reltag)               \
      {                 \
  fputs (integer_asm_op (SIZE, FALSE), FILE);     \
  fputs (reltag, FILE);           \
  assemble_name (FILE, XSTR (ADDR, 0));       \
  fputc (')', FILE);            \
  goto DONE;              \
      }                 \
  } while (0)

Definition at line 2111 of file ia64.h.

#define ASM_NO_SKIP_IN_TEXT   1

Definition at line 2146 of file ia64.h.

#define ASM_OUTPUT_ADDR_DIFF_ELT ( STREAM,
BODY,
VALUE,
REL   ) 

Value:

do {                \
  if (TARGET_ILP32)           \
    fprintf (STREAM, "\tdata4 @pcrel(.L%d)\n", VALUE);    \
  else                \
    fprintf (STREAM, "\tdata8 @pcrel(.L%d)\n", VALUE);    \
  } while (0)

Definition at line 2081 of file ia64.h.

#define ASM_OUTPUT_ADDR_VEC_ELT ( STREAM,
VALUE   )     abort ()

Definition at line 2092 of file ia64.h.

#define ASM_OUTPUT_ALIGN ( STREAM,
POWER   )     fprintf (STREAM, "\t.align %d\n", 1<<(POWER))

Definition at line 2151 of file ia64.h.

#define ASM_OUTPUT_DEBUG_LABEL ( FILE,
PREFIX,
NUM   )     fprintf (FILE, "[.%s%d:]\n", PREFIX, NUM)

Definition at line 2189 of file ia64.h.

Referenced by final_scan_insn().

#define ASM_OUTPUT_DEF ( STREAM,
NAME,
VALUE   ) 

Value:

do {                  \
  assemble_name (STREAM, NAME);           \
  fputs (" = ", STREAM);            \
  assemble_name (STREAM, VALUE);          \
  fputc ('\n', STREAM);             \
} while (0)

Definition at line 1868 of file ia64.h.

#define ASM_OUTPUT_DWARF_OFFSET ( FILE,
SIZE,
LABEL   ) 

Value:

do {              \
    fputs (integer_asm_op (SIZE, FALSE), FILE);   \
    fputs ("@secrel(", FILE);       \
    assemble_name (FILE, LABEL);      \
    fputc (')', FILE);          \
  } while (0)

Definition at line 2195 of file ia64.h.

Referenced by dw2_asm_output_offset(), and VPARAMS().

#define ASM_OUTPUT_DWARF_PCREL ( FILE,
SIZE,
LABEL   ) 

Value:

do {              \
    fputs (integer_asm_op (SIZE, FALSE), FILE);   \
    fputs ("@pcrel(", FILE);        \
    assemble_name (FILE, LABEL);      \
    fputc (')', FILE);          \
  } while (0)

Definition at line 2204 of file ia64.h.

Referenced by dw2_asm_output_encoded_addr_rtx(), and VPARAMS().

#define ASM_OUTPUT_EXTERNAL ( FILE,
DECL,
NAME   )     ia64_asm_output_external (FILE, DECL, NAME)

Definition at line 1841 of file ia64.h.

#define ASM_OUTPUT_FDESC ( FILE,
DECL,
PART   ) 

Value:

do {                  \
  if ((PART) == 0)              \
    {                 \
      if (TARGET_ILP32)             \
        fputs ("\tdata8.ua @iplt(", FILE);        \
      else                \
        fputs ("\tdata16.ua @iplt(", FILE);       \
      assemble_name (FILE, XSTR (XEXP (DECL_RTL (DECL), 0), 0));  \
      fputs (")\n", FILE);            \
      if (TARGET_ILP32)             \
  fputs ("\tdata8.ua 0\n", FILE);         \
    }                 \
} while (0)

Definition at line 1447 of file ia64.h.

Referenced by output_constant().

#define ASM_OUTPUT_LABEL ( STREAM,
NAME   ) 

Value:

do {                  \
  ia64_asm_output_label = 1;            \
  assemble_name (STREAM, NAME);           \
  fputs (":\n", STREAM);            \
  ia64_asm_output_label = 0;            \
} while (0)

Definition at line 1826 of file ia64.h.

#define ASM_PREFERRED_EH_DATA_FORMAT ( CODE,
GLOBAL   ) 

Value:

Definition at line 2104 of file ia64.h.

#define BASE_REG_CLASS   GENERAL_REGS

Definition at line 926 of file ia64.h.

#define BIGGEST_ALIGNMENT   128

Definition at line 326 of file ia64.h.

#define BITS_BIG_ENDIAN   0

Definition at line 263 of file ia64.h.

#define BR_REG ( REGNO   )     ((REGNO) + 320)

#define BR_REGNO_P ( REGNO   )     ((REGNO) >= 320 && (REGNO) <= 327)

Definition at line 446 of file ia64.h.

#define BRANCH_COST   6

Definition at line 1732 of file ia64.h.

#define BSS_SECTION_ASM_OP   "\t.bss"

Definition at line 1764 of file ia64.h.

#define BYTES_BIG_ENDIAN   (TARGET_BIG_ENDIAN != 0)

Definition at line 265 of file ia64.h.

#define CALL_REALLY_USED_REGISTERS

Value:

{ /* General registers.  */       \
  1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 1, 1, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
  /* Floating-point registers.  */      \
  1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  /* Predicate registers.  */       \
  1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  /* Branch registers.  */        \
  1, 0, 0, 0, 0, 0, 1, 1,       \
  /*FP RA CCV UNAT PFS LC EC */       \
     0, 0,  1,   0,  1, 0, 0        \
}

Definition at line 574 of file ia64.h.

Referenced by init_reg_sets_1().

#define CALL_USED_REGISTERS

Value:

{ /* General registers.  */       \
  1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
  /* Floating-point registers.  */      \
  1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  /* Predicate registers.  */       \
  1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  /* Branch registers.  */        \
  1, 0, 0, 0, 0, 0, 1, 1,       \
  /*FP RA CCV UNAT PFS LC EC */       \
     1, 1,  1,   1,  1, 0, 1        \
}

Definition at line 536 of file ia64.h.

#define CAN_DEBUG_WITHOUT_FP

Definition at line 1202 of file ia64.h.

#define CAN_ELIMINATE ( FROM,
TO   )     (TO == BR_REG (0) ? current_function_is_leaf : 1)

Definition at line 1220 of file ia64.h.

#define CANNOT_CHANGE_MODE_CLASS ( FROM,
TO,
CLASS   ) 

Value:

Definition at line 1018 of file ia64.h.

#define CASE_VECTOR_MODE   ptr_mode

Definition at line 2277 of file ia64.h.

#define CASE_VECTOR_PC_RELATIVE   1

Definition at line 2283 of file ia64.h.

#define CC1_SPEC   "%{G*}"

Definition at line 250 of file ia64.h.

#define CC1_SPEC   "%(cc1_cpu) "

Definition at line 250 of file ia64.h.

#define CLASS_MAX_NREGS ( CLASS,
MODE   ) 

Value:

((MODE) == BImode && (CLASS) == PR_REGS ? 2     \
   : ((CLASS) == FR_REGS && (MODE) == TFmode) ? 1   \
   : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)

Definition at line 1010 of file ia64.h.

#define CONST_COSTS ( X,
CODE,
OUTER_CODE   ) 

Value:

case CONST_INT:             \
    if ((X) == const0_rtx)            \
      return 0;               \
    switch (OUTER_CODE)             \
      {                 \
      case SET:               \
  return CONST_OK_FOR_J (INTVAL (X)) ? 0 : COSTS_N_INSNS (1); \
      case PLUS:              \
  if (CONST_OK_FOR_I (INTVAL (X)))        \
    return 0;             \
  if (CONST_OK_FOR_J (INTVAL (X)))        \
    return 1;             \
  return COSTS_N_INSNS (1);         \
      default:                \
  if (CONST_OK_FOR_K (INTVAL (X)) || CONST_OK_FOR_L (INTVAL (X))) \
    return 0;             \
  return COSTS_N_INSNS (1);         \
      }                 \
  case CONST_DOUBLE:              \
    return COSTS_N_INSNS (1);           \
  case CONST:               \
  case SYMBOL_REF:              \
  case LABEL_REF:             \
    return COSTS_N_INSNS (3);

Definition at line 1661 of file ia64.h.

#define CONST_DOUBLE_OK_FOR_G ( VALUE   ) 

#define CONST_DOUBLE_OK_FOR_LETTER_P ( VALUE,
 )     ((C) == 'G' ? CONST_DOUBLE_OK_FOR_G (VALUE) : 0)

Definition at line 1064 of file ia64.h.

#define CONST_OK_FOR_I ( VALUE   )     ((unsigned HOST_WIDE_INT)(VALUE) + 0x2000 < 0x4000)

Definition at line 1027 of file ia64.h.

#define CONST_OK_FOR_J ( VALUE   )     ((unsigned HOST_WIDE_INT)(VALUE) + 0x200000 < 0x400000)

Definition at line 1030 of file ia64.h.

#define CONST_OK_FOR_K ( VALUE   )     ((unsigned HOST_WIDE_INT)(VALUE) + 0x80 < 0x100)

Definition at line 1033 of file ia64.h.

#define CONST_OK_FOR_L ( VALUE   )     ((unsigned HOST_WIDE_INT)(VALUE) + 0x7F < 0x100)

Definition at line 1035 of file ia64.h.

#define CONST_OK_FOR_LETTER_P ( VALUE,
 ) 

Value:

((C) == 'I' ? CONST_OK_FOR_I (VALUE)    \
 : (C) == 'J' ? CONST_OK_FOR_J (VALUE)    \
 : (C) == 'K' ? CONST_OK_FOR_K (VALUE)    \
 : (C) == 'L' ? CONST_OK_FOR_L (VALUE)    \
 : (C) == 'M' ? CONST_OK_FOR_M (VALUE)    \
 : (C) == 'N' ? CONST_OK_FOR_N (VALUE)    \
 : (C) == 'O' ? CONST_OK_FOR_O (VALUE)    \
 : (C) == 'P' ? CONST_OK_FOR_P (VALUE)    \
 : 0)

Definition at line 1045 of file ia64.h.

#define CONST_OK_FOR_M ( VALUE   )     ((unsigned HOST_WIDE_INT)(VALUE) < 0x40)

Definition at line 1037 of file ia64.h.

#define CONST_OK_FOR_N ( VALUE   )     ((unsigned HOST_WIDE_INT)(VALUE) + 0x100 < 0x200)

Definition at line 1039 of file ia64.h.

#define CONST_OK_FOR_O ( VALUE   )     ((VALUE) == 0)

Definition at line 1041 of file ia64.h.

#define CONST_OK_FOR_P ( VALUE   )     ((VALUE) == 0 || (VALUE) == -1)

Definition at line 1043 of file ia64.h.

#define CONSTANT_ADDRESS_P ( X   )     0

Definition at line 1569 of file ia64.h.

#define CONSTANT_ALIGNMENT ( EXP,
ALIGN   ) 

Value:

(TREE_CODE (EXP) == STRING_CST  \
   && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))

Definition at line 343 of file ia64.h.

#define CONSTRAINT_OK_FOR_Q ( VALUE   )     (memory_operand((VALUE), VOIDmode) && ! MEM_VOLATILE_P (VALUE))

Definition at line 1072 of file ia64.h.

#define CONSTRAINT_OK_FOR_R ( VALUE   )     (GET_CODE (VALUE) == CONST_INT && INTVAL (VALUE) >= 1 && INTVAL (VALUE) <= 4)

Definition at line 1075 of file ia64.h.

#define CONSTRAINT_OK_FOR_S ( VALUE   ) 

Value:

(GET_CODE (VALUE) == MEM          \
   && GET_RTX_CLASS (GET_CODE (XEXP ((VALUE), 0))) != 'a' \
   && (reload_in_progress || memory_operand ((VALUE), VOIDmode)))

Definition at line 1078 of file ia64.h.

#define DATA_ALIGNMENT ( TYPE,
ALIGN   ) 

Value:

(TREE_CODE (TYPE) == ARRAY_TYPE   \
   && TYPE_MODE (TREE_TYPE (TYPE)) == QImode  \
   && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))

Definition at line 333 of file ia64.h.

#define DATA_SECTION_ASM_OP   "\t.data"

Definition at line 1759 of file ia64.h.

#define DEFAULT_PCC_STRUCT_RETURN   0

Definition at line 1401 of file ia64.h.

#define DEFAULT_SIGNED_CHAR   1

Definition at line 407 of file ia64.h.

#define DONT_USE_BUILTIN_SETJMP

Definition at line 2444 of file ia64.h.

#define DOUBLE_TYPE_SIZE   64

Definition at line 399 of file ia64.h.

#define DWARF2_ASM_LINE_DEBUG_INFO   (TARGET_DWARF2_ASM)

Definition at line 2182 of file ia64.h.

#define DWARF2_DEBUGGING_INFO   1

Definition at line 2180 of file ia64.h.

#define EH_RETURN_DATA_REGNO (  )     ((N) < 4 ? (N) + 15 : INVALID_REGNUM)

Definition at line 2364 of file ia64.h.

#define EH_USES ( REGNO   )     ia64_eh_uses (REGNO)

#define ELIMINABLE_REGS

#define ENCODE_SECTION_INFO_CHAR   '@'

#define EPILOGUE_USES ( REGNO   )     ia64_epilogue_uses (REGNO)

Definition at line 1434 of file ia64.h.

#define EXIT_IGNORE_STACK   1

Definition at line 1429 of file ia64.h.

#define EXPAND_BUILTIN_VA_ARG ( valist,
type   )     ia64_va_arg (valist, type)

Definition at line 1361 of file ia64.h.

#define EXTRA_CONSTRAINT ( VALUE,
 ) 

Value:

((C) == 'Q' ? CONSTRAINT_OK_FOR_Q (VALUE) \
   : (C) == 'R' ? CONSTRAINT_OK_FOR_R (VALUE) \
   : (C) == 'S' ? CONSTRAINT_OK_FOR_S (VALUE) \
   : 0)

Definition at line 1083 of file ia64.h.

#define EXTRA_SPECS   { "asm_extra", ASM_EXTRA_SPEC },

Definition at line 52 of file ia64.h.

#define FIRST_PARM_OFFSET ( FUNDECL   )     0

Definition at line 1111 of file ia64.h.

#define FIRST_PSEUDO_REGISTER   335

Definition at line 439 of file ia64.h.

#define FIXED_REGISTERS

Value:

{ /* General registers.  */       \
  1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  /* Floating-point registers.  */      \
  1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  /* Predicate registers.  */       \
  1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  /* Branch registers.  */        \
  0, 0, 0, 0, 0, 0, 0, 0,       \
  /*FP RA CCV UNAT PFS LC EC */       \
     1, 1,  1,   1,  1, 0, 1        \
 }

Definition at line 501 of file ia64.h.

#define FLOAT_TYPE_SIZE   32

Definition at line 397 of file ia64.h.

#define FR_ARG_FIRST   FR_REG (8)

Definition at line 1259 of file ia64.h.

Referenced by ia64_function_arg(), and ia64_function_value().

#define FR_REG ( REGNO   )     ((REGNO) + 128)

#define FR_REGNO_P ( REGNO   )     ((REGNO) >= 128 && (REGNO) <= 255)

#define FR_RET_FIRST   FR_REG (8)

Definition at line 1260 of file ia64.h.

#define FR_RET_LAST   FR_REG (15)

Definition at line 1261 of file ia64.h.

#define FRAME_POINTER_REGNUM   328

Definition at line 1164 of file ia64.h.

#define FRAME_POINTER_REQUIRED   0

Definition at line 1199 of file ia64.h.

#define FUNCTION_ARG ( CUM,
MODE,
TYPE,
NAMED   )     ia64_function_arg (&CUM, MODE, TYPE, NAMED, 0)

Definition at line 1267 of file ia64.h.

#define FUNCTION_ARG_ADVANCE ( CUM,
MODE,
TYPE,
NAMED   )     ia64_function_arg_advance (&CUM, MODE, TYPE, NAMED)

Definition at line 1335 of file ia64.h.

#define FUNCTION_ARG_BOUNDARY ( MODE,
TYPE   ) 

Value:

(((TYPE) ? (TYPE_ALIGN (TYPE) > 8 * BITS_PER_UNIT)    \
    : (((((MODE) == BLKmode         \
    ? int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE))  \
   + UNITS_PER_WORD - 1) / UNITS_PER_WORD) > 1))    \
    ? 128 : PARM_BOUNDARY)

Definition at line 1344 of file ia64.h.

#define FUNCTION_ARG_PARTIAL_NREGS ( CUM,
MODE,
TYPE,
NAMED   )     ia64_function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED)

Definition at line 1281 of file ia64.h.

#define FUNCTION_ARG_PASS_BY_REFERENCE ( CUM,
MODE,
TYPE,
NAMED   )     ia64_function_arg_pass_by_reference (&CUM, MODE, TYPE, NAMED)

Definition at line 1290 of file ia64.h.

#define FUNCTION_ARG_REGNO_P ( REGNO   ) 

Value:

Definition at line 1356 of file ia64.h.

#define FUNCTION_BOUNDARY   128

Definition at line 322 of file ia64.h.

#define FUNCTION_INCOMING_ARG ( CUM,
MODE,
TYPE,
NAMED   )     ia64_function_arg (&CUM, MODE, TYPE, NAMED, 1)

Definition at line 1274 of file ia64.h.

#define FUNCTION_MODE   Pmode

Definition at line 2324 of file ia64.h.

#define FUNCTION_OK_FOR_SIBCALL ( DECL   )     ia64_function_ok_for_sibcall (DECL)

Definition at line 2451 of file ia64.h.

#define FUNCTION_PROFILER ( FILE,
LABELNO   ) 

Value:

do {                  \
  char buf[20];               \
  ASM_GENERATE_INTERNAL_LABEL (buf, "LP", LABELNO);     \
  fputs ("\talloc out0 = ar.pfs, 8, 0, 4, 0\n", FILE);      \
  if (TARGET_AUTO_PIC)              \
    fputs ("\tmovl out3 = @gprel(", FILE);        \
  else                  \
    fputs ("\taddl out3 = @ltoff(", FILE);        \
  assemble_name (FILE, buf);            \
  if (TARGET_AUTO_PIC)              \
    fputs (");;\n", FILE);            \
  else                  \
    fputs ("), r1;;\n", FILE);            \
  fputs ("\tmov out1 = r1\n", FILE);          \
  fputs ("\tmov out2 = b0\n", FILE);          \
  fputs ("\tbr.call.sptk.many b0 = _mcount;;\n", FILE);     \
} while (0)

Definition at line 1468 of file ia64.h.

#define FUNCTION_VALUE ( VALTYPE,
FUNC   )     ia64_function_value (VALTYPE, FUNC)

Definition at line 1369 of file ia64.h.

#define FUNCTION_VALUE_REGNO_P ( REGNO   ) 

Value:

(((REGNO) >= GR_RET_FIRST && (REGNO) <= GR_RET_LAST)    \
   || ((REGNO) >= FR_RET_FIRST && (REGNO) <= FR_RET_LAST))

Definition at line 1385 of file ia64.h.

#define GENERAL_REGNO_P ( REGNO   ) 

Value:

Definition at line 447 of file ia64.h.

#define GENERAL_REGS   GR_REGS

Definition at line 843 of file ia64.h.

#define GLOBAL_ASM_OP   "\t.global "

Definition at line 1835 of file ia64.h.

#define GO_IF_LEGITIMATE_ADDRESS ( MODE,
X,
LABEL   ) 

Value:

do {                  \
  if (LEGITIMATE_ADDRESS_REG (X))         \
    goto LABEL;               \
  else if ((GET_CODE (X) == POST_INC || GET_CODE (X) == POST_DEC) \
     && LEGITIMATE_ADDRESS_REG (XEXP (X, 0))      \
     && XEXP (X, 0) != arg_pointer_rtx)       \
    goto LABEL;               \
  else if (GET_CODE (X) == POST_MODIFY          \
     && LEGITIMATE_ADDRESS_REG (XEXP (X, 0))      \
     && XEXP (X, 0) != arg_pointer_rtx        \
     && LEGITIMATE_ADDRESS_DISP (XEXP (X, 0), XEXP (X, 1))) \
    goto LABEL;               \
} while (0)

Definition at line 1592 of file ia64.h.

#define GO_IF_MODE_DEPENDENT_ADDRESS ( ADDR,
LABEL   ) 

Value:

if (GET_CODE (ADDR) == POST_DEC || GET_CODE (ADDR) == POST_INC) \
    goto LABEL;

Definition at line 1634 of file ia64.h.

#define GR_ARG_FIRST   IN_REG (0)

Definition at line 1256 of file ia64.h.

Referenced by ia64_expand_prologue(), and ia64_function_arg().

#define GR_REG ( REGNO   )     ((REGNO) + 0)

#define GR_REGNO_P ( REGNO   )     ((unsigned HOST_WIDE_INT) (REGNO) <= 127)

#define GR_RET_FIRST   GR_REG (8)

Definition at line 1257 of file ia64.h.

Referenced by ia64_function_value().

#define GR_RET_LAST   GR_REG (11)

Definition at line 1258 of file ia64.h.

#define HANDLE_SYSV_PRAGMA   1

Definition at line 2343 of file ia64.h.

#define HARD_FRAME_POINTER_REGNUM   LOC_REG (79)

Definition at line 1167 of file ia64.h.

#define HARD_REGNO_MODE_OK ( REGNO,
MODE   ) 

Value:

(FR_REGNO_P (REGNO) ?           \
     GET_MODE_CLASS (MODE) != MODE_CC &&      \
     (MODE) != TImode &&          \
     (MODE) != BImode &&          \
     ((MODE) != TFmode || INTEL_EXTENDED_IEEE_FORMAT)     \
   : PR_REGNO_P (REGNO) ?         \
     (MODE) == BImode || GET_MODE_CLASS (MODE) == MODE_CC \
   : GR_REGNO_P (REGNO) ? (MODE) != CCImode && (MODE) != TFmode \
   : AR_REGNO_P (REGNO) ? (MODE) == DImode      \
   : BR_REGNO_P (REGNO) ? (MODE) == DImode      \
   : 0)

Definition at line 772 of file ia64.h.

#define HARD_REGNO_NREGS ( REGNO,
MODE   ) 

Value:

((REGNO) == PR_REG (0) && (MODE) == DImode ? 64     \
   : PR_REGNO_P (REGNO) && (MODE) == BImode ? 2       \
   : PR_REGNO_P (REGNO) && (MODE) == CCImode ? 1      \
   : FR_REGNO_P (REGNO) && (MODE) == TFmode && INTEL_EXTENDED_IEEE_FORMAT ? 1 \
   : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)

Definition at line 761 of file ia64.h.

#define HARD_REGNO_RENAME_OK ( REGNO1,
REGNO2   )     ia64_hard_regno_rename_ok((REGNO1), (REGNO2))

Definition at line 2217 of file ia64.h.

#define HAVE_AS_LTOFFX_LDXMOV_RELOCS   0

Definition at line 144 of file ia64.h.

Referenced by output_11(), output_12(), output_428(), output_429(), output_430(), and output_431().

#define HAVE_POST_DECREMENT   1

Definition at line 1562 of file ia64.h.

#define HAVE_POST_INCREMENT   1

Definition at line 1561 of file ia64.h.

#define HAVE_POST_MODIFY_DISP   1

Definition at line 1563 of file ia64.h.

#define HAVE_POST_MODIFY_REG   1

Definition at line 1564 of file ia64.h.

#define IA64_DEFAULT_GVALUE   8

Definition at line 1768 of file ia64.h.

Referenced by ia64_override_options().

#define IA64_STACK_ALIGN ( LOC   )     (((LOC) + 15) & ~15)

Definition at line 319 of file ia64.h.

Referenced by ia64_compute_frame_size().

#define IA64_UNWIND_EMIT ( f,
i   )     process_for_unwind_directive (f,i)

Definition at line 2362 of file ia64.h.

Referenced by final_scan_insn().

#define IA64_UNWIND_INFO   1

Definition at line 2361 of file ia64.h.

#define IMMEDIATE_PREFIX   ""

Definition at line 2071 of file ia64.h.

#define IN_REG ( REGNO   )     ((REGNO) + 112)

#define IN_REGNO_P ( REGNO   )     ((REGNO) >= IN_REG (0) && (REGNO) <= IN_REG (7))

Definition at line 466 of file ia64.h.

Referenced by ia64_dbx_register_number().

#define INCOMING_FRAME_SP_OFFSET   0

Definition at line 1148 of file ia64.h.

#define INCOMING_REGNO ( OUT   )     ((unsigned) ((OUT) - OUT_REG (0)) < 8 ? IN_REG ((OUT) - OUT_REG (0)) : (OUT))

Definition at line 610 of file ia64.h.

#define INCOMING_RETURN_ADDR_RTX   gen_rtx_REG (VOIDmode, BR_REG (0))

Definition at line 1129 of file ia64.h.

#define INDEX_REG_CLASS   GENERAL_REGS

Definition at line 932 of file ia64.h.

#define INIT_CUMULATIVE_ARGS ( CUM,
FNTYPE,
LIBNAME,
INDIRECT   ) 

Value:

do {                  \
  (CUM).words = 0;              \
  (CUM).int_regs = 0;             \
  (CUM).fp_regs = 0;              \
  (CUM).prototype = ((FNTYPE) && TYPE_ARG_TYPES (FNTYPE)) || (LIBNAME); \
} while (0)

Definition at line 1308 of file ia64.h.

#define INIT_CUMULATIVE_INCOMING_ARGS ( CUM,
FNTYPE,
LIBNAME   ) 

Value:

do {                  \
  (CUM).words = 0;              \
  (CUM).int_regs = 0;             \
  (CUM).fp_regs = 0;              \
  (CUM).prototype = 1;              \
} while (0)

Definition at line 1322 of file ia64.h.

#define INIT_EXPANDERS

Value:

do {              \
    if (cfun && cfun->emit->regno_pointer_align)  \
      REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = 64;  \
  } while (0)

Definition at line 1177 of file ia64.h.

#define INITIAL_ELIMINATION_OFFSET ( FROM,
TO,
OFFSET   )     ((OFFSET) = ia64_initial_elimination_offset ((FROM), (TO)))

Definition at line 1227 of file ia64.h.

#define INITIALIZE_TRAMPOLINE ( ADDR,
FNADDR,
STATIC_CHAIN   )     ia64_initialize_trampoline((ADDR), (FNADDR), (STATIC_CHAIN))

Definition at line 1545 of file ia64.h.

#define INT_TYPE_SIZE   32

Definition at line 387 of file ia64.h.

#define INTEL_EXTENDED_IEEE_FORMAT   1

Definition at line 405 of file ia64.h.

#define LEGITIMATE_ADDRESS_DISP ( R,
X   ) 

Value:

(GET_CODE (X) == PLUS             \
   && rtx_equal_p (R, XEXP (X, 0))          \
   && (LEGITIMATE_ADDRESS_REG (XEXP (X, 1))       \
       || (GET_CODE (XEXP (X, 1)) == CONST_INT        \
     && INTVAL (XEXP (X, 1)) >= -256        \
     && INTVAL (XEXP (X, 1)) < 256)))

Definition at line 1584 of file ia64.h.

#define LEGITIMATE_ADDRESS_REG ( X   ) 

Value:

((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X))     \
   || (GET_CODE (X) == SUBREG && GET_CODE (XEXP (X, 0)) == REG    \
       && REG_OK_FOR_BASE_P (XEXP (X, 0))))

Definition at line 1579 of file ia64.h.

#define LEGITIMATE_CONSTANT_P ( X   ) 

Value:

(GET_CODE (X) != CONST_DOUBLE || GET_MODE (X) == VOIDmode \
   || GET_MODE (X) == DImode || CONST_DOUBLE_OK_FOR_G (X))  \

Definition at line 1641 of file ia64.h.

#define LEGITIMIZE_ADDRESS ( X,
OLDX,
MODE,
WIN   ) 

Definition at line 1627 of file ia64.h.

#define LIBCALL_VALUE ( MODE   ) 

Value:

Definition at line 1375 of file ia64.h.

#define LIBGCC2_WORDS_BIG_ENDIAN   0

Definition at line 275 of file ia64.h.

#define LOAD_EXTEND_OP ( MODE   )     ZERO_EXTEND

Definition at line 2295 of file ia64.h.

#define LOC_REG ( REGNO   )     ((REGNO) + 32)

#define LOC_REGNO_P ( REGNO   )     ((REGNO) >= LOC_REG (0) && (REGNO) <= LOC_REG (79))

Definition at line 467 of file ia64.h.

Referenced by ia64_dbx_register_number().

#define LOCAL_LABEL_PREFIX   "."

Definition at line 2069 of file ia64.h.

#define LOCAL_REGNO ( REGNO   )     (IN_REGNO_P (REGNO) || LOC_REGNO_P (REGNO))

#define LONG_DOUBLE_TYPE_SIZE   128

Definition at line 401 of file ia64.h.

#define LONG_LONG_TYPE_SIZE   64

Definition at line 395 of file ia64.h.

#define LONG_TYPE_SIZE   (TARGET_ILP32 ? 32 : 64)

Definition at line 391 of file ia64.h.

#define MACHINE_DEPENDENT_REORG ( INSN   )     ia64_reorg (INSN)

Definition at line 2350 of file ia64.h.

#define MASK_AUTO_PIC   0x00000400

Definition at line 86 of file ia64.h.

#define MASK_B_STEP   0x00000040

Definition at line 78 of file ia64.h.

#define MASK_BIG_ENDIAN   0x00000001

Definition at line 66 of file ia64.h.

#define MASK_CONST_GP   0x00000200

Definition at line 84 of file ia64.h.

Referenced by ia64_override_options().

#define MASK_DWARF2_ASM   0x40000000

Definition at line 96 of file ia64.h.

#define MASK_GNU_AS   0x00000002

Definition at line 68 of file ia64.h.

#define MASK_GNU_LD   0x00000004

Definition at line 70 of file ia64.h.

#define MASK_ILP32   0x00000020

Definition at line 76 of file ia64.h.

#define MASK_INLINE_FLOAT_DIV_LAT   0x00000800

Definition at line 88 of file ia64.h.

Referenced by ia64_override_options().

#define MASK_INLINE_FLOAT_DIV_THR   0x00001000

Definition at line 90 of file ia64.h.

Referenced by ia64_override_options().

#define MASK_INLINE_INT_DIV_LAT   0x00000800

Definition at line 92 of file ia64.h.

Referenced by ia64_override_options().

#define MASK_INLINE_INT_DIV_THR   0x00001000

Definition at line 94 of file ia64.h.

Referenced by ia64_override_options().

#define MASK_NO_PIC   0x00000008

Definition at line 72 of file ia64.h.

#define MASK_NO_SDATA   0x00000100

Definition at line 82 of file ia64.h.

#define MASK_REG_NAMES   0x00000080

Definition at line 80 of file ia64.h.

#define MASK_VOL_ASM_STOP   0x00000010

Definition at line 74 of file ia64.h.

#define MAX_ARGUMENT_SLOTS   8

#define MAX_CONDITIONAL_EXECUTE   12

Definition at line 2357 of file ia64.h.

#define MAX_FIXED_MODE_SIZE   GET_MODE_BITSIZE (TImode)

Definition at line 362 of file ia64.h.

#define MAX_INT_RETURN_SLOTS   4

Definition at line 1255 of file ia64.h.

Referenced by ia64_return_in_memory().

#define MAX_LONG_TYPE_SIZE   64

Definition at line 393 of file ia64.h.

#define MAX_REGS_PER_ADDRESS   2

Definition at line 1573 of file ia64.h.

#define MEMORY_MOVE_COST ( MODE,
CLASS,
IN   ) 

Value:

((CLASS) == GENERAL_REGS || (CLASS) == FR_REGS \
   || (CLASS) == GR_AND_FR_REGS ? 4 : 10)

Definition at line 1721 of file ia64.h.

#define MODES_TIEABLE_P ( MODE1,
MODE2   ) 

Value:

(GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2) \
   && (((MODE1) == TFmode) == ((MODE2) == TFmode))  \
   && (((MODE1) == BImode) == ((MODE2) == BImode)))

Definition at line 795 of file ia64.h.

#define MOVE_MAX   8

Definition at line 2299 of file ia64.h.

#define N_REG_CLASSES   ((int) LIM_REG_CLASSES)

Definition at line 846 of file ia64.h.

#define NO_FUNCTION_CSE

Definition at line 1746 of file ia64.h.

#define OUT_REG ( REGNO   )     ((REGNO) + 120)

#define OUT_REGNO_P ( REGNO   )     ((REGNO) >= OUT_REG (0) && (REGNO) <= OUT_REG (7))

Definition at line 468 of file ia64.h.

Referenced by ia64_dbx_register_number(), and ia64_hard_regno_rename_ok().

#define OUTGOING_REGNO ( IN   )     ((unsigned) ((IN) - IN_REG (0)) < 8 ? OUT_REG ((IN) - IN_REG (0)) : (IN))

Definition at line 618 of file ia64.h.

#define OVERRIDE_OPTIONS   ia64_override_options ()

Definition at line 233 of file ia64.h.

#define PARM_BOUNDARY   64

Definition at line 309 of file ia64.h.

#define PCC_BITFIELD_TYPE_MATTERS   1

Definition at line 356 of file ia64.h.

#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED

Definition at line 1786 of file ia64.h.

Referenced by rtx_varies_p(), and scan_loop().

#define PIC_OFFSET_TABLE_REGNUM   GR_REG (1)

Definition at line 1781 of file ia64.h.

#define Pmode   DImode

Definition at line 2319 of file ia64.h.

#define POINTER_SIZE   (TARGET_ILP32 ? 32 : 64)

Definition at line 280 of file ia64.h.

#define PR_REG ( REGNO   )     ((REGNO) + 256)

#define PR_REGNO_P ( REGNO   )     ((REGNO) >= 256 && (REGNO) <= 319)

#define PREDICATE_CODES

Definition at line 2227 of file ia64.h.

#define PREFERRED_RELOAD_CLASS ( X,
CLASS   ) 

Value:

(CLASS == FR_REGS && GET_CODE (X) == MEM && MEM_VOLATILE_P (X) ? NO_REGS   \
   : CLASS == FR_REGS && GET_CODE (X) == CONST_DOUBLE ? NO_REGS        \
   : GET_RTX_CLASS (GET_CODE (X)) != 'o'             \
     && (CLASS == AR_M_REGS || CLASS == AR_I_REGS) ? NO_REGS         \
   : CLASS)

Definition at line 972 of file ia64.h.

#define PREFETCH_BLOCK   32

Definition at line 2341 of file ia64.h.

#define PRINT_OPERAND ( STREAM,
X,
CODE   )     ia64_print_operand (STREAM, X, CODE)

Definition at line 2047 of file ia64.h.

#define PRINT_OPERAND_ADDRESS ( STREAM,
X   )     ia64_print_operand_address (STREAM, X)

Definition at line 2062 of file ia64.h.

#define PRINT_OPERAND_PUNCT_VALID_P ( CODE   )     ((CODE) == '+' || (CODE) == ',')

Definition at line 2055 of file ia64.h.

#define PROFILE_BEFORE_PROLOGUE   1

Definition at line 2449 of file ia64.h.

#define PROMOTE_MODE ( MODE,
UNSIGNEDP,
TYPE   ) 

Value:

do                  \
  {                 \
    if (GET_MODE_CLASS (MODE) == MODE_INT       \
  && GET_MODE_SIZE (MODE) < 4)          \
      (MODE) = SImode;              \
  }                 \
while (0)

Definition at line 294 of file ia64.h.

#define R_BR ( REGNO   )     BR_REG (REGNO)

Definition at line 483 of file ia64.h.

#define R_FR ( REGNO   )     FR_REG (REGNO)

Definition at line 481 of file ia64.h.

#define R_GR ( REGNO   )     GR_REG (REGNO)

Definition at line 480 of file ia64.h.

#define R_PR ( REGNO   )     PR_REG (REGNO)

Definition at line 482 of file ia64.h.

#define REG_ALLOC_ORDER

Definition at line 652 of file ia64.h.

#define REG_CLASS_CONTENTS

Definition at line 859 of file ia64.h.

#define REG_CLASS_FROM_LETTER ( CHAR   ) 

Value:

((CHAR) == 'f' ? FR_REGS    \
 : (CHAR) == 'a' ? ADDL_REGS    \
 : (CHAR) == 'b' ? BR_REGS    \
 : (CHAR) == 'c' ? PR_REGS    \
 : (CHAR) == 'd' ? AR_M_REGS    \
 : (CHAR) == 'e' ? AR_I_REGS    \
 : NO_REGS)

Definition at line 940 of file ia64.h.

#define REG_CLASS_NAMES

Value:

{ "NO_REGS", "PR_REGS", "BR_REGS", "AR_M_REGS", "AR_I_REGS", \
  "ADDL_REGS", "GR_REGS", "FR_REGS", \
  "GR_AND_BR_REGS", "GR_AND_FR_REGS", "ALL_REGS" }

Definition at line 850 of file ia64.h.

#define REG_OK_FOR_BASE_P ( X   )     (GENERAL_REGNO_P (REGNO (X)) || (REGNO (X) >= FIRST_PSEUDO_REGISTER))

Definition at line 1613 of file ia64.h.

#define REG_OK_FOR_INDEX_P ( X   )     REG_OK_FOR_BASE_P (X)

Definition at line 1620 of file ia64.h.

#define REGISTER_MOVE_COST   ia64_register_move_cost

Definition at line 1717 of file ia64.h.

#define REGISTER_NAMES

Definition at line 1887 of file ia64.h.

#define REGISTER_PREFIX   ""

Definition at line 2068 of file ia64.h.

#define REGNO_OK_FOR_BASE_P ( REGNO   )     (GENERAL_REGNO_P (REGNO) || GENERAL_REGNO_P (reg_renumber[REGNO]))

Definition at line 952 of file ia64.h.

#define REGNO_OK_FOR_INDEX_P ( NUM   )     REGNO_OK_FOR_BASE_P (NUM)

Definition at line 959 of file ia64.h.

#define REGNO_REG_CLASS ( REGNO   ) 

#define RETURN_ADDR_RTX ( COUNT,
FRAME   )     ((COUNT) == 0 ? return_address_pointer_rtx : const0_rtx)

Definition at line 1121 of file ia64.h.

#define RETURN_ADDRESS_POINTER_REGNUM   329

Definition at line 1188 of file ia64.h.

#define RETURN_IN_MEMORY ( TYPE   )     ia64_return_in_memory (TYPE)

Definition at line 1395 of file ia64.h.

#define RETURN_POPS_ARGS ( FUNDECL,
FUNTYPE,
STACK_SIZE   )     0

Definition at line 1249 of file ia64.h.

#define RTX_COSTS ( X,
CODE,
OUTER_CODE   ) 

Value:

case MULT:                \
    /* For multiplies wider than HImode, we have to go to the FPU,  \
       which normally involves copies.  Plus there's the latency  \
       of the multiply itself, and the latency of the instructions to \
       transfer integer regs to FP regs.  */        \
    if (GET_MODE_SIZE (GET_MODE (X)) > 2)       \
      return COSTS_N_INSNS (10);          \
    return COSTS_N_INSNS (2);           \
  case PLUS:                \
  case MINUS:               \
  case ASHIFT:                \
  case ASHIFTRT:              \
  case LSHIFTRT:              \
    return COSTS_N_INSNS (1);           \
  case DIV:               \
  case UDIV:                \
  case MOD:               \
  case UMOD:                \
    /* We make divide expensive, so that divide-by-constant will be \
       optimized to a multiply.  */         \
    return COSTS_N_INSNS (60);

Definition at line 1689 of file ia64.h.

#define SECONDARY_RELOAD_CLASS ( CLASS,
MODE,
X   )     ia64_secondary_reload_class (CLASS, MODE, X)

Definition at line 986 of file ia64.h.

#define SELECT_CC_MODE ( OP,
X,
 )     CCmode

Definition at line 632 of file ia64.h.

#define SETUP_INCOMING_VARARGS ( ARGS_SO_FAR,
MODE,
TYPE,
PRETEND_ARGS_SIZE,
SECOND_TIME   )     ia64_setup_incoming_varargs (ARGS_SO_FAR, MODE, TYPE, & PRETEND_ARGS_SIZE, SECOND_TIME)

Definition at line 1493 of file ia64.h.

#define SHORT_TYPE_SIZE   16

Definition at line 389 of file ia64.h.

#define SIMULTANEOUS_PREFETCHES   6

Definition at line 2336 of file ia64.h.

#define SLOW_BYTE_ACCESS   1

Definition at line 1738 of file ia64.h.

#define STACK_BOUNDARY   128

Definition at line 315 of file ia64.h.

#define STACK_GROWS_DOWNWARD   1

Definition at line 1093 of file ia64.h.

#define STACK_POINTER_OFFSET   16

Definition at line 1107 of file ia64.h.

#define STACK_POINTER_REGNUM   12

Definition at line 1157 of file ia64.h.

#define STACK_SAVEAREA_MODE ( LEVEL   )     ((LEVEL) == SAVE_NONLOCAL ? OImode : Pmode)

#define STARTING_FRAME_OFFSET   0

Definition at line 1101 of file ia64.h.

#define STATIC_CHAIN_REGNUM   15

Definition at line 1192 of file ia64.h.

#define STORE_FLAG_VALUE   1

Definition at line 2313 of file ia64.h.

#define STRICT_ALIGNMENT   1

Definition at line 347 of file ia64.h.

#define STRICT_ARGUMENT_NAMING   1

Definition at line 1499 of file ia64.h.

#define STRUCT_VALUE_REGNUM   GR_REG (8)

Definition at line 1406 of file ia64.h.

#define TARGET_64BIT   1

Definition at line 2366 of file ia64.h.

#define TARGET_AUTO_PIC   (target_flags & MASK_AUTO_PIC)

#define TARGET_B_STEP   (target_flags & MASK_B_STEP)

Definition at line 110 of file ia64.h.

Referenced by fixup_errata().

#define TARGET_BIG_ENDIAN   (target_flags & MASK_BIG_ENDIAN)

Definition at line 98 of file ia64.h.

#define TARGET_CONST_GP   (target_flags & MASK_CONST_GP)

Definition at line 116 of file ia64.h.

Referenced by ia64_epilogue_uses(), and ia64_split_call().

 
#define TARGET_CPU_CPP_BUILTINS (  ) 

Value:

do {            \
  builtin_assert("cpu=ia64");   \
  builtin_assert("machine=ia64");   \
  builtin_define("__ia64");   \
  builtin_define("__ia64__");   \
  builtin_define("__itanium__");    \
  builtin_define("__ELF__");    \
  if (!TARGET_ILP32)      \
    {         \
      builtin_define("_LP64");    \
      builtin_define("__LP64__");   \
    }         \
  if (TARGET_BIG_ENDIAN)      \
    builtin_define("__BIG_ENDIAN__"); \
} while (0)

Definition at line 35 of file ia64.h.

#define TARGET_CPU_DEFAULT   0

Definition at line 207 of file ia64.h.

#define TARGET_DEFAULT   MASK_DWARF2_ASM

Definition at line 203 of file ia64.h.

#define TARGET_DWARF2_ASM   (target_flags & MASK_DWARF2_ASM)

Definition at line 134 of file ia64.h.

#define TARGET_GNU_AS   (target_flags & MASK_GNU_AS)

#define TARGET_GNU_LD   (target_flags & MASK_GNU_LD)

Definition at line 102 of file ia64.h.

#define TARGET_HPUX_LD   0

Definition at line 141 of file ia64.h.

#define TARGET_ILP32   (target_flags & MASK_ILP32)

Definition at line 108 of file ia64.h.

Referenced by ia64_assemble_integer(), ia64_function_arg_boundary(), and ia64_output_mi_thunk().

#define TARGET_INLINE_FLOAT_DIV   (target_flags & (MASK_INLINE_FLOAT_DIV_LAT | MASK_INLINE_FLOAT_DIV_THR))

Definition at line 128 of file ia64.h.

#define TARGET_INLINE_FLOAT_DIV_LAT   (target_flags & MASK_INLINE_FLOAT_DIV_LAT)

#define TARGET_INLINE_FLOAT_DIV_THR   (target_flags & MASK_INLINE_FLOAT_DIV_THR)

Definition at line 122 of file ia64.h.

Referenced by ia64_override_options(), recog_3(), recog_4(), recog_6(), and split_2().

#define TARGET_INLINE_INT_DIV   (target_flags & (MASK_INLINE_INT_DIV_LAT | MASK_INLINE_INT_DIV_THR))

Definition at line 131 of file ia64.h.

Referenced by recog_6(), and split_2().

#define TARGET_INLINE_INT_DIV_LAT   (target_flags & MASK_INLINE_INT_DIV_LAT)

Definition at line 124 of file ia64.h.

Referenced by gen_divdi3(), gen_udivdi3(), ia64_override_options(), recog_4(), recog_6(), and split_2().

#define TARGET_INLINE_INT_DIV_THR   (target_flags & MASK_INLINE_INT_DIV_THR)

Definition at line 126 of file ia64.h.

Referenced by ia64_override_options(), recog_4(), recog_6(), and split_2().

#define TARGET_MEM_FUNCTIONS

Definition at line 1554 of file ia64.h.

#define TARGET_NO_PIC   (target_flags & MASK_NO_PIC)

#define TARGET_NO_SDATA   (target_flags & MASK_NO_SDATA)

Definition at line 114 of file ia64.h.

Referenced by ia64_in_small_data_p(), and ia64_select_rtx_section().

#define TARGET_OPTIONS

Value:

{                 \
  { "fixed-range=",   &ia64_fixed_range_string,     \
      N_("Specify range of registers to make fixed")},      \
  { "tls-size=",  &ia64_tls_size_string,        \
      N_("Specify bit size of immediate TLS offsets")},     \
}

Definition at line 220 of file ia64.h.

#define TARGET_REG_NAMES   (target_flags & MASK_REG_NAMES)

#define TARGET_SWITCHES

Definition at line 151 of file ia64.h.

#define TARGET_TLS14   (ia64_tls_size == 14)

Definition at line 137 of file ia64.h.

Referenced by recog_2(), and recog_8().

#define TARGET_TLS22   (ia64_tls_size == 22)

Definition at line 138 of file ia64.h.

Referenced by recog_2(), and recog_8().

#define TARGET_TLS64   (ia64_tls_size == 64)

Definition at line 139 of file ia64.h.

Referenced by ia64_expand_move(), ia64_expand_tls_address(), recog_2(), and recog_7().

#define TARGET_VOL_ASM_STOP   (target_flags & MASK_VOL_ASM_STOP)

Definition at line 106 of file ia64.h.

Referenced by rtx_needs_barrier().

#define TARGET_VTABLE_DATA_ENTRY_DISTANCE   (TARGET_ILP32 ? 2 : 1)

#define TARGET_VTABLE_ENTRY_ALIGN   64

Definition at line 379 of file ia64.h.

Referenced by build_vtable().

#define TARGET_VTABLE_USES_DESCRIPTORS   (TARGET_ILP32 ? 4 : 2)

#define TEXT_SECTION_ASM_OP   "\t.text"

Definition at line 1754 of file ia64.h.

#define TRAMPOLINE_ALIGNMENT   64

Definition at line 1541 of file ia64.h.

#define TRAMPOLINE_SIZE   32

Definition at line 1537 of file ia64.h.

#define TRULY_NOOP_TRUNCATION ( OUTPREC,
INPREC   )     1

Definition at line 2305 of file ia64.h.

#define UNITS_PER_WORD   8

Definition at line 278 of file ia64.h.

#define USER_LABEL_PREFIX   ""

Definition at line 2070 of file ia64.h.

#define WORD_REGISTER_OPERATIONS

Definition at line 2288 of file ia64.h.

#define WORDS_BIG_ENDIAN   (TARGET_BIG_ENDIAN != 0)

Definition at line 270 of file ia64.h.


Typedef Documentation


Enumeration Type Documentation

Enumerator:
IA64_ADD_OP 
IA64_SUB_OP 
IA64_OR_OP 
IA64_AND_OP 
IA64_XOR_OP 
IA64_NAND_OP 
IA64_ADD_OP 
IA64_SUB_OP 
IA64_OR_OP 
IA64_AND_OP 
IA64_XOR_OP 
IA64_NAND_OP 
IA64_ADD_OP 
IA64_SUB_OP 
IA64_OR_OP 
IA64_AND_OP 
IA64_XOR_OP 
IA64_NAND_OP 

Definition at line 2440 of file ia64.h.

Enumerator:
IA64_BUILTIN_SYNCHRONIZE 
IA64_BUILTIN_FETCH_AND_ADD_SI 
IA64_BUILTIN_FETCH_AND_SUB_SI 
IA64_BUILTIN_FETCH_AND_OR_SI 
IA64_BUILTIN_FETCH_AND_AND_SI 
IA64_BUILTIN_FETCH_AND_XOR_SI 
IA64_BUILTIN_FETCH_AND_NAND_SI 
IA64_BUILTIN_ADD_AND_FETCH_SI 
IA64_BUILTIN_SUB_AND_FETCH_SI 
IA64_BUILTIN_OR_AND_FETCH_SI 
IA64_BUILTIN_AND_AND_FETCH_SI 
IA64_BUILTIN_XOR_AND_FETCH_SI 
IA64_BUILTIN_NAND_AND_FETCH_SI 
IA64_BUILTIN_BOOL_COMPARE_AND_SWAP_SI 
IA64_BUILTIN_VAL_COMPARE_AND_SWAP_SI 
IA64_BUILTIN_SYNCHRONIZE_SI 
IA64_BUILTIN_LOCK_TEST_AND_SET_SI 
IA64_BUILTIN_LOCK_RELEASE_SI 
IA64_BUILTIN_FETCH_AND_ADD_DI 
IA64_BUILTIN_FETCH_AND_SUB_DI 
IA64_BUILTIN_FETCH_AND_OR_DI 
IA64_BUILTIN_FETCH_AND_AND_DI 
IA64_BUILTIN_FETCH_AND_XOR_DI 
IA64_BUILTIN_FETCH_AND_NAND_DI 
IA64_BUILTIN_ADD_AND_FETCH_DI 
IA64_BUILTIN_SUB_AND_FETCH_DI 
IA64_BUILTIN_OR_AND_FETCH_DI 
IA64_BUILTIN_AND_AND_FETCH_DI 
IA64_BUILTIN_XOR_AND_FETCH_DI 
IA64_BUILTIN_NAND_AND_FETCH_DI 
IA64_BUILTIN_BOOL_COMPARE_AND_SWAP_DI 
IA64_BUILTIN_VAL_COMPARE_AND_SWAP_DI 
IA64_BUILTIN_SYNCHRONIZE_DI 
IA64_BUILTIN_LOCK_TEST_AND_SET_DI 
IA64_BUILTIN_LOCK_RELEASE_DI 
IA64_BUILTIN_BSP 
IA64_BUILTIN_FLUSHRS 
IA64_BUILTIN_SYNCHRONIZE 
IA64_BUILTIN_FETCH_AND_ADD_SI 
IA64_BUILTIN_FETCH_AND_SUB_SI 
IA64_BUILTIN_FETCH_AND_OR_SI 
IA64_BUILTIN_FETCH_AND_AND_SI 
IA64_BUILTIN_FETCH_AND_XOR_SI 
IA64_BUILTIN_FETCH_AND_NAND_SI 
IA64_BUILTIN_ADD_AND_FETCH_SI 
IA64_BUILTIN_SUB_AND_FETCH_SI 
IA64_BUILTIN_OR_AND_FETCH_SI 
IA64_BUILTIN_AND_AND_FETCH_SI 
IA64_BUILTIN_XOR_AND_FETCH_SI 
IA64_BUILTIN_NAND_AND_FETCH_SI 
IA64_BUILTIN_BOOL_COMPARE_AND_SWAP_SI 
IA64_BUILTIN_VAL_COMPARE_AND_SWAP_SI 
IA64_BUILTIN_SYNCHRONIZE_SI 
IA64_BUILTIN_LOCK_TEST_AND_SET_SI 
IA64_BUILTIN_LOCK_RELEASE_SI 
IA64_BUILTIN_FETCH_AND_ADD_DI 
IA64_BUILTIN_FETCH_AND_SUB_DI 
IA64_BUILTIN_FETCH_AND_OR_DI 
IA64_BUILTIN_FETCH_AND_AND_DI 
IA64_BUILTIN_FETCH_AND_XOR_DI 
IA64_BUILTIN_FETCH_AND_NAND_DI 
IA64_BUILTIN_ADD_AND_FETCH_DI 
IA64_BUILTIN_SUB_AND_FETCH_DI 
IA64_BUILTIN_OR_AND_FETCH_DI 
IA64_BUILTIN_AND_AND_FETCH_DI 
IA64_BUILTIN_XOR_AND_FETCH_DI 
IA64_BUILTIN_NAND_AND_FETCH_DI 
IA64_BUILTIN_BOOL_COMPARE_AND_SWAP_DI 
IA64_BUILTIN_VAL_COMPARE_AND_SWAP_DI 
IA64_BUILTIN_SYNCHRONIZE_DI 
IA64_BUILTIN_LOCK_TEST_AND_SET_DI 
IA64_BUILTIN_LOCK_RELEASE_DI 
IA64_BUILTIN_BSP 
IA64_BUILTIN_FLUSHRS 
IA64_BUILTIN_SYNCHRONIZE 
IA64_BUILTIN_FETCH_AND_ADD_SI 
IA64_BUILTIN_FETCH_AND_SUB_SI 
IA64_BUILTIN_FETCH_AND_OR_SI 
IA64_BUILTIN_FETCH_AND_AND_SI 
IA64_BUILTIN_FETCH_AND_XOR_SI 
IA64_BUILTIN_FETCH_AND_NAND_SI 
IA64_BUILTIN_ADD_AND_FETCH_SI 
IA64_BUILTIN_SUB_AND_FETCH_SI 
IA64_BUILTIN_OR_AND_FETCH_SI 
IA64_BUILTIN_AND_AND_FETCH_SI 
IA64_BUILTIN_XOR_AND_FETCH_SI 
IA64_BUILTIN_NAND_AND_FETCH_SI 
IA64_BUILTIN_BOOL_COMPARE_AND_SWAP_SI 
IA64_BUILTIN_VAL_COMPARE_AND_SWAP_SI 
IA64_BUILTIN_SYNCHRONIZE_SI 
IA64_BUILTIN_LOCK_TEST_AND_SET_SI 
IA64_BUILTIN_LOCK_RELEASE_SI 
IA64_BUILTIN_FETCH_AND_ADD_DI 
IA64_BUILTIN_FETCH_AND_SUB_DI 
IA64_BUILTIN_FETCH_AND_OR_DI 
IA64_BUILTIN_FETCH_AND_AND_DI 
IA64_BUILTIN_FETCH_AND_XOR_DI 
IA64_BUILTIN_FETCH_AND_NAND_DI 
IA64_BUILTIN_ADD_AND_FETCH_DI 
IA64_BUILTIN_SUB_AND_FETCH_DI 
IA64_BUILTIN_OR_AND_FETCH_DI 
IA64_BUILTIN_AND_AND_FETCH_DI 
IA64_BUILTIN_XOR_AND_FETCH_DI 
IA64_BUILTIN_NAND_AND_FETCH_DI 
IA64_BUILTIN_BOOL_COMPARE_AND_SWAP_DI 
IA64_BUILTIN_VAL_COMPARE_AND_SWAP_DI 
IA64_BUILTIN_SYNCHRONIZE_DI 
IA64_BUILTIN_LOCK_TEST_AND_SET_DI 
IA64_BUILTIN_LOCK_RELEASE_DI 
IA64_BUILTIN_BSP 
IA64_BUILTIN_FLUSHRS 
IA64_BUILTIN_BSP 
IA64_BUILTIN_FLUSHRS 

Definition at line 2385 of file ia64.h.

enum reg_class

Enumerator:
NO_REGS 
R2 
R0_1 
INDEX_REGS 
BASE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LR0_REGS 
GENERAL_REGS 
BP_REGS 
FC_REGS 
CR_REGS 
Q_REGS 
SPECIAL_REGS 
ACCUM0_REGS 
ACCUM_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R24_REG 
R25_REG 
R27_REG 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LPCOUNT_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPU_REGS 
LO_REGS 
STACK_REG 
BASE_REGS 
HI_REGS 
CC_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
POINTER_X_REGS 
POINTER_Y_REGS 
POINTER_Z_REGS 
STACK_REG 
BASE_POINTER_REGS 
POINTER_REGS 
ADDW_REGS 
SIMPLE_LD_REGS 
LD_REGS 
NO_LD_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0R1_REGS 
R2R3_REGS 
EXT_LOW_REGS 
EXT_REGS 
ADDR_REGS 
INDEX_REGS 
BK_REG 
SP_REG 
RC_REG 
COUNTER_REGS 
INT_REGS 
GENERAL_REGS 
DP_REG 
ST_REG 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
S_REGS 
INDEX_REGS 
SP_REGS 
A_REGS 
SI_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
REPEAT_REGS 
CR_REGS 
ACCUM_REGS 
OTHER_FLAG_REGS 
F0_REGS 
F1_REGS 
BR_FLAG_REGS 
FLAG_REGS 
EVEN_REGS 
GPR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
A0H_REG 
A0L_REG 
A0_REG 
A1H_REG 
ACCUM_HIGH_REGS 
A1L_REG 
ACCUM_LOW_REGS 
A1_REG 
ACCUM_REGS 
X_REG 
X_OR_ACCUM_LOW_REGS 
X_OR_ACCUM_REGS 
YH_REG 
YH_OR_ACCUM_HIGH_REGS 
X_OR_YH_REGS 
YL_REG 
YL_OR_ACCUM_LOW_REGS 
X_OR_YL_REGS 
X_OR_Y_REGS 
Y_REG 
ACCUM_OR_Y_REGS 
PH_REG 
X_OR_PH_REGS 
PL_REG 
PL_OR_ACCUM_LOW_REGS 
X_OR_PL_REGS 
YL_OR_PL_OR_ACCUM_LOW_REGS 
P_REG 
ACCUM_OR_P_REGS 
YL_OR_P_REGS 
ACCUM_LOW_OR_YL_OR_P_REGS 
Y_OR_P_REGS 
ACCUM_Y_OR_P_REGS 
NO_FRAME_Y_ADDR_REGS 
Y_ADDR_REGS 
ACCUM_LOW_OR_Y_ADDR_REGS 
ACCUM_OR_Y_ADDR_REGS 
X_OR_Y_ADDR_REGS 
Y_OR_Y_ADDR_REGS 
P_OR_Y_ADDR_REGS 
NON_HIGH_YBASE_ELIGIBLE_REGS 
YBASE_ELIGIBLE_REGS 
J_REG 
J_OR_DAU_16_BIT_REGS 
BMU_REGS 
NOHIGH_NON_ADDR_REGS 
NON_ADDR_REGS 
SLOW_MEM_LOAD_REGS 
NOHIGH_NON_YBASE_REGS 
NO_ACCUM_NON_YBASE_REGS 
NON_YBASE_REGS 
YBASE_VIRT_REGS 
ACCUM_LOW_OR_YBASE_REGS 
ACCUM_OR_YBASE_REGS 
X_OR_YBASE_REGS 
Y_OR_YBASE_REGS 
ACCUM_LOW_YL_PL_OR_YBASE_REGS 
P_OR_YBASE_REGS 
ACCUM_Y_P_OR_YBASE_REGS 
Y_ADDR_OR_YBASE_REGS 
YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS 
YBASE_OR_YBASE_ELIGIBLE_REGS 
NO_HIGH_ALL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MULTIPLY_32_REG 
MULTIPLY_64_REG 
LOW_REGS 
HIGH_REGS 
REAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
MAC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ADDR_REGS 
DATA_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AREG 
DREG 
CREG 
BREG 
SIREG 
DIREG 
AD_REGS 
Q_REGS 
NON_Q_REGS 
INDEX_REGS 
LEGACY_REGS 
GENERAL_REGS 
FP_TOP_REG 
FP_SECOND_REG 
FLOAT_REGS 
SSE_REGS 
MMX_REGS 
FP_TOP_SSE_REGS 
FP_SECOND_SSE_REGS 
FLOAT_SSE_REGS 
FLOAT_INT_REGS 
INT_SSE_REGS 
FLOAT_INT_SSE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GLOBAL_REGS 
LOCAL_REGS 
LOCAL_OR_GLOBAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
PR_REGS 
BR_REGS 
AR_M_REGS 
AR_I_REGS 
ADDL_REGS 
GR_REGS 
FR_REGS 
GR_AND_BR_REGS 
GR_AND_FR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CARRY_REG 
ACCUM_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
D_REGS 
X_REGS 
Y_REGS 
SP_REGS 
DA_REGS 
DB_REGS 
Z_REGS 
D8_REGS 
Q_REGS 
D_OR_X_REGS 
D_OR_Y_REGS 
D_OR_SP_REGS 
X_OR_Y_REGS 
A_REGS 
X_OR_SP_REGS 
Y_OR_SP_REGS 
X_OR_Y_OR_D_REGS 
A_OR_D_REGS 
A_OR_SP_REGS 
H_REGS 
S_REGS 
D_OR_S_REGS 
X_OR_S_REGS 
Y_OR_S_REGS 
SP_OR_S_REGS 
D_OR_X_OR_S_REGS 
D_OR_Y_OR_S_REGS 
D_OR_SP_OR_S_REGS 
A_OR_S_REGS 
D_OR_A_OR_S_REGS 
TMP_REGS 
D_OR_A_OR_TMP_REGS 
G_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDR_REGS 
FP_REGS 
GENERAL_REGS 
DATA_OR_FP_REGS 
ADDR_OR_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AP_REG 
XRF_REGS 
GENERAL_REGS 
AGRF_REGS 
XGRF_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ONLYR1_REGS 
LRW_REGS 
GENERAL_REGS 
C_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
REMAINDER_REG 
HIMULT_REG 
SYSTEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
SP_REGS 
DATA_OR_ADDRESS_REGS 
SP_OR_ADDRESS_REGS 
EXTENDED_REGS 
DATA_OR_EXTENDED_REGS 
ADDRESS_OR_EXTENDED_REGS 
SP_OR_EXTENDED_REGS 
SP_OR_ADDRESS_OR_EXTENDED_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REG0 
LONG_FLOAT_REG0 
FLOAT_REGS 
FP_REGS 
GEN_AND_FP_REGS 
FRAME_POINTER_REG 
STACK_POINTER_REG 
GEN_AND_MEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MUL_REGS 
GENERAL_REGS 
LOAD_FPU_REGS 
NO_LOAD_FPU_REGS 
FPU_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
OUT_REGS 
STD_REGS 
ARG_REGS 
SRC_REGS 
DST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R15_REGS 
BASE_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BASE_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALTIVEC_REGS 
VRSAVE_REGS 
NON_SPECIAL_REGS 
MQ_REGS 
LINK_REGS 
CTR_REGS 
LINK_OR_CTR_REGS 
SPECIAL_REGS 
SPEC_OR_GEN_REGS 
CR0_REGS 
CR_REGS 
NON_FLOAT_REGS 
XER_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ADDR_REGS 
GENERAL_REGS 
FP_REGS 
ADDR_FP_REGS 
GENERAL_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
PR_REGS 
T_REGS 
MAC_REGS 
FPUL_REGS 
SIBCALL_REGS 
GENERAL_REGS 
FP0_REGS 
FP_REGS 
DF_REGS 
FPSCR_REGS 
GENERAL_FP_REGS 
TARGET_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPCC_REGS 
I64_REGS 
GENERAL_REGS 
FP_REGS 
EXTRA_FP_REGS 
GENERAL_OR_FP_REGS 
GENERAL_OR_EXTRA_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R1_REGS 
TWO_REGS 
R2_REGS 
EIGHT_REGS 
R8_REGS 
ICALL_REGS 
GENERAL_REGS 
CARRY_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BR_REGS 
FP_REGS 
ACC_REG 
SP_REG 
RL_REGS 
GR_REGS 
AR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R2 
R0_1 
INDEX_REGS 
BASE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LR0_REGS 
GENERAL_REGS 
BP_REGS 
FC_REGS 
CR_REGS 
Q_REGS 
SPECIAL_REGS 
ACCUM0_REGS 
ACCUM_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R24_REG 
R25_REG 
R27_REG 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LPCOUNT_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPU_REGS 
LO_REGS 
STACK_REG 
BASE_REGS 
HI_REGS 
CC_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
POINTER_X_REGS 
POINTER_Y_REGS 
POINTER_Z_REGS 
STACK_REG 
BASE_POINTER_REGS 
POINTER_REGS 
ADDW_REGS 
SIMPLE_LD_REGS 
LD_REGS 
NO_LD_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0R1_REGS 
R2R3_REGS 
EXT_LOW_REGS 
EXT_REGS 
ADDR_REGS 
INDEX_REGS 
BK_REG 
SP_REG 
RC_REG 
COUNTER_REGS 
INT_REGS 
GENERAL_REGS 
DP_REG 
ST_REG 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
S_REGS 
INDEX_REGS 
SP_REGS 
A_REGS 
SI_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
REPEAT_REGS 
CR_REGS 
ACCUM_REGS 
OTHER_FLAG_REGS 
F0_REGS 
F1_REGS 
BR_FLAG_REGS 
FLAG_REGS 
EVEN_REGS 
GPR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
A0H_REG 
A0L_REG 
A0_REG 
A1H_REG 
ACCUM_HIGH_REGS 
A1L_REG 
ACCUM_LOW_REGS 
A1_REG 
ACCUM_REGS 
X_REG 
X_OR_ACCUM_LOW_REGS 
X_OR_ACCUM_REGS 
YH_REG 
YH_OR_ACCUM_HIGH_REGS 
X_OR_YH_REGS 
YL_REG 
YL_OR_ACCUM_LOW_REGS 
X_OR_YL_REGS 
X_OR_Y_REGS 
Y_REG 
ACCUM_OR_Y_REGS 
PH_REG 
X_OR_PH_REGS 
PL_REG 
PL_OR_ACCUM_LOW_REGS 
X_OR_PL_REGS 
YL_OR_PL_OR_ACCUM_LOW_REGS 
P_REG 
ACCUM_OR_P_REGS 
YL_OR_P_REGS 
ACCUM_LOW_OR_YL_OR_P_REGS 
Y_OR_P_REGS 
ACCUM_Y_OR_P_REGS 
NO_FRAME_Y_ADDR_REGS 
Y_ADDR_REGS 
ACCUM_LOW_OR_Y_ADDR_REGS 
ACCUM_OR_Y_ADDR_REGS 
X_OR_Y_ADDR_REGS 
Y_OR_Y_ADDR_REGS 
P_OR_Y_ADDR_REGS 
NON_HIGH_YBASE_ELIGIBLE_REGS 
YBASE_ELIGIBLE_REGS 
J_REG 
J_OR_DAU_16_BIT_REGS 
BMU_REGS 
NOHIGH_NON_ADDR_REGS 
NON_ADDR_REGS 
SLOW_MEM_LOAD_REGS 
NOHIGH_NON_YBASE_REGS 
NO_ACCUM_NON_YBASE_REGS 
NON_YBASE_REGS 
YBASE_VIRT_REGS 
ACCUM_LOW_OR_YBASE_REGS 
ACCUM_OR_YBASE_REGS 
X_OR_YBASE_REGS 
Y_OR_YBASE_REGS 
ACCUM_LOW_YL_PL_OR_YBASE_REGS 
P_OR_YBASE_REGS 
ACCUM_Y_P_OR_YBASE_REGS 
Y_ADDR_OR_YBASE_REGS 
YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS 
YBASE_OR_YBASE_ELIGIBLE_REGS 
NO_HIGH_ALL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MULTIPLY_32_REG 
MULTIPLY_64_REG 
LOW_REGS 
HIGH_REGS 
REAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
MAC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ADDR_REGS 
DATA_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AREG 
DREG 
CREG 
BREG 
SIREG 
DIREG 
AD_REGS 
Q_REGS 
NON_Q_REGS 
INDEX_REGS 
LEGACY_REGS 
GENERAL_REGS 
FP_TOP_REG 
FP_SECOND_REG 
FLOAT_REGS 
SSE_REGS 
MMX_REGS 
FP_TOP_SSE_REGS 
FP_SECOND_SSE_REGS 
FLOAT_SSE_REGS 
FLOAT_INT_REGS 
INT_SSE_REGS 
FLOAT_INT_SSE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GLOBAL_REGS 
LOCAL_REGS 
LOCAL_OR_GLOBAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
PR_REGS 
BR_REGS 
AR_M_REGS 
AR_I_REGS 
ADDL_REGS 
GR_REGS 
FR_REGS 
GR_AND_BR_REGS 
GR_AND_FR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CARRY_REG 
ACCUM_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
D_REGS 
X_REGS 
Y_REGS 
SP_REGS 
DA_REGS 
DB_REGS 
Z_REGS 
D8_REGS 
Q_REGS 
D_OR_X_REGS 
D_OR_Y_REGS 
D_OR_SP_REGS 
X_OR_Y_REGS 
A_REGS 
X_OR_SP_REGS 
Y_OR_SP_REGS 
X_OR_Y_OR_D_REGS 
A_OR_D_REGS 
A_OR_SP_REGS 
H_REGS 
S_REGS 
D_OR_S_REGS 
X_OR_S_REGS 
Y_OR_S_REGS 
SP_OR_S_REGS 
D_OR_X_OR_S_REGS 
D_OR_Y_OR_S_REGS 
D_OR_SP_OR_S_REGS 
A_OR_S_REGS 
D_OR_A_OR_S_REGS 
TMP_REGS 
D_OR_A_OR_TMP_REGS 
G_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDR_REGS 
FP_REGS 
GENERAL_REGS 
DATA_OR_FP_REGS 
ADDR_OR_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AP_REG 
XRF_REGS 
GENERAL_REGS 
AGRF_REGS 
XGRF_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ONLYR1_REGS 
LRW_REGS 
GENERAL_REGS 
C_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
REMAINDER_REG 
HIMULT_REG 
SYSTEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
SP_REGS 
DATA_OR_ADDRESS_REGS 
SP_OR_ADDRESS_REGS 
EXTENDED_REGS 
DATA_OR_EXTENDED_REGS 
ADDRESS_OR_EXTENDED_REGS 
SP_OR_EXTENDED_REGS 
SP_OR_ADDRESS_OR_EXTENDED_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REG0 
LONG_FLOAT_REG0 
FLOAT_REGS 
FP_REGS 
GEN_AND_FP_REGS 
FRAME_POINTER_REG 
STACK_POINTER_REG 
GEN_AND_MEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MUL_REGS 
GENERAL_REGS 
LOAD_FPU_REGS 
NO_LOAD_FPU_REGS 
FPU_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
OUT_REGS 
STD_REGS 
ARG_REGS 
SRC_REGS 
DST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R15_REGS 
BASE_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BASE_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALTIVEC_REGS 
VRSAVE_REGS 
NON_SPECIAL_REGS 
MQ_REGS 
LINK_REGS 
CTR_REGS 
LINK_OR_CTR_REGS 
SPECIAL_REGS 
SPEC_OR_GEN_REGS 
CR0_REGS 
CR_REGS 
NON_FLOAT_REGS 
XER_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ADDR_REGS 
GENERAL_REGS 
FP_REGS 
ADDR_FP_REGS 
GENERAL_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
PR_REGS 
T_REGS 
MAC_REGS 
FPUL_REGS 
SIBCALL_REGS 
GENERAL_REGS 
FP0_REGS 
FP_REGS 
DF_REGS 
FPSCR_REGS 
GENERAL_FP_REGS 
TARGET_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPCC_REGS 
I64_REGS 
GENERAL_REGS 
FP_REGS 
EXTRA_FP_REGS 
GENERAL_OR_FP_REGS 
GENERAL_OR_EXTRA_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R1_REGS 
TWO_REGS 
R2_REGS 
EIGHT_REGS 
R8_REGS 
ICALL_REGS 
GENERAL_REGS 
CARRY_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BR_REGS 
FP_REGS 
ACC_REG 
SP_REG 
RL_REGS 
GR_REGS 
AR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
R24_REG 
R25_REG 
R27_REG 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LPCOUNT_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPA_REGS 
CIRRUS_REGS 
VFP_REGS 
IWMMXT_GR_REGS 
IWMMXT_REGS 
LO_REGS 
STACK_REG 
BASE_REGS 
HI_REGS 
CC_REG 
VFPCC_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
POINTER_X_REGS 
POINTER_Y_REGS 
POINTER_Z_REGS 
STACK_REG 
BASE_POINTER_REGS 
POINTER_REGS 
ADDW_REGS 
SIMPLE_LD_REGS 
LD_REGS 
NO_LD_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
IREGS 
BREGS 
LREGS 
MREGS 
CIRCREGS 
DAGREGS 
EVEN_AREGS 
ODD_AREGS 
AREGS 
CCREGS 
EVEN_DREGS 
ODD_DREGS 
DREGS 
PREGS_CLOBBERED 
PREGS 
DPREGS 
MOST_REGS 
PROLOGUE_REGS 
NON_A_CC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0R1_REGS 
R2R3_REGS 
EXT_LOW_REGS 
EXT_REGS 
ADDR_REGS 
INDEX_REGS 
BK_REG 
SP_REG 
RC_REG 
COUNTER_REGS 
INT_REGS 
GENERAL_REGS 
DP_REG 
ST_REG 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MULTIPLY_32_REG 
MULTIPLY_64_REG 
LOW_REGS 
HIGH_REGS 
REAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ICC_REGS 
FCC_REGS 
CC_REGS 
ICR_REGS 
FCR_REGS 
CR_REGS 
LCR_REG 
LR_REG 
GR8_REGS 
GR9_REGS 
GR89_REGS 
FDPIC_REGS 
FDPIC_FPTR_REGS 
FDPIC_CALL_REGS 
SPR_REGS 
QUAD_ACC_REGS 
EVEN_ACC_REGS 
ACC_REGS 
ACCG_REGS 
QUAD_FPR_REGS 
FEVEN_REGS 
FPR_REGS 
QUAD_REGS 
EVEN_REGS 
GPR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
COUNTER_REGS 
SOURCE_REGS 
DESTINATION_REGS 
GENERAL_REGS 
MAC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AREG 
DREG 
CREG 
BREG 
SIREG 
DIREG 
AD_REGS 
Q_REGS 
NON_Q_REGS 
INDEX_REGS 
LEGACY_REGS 
GENERAL_REGS 
FP_TOP_REG 
FP_SECOND_REG 
FLOAT_REGS 
SSE_REGS 
MMX_REGS 
FP_TOP_SSE_REGS 
FP_SECOND_SSE_REGS 
FLOAT_SSE_REGS 
FLOAT_INT_REGS 
INT_SSE_REGS 
FLOAT_INT_SSE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
PR_REGS 
BR_REGS 
AR_M_REGS 
AR_I_REGS 
ADDL_REGS 
GR_REGS 
FR_REGS 
GR_AND_BR_REGS 
GR_AND_FR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DPH_REGS 
DPL_REGS 
DP_REGS 
SP_REGS 
IPH_REGS 
IPL_REGS 
IP_REGS 
DP_SP_REGS 
PTR_REGS 
NONPTR_REGS 
NONSP_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CARRY_REG 
ACCUM_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
D_REGS 
X_REGS 
Y_REGS 
SP_REGS 
DA_REGS 
DB_REGS 
Z_REGS 
D8_REGS 
Q_REGS 
D_OR_X_REGS 
D_OR_Y_REGS 
D_OR_SP_REGS 
X_OR_Y_REGS 
A_REGS 
X_OR_SP_REGS 
Y_OR_SP_REGS 
X_OR_Y_OR_D_REGS 
A_OR_D_REGS 
A_OR_SP_REGS 
H_REGS 
S_REGS 
D_OR_S_REGS 
X_OR_S_REGS 
Y_OR_S_REGS 
Z_OR_S_REGS 
SP_OR_S_REGS 
D_OR_X_OR_S_REGS 
D_OR_Y_OR_S_REGS 
D_OR_SP_OR_S_REGS 
A_OR_S_REGS 
D_OR_A_OR_S_REGS 
TMP_REGS 
D_OR_A_OR_TMP_REGS 
G_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDR_REGS 
FP_REGS 
GENERAL_REGS 
DATA_OR_FP_REGS 
ADDR_OR_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ONLYR1_REGS 
LRW_REGS 
GENERAL_REGS 
C_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
PIC_FN_ADDR_REG 
LEA_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
REMAINDER_REG 
HIMULT_REG 
SYSTEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
SP_REGS 
DATA_OR_ADDRESS_REGS 
SP_OR_ADDRESS_REGS 
EXTENDED_REGS 
DATA_OR_EXTENDED_REGS 
ADDRESS_OR_EXTENDED_REGS 
SP_OR_EXTENDED_REGS 
SP_OR_ADDRESS_OR_EXTENDED_REGS 
FP_REGS 
FP_ACC_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REG0 
LONG_FLOAT_REG0 
FLOAT_REGS 
LONG_REGS 
FP_REGS 
GEN_AND_FP_REGS 
FRAME_POINTER_REG 
STACK_POINTER_REG 
GEN_AND_MEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MUL_REGS 
GENERAL_REGS 
LOAD_FPU_REGS 
NO_LOAD_FPU_REGS 
FPU_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BASE_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALTIVEC_REGS 
VRSAVE_REGS 
VSCR_REGS 
SPE_ACC_REGS 
SPEFSCR_REGS 
NON_SPECIAL_REGS 
MQ_REGS 
LINK_REGS 
CTR_REGS 
LINK_OR_CTR_REGS 
SPECIAL_REGS 
SPEC_OR_GEN_REGS 
CR0_REGS 
CR_REGS 
NON_FLOAT_REGS 
XER_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CC_REGS 
ADDR_REGS 
GENERAL_REGS 
ACCESS_REGS 
ADDR_CC_REGS 
GENERAL_CC_REGS 
FP_REGS 
ADDR_FP_REGS 
GENERAL_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
PR_REGS 
T_REGS 
MAC_REGS 
FPUL_REGS 
SIBCALL_REGS 
GENERAL_REGS 
FP0_REGS 
FP_REGS 
DF_HI_REGS 
DF_REGS 
FPSCR_REGS 
GENERAL_FP_REGS 
TARGET_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPCC_REGS 
I64_REGS 
GENERAL_REGS 
FP_REGS 
EXTRA_FP_REGS 
GENERAL_OR_FP_REGS 
GENERAL_OR_EXTRA_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R1_REGS 
TWO_REGS 
R2_REGS 
EIGHT_REGS 
R8_REGS 
ICALL_REGS 
GENERAL_REGS 
CARRY_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BR_REGS 
FP_REGS 
ACC_REG 
SP_REG 
RL_REGS 
GR_REGS 
AR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
R24_REG 
R25_REG 
R27_REG 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LPCOUNT_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPA_REGS 
CIRRUS_REGS 
VFP_REGS 
IWMMXT_GR_REGS 
IWMMXT_REGS 
LO_REGS 
STACK_REG 
BASE_REGS 
HI_REGS 
CC_REG 
VFPCC_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
POINTER_X_REGS 
POINTER_Y_REGS 
POINTER_Z_REGS 
STACK_REG 
BASE_POINTER_REGS 
POINTER_REGS 
ADDW_REGS 
SIMPLE_LD_REGS 
LD_REGS 
NO_LD_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
IREGS 
BREGS 
LREGS 
MREGS 
CIRCREGS 
DAGREGS 
EVEN_AREGS 
ODD_AREGS 
AREGS 
CCREGS 
EVEN_DREGS 
ODD_DREGS 
DREGS 
FDPIC_REGS 
FDPIC_FPTR_REGS 
PREGS_CLOBBERED 
PREGS 
IPREGS 
DPREGS 
MOST_REGS 
LT_REGS 
LC_REGS 
LB_REGS 
PROLOGUE_REGS 
NON_A_CC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0R1_REGS 
R2R3_REGS 
EXT_LOW_REGS 
EXT_REGS 
ADDR_REGS 
INDEX_REGS 
BK_REG 
SP_REG 
RC_REG 
COUNTER_REGS 
INT_REGS 
GENERAL_REGS 
DP_REG 
ST_REG 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MOF_REGS 
CC0_REGS 
SPECIAL_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LO_REGS 
HI_REGS 
HILO_REGS 
NOSP_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MULTIPLY_32_REG 
MULTIPLY_64_REG 
LOW_REGS 
HIGH_REGS 
REAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ICC_REGS 
FCC_REGS 
CC_REGS 
ICR_REGS 
FCR_REGS 
CR_REGS 
LCR_REG 
LR_REG 
GR8_REGS 
GR9_REGS 
GR89_REGS 
FDPIC_REGS 
FDPIC_FPTR_REGS 
FDPIC_CALL_REGS 
SPR_REGS 
QUAD_ACC_REGS 
EVEN_ACC_REGS 
ACC_REGS 
ACCG_REGS 
QUAD_FPR_REGS 
FEVEN_REGS 
FPR_REGS 
QUAD_REGS 
EVEN_REGS 
GPR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
COUNTER_REGS 
SOURCE_REGS 
DESTINATION_REGS 
GENERAL_REGS 
MAC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AREG 
DREG 
CREG 
BREG 
SIREG 
DIREG 
AD_REGS 
Q_REGS 
NON_Q_REGS 
INDEX_REGS 
LEGACY_REGS 
GENERAL_REGS 
FP_TOP_REG 
FP_SECOND_REG 
FLOAT_REGS 
SSE_REGS 
MMX_REGS 
FP_TOP_SSE_REGS 
FP_SECOND_SSE_REGS 
FLOAT_SSE_REGS 
FLOAT_INT_REGS 
INT_SSE_REGS 
FLOAT_INT_SSE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
PR_REGS 
BR_REGS 
AR_M_REGS 
AR_I_REGS 
ADDL_REGS 
GR_REGS 
FP_REGS 
FR_REGS 
GR_AND_BR_REGS 
GR_AND_FR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
SP_REGS 
FB_REGS 
SB_REGS 
CR_REGS 
R0_REGS 
R1_REGS 
R2_REGS 
R3_REGS 
R02_REGS 
HL_REGS 
QI_REGS 
R23_REGS 
R03_REGS 
DI_REGS 
A0_REGS 
A1_REGS 
A_REGS 
AD_REGS 
PS_REGS 
SI_REGS 
HI_REGS 
RA_REGS 
GENERAL_REGS 
FLG_REGS 
HC_REGS 
MEM_REGS 
R02_A_MEM_REGS 
A_HL_MEM_REGS 
R1_R3_A_MEM_REGS 
R03_MEM_REGS 
A_HI_MEM_REGS 
A_AD_CR_MEM_SI_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CARRY_REG 
ACCUM_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
D_REGS 
X_REGS 
Y_REGS 
SP_REGS 
DA_REGS 
DB_REGS 
Z_REGS 
D8_REGS 
Q_REGS 
D_OR_X_REGS 
D_OR_Y_REGS 
D_OR_SP_REGS 
X_OR_Y_REGS 
A_REGS 
X_OR_SP_REGS 
Y_OR_SP_REGS 
X_OR_Y_OR_D_REGS 
A_OR_D_REGS 
A_OR_SP_REGS 
H_REGS 
S_REGS 
D_OR_S_REGS 
X_OR_S_REGS 
Y_OR_S_REGS 
Z_OR_S_REGS 
SP_OR_S_REGS 
D_OR_X_OR_S_REGS 
D_OR_Y_OR_S_REGS 
D_OR_SP_OR_S_REGS 
A_OR_S_REGS 
D_OR_A_OR_S_REGS 
TMP_REGS 
D_OR_A_OR_TMP_REGS 
G_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDR_REGS 
FP_REGS 
GENERAL_REGS 
DATA_OR_FP_REGS 
ADDR_OR_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ONLYR1_REGS 
LRW_REGS 
GENERAL_REGS 
C_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
PIC_FN_ADDR_REG 
V1_REG 
LEA_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
DSP_ACC_REGS 
ACC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
REMAINDER_REG 
HIMULT_REG 
SYSTEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
SP_REGS 
DATA_OR_ADDRESS_REGS 
SP_OR_ADDRESS_REGS 
EXTENDED_REGS 
DATA_OR_EXTENDED_REGS 
ADDRESS_OR_EXTENDED_REGS 
SP_OR_EXTENDED_REGS 
SP_OR_ADDRESS_OR_EXTENDED_REGS 
FP_REGS 
FP_ACC_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MUL_REGS 
GENERAL_REGS 
LOAD_FPU_REGS 
NO_LOAD_FPU_REGS 
FPU_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BASE_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALTIVEC_REGS 
VRSAVE_REGS 
VSCR_REGS 
SPE_ACC_REGS 
SPEFSCR_REGS 
NON_SPECIAL_REGS 
MQ_REGS 
LINK_REGS 
CTR_REGS 
LINK_OR_CTR_REGS 
SPECIAL_REGS 
SPEC_OR_GEN_REGS 
CR0_REGS 
CR_REGS 
NON_FLOAT_REGS 
XER_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CC_REGS 
ADDR_REGS 
GENERAL_REGS 
ACCESS_REGS 
ADDR_CC_REGS 
GENERAL_CC_REGS 
FP_REGS 
ADDR_FP_REGS 
GENERAL_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
G16_REGS 
G32_REGS 
T32_REGS 
HI_REG 
LO_REG 
CE_REGS 
CN_REG 
LC_REG 
SC_REG 
SP_REGS 
CR_REGS 
CP1_REGS 
CP2_REGS 
CP3_REGS 
CPA_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
PR_REGS 
T_REGS 
MAC_REGS 
FPUL_REGS 
SIBCALL_REGS 
GENERAL_REGS 
FP0_REGS 
FP_REGS 
DF_HI_REGS 
DF_REGS 
FPSCR_REGS 
GENERAL_FP_REGS 
GENERAL_DF_REGS 
TARGET_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPCC_REGS 
I64_REGS 
GENERAL_REGS 
FP_REGS 
EXTRA_FP_REGS 
GENERAL_OR_FP_REGS 
GENERAL_OR_EXTRA_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R1_REGS 
TWO_REGS 
R2_REGS 
EIGHT_REGS 
R8_REGS 
ICALL_REGS 
GENERAL_REGS 
CARRY_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BR_REGS 
FP_REGS 
ACC_REG 
SP_REG 
RL_REGS 
GR_REGS 
AR_REGS 
ALL_REGS 
LIM_REG_CLASSES 

Definition at line 827 of file ia64.h.


Function Documentation

struct machine_function GTY ( ()   )  [read, write]

Definition at line 2369 of file ia64.h.


Variable Documentation

Definition at line 52 of file ia64.c.

Definition at line 5530 of file ia64.c.

Definition at line 96 of file ia64.c.

Definition at line 100 of file ia64.c.

const char* ia64_tls_size_string

Definition at line 103 of file ia64.c.

Definition at line 35 of file gensupport.c.


Generated on Wed Apr 8 14:55:48 2009 for Open64 by  doxygen 1.5.6