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00008 #include "config.h"
00009 #include "system.h"
00010 #include "rtl.h"
00011 #include "tm_p.h"
00012 #include "insn-config.h"
00013 #include "recog.h"
00014 #include "regs.h"
00015 #include "real.h"
00016 #include "output.h"
00017 #include "insn-attr.h"
00018 #include "toplev.h"
00019 #include "flags.h"
00020 #include "function.h"
00021
00022 #define operands recog_data.operand
00023
00024 extern int insn_current_length PARAMS ((rtx));
00025 int
00026 insn_current_length (insn)
00027 rtx insn;
00028 {
00029 switch (recog_memoized (insn))
00030 {
00031 case 520:
00032 extract_constrain_insn_cached (insn);
00033 if ((which_alternative == 0) && ((((INSN_ADDRESSES_SET_P () ? INSN_ADDRESSES (INSN_UID (GET_CODE (operands[0]) == LABEL_REF ? XEXP (operands[0], 0) : operands[0])) : 0) - (insn_current_reference_address (insn))) >= (-126)) && (((INSN_ADDRESSES_SET_P () ? INSN_ADDRESSES (INSN_UID (GET_CODE (operands[0]) == LABEL_REF ? XEXP (operands[0], 0) : operands[0])) : 0) - (insn_current_reference_address (insn))) < (128))))
00034 {
00035 return 2;
00036 }
00037 else
00038 {
00039 return 16 ;
00040 }
00041
00042 case 515:
00043 extract_insn_cached (insn);
00044 if ((((INSN_ADDRESSES_SET_P () ? INSN_ADDRESSES (INSN_UID (GET_CODE (operands[0]) == LABEL_REF ? XEXP (operands[0], 0) : operands[0])) : 0) - (insn_current_reference_address (insn))) >= (-126)) && (((INSN_ADDRESSES_SET_P () ? INSN_ADDRESSES (INSN_UID (GET_CODE (operands[0]) == LABEL_REF ? XEXP (operands[0], 0) : operands[0])) : 0) - (insn_current_reference_address (insn))) < (128)))
00045 {
00046 return 2;
00047 }
00048 else
00049 {
00050 return 5;
00051 }
00052
00053 case 504:
00054 extract_insn_cached (insn);
00055 if ((((INSN_ADDRESSES_SET_P () ? INSN_ADDRESSES (INSN_UID (GET_CODE (operands[0]) == LABEL_REF ? XEXP (operands[0], 0) : operands[0])) : 0) - (insn_current_reference_address (insn))) >= (-126)) && (((INSN_ADDRESSES_SET_P () ? INSN_ADDRESSES (INSN_UID (GET_CODE (operands[0]) == LABEL_REF ? XEXP (operands[0], 0) : operands[0])) : 0) - (insn_current_reference_address (insn))) < (128)))
00056 {
00057 return 2;
00058 }
00059 else
00060 {
00061 return 6;
00062 }
00063
00064 case 503:
00065 extract_insn_cached (insn);
00066 if ((((INSN_ADDRESSES_SET_P () ? INSN_ADDRESSES (INSN_UID (GET_CODE (operands[0]) == LABEL_REF ? XEXP (operands[0], 0) : operands[0])) : 0) - (insn_current_reference_address (insn))) >= (-126)) && (((INSN_ADDRESSES_SET_P () ? INSN_ADDRESSES (INSN_UID (GET_CODE (operands[0]) == LABEL_REF ? XEXP (operands[0], 0) : operands[0])) : 0) - (insn_current_reference_address (insn))) < (128)))
00067 {
00068 return 2;
00069 }
00070 else
00071 {
00072 return 6;
00073 }
00074
00075 case -1:
00076 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
00077 && asm_noperands (PATTERN (insn)) < 0)
00078 fatal_insn_not_found (insn);
00079 default:
00080 return 0;
00081
00082 }
00083 }
00084
00085 extern int insn_variable_length_p PARAMS ((rtx));
00086 int
00087 insn_variable_length_p (insn)
00088 rtx insn;
00089 {
00090 switch (recog_memoized (insn))
00091 {
00092 case 520:
00093 case 515:
00094 case 504:
00095 case 503:
00096 return 1;
00097
00098 case -1:
00099 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
00100 && asm_noperands (PATTERN (insn)) < 0)
00101 fatal_insn_not_found (insn);
00102 default:
00103 return 0;
00104
00105 }
00106 }
00107
00108 extern int insn_default_length PARAMS ((rtx));
00109 int
00110 insn_default_length (insn)
00111 rtx insn;
00112 {
00113 switch (recog_memoized (insn))
00114 {
00115 case 642:
00116 extract_constrain_insn_cached (insn);
00117 if ((which_alternative == 2) || (which_alternative == 3))
00118 {
00119 return 16 ;
00120 }
00121 else
00122 {
00123 return 2 + get_attr_prefix_data16 (insn) + get_attr_length_address (insn);
00124 }
00125
00126 case 581:
00127 case 580:
00128 case 579:
00129 case 578:
00130 case 577:
00131 case 576:
00132 case 575:
00133 case 574:
00134 case 573:
00135 case 572:
00136 case 571:
00137 case 570:
00138 case 569:
00139 case 568:
00140 case 567:
00141 case 566:
00142 case 565:
00143 case 564:
00144 case 562:
00145 case 561:
00146 case 560:
00147 case 559:
00148 case 557:
00149 case 556:
00150 if (get_attr_unit (insn) == UNIT_I387)
00151 {
00152 return 2 + get_attr_prefix_data16 (insn) + get_attr_length_address (insn);
00153 }
00154 else
00155 {
00156 return get_attr_modrm (insn) + get_attr_prefix_0f (insn) + 1 + get_attr_prefix_rep (insn) + get_attr_prefix_data16 (insn) + get_attr_length_immediate (insn) + get_attr_length_address (insn);
00157 }
00158
00159 case 585:
00160 case 582:
00161 case 552:
00162 case 549:
00163 extract_constrain_insn_cached (insn);
00164 if (which_alternative == 0)
00165 {
00166 return 2 + get_attr_prefix_data16 (insn) + get_attr_length_address (insn);
00167 }
00168 else
00169 {
00170 return get_attr_modrm (insn) + get_attr_prefix_0f (insn) + 1 + get_attr_prefix_rep (insn) + get_attr_prefix_data16 (insn) + get_attr_length_immediate (insn) + get_attr_length_address (insn);
00171 }
00172
00173 case 496:
00174 case 495:
00175 case 493:
00176 case 484:
00177 case 483:
00178 case 481:
00179 case 470:
00180 case 469:
00181 case 465:
00182 case 449:
00183 case 446:
00184 case 445:
00185 case 443:
00186 case 441:
00187 extract_insn_cached (insn);
00188 if (register_operand (operands[0], VOIDmode))
00189 {
00190 return 2;
00191 }
00192 else
00193 {
00194 return get_attr_modrm (insn) + get_attr_prefix_0f (insn) + 1 + get_attr_prefix_rep (insn) + get_attr_prefix_data16 (insn) + get_attr_length_immediate (insn) + get_attr_length_address (insn);
00195 }
00196
00197 case 490:
00198 case 489:
00199 case 477:
00200 case 473:
00201 case 467:
00202 case 461:
00203 case 457:
00204 case 437:
00205 case 433:
00206 extract_insn_cached (insn);
00207 if (register_operand (operands[0], SImode))
00208 {
00209 return 2;
00210 }
00211 else
00212 {
00213 return get_attr_modrm (insn) + get_attr_prefix_0f (insn) + 1 + get_attr_prefix_rep (insn) + get_attr_prefix_data16 (insn) + get_attr_length_immediate (insn) + get_attr_length_address (insn);
00214 }
00215
00216 case 487:
00217 case 475:
00218 case 453:
00219 case 451:
00220 case 426:
00221 case 424:
00222 extract_insn_cached (insn);
00223 if (register_operand (operands[0], DImode))
00224 {
00225 return 2;
00226 }
00227 else
00228 {
00229 return get_attr_modrm (insn) + get_attr_prefix_0f (insn) + 1 + get_attr_prefix_rep (insn) + get_attr_prefix_data16 (insn) + get_attr_length_immediate (insn) + get_attr_length_address (insn);
00230 }
00231
00232 case 171:
00233 case 168:
00234 case 165:
00235 case 162:
00236 extract_constrain_insn_cached (insn);
00237 if (which_alternative == 1)
00238 {
00239 return 16 ;
00240 }
00241 else if (which_alternative == 0)
00242 {
00243 return 2 + get_attr_prefix_data16 (insn) + get_attr_length_address (insn);
00244 }
00245 else
00246 {
00247 return get_attr_modrm (insn) + get_attr_prefix_0f (insn) + 1 + get_attr_prefix_rep (insn) + get_attr_prefix_data16 (insn) + get_attr_length_immediate (insn) + get_attr_length_address (insn);
00248 }
00249
00250 case 135:
00251 extract_constrain_insn_cached (insn);
00252 if (which_alternative != 0)
00253 {
00254 return 2 + get_attr_prefix_data16 (insn) + get_attr_length_address (insn);
00255 }
00256 else
00257 {
00258 return get_attr_modrm (insn) + get_attr_prefix_0f (insn) + 1 + get_attr_prefix_rep (insn) + get_attr_prefix_data16 (insn) + get_attr_length_immediate (insn) + get_attr_length_address (insn);
00259 }
00260
00261 case 134:
00262 extract_constrain_insn_cached (insn);
00263 if ((which_alternative == 1) || ((which_alternative == 2) || (which_alternative == 3)))
00264 {
00265 return 16 ;
00266 }
00267 else if (which_alternative == 0)
00268 {
00269 return 2 + get_attr_prefix_data16 (insn) + get_attr_length_address (insn);
00270 }
00271 else
00272 {
00273 return get_attr_modrm (insn) + get_attr_prefix_0f (insn) + 1 + get_attr_prefix_rep (insn) + get_attr_prefix_data16 (insn) + get_attr_length_immediate (insn) + get_attr_length_address (insn);
00274 }
00275
00276 case 178:
00277 case 177:
00278 case 176:
00279 case 175:
00280 case 174:
00281 case 173:
00282 case 170:
00283 case 167:
00284 case 164:
00285 case 161:
00286 case 144:
00287 case 142:
00288 case 140:
00289 case 138:
00290 case 133:
00291 extract_constrain_insn_cached (insn);
00292 if (which_alternative != 0)
00293 {
00294 return 16 ;
00295 }
00296 else
00297 {
00298 return 2 + get_attr_prefix_data16 (insn) + get_attr_length_address (insn);
00299 }
00300
00301 case 643:
00302 case 641:
00303 case 127:
00304 extract_constrain_insn_cached (insn);
00305 if ((which_alternative == 0) || (which_alternative == 1))
00306 {
00307 return 2 + get_attr_prefix_data16 (insn) + get_attr_length_address (insn);
00308 }
00309 else
00310 {
00311 return get_attr_modrm (insn) + get_attr_prefix_0f (insn) + 1 + get_attr_prefix_rep (insn) + get_attr_prefix_data16 (insn) + get_attr_length_immediate (insn) + get_attr_length_address (insn);
00312 }
00313
00314 case 103:
00315 case 102:
00316 case 101:
00317 case 100:
00318 extract_constrain_insn_cached (insn);
00319 if ((which_alternative == 3) || (which_alternative == 4))
00320 {
00321 return 16 ;
00322 }
00323 else
00324 {
00325 return 2 + get_attr_prefix_data16 (insn) + get_attr_length_address (insn);
00326 }
00327
00328 case 94:
00329 case 93:
00330 extract_constrain_insn_cached (insn);
00331 if (((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 3) || (which_alternative == 4)))
00332 {
00333 return 16 ;
00334 }
00335 else if ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))
00336 {
00337 return 2 + get_attr_prefix_data16 (insn) + get_attr_length_address (insn);
00338 }
00339 else
00340 {
00341 return get_attr_modrm (insn) + get_attr_prefix_0f (insn) + 1 + get_attr_prefix_rep (insn) + get_attr_prefix_data16 (insn) + get_attr_length_immediate (insn) + get_attr_length_address (insn);
00342 }
00343
00344 case 645:
00345 case 644:
00346 case 604:
00347 case 603:
00348 case 602:
00349 case 601:
00350 case 600:
00351 case 599:
00352 case 598:
00353 case 597:
00354 case 596:
00355 case 595:
00356 case 594:
00357 case 593:
00358 case 592:
00359 case 591:
00360 case 590:
00361 case 589:
00362 case 588:
00363 case 587:
00364 case 584:
00365 case 555:
00366 case 554:
00367 case 551:
00368 case 548:
00369 case 397:
00370 case 396:
00371 case 395:
00372 case 394:
00373 case 393:
00374 case 392:
00375 case 391:
00376 case 390:
00377 case 389:
00378 case 378:
00379 case 377:
00380 case 376:
00381 case 375:
00382 case 374:
00383 case 373:
00384 case 372:
00385 case 371:
00386 case 370:
00387 case 145:
00388 case 143:
00389 case 141:
00390 case 139:
00391 case 136:
00392 case 132:
00393 case 131:
00394 case 130:
00395 case 129:
00396 case 105:
00397 case 104:
00398 case 95:
00399 case 90:
00400 return 2 + get_attr_prefix_data16 (insn) + get_attr_length_address (insn);
00401
00402 case 89:
00403 extract_constrain_insn_cached (insn);
00404 if ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))
00405 {
00406 return 2 + get_attr_prefix_data16 (insn) + get_attr_length_address (insn);
00407 }
00408 else
00409 {
00410 return get_attr_modrm (insn) + get_attr_prefix_0f (insn) + 1 + get_attr_prefix_rep (insn) + get_attr_prefix_data16 (insn) + get_attr_length_immediate (insn) + get_attr_length_address (insn);
00411 }
00412
00413 case 88:
00414 case 87:
00415 extract_constrain_insn_cached (insn);
00416 if (which_alternative != 1)
00417 {
00418 return 16 ;
00419 }
00420 else
00421 {
00422 return get_attr_modrm (insn) + get_attr_prefix_0f (insn) + 1 + get_attr_prefix_rep (insn) + get_attr_prefix_data16 (insn) + get_attr_length_immediate (insn) + get_attr_length_address (insn);
00423 }
00424
00425 case 83:
00426 extract_constrain_insn_cached (insn);
00427 if (which_alternative == 4)
00428 {
00429 return 16 ;
00430 }
00431 else
00432 {
00433 return get_attr_modrm (insn) + get_attr_prefix_0f (insn) + 1 + get_attr_prefix_rep (insn) + get_attr_prefix_data16 (insn) + get_attr_length_immediate (insn) + get_attr_length_address (insn);
00434 }
00435
00436 case 714:
00437 case 82:
00438 extract_constrain_insn_cached (insn);
00439 if ((which_alternative == 0) || (which_alternative == 1))
00440 {
00441 return 16 ;
00442 }
00443 else
00444 {
00445 return get_attr_modrm (insn) + get_attr_prefix_0f (insn) + 1 + get_attr_prefix_rep (insn) + get_attr_prefix_data16 (insn) + get_attr_length_immediate (insn) + get_attr_length_address (insn);
00446 }
00447
00448 case 76:
00449 extract_constrain_insn_cached (insn);
00450 if (which_alternative != 0)
00451 {
00452 return 16 ;
00453 }
00454 else
00455 {
00456 return get_attr_modrm (insn) + get_attr_prefix_0f (insn) + 1 + get_attr_prefix_rep (insn) + get_attr_prefix_data16 (insn) + get_attr_length_immediate (insn) + get_attr_length_address (insn);
00457 }
00458
00459 case 35:
00460 case 32:
00461 extract_constrain_insn_cached (insn);
00462 if (which_alternative == 0)
00463 {
00464 return 4;
00465 }
00466 else
00467 {
00468 return get_attr_modrm (insn) + get_attr_prefix_0f (insn) + 1 + get_attr_prefix_rep (insn) + get_attr_prefix_data16 (insn) + get_attr_length_immediate (insn) + get_attr_length_address (insn);
00469 }
00470
00471 case 34:
00472 case 31:
00473 case 27:
00474 case 24:
00475 case 23:
00476 case 21:
00477 case 20:
00478 case 19:
00479 return 4;
00480
00481 case -1:
00482 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
00483 && asm_noperands (PATTERN (insn)) < 0)
00484 fatal_insn_not_found (insn);
00485 return 128 ;
00486
00487 case 1024:
00488 case 1023:
00489 case 528:
00490 return 3;
00491
00492 case 854:
00493 return 135 ;
00494
00495 case 547:
00496 case 546:
00497 case 545:
00498 return 7;
00499
00500 case 544:
00501 extract_constrain_insn_cached (insn);
00502 if (which_alternative == 0)
00503 {
00504 return 6;
00505 }
00506 else
00507 {
00508 return 7;
00509 }
00510
00511 case 542:
00512 case 537:
00513 case 531:
00514 return 12 ;
00515
00516 case 541:
00517 return 13 ;
00518
00519 case 540:
00520 return 11 ;
00521
00522 case 538:
00523 return 14 ;
00524
00525 case 535:
00526 case 534:
00527 case 530:
00528 case 527:
00529 case 30:
00530 return 1;
00531
00532 case 526:
00533 return 0;
00534
00535 case 708:
00536 case 707:
00537 case 706:
00538 case 705:
00539 case 704:
00540 case 703:
00541 case 702:
00542 case 701:
00543 case 700:
00544 case 699:
00545 case 698:
00546 case 697:
00547 case 696:
00548 case 695:
00549 case 694:
00550 case 693:
00551 case 692:
00552 case 681:
00553 case 680:
00554 case 671:
00555 case 670:
00556 case 669:
00557 case 668:
00558 case 667:
00559 case 666:
00560 case 665:
00561 case 664:
00562 case 663:
00563 case 662:
00564 case 661:
00565 case 660:
00566 case 656:
00567 case 655:
00568 case 653:
00569 case 652:
00570 case 650:
00571 case 649:
00572 case 647:
00573 case 646:
00574 case 543:
00575 case 536:
00576 case 533:
00577 case 532:
00578 case 514:
00579 case 513:
00580 case 512:
00581 case 511:
00582 case 510:
00583 case 509:
00584 case 508:
00585 case 507:
00586 case 506:
00587 case 505:
00588 case 456:
00589 case 455:
00590 case 429:
00591 case 428:
00592 case 411:
00593 case 410:
00594 case 388:
00595 case 387:
00596 case 386:
00597 case 385:
00598 case 384:
00599 case 383:
00600 case 382:
00601 case 381:
00602 case 380:
00603 case 379:
00604 case 369:
00605 case 368:
00606 case 367:
00607 case 366:
00608 case 365:
00609 case 364:
00610 case 363:
00611 case 362:
00612 case 361:
00613 case 360:
00614 case 349:
00615 case 285:
00616 case 284:
00617 case 273:
00618 case 271:
00619 case 270:
00620 case 268:
00621 case 267:
00622 case 265:
00623 case 264:
00624 case 225:
00625 case 179:
00626 case 158:
00627 case 157:
00628 case 156:
00629 case 153:
00630 case 152:
00631 case 151:
00632 case 148:
00633 case 147:
00634 case 146:
00635 case 118:
00636 case 114:
00637 case 99:
00638 case 98:
00639 case 97:
00640 case 96:
00641 case 92:
00642 case 91:
00643 case 75:
00644 case 28:
00645 case 26:
00646 case 25:
00647 case 22:
00648 case 18:
00649 case 539:
00650 case 520:
00651 return 16 ;
00652
00653 case 673:
00654 case 672:
00655 case 515:
00656 return 5;
00657
00658 case 504:
00659 case 503:
00660 return 6;
00661
00662 case 478:
00663 case 462:
00664 case 458:
00665 case 438:
00666 case 434:
00667 case 160:
00668 case 159:
00669 case 29:
00670 return 2;
00671
00672 default:
00673 return get_attr_modrm (insn) + get_attr_prefix_0f (insn) + 1 + get_attr_prefix_rep (insn) + get_attr_prefix_data16 (insn) + get_attr_length_immediate (insn) + get_attr_length_address (insn);
00674
00675 }
00676 }
00677
00678 extern int bypass_p PARAMS ((rtx));
00679 int
00680 bypass_p (insn)
00681 rtx insn;
00682 {
00683 switch (recog_memoized (insn))
00684 {
00685 case 88:
00686 case 87:
00687 extract_constrain_insn_cached (insn);
00688 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && (! (memory_operand (operands[1], VOIDmode)))))
00689 {
00690 return 1;
00691 }
00692 else
00693 {
00694 return 0;
00695 }
00696
00697 case 76:
00698 extract_constrain_insn_cached (insn);
00699 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 0) && (! (memory_operand (operands[1], VOIDmode)))))
00700 {
00701 return 1;
00702 }
00703 else
00704 {
00705 return 0;
00706 }
00707
00708 case 79:
00709 case 78:
00710 case 41:
00711 case 40:
00712 if (((ix86_cpu) == (CPU_PENTIUM)))
00713 {
00714 return 1;
00715 }
00716 else
00717 {
00718 return 0;
00719 }
00720
00721 case 77:
00722 case 58:
00723 case 57:
00724 case 49:
00725 case 48:
00726 case 39:
00727 case 38:
00728 case 37:
00729 extract_insn_cached (insn);
00730 if ((((ix86_cpu) == (CPU_PENTIUM))) && (! (memory_operand (operands[1], VOIDmode))))
00731 {
00732 return 1;
00733 }
00734 else
00735 {
00736 return 0;
00737 }
00738
00739 case -1:
00740 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
00741 && asm_noperands (PATTERN (insn)) < 0)
00742 fatal_insn_not_found (insn);
00743 default:
00744 return 0;
00745
00746 }
00747 }
00748
00749 extern int insn_default_latency PARAMS ((rtx));
00750 int
00751 insn_default_latency (insn)
00752 rtx insn;
00753 {
00754 switch (recog_memoized (insn))
00755 {
00756 case 679:
00757 case 678:
00758 case 677:
00759 case 676:
00760 case 675:
00761 case 674:
00762 extract_insn_cached (insn);
00763 if (((ix86_cpu) == (CPU_PENTIUM)))
00764 {
00765 return 10 ;
00766 }
00767 else
00768 {
00769 return 0;
00770 }
00771
00772 case 659:
00773 extract_constrain_insn_cached (insn);
00774 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && (const0_operand (operands[2], DImode))))
00775 {
00776 return 1;
00777 }
00778 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_BOTH)) || ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_BOTH))))
00779 {
00780 return 3;
00781 }
00782 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD)) || ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_LOAD))))
00783 {
00784 return 2;
00785 }
00786 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE)) || ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_NONE))))
00787 {
00788 return 1;
00789 }
00790 else
00791 {
00792 return 0;
00793 }
00794
00795 case 658:
00796 extract_constrain_insn_cached (insn);
00797 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && (const0_operand (operands[2], SImode))))
00798 {
00799 return 1;
00800 }
00801 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_BOTH)) || ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_BOTH))))
00802 {
00803 return 3;
00804 }
00805 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD)) || ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_LOAD))))
00806 {
00807 return 2;
00808 }
00809 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE)) || ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_NONE))))
00810 {
00811 return 1;
00812 }
00813 else
00814 {
00815 return 0;
00816 }
00817
00818 case 642:
00819 extract_constrain_insn_cached (insn);
00820 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 2) && (which_alternative != 3)) && ((which_alternative == 0) || (which_alternative == 1))))
00821 {
00822 return 1;
00823 }
00824 else
00825 {
00826 return 0;
00827 }
00828
00829 case 635:
00830 case 634:
00831 case 633:
00832 case 632:
00833 case 631:
00834 case 630:
00835 case 629:
00836 case 628:
00837 case 627:
00838 case 626:
00839 case 625:
00840 case 624:
00841 case 623:
00842 case 622:
00843 case 621:
00844 case 620:
00845 case 619:
00846 case 618:
00847 if (((ix86_cpu) == (CPU_PENTIUM)))
00848 {
00849 return 12 ;
00850 }
00851 else
00852 {
00853 return 0;
00854 }
00855
00856 case 617:
00857 case 616:
00858 case 615:
00859 case 614:
00860 case 613:
00861 case 612:
00862 case 611:
00863 case 610:
00864 case 609:
00865 case 608:
00866 case 607:
00867 case 606:
00868 if (((ix86_cpu) == (CPU_PENTIUM)))
00869 {
00870 return 12 ;
00871 }
00872 else
00873 {
00874 return 0;
00875 }
00876
00877 case 605:
00878 if (((ix86_cpu) == (CPU_PENTIUM)))
00879 {
00880 return 2;
00881 }
00882 else
00883 {
00884 return 0;
00885 }
00886
00887 case 604:
00888 case 603:
00889 case 602:
00890 case 601:
00891 case 600:
00892 case 599:
00893 case 598:
00894 case 597:
00895 case 596:
00896 case 595:
00897 case 594:
00898 case 593:
00899 case 592:
00900 case 591:
00901 case 590:
00902 case 589:
00903 case 588:
00904 case 587:
00905 case 584:
00906 if (((ix86_cpu) == (CPU_PENTIUM)))
00907 {
00908 return 70 ;
00909 }
00910 else
00911 {
00912 return 0;
00913 }
00914
00915 case 585:
00916 case 582:
00917 extract_constrain_insn_cached (insn);
00918 if ((((ix86_cpu) == (CPU_PENTIUM))) && (which_alternative == 0))
00919 {
00920 return 70 ;
00921 }
00922 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
00923 {
00924 return 3;
00925 }
00926 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
00927 {
00928 return 2;
00929 }
00930 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
00931 {
00932 return 1;
00933 }
00934 else
00935 {
00936 return 0;
00937 }
00938
00939 case 581:
00940 case 579:
00941 case 577:
00942 case 575:
00943 case 573:
00944 case 571:
00945 case 569:
00946 extract_insn_cached (insn);
00947 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_type (insn) == TYPE_FOP) || (mult_operator (operands[3], TFmode))))
00948 {
00949 return 3;
00950 }
00951 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_FDIV))
00952 {
00953 return 39 ;
00954 }
00955 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
00956 {
00957 return 3;
00958 }
00959 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
00960 {
00961 return 2;
00962 }
00963 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
00964 {
00965 return 1;
00966 }
00967 else
00968 {
00969 return 0;
00970 }
00971
00972 case 580:
00973 case 578:
00974 case 576:
00975 case 574:
00976 case 572:
00977 case 570:
00978 case 568:
00979 extract_insn_cached (insn);
00980 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_type (insn) == TYPE_FOP) || (mult_operator (operands[3], XFmode))))
00981 {
00982 return 3;
00983 }
00984 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_FDIV))
00985 {
00986 return 39 ;
00987 }
00988 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
00989 {
00990 return 3;
00991 }
00992 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
00993 {
00994 return 2;
00995 }
00996 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
00997 {
00998 return 1;
00999 }
01000 else
01001 {
01002 return 0;
01003 }
01004
01005 case 562:
01006 extract_constrain_insn_cached (insn);
01007 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_type (insn) == TYPE_FOP) || ((which_alternative != 2) && (mult_operator (operands[3], DFmode)))))
01008 {
01009 return 3;
01010 }
01011 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_FDIV))
01012 {
01013 return 39 ;
01014 }
01015 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
01016 {
01017 return 3;
01018 }
01019 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
01020 {
01021 return 2;
01022 }
01023 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
01024 {
01025 return 1;
01026 }
01027 else
01028 {
01029 return 0;
01030 }
01031
01032 case 567:
01033 case 566:
01034 case 565:
01035 case 564:
01036 case 561:
01037 extract_insn_cached (insn);
01038 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_type (insn) == TYPE_FOP) || (mult_operator (operands[3], DFmode))))
01039 {
01040 return 3;
01041 }
01042 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_FDIV))
01043 {
01044 return 39 ;
01045 }
01046 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
01047 {
01048 return 3;
01049 }
01050 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
01051 {
01052 return 2;
01053 }
01054 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
01055 {
01056 return 1;
01057 }
01058 else
01059 {
01060 return 0;
01061 }
01062
01063 case 557:
01064 extract_constrain_insn_cached (insn);
01065 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_type (insn) == TYPE_FOP) || ((which_alternative != 2) && (mult_operator (operands[3], SFmode)))))
01066 {
01067 return 3;
01068 }
01069 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_FDIV))
01070 {
01071 return 39 ;
01072 }
01073 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
01074 {
01075 return 3;
01076 }
01077 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
01078 {
01079 return 2;
01080 }
01081 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
01082 {
01083 return 1;
01084 }
01085 else
01086 {
01087 return 0;
01088 }
01089
01090 case 560:
01091 case 559:
01092 case 556:
01093 extract_insn_cached (insn);
01094 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_type (insn) == TYPE_FOP) || (mult_operator (operands[3], SFmode))))
01095 {
01096 return 3;
01097 }
01098 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_FDIV))
01099 {
01100 return 39 ;
01101 }
01102 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
01103 {
01104 return 3;
01105 }
01106 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
01107 {
01108 return 2;
01109 }
01110 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
01111 {
01112 return 1;
01113 }
01114 else
01115 {
01116 return 0;
01117 }
01118
01119 case 552:
01120 case 549:
01121 extract_constrain_insn_cached (insn);
01122 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative != 1) || (get_attr_memory (insn) == MEMORY_BOTH)))
01123 {
01124 return 3;
01125 }
01126 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
01127 {
01128 return 2;
01129 }
01130 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
01131 {
01132 return 1;
01133 }
01134 else
01135 {
01136 return 0;
01137 }
01138
01139 case 555:
01140 case 554:
01141 case 551:
01142 case 548:
01143 if (((ix86_cpu) == (CPU_PENTIUM)))
01144 {
01145 return 3;
01146 }
01147 else
01148 {
01149 return 0;
01150 }
01151
01152 case 851:
01153 case 547:
01154 case 546:
01155 if (((ix86_cpu) == (CPU_PENTIUM)))
01156 {
01157 return 2;
01158 }
01159 else
01160 {
01161 return 0;
01162 }
01163
01164 case 525:
01165 case 524:
01166 case 523:
01167 case 522:
01168 case 521:
01169 extract_insn_cached (insn);
01170 if (((ix86_cpu) == (CPU_PENTIUM)))
01171 {
01172 return 10 ;
01173 }
01174 else
01175 {
01176 return 0;
01177 }
01178
01179 case 529:
01180 case 520:
01181 case 519:
01182 case 518:
01183 case 517:
01184 case 516:
01185 case 515:
01186 case 504:
01187 case 503:
01188 extract_insn_cached (insn);
01189 if (((ix86_cpu) == (CPU_PENTIUM)))
01190 {
01191 return 1;
01192 }
01193 else
01194 {
01195 return 0;
01196 }
01197
01198 case 500:
01199 case 499:
01200 extract_insn_cached (insn);
01201 if ((((ix86_cpu) == (CPU_PENTIUM))) && (memory_operand (operands[0], VOIDmode)))
01202 {
01203 return 3;
01204 }
01205 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (! (memory_operand (operands[0], VOIDmode))))
01206 {
01207 return 2;
01208 }
01209 else
01210 {
01211 return 0;
01212 }
01213
01214 case 498:
01215 case 496:
01216 case 485:
01217 case 483:
01218 extract_insn_cached (insn);
01219 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_1_operand (operands[1], VOIDmode))) && (get_attr_memory (insn) == MEMORY_BOTH)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_1_operand (operands[1], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_BOTH))))
01220 {
01221 return 3;
01222 }
01223 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_1_operand (operands[1], VOIDmode))) && (get_attr_memory (insn) == MEMORY_LOAD)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_1_operand (operands[1], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_LOAD))))
01224 {
01225 return 2;
01226 }
01227 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_1_operand (operands[1], VOIDmode))) && (get_attr_memory (insn) == MEMORY_NONE)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_1_operand (operands[1], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_NONE))))
01228 {
01229 return 1;
01230 }
01231 else
01232 {
01233 return 0;
01234 }
01235
01236 case 497:
01237 case 495:
01238 case 494:
01239 case 493:
01240 case 492:
01241 case 491:
01242 case 490:
01243 case 489:
01244 case 488:
01245 case 487:
01246 case 486:
01247 case 484:
01248 case 482:
01249 case 481:
01250 case 480:
01251 case 479:
01252 case 478:
01253 case 477:
01254 case 476:
01255 case 475:
01256 extract_insn_cached (insn);
01257 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_1_operand (operands[2], VOIDmode))) && (get_attr_memory (insn) == MEMORY_BOTH)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_1_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_BOTH))))
01258 {
01259 return 3;
01260 }
01261 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_1_operand (operands[2], VOIDmode))) && (get_attr_memory (insn) == MEMORY_LOAD)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_1_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_LOAD))))
01262 {
01263 return 2;
01264 }
01265 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_1_operand (operands[2], VOIDmode))) && (get_attr_memory (insn) == MEMORY_NONE)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_1_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_NONE))))
01266 {
01267 return 1;
01268 }
01269 else
01270 {
01271 return 0;
01272 }
01273
01274 case 472:
01275 case 470:
01276 case 448:
01277 case 446:
01278 extract_insn_cached (insn);
01279 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_operand (operands[1], VOIDmode))) && (get_attr_memory (insn) == MEMORY_BOTH)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_operand (operands[1], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_BOTH))))
01280 {
01281 return 3;
01282 }
01283 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_operand (operands[1], VOIDmode))) && (get_attr_memory (insn) == MEMORY_LOAD)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_operand (operands[1], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_LOAD))))
01284 {
01285 return 2;
01286 }
01287 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_operand (operands[1], VOIDmode))) && (get_attr_memory (insn) == MEMORY_NONE)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_operand (operands[1], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_NONE))))
01288 {
01289 return 1;
01290 }
01291 else
01292 {
01293 return 0;
01294 }
01295
01296 case 474:
01297 case 473:
01298 case 471:
01299 case 469:
01300 case 468:
01301 case 467:
01302 case 466:
01303 case 465:
01304 case 464:
01305 case 463:
01306 case 462:
01307 case 461:
01308 case 460:
01309 case 459:
01310 case 458:
01311 case 457:
01312 case 454:
01313 case 453:
01314 case 452:
01315 case 451:
01316 case 450:
01317 case 449:
01318 case 447:
01319 case 445:
01320 case 444:
01321 case 443:
01322 case 442:
01323 case 441:
01324 case 440:
01325 case 439:
01326 case 438:
01327 case 437:
01328 case 436:
01329 case 435:
01330 case 434:
01331 case 433:
01332 case 427:
01333 case 426:
01334 case 425:
01335 case 424:
01336 extract_insn_cached (insn);
01337 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_operand (operands[2], VOIDmode))) && (get_attr_memory (insn) == MEMORY_BOTH)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_BOTH))))
01338 {
01339 return 3;
01340 }
01341 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_operand (operands[2], VOIDmode))) && (get_attr_memory (insn) == MEMORY_LOAD)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_LOAD))))
01342 {
01343 return 2;
01344 }
01345 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_operand (operands[2], VOIDmode))) && (get_attr_memory (insn) == MEMORY_NONE)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_NONE))))
01346 {
01347 return 1;
01348 }
01349 else
01350 {
01351 return 0;
01352 }
01353
01354 case 432:
01355 case 431:
01356 case 423:
01357 extract_constrain_insn_cached (insn);
01358 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 1) && (const_int_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_BOTH)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 1) || (! (const_int_operand (operands[2], VOIDmode))))) && (get_attr_memory (insn) == MEMORY_BOTH))))
01359 {
01360 return 3;
01361 }
01362 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 1) && (const_int_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_LOAD)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 1) || (! (const_int_operand (operands[2], VOIDmode))))) && (get_attr_memory (insn) == MEMORY_LOAD))))
01363 {
01364 return 2;
01365 }
01366 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 1) && (const_int_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_NONE)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 1) || (! (const_int_operand (operands[2], VOIDmode))))) && (get_attr_memory (insn) == MEMORY_NONE))))
01367 {
01368 return 1;
01369 }
01370 else
01371 {
01372 return 0;
01373 }
01374
01375 case 420:
01376 extract_constrain_insn_cached (insn);
01377 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((get_attr_type (insn) == TYPE_ALU) || (which_alternative == 2))) && (get_attr_memory (insn) == MEMORY_BOTH)) || ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_BOTH))) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH))))
01378 {
01379 return 3;
01380 }
01381 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((get_attr_type (insn) == TYPE_ALU) || (which_alternative == 2))) && (get_attr_memory (insn) == MEMORY_LOAD)) || ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_LOAD))) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD))))
01382 {
01383 return 2;
01384 }
01385 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((get_attr_type (insn) == TYPE_ALU) || (which_alternative == 2))) && (get_attr_memory (insn) == MEMORY_NONE)) || ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_NONE))) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE))))
01386 {
01387 return 1;
01388 }
01389 else
01390 {
01391 return 0;
01392 }
01393
01394 case 419:
01395 case 418:
01396 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_BOTH)) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH))))
01397 {
01398 return 3;
01399 }
01400 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_LOAD)) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD))))
01401 {
01402 return 2;
01403 }
01404 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_NONE)) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE))))
01405 {
01406 return 1;
01407 }
01408 else
01409 {
01410 return 0;
01411 }
01412
01413 case 417:
01414 extract_constrain_insn_cached (insn);
01415 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_BOTH))) || ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_BOTH))) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH))))
01416 {
01417 return 3;
01418 }
01419 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD))) || ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_LOAD))) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD))))
01420 {
01421 return 2;
01422 }
01423 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE))) || ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_NONE))) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE))))
01424 {
01425 return 1;
01426 }
01427 else
01428 {
01429 return 0;
01430 }
01431
01432 case 416:
01433 extract_constrain_insn_cached (insn);
01434 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_BOTH)) || ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_BOTH))) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH))))
01435 {
01436 return 3;
01437 }
01438 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_LOAD)) || ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_LOAD))) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD))))
01439 {
01440 return 2;
01441 }
01442 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_NONE)) || ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_NONE))) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE))))
01443 {
01444 return 1;
01445 }
01446 else
01447 {
01448 return 0;
01449 }
01450
01451 case 414:
01452 extract_constrain_insn_cached (insn);
01453 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative != 0) || (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode))))) && (get_attr_memory (insn) == MEMORY_BOTH)) || ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_BOTH))) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH))))
01454 {
01455 return 3;
01456 }
01457 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative != 0) || (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode))))) && (get_attr_memory (insn) == MEMORY_LOAD)) || ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_LOAD))) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD))))
01458 {
01459 return 2;
01460 }
01461 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative != 0) || (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode))))) && (get_attr_memory (insn) == MEMORY_NONE)) || ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_NONE))) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE))))
01462 {
01463 return 1;
01464 }
01465 else
01466 {
01467 return 0;
01468 }
01469
01470 case 422:
01471 case 421:
01472 case 415:
01473 case 409:
01474 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_type (insn) == TYPE_ALU)) && (get_attr_memory (insn) == MEMORY_BOTH)) || ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_BOTH))) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH))))
01475 {
01476 return 3;
01477 }
01478 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_type (insn) == TYPE_ALU)) && (get_attr_memory (insn) == MEMORY_LOAD)) || ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_LOAD))) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD))))
01479 {
01480 return 2;
01481 }
01482 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_type (insn) == TYPE_ALU)) && (get_attr_memory (insn) == MEMORY_NONE)) || ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_NONE))) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE))))
01483 {
01484 return 1;
01485 }
01486 else
01487 {
01488 return 0;
01489 }
01490
01491 case 413:
01492 case 408:
01493 extract_constrain_insn_cached (insn);
01494 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative != 0) || (get_attr_type (insn) == TYPE_ALU))) && (get_attr_memory (insn) == MEMORY_BOTH)) || ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_BOTH))) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH))))
01495 {
01496 return 3;
01497 }
01498 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative != 0) || (get_attr_type (insn) == TYPE_ALU))) && (get_attr_memory (insn) == MEMORY_LOAD)) || ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_LOAD))) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD))))
01499 {
01500 return 2;
01501 }
01502 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative != 0) || (get_attr_type (insn) == TYPE_ALU))) && (get_attr_memory (insn) == MEMORY_NONE)) || ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_NONE))) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE))))
01503 {
01504 return 1;
01505 }
01506 else
01507 {
01508 return 0;
01509 }
01510
01511 case 406:
01512 case 404:
01513 case 401:
01514 case 400:
01515 case 398:
01516 case 359:
01517 case 358:
01518 case 357:
01519 case 356:
01520 case 355:
01521 case 354:
01522 case 353:
01523 case 352:
01524 case 351:
01525 case 350:
01526 extract_insn_cached (insn);
01527 if ((((ix86_cpu) == (CPU_PENTIUM))) && (memory_operand (operands[1], VOIDmode)))
01528 {
01529 return 3;
01530 }
01531 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
01532 {
01533 return 1;
01534 }
01535 else
01536 {
01537 return 0;
01538 }
01539
01540 case 292:
01541 case 288:
01542 extract_constrain_insn_cached (insn);
01543 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 0) || (which_alternative == 1))) && (get_attr_memory (insn) == MEMORY_BOTH)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 0) && (which_alternative != 1))) && (get_attr_memory (insn) == MEMORY_BOTH))))
01544 {
01545 return 3;
01546 }
01547 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 0) || (which_alternative == 1))) && (get_attr_memory (insn) == MEMORY_LOAD)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 0) && (which_alternative != 1))) && (get_attr_memory (insn) == MEMORY_LOAD))))
01548 {
01549 return 2;
01550 }
01551 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 0) || (which_alternative == 1))) && (get_attr_memory (insn) == MEMORY_NONE)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 0) && (which_alternative != 1))) && (get_attr_memory (insn) == MEMORY_NONE))))
01552 {
01553 return 1;
01554 }
01555 else
01556 {
01557 return 0;
01558 }
01559
01560 case 286:
01561 extract_constrain_insn_cached (insn);
01562 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))) && (get_attr_memory (insn) == MEMORY_BOTH)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2)))) && (get_attr_memory (insn) == MEMORY_BOTH))))
01563 {
01564 return 3;
01565 }
01566 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))) && (get_attr_memory (insn) == MEMORY_LOAD)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2)))) && (get_attr_memory (insn) == MEMORY_LOAD))))
01567 {
01568 return 2;
01569 }
01570 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))) && (get_attr_memory (insn) == MEMORY_NONE)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2)))) && (get_attr_memory (insn) == MEMORY_NONE))))
01571 {
01572 return 1;
01573 }
01574 else
01575 {
01576 return 0;
01577 }
01578
01579 case 279:
01580 extract_constrain_insn_cached (insn);
01581 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((which_alternative == 0) || (which_alternative == 2)) && (get_attr_memory (insn) == MEMORY_LOAD)) || (((which_alternative != 0) && (which_alternative != 2)) && (get_attr_memory (insn) == MEMORY_LOAD))))
01582 {
01583 return 2;
01584 }
01585 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((which_alternative == 0) || (which_alternative == 2)) && (get_attr_memory (insn) == MEMORY_NONE)) || (((which_alternative != 0) && (which_alternative != 2)) && (get_attr_memory (insn) == MEMORY_NONE))))
01586 {
01587 return 1;
01588 }
01589 else
01590 {
01591 return 0;
01592 }
01593
01594 case 278:
01595 case 277:
01596 extract_constrain_insn_cached (insn);
01597 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 1) && (get_attr_memory (insn) == MEMORY_LOAD)) || ((which_alternative == 1) && (get_attr_memory (insn) == MEMORY_LOAD))))
01598 {
01599 return 2;
01600 }
01601 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 1) && (get_attr_memory (insn) == MEMORY_NONE)) || ((which_alternative == 1) && (get_attr_memory (insn) == MEMORY_NONE))))
01602 {
01603 return 1;
01604 }
01605 else
01606 {
01607 return 0;
01608 }
01609
01610 case 276:
01611 extract_constrain_insn_cached (insn);
01612 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((which_alternative != 1) && (which_alternative != 3)) && (get_attr_memory (insn) == MEMORY_LOAD)) || (((which_alternative == 1) || (which_alternative == 3)) && (get_attr_memory (insn) == MEMORY_LOAD))))
01613 {
01614 return 2;
01615 }
01616 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((which_alternative != 1) && (which_alternative != 3)) && (get_attr_memory (insn) == MEMORY_NONE)) || (((which_alternative == 1) || (which_alternative == 3)) && (get_attr_memory (insn) == MEMORY_NONE))))
01617 {
01618 return 1;
01619 }
01620 else
01621 {
01622 return 0;
01623 }
01624
01625 case 261:
01626 case 260:
01627 case 259:
01628 case 258:
01629 case 257:
01630 case 256:
01631 case 255:
01632 case 254:
01633 case 253:
01634 case 252:
01635 case 251:
01636 case 250:
01637 case 249:
01638 case 248:
01639 case 247:
01640 case 246:
01641 case 245:
01642 if (((ix86_cpu) == (CPU_PENTIUM)))
01643 {
01644 return 11 ;
01645 }
01646 else
01647 {
01648 return 0;
01649 }
01650
01651 case 209:
01652 extract_constrain_insn_cached (insn);
01653 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (which_alternative == 2)) && (get_attr_memory (insn) == MEMORY_BOTH)) || ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_BOTH))) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH))))
01654 {
01655 return 3;
01656 }
01657 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (which_alternative == 2)) && (get_attr_memory (insn) == MEMORY_LOAD)) || ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_LOAD))) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD))))
01658 {
01659 return 2;
01660 }
01661 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (which_alternative == 2)) && (get_attr_memory (insn) == MEMORY_NONE)) || ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_NONE))) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE))))
01662 {
01663 return 1;
01664 }
01665 else
01666 {
01667 return 0;
01668 }
01669
01670 case 215:
01671 case 202:
01672 case 201:
01673 case 196:
01674 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_BOTH)) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH))))
01675 {
01676 return 3;
01677 }
01678 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_LOAD)) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD))))
01679 {
01680 return 2;
01681 }
01682 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_NONE)) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE))))
01683 {
01684 return 1;
01685 }
01686 else
01687 {
01688 return 0;
01689 }
01690
01691 case 348:
01692 case 347:
01693 case 346:
01694 case 344:
01695 case 343:
01696 case 342:
01697 case 341:
01698 case 340:
01699 case 338:
01700 case 337:
01701 case 336:
01702 case 335:
01703 case 334:
01704 case 333:
01705 case 332:
01706 case 331:
01707 case 330:
01708 case 329:
01709 case 328:
01710 case 327:
01711 case 326:
01712 case 325:
01713 case 324:
01714 case 323:
01715 case 322:
01716 case 321:
01717 case 320:
01718 case 318:
01719 case 316:
01720 case 315:
01721 case 314:
01722 case 313:
01723 case 312:
01724 case 311:
01725 case 310:
01726 case 309:
01727 case 308:
01728 case 307:
01729 case 306:
01730 case 305:
01731 case 304:
01732 case 303:
01733 case 302:
01734 case 301:
01735 case 300:
01736 case 299:
01737 case 298:
01738 case 296:
01739 case 294:
01740 case 293:
01741 case 291:
01742 case 290:
01743 case 289:
01744 case 287:
01745 case 244:
01746 case 243:
01747 case 241:
01748 case 240:
01749 case 239:
01750 case 238:
01751 case 237:
01752 case 236:
01753 case 235:
01754 case 234:
01755 case 233:
01756 case 232:
01757 case 229:
01758 case 228:
01759 case 227:
01760 case 224:
01761 case 223:
01762 case 222:
01763 case 221:
01764 case 220:
01765 case 219:
01766 case 218:
01767 case 217:
01768 case 216:
01769 case 214:
01770 case 213:
01771 case 212:
01772 case 211:
01773 case 210:
01774 case 208:
01775 case 207:
01776 case 206:
01777 case 205:
01778 case 204:
01779 case 203:
01780 case 200:
01781 case 199:
01782 case 198:
01783 case 197:
01784 case 185:
01785 case 184:
01786 case 181:
01787 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_BOTH)) || ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_BOTH))))
01788 {
01789 return 3;
01790 }
01791 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD)) || ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_LOAD))))
01792 {
01793 return 2;
01794 }
01795 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE)) || ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_NONE))))
01796 {
01797 return 1;
01798 }
01799 else
01800 {
01801 return 0;
01802 }
01803
01804 case 178:
01805 case 177:
01806 case 176:
01807 case 175:
01808 case 174:
01809 case 173:
01810 extract_constrain_insn_cached (insn);
01811 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 0) && ((get_attr_memory (insn) == MEMORY_NONE) || (get_attr_memory (insn) == MEMORY_LOAD))))
01812 {
01813 return 1;
01814 }
01815 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 0) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_STORE))))
01816 {
01817 return 3;
01818 }
01819 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 0) && ((immediate_operand (operands[1], VOIDmode)) || (get_attr_memory (insn) == MEMORY_STORE))))
01820 {
01821 return 2;
01822 }
01823 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
01824 {
01825 return 3;
01826 }
01827 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
01828 {
01829 return 2;
01830 }
01831 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
01832 {
01833 return 1;
01834 }
01835 else
01836 {
01837 return 0;
01838 }
01839
01840 case 158:
01841 case 157:
01842 case 156:
01843 case 153:
01844 case 152:
01845 case 151:
01846 case 148:
01847 case 147:
01848 case 146:
01849 if (((ix86_cpu) == (CPU_PENTIUM)))
01850 {
01851 return 3;
01852 }
01853 else
01854 {
01855 return 0;
01856 }
01857
01858 case 145:
01859 case 143:
01860 case 141:
01861 case 139:
01862 case 136:
01863 extract_insn_cached (insn);
01864 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_memory (insn) == MEMORY_NONE) || (get_attr_memory (insn) == MEMORY_LOAD)))
01865 {
01866 return 1;
01867 }
01868 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((immediate_operand (operands[1], VOIDmode)) || (get_attr_memory (insn) == MEMORY_STORE)))
01869 {
01870 return 2;
01871 }
01872 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
01873 {
01874 return 3;
01875 }
01876 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
01877 {
01878 return 2;
01879 }
01880 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
01881 {
01882 return 1;
01883 }
01884 else
01885 {
01886 return 0;
01887 }
01888
01889 case 135:
01890 extract_constrain_insn_cached (insn);
01891 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && ((get_attr_memory (insn) == MEMORY_NONE) || (get_attr_memory (insn) == MEMORY_LOAD))))
01892 {
01893 return 1;
01894 }
01895 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && ((immediate_operand (operands[1], VOIDmode)) || (get_attr_memory (insn) == MEMORY_STORE))))
01896 {
01897 return 2;
01898 }
01899 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
01900 {
01901 return 3;
01902 }
01903 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
01904 {
01905 return 2;
01906 }
01907 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
01908 {
01909 return 1;
01910 }
01911 else
01912 {
01913 return 0;
01914 }
01915
01916 case 171:
01917 case 170:
01918 case 168:
01919 case 167:
01920 case 165:
01921 case 164:
01922 case 162:
01923 case 161:
01924 case 144:
01925 case 142:
01926 case 140:
01927 case 138:
01928 case 134:
01929 case 133:
01930 extract_constrain_insn_cached (insn);
01931 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 0) && ((get_attr_memory (insn) == MEMORY_NONE) || (get_attr_memory (insn) == MEMORY_LOAD))))
01932 {
01933 return 1;
01934 }
01935 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 0) && ((immediate_operand (operands[1], VOIDmode)) || (get_attr_memory (insn) == MEMORY_STORE))))
01936 {
01937 return 2;
01938 }
01939 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
01940 {
01941 return 3;
01942 }
01943 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
01944 {
01945 return 2;
01946 }
01947 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
01948 {
01949 return 1;
01950 }
01951 else
01952 {
01953 return 0;
01954 }
01955
01956 case 132:
01957 case 131:
01958 case 130:
01959 case 129:
01960 extract_constrain_insn_cached (insn);
01961 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_memory (insn) == MEMORY_NONE) || (get_attr_memory (insn) == MEMORY_LOAD)))
01962 {
01963 return 1;
01964 }
01965 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_STORE))))
01966 {
01967 return 3;
01968 }
01969 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((immediate_operand (operands[1], VOIDmode)) || (get_attr_memory (insn) == MEMORY_STORE)))
01970 {
01971 return 2;
01972 }
01973 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
01974 {
01975 return 3;
01976 }
01977 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
01978 {
01979 return 2;
01980 }
01981 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
01982 {
01983 return 1;
01984 }
01985 else
01986 {
01987 return 0;
01988 }
01989
01990 case 127:
01991 extract_constrain_insn_cached (insn);
01992 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 0) || (which_alternative == 1)) && ((get_attr_memory (insn) == MEMORY_NONE) || (get_attr_memory (insn) == MEMORY_LOAD))))
01993 {
01994 return 1;
01995 }
01996 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 0) || (which_alternative == 1)) && (((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_STORE)) && (which_alternative == 1))))
01997 {
01998 return 3;
01999 }
02000 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 0) || (which_alternative == 1)) && ((immediate_operand (operands[1], VOIDmode)) || (get_attr_memory (insn) == MEMORY_STORE))))
02001 {
02002 return 2;
02003 }
02004 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
02005 {
02006 return 3;
02007 }
02008 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
02009 {
02010 return 2;
02011 }
02012 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
02013 {
02014 return 1;
02015 }
02016 else
02017 {
02018 return 0;
02019 }
02020
02021 case 115:
02022 extract_constrain_insn_cached (insn);
02023 if ((which_alternative == 1) && (((ix86_cpu) == (CPU_PENTIUM))))
02024 {
02025 return 1;
02026 }
02027 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_BOTH))) || (((which_alternative != 1) || (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_BOTH))))
02028 {
02029 return 3;
02030 }
02031 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD))) || (((which_alternative != 1) || (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD))))
02032 {
02033 return 2;
02034 }
02035 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE))) || (((which_alternative != 1) || (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE))))
02036 {
02037 return 1;
02038 }
02039 else
02040 {
02041 return 0;
02042 }
02043
02044 case 112:
02045 case 109:
02046 extract_constrain_insn_cached (insn);
02047 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_BOTH))) || (((which_alternative != 1) || (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_BOTH))))
02048 {
02049 return 3;
02050 }
02051 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD))) || (((which_alternative != 1) || (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD))))
02052 {
02053 return 2;
02054 }
02055 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE))) || (((which_alternative != 1) || (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE))))
02056 {
02057 return 1;
02058 }
02059 else
02060 {
02061 return 0;
02062 }
02063
02064 case 103:
02065 case 102:
02066 case 101:
02067 case 100:
02068 extract_constrain_insn_cached (insn);
02069 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && ((get_attr_memory (insn) == MEMORY_NONE) || (get_attr_memory (insn) == MEMORY_LOAD))))
02070 {
02071 return 1;
02072 }
02073 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_STORE))))
02074 {
02075 return 3;
02076 }
02077 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && ((immediate_operand (operands[1], VOIDmode)) || (get_attr_memory (insn) == MEMORY_STORE))))
02078 {
02079 return 2;
02080 }
02081 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
02082 {
02083 return 3;
02084 }
02085 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
02086 {
02087 return 2;
02088 }
02089 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
02090 {
02091 return 1;
02092 }
02093 else
02094 {
02095 return 0;
02096 }
02097
02098 case 94:
02099 case 93:
02100 extract_constrain_insn_cached (insn);
02101 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && ((get_attr_memory (insn) == MEMORY_NONE) || (get_attr_memory (insn) == MEMORY_LOAD))))
02102 {
02103 return 1;
02104 }
02105 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && ((immediate_operand (operands[1], VOIDmode)) || (get_attr_memory (insn) == MEMORY_STORE))))
02106 {
02107 return 2;
02108 }
02109 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
02110 {
02111 return 3;
02112 }
02113 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
02114 {
02115 return 2;
02116 }
02117 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
02118 {
02119 return 1;
02120 }
02121 else
02122 {
02123 return 0;
02124 }
02125
02126 case 89:
02127 extract_constrain_insn_cached (insn);
02128 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && ((get_attr_memory (insn) == MEMORY_NONE) || (get_attr_memory (insn) == MEMORY_LOAD))))
02129 {
02130 return 1;
02131 }
02132 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && ((immediate_operand (operands[1], VOIDmode)) || (get_attr_memory (insn) == MEMORY_STORE))))
02133 {
02134 return 2;
02135 }
02136 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 3) || (which_alternative == 4))))
02137 {
02138 return 1;
02139 }
02140 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 3) || (which_alternative == 4))) && (get_attr_memory (insn) == MEMORY_BOTH)) || (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (((which_alternative == 3) || (which_alternative == 4)) && ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && (((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8)))) || ((which_alternative != 3) && ((which_alternative != 4) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (which_alternative != 8)))))))) || ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8))))) && ((which_alternative == 0) || ((which_alternative == 1) || ((which_alternative == 2) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8)))))))))) && (get_attr_memory (insn) == MEMORY_BOTH))) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) || ((which_alternative != 3) && (which_alternative != 4)))) && (get_attr_memory (insn) == MEMORY_BOTH))))
02141 {
02142 return 3;
02143 }
02144 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 3) || (which_alternative == 4))) && (get_attr_memory (insn) == MEMORY_LOAD)) || (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (((which_alternative == 3) || (which_alternative == 4)) && ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && (((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8)))) || ((which_alternative != 3) && ((which_alternative != 4) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (which_alternative != 8)))))))) || ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8))))) && ((which_alternative == 0) || ((which_alternative == 1) || ((which_alternative == 2) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8)))))))))) && (get_attr_memory (insn) == MEMORY_LOAD))) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) || ((which_alternative != 3) && (which_alternative != 4)))) && (get_attr_memory (insn) == MEMORY_LOAD))))
02145 {
02146 return 2;
02147 }
02148 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 3) || (which_alternative == 4))) && (get_attr_memory (insn) == MEMORY_NONE)) || (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (((which_alternative == 3) || (which_alternative == 4)) && ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && (((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8)))) || ((which_alternative != 3) && ((which_alternative != 4) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (which_alternative != 8)))))))) || ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8))))) && ((which_alternative == 0) || ((which_alternative == 1) || ((which_alternative == 2) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8)))))))))) && (get_attr_memory (insn) == MEMORY_NONE))) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) || ((which_alternative != 3) && (which_alternative != 4)))) && (get_attr_memory (insn) == MEMORY_NONE))))
02149 {
02150 return 1;
02151 }
02152 else
02153 {
02154 return 0;
02155 }
02156
02157 case 88:
02158 case 87:
02159 extract_constrain_insn_cached (insn);
02160 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && (! (memory_operand (operands[1], VOIDmode)))))
02161 {
02162 return 1;
02163 }
02164 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((which_alternative == 1) && (! (memory_operand (operands[1], VOIDmode)))) && ((which_alternative == 1) && (memory_operand (operands[1], VOIDmode)))) || (((which_alternative != 1) || (memory_operand (operands[1], VOIDmode))) && ((which_alternative == 1) && (memory_operand (operands[1], VOIDmode))))))
02165 {
02166 return 3;
02167 }
02168 else
02169 {
02170 return 0;
02171 }
02172
02173 case 83:
02174 extract_constrain_insn_cached (insn);
02175 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative != 7) && ((which_alternative != 8) && ((which_alternative != 9) && ((which_alternative != 4) && ((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], DImode))))))))))
02176 {
02177 return 1;
02178 }
02179 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_BOTH)) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH))))
02180 {
02181 return 3;
02182 }
02183 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_LOAD)) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD))))
02184 {
02185 return 2;
02186 }
02187 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_NONE)) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE))))
02188 {
02189 return 1;
02190 }
02191 else
02192 {
02193 return 0;
02194 }
02195
02196 case 76:
02197 extract_constrain_insn_cached (insn);
02198 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 0) && (! (memory_operand (operands[1], VOIDmode)))))
02199 {
02200 return 1;
02201 }
02202 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((which_alternative == 0) && (! (memory_operand (operands[1], VOIDmode)))) && ((which_alternative == 0) && (memory_operand (operands[1], VOIDmode)))) || (((which_alternative != 0) || (memory_operand (operands[1], VOIDmode))) && ((which_alternative == 0) && (memory_operand (operands[1], VOIDmode))))))
02203 {
02204 return 3;
02205 }
02206 else
02207 {
02208 return 0;
02209 }
02210
02211 case 71:
02212 extract_constrain_insn_cached (insn);
02213 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((q_regs_operand (operands[0], QImode)) && (! ((TARGET_MOVX) != (0)))))
02214 {
02215 return 1;
02216 }
02217 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((q_regs_operand (operands[0], QImode)) && (! ((TARGET_MOVX) != (0))))) && (get_attr_memory (insn) == MEMORY_BOTH)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((! (q_regs_operand (operands[0], QImode))) || ((TARGET_MOVX) != (0)))) && (get_attr_memory (insn) == MEMORY_BOTH))))
02218 {
02219 return 3;
02220 }
02221 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((q_regs_operand (operands[0], QImode)) && (! ((TARGET_MOVX) != (0))))) && (get_attr_memory (insn) == MEMORY_LOAD)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((! (q_regs_operand (operands[0], QImode))) || ((TARGET_MOVX) != (0)))) && (get_attr_memory (insn) == MEMORY_LOAD))))
02222 {
02223 return 2;
02224 }
02225 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((q_regs_operand (operands[0], QImode)) && (! ((TARGET_MOVX) != (0))))) && (get_attr_memory (insn) == MEMORY_NONE)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((! (q_regs_operand (operands[0], QImode))) || ((TARGET_MOVX) != (0)))) && (get_attr_memory (insn) == MEMORY_NONE))))
02226 {
02227 return 1;
02228 }
02229 else
02230 {
02231 return 0;
02232 }
02233
02234 case 70:
02235 case 66:
02236 case 65:
02237 if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_IMOV))
02238 {
02239 return 1;
02240 }
02241 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_type (insn) == TYPE_IMOV)) && (get_attr_memory (insn) == MEMORY_BOTH)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (get_attr_type (insn) == TYPE_IMOV))) && (get_attr_memory (insn) == MEMORY_BOTH))))
02242 {
02243 return 3;
02244 }
02245 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_type (insn) == TYPE_IMOV)) && (get_attr_memory (insn) == MEMORY_LOAD)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (get_attr_type (insn) == TYPE_IMOV))) && (get_attr_memory (insn) == MEMORY_LOAD))))
02246 {
02247 return 2;
02248 }
02249 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_type (insn) == TYPE_IMOV)) && (get_attr_memory (insn) == MEMORY_NONE)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (get_attr_type (insn) == TYPE_IMOV))) && (get_attr_memory (insn) == MEMORY_NONE))))
02250 {
02251 return 1;
02252 }
02253 else
02254 {
02255 return 0;
02256 }
02257
02258 case 59:
02259 extract_constrain_insn_cached (insn);
02260 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2)))))))
02261 {
02262 return 1;
02263 }
02264 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2)))))) && (((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2))))))) && (get_attr_memory (insn) == MEMORY_BOTH)) || (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2))))) && (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2))))))) && (get_attr_memory (insn) == MEMORY_BOTH))) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && (((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2))))))) && (get_attr_memory (insn) == MEMORY_BOTH))))
02265 {
02266 return 3;
02267 }
02268 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2)))))) && (((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2))))))) && (get_attr_memory (insn) == MEMORY_LOAD)) || (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2))))) && (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2))))))) && (get_attr_memory (insn) == MEMORY_LOAD))) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && (((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2))))))) && (get_attr_memory (insn) == MEMORY_LOAD))))
02269 {
02270 return 2;
02271 }
02272 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2)))))) && (((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2))))))) && (get_attr_memory (insn) == MEMORY_NONE)) || (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2))))) && (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2))))))) && (get_attr_memory (insn) == MEMORY_NONE))) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && (((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2))))))) && (get_attr_memory (insn) == MEMORY_NONE))))
02273 {
02274 return 1;
02275 }
02276 else
02277 {
02278 return 0;
02279 }
02280
02281 case 74:
02282 case 73:
02283 case 72:
02284 case 61:
02285 case 55:
02286 if (((ix86_cpu) == (CPU_PENTIUM)))
02287 {
02288 return 1;
02289 }
02290 else
02291 {
02292 return 0;
02293 }
02294
02295 case 50:
02296 if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_IMOV))
02297 {
02298 return 1;
02299 }
02300 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_BOTH)) || ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_BOTH))) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (get_attr_type (insn) == TYPE_IMOV))) && (get_attr_memory (insn) == MEMORY_BOTH))))
02301 {
02302 return 3;
02303 }
02304 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_LOAD)) || ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_LOAD))) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (get_attr_type (insn) == TYPE_IMOV))) && (get_attr_memory (insn) == MEMORY_LOAD))))
02305 {
02306 return 2;
02307 }
02308 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_NONE)) || ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_NONE))) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (get_attr_type (insn) == TYPE_IMOV))) && (get_attr_memory (insn) == MEMORY_NONE))))
02309 {
02310 return 1;
02311 }
02312 else
02313 {
02314 return 0;
02315 }
02316
02317 case 275:
02318 case 274:
02319 case 272:
02320 case 269:
02321 case 266:
02322 case 263:
02323 case 262:
02324 case 86:
02325 case 60:
02326 case 54:
02327 case 53:
02328 case 47:
02329 if (((ix86_cpu) == (CPU_PENTIUM)))
02330 {
02331 return 1;
02332 }
02333 else
02334 {
02335 return 0;
02336 }
02337
02338 case 545:
02339 case 544:
02340 case 85:
02341 case 68:
02342 case 52:
02343 case 46:
02344 if (((ix86_cpu) == (CPU_PENTIUM)))
02345 {
02346 return 1;
02347 }
02348 else
02349 {
02350 return 0;
02351 }
02352
02353 case 953:
02354 case 884:
02355 case 883:
02356 case 882:
02357 case 881:
02358 case 864:
02359 case 814:
02360 case 813:
02361 case 770:
02362 case 769:
02363 case 645:
02364 case 644:
02365 case 638:
02366 case 636:
02367 case 195:
02368 case 194:
02369 case 193:
02370 case 192:
02371 case 191:
02372 case 190:
02373 case 189:
02374 case 188:
02375 case 187:
02376 case 186:
02377 case 84:
02378 case 67:
02379 case 51:
02380 case 45:
02381 if (((ix86_cpu) == (CPU_PENTIUM)))
02382 {
02383 return 1;
02384 }
02385 else
02386 {
02387 return 0;
02388 }
02389
02390 case 44:
02391 extract_constrain_insn_cached (insn);
02392 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && ((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], SImode)))))))))
02393 {
02394 return 1;
02395 }
02396 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_BOTH)) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH))))
02397 {
02398 return 3;
02399 }
02400 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_LOAD)) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD))))
02401 {
02402 return 2;
02403 }
02404 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_NONE)) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE))))
02405 {
02406 return 1;
02407 }
02408 else
02409 {
02410 return 0;
02411 }
02412
02413 case 407:
02414 case 405:
02415 case 403:
02416 case 402:
02417 case 399:
02418 case 345:
02419 case 339:
02420 case 319:
02421 case 317:
02422 case 297:
02423 case 295:
02424 case 242:
02425 case 111:
02426 case 108:
02427 case 106:
02428 case 81:
02429 case 80:
02430 case 62:
02431 case 56:
02432 case 43:
02433 case 42:
02434 extract_insn_cached (insn);
02435 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (memory_operand (operands[1], VOIDmode))) || ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (memory_operand (operands[1], VOIDmode)))))
02436 {
02437 return 3;
02438 }
02439 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE)) || ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_NONE))))
02440 {
02441 return 1;
02442 }
02443 else
02444 {
02445 return 0;
02446 }
02447
02448 case 79:
02449 case 78:
02450 case 41:
02451 case 40:
02452 extract_insn_cached (insn);
02453 if (((ix86_cpu) == (CPU_PENTIUM)))
02454 {
02455 return 1;
02456 }
02457 else
02458 {
02459 return 0;
02460 }
02461
02462 case 77:
02463 case 58:
02464 case 57:
02465 case 49:
02466 case 48:
02467 case 39:
02468 case 38:
02469 case 37:
02470 extract_insn_cached (insn);
02471 if ((((ix86_cpu) == (CPU_PENTIUM))) && (! (memory_operand (operands[1], VOIDmode))))
02472 {
02473 return 1;
02474 }
02475 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (memory_operand (operands[1], VOIDmode)))
02476 {
02477 return 3;
02478 }
02479 else
02480 {
02481 return 0;
02482 }
02483
02484 case 967:
02485 case 966:
02486 case 965:
02487 case 964:
02488 case 963:
02489 case 962:
02490 case 904:
02491 case 903:
02492 case 902:
02493 case 901:
02494 case 900:
02495 case 899:
02496 case 860:
02497 case 859:
02498 case 858:
02499 case 828:
02500 case 827:
02501 case 826:
02502 case 825:
02503 case 824:
02504 case 823:
02505 case 776:
02506 case 775:
02507 case 774:
02508 case 773:
02509 case 772:
02510 case 771:
02511 case 502:
02512 case 501:
02513 case 280:
02514 case 36:
02515 case 35:
02516 case 34:
02517 case 33:
02518 case 32:
02519 case 31:
02520 case 27:
02521 case 24:
02522 case 23:
02523 case 21:
02524 case 20:
02525 case 19:
02526 if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
02527 {
02528 return 2;
02529 }
02530 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
02531 {
02532 return 1;
02533 }
02534 else
02535 {
02536 return 0;
02537 }
02538
02539 case 283:
02540 case 282:
02541 case 281:
02542 case 17:
02543 case 16:
02544 case 15:
02545 case 14:
02546 case 13:
02547 case 12:
02548 case 11:
02549 case 10:
02550 case 9:
02551 case 8:
02552 case 7:
02553 case 6:
02554 case 5:
02555 case 4:
02556 case 3:
02557 case 2:
02558 case 1:
02559 case 0:
02560 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD)) || ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_LOAD))))
02561 {
02562 return 2;
02563 }
02564 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE)) || ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_NONE))))
02565 {
02566 return 1;
02567 }
02568 else
02569 {
02570 return 0;
02571 }
02572
02573 case -1:
02574 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
02575 && asm_noperands (PATTERN (insn)) < 0)
02576 fatal_insn_not_found (insn);
02577 case 1024:
02578 case 1023:
02579 case 1022:
02580 case 1021:
02581 case 1020:
02582 case 854:
02583 case 853:
02584 case 852:
02585 case 850:
02586 case 708:
02587 case 707:
02588 case 706:
02589 case 705:
02590 case 704:
02591 case 703:
02592 case 702:
02593 case 701:
02594 case 700:
02595 case 699:
02596 case 698:
02597 case 697:
02598 case 696:
02599 case 695:
02600 case 694:
02601 case 693:
02602 case 692:
02603 case 681:
02604 case 680:
02605 case 673:
02606 case 672:
02607 case 671:
02608 case 670:
02609 case 669:
02610 case 668:
02611 case 667:
02612 case 666:
02613 case 665:
02614 case 664:
02615 case 663:
02616 case 662:
02617 case 661:
02618 case 660:
02619 case 656:
02620 case 655:
02621 case 653:
02622 case 652:
02623 case 650:
02624 case 649:
02625 case 647:
02626 case 646:
02627 case 543:
02628 case 542:
02629 case 541:
02630 case 540:
02631 case 539:
02632 case 538:
02633 case 537:
02634 case 536:
02635 case 535:
02636 case 534:
02637 case 533:
02638 case 532:
02639 case 531:
02640 case 530:
02641 case 528:
02642 case 527:
02643 case 526:
02644 case 514:
02645 case 513:
02646 case 512:
02647 case 511:
02648 case 510:
02649 case 509:
02650 case 508:
02651 case 507:
02652 case 506:
02653 case 505:
02654 case 456:
02655 case 455:
02656 case 429:
02657 case 428:
02658 case 411:
02659 case 410:
02660 case 388:
02661 case 387:
02662 case 386:
02663 case 385:
02664 case 384:
02665 case 383:
02666 case 382:
02667 case 381:
02668 case 380:
02669 case 379:
02670 case 369:
02671 case 368:
02672 case 367:
02673 case 366:
02674 case 365:
02675 case 364:
02676 case 363:
02677 case 362:
02678 case 361:
02679 case 360:
02680 case 349:
02681 case 285:
02682 case 284:
02683 case 273:
02684 case 271:
02685 case 270:
02686 case 268:
02687 case 267:
02688 case 265:
02689 case 264:
02690 case 225:
02691 case 179:
02692 case 160:
02693 case 159:
02694 case 118:
02695 case 114:
02696 case 99:
02697 case 98:
02698 case 97:
02699 case 96:
02700 case 92:
02701 case 91:
02702 case 75:
02703 case 30:
02704 case 29:
02705 case 28:
02706 case 26:
02707 case 25:
02708 case 22:
02709 case 18:
02710 return 0;
02711
02712 default:
02713 if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
02714 {
02715 return 3;
02716 }
02717 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
02718 {
02719 return 2;
02720 }
02721 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
02722 {
02723 return 1;
02724 }
02725 else
02726 {
02727 return 0;
02728 }
02729
02730 }
02731 }
02732
02733 extern int insn_alts PARAMS ((rtx));
02734 int
02735 insn_alts (insn)
02736 rtx insn;
02737 {
02738 switch (recog_memoized (insn))
02739 {
02740 case 679:
02741 case 678:
02742 case 677:
02743 case 676:
02744 case 675:
02745 case 674:
02746 extract_insn_cached (insn);
02747 if (((ix86_cpu) == (CPU_PENTIUM)))
02748 {
02749 return 2;
02750 }
02751 else
02752 {
02753 return 0;
02754 }
02755
02756 case 659:
02757 extract_constrain_insn_cached (insn);
02758 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && (const0_operand (operands[2], DImode))))
02759 {
02760 return 4;
02761 }
02762 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_BOTH)))
02763 {
02764 return 64 ;
02765 }
02766 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_BOTH)))
02767 {
02768 return 1;
02769 }
02770 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD)))
02771 {
02772 return 32 ;
02773 }
02774 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_LOAD)))
02775 {
02776 return 1;
02777 }
02778 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE)))
02779 {
02780 return 4;
02781 }
02782 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_NONE)))
02783 {
02784 return 1;
02785 }
02786 else
02787 {
02788 return 0;
02789 }
02790
02791 case 658:
02792 extract_constrain_insn_cached (insn);
02793 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && (const0_operand (operands[2], SImode))))
02794 {
02795 return 4;
02796 }
02797 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_BOTH)))
02798 {
02799 return 64 ;
02800 }
02801 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_BOTH)))
02802 {
02803 return 1;
02804 }
02805 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD)))
02806 {
02807 return 32 ;
02808 }
02809 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_LOAD)))
02810 {
02811 return 1;
02812 }
02813 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE)))
02814 {
02815 return 4;
02816 }
02817 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_NONE)))
02818 {
02819 return 1;
02820 }
02821 else
02822 {
02823 return 0;
02824 }
02825
02826 case 642:
02827 extract_constrain_insn_cached (insn);
02828 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 2) && (which_alternative != 3)) && ((which_alternative == 0) || (which_alternative == 1))))
02829 {
02830 return 1;
02831 }
02832 else
02833 {
02834 return 0;
02835 }
02836
02837 case 585:
02838 case 582:
02839 extract_constrain_insn_cached (insn);
02840 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 1) || (get_attr_memory (insn) == MEMORY_BOTH)) || ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_NONE))))
02841 {
02842 return 1;
02843 }
02844 else
02845 {
02846 return 0;
02847 }
02848
02849 case 581:
02850 case 579:
02851 case 577:
02852 case 575:
02853 case 573:
02854 case 571:
02855 case 569:
02856 extract_insn_cached (insn);
02857 if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_FOP))
02858 {
02859 return 1;
02860 }
02861 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (mult_operator (operands[3], TFmode)))
02862 {
02863 return 4;
02864 }
02865 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_type (insn) == TYPE_FDIV) || ((get_attr_memory (insn) == MEMORY_BOTH) || (get_attr_memory (insn) == MEMORY_LOAD))) || (get_attr_memory (insn) == MEMORY_NONE)))
02866 {
02867 return 1;
02868 }
02869 else
02870 {
02871 return 0;
02872 }
02873
02874 case 580:
02875 case 578:
02876 case 576:
02877 case 574:
02878 case 572:
02879 case 570:
02880 case 568:
02881 extract_insn_cached (insn);
02882 if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_FOP))
02883 {
02884 return 1;
02885 }
02886 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (mult_operator (operands[3], XFmode)))
02887 {
02888 return 4;
02889 }
02890 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_type (insn) == TYPE_FDIV) || ((get_attr_memory (insn) == MEMORY_BOTH) || (get_attr_memory (insn) == MEMORY_LOAD))) || (get_attr_memory (insn) == MEMORY_NONE)))
02891 {
02892 return 1;
02893 }
02894 else
02895 {
02896 return 0;
02897 }
02898
02899 case 562:
02900 extract_constrain_insn_cached (insn);
02901 if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_FOP))
02902 {
02903 return 1;
02904 }
02905 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative != 2) && (mult_operator (operands[3], DFmode))))
02906 {
02907 return 4;
02908 }
02909 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_type (insn) == TYPE_FDIV) || ((get_attr_memory (insn) == MEMORY_BOTH) || (get_attr_memory (insn) == MEMORY_LOAD))) || (get_attr_memory (insn) == MEMORY_NONE)))
02910 {
02911 return 1;
02912 }
02913 else
02914 {
02915 return 0;
02916 }
02917
02918 case 567:
02919 case 566:
02920 case 565:
02921 case 564:
02922 case 561:
02923 extract_insn_cached (insn);
02924 if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_FOP))
02925 {
02926 return 1;
02927 }
02928 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (mult_operator (operands[3], DFmode)))
02929 {
02930 return 4;
02931 }
02932 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_type (insn) == TYPE_FDIV) || ((get_attr_memory (insn) == MEMORY_BOTH) || (get_attr_memory (insn) == MEMORY_LOAD))) || (get_attr_memory (insn) == MEMORY_NONE)))
02933 {
02934 return 1;
02935 }
02936 else
02937 {
02938 return 0;
02939 }
02940
02941 case 557:
02942 extract_constrain_insn_cached (insn);
02943 if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_FOP))
02944 {
02945 return 1;
02946 }
02947 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative != 2) && (mult_operator (operands[3], SFmode))))
02948 {
02949 return 4;
02950 }
02951 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_type (insn) == TYPE_FDIV) || ((get_attr_memory (insn) == MEMORY_BOTH) || (get_attr_memory (insn) == MEMORY_LOAD))) || (get_attr_memory (insn) == MEMORY_NONE)))
02952 {
02953 return 1;
02954 }
02955 else
02956 {
02957 return 0;
02958 }
02959
02960 case 560:
02961 case 559:
02962 case 556:
02963 extract_insn_cached (insn);
02964 if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_FOP))
02965 {
02966 return 1;
02967 }
02968 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (mult_operator (operands[3], SFmode)))
02969 {
02970 return 4;
02971 }
02972 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_type (insn) == TYPE_FDIV) || ((get_attr_memory (insn) == MEMORY_BOTH) || (get_attr_memory (insn) == MEMORY_LOAD))) || (get_attr_memory (insn) == MEMORY_NONE)))
02973 {
02974 return 1;
02975 }
02976 else
02977 {
02978 return 0;
02979 }
02980
02981 case 555:
02982 extract_insn_cached (insn);
02983 if ((((ix86_cpu) == (CPU_PENTIUM))) && (! (mult_operator (operands[3], TFmode))))
02984 {
02985 return 1;
02986 }
02987 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (mult_operator (operands[3], TFmode)))
02988 {
02989 return 4;
02990 }
02991 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_memory (insn) == MEMORY_BOTH) || (get_attr_memory (insn) == MEMORY_LOAD)) || (get_attr_memory (insn) == MEMORY_NONE)))
02992 {
02993 return 1;
02994 }
02995 else
02996 {
02997 return 0;
02998 }
02999
03000 case 554:
03001 extract_insn_cached (insn);
03002 if ((((ix86_cpu) == (CPU_PENTIUM))) && (! (mult_operator (operands[3], XFmode))))
03003 {
03004 return 1;
03005 }
03006 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (mult_operator (operands[3], XFmode)))
03007 {
03008 return 4;
03009 }
03010 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_memory (insn) == MEMORY_BOTH) || (get_attr_memory (insn) == MEMORY_LOAD)) || (get_attr_memory (insn) == MEMORY_NONE)))
03011 {
03012 return 1;
03013 }
03014 else
03015 {
03016 return 0;
03017 }
03018
03019 case 552:
03020 case 549:
03021 extract_constrain_insn_cached (insn);
03022 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 0) && (! (mult_operator (operands[3], SFmode)))))
03023 {
03024 return 1;
03025 }
03026 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 0) && (mult_operator (operands[3], SFmode))))
03027 {
03028 return 4;
03029 }
03030 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_memory (insn) == MEMORY_BOTH) || (get_attr_memory (insn) == MEMORY_LOAD)) || (get_attr_memory (insn) == MEMORY_NONE)))
03031 {
03032 return 1;
03033 }
03034 else
03035 {
03036 return 0;
03037 }
03038
03039 case 551:
03040 case 548:
03041 extract_insn_cached (insn);
03042 if ((((ix86_cpu) == (CPU_PENTIUM))) && (! (mult_operator (operands[3], SFmode))))
03043 {
03044 return 1;
03045 }
03046 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (mult_operator (operands[3], SFmode)))
03047 {
03048 return 4;
03049 }
03050 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_memory (insn) == MEMORY_BOTH) || (get_attr_memory (insn) == MEMORY_LOAD)) || (get_attr_memory (insn) == MEMORY_NONE)))
03051 {
03052 return 1;
03053 }
03054 else
03055 {
03056 return 0;
03057 }
03058
03059 case 547:
03060 case 546:
03061 if (((ix86_cpu) == (CPU_PENTIUM)))
03062 {
03063 return 32 ;
03064 }
03065 else
03066 {
03067 return 0;
03068 }
03069
03070 case 545:
03071 case 544:
03072 if (((ix86_cpu) == (CPU_PENTIUM)))
03073 {
03074 return 4;
03075 }
03076 else
03077 {
03078 return 0;
03079 }
03080
03081 case 525:
03082 case 524:
03083 case 523:
03084 case 522:
03085 case 521:
03086 extract_insn_cached (insn);
03087 if (((ix86_cpu) == (CPU_PENTIUM)))
03088 {
03089 return 2;
03090 }
03091 else
03092 {
03093 return 0;
03094 }
03095
03096 case 529:
03097 case 520:
03098 case 519:
03099 case 518:
03100 case 517:
03101 case 516:
03102 case 515:
03103 case 504:
03104 case 503:
03105 extract_insn_cached (insn);
03106 if (((ix86_cpu) == (CPU_PENTIUM)))
03107 {
03108 return 2;
03109 }
03110 else
03111 {
03112 return 0;
03113 }
03114
03115 case 498:
03116 case 496:
03117 case 485:
03118 case 483:
03119 extract_insn_cached (insn);
03120 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_1_operand (operands[1], VOIDmode))) && (get_attr_memory (insn) == MEMORY_BOTH)))
03121 {
03122 return 2;
03123 }
03124 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_1_operand (operands[1], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_BOTH)))
03125 {
03126 return 1;
03127 }
03128 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_1_operand (operands[1], VOIDmode))) && (get_attr_memory (insn) == MEMORY_LOAD)))
03129 {
03130 return 2;
03131 }
03132 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_1_operand (operands[1], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_LOAD)) || (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_1_operand (operands[1], VOIDmode))) && (get_attr_memory (insn) == MEMORY_NONE))) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_1_operand (operands[1], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_NONE))))
03133 {
03134 return 1;
03135 }
03136 else
03137 {
03138 return 0;
03139 }
03140
03141 case 497:
03142 case 495:
03143 case 494:
03144 case 493:
03145 case 492:
03146 case 491:
03147 case 490:
03148 case 489:
03149 case 488:
03150 case 487:
03151 case 486:
03152 case 484:
03153 case 482:
03154 case 481:
03155 case 480:
03156 case 479:
03157 case 478:
03158 case 477:
03159 case 476:
03160 case 475:
03161 extract_insn_cached (insn);
03162 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_1_operand (operands[2], VOIDmode))) && (get_attr_memory (insn) == MEMORY_BOTH)))
03163 {
03164 return 2;
03165 }
03166 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_1_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_BOTH)))
03167 {
03168 return 1;
03169 }
03170 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_1_operand (operands[2], VOIDmode))) && (get_attr_memory (insn) == MEMORY_LOAD)))
03171 {
03172 return 2;
03173 }
03174 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_1_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_LOAD)) || (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_1_operand (operands[2], VOIDmode))) && (get_attr_memory (insn) == MEMORY_NONE))) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_1_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_NONE))))
03175 {
03176 return 1;
03177 }
03178 else
03179 {
03180 return 0;
03181 }
03182
03183 case 472:
03184 case 470:
03185 case 448:
03186 case 446:
03187 extract_insn_cached (insn);
03188 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_operand (operands[1], VOIDmode))) && (get_attr_memory (insn) == MEMORY_BOTH)))
03189 {
03190 return 2;
03191 }
03192 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_operand (operands[1], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_BOTH)))
03193 {
03194 return 1;
03195 }
03196 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_operand (operands[1], VOIDmode))) && (get_attr_memory (insn) == MEMORY_LOAD)))
03197 {
03198 return 2;
03199 }
03200 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_operand (operands[1], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_LOAD)) || (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_operand (operands[1], VOIDmode))) && (get_attr_memory (insn) == MEMORY_NONE))) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_operand (operands[1], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_NONE))))
03201 {
03202 return 1;
03203 }
03204 else
03205 {
03206 return 0;
03207 }
03208
03209 case 474:
03210 case 473:
03211 case 471:
03212 case 469:
03213 case 468:
03214 case 467:
03215 case 466:
03216 case 465:
03217 case 464:
03218 case 463:
03219 case 462:
03220 case 461:
03221 case 460:
03222 case 459:
03223 case 458:
03224 case 457:
03225 case 454:
03226 case 453:
03227 case 452:
03228 case 451:
03229 case 450:
03230 case 449:
03231 case 447:
03232 case 445:
03233 case 444:
03234 case 443:
03235 case 442:
03236 case 441:
03237 case 440:
03238 case 439:
03239 case 438:
03240 case 437:
03241 case 436:
03242 case 435:
03243 case 434:
03244 case 433:
03245 case 427:
03246 case 426:
03247 case 425:
03248 case 424:
03249 extract_insn_cached (insn);
03250 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_operand (operands[2], VOIDmode))) && (get_attr_memory (insn) == MEMORY_BOTH)))
03251 {
03252 return 2;
03253 }
03254 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_BOTH)))
03255 {
03256 return 1;
03257 }
03258 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_operand (operands[2], VOIDmode))) && (get_attr_memory (insn) == MEMORY_LOAD)))
03259 {
03260 return 2;
03261 }
03262 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_LOAD)) || (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_operand (operands[2], VOIDmode))) && (get_attr_memory (insn) == MEMORY_NONE))) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_NONE))))
03263 {
03264 return 1;
03265 }
03266 else
03267 {
03268 return 0;
03269 }
03270
03271 case 432:
03272 case 431:
03273 case 423:
03274 extract_constrain_insn_cached (insn);
03275 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 1) && (const_int_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_BOTH)))
03276 {
03277 return 2;
03278 }
03279 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 1) || (! (const_int_operand (operands[2], VOIDmode))))) && (get_attr_memory (insn) == MEMORY_BOTH)))
03280 {
03281 return 1;
03282 }
03283 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 1) && (const_int_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_LOAD)))
03284 {
03285 return 2;
03286 }
03287 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 1) || (! (const_int_operand (operands[2], VOIDmode))))) && (get_attr_memory (insn) == MEMORY_LOAD)) || (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 1) && (const_int_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_NONE))) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 1) || (! (const_int_operand (operands[2], VOIDmode))))) && (get_attr_memory (insn) == MEMORY_NONE))))
03288 {
03289 return 1;
03290 }
03291 else
03292 {
03293 return 0;
03294 }
03295
03296 case 420:
03297 extract_constrain_insn_cached (insn);
03298 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((get_attr_type (insn) == TYPE_ALU) || (which_alternative == 2))) && (get_attr_memory (insn) == MEMORY_BOTH)))
03299 {
03300 return 64 ;
03301 }
03302 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_BOTH)))
03303 {
03304 return 2;
03305 }
03306 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH)))
03307 {
03308 return 1;
03309 }
03310 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((get_attr_type (insn) == TYPE_ALU) || (which_alternative == 2))) && (get_attr_memory (insn) == MEMORY_LOAD)))
03311 {
03312 return 32 ;
03313 }
03314 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_LOAD)))
03315 {
03316 return 2;
03317 }
03318 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD)))
03319 {
03320 return 1;
03321 }
03322 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((get_attr_type (insn) == TYPE_ALU) || (which_alternative == 2))) && (get_attr_memory (insn) == MEMORY_NONE)))
03323 {
03324 return 4;
03325 }
03326 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_NONE)) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE))))
03327 {
03328 return 1;
03329 }
03330 else
03331 {
03332 return 0;
03333 }
03334
03335 case 419:
03336 case 418:
03337 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_BOTH)))
03338 {
03339 return 2;
03340 }
03341 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH)))
03342 {
03343 return 1;
03344 }
03345 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_LOAD)))
03346 {
03347 return 2;
03348 }
03349 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD)) || ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_NONE))) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE))))
03350 {
03351 return 1;
03352 }
03353 else
03354 {
03355 return 0;
03356 }
03357
03358 case 417:
03359 extract_constrain_insn_cached (insn);
03360 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_BOTH))))
03361 {
03362 return 64 ;
03363 }
03364 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_BOTH)))
03365 {
03366 return 2;
03367 }
03368 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH)))
03369 {
03370 return 1;
03371 }
03372 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD))))
03373 {
03374 return 32 ;
03375 }
03376 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_LOAD)))
03377 {
03378 return 2;
03379 }
03380 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD)))
03381 {
03382 return 1;
03383 }
03384 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE))))
03385 {
03386 return 4;
03387 }
03388 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_NONE)) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE))))
03389 {
03390 return 1;
03391 }
03392 else
03393 {
03394 return 0;
03395 }
03396
03397 case 416:
03398 extract_constrain_insn_cached (insn);
03399 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_BOTH)))
03400 {
03401 return 64 ;
03402 }
03403 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_BOTH)))
03404 {
03405 return 2;
03406 }
03407 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH)))
03408 {
03409 return 1;
03410 }
03411 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_LOAD)))
03412 {
03413 return 32 ;
03414 }
03415 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_LOAD)))
03416 {
03417 return 2;
03418 }
03419 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD)))
03420 {
03421 return 1;
03422 }
03423 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_NONE)))
03424 {
03425 return 4;
03426 }
03427 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_NONE)) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE))))
03428 {
03429 return 1;
03430 }
03431 else
03432 {
03433 return 0;
03434 }
03435
03436 case 414:
03437 extract_constrain_insn_cached (insn);
03438 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative != 0) || (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode))))) && (get_attr_memory (insn) == MEMORY_BOTH)))
03439 {
03440 return 64 ;
03441 }
03442 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_BOTH)))
03443 {
03444 return 2;
03445 }
03446 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH)))
03447 {
03448 return 1;
03449 }
03450 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative != 0) || (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode))))) && (get_attr_memory (insn) == MEMORY_LOAD)))
03451 {
03452 return 32 ;
03453 }
03454 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_LOAD)))
03455 {
03456 return 2;
03457 }
03458 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD)))
03459 {
03460 return 1;
03461 }
03462 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative != 0) || (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode))))) && (get_attr_memory (insn) == MEMORY_NONE)))
03463 {
03464 return 4;
03465 }
03466 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_NONE)) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE))))
03467 {
03468 return 1;
03469 }
03470 else
03471 {
03472 return 0;
03473 }
03474
03475 case 422:
03476 case 421:
03477 case 415:
03478 case 409:
03479 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_type (insn) == TYPE_ALU)) && (get_attr_memory (insn) == MEMORY_BOTH)))
03480 {
03481 return 64 ;
03482 }
03483 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_BOTH)))
03484 {
03485 return 2;
03486 }
03487 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH)))
03488 {
03489 return 1;
03490 }
03491 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_type (insn) == TYPE_ALU)) && (get_attr_memory (insn) == MEMORY_LOAD)))
03492 {
03493 return 32 ;
03494 }
03495 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_LOAD)))
03496 {
03497 return 2;
03498 }
03499 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD)))
03500 {
03501 return 1;
03502 }
03503 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_type (insn) == TYPE_ALU)) && (get_attr_memory (insn) == MEMORY_NONE)))
03504 {
03505 return 4;
03506 }
03507 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_NONE)) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE))))
03508 {
03509 return 1;
03510 }
03511 else
03512 {
03513 return 0;
03514 }
03515
03516 case 413:
03517 case 408:
03518 extract_constrain_insn_cached (insn);
03519 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative != 0) || (get_attr_type (insn) == TYPE_ALU))) && (get_attr_memory (insn) == MEMORY_BOTH)))
03520 {
03521 return 64 ;
03522 }
03523 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_BOTH)))
03524 {
03525 return 2;
03526 }
03527 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH)))
03528 {
03529 return 1;
03530 }
03531 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative != 0) || (get_attr_type (insn) == TYPE_ALU))) && (get_attr_memory (insn) == MEMORY_LOAD)))
03532 {
03533 return 32 ;
03534 }
03535 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_LOAD)))
03536 {
03537 return 2;
03538 }
03539 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD)))
03540 {
03541 return 1;
03542 }
03543 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative != 0) || (get_attr_type (insn) == TYPE_ALU))) && (get_attr_memory (insn) == MEMORY_NONE)))
03544 {
03545 return 4;
03546 }
03547 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_NONE)) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE))))
03548 {
03549 return 1;
03550 }
03551 else
03552 {
03553 return 0;
03554 }
03555
03556 case 406:
03557 case 404:
03558 case 401:
03559 case 400:
03560 case 398:
03561 case 359:
03562 case 358:
03563 case 357:
03564 case 356:
03565 case 355:
03566 case 354:
03567 case 353:
03568 case 352:
03569 case 351:
03570 case 350:
03571 extract_insn_cached (insn);
03572 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((memory_operand (operands[1], VOIDmode)) || (get_attr_memory (insn) == MEMORY_NONE)))
03573 {
03574 return 1;
03575 }
03576 else
03577 {
03578 return 0;
03579 }
03580
03581 case 292:
03582 extract_constrain_insn_cached (insn);
03583 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 0) || (which_alternative == 1))) && (get_attr_memory (insn) == MEMORY_BOTH)))
03584 {
03585 return 2;
03586 }
03587 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 0) && (which_alternative != 1))) && (get_attr_memory (insn) == MEMORY_BOTH)))
03588 {
03589 return 1;
03590 }
03591 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 0) || (which_alternative == 1))) && (get_attr_memory (insn) == MEMORY_LOAD)))
03592 {
03593 return 2;
03594 }
03595 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 0) && (which_alternative != 1))) && (get_attr_memory (insn) == MEMORY_LOAD)) || (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 0) || (which_alternative == 1))) && (get_attr_memory (insn) == MEMORY_NONE))) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 0) && (which_alternative != 1))) && (get_attr_memory (insn) == MEMORY_NONE))))
03596 {
03597 return 1;
03598 }
03599 else
03600 {
03601 return 0;
03602 }
03603
03604 case 288:
03605 extract_constrain_insn_cached (insn);
03606 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 0) || (which_alternative == 1))) && (get_attr_memory (insn) == MEMORY_BOTH)))
03607 {
03608 return 64 ;
03609 }
03610 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 0) && (which_alternative != 1))) && (get_attr_memory (insn) == MEMORY_BOTH)))
03611 {
03612 return 1;
03613 }
03614 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 0) || (which_alternative == 1))) && (get_attr_memory (insn) == MEMORY_LOAD)))
03615 {
03616 return 32 ;
03617 }
03618 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 0) && (which_alternative != 1))) && (get_attr_memory (insn) == MEMORY_LOAD)))
03619 {
03620 return 1;
03621 }
03622 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 0) || (which_alternative == 1))) && (get_attr_memory (insn) == MEMORY_NONE)))
03623 {
03624 return 4;
03625 }
03626 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 0) && (which_alternative != 1))) && (get_attr_memory (insn) == MEMORY_NONE)))
03627 {
03628 return 1;
03629 }
03630 else
03631 {
03632 return 0;
03633 }
03634
03635 case 286:
03636 extract_constrain_insn_cached (insn);
03637 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))) && (get_attr_memory (insn) == MEMORY_BOTH)))
03638 {
03639 return 64 ;
03640 }
03641 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2)))) && (get_attr_memory (insn) == MEMORY_BOTH)))
03642 {
03643 return 1;
03644 }
03645 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))) && (get_attr_memory (insn) == MEMORY_LOAD)))
03646 {
03647 return 32 ;
03648 }
03649 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2)))) && (get_attr_memory (insn) == MEMORY_LOAD)))
03650 {
03651 return 1;
03652 }
03653 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))) && (get_attr_memory (insn) == MEMORY_NONE)))
03654 {
03655 return 4;
03656 }
03657 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2)))) && (get_attr_memory (insn) == MEMORY_NONE)))
03658 {
03659 return 1;
03660 }
03661 else
03662 {
03663 return 0;
03664 }
03665
03666 case 279:
03667 extract_constrain_insn_cached (insn);
03668 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 0) || (which_alternative == 2)) && (get_attr_memory (insn) == MEMORY_LOAD)))
03669 {
03670 return 32 ;
03671 }
03672 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 0) && (which_alternative != 2)) && (get_attr_memory (insn) == MEMORY_LOAD)))
03673 {
03674 return 1;
03675 }
03676 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 0) || (which_alternative == 2)) && (get_attr_memory (insn) == MEMORY_NONE)))
03677 {
03678 return 4;
03679 }
03680 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 0) && (which_alternative != 2)) && (get_attr_memory (insn) == MEMORY_NONE)))
03681 {
03682 return 1;
03683 }
03684 else
03685 {
03686 return 0;
03687 }
03688
03689 case 278:
03690 case 277:
03691 extract_constrain_insn_cached (insn);
03692 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative != 1) && (get_attr_memory (insn) == MEMORY_LOAD)))
03693 {
03694 return 32 ;
03695 }
03696 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && (get_attr_memory (insn) == MEMORY_LOAD)))
03697 {
03698 return 1;
03699 }
03700 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative != 1) && (get_attr_memory (insn) == MEMORY_NONE)))
03701 {
03702 return 4;
03703 }
03704 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && (get_attr_memory (insn) == MEMORY_NONE)))
03705 {
03706 return 1;
03707 }
03708 else
03709 {
03710 return 0;
03711 }
03712
03713 case 276:
03714 extract_constrain_insn_cached (insn);
03715 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 1) && (which_alternative != 3)) && (get_attr_memory (insn) == MEMORY_LOAD)))
03716 {
03717 return 32 ;
03718 }
03719 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 1) || (which_alternative == 3)) && (get_attr_memory (insn) == MEMORY_LOAD)))
03720 {
03721 return 1;
03722 }
03723 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 1) && (which_alternative != 3)) && (get_attr_memory (insn) == MEMORY_NONE)))
03724 {
03725 return 4;
03726 }
03727 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 1) || (which_alternative == 3)) && (get_attr_memory (insn) == MEMORY_NONE)))
03728 {
03729 return 1;
03730 }
03731 else
03732 {
03733 return 0;
03734 }
03735
03736 case 337:
03737 case 336:
03738 case 335:
03739 case 315:
03740 case 314:
03741 case 313:
03742 case 293:
03743 case 240:
03744 case 239:
03745 case 238:
03746 case 214:
03747 case 212:
03748 case 211:
03749 case 210:
03750 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_BOTH)))
03751 {
03752 return 2;
03753 }
03754 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_BOTH)))
03755 {
03756 return 1;
03757 }
03758 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD)))
03759 {
03760 return 2;
03761 }
03762 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_LOAD)) || ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE))) || ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_NONE))))
03763 {
03764 return 1;
03765 }
03766 else
03767 {
03768 return 0;
03769 }
03770
03771 case 209:
03772 extract_constrain_insn_cached (insn);
03773 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (which_alternative == 2)) && (get_attr_memory (insn) == MEMORY_BOTH)))
03774 {
03775 return 64 ;
03776 }
03777 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_BOTH)))
03778 {
03779 return 2;
03780 }
03781 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH)))
03782 {
03783 return 1;
03784 }
03785 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (which_alternative == 2)) && (get_attr_memory (insn) == MEMORY_LOAD)))
03786 {
03787 return 32 ;
03788 }
03789 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_LOAD)))
03790 {
03791 return 2;
03792 }
03793 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD)))
03794 {
03795 return 1;
03796 }
03797 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (which_alternative == 2)) && (get_attr_memory (insn) == MEMORY_NONE)))
03798 {
03799 return 4;
03800 }
03801 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_NONE)) || ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE))))
03802 {
03803 return 1;
03804 }
03805 else
03806 {
03807 return 0;
03808 }
03809
03810 case 215:
03811 case 202:
03812 case 201:
03813 case 196:
03814 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_BOTH)))
03815 {
03816 return 64 ;
03817 }
03818 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH)))
03819 {
03820 return 1;
03821 }
03822 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_LOAD)))
03823 {
03824 return 32 ;
03825 }
03826 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD)))
03827 {
03828 return 1;
03829 }
03830 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_NONE)))
03831 {
03832 return 4;
03833 }
03834 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE)))
03835 {
03836 return 1;
03837 }
03838 else
03839 {
03840 return 0;
03841 }
03842
03843 case 348:
03844 case 347:
03845 case 346:
03846 case 344:
03847 case 343:
03848 case 342:
03849 case 341:
03850 case 340:
03851 case 338:
03852 case 334:
03853 case 333:
03854 case 332:
03855 case 331:
03856 case 330:
03857 case 329:
03858 case 328:
03859 case 327:
03860 case 326:
03861 case 325:
03862 case 324:
03863 case 323:
03864 case 322:
03865 case 321:
03866 case 320:
03867 case 318:
03868 case 316:
03869 case 312:
03870 case 311:
03871 case 310:
03872 case 309:
03873 case 308:
03874 case 307:
03875 case 306:
03876 case 305:
03877 case 304:
03878 case 303:
03879 case 302:
03880 case 301:
03881 case 300:
03882 case 299:
03883 case 298:
03884 case 296:
03885 case 294:
03886 case 291:
03887 case 290:
03888 case 289:
03889 case 287:
03890 case 244:
03891 case 243:
03892 case 241:
03893 case 237:
03894 case 236:
03895 case 235:
03896 case 234:
03897 case 233:
03898 case 232:
03899 case 229:
03900 case 228:
03901 case 227:
03902 case 224:
03903 case 223:
03904 case 222:
03905 case 221:
03906 case 220:
03907 case 219:
03908 case 218:
03909 case 217:
03910 case 216:
03911 case 213:
03912 case 208:
03913 case 207:
03914 case 206:
03915 case 205:
03916 case 204:
03917 case 203:
03918 case 200:
03919 case 199:
03920 case 198:
03921 case 197:
03922 case 185:
03923 case 184:
03924 case 181:
03925 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_BOTH)))
03926 {
03927 return 64 ;
03928 }
03929 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_BOTH)))
03930 {
03931 return 1;
03932 }
03933 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD)))
03934 {
03935 return 32 ;
03936 }
03937 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_LOAD)))
03938 {
03939 return 1;
03940 }
03941 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE)))
03942 {
03943 return 4;
03944 }
03945 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_NONE)))
03946 {
03947 return 1;
03948 }
03949 else
03950 {
03951 return 0;
03952 }
03953
03954 case 231:
03955 case 230:
03956 case 226:
03957 case 183:
03958 case 182:
03959 case 180:
03960 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_memory (insn) == MEMORY_BOTH) || (get_attr_memory (insn) == MEMORY_LOAD)))
03961 {
03962 return 2;
03963 }
03964 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
03965 {
03966 return 1;
03967 }
03968 else
03969 {
03970 return 0;
03971 }
03972
03973 case 178:
03974 case 177:
03975 case 176:
03976 case 175:
03977 case 174:
03978 case 173:
03979 extract_constrain_insn_cached (insn);
03980 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 0) && (((get_attr_memory (insn) == MEMORY_NONE) || (get_attr_memory (insn) == MEMORY_LOAD)) || (((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_STORE)) || ((immediate_operand (operands[1], VOIDmode)) || (get_attr_memory (insn) == MEMORY_STORE))))) || (((get_attr_memory (insn) == MEMORY_BOTH) || (get_attr_memory (insn) == MEMORY_LOAD)) || (get_attr_memory (insn) == MEMORY_NONE))))
03981 {
03982 return 1;
03983 }
03984 else
03985 {
03986 return 0;
03987 }
03988
03989 case 953:
03990 case 884:
03991 case 883:
03992 case 882:
03993 case 881:
03994 case 864:
03995 case 851:
03996 case 814:
03997 case 813:
03998 case 770:
03999 case 769:
04000 case 645:
04001 case 644:
04002 case 638:
04003 case 636:
04004 case 635:
04005 case 634:
04006 case 633:
04007 case 632:
04008 case 631:
04009 case 630:
04010 case 629:
04011 case 628:
04012 case 627:
04013 case 626:
04014 case 625:
04015 case 624:
04016 case 623:
04017 case 622:
04018 case 621:
04019 case 620:
04020 case 619:
04021 case 618:
04022 case 617:
04023 case 616:
04024 case 615:
04025 case 614:
04026 case 613:
04027 case 612:
04028 case 611:
04029 case 610:
04030 case 609:
04031 case 608:
04032 case 607:
04033 case 606:
04034 case 605:
04035 case 604:
04036 case 603:
04037 case 602:
04038 case 601:
04039 case 600:
04040 case 599:
04041 case 598:
04042 case 597:
04043 case 596:
04044 case 595:
04045 case 594:
04046 case 593:
04047 case 592:
04048 case 591:
04049 case 590:
04050 case 589:
04051 case 588:
04052 case 587:
04053 case 584:
04054 case 500:
04055 case 499:
04056 case 275:
04057 case 274:
04058 case 272:
04059 case 269:
04060 case 266:
04061 case 263:
04062 case 262:
04063 case 261:
04064 case 260:
04065 case 259:
04066 case 258:
04067 case 257:
04068 case 256:
04069 case 255:
04070 case 254:
04071 case 253:
04072 case 252:
04073 case 251:
04074 case 250:
04075 case 249:
04076 case 248:
04077 case 247:
04078 case 246:
04079 case 245:
04080 case 158:
04081 case 157:
04082 case 156:
04083 case 153:
04084 case 152:
04085 case 151:
04086 case 148:
04087 case 147:
04088 case 146:
04089 if (((ix86_cpu) == (CPU_PENTIUM)))
04090 {
04091 return 1;
04092 }
04093 else
04094 {
04095 return 0;
04096 }
04097
04098 case 145:
04099 case 143:
04100 case 141:
04101 case 139:
04102 case 136:
04103 extract_insn_cached (insn);
04104 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((get_attr_memory (insn) == MEMORY_NONE) || (get_attr_memory (insn) == MEMORY_LOAD)) || ((immediate_operand (operands[1], VOIDmode)) || (get_attr_memory (insn) == MEMORY_STORE))) || (((get_attr_memory (insn) == MEMORY_BOTH) || (get_attr_memory (insn) == MEMORY_LOAD)) || (get_attr_memory (insn) == MEMORY_NONE))))
04105 {
04106 return 1;
04107 }
04108 else
04109 {
04110 return 0;
04111 }
04112
04113 case 135:
04114 extract_constrain_insn_cached (insn);
04115 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 1) && (((get_attr_memory (insn) == MEMORY_NONE) || (get_attr_memory (insn) == MEMORY_LOAD)) || ((immediate_operand (operands[1], VOIDmode)) || (get_attr_memory (insn) == MEMORY_STORE)))) || (((get_attr_memory (insn) == MEMORY_BOTH) || (get_attr_memory (insn) == MEMORY_LOAD)) || (get_attr_memory (insn) == MEMORY_NONE))))
04116 {
04117 return 1;
04118 }
04119 else
04120 {
04121 return 0;
04122 }
04123
04124 case 171:
04125 case 170:
04126 case 168:
04127 case 167:
04128 case 165:
04129 case 164:
04130 case 162:
04131 case 161:
04132 case 144:
04133 case 142:
04134 case 140:
04135 case 138:
04136 case 134:
04137 case 133:
04138 extract_constrain_insn_cached (insn);
04139 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 0) && (((get_attr_memory (insn) == MEMORY_NONE) || (get_attr_memory (insn) == MEMORY_LOAD)) || ((immediate_operand (operands[1], VOIDmode)) || (get_attr_memory (insn) == MEMORY_STORE)))) || (((get_attr_memory (insn) == MEMORY_BOTH) || (get_attr_memory (insn) == MEMORY_LOAD)) || (get_attr_memory (insn) == MEMORY_NONE))))
04140 {
04141 return 1;
04142 }
04143 else
04144 {
04145 return 0;
04146 }
04147
04148 case 132:
04149 case 131:
04150 case 130:
04151 case 129:
04152 extract_constrain_insn_cached (insn);
04153 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((get_attr_memory (insn) == MEMORY_NONE) || (get_attr_memory (insn) == MEMORY_LOAD)) || (((which_alternative == 1) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_STORE))) || ((immediate_operand (operands[1], VOIDmode)) || (get_attr_memory (insn) == MEMORY_STORE)))) || (((get_attr_memory (insn) == MEMORY_BOTH) || (get_attr_memory (insn) == MEMORY_LOAD)) || (get_attr_memory (insn) == MEMORY_NONE))))
04154 {
04155 return 1;
04156 }
04157 else
04158 {
04159 return 0;
04160 }
04161
04162 case 127:
04163 extract_constrain_insn_cached (insn);
04164 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((which_alternative == 0) || (which_alternative == 1)) && (((get_attr_memory (insn) == MEMORY_NONE) || (get_attr_memory (insn) == MEMORY_LOAD)) || ((((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_STORE)) && (which_alternative == 1)) || ((immediate_operand (operands[1], VOIDmode)) || (get_attr_memory (insn) == MEMORY_STORE))))) || (((get_attr_memory (insn) == MEMORY_BOTH) || (get_attr_memory (insn) == MEMORY_LOAD)) || (get_attr_memory (insn) == MEMORY_NONE))))
04165 {
04166 return 1;
04167 }
04168 else
04169 {
04170 return 0;
04171 }
04172
04173 case 115:
04174 extract_constrain_insn_cached (insn);
04175 if ((which_alternative == 1) && (((ix86_cpu) == (CPU_PENTIUM))))
04176 {
04177 return 4;
04178 }
04179 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 1) || (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_BOTH)))
04180 {
04181 return 1;
04182 }
04183 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD))))
04184 {
04185 return 32 ;
04186 }
04187 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 1) || (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD)))
04188 {
04189 return 1;
04190 }
04191 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE))))
04192 {
04193 return 4;
04194 }
04195 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 1) || (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE)))
04196 {
04197 return 1;
04198 }
04199 else
04200 {
04201 return 0;
04202 }
04203
04204 case 112:
04205 extract_constrain_insn_cached (insn);
04206 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_BOTH))))
04207 {
04208 return 64 ;
04209 }
04210 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 1) || (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_BOTH)))
04211 {
04212 return 1;
04213 }
04214 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD))))
04215 {
04216 return 32 ;
04217 }
04218 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 1) || (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD)))
04219 {
04220 return 1;
04221 }
04222 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE))))
04223 {
04224 return 4;
04225 }
04226 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 1) || (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE)))
04227 {
04228 return 1;
04229 }
04230 else
04231 {
04232 return 0;
04233 }
04234
04235 case 109:
04236 extract_constrain_insn_cached (insn);
04237 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_BOTH))))
04238 {
04239 return 2;
04240 }
04241 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 1) || (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_BOTH)))
04242 {
04243 return 1;
04244 }
04245 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD))))
04246 {
04247 return 2;
04248 }
04249 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((((which_alternative != 1) || (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD)) || ((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE)))) || (((which_alternative != 1) || (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE))))
04250 {
04251 return 1;
04252 }
04253 else
04254 {
04255 return 0;
04256 }
04257
04258 case 103:
04259 case 102:
04260 case 101:
04261 case 100:
04262 extract_constrain_insn_cached (insn);
04263 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && (((get_attr_memory (insn) == MEMORY_NONE) || (get_attr_memory (insn) == MEMORY_LOAD)) || (((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_STORE)) || ((immediate_operand (operands[1], VOIDmode)) || (get_attr_memory (insn) == MEMORY_STORE))))) || (((get_attr_memory (insn) == MEMORY_BOTH) || (get_attr_memory (insn) == MEMORY_LOAD)) || (get_attr_memory (insn) == MEMORY_NONE))))
04264 {
04265 return 1;
04266 }
04267 else
04268 {
04269 return 0;
04270 }
04271
04272 case 94:
04273 case 93:
04274 extract_constrain_insn_cached (insn);
04275 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && (((get_attr_memory (insn) == MEMORY_NONE) || (get_attr_memory (insn) == MEMORY_LOAD)) || ((immediate_operand (operands[1], VOIDmode)) || (get_attr_memory (insn) == MEMORY_STORE)))) || (((get_attr_memory (insn) == MEMORY_BOTH) || (get_attr_memory (insn) == MEMORY_LOAD)) || (get_attr_memory (insn) == MEMORY_NONE))))
04276 {
04277 return 1;
04278 }
04279 else
04280 {
04281 return 0;
04282 }
04283
04284 case 89:
04285 extract_constrain_insn_cached (insn);
04286 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && (((get_attr_memory (insn) == MEMORY_NONE) || (get_attr_memory (insn) == MEMORY_LOAD)) || ((immediate_operand (operands[1], VOIDmode)) || (get_attr_memory (insn) == MEMORY_STORE)))))
04287 {
04288 return 1;
04289 }
04290 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 3) || (which_alternative == 4))))
04291 {
04292 return 4;
04293 }
04294 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 3) || (which_alternative == 4))) && (get_attr_memory (insn) == MEMORY_BOTH)))
04295 {
04296 return 64 ;
04297 }
04298 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (((which_alternative == 3) || (which_alternative == 4)) && ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && (((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8)))) || ((which_alternative != 3) && ((which_alternative != 4) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (which_alternative != 8)))))))) || ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8))))) && ((which_alternative == 0) || ((which_alternative == 1) || ((which_alternative == 2) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8)))))))))) && (get_attr_memory (insn) == MEMORY_BOTH)))
04299 {
04300 return 2;
04301 }
04302 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) || ((which_alternative != 3) && (which_alternative != 4)))) && (get_attr_memory (insn) == MEMORY_BOTH)))
04303 {
04304 return 1;
04305 }
04306 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 3) || (which_alternative == 4))) && (get_attr_memory (insn) == MEMORY_LOAD)))
04307 {
04308 return 32 ;
04309 }
04310 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (((which_alternative == 3) || (which_alternative == 4)) && ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && (((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8)))) || ((which_alternative != 3) && ((which_alternative != 4) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (which_alternative != 8)))))))) || ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8))))) && ((which_alternative == 0) || ((which_alternative == 1) || ((which_alternative == 2) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8)))))))))) && (get_attr_memory (insn) == MEMORY_LOAD)))
04311 {
04312 return 2;
04313 }
04314 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) || ((which_alternative != 3) && (which_alternative != 4)))) && (get_attr_memory (insn) == MEMORY_LOAD)))
04315 {
04316 return 1;
04317 }
04318 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 3) || (which_alternative == 4))) && (get_attr_memory (insn) == MEMORY_NONE)))
04319 {
04320 return 4;
04321 }
04322 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (((which_alternative == 3) || (which_alternative == 4)) && ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && (((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8)))) || ((which_alternative != 3) && ((which_alternative != 4) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (which_alternative != 8)))))))) || ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8))))) && ((which_alternative == 0) || ((which_alternative == 1) || ((which_alternative == 2) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8)))))))))) && (get_attr_memory (insn) == MEMORY_NONE)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) || ((which_alternative != 3) && (which_alternative != 4)))) && (get_attr_memory (insn) == MEMORY_NONE))))
04323 {
04324 return 1;
04325 }
04326 else
04327 {
04328 return 0;
04329 }
04330
04331 case 88:
04332 case 87:
04333 extract_constrain_insn_cached (insn);
04334 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && (! (memory_operand (operands[1], VOIDmode)))))
04335 {
04336 return 4;
04337 }
04338 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 1) || (memory_operand (operands[1], VOIDmode))) && ((which_alternative == 1) && (memory_operand (operands[1], VOIDmode)))))
04339 {
04340 return 1;
04341 }
04342 else
04343 {
04344 return 0;
04345 }
04346
04347 case 83:
04348 extract_constrain_insn_cached (insn);
04349 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative != 7) && ((which_alternative != 8) && ((which_alternative != 9) && ((which_alternative != 4) && ((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], DImode))))))))))
04350 {
04351 return 4;
04352 }
04353 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_BOTH)))
04354 {
04355 return 64 ;
04356 }
04357 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH)))
04358 {
04359 return 1;
04360 }
04361 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_LOAD)))
04362 {
04363 return 32 ;
04364 }
04365 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD)))
04366 {
04367 return 1;
04368 }
04369 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_NONE)))
04370 {
04371 return 4;
04372 }
04373 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE)))
04374 {
04375 return 1;
04376 }
04377 else
04378 {
04379 return 0;
04380 }
04381
04382 case 76:
04383 extract_constrain_insn_cached (insn);
04384 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 0) && (! (memory_operand (operands[1], VOIDmode)))))
04385 {
04386 return 4;
04387 }
04388 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 0) || (memory_operand (operands[1], VOIDmode))) && ((which_alternative == 0) && (memory_operand (operands[1], VOIDmode)))))
04389 {
04390 return 1;
04391 }
04392 else
04393 {
04394 return 0;
04395 }
04396
04397 case 71:
04398 extract_constrain_insn_cached (insn);
04399 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((q_regs_operand (operands[0], QImode)) && (! ((TARGET_MOVX) != (0)))))
04400 {
04401 return 4;
04402 }
04403 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((q_regs_operand (operands[0], QImode)) && (! ((TARGET_MOVX) != (0))))) && (get_attr_memory (insn) == MEMORY_BOTH)))
04404 {
04405 return 64 ;
04406 }
04407 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((! (q_regs_operand (operands[0], QImode))) || ((TARGET_MOVX) != (0)))) && (get_attr_memory (insn) == MEMORY_BOTH)))
04408 {
04409 return 1;
04410 }
04411 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((q_regs_operand (operands[0], QImode)) && (! ((TARGET_MOVX) != (0))))) && (get_attr_memory (insn) == MEMORY_LOAD)))
04412 {
04413 return 32 ;
04414 }
04415 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((! (q_regs_operand (operands[0], QImode))) || ((TARGET_MOVX) != (0)))) && (get_attr_memory (insn) == MEMORY_LOAD)))
04416 {
04417 return 1;
04418 }
04419 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((q_regs_operand (operands[0], QImode)) && (! ((TARGET_MOVX) != (0))))) && (get_attr_memory (insn) == MEMORY_NONE)))
04420 {
04421 return 4;
04422 }
04423 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((! (q_regs_operand (operands[0], QImode))) || ((TARGET_MOVX) != (0)))) && (get_attr_memory (insn) == MEMORY_NONE)))
04424 {
04425 return 1;
04426 }
04427 else
04428 {
04429 return 0;
04430 }
04431
04432 case 70:
04433 case 66:
04434 case 65:
04435 if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_IMOV))
04436 {
04437 return 4;
04438 }
04439 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (get_attr_type (insn) == TYPE_IMOV))) && (get_attr_memory (insn) == MEMORY_BOTH)))
04440 {
04441 return 1;
04442 }
04443 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_type (insn) == TYPE_IMOV)) && (get_attr_memory (insn) == MEMORY_LOAD)))
04444 {
04445 return 32 ;
04446 }
04447 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (get_attr_type (insn) == TYPE_IMOV))) && (get_attr_memory (insn) == MEMORY_LOAD)))
04448 {
04449 return 1;
04450 }
04451 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_type (insn) == TYPE_IMOV)) && (get_attr_memory (insn) == MEMORY_NONE)))
04452 {
04453 return 4;
04454 }
04455 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (get_attr_type (insn) == TYPE_IMOV))) && (get_attr_memory (insn) == MEMORY_NONE)))
04456 {
04457 return 1;
04458 }
04459 else
04460 {
04461 return 0;
04462 }
04463
04464 case 74:
04465 case 73:
04466 case 72:
04467 case 61:
04468 if (((ix86_cpu) == (CPU_PENTIUM)))
04469 {
04470 return 4;
04471 }
04472 else
04473 {
04474 return 0;
04475 }
04476
04477 case 59:
04478 extract_constrain_insn_cached (insn);
04479 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2)))))))
04480 {
04481 return 4;
04482 }
04483 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2)))))) && (((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2))))))) && (get_attr_memory (insn) == MEMORY_BOTH)))
04484 {
04485 return 64 ;
04486 }
04487 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2))))) && (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2))))))) && (get_attr_memory (insn) == MEMORY_BOTH)))
04488 {
04489 return 2;
04490 }
04491 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && (((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2))))))) && (get_attr_memory (insn) == MEMORY_BOTH)))
04492 {
04493 return 1;
04494 }
04495 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2)))))) && (((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2))))))) && (get_attr_memory (insn) == MEMORY_LOAD)))
04496 {
04497 return 32 ;
04498 }
04499 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2))))) && (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2))))))) && (get_attr_memory (insn) == MEMORY_LOAD)))
04500 {
04501 return 2;
04502 }
04503 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && (((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2))))))) && (get_attr_memory (insn) == MEMORY_LOAD)))
04504 {
04505 return 1;
04506 }
04507 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2)))))) && (((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2))))))) && (get_attr_memory (insn) == MEMORY_NONE)))
04508 {
04509 return 4;
04510 }
04511 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2))))) && (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2))))))) && (get_attr_memory (insn) == MEMORY_NONE)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && (((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2))))))) && (get_attr_memory (insn) == MEMORY_NONE))))
04512 {
04513 return 1;
04514 }
04515 else
04516 {
04517 return 0;
04518 }
04519
04520 case 405:
04521 case 108:
04522 case 56:
04523 extract_insn_cached (insn);
04524 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (memory_operand (operands[1], VOIDmode))))
04525 {
04526 return 2;
04527 }
04528 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (memory_operand (operands[1], VOIDmode))) || ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE))) || ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_NONE))))
04529 {
04530 return 1;
04531 }
04532 else
04533 {
04534 return 0;
04535 }
04536
04537 case 55:
04538 if (((ix86_cpu) == (CPU_PENTIUM)))
04539 {
04540 return 4;
04541 }
04542 else
04543 {
04544 return 0;
04545 }
04546
04547 case 52:
04548 if (((ix86_cpu) == (CPU_PENTIUM)))
04549 {
04550 return 4;
04551 }
04552 else
04553 {
04554 return 0;
04555 }
04556
04557 case 50:
04558 if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_IMOV))
04559 {
04560 return 4;
04561 }
04562 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_BOTH)))
04563 {
04564 return 64 ;
04565 }
04566 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_BOTH)))
04567 {
04568 return 2;
04569 }
04570 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (get_attr_type (insn) == TYPE_IMOV))) && (get_attr_memory (insn) == MEMORY_BOTH)))
04571 {
04572 return 1;
04573 }
04574 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_LOAD)))
04575 {
04576 return 32 ;
04577 }
04578 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_LOAD)))
04579 {
04580 return 2;
04581 }
04582 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (get_attr_type (insn) == TYPE_IMOV))) && (get_attr_memory (insn) == MEMORY_LOAD)))
04583 {
04584 return 1;
04585 }
04586 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_NONE)))
04587 {
04588 return 4;
04589 }
04590 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_NONE)) || (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (get_attr_type (insn) == TYPE_IMOV))) && (get_attr_memory (insn) == MEMORY_NONE))))
04591 {
04592 return 1;
04593 }
04594 else
04595 {
04596 return 0;
04597 }
04598
04599 case 86:
04600 case 60:
04601 case 54:
04602 case 53:
04603 case 47:
04604 if (((ix86_cpu) == (CPU_PENTIUM)))
04605 {
04606 return 4;
04607 }
04608 else
04609 {
04610 return 0;
04611 }
04612
04613 case 85:
04614 case 68:
04615 case 46:
04616 if (((ix86_cpu) == (CPU_PENTIUM)))
04617 {
04618 return 4;
04619 }
04620 else
04621 {
04622 return 0;
04623 }
04624
04625 case 195:
04626 case 194:
04627 case 193:
04628 case 192:
04629 case 191:
04630 case 190:
04631 case 189:
04632 case 188:
04633 case 187:
04634 case 186:
04635 case 84:
04636 case 67:
04637 case 51:
04638 case 45:
04639 if (((ix86_cpu) == (CPU_PENTIUM)))
04640 {
04641 return 4;
04642 }
04643 else
04644 {
04645 return 0;
04646 }
04647
04648 case 44:
04649 extract_constrain_insn_cached (insn);
04650 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && ((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], SImode)))))))))
04651 {
04652 return 4;
04653 }
04654 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_BOTH)))
04655 {
04656 return 64 ;
04657 }
04658 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH)))
04659 {
04660 return 1;
04661 }
04662 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_LOAD)))
04663 {
04664 return 32 ;
04665 }
04666 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD)))
04667 {
04668 return 1;
04669 }
04670 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_NONE)))
04671 {
04672 return 4;
04673 }
04674 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE)))
04675 {
04676 return 1;
04677 }
04678 else
04679 {
04680 return 0;
04681 }
04682
04683 case 407:
04684 case 403:
04685 case 402:
04686 case 399:
04687 case 345:
04688 case 339:
04689 case 319:
04690 case 317:
04691 case 297:
04692 case 295:
04693 case 242:
04694 case 111:
04695 case 106:
04696 case 81:
04697 case 80:
04698 case 62:
04699 case 43:
04700 case 42:
04701 extract_insn_cached (insn);
04702 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (memory_operand (operands[1], VOIDmode))))
04703 {
04704 return 64 ;
04705 }
04706 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (memory_operand (operands[1], VOIDmode))))
04707 {
04708 return 1;
04709 }
04710 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE)))
04711 {
04712 return 4;
04713 }
04714 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_NONE)))
04715 {
04716 return 1;
04717 }
04718 else
04719 {
04720 return 0;
04721 }
04722
04723 case 79:
04724 case 78:
04725 case 41:
04726 case 40:
04727 extract_insn_cached (insn);
04728 if (((ix86_cpu) == (CPU_PENTIUM)))
04729 {
04730 return 4;
04731 }
04732 else
04733 {
04734 return 0;
04735 }
04736
04737 case 77:
04738 case 58:
04739 case 57:
04740 case 49:
04741 case 48:
04742 case 39:
04743 case 38:
04744 case 37:
04745 extract_insn_cached (insn);
04746 if ((((ix86_cpu) == (CPU_PENTIUM))) && (! (memory_operand (operands[1], VOIDmode))))
04747 {
04748 return 4;
04749 }
04750 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (memory_operand (operands[1], VOIDmode)))
04751 {
04752 return 1;
04753 }
04754 else
04755 {
04756 return 0;
04757 }
04758
04759 case 967:
04760 case 966:
04761 case 965:
04762 case 964:
04763 case 963:
04764 case 962:
04765 case 904:
04766 case 903:
04767 case 902:
04768 case 901:
04769 case 900:
04770 case 899:
04771 case 860:
04772 case 859:
04773 case 858:
04774 case 828:
04775 case 827:
04776 case 826:
04777 case 825:
04778 case 824:
04779 case 823:
04780 case 776:
04781 case 775:
04782 case 774:
04783 case 773:
04784 case 772:
04785 case 771:
04786 case 502:
04787 case 501:
04788 case 280:
04789 case 36:
04790 case 35:
04791 case 34:
04792 case 33:
04793 case 32:
04794 case 31:
04795 case 27:
04796 case 24:
04797 case 23:
04798 case 21:
04799 case 20:
04800 case 19:
04801 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_NONE)))
04802 {
04803 return 1;
04804 }
04805 else
04806 {
04807 return 0;
04808 }
04809
04810 case 8:
04811 case 7:
04812 case 6:
04813 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD)))
04814 {
04815 return 2;
04816 }
04817 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_LOAD)) || ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE))) || ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_NONE))))
04818 {
04819 return 1;
04820 }
04821 else
04822 {
04823 return 0;
04824 }
04825
04826 case 283:
04827 case 282:
04828 case 281:
04829 case 17:
04830 case 16:
04831 case 15:
04832 case 14:
04833 case 13:
04834 case 12:
04835 case 11:
04836 case 10:
04837 case 9:
04838 case 5:
04839 case 4:
04840 case 3:
04841 case 2:
04842 case 1:
04843 case 0:
04844 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD)))
04845 {
04846 return 32 ;
04847 }
04848 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_LOAD)))
04849 {
04850 return 1;
04851 }
04852 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE)))
04853 {
04854 return 4;
04855 }
04856 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_NONE)))
04857 {
04858 return 1;
04859 }
04860 else
04861 {
04862 return 0;
04863 }
04864
04865 case -1:
04866 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
04867 && asm_noperands (PATTERN (insn)) < 0)
04868 fatal_insn_not_found (insn);
04869 case 1024:
04870 case 1023:
04871 case 1022:
04872 case 1021:
04873 case 1020:
04874 case 854:
04875 case 853:
04876 case 852:
04877 case 850:
04878 case 708:
04879 case 707:
04880 case 706:
04881 case 705:
04882 case 704:
04883 case 703:
04884 case 702:
04885 case 701:
04886 case 700:
04887 case 699:
04888 case 698:
04889 case 697:
04890 case 696:
04891 case 695:
04892 case 694:
04893 case 693:
04894 case 692:
04895 case 681:
04896 case 680:
04897 case 673:
04898 case 672:
04899 case 671:
04900 case 670:
04901 case 669:
04902 case 668:
04903 case 667:
04904 case 666:
04905 case 665:
04906 case 664:
04907 case 663:
04908 case 662:
04909 case 661:
04910 case 660:
04911 case 656:
04912 case 655:
04913 case 653:
04914 case 652:
04915 case 650:
04916 case 649:
04917 case 647:
04918 case 646:
04919 case 543:
04920 case 542:
04921 case 541:
04922 case 540:
04923 case 539:
04924 case 538:
04925 case 537:
04926 case 536:
04927 case 535:
04928 case 534:
04929 case 533:
04930 case 532:
04931 case 531:
04932 case 530:
04933 case 528:
04934 case 527:
04935 case 526:
04936 case 514:
04937 case 513:
04938 case 512:
04939 case 511:
04940 case 510:
04941 case 509:
04942 case 508:
04943 case 507:
04944 case 506:
04945 case 505:
04946 case 456:
04947 case 455:
04948 case 429:
04949 case 428:
04950 case 411:
04951 case 410:
04952 case 388:
04953 case 387:
04954 case 386:
04955 case 385:
04956 case 384:
04957 case 383:
04958 case 382:
04959 case 381:
04960 case 380:
04961 case 379:
04962 case 369:
04963 case 368:
04964 case 367:
04965 case 366:
04966 case 365:
04967 case 364:
04968 case 363:
04969 case 362:
04970 case 361:
04971 case 360:
04972 case 349:
04973 case 285:
04974 case 284:
04975 case 273:
04976 case 271:
04977 case 270:
04978 case 268:
04979 case 267:
04980 case 265:
04981 case 264:
04982 case 225:
04983 case 179:
04984 case 160:
04985 case 159:
04986 case 118:
04987 case 114:
04988 case 99:
04989 case 98:
04990 case 97:
04991 case 96:
04992 case 92:
04993 case 91:
04994 case 75:
04995 case 30:
04996 case 29:
04997 case 28:
04998 case 26:
04999 case 25:
05000 case 22:
05001 case 18:
05002 return 0;
05003
05004 default:
05005 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_memory (insn) == MEMORY_BOTH) || ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_NONE))))
05006 {
05007 return 1;
05008 }
05009 else
05010 {
05011 return 0;
05012 }
05013
05014 }
05015 }
05016
05017 extern int internal_dfa_insn_code PARAMS ((rtx));
05018 int
05019 internal_dfa_insn_code (insn)
05020 rtx insn;
05021 {
05022 switch (recog_memoized (insn))
05023 {
05024 case 851:
05025 if (((ix86_cpu) == (CPU_PENTIUM)))
05026 {
05027 return 23 ;
05028 }
05029 else
05030 {
05031 return 29 ;
05032 }
05033
05034 case 679:
05035 case 678:
05036 case 677:
05037 case 676:
05038 case 675:
05039 case 674:
05040 extract_insn_cached (insn);
05041 if (((ix86_cpu) == (CPU_PENTIUM)))
05042 {
05043 return 10 ;
05044 }
05045 else
05046 {
05047 return 29 ;
05048 }
05049
05050 case 659:
05051 extract_constrain_insn_cached (insn);
05052 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && (const0_operand (operands[2], DImode))))
05053 {
05054 return 7;
05055 }
05056 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_BOTH)))
05057 {
05058 return 16 ;
05059 }
05060 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_BOTH)))
05061 {
05062 return 19 ;
05063 }
05064 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD)))
05065 {
05066 return 20 ;
05067 }
05068 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_LOAD)))
05069 {
05070 return 23 ;
05071 }
05072 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE)))
05073 {
05074 return 24 ;
05075 }
05076 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_NONE)))
05077 {
05078 return 27 ;
05079 }
05080 else
05081 {
05082 return 29 ;
05083 }
05084
05085 case 658:
05086 extract_constrain_insn_cached (insn);
05087 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && (const0_operand (operands[2], SImode))))
05088 {
05089 return 7;
05090 }
05091 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_BOTH)))
05092 {
05093 return 16 ;
05094 }
05095 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_BOTH)))
05096 {
05097 return 19 ;
05098 }
05099 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD)))
05100 {
05101 return 20 ;
05102 }
05103 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_LOAD)))
05104 {
05105 return 23 ;
05106 }
05107 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE)))
05108 {
05109 return 24 ;
05110 }
05111 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_NONE)))
05112 {
05113 return 27 ;
05114 }
05115 else
05116 {
05117 return 29 ;
05118 }
05119
05120 case 953:
05121 case 884:
05122 case 883:
05123 case 882:
05124 case 881:
05125 case 864:
05126 case 814:
05127 case 813:
05128 case 770:
05129 case 769:
05130 case 645:
05131 case 644:
05132 if (((ix86_cpu) == (CPU_PENTIUM)))
05133 {
05134 return 27 ;
05135 }
05136 else
05137 {
05138 return 29 ;
05139 }
05140
05141 case 642:
05142 extract_constrain_insn_cached (insn);
05143 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 2) && (which_alternative != 3)) && ((which_alternative == 0) || (which_alternative == 1))))
05144 {
05145 return 27 ;
05146 }
05147 else
05148 {
05149 return 29 ;
05150 }
05151
05152 case 638:
05153 case 636:
05154 if (((ix86_cpu) == (CPU_PENTIUM)))
05155 {
05156 return 25 ;
05157 }
05158 else
05159 {
05160 return 29 ;
05161 }
05162
05163 case 635:
05164 case 634:
05165 case 633:
05166 case 632:
05167 case 631:
05168 case 630:
05169 case 629:
05170 case 628:
05171 case 627:
05172 case 626:
05173 case 625:
05174 case 624:
05175 case 623:
05176 case 622:
05177 case 621:
05178 case 620:
05179 case 619:
05180 case 618:
05181 if (((ix86_cpu) == (CPU_PENTIUM)))
05182 {
05183 return 1;
05184 }
05185 else
05186 {
05187 return 29 ;
05188 }
05189
05190 case 617:
05191 case 616:
05192 case 615:
05193 case 614:
05194 case 613:
05195 case 612:
05196 case 611:
05197 case 610:
05198 case 609:
05199 case 608:
05200 case 607:
05201 case 606:
05202 if (((ix86_cpu) == (CPU_PENTIUM)))
05203 {
05204 return 1;
05205 }
05206 else
05207 {
05208 return 29 ;
05209 }
05210
05211 case 605:
05212 if (((ix86_cpu) == (CPU_PENTIUM)))
05213 {
05214 return 3;
05215 }
05216 else
05217 {
05218 return 29 ;
05219 }
05220
05221 case 604:
05222 case 603:
05223 case 602:
05224 case 601:
05225 case 600:
05226 case 599:
05227 case 598:
05228 case 597:
05229 case 596:
05230 case 595:
05231 case 594:
05232 case 593:
05233 case 592:
05234 case 591:
05235 case 590:
05236 case 589:
05237 case 588:
05238 case 587:
05239 case 584:
05240 if (((ix86_cpu) == (CPU_PENTIUM)))
05241 {
05242 return 15 ;
05243 }
05244 else
05245 {
05246 return 29 ;
05247 }
05248
05249 case 585:
05250 case 582:
05251 extract_constrain_insn_cached (insn);
05252 if ((((ix86_cpu) == (CPU_PENTIUM))) && (which_alternative == 0))
05253 {
05254 return 15 ;
05255 }
05256 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
05257 {
05258 return 19 ;
05259 }
05260 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
05261 {
05262 return 23 ;
05263 }
05264 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
05265 {
05266 return 27 ;
05267 }
05268 else
05269 {
05270 return 29 ;
05271 }
05272
05273 case 581:
05274 case 579:
05275 case 577:
05276 case 575:
05277 case 573:
05278 case 571:
05279 case 569:
05280 extract_insn_cached (insn);
05281 if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_FOP))
05282 {
05283 return 12 ;
05284 }
05285 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (mult_operator (operands[3], TFmode)))
05286 {
05287 return 13 ;
05288 }
05289 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_FDIV))
05290 {
05291 return 14 ;
05292 }
05293 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
05294 {
05295 return 19 ;
05296 }
05297 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
05298 {
05299 return 23 ;
05300 }
05301 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
05302 {
05303 return 27 ;
05304 }
05305 else
05306 {
05307 return 29 ;
05308 }
05309
05310 case 580:
05311 case 578:
05312 case 576:
05313 case 574:
05314 case 572:
05315 case 570:
05316 case 568:
05317 extract_insn_cached (insn);
05318 if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_FOP))
05319 {
05320 return 12 ;
05321 }
05322 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (mult_operator (operands[3], XFmode)))
05323 {
05324 return 13 ;
05325 }
05326 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_FDIV))
05327 {
05328 return 14 ;
05329 }
05330 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
05331 {
05332 return 19 ;
05333 }
05334 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
05335 {
05336 return 23 ;
05337 }
05338 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
05339 {
05340 return 27 ;
05341 }
05342 else
05343 {
05344 return 29 ;
05345 }
05346
05347 case 562:
05348 extract_constrain_insn_cached (insn);
05349 if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_FOP))
05350 {
05351 return 12 ;
05352 }
05353 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative != 2) && (mult_operator (operands[3], DFmode))))
05354 {
05355 return 13 ;
05356 }
05357 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_FDIV))
05358 {
05359 return 14 ;
05360 }
05361 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
05362 {
05363 return 19 ;
05364 }
05365 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
05366 {
05367 return 23 ;
05368 }
05369 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
05370 {
05371 return 27 ;
05372 }
05373 else
05374 {
05375 return 29 ;
05376 }
05377
05378 case 567:
05379 case 566:
05380 case 565:
05381 case 564:
05382 case 561:
05383 extract_insn_cached (insn);
05384 if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_FOP))
05385 {
05386 return 12 ;
05387 }
05388 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (mult_operator (operands[3], DFmode)))
05389 {
05390 return 13 ;
05391 }
05392 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_FDIV))
05393 {
05394 return 14 ;
05395 }
05396 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
05397 {
05398 return 19 ;
05399 }
05400 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
05401 {
05402 return 23 ;
05403 }
05404 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
05405 {
05406 return 27 ;
05407 }
05408 else
05409 {
05410 return 29 ;
05411 }
05412
05413 case 557:
05414 extract_constrain_insn_cached (insn);
05415 if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_FOP))
05416 {
05417 return 12 ;
05418 }
05419 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative != 2) && (mult_operator (operands[3], SFmode))))
05420 {
05421 return 13 ;
05422 }
05423 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_FDIV))
05424 {
05425 return 14 ;
05426 }
05427 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
05428 {
05429 return 19 ;
05430 }
05431 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
05432 {
05433 return 23 ;
05434 }
05435 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
05436 {
05437 return 27 ;
05438 }
05439 else
05440 {
05441 return 29 ;
05442 }
05443
05444 case 560:
05445 case 559:
05446 case 556:
05447 extract_insn_cached (insn);
05448 if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_FOP))
05449 {
05450 return 12 ;
05451 }
05452 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (mult_operator (operands[3], SFmode)))
05453 {
05454 return 13 ;
05455 }
05456 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_FDIV))
05457 {
05458 return 14 ;
05459 }
05460 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
05461 {
05462 return 19 ;
05463 }
05464 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
05465 {
05466 return 23 ;
05467 }
05468 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
05469 {
05470 return 27 ;
05471 }
05472 else
05473 {
05474 return 29 ;
05475 }
05476
05477 case 555:
05478 extract_insn_cached (insn);
05479 if ((((ix86_cpu) == (CPU_PENTIUM))) && (! (mult_operator (operands[3], TFmode))))
05480 {
05481 return 12 ;
05482 }
05483 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (mult_operator (operands[3], TFmode)))
05484 {
05485 return 13 ;
05486 }
05487 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
05488 {
05489 return 19 ;
05490 }
05491 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
05492 {
05493 return 23 ;
05494 }
05495 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
05496 {
05497 return 27 ;
05498 }
05499 else
05500 {
05501 return 29 ;
05502 }
05503
05504 case 554:
05505 extract_insn_cached (insn);
05506 if ((((ix86_cpu) == (CPU_PENTIUM))) && (! (mult_operator (operands[3], XFmode))))
05507 {
05508 return 12 ;
05509 }
05510 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (mult_operator (operands[3], XFmode)))
05511 {
05512 return 13 ;
05513 }
05514 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
05515 {
05516 return 19 ;
05517 }
05518 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
05519 {
05520 return 23 ;
05521 }
05522 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
05523 {
05524 return 27 ;
05525 }
05526 else
05527 {
05528 return 29 ;
05529 }
05530
05531 case 552:
05532 case 549:
05533 extract_constrain_insn_cached (insn);
05534 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 0) && (! (mult_operator (operands[3], SFmode)))))
05535 {
05536 return 12 ;
05537 }
05538 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 0) && (mult_operator (operands[3], SFmode))))
05539 {
05540 return 13 ;
05541 }
05542 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
05543 {
05544 return 19 ;
05545 }
05546 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
05547 {
05548 return 23 ;
05549 }
05550 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
05551 {
05552 return 27 ;
05553 }
05554 else
05555 {
05556 return 29 ;
05557 }
05558
05559 case 551:
05560 case 548:
05561 extract_insn_cached (insn);
05562 if ((((ix86_cpu) == (CPU_PENTIUM))) && (! (mult_operator (operands[3], SFmode))))
05563 {
05564 return 12 ;
05565 }
05566 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (mult_operator (operands[3], SFmode)))
05567 {
05568 return 13 ;
05569 }
05570 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
05571 {
05572 return 19 ;
05573 }
05574 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
05575 {
05576 return 23 ;
05577 }
05578 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
05579 {
05580 return 27 ;
05581 }
05582 else
05583 {
05584 return 29 ;
05585 }
05586
05587 case 547:
05588 case 546:
05589 if (((ix86_cpu) == (CPU_PENTIUM)))
05590 {
05591 return 20 ;
05592 }
05593 else
05594 {
05595 return 29 ;
05596 }
05597
05598 case 545:
05599 case 544:
05600 if (((ix86_cpu) == (CPU_PENTIUM)))
05601 {
05602 return 7;
05603 }
05604 else
05605 {
05606 return 29 ;
05607 }
05608
05609 case 525:
05610 case 524:
05611 case 523:
05612 case 522:
05613 case 521:
05614 extract_insn_cached (insn);
05615 if (((ix86_cpu) == (CPU_PENTIUM)))
05616 {
05617 return 10 ;
05618 }
05619 else
05620 {
05621 return 29 ;
05622 }
05623
05624 case 529:
05625 case 520:
05626 case 519:
05627 case 518:
05628 case 517:
05629 case 516:
05630 case 515:
05631 case 504:
05632 case 503:
05633 extract_insn_cached (insn);
05634 if (((ix86_cpu) == (CPU_PENTIUM)))
05635 {
05636 return 11 ;
05637 }
05638 else
05639 {
05640 return 29 ;
05641 }
05642
05643 case 500:
05644 case 499:
05645 extract_insn_cached (insn);
05646 if ((((ix86_cpu) == (CPU_PENTIUM))) && (memory_operand (operands[0], VOIDmode)))
05647 {
05648 return 19 ;
05649 }
05650 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (! (memory_operand (operands[0], VOIDmode))))
05651 {
05652 return 23 ;
05653 }
05654 else
05655 {
05656 return 29 ;
05657 }
05658
05659 case 498:
05660 case 496:
05661 case 485:
05662 case 483:
05663 extract_insn_cached (insn);
05664 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_1_operand (operands[1], VOIDmode))) && (get_attr_memory (insn) == MEMORY_BOTH)))
05665 {
05666 return 17 ;
05667 }
05668 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_1_operand (operands[1], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_BOTH)))
05669 {
05670 return 19 ;
05671 }
05672 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_1_operand (operands[1], VOIDmode))) && (get_attr_memory (insn) == MEMORY_LOAD)))
05673 {
05674 return 21 ;
05675 }
05676 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_1_operand (operands[1], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_LOAD)))
05677 {
05678 return 23 ;
05679 }
05680 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_1_operand (operands[1], VOIDmode))) && (get_attr_memory (insn) == MEMORY_NONE)))
05681 {
05682 return 25 ;
05683 }
05684 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_1_operand (operands[1], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_NONE)))
05685 {
05686 return 27 ;
05687 }
05688 else
05689 {
05690 return 29 ;
05691 }
05692
05693 case 497:
05694 case 495:
05695 case 494:
05696 case 493:
05697 case 492:
05698 case 491:
05699 case 490:
05700 case 489:
05701 case 488:
05702 case 487:
05703 case 486:
05704 case 484:
05705 case 482:
05706 case 481:
05707 case 480:
05708 case 479:
05709 case 478:
05710 case 477:
05711 case 476:
05712 case 475:
05713 extract_insn_cached (insn);
05714 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_1_operand (operands[2], VOIDmode))) && (get_attr_memory (insn) == MEMORY_BOTH)))
05715 {
05716 return 17 ;
05717 }
05718 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_1_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_BOTH)))
05719 {
05720 return 19 ;
05721 }
05722 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_1_operand (operands[2], VOIDmode))) && (get_attr_memory (insn) == MEMORY_LOAD)))
05723 {
05724 return 21 ;
05725 }
05726 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_1_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_LOAD)))
05727 {
05728 return 23 ;
05729 }
05730 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_1_operand (operands[2], VOIDmode))) && (get_attr_memory (insn) == MEMORY_NONE)))
05731 {
05732 return 25 ;
05733 }
05734 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_1_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_NONE)))
05735 {
05736 return 27 ;
05737 }
05738 else
05739 {
05740 return 29 ;
05741 }
05742
05743 case 472:
05744 case 470:
05745 case 448:
05746 case 446:
05747 extract_insn_cached (insn);
05748 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_operand (operands[1], VOIDmode))) && (get_attr_memory (insn) == MEMORY_BOTH)))
05749 {
05750 return 17 ;
05751 }
05752 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_operand (operands[1], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_BOTH)))
05753 {
05754 return 19 ;
05755 }
05756 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_operand (operands[1], VOIDmode))) && (get_attr_memory (insn) == MEMORY_LOAD)))
05757 {
05758 return 21 ;
05759 }
05760 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_operand (operands[1], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_LOAD)))
05761 {
05762 return 23 ;
05763 }
05764 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_operand (operands[1], VOIDmode))) && (get_attr_memory (insn) == MEMORY_NONE)))
05765 {
05766 return 25 ;
05767 }
05768 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_operand (operands[1], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_NONE)))
05769 {
05770 return 27 ;
05771 }
05772 else
05773 {
05774 return 29 ;
05775 }
05776
05777 case 474:
05778 case 473:
05779 case 471:
05780 case 469:
05781 case 468:
05782 case 467:
05783 case 466:
05784 case 465:
05785 case 464:
05786 case 463:
05787 case 462:
05788 case 461:
05789 case 460:
05790 case 459:
05791 case 458:
05792 case 457:
05793 case 454:
05794 case 453:
05795 case 452:
05796 case 451:
05797 case 450:
05798 case 449:
05799 case 447:
05800 case 445:
05801 case 444:
05802 case 443:
05803 case 442:
05804 case 441:
05805 case 440:
05806 case 439:
05807 case 438:
05808 case 437:
05809 case 436:
05810 case 435:
05811 case 434:
05812 case 433:
05813 case 427:
05814 case 426:
05815 case 425:
05816 case 424:
05817 extract_insn_cached (insn);
05818 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_operand (operands[2], VOIDmode))) && (get_attr_memory (insn) == MEMORY_BOTH)))
05819 {
05820 return 17 ;
05821 }
05822 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_BOTH)))
05823 {
05824 return 19 ;
05825 }
05826 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_operand (operands[2], VOIDmode))) && (get_attr_memory (insn) == MEMORY_LOAD)))
05827 {
05828 return 21 ;
05829 }
05830 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_LOAD)))
05831 {
05832 return 23 ;
05833 }
05834 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (const_int_operand (operands[2], VOIDmode))) && (get_attr_memory (insn) == MEMORY_NONE)))
05835 {
05836 return 25 ;
05837 }
05838 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (const_int_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_NONE)))
05839 {
05840 return 27 ;
05841 }
05842 else
05843 {
05844 return 29 ;
05845 }
05846
05847 case 432:
05848 case 431:
05849 case 423:
05850 extract_constrain_insn_cached (insn);
05851 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 1) && (const_int_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_BOTH)))
05852 {
05853 return 17 ;
05854 }
05855 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 1) || (! (const_int_operand (operands[2], VOIDmode))))) && (get_attr_memory (insn) == MEMORY_BOTH)))
05856 {
05857 return 19 ;
05858 }
05859 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 1) && (const_int_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_LOAD)))
05860 {
05861 return 21 ;
05862 }
05863 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 1) || (! (const_int_operand (operands[2], VOIDmode))))) && (get_attr_memory (insn) == MEMORY_LOAD)))
05864 {
05865 return 23 ;
05866 }
05867 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 1) && (const_int_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_NONE)))
05868 {
05869 return 25 ;
05870 }
05871 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 1) || (! (const_int_operand (operands[2], VOIDmode))))) && (get_attr_memory (insn) == MEMORY_NONE)))
05872 {
05873 return 27 ;
05874 }
05875 else
05876 {
05877 return 29 ;
05878 }
05879
05880 case 420:
05881 extract_constrain_insn_cached (insn);
05882 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((get_attr_type (insn) == TYPE_ALU) || (which_alternative == 2))) && (get_attr_memory (insn) == MEMORY_BOTH)))
05883 {
05884 return 16 ;
05885 }
05886 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_BOTH)))
05887 {
05888 return 17 ;
05889 }
05890 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH)))
05891 {
05892 return 19 ;
05893 }
05894 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((get_attr_type (insn) == TYPE_ALU) || (which_alternative == 2))) && (get_attr_memory (insn) == MEMORY_LOAD)))
05895 {
05896 return 20 ;
05897 }
05898 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_LOAD)))
05899 {
05900 return 21 ;
05901 }
05902 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD)))
05903 {
05904 return 23 ;
05905 }
05906 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((get_attr_type (insn) == TYPE_ALU) || (which_alternative == 2))) && (get_attr_memory (insn) == MEMORY_NONE)))
05907 {
05908 return 24 ;
05909 }
05910 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_NONE)))
05911 {
05912 return 25 ;
05913 }
05914 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE)))
05915 {
05916 return 27 ;
05917 }
05918 else
05919 {
05920 return 29 ;
05921 }
05922
05923 case 419:
05924 case 418:
05925 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_BOTH)))
05926 {
05927 return 17 ;
05928 }
05929 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH)))
05930 {
05931 return 19 ;
05932 }
05933 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_LOAD)))
05934 {
05935 return 21 ;
05936 }
05937 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD)))
05938 {
05939 return 23 ;
05940 }
05941 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_NONE)))
05942 {
05943 return 25 ;
05944 }
05945 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE)))
05946 {
05947 return 27 ;
05948 }
05949 else
05950 {
05951 return 29 ;
05952 }
05953
05954 case 417:
05955 extract_constrain_insn_cached (insn);
05956 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_BOTH))))
05957 {
05958 return 16 ;
05959 }
05960 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_BOTH)))
05961 {
05962 return 17 ;
05963 }
05964 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH)))
05965 {
05966 return 19 ;
05967 }
05968 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD))))
05969 {
05970 return 20 ;
05971 }
05972 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_LOAD)))
05973 {
05974 return 21 ;
05975 }
05976 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD)))
05977 {
05978 return 23 ;
05979 }
05980 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE))))
05981 {
05982 return 24 ;
05983 }
05984 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_NONE)))
05985 {
05986 return 25 ;
05987 }
05988 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE)))
05989 {
05990 return 27 ;
05991 }
05992 else
05993 {
05994 return 29 ;
05995 }
05996
05997 case 416:
05998 extract_constrain_insn_cached (insn);
05999 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_BOTH)))
06000 {
06001 return 16 ;
06002 }
06003 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_BOTH)))
06004 {
06005 return 17 ;
06006 }
06007 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH)))
06008 {
06009 return 19 ;
06010 }
06011 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_LOAD)))
06012 {
06013 return 20 ;
06014 }
06015 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_LOAD)))
06016 {
06017 return 21 ;
06018 }
06019 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD)))
06020 {
06021 return 23 ;
06022 }
06023 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode)))) && (get_attr_memory (insn) == MEMORY_NONE)))
06024 {
06025 return 24 ;
06026 }
06027 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_NONE)))
06028 {
06029 return 25 ;
06030 }
06031 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE)))
06032 {
06033 return 27 ;
06034 }
06035 else
06036 {
06037 return 29 ;
06038 }
06039
06040 case 414:
06041 extract_constrain_insn_cached (insn);
06042 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative != 0) || (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode))))) && (get_attr_memory (insn) == MEMORY_BOTH)))
06043 {
06044 return 16 ;
06045 }
06046 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_BOTH)))
06047 {
06048 return 17 ;
06049 }
06050 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH)))
06051 {
06052 return 19 ;
06053 }
06054 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative != 0) || (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode))))) && (get_attr_memory (insn) == MEMORY_LOAD)))
06055 {
06056 return 20 ;
06057 }
06058 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_LOAD)))
06059 {
06060 return 21 ;
06061 }
06062 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD)))
06063 {
06064 return 23 ;
06065 }
06066 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative != 0) || (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode))))) && (get_attr_memory (insn) == MEMORY_NONE)))
06067 {
06068 return 24 ;
06069 }
06070 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_NONE)))
06071 {
06072 return 25 ;
06073 }
06074 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE)))
06075 {
06076 return 27 ;
06077 }
06078 else
06079 {
06080 return 29 ;
06081 }
06082
06083 case 422:
06084 case 421:
06085 case 415:
06086 case 409:
06087 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_type (insn) == TYPE_ALU)) && (get_attr_memory (insn) == MEMORY_BOTH)))
06088 {
06089 return 16 ;
06090 }
06091 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_BOTH)))
06092 {
06093 return 17 ;
06094 }
06095 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH)))
06096 {
06097 return 19 ;
06098 }
06099 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_type (insn) == TYPE_ALU)) && (get_attr_memory (insn) == MEMORY_LOAD)))
06100 {
06101 return 20 ;
06102 }
06103 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_LOAD)))
06104 {
06105 return 21 ;
06106 }
06107 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD)))
06108 {
06109 return 23 ;
06110 }
06111 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_type (insn) == TYPE_ALU)) && (get_attr_memory (insn) == MEMORY_NONE)))
06112 {
06113 return 24 ;
06114 }
06115 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_NONE)))
06116 {
06117 return 25 ;
06118 }
06119 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE)))
06120 {
06121 return 27 ;
06122 }
06123 else
06124 {
06125 return 29 ;
06126 }
06127
06128 case 413:
06129 case 408:
06130 extract_constrain_insn_cached (insn);
06131 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative != 0) || (get_attr_type (insn) == TYPE_ALU))) && (get_attr_memory (insn) == MEMORY_BOTH)))
06132 {
06133 return 16 ;
06134 }
06135 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_BOTH)))
06136 {
06137 return 17 ;
06138 }
06139 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH)))
06140 {
06141 return 19 ;
06142 }
06143 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative != 0) || (get_attr_type (insn) == TYPE_ALU))) && (get_attr_memory (insn) == MEMORY_LOAD)))
06144 {
06145 return 20 ;
06146 }
06147 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_LOAD)))
06148 {
06149 return 21 ;
06150 }
06151 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD)))
06152 {
06153 return 23 ;
06154 }
06155 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative != 0) || (get_attr_type (insn) == TYPE_ALU))) && (get_attr_memory (insn) == MEMORY_NONE)))
06156 {
06157 return 24 ;
06158 }
06159 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_NONE)))
06160 {
06161 return 25 ;
06162 }
06163 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE)))
06164 {
06165 return 27 ;
06166 }
06167 else
06168 {
06169 return 29 ;
06170 }
06171
06172 case 406:
06173 case 404:
06174 case 401:
06175 case 400:
06176 case 398:
06177 case 359:
06178 case 358:
06179 case 357:
06180 case 356:
06181 case 355:
06182 case 354:
06183 case 353:
06184 case 352:
06185 case 351:
06186 case 350:
06187 extract_insn_cached (insn);
06188 if ((((ix86_cpu) == (CPU_PENTIUM))) && (memory_operand (operands[1], VOIDmode)))
06189 {
06190 return 19 ;
06191 }
06192 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
06193 {
06194 return 27 ;
06195 }
06196 else
06197 {
06198 return 29 ;
06199 }
06200
06201 case 292:
06202 extract_constrain_insn_cached (insn);
06203 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 0) || (which_alternative == 1))) && (get_attr_memory (insn) == MEMORY_BOTH)))
06204 {
06205 return 17 ;
06206 }
06207 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 0) && (which_alternative != 1))) && (get_attr_memory (insn) == MEMORY_BOTH)))
06208 {
06209 return 19 ;
06210 }
06211 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 0) || (which_alternative == 1))) && (get_attr_memory (insn) == MEMORY_LOAD)))
06212 {
06213 return 21 ;
06214 }
06215 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 0) && (which_alternative != 1))) && (get_attr_memory (insn) == MEMORY_LOAD)))
06216 {
06217 return 23 ;
06218 }
06219 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 0) || (which_alternative == 1))) && (get_attr_memory (insn) == MEMORY_NONE)))
06220 {
06221 return 25 ;
06222 }
06223 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 0) && (which_alternative != 1))) && (get_attr_memory (insn) == MEMORY_NONE)))
06224 {
06225 return 27 ;
06226 }
06227 else
06228 {
06229 return 29 ;
06230 }
06231
06232 case 288:
06233 extract_constrain_insn_cached (insn);
06234 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 0) || (which_alternative == 1))) && (get_attr_memory (insn) == MEMORY_BOTH)))
06235 {
06236 return 16 ;
06237 }
06238 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 0) && (which_alternative != 1))) && (get_attr_memory (insn) == MEMORY_BOTH)))
06239 {
06240 return 19 ;
06241 }
06242 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 0) || (which_alternative == 1))) && (get_attr_memory (insn) == MEMORY_LOAD)))
06243 {
06244 return 20 ;
06245 }
06246 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 0) && (which_alternative != 1))) && (get_attr_memory (insn) == MEMORY_LOAD)))
06247 {
06248 return 23 ;
06249 }
06250 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 0) || (which_alternative == 1))) && (get_attr_memory (insn) == MEMORY_NONE)))
06251 {
06252 return 24 ;
06253 }
06254 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 0) && (which_alternative != 1))) && (get_attr_memory (insn) == MEMORY_NONE)))
06255 {
06256 return 27 ;
06257 }
06258 else
06259 {
06260 return 29 ;
06261 }
06262
06263 case 286:
06264 extract_constrain_insn_cached (insn);
06265 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))) && (get_attr_memory (insn) == MEMORY_BOTH)))
06266 {
06267 return 16 ;
06268 }
06269 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2)))) && (get_attr_memory (insn) == MEMORY_BOTH)))
06270 {
06271 return 19 ;
06272 }
06273 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))) && (get_attr_memory (insn) == MEMORY_LOAD)))
06274 {
06275 return 20 ;
06276 }
06277 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2)))) && (get_attr_memory (insn) == MEMORY_LOAD)))
06278 {
06279 return 23 ;
06280 }
06281 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))) && (get_attr_memory (insn) == MEMORY_NONE)))
06282 {
06283 return 24 ;
06284 }
06285 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2)))) && (get_attr_memory (insn) == MEMORY_NONE)))
06286 {
06287 return 27 ;
06288 }
06289 else
06290 {
06291 return 29 ;
06292 }
06293
06294 case 279:
06295 extract_constrain_insn_cached (insn);
06296 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 0) || (which_alternative == 2)) && (get_attr_memory (insn) == MEMORY_LOAD)))
06297 {
06298 return 20 ;
06299 }
06300 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 0) && (which_alternative != 2)) && (get_attr_memory (insn) == MEMORY_LOAD)))
06301 {
06302 return 23 ;
06303 }
06304 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 0) || (which_alternative == 2)) && (get_attr_memory (insn) == MEMORY_NONE)))
06305 {
06306 return 24 ;
06307 }
06308 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 0) && (which_alternative != 2)) && (get_attr_memory (insn) == MEMORY_NONE)))
06309 {
06310 return 27 ;
06311 }
06312 else
06313 {
06314 return 29 ;
06315 }
06316
06317 case 278:
06318 case 277:
06319 extract_constrain_insn_cached (insn);
06320 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative != 1) && (get_attr_memory (insn) == MEMORY_LOAD)))
06321 {
06322 return 20 ;
06323 }
06324 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && (get_attr_memory (insn) == MEMORY_LOAD)))
06325 {
06326 return 23 ;
06327 }
06328 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative != 1) && (get_attr_memory (insn) == MEMORY_NONE)))
06329 {
06330 return 24 ;
06331 }
06332 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && (get_attr_memory (insn) == MEMORY_NONE)))
06333 {
06334 return 27 ;
06335 }
06336 else
06337 {
06338 return 29 ;
06339 }
06340
06341 case 276:
06342 extract_constrain_insn_cached (insn);
06343 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 1) && (which_alternative != 3)) && (get_attr_memory (insn) == MEMORY_LOAD)))
06344 {
06345 return 20 ;
06346 }
06347 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 1) || (which_alternative == 3)) && (get_attr_memory (insn) == MEMORY_LOAD)))
06348 {
06349 return 23 ;
06350 }
06351 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 1) && (which_alternative != 3)) && (get_attr_memory (insn) == MEMORY_NONE)))
06352 {
06353 return 24 ;
06354 }
06355 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 1) || (which_alternative == 3)) && (get_attr_memory (insn) == MEMORY_NONE)))
06356 {
06357 return 27 ;
06358 }
06359 else
06360 {
06361 return 29 ;
06362 }
06363
06364 case 275:
06365 case 274:
06366 case 272:
06367 case 269:
06368 case 266:
06369 case 263:
06370 case 262:
06371 if (((ix86_cpu) == (CPU_PENTIUM)))
06372 {
06373 return 2;
06374 }
06375 else
06376 {
06377 return 29 ;
06378 }
06379
06380 case 261:
06381 case 260:
06382 case 259:
06383 case 258:
06384 case 257:
06385 case 256:
06386 case 255:
06387 case 254:
06388 case 253:
06389 case 252:
06390 case 251:
06391 case 250:
06392 case 249:
06393 case 248:
06394 case 247:
06395 case 246:
06396 case 245:
06397 if (((ix86_cpu) == (CPU_PENTIUM)))
06398 {
06399 return 0;
06400 }
06401 else
06402 {
06403 return 29 ;
06404 }
06405
06406 case 337:
06407 case 336:
06408 case 335:
06409 case 315:
06410 case 314:
06411 case 313:
06412 case 293:
06413 case 240:
06414 case 239:
06415 case 238:
06416 case 214:
06417 case 212:
06418 case 211:
06419 case 210:
06420 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_BOTH)))
06421 {
06422 return 17 ;
06423 }
06424 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_BOTH)))
06425 {
06426 return 19 ;
06427 }
06428 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD)))
06429 {
06430 return 21 ;
06431 }
06432 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_LOAD)))
06433 {
06434 return 23 ;
06435 }
06436 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE)))
06437 {
06438 return 25 ;
06439 }
06440 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_NONE)))
06441 {
06442 return 27 ;
06443 }
06444 else
06445 {
06446 return 29 ;
06447 }
06448
06449 case 209:
06450 extract_constrain_insn_cached (insn);
06451 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (which_alternative == 2)) && (get_attr_memory (insn) == MEMORY_BOTH)))
06452 {
06453 return 16 ;
06454 }
06455 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_BOTH)))
06456 {
06457 return 17 ;
06458 }
06459 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH)))
06460 {
06461 return 19 ;
06462 }
06463 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (which_alternative == 2)) && (get_attr_memory (insn) == MEMORY_LOAD)))
06464 {
06465 return 20 ;
06466 }
06467 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_LOAD)))
06468 {
06469 return 21 ;
06470 }
06471 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD)))
06472 {
06473 return 23 ;
06474 }
06475 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (which_alternative == 2)) && (get_attr_memory (insn) == MEMORY_NONE)))
06476 {
06477 return 24 ;
06478 }
06479 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_NONE)))
06480 {
06481 return 25 ;
06482 }
06483 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE)))
06484 {
06485 return 27 ;
06486 }
06487 else
06488 {
06489 return 29 ;
06490 }
06491
06492 case 215:
06493 case 202:
06494 case 201:
06495 case 196:
06496 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_BOTH)))
06497 {
06498 return 16 ;
06499 }
06500 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH)))
06501 {
06502 return 19 ;
06503 }
06504 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_LOAD)))
06505 {
06506 return 20 ;
06507 }
06508 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD)))
06509 {
06510 return 23 ;
06511 }
06512 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_NONE)))
06513 {
06514 return 24 ;
06515 }
06516 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE)))
06517 {
06518 return 27 ;
06519 }
06520 else
06521 {
06522 return 29 ;
06523 }
06524
06525 case 195:
06526 case 194:
06527 case 193:
06528 case 192:
06529 case 191:
06530 case 190:
06531 case 189:
06532 case 188:
06533 case 187:
06534 case 186:
06535 if (((ix86_cpu) == (CPU_PENTIUM)))
06536 {
06537 return 24 ;
06538 }
06539 else
06540 {
06541 return 29 ;
06542 }
06543
06544 case 348:
06545 case 347:
06546 case 346:
06547 case 344:
06548 case 343:
06549 case 342:
06550 case 341:
06551 case 340:
06552 case 338:
06553 case 334:
06554 case 333:
06555 case 332:
06556 case 331:
06557 case 330:
06558 case 329:
06559 case 328:
06560 case 327:
06561 case 326:
06562 case 325:
06563 case 324:
06564 case 323:
06565 case 322:
06566 case 321:
06567 case 320:
06568 case 318:
06569 case 316:
06570 case 312:
06571 case 311:
06572 case 310:
06573 case 309:
06574 case 308:
06575 case 307:
06576 case 306:
06577 case 305:
06578 case 304:
06579 case 303:
06580 case 302:
06581 case 301:
06582 case 300:
06583 case 299:
06584 case 298:
06585 case 296:
06586 case 294:
06587 case 291:
06588 case 290:
06589 case 289:
06590 case 287:
06591 case 244:
06592 case 243:
06593 case 241:
06594 case 237:
06595 case 236:
06596 case 235:
06597 case 234:
06598 case 233:
06599 case 232:
06600 case 229:
06601 case 228:
06602 case 227:
06603 case 224:
06604 case 223:
06605 case 222:
06606 case 221:
06607 case 220:
06608 case 219:
06609 case 218:
06610 case 217:
06611 case 216:
06612 case 213:
06613 case 208:
06614 case 207:
06615 case 206:
06616 case 205:
06617 case 204:
06618 case 203:
06619 case 200:
06620 case 199:
06621 case 198:
06622 case 197:
06623 case 185:
06624 case 184:
06625 case 181:
06626 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_BOTH)))
06627 {
06628 return 16 ;
06629 }
06630 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_BOTH)))
06631 {
06632 return 19 ;
06633 }
06634 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD)))
06635 {
06636 return 20 ;
06637 }
06638 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_LOAD)))
06639 {
06640 return 23 ;
06641 }
06642 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE)))
06643 {
06644 return 24 ;
06645 }
06646 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_NONE)))
06647 {
06648 return 27 ;
06649 }
06650 else
06651 {
06652 return 29 ;
06653 }
06654
06655 case 231:
06656 case 230:
06657 case 226:
06658 case 183:
06659 case 182:
06660 case 180:
06661 if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
06662 {
06663 return 17 ;
06664 }
06665 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
06666 {
06667 return 21 ;
06668 }
06669 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
06670 {
06671 return 25 ;
06672 }
06673 else
06674 {
06675 return 29 ;
06676 }
06677
06678 case 178:
06679 case 177:
06680 case 176:
06681 case 175:
06682 case 174:
06683 case 173:
06684 extract_constrain_insn_cached (insn);
06685 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 0) && ((get_attr_memory (insn) == MEMORY_NONE) || (get_attr_memory (insn) == MEMORY_LOAD))))
06686 {
06687 return 4;
06688 }
06689 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 0) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_STORE))))
06690 {
06691 return 5;
06692 }
06693 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 0) && ((immediate_operand (operands[1], VOIDmode)) || (get_attr_memory (insn) == MEMORY_STORE))))
06694 {
06695 return 6;
06696 }
06697 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
06698 {
06699 return 19 ;
06700 }
06701 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
06702 {
06703 return 23 ;
06704 }
06705 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
06706 {
06707 return 27 ;
06708 }
06709 else
06710 {
06711 return 29 ;
06712 }
06713
06714 case 158:
06715 case 157:
06716 case 156:
06717 case 153:
06718 case 152:
06719 case 151:
06720 case 148:
06721 case 147:
06722 case 146:
06723 if (((ix86_cpu) == (CPU_PENTIUM)))
06724 {
06725 return 12 ;
06726 }
06727 else
06728 {
06729 return 29 ;
06730 }
06731
06732 case 145:
06733 case 143:
06734 case 141:
06735 case 139:
06736 case 136:
06737 extract_insn_cached (insn);
06738 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_memory (insn) == MEMORY_NONE) || (get_attr_memory (insn) == MEMORY_LOAD)))
06739 {
06740 return 4;
06741 }
06742 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((immediate_operand (operands[1], VOIDmode)) || (get_attr_memory (insn) == MEMORY_STORE)))
06743 {
06744 return 6;
06745 }
06746 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
06747 {
06748 return 19 ;
06749 }
06750 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
06751 {
06752 return 23 ;
06753 }
06754 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
06755 {
06756 return 27 ;
06757 }
06758 else
06759 {
06760 return 29 ;
06761 }
06762
06763 case 135:
06764 extract_constrain_insn_cached (insn);
06765 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && ((get_attr_memory (insn) == MEMORY_NONE) || (get_attr_memory (insn) == MEMORY_LOAD))))
06766 {
06767 return 4;
06768 }
06769 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && ((immediate_operand (operands[1], VOIDmode)) || (get_attr_memory (insn) == MEMORY_STORE))))
06770 {
06771 return 6;
06772 }
06773 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
06774 {
06775 return 19 ;
06776 }
06777 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
06778 {
06779 return 23 ;
06780 }
06781 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
06782 {
06783 return 27 ;
06784 }
06785 else
06786 {
06787 return 29 ;
06788 }
06789
06790 case 171:
06791 case 170:
06792 case 168:
06793 case 167:
06794 case 165:
06795 case 164:
06796 case 162:
06797 case 161:
06798 case 144:
06799 case 142:
06800 case 140:
06801 case 138:
06802 case 134:
06803 case 133:
06804 extract_constrain_insn_cached (insn);
06805 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 0) && ((get_attr_memory (insn) == MEMORY_NONE) || (get_attr_memory (insn) == MEMORY_LOAD))))
06806 {
06807 return 4;
06808 }
06809 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 0) && ((immediate_operand (operands[1], VOIDmode)) || (get_attr_memory (insn) == MEMORY_STORE))))
06810 {
06811 return 6;
06812 }
06813 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
06814 {
06815 return 19 ;
06816 }
06817 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
06818 {
06819 return 23 ;
06820 }
06821 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
06822 {
06823 return 27 ;
06824 }
06825 else
06826 {
06827 return 29 ;
06828 }
06829
06830 case 132:
06831 case 131:
06832 case 130:
06833 case 129:
06834 extract_constrain_insn_cached (insn);
06835 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_memory (insn) == MEMORY_NONE) || (get_attr_memory (insn) == MEMORY_LOAD)))
06836 {
06837 return 4;
06838 }
06839 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_STORE))))
06840 {
06841 return 5;
06842 }
06843 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((immediate_operand (operands[1], VOIDmode)) || (get_attr_memory (insn) == MEMORY_STORE)))
06844 {
06845 return 6;
06846 }
06847 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
06848 {
06849 return 19 ;
06850 }
06851 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
06852 {
06853 return 23 ;
06854 }
06855 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
06856 {
06857 return 27 ;
06858 }
06859 else
06860 {
06861 return 29 ;
06862 }
06863
06864 case 127:
06865 extract_constrain_insn_cached (insn);
06866 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 0) || (which_alternative == 1)) && ((get_attr_memory (insn) == MEMORY_NONE) || (get_attr_memory (insn) == MEMORY_LOAD))))
06867 {
06868 return 4;
06869 }
06870 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 0) || (which_alternative == 1)) && (((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_STORE)) && (which_alternative == 1))))
06871 {
06872 return 5;
06873 }
06874 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 0) || (which_alternative == 1)) && ((immediate_operand (operands[1], VOIDmode)) || (get_attr_memory (insn) == MEMORY_STORE))))
06875 {
06876 return 6;
06877 }
06878 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
06879 {
06880 return 19 ;
06881 }
06882 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
06883 {
06884 return 23 ;
06885 }
06886 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
06887 {
06888 return 27 ;
06889 }
06890 else
06891 {
06892 return 29 ;
06893 }
06894
06895 case 115:
06896 extract_constrain_insn_cached (insn);
06897 if ((which_alternative == 1) && (((ix86_cpu) == (CPU_PENTIUM))))
06898 {
06899 return 7;
06900 }
06901 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 1) || (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_BOTH)))
06902 {
06903 return 19 ;
06904 }
06905 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD))))
06906 {
06907 return 20 ;
06908 }
06909 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 1) || (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD)))
06910 {
06911 return 23 ;
06912 }
06913 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE))))
06914 {
06915 return 24 ;
06916 }
06917 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 1) || (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE)))
06918 {
06919 return 27 ;
06920 }
06921 else
06922 {
06923 return 29 ;
06924 }
06925
06926 case 112:
06927 extract_constrain_insn_cached (insn);
06928 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_BOTH))))
06929 {
06930 return 16 ;
06931 }
06932 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 1) || (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_BOTH)))
06933 {
06934 return 19 ;
06935 }
06936 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD))))
06937 {
06938 return 20 ;
06939 }
06940 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 1) || (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD)))
06941 {
06942 return 23 ;
06943 }
06944 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE))))
06945 {
06946 return 24 ;
06947 }
06948 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 1) || (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE)))
06949 {
06950 return 27 ;
06951 }
06952 else
06953 {
06954 return 29 ;
06955 }
06956
06957 case 109:
06958 extract_constrain_insn_cached (insn);
06959 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_BOTH))))
06960 {
06961 return 17 ;
06962 }
06963 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 1) || (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_BOTH)))
06964 {
06965 return 19 ;
06966 }
06967 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD))))
06968 {
06969 return 21 ;
06970 }
06971 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 1) || (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD)))
06972 {
06973 return 23 ;
06974 }
06975 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE))))
06976 {
06977 return 25 ;
06978 }
06979 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 1) || (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE)))
06980 {
06981 return 27 ;
06982 }
06983 else
06984 {
06985 return 29 ;
06986 }
06987
06988 case 103:
06989 case 102:
06990 case 101:
06991 case 100:
06992 extract_constrain_insn_cached (insn);
06993 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && ((get_attr_memory (insn) == MEMORY_NONE) || (get_attr_memory (insn) == MEMORY_LOAD))))
06994 {
06995 return 4;
06996 }
06997 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_STORE))))
06998 {
06999 return 5;
07000 }
07001 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && ((immediate_operand (operands[1], VOIDmode)) || (get_attr_memory (insn) == MEMORY_STORE))))
07002 {
07003 return 6;
07004 }
07005 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
07006 {
07007 return 19 ;
07008 }
07009 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
07010 {
07011 return 23 ;
07012 }
07013 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
07014 {
07015 return 27 ;
07016 }
07017 else
07018 {
07019 return 29 ;
07020 }
07021
07022 case 94:
07023 case 93:
07024 extract_constrain_insn_cached (insn);
07025 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && ((get_attr_memory (insn) == MEMORY_NONE) || (get_attr_memory (insn) == MEMORY_LOAD))))
07026 {
07027 return 4;
07028 }
07029 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && ((immediate_operand (operands[1], VOIDmode)) || (get_attr_memory (insn) == MEMORY_STORE))))
07030 {
07031 return 6;
07032 }
07033 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
07034 {
07035 return 19 ;
07036 }
07037 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
07038 {
07039 return 23 ;
07040 }
07041 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
07042 {
07043 return 27 ;
07044 }
07045 else
07046 {
07047 return 29 ;
07048 }
07049
07050 case 89:
07051 extract_constrain_insn_cached (insn);
07052 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && ((get_attr_memory (insn) == MEMORY_NONE) || (get_attr_memory (insn) == MEMORY_LOAD))))
07053 {
07054 return 4;
07055 }
07056 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && ((immediate_operand (operands[1], VOIDmode)) || (get_attr_memory (insn) == MEMORY_STORE))))
07057 {
07058 return 6;
07059 }
07060 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 3) || (which_alternative == 4))))
07061 {
07062 return 7;
07063 }
07064 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 3) || (which_alternative == 4))) && (get_attr_memory (insn) == MEMORY_BOTH)))
07065 {
07066 return 16 ;
07067 }
07068 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (((which_alternative == 3) || (which_alternative == 4)) && ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && (((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8)))) || ((which_alternative != 3) && ((which_alternative != 4) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (which_alternative != 8)))))))) || ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8))))) && ((which_alternative == 0) || ((which_alternative == 1) || ((which_alternative == 2) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8)))))))))) && (get_attr_memory (insn) == MEMORY_BOTH)))
07069 {
07070 return 17 ;
07071 }
07072 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) || ((which_alternative != 3) && (which_alternative != 4)))) && (get_attr_memory (insn) == MEMORY_BOTH)))
07073 {
07074 return 19 ;
07075 }
07076 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 3) || (which_alternative == 4))) && (get_attr_memory (insn) == MEMORY_LOAD)))
07077 {
07078 return 20 ;
07079 }
07080 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (((which_alternative == 3) || (which_alternative == 4)) && ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && (((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8)))) || ((which_alternative != 3) && ((which_alternative != 4) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (which_alternative != 8)))))))) || ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8))))) && ((which_alternative == 0) || ((which_alternative == 1) || ((which_alternative == 2) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8)))))))))) && (get_attr_memory (insn) == MEMORY_LOAD)))
07081 {
07082 return 21 ;
07083 }
07084 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) || ((which_alternative != 3) && (which_alternative != 4)))) && (get_attr_memory (insn) == MEMORY_LOAD)))
07085 {
07086 return 23 ;
07087 }
07088 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((which_alternative == 3) || (which_alternative == 4))) && (get_attr_memory (insn) == MEMORY_NONE)))
07089 {
07090 return 24 ;
07091 }
07092 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (((which_alternative == 3) || (which_alternative == 4)) && ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && (((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8)))) || ((which_alternative != 3) && ((which_alternative != 4) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (which_alternative != 8)))))))) || ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8))))) && ((which_alternative == 0) || ((which_alternative == 1) || ((which_alternative == 2) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8)))))))))) && (get_attr_memory (insn) == MEMORY_NONE)))
07093 {
07094 return 25 ;
07095 }
07096 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) || ((which_alternative != 3) && (which_alternative != 4)))) && (get_attr_memory (insn) == MEMORY_NONE)))
07097 {
07098 return 27 ;
07099 }
07100 else
07101 {
07102 return 29 ;
07103 }
07104
07105 case 88:
07106 case 87:
07107 extract_constrain_insn_cached (insn);
07108 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 1) && (! (memory_operand (operands[1], VOIDmode)))))
07109 {
07110 return 8;
07111 }
07112 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 1) || (memory_operand (operands[1], VOIDmode))) && ((which_alternative == 1) && (memory_operand (operands[1], VOIDmode)))))
07113 {
07114 return 19 ;
07115 }
07116 else
07117 {
07118 return 29 ;
07119 }
07120
07121 case 83:
07122 extract_constrain_insn_cached (insn);
07123 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative != 7) && ((which_alternative != 8) && ((which_alternative != 9) && ((which_alternative != 4) && ((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], DImode))))))))))
07124 {
07125 return 7;
07126 }
07127 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_BOTH)))
07128 {
07129 return 16 ;
07130 }
07131 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH)))
07132 {
07133 return 19 ;
07134 }
07135 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_LOAD)))
07136 {
07137 return 20 ;
07138 }
07139 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD)))
07140 {
07141 return 23 ;
07142 }
07143 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_NONE)))
07144 {
07145 return 24 ;
07146 }
07147 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE)))
07148 {
07149 return 27 ;
07150 }
07151 else
07152 {
07153 return 29 ;
07154 }
07155
07156 case 76:
07157 extract_constrain_insn_cached (insn);
07158 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((which_alternative == 0) && (! (memory_operand (operands[1], VOIDmode)))))
07159 {
07160 return 8;
07161 }
07162 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 0) || (memory_operand (operands[1], VOIDmode))) && ((which_alternative == 0) && (memory_operand (operands[1], VOIDmode)))))
07163 {
07164 return 19 ;
07165 }
07166 else
07167 {
07168 return 29 ;
07169 }
07170
07171 case 71:
07172 extract_constrain_insn_cached (insn);
07173 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((q_regs_operand (operands[0], QImode)) && (! ((TARGET_MOVX) != (0)))))
07174 {
07175 return 7;
07176 }
07177 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((q_regs_operand (operands[0], QImode)) && (! ((TARGET_MOVX) != (0))))) && (get_attr_memory (insn) == MEMORY_BOTH)))
07178 {
07179 return 16 ;
07180 }
07181 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((! (q_regs_operand (operands[0], QImode))) || ((TARGET_MOVX) != (0)))) && (get_attr_memory (insn) == MEMORY_BOTH)))
07182 {
07183 return 19 ;
07184 }
07185 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((q_regs_operand (operands[0], QImode)) && (! ((TARGET_MOVX) != (0))))) && (get_attr_memory (insn) == MEMORY_LOAD)))
07186 {
07187 return 20 ;
07188 }
07189 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((! (q_regs_operand (operands[0], QImode))) || ((TARGET_MOVX) != (0)))) && (get_attr_memory (insn) == MEMORY_LOAD)))
07190 {
07191 return 23 ;
07192 }
07193 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((q_regs_operand (operands[0], QImode)) && (! ((TARGET_MOVX) != (0))))) && (get_attr_memory (insn) == MEMORY_NONE)))
07194 {
07195 return 24 ;
07196 }
07197 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || ((! (q_regs_operand (operands[0], QImode))) || ((TARGET_MOVX) != (0)))) && (get_attr_memory (insn) == MEMORY_NONE)))
07198 {
07199 return 27 ;
07200 }
07201 else
07202 {
07203 return 29 ;
07204 }
07205
07206 case 70:
07207 case 66:
07208 case 65:
07209 if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_IMOV))
07210 {
07211 return 7;
07212 }
07213 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (get_attr_type (insn) == TYPE_IMOV))) && (get_attr_memory (insn) == MEMORY_BOTH)))
07214 {
07215 return 19 ;
07216 }
07217 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_type (insn) == TYPE_IMOV)) && (get_attr_memory (insn) == MEMORY_LOAD)))
07218 {
07219 return 20 ;
07220 }
07221 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (get_attr_type (insn) == TYPE_IMOV))) && (get_attr_memory (insn) == MEMORY_LOAD)))
07222 {
07223 return 23 ;
07224 }
07225 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_type (insn) == TYPE_IMOV)) && (get_attr_memory (insn) == MEMORY_NONE)))
07226 {
07227 return 24 ;
07228 }
07229 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (get_attr_type (insn) == TYPE_IMOV))) && (get_attr_memory (insn) == MEMORY_NONE)))
07230 {
07231 return 27 ;
07232 }
07233 else
07234 {
07235 return 29 ;
07236 }
07237
07238 case 74:
07239 case 73:
07240 case 72:
07241 case 61:
07242 if (((ix86_cpu) == (CPU_PENTIUM)))
07243 {
07244 return 7;
07245 }
07246 else
07247 {
07248 return 29 ;
07249 }
07250
07251 case 59:
07252 extract_constrain_insn_cached (insn);
07253 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2)))))))
07254 {
07255 return 7;
07256 }
07257 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2)))))) && (((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2))))))) && (get_attr_memory (insn) == MEMORY_BOTH)))
07258 {
07259 return 16 ;
07260 }
07261 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2))))) && (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2))))))) && (get_attr_memory (insn) == MEMORY_BOTH)))
07262 {
07263 return 17 ;
07264 }
07265 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && (((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2))))))) && (get_attr_memory (insn) == MEMORY_BOTH)))
07266 {
07267 return 19 ;
07268 }
07269 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2)))))) && (((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2))))))) && (get_attr_memory (insn) == MEMORY_LOAD)))
07270 {
07271 return 20 ;
07272 }
07273 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2))))) && (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2))))))) && (get_attr_memory (insn) == MEMORY_LOAD)))
07274 {
07275 return 21 ;
07276 }
07277 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && (((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2))))))) && (get_attr_memory (insn) == MEMORY_LOAD)))
07278 {
07279 return 23 ;
07280 }
07281 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2)))))) && (((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2))))))) && (get_attr_memory (insn) == MEMORY_NONE)))
07282 {
07283 return 24 ;
07284 }
07285 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && ((((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2))))) && (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2))))))) && (get_attr_memory (insn) == MEMORY_NONE)))
07286 {
07287 return 25 ;
07288 }
07289 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && (((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2))))))) && (get_attr_memory (insn) == MEMORY_NONE)))
07290 {
07291 return 27 ;
07292 }
07293 else
07294 {
07295 return 29 ;
07296 }
07297
07298 case 405:
07299 case 108:
07300 case 56:
07301 extract_insn_cached (insn);
07302 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (memory_operand (operands[1], VOIDmode))))
07303 {
07304 return 17 ;
07305 }
07306 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (memory_operand (operands[1], VOIDmode))))
07307 {
07308 return 19 ;
07309 }
07310 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE)))
07311 {
07312 return 25 ;
07313 }
07314 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_NONE)))
07315 {
07316 return 27 ;
07317 }
07318 else
07319 {
07320 return 29 ;
07321 }
07322
07323 case 55:
07324 if (((ix86_cpu) == (CPU_PENTIUM)))
07325 {
07326 return 7;
07327 }
07328 else
07329 {
07330 return 29 ;
07331 }
07332
07333 case 52:
07334 if (((ix86_cpu) == (CPU_PENTIUM)))
07335 {
07336 return 7;
07337 }
07338 else
07339 {
07340 return 29 ;
07341 }
07342
07343 case 50:
07344 if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_type (insn) == TYPE_IMOV))
07345 {
07346 return 7;
07347 }
07348 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_BOTH)))
07349 {
07350 return 16 ;
07351 }
07352 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_BOTH)))
07353 {
07354 return 17 ;
07355 }
07356 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (get_attr_type (insn) == TYPE_IMOV))) && (get_attr_memory (insn) == MEMORY_BOTH)))
07357 {
07358 return 19 ;
07359 }
07360 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_LOAD)))
07361 {
07362 return 20 ;
07363 }
07364 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_LOAD)))
07365 {
07366 return 21 ;
07367 }
07368 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (get_attr_type (insn) == TYPE_IMOV))) && (get_attr_memory (insn) == MEMORY_LOAD)))
07369 {
07370 return 23 ;
07371 }
07372 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_NONE)))
07373 {
07374 return 24 ;
07375 }
07376 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_PU) && (get_attr_memory (insn) == MEMORY_NONE)))
07377 {
07378 return 25 ;
07379 }
07380 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (((get_attr_imm_disp (insn) == IMM_DISP_TRUE) || (! (get_attr_type (insn) == TYPE_IMOV))) && (get_attr_memory (insn) == MEMORY_NONE)))
07381 {
07382 return 27 ;
07383 }
07384 else
07385 {
07386 return 29 ;
07387 }
07388
07389 case 86:
07390 case 60:
07391 case 54:
07392 case 53:
07393 case 47:
07394 if (((ix86_cpu) == (CPU_PENTIUM)))
07395 {
07396 return 7;
07397 }
07398 else
07399 {
07400 return 29 ;
07401 }
07402
07403 case 85:
07404 case 68:
07405 case 46:
07406 if (((ix86_cpu) == (CPU_PENTIUM)))
07407 {
07408 return 7;
07409 }
07410 else
07411 {
07412 return 29 ;
07413 }
07414
07415 case 84:
07416 case 67:
07417 case 51:
07418 case 45:
07419 if (((ix86_cpu) == (CPU_PENTIUM)))
07420 {
07421 return 7;
07422 }
07423 else
07424 {
07425 return 29 ;
07426 }
07427
07428 case 44:
07429 extract_constrain_insn_cached (insn);
07430 if ((((ix86_cpu) == (CPU_PENTIUM))) && (((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && ((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], SImode)))))))))
07431 {
07432 return 7;
07433 }
07434 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_BOTH)))
07435 {
07436 return 16 ;
07437 }
07438 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_BOTH)))
07439 {
07440 return 19 ;
07441 }
07442 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_LOAD)))
07443 {
07444 return 20 ;
07445 }
07446 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_LOAD)))
07447 {
07448 return 23 ;
07449 }
07450 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_UV) && (get_attr_memory (insn) == MEMORY_NONE)))
07451 {
07452 return 24 ;
07453 }
07454 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_pent_pair (insn) == PENT_PAIR_NP) && (get_attr_memory (insn) == MEMORY_NONE)))
07455 {
07456 return 27 ;
07457 }
07458 else
07459 {
07460 return 29 ;
07461 }
07462
07463 case 407:
07464 case 403:
07465 case 402:
07466 case 399:
07467 case 345:
07468 case 339:
07469 case 319:
07470 case 317:
07471 case 297:
07472 case 295:
07473 case 242:
07474 case 111:
07475 case 106:
07476 case 81:
07477 case 80:
07478 case 62:
07479 case 43:
07480 case 42:
07481 extract_insn_cached (insn);
07482 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (memory_operand (operands[1], VOIDmode))))
07483 {
07484 return 16 ;
07485 }
07486 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (memory_operand (operands[1], VOIDmode))))
07487 {
07488 return 19 ;
07489 }
07490 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE)))
07491 {
07492 return 24 ;
07493 }
07494 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_NONE)))
07495 {
07496 return 27 ;
07497 }
07498 else
07499 {
07500 return 29 ;
07501 }
07502
07503 case 79:
07504 case 78:
07505 case 41:
07506 case 40:
07507 extract_insn_cached (insn);
07508 if (((ix86_cpu) == (CPU_PENTIUM)))
07509 {
07510 return 9;
07511 }
07512 else
07513 {
07514 return 29 ;
07515 }
07516
07517 case 77:
07518 case 58:
07519 case 57:
07520 case 49:
07521 case 48:
07522 case 39:
07523 case 38:
07524 case 37:
07525 extract_insn_cached (insn);
07526 if ((((ix86_cpu) == (CPU_PENTIUM))) && (! (memory_operand (operands[1], VOIDmode))))
07527 {
07528 return 8;
07529 }
07530 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (memory_operand (operands[1], VOIDmode)))
07531 {
07532 return 19 ;
07533 }
07534 else
07535 {
07536 return 29 ;
07537 }
07538
07539 case 967:
07540 case 966:
07541 case 965:
07542 case 964:
07543 case 963:
07544 case 962:
07545 case 904:
07546 case 903:
07547 case 902:
07548 case 901:
07549 case 900:
07550 case 899:
07551 case 860:
07552 case 859:
07553 case 858:
07554 case 828:
07555 case 827:
07556 case 826:
07557 case 825:
07558 case 824:
07559 case 823:
07560 case 776:
07561 case 775:
07562 case 774:
07563 case 773:
07564 case 772:
07565 case 771:
07566 case 502:
07567 case 501:
07568 case 280:
07569 case 36:
07570 case 35:
07571 case 34:
07572 case 33:
07573 case 32:
07574 case 31:
07575 case 27:
07576 case 24:
07577 case 23:
07578 case 21:
07579 case 20:
07580 case 19:
07581 if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
07582 {
07583 return 23 ;
07584 }
07585 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
07586 {
07587 return 27 ;
07588 }
07589 else
07590 {
07591 return 29 ;
07592 }
07593
07594 case 8:
07595 case 7:
07596 case 6:
07597 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD)))
07598 {
07599 return 21 ;
07600 }
07601 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_LOAD)))
07602 {
07603 return 23 ;
07604 }
07605 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE)))
07606 {
07607 return 25 ;
07608 }
07609 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_NONE)))
07610 {
07611 return 27 ;
07612 }
07613 else
07614 {
07615 return 29 ;
07616 }
07617
07618 case 283:
07619 case 282:
07620 case 281:
07621 case 17:
07622 case 16:
07623 case 15:
07624 case 14:
07625 case 13:
07626 case 12:
07627 case 11:
07628 case 10:
07629 case 9:
07630 case 5:
07631 case 4:
07632 case 3:
07633 case 2:
07634 case 1:
07635 case 0:
07636 if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_LOAD)))
07637 {
07638 return 20 ;
07639 }
07640 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_LOAD)))
07641 {
07642 return 23 ;
07643 }
07644 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((! (get_attr_imm_disp (insn) == IMM_DISP_TRUE)) && (get_attr_memory (insn) == MEMORY_NONE)))
07645 {
07646 return 24 ;
07647 }
07648 else if ((((ix86_cpu) == (CPU_PENTIUM))) && ((get_attr_imm_disp (insn) == IMM_DISP_TRUE) && (get_attr_memory (insn) == MEMORY_NONE)))
07649 {
07650 return 27 ;
07651 }
07652 else
07653 {
07654 return 29 ;
07655 }
07656
07657 case -1:
07658 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
07659 && asm_noperands (PATTERN (insn)) < 0)
07660 fatal_insn_not_found (insn);
07661 case 1024:
07662 case 1023:
07663 case 1022:
07664 case 1021:
07665 case 1020:
07666 case 854:
07667 case 853:
07668 case 852:
07669 case 850:
07670 case 708:
07671 case 707:
07672 case 706:
07673 case 705:
07674 case 704:
07675 case 703:
07676 case 702:
07677 case 701:
07678 case 700:
07679 case 699:
07680 case 698:
07681 case 697:
07682 case 696:
07683 case 695:
07684 case 694:
07685 case 693:
07686 case 692:
07687 case 681:
07688 case 680:
07689 case 673:
07690 case 672:
07691 case 671:
07692 case 670:
07693 case 669:
07694 case 668:
07695 case 667:
07696 case 666:
07697 case 665:
07698 case 664:
07699 case 663:
07700 case 662:
07701 case 661:
07702 case 660:
07703 case 656:
07704 case 655:
07705 case 653:
07706 case 652:
07707 case 650:
07708 case 649:
07709 case 647:
07710 case 646:
07711 case 543:
07712 case 542:
07713 case 541:
07714 case 540:
07715 case 539:
07716 case 538:
07717 case 537:
07718 case 536:
07719 case 535:
07720 case 534:
07721 case 533:
07722 case 532:
07723 case 531:
07724 case 530:
07725 case 528:
07726 case 527:
07727 case 526:
07728 case 514:
07729 case 513:
07730 case 512:
07731 case 511:
07732 case 510:
07733 case 509:
07734 case 508:
07735 case 507:
07736 case 506:
07737 case 505:
07738 case 456:
07739 case 455:
07740 case 429:
07741 case 428:
07742 case 411:
07743 case 410:
07744 case 388:
07745 case 387:
07746 case 386:
07747 case 385:
07748 case 384:
07749 case 383:
07750 case 382:
07751 case 381:
07752 case 380:
07753 case 379:
07754 case 369:
07755 case 368:
07756 case 367:
07757 case 366:
07758 case 365:
07759 case 364:
07760 case 363:
07761 case 362:
07762 case 361:
07763 case 360:
07764 case 349:
07765 case 285:
07766 case 284:
07767 case 273:
07768 case 271:
07769 case 270:
07770 case 268:
07771 case 267:
07772 case 265:
07773 case 264:
07774 case 225:
07775 case 179:
07776 case 160:
07777 case 159:
07778 case 118:
07779 case 114:
07780 case 99:
07781 case 98:
07782 case 97:
07783 case 96:
07784 case 92:
07785 case 91:
07786 case 75:
07787 case 30:
07788 case 29:
07789 case 28:
07790 case 26:
07791 case 25:
07792 case 22:
07793 case 18:
07794 return 29 ;
07795
07796 default:
07797 if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_BOTH))
07798 {
07799 return 19 ;
07800 }
07801 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_LOAD))
07802 {
07803 return 23 ;
07804 }
07805 else if ((((ix86_cpu) == (CPU_PENTIUM))) && (get_attr_memory (insn) == MEMORY_NONE))
07806 {
07807 return 27 ;
07808 }
07809 else
07810 {
07811 return 29 ;
07812 }
07813
07814 }
07815 }
07816
07817 extern int result_ready_cost PARAMS ((rtx));
07818 int
07819 result_ready_cost (insn)
07820 rtx insn;
07821 {
07822 switch (recog_memoized (insn))
07823 {
07824 case 679:
07825 case 678:
07826 case 677:
07827 case 676:
07828 case 675:
07829 case 674:
07830 extract_insn_cached (insn);
07831 if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (! (constant_call_address_operand (operands[1], VOIDmode))))
07832 {
07833 return 3;
07834 }
07835 else
07836 {
07837 return 1;
07838 }
07839
07840 case 659:
07841 extract_constrain_insn_cached (insn);
07842 if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)))
07843 {
07844 return 3;
07845 }
07846 else if ((((ix86_cpu) == (CPU_K6))) && ((which_alternative == 1) && (! (const0_operand (operands[2], DImode)))))
07847 {
07848 return 2;
07849 }
07850 else
07851 {
07852 return 1;
07853 }
07854
07855 case 658:
07856 extract_constrain_insn_cached (insn);
07857 if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)))
07858 {
07859 return 3;
07860 }
07861 else if ((((ix86_cpu) == (CPU_K6))) && ((which_alternative == 1) && (! (const0_operand (operands[2], SImode)))))
07862 {
07863 return 2;
07864 }
07865 else
07866 {
07867 return 1;
07868 }
07869
07870 case 645:
07871 case 644:
07872 if (((ix86_cpu) == (CPU_ATHLON)))
07873 {
07874 return 7;
07875 }
07876 else if (((ix86_cpu) == (CPU_PENTIUMPRO)))
07877 {
07878 return 2;
07879 }
07880 else
07881 {
07882 return 1;
07883 }
07884
07885 case 642:
07886 extract_constrain_insn_cached (insn);
07887 if ((((ix86_cpu) == (CPU_ATHLON))) && ((which_alternative == 0) || (which_alternative == 1)))
07888 {
07889 return 7;
07890 }
07891 else if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((which_alternative == 0) || (which_alternative == 1)))
07892 {
07893 return 2;
07894 }
07895 else
07896 {
07897 return 1;
07898 }
07899
07900 case 643:
07901 case 641:
07902 extract_constrain_insn_cached (insn);
07903 if ((((ix86_cpu) == (CPU_ATHLON))) && ((which_alternative == 0) || (which_alternative == 1)))
07904 {
07905 return 7;
07906 }
07907 else if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)))
07908 {
07909 return 3;
07910 }
07911 else if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((which_alternative == 0) || (which_alternative == 1)))
07912 {
07913 return 2;
07914 }
07915 else
07916 {
07917 return 1;
07918 }
07919
07920 case 635:
07921 case 634:
07922 case 633:
07923 case 632:
07924 case 631:
07925 case 630:
07926 case 629:
07927 case 628:
07928 case 627:
07929 case 626:
07930 case 625:
07931 case 624:
07932 case 623:
07933 case 622:
07934 case 621:
07935 case 620:
07936 case 619:
07937 case 618:
07938 if (((ix86_cpu) == (CPU_ATHLON)))
07939 {
07940 return 15 ;
07941 }
07942 else if (((ix86_cpu) == (CPU_K6)))
07943 {
07944 return 10 ;
07945 }
07946 else
07947 {
07948 return 1;
07949 }
07950
07951 case 617:
07952 case 616:
07953 case 615:
07954 case 614:
07955 case 613:
07956 case 612:
07957 case 611:
07958 case 610:
07959 case 609:
07960 case 608:
07961 case 607:
07962 case 606:
07963 if (((ix86_cpu) == (CPU_ATHLON)))
07964 {
07965 return 15 ;
07966 }
07967 else if (((ix86_cpu) == (CPU_K6)))
07968 {
07969 return 10 ;
07970 }
07971 else if (((ix86_cpu) == (CPU_PENTIUMPRO)))
07972 {
07973 return 3;
07974 }
07975 else
07976 {
07977 return 1;
07978 }
07979
07980 case 604:
07981 case 603:
07982 case 602:
07983 case 601:
07984 case 600:
07985 case 599:
07986 case 598:
07987 case 597:
07988 case 596:
07989 case 595:
07990 case 594:
07991 case 593:
07992 case 592:
07993 case 591:
07994 case 590:
07995 case 589:
07996 case 588:
07997 case 587:
07998 case 584:
07999 if (((ix86_cpu) == (CPU_ATHLON)))
08000 {
08001 return 100 ;
08002 }
08003 else if ((((ix86_cpu) == (CPU_K6))) || (((ix86_cpu) == (CPU_PENTIUMPRO))))
08004 {
08005 return 56 ;
08006 }
08007 else
08008 {
08009 return 1;
08010 }
08011
08012 case 585:
08013 case 582:
08014 extract_constrain_insn_cached (insn);
08015 if ((((ix86_cpu) == (CPU_ATHLON))) && (which_alternative == 0))
08016 {
08017 return 100 ;
08018 }
08019 else if (((((ix86_cpu) == (CPU_K6))) && (which_alternative == 0)) || ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (which_alternative == 0)))
08020 {
08021 return 56 ;
08022 }
08023 else if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)))
08024 {
08025 return 3;
08026 }
08027 else
08028 {
08029 return 1;
08030 }
08031
08032 case 581:
08033 case 579:
08034 case 577:
08035 case 575:
08036 case 573:
08037 case 571:
08038 case 569:
08039 extract_insn_cached (insn);
08040 if (((((ix86_cpu) == (CPU_K6))) && (get_attr_type (insn) == TYPE_FDIV)) || ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (get_attr_type (insn) == TYPE_FDIV)))
08041 {
08042 return 56 ;
08043 }
08044 else if ((((ix86_cpu) == (CPU_ATHLON))) && (get_attr_type (insn) == TYPE_FDIV))
08045 {
08046 return 24 ;
08047 }
08048 else if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (mult_operator (operands[3], TFmode)))
08049 {
08050 return 5;
08051 }
08052 else if ((((ix86_cpu) == (CPU_ATHLON))) && ((get_attr_type (insn) == TYPE_FOP) || (mult_operator (operands[3], TFmode))))
08053 {
08054 return 4;
08055 }
08056 else if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)) || (get_attr_type (insn) == TYPE_FOP)))
08057 {
08058 return 3;
08059 }
08060 else if ((((ix86_cpu) == (CPU_K6))) && ((get_attr_type (insn) == TYPE_FOP) || (mult_operator (operands[3], TFmode))))
08061 {
08062 return 2;
08063 }
08064 else
08065 {
08066 return 1;
08067 }
08068
08069 case 580:
08070 case 578:
08071 case 576:
08072 case 574:
08073 case 572:
08074 case 570:
08075 case 568:
08076 extract_insn_cached (insn);
08077 if (((((ix86_cpu) == (CPU_K6))) && (get_attr_type (insn) == TYPE_FDIV)) || ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (get_attr_type (insn) == TYPE_FDIV)))
08078 {
08079 return 56 ;
08080 }
08081 else if ((((ix86_cpu) == (CPU_ATHLON))) && (get_attr_type (insn) == TYPE_FDIV))
08082 {
08083 return 24 ;
08084 }
08085 else if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (mult_operator (operands[3], XFmode)))
08086 {
08087 return 5;
08088 }
08089 else if ((((ix86_cpu) == (CPU_ATHLON))) && ((get_attr_type (insn) == TYPE_FOP) || (mult_operator (operands[3], XFmode))))
08090 {
08091 return 4;
08092 }
08093 else if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)) || (get_attr_type (insn) == TYPE_FOP)))
08094 {
08095 return 3;
08096 }
08097 else if ((((ix86_cpu) == (CPU_K6))) && ((get_attr_type (insn) == TYPE_FOP) || (mult_operator (operands[3], XFmode))))
08098 {
08099 return 2;
08100 }
08101 else
08102 {
08103 return 1;
08104 }
08105
08106 case 562:
08107 extract_constrain_insn_cached (insn);
08108 if (((((ix86_cpu) == (CPU_K6))) && (get_attr_type (insn) == TYPE_FDIV)) || ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (get_attr_type (insn) == TYPE_FDIV)))
08109 {
08110 return 56 ;
08111 }
08112 else if ((((ix86_cpu) == (CPU_ATHLON))) && (get_attr_type (insn) == TYPE_FDIV))
08113 {
08114 return 24 ;
08115 }
08116 else if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((which_alternative != 2) && (mult_operator (operands[3], DFmode))))
08117 {
08118 return 5;
08119 }
08120 else if ((((ix86_cpu) == (CPU_ATHLON))) && ((get_attr_type (insn) == TYPE_FOP) || ((which_alternative != 2) && (mult_operator (operands[3], DFmode)))))
08121 {
08122 return 4;
08123 }
08124 else if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)) || (get_attr_type (insn) == TYPE_FOP)))
08125 {
08126 return 3;
08127 }
08128 else if ((((ix86_cpu) == (CPU_K6))) && ((get_attr_type (insn) == TYPE_FOP) || ((which_alternative != 2) && (mult_operator (operands[3], DFmode)))))
08129 {
08130 return 2;
08131 }
08132 else
08133 {
08134 return 1;
08135 }
08136
08137 case 567:
08138 case 566:
08139 case 565:
08140 case 564:
08141 case 561:
08142 extract_insn_cached (insn);
08143 if (((((ix86_cpu) == (CPU_K6))) && (get_attr_type (insn) == TYPE_FDIV)) || ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (get_attr_type (insn) == TYPE_FDIV)))
08144 {
08145 return 56 ;
08146 }
08147 else if ((((ix86_cpu) == (CPU_ATHLON))) && (get_attr_type (insn) == TYPE_FDIV))
08148 {
08149 return 24 ;
08150 }
08151 else if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (mult_operator (operands[3], DFmode)))
08152 {
08153 return 5;
08154 }
08155 else if ((((ix86_cpu) == (CPU_ATHLON))) && ((get_attr_type (insn) == TYPE_FOP) || (mult_operator (operands[3], DFmode))))
08156 {
08157 return 4;
08158 }
08159 else if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)) || (get_attr_type (insn) == TYPE_FOP)))
08160 {
08161 return 3;
08162 }
08163 else if ((((ix86_cpu) == (CPU_K6))) && ((get_attr_type (insn) == TYPE_FOP) || (mult_operator (operands[3], DFmode))))
08164 {
08165 return 2;
08166 }
08167 else
08168 {
08169 return 1;
08170 }
08171
08172 case 557:
08173 extract_constrain_insn_cached (insn);
08174 if (((((ix86_cpu) == (CPU_K6))) && (get_attr_type (insn) == TYPE_FDIV)) || ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (get_attr_type (insn) == TYPE_FDIV)))
08175 {
08176 return 56 ;
08177 }
08178 else if ((((ix86_cpu) == (CPU_ATHLON))) && (get_attr_type (insn) == TYPE_FDIV))
08179 {
08180 return 24 ;
08181 }
08182 else if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((which_alternative != 2) && (mult_operator (operands[3], SFmode))))
08183 {
08184 return 5;
08185 }
08186 else if ((((ix86_cpu) == (CPU_ATHLON))) && ((get_attr_type (insn) == TYPE_FOP) || ((which_alternative != 2) && (mult_operator (operands[3], SFmode)))))
08187 {
08188 return 4;
08189 }
08190 else if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)) || (get_attr_type (insn) == TYPE_FOP)))
08191 {
08192 return 3;
08193 }
08194 else if ((((ix86_cpu) == (CPU_K6))) && ((get_attr_type (insn) == TYPE_FOP) || ((which_alternative != 2) && (mult_operator (operands[3], SFmode)))))
08195 {
08196 return 2;
08197 }
08198 else
08199 {
08200 return 1;
08201 }
08202
08203 case 560:
08204 case 559:
08205 case 556:
08206 extract_insn_cached (insn);
08207 if (((((ix86_cpu) == (CPU_K6))) && (get_attr_type (insn) == TYPE_FDIV)) || ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (get_attr_type (insn) == TYPE_FDIV)))
08208 {
08209 return 56 ;
08210 }
08211 else if ((((ix86_cpu) == (CPU_ATHLON))) && (get_attr_type (insn) == TYPE_FDIV))
08212 {
08213 return 24 ;
08214 }
08215 else if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (mult_operator (operands[3], SFmode)))
08216 {
08217 return 5;
08218 }
08219 else if ((((ix86_cpu) == (CPU_ATHLON))) && ((get_attr_type (insn) == TYPE_FOP) || (mult_operator (operands[3], SFmode))))
08220 {
08221 return 4;
08222 }
08223 else if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)) || (get_attr_type (insn) == TYPE_FOP)))
08224 {
08225 return 3;
08226 }
08227 else if ((((ix86_cpu) == (CPU_K6))) && ((get_attr_type (insn) == TYPE_FOP) || (mult_operator (operands[3], SFmode))))
08228 {
08229 return 2;
08230 }
08231 else
08232 {
08233 return 1;
08234 }
08235
08236 case 555:
08237 extract_insn_cached (insn);
08238 if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (mult_operator (operands[3], TFmode)))
08239 {
08240 return 5;
08241 }
08242 else if (((ix86_cpu) == (CPU_ATHLON)))
08243 {
08244 return 4;
08245 }
08246 else if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)) || (! (mult_operator (operands[3], TFmode)))))
08247 {
08248 return 3;
08249 }
08250 else if (((ix86_cpu) == (CPU_K6)))
08251 {
08252 return 2;
08253 }
08254 else
08255 {
08256 return 1;
08257 }
08258
08259 case 554:
08260 extract_insn_cached (insn);
08261 if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (mult_operator (operands[3], XFmode)))
08262 {
08263 return 5;
08264 }
08265 else if (((ix86_cpu) == (CPU_ATHLON)))
08266 {
08267 return 4;
08268 }
08269 else if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)) || (! (mult_operator (operands[3], XFmode)))))
08270 {
08271 return 3;
08272 }
08273 else if (((ix86_cpu) == (CPU_K6)))
08274 {
08275 return 2;
08276 }
08277 else
08278 {
08279 return 1;
08280 }
08281
08282 case 552:
08283 case 549:
08284 extract_constrain_insn_cached (insn);
08285 if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((which_alternative == 0) && (mult_operator (operands[3], SFmode))))
08286 {
08287 return 5;
08288 }
08289 else if ((((ix86_cpu) == (CPU_ATHLON))) && (which_alternative == 0))
08290 {
08291 return 4;
08292 }
08293 else if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)) || ((which_alternative == 0) && (! (mult_operator (operands[3], SFmode))))))
08294 {
08295 return 3;
08296 }
08297 else if ((((ix86_cpu) == (CPU_K6))) && (which_alternative == 0))
08298 {
08299 return 2;
08300 }
08301 else
08302 {
08303 return 1;
08304 }
08305
08306 case 551:
08307 case 548:
08308 extract_insn_cached (insn);
08309 if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (mult_operator (operands[3], SFmode)))
08310 {
08311 return 5;
08312 }
08313 else if (((ix86_cpu) == (CPU_ATHLON)))
08314 {
08315 return 4;
08316 }
08317 else if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)) || (! (mult_operator (operands[3], SFmode)))))
08318 {
08319 return 3;
08320 }
08321 else if (((ix86_cpu) == (CPU_K6)))
08322 {
08323 return 2;
08324 }
08325 else
08326 {
08327 return 1;
08328 }
08329
08330 case 525:
08331 case 524:
08332 case 523:
08333 case 522:
08334 case 521:
08335 extract_insn_cached (insn);
08336 if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (! (constant_call_address_operand (operands[0], VOIDmode))))
08337 {
08338 return 3;
08339 }
08340 else
08341 {
08342 return 1;
08343 }
08344
08345 case 529:
08346 case 520:
08347 case 519:
08348 case 518:
08349 case 517:
08350 case 516:
08351 case 515:
08352 case 504:
08353 case 503:
08354 extract_insn_cached (insn);
08355 if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (memory_operand (operands[0], VOIDmode)))
08356 {
08357 return 3;
08358 }
08359 else
08360 {
08361 return 1;
08362 }
08363
08364 case 417:
08365 case 414:
08366 case 413:
08367 case 408:
08368 extract_constrain_insn_cached (insn);
08369 if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)))
08370 {
08371 return 3;
08372 }
08373 else if ((((ix86_cpu) == (CPU_K6))) && (which_alternative == 1))
08374 {
08375 return 2;
08376 }
08377 else
08378 {
08379 return 1;
08380 }
08381
08382 case 397:
08383 case 396:
08384 case 395:
08385 case 394:
08386 case 393:
08387 case 392:
08388 case 391:
08389 case 390:
08390 case 389:
08391 case 378:
08392 case 377:
08393 case 376:
08394 case 375:
08395 case 374:
08396 case 373:
08397 case 372:
08398 case 371:
08399 case 370:
08400 if (((ix86_cpu) == (CPU_PENTIUMPRO)))
08401 {
08402 return 3;
08403 }
08404 else if (((ix86_cpu) == (CPU_ATHLON)))
08405 {
08406 return 2;
08407 }
08408 else
08409 {
08410 return 1;
08411 }
08412
08413 case 275:
08414 case 274:
08415 case 272:
08416 case 269:
08417 case 266:
08418 case 263:
08419 case 262:
08420 if (((ix86_cpu) == (CPU_ATHLON)))
08421 {
08422 return 42 ;
08423 }
08424 else if ((((ix86_cpu) == (CPU_K6))) || (((ix86_cpu) == (CPU_PENTIUMPRO))))
08425 {
08426 return 17 ;
08427 }
08428 else
08429 {
08430 return 1;
08431 }
08432
08433 case 261:
08434 case 260:
08435 case 259:
08436 case 258:
08437 case 257:
08438 case 256:
08439 case 255:
08440 case 254:
08441 case 253:
08442 case 252:
08443 case 251:
08444 case 250:
08445 case 249:
08446 case 248:
08447 case 247:
08448 case 246:
08449 case 245:
08450 if (((ix86_cpu) == (CPU_ATHLON)))
08451 {
08452 return 5;
08453 }
08454 else if (((ix86_cpu) == (CPU_PENTIUMPRO)))
08455 {
08456 return 4;
08457 }
08458 else if (((ix86_cpu) == (CPU_K6)))
08459 {
08460 return 2;
08461 }
08462 else
08463 {
08464 return 1;
08465 }
08466
08467 case 215:
08468 extract_constrain_insn_cached (insn);
08469 if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)))
08470 {
08471 return 3;
08472 }
08473 else if ((((ix86_cpu) == (CPU_K6))) && (which_alternative == 3))
08474 {
08475 return 2;
08476 }
08477 else
08478 {
08479 return 1;
08480 }
08481
08482 case 420:
08483 case 209:
08484 extract_constrain_insn_cached (insn);
08485 if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)))
08486 {
08487 return 3;
08488 }
08489 else if ((((ix86_cpu) == (CPU_K6))) && (which_alternative == 2))
08490 {
08491 return 2;
08492 }
08493 else
08494 {
08495 return 1;
08496 }
08497
08498 case 202:
08499 extract_constrain_insn_cached (insn);
08500 if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)))
08501 {
08502 return 3;
08503 }
08504 else if ((((ix86_cpu) == (CPU_K6))) && ((which_alternative != 0) || (pic_symbolic_operand (operands[2], SImode))))
08505 {
08506 return 2;
08507 }
08508 else
08509 {
08510 return 1;
08511 }
08512
08513 case 201:
08514 extract_constrain_insn_cached (insn);
08515 if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)))
08516 {
08517 return 3;
08518 }
08519 else if ((((ix86_cpu) == (CPU_K6))) && ((which_alternative == 2) || (pic_symbolic_operand (operands[2], SImode))))
08520 {
08521 return 2;
08522 }
08523 else
08524 {
08525 return 1;
08526 }
08527
08528 case 196:
08529 extract_constrain_insn_cached (insn);
08530 if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)))
08531 {
08532 return 3;
08533 }
08534 else if ((((ix86_cpu) == (CPU_K6))) && ((which_alternative == 2) || (pic_symbolic_operand (operands[2], DImode))))
08535 {
08536 return 2;
08537 }
08538 else
08539 {
08540 return 1;
08541 }
08542
08543 case 195:
08544 case 194:
08545 case 193:
08546 case 192:
08547 case 191:
08548 case 190:
08549 case 189:
08550 case 188:
08551 case 187:
08552 case 186:
08553 if (((ix86_cpu) == (CPU_K6)))
08554 {
08555 return 2;
08556 }
08557 else
08558 {
08559 return 1;
08560 }
08561
08562 case 178:
08563 case 177:
08564 case 176:
08565 case 175:
08566 case 174:
08567 case 173:
08568 extract_constrain_insn_cached (insn);
08569 if ((((ix86_cpu) == (CPU_ATHLON))) && ((which_alternative == 0) && (get_attr_memory (insn) == MEMORY_LOAD)))
08570 {
08571 return 10 ;
08572 }
08573 else if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)))
08574 {
08575 return 3;
08576 }
08577 else if (((((ix86_cpu) == (CPU_ATHLON))) && (which_alternative == 0)) || ((((ix86_cpu) == (CPU_K6))) && (which_alternative == 0)))
08578 {
08579 return 2;
08580 }
08581 else
08582 {
08583 return 1;
08584 }
08585
08586 case 158:
08587 case 157:
08588 case 156:
08589 case 153:
08590 case 152:
08591 case 151:
08592 case 148:
08593 case 147:
08594 case 146:
08595 if (((ix86_cpu) == (CPU_ATHLON)))
08596 {
08597 return 4;
08598 }
08599 else if (((ix86_cpu) == (CPU_PENTIUMPRO)))
08600 {
08601 return 3;
08602 }
08603 else if (((ix86_cpu) == (CPU_K6)))
08604 {
08605 return 2;
08606 }
08607 else
08608 {
08609 return 1;
08610 }
08611
08612 case 145:
08613 case 143:
08614 case 141:
08615 case 139:
08616 case 136:
08617 if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)))
08618 {
08619 return 3;
08620 }
08621 else if ((((ix86_cpu) == (CPU_ATHLON))) || (((ix86_cpu) == (CPU_K6))))
08622 {
08623 return 2;
08624 }
08625 else
08626 {
08627 return 1;
08628 }
08629
08630 case 135:
08631 extract_constrain_insn_cached (insn);
08632 if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)))
08633 {
08634 return 3;
08635 }
08636 else if (((((ix86_cpu) == (CPU_ATHLON))) && (which_alternative != 0)) || ((which_alternative == 1) && (((ix86_cpu) == (CPU_K6)))))
08637 {
08638 return 2;
08639 }
08640 else
08641 {
08642 return 1;
08643 }
08644
08645 case 171:
08646 case 170:
08647 case 168:
08648 case 167:
08649 case 165:
08650 case 164:
08651 case 162:
08652 case 161:
08653 case 144:
08654 case 142:
08655 case 140:
08656 case 138:
08657 case 134:
08658 case 133:
08659 extract_constrain_insn_cached (insn);
08660 if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)))
08661 {
08662 return 3;
08663 }
08664 else if (((((ix86_cpu) == (CPU_ATHLON))) && (which_alternative == 0)) || ((((ix86_cpu) == (CPU_K6))) && (which_alternative == 0)))
08665 {
08666 return 2;
08667 }
08668 else
08669 {
08670 return 1;
08671 }
08672
08673 case 132:
08674 case 131:
08675 case 130:
08676 case 129:
08677 extract_constrain_insn_cached (insn);
08678 if ((((ix86_cpu) == (CPU_ATHLON))) && ((which_alternative == 1) && (get_attr_memory (insn) == MEMORY_LOAD)))
08679 {
08680 return 10 ;
08681 }
08682 else if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)))
08683 {
08684 return 3;
08685 }
08686 else if ((((ix86_cpu) == (CPU_ATHLON))) || (((ix86_cpu) == (CPU_K6))))
08687 {
08688 return 2;
08689 }
08690 else
08691 {
08692 return 1;
08693 }
08694
08695 case 127:
08696 extract_constrain_insn_cached (insn);
08697 if ((((ix86_cpu) == (CPU_ATHLON))) && (((which_alternative == 0) || (which_alternative == 1)) && ((get_attr_memory (insn) == MEMORY_LOAD) && (which_alternative == 1))))
08698 {
08699 return 10 ;
08700 }
08701 else if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)))
08702 {
08703 return 3;
08704 }
08705 else if (((((ix86_cpu) == (CPU_ATHLON))) && ((which_alternative == 0) || (which_alternative == 1))) || ((((ix86_cpu) == (CPU_K6))) && ((which_alternative == 0) || (which_alternative == 1))))
08706 {
08707 return 2;
08708 }
08709 else
08710 {
08711 return 1;
08712 }
08713
08714 case 103:
08715 case 102:
08716 case 101:
08717 case 100:
08718 extract_constrain_insn_cached (insn);
08719 if ((((ix86_cpu) == (CPU_ATHLON))) && (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && (get_attr_memory (insn) == MEMORY_LOAD)))
08720 {
08721 return 10 ;
08722 }
08723 else if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)))
08724 {
08725 return 3;
08726 }
08727 else if (((((ix86_cpu) == (CPU_ATHLON))) && ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))) || ((((ix86_cpu) == (CPU_K6))) && ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))))
08728 {
08729 return 2;
08730 }
08731 else
08732 {
08733 return 1;
08734 }
08735
08736 case 94:
08737 case 93:
08738 case 89:
08739 extract_constrain_insn_cached (insn);
08740 if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)))
08741 {
08742 return 3;
08743 }
08744 else if (((((ix86_cpu) == (CPU_ATHLON))) && ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))) || ((((ix86_cpu) == (CPU_K6))) && ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))))
08745 {
08746 return 2;
08747 }
08748 else
08749 {
08750 return 1;
08751 }
08752
08753 case 88:
08754 case 87:
08755 extract_constrain_insn_cached (insn);
08756 if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((which_alternative == 1) && (memory_operand (operands[1], VOIDmode))))
08757 {
08758 return 3;
08759 }
08760 else
08761 {
08762 return 1;
08763 }
08764
08765 case 83:
08766 extract_constrain_insn_cached (insn);
08767 if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)))
08768 {
08769 return 3;
08770 }
08771 else if ((((ix86_cpu) == (CPU_K6))) && (((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative != 7) && ((which_alternative != 8) && ((which_alternative != 9) && ((which_alternative != 4) && (((flag_pic) != (0)) && (symbolic_operand (operands[1], DImode)))))))))
08772 {
08773 return 2;
08774 }
08775 else
08776 {
08777 return 1;
08778 }
08779
08780 case 76:
08781 extract_constrain_insn_cached (insn);
08782 if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((which_alternative == 0) && (memory_operand (operands[1], VOIDmode))))
08783 {
08784 return 3;
08785 }
08786 else
08787 {
08788 return 1;
08789 }
08790
08791 case 44:
08792 extract_constrain_insn_cached (insn);
08793 if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)))
08794 {
08795 return 3;
08796 }
08797 else if ((((ix86_cpu) == (CPU_K6))) && (((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (((flag_pic) != (0)) && (symbolic_operand (operands[1], SImode))))))))
08798 {
08799 return 2;
08800 }
08801 else
08802 {
08803 return 1;
08804 }
08805
08806 case 851:
08807 case 547:
08808 case 546:
08809 case 545:
08810 case 544:
08811 case 500:
08812 case 499:
08813 case 85:
08814 case 79:
08815 case 78:
08816 case 68:
08817 case 52:
08818 case 46:
08819 case 41:
08820 case 40:
08821 if (((ix86_cpu) == (CPU_PENTIUMPRO)))
08822 {
08823 return 3;
08824 }
08825 else
08826 {
08827 return 1;
08828 }
08829
08830 case 407:
08831 case 406:
08832 case 405:
08833 case 404:
08834 case 403:
08835 case 402:
08836 case 401:
08837 case 400:
08838 case 399:
08839 case 398:
08840 case 359:
08841 case 358:
08842 case 357:
08843 case 356:
08844 case 355:
08845 case 354:
08846 case 353:
08847 case 352:
08848 case 351:
08849 case 350:
08850 case 345:
08851 case 339:
08852 case 319:
08853 case 317:
08854 case 297:
08855 case 295:
08856 case 242:
08857 case 111:
08858 case 108:
08859 case 106:
08860 case 81:
08861 case 80:
08862 case 77:
08863 case 62:
08864 case 58:
08865 case 57:
08866 case 56:
08867 case 49:
08868 case 48:
08869 case 43:
08870 case 42:
08871 case 39:
08872 case 38:
08873 case 37:
08874 extract_insn_cached (insn);
08875 if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (memory_operand (operands[1], VOIDmode)))
08876 {
08877 return 3;
08878 }
08879 else
08880 {
08881 return 1;
08882 }
08883
08884 case 35:
08885 case 32:
08886 extract_constrain_insn_cached (insn);
08887 if (((((ix86_cpu) == (CPU_ATHLON))) && (which_alternative == 0)) || ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (get_attr_memory (insn) == MEMORY_LOAD)))
08888 {
08889 return 3;
08890 }
08891 else if ((((ix86_cpu) == (CPU_K6))) && (which_alternative == 0))
08892 {
08893 return 2;
08894 }
08895 else
08896 {
08897 return 1;
08898 }
08899
08900 case 34:
08901 case 31:
08902 case 27:
08903 case 24:
08904 case 23:
08905 case 21:
08906 case 20:
08907 case 19:
08908 if ((((ix86_cpu) == (CPU_ATHLON))) || ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (get_attr_memory (insn) == MEMORY_LOAD)))
08909 {
08910 return 3;
08911 }
08912 else if (((ix86_cpu) == (CPU_K6)))
08913 {
08914 return 2;
08915 }
08916 else
08917 {
08918 return 1;
08919 }
08920
08921 case 967:
08922 case 966:
08923 case 965:
08924 case 964:
08925 case 963:
08926 case 962:
08927 case 904:
08928 case 903:
08929 case 902:
08930 case 901:
08931 case 900:
08932 case 899:
08933 case 860:
08934 case 859:
08935 case 858:
08936 case 828:
08937 case 827:
08938 case 826:
08939 case 825:
08940 case 824:
08941 case 823:
08942 case 776:
08943 case 775:
08944 case 774:
08945 case 773:
08946 case 772:
08947 case 771:
08948 case 502:
08949 case 501:
08950 case 283:
08951 case 282:
08952 case 281:
08953 case 280:
08954 case 279:
08955 case 278:
08956 case 277:
08957 case 276:
08958 case 36:
08959 case 33:
08960 case 17:
08961 case 16:
08962 case 15:
08963 case 14:
08964 case 13:
08965 case 12:
08966 case 11:
08967 case 10:
08968 case 9:
08969 case 8:
08970 case 7:
08971 case 6:
08972 case 5:
08973 case 4:
08974 case 3:
08975 case 2:
08976 case 1:
08977 case 0:
08978 if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && (get_attr_memory (insn) == MEMORY_LOAD))
08979 {
08980 return 3;
08981 }
08982 else
08983 {
08984 return 1;
08985 }
08986
08987 case -1:
08988 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
08989 && asm_noperands (PATTERN (insn)) < 0)
08990 fatal_insn_not_found (insn);
08991 case 1024:
08992 case 1023:
08993 case 1022:
08994 case 1021:
08995 case 1020:
08996 case 953:
08997 case 884:
08998 case 883:
08999 case 882:
09000 case 881:
09001 case 864:
09002 case 854:
09003 case 853:
09004 case 852:
09005 case 850:
09006 case 814:
09007 case 813:
09008 case 770:
09009 case 769:
09010 case 708:
09011 case 707:
09012 case 706:
09013 case 705:
09014 case 704:
09015 case 703:
09016 case 702:
09017 case 701:
09018 case 700:
09019 case 699:
09020 case 698:
09021 case 697:
09022 case 696:
09023 case 695:
09024 case 694:
09025 case 693:
09026 case 692:
09027 case 681:
09028 case 680:
09029 case 673:
09030 case 672:
09031 case 671:
09032 case 670:
09033 case 669:
09034 case 668:
09035 case 667:
09036 case 666:
09037 case 665:
09038 case 664:
09039 case 663:
09040 case 662:
09041 case 661:
09042 case 660:
09043 case 656:
09044 case 655:
09045 case 653:
09046 case 652:
09047 case 650:
09048 case 649:
09049 case 647:
09050 case 646:
09051 case 638:
09052 case 636:
09053 case 605:
09054 case 543:
09055 case 542:
09056 case 541:
09057 case 540:
09058 case 539:
09059 case 538:
09060 case 537:
09061 case 536:
09062 case 535:
09063 case 534:
09064 case 533:
09065 case 532:
09066 case 531:
09067 case 530:
09068 case 528:
09069 case 527:
09070 case 526:
09071 case 514:
09072 case 513:
09073 case 512:
09074 case 511:
09075 case 510:
09076 case 509:
09077 case 508:
09078 case 507:
09079 case 506:
09080 case 505:
09081 case 456:
09082 case 455:
09083 case 429:
09084 case 428:
09085 case 411:
09086 case 410:
09087 case 388:
09088 case 387:
09089 case 386:
09090 case 385:
09091 case 384:
09092 case 383:
09093 case 382:
09094 case 381:
09095 case 380:
09096 case 379:
09097 case 369:
09098 case 368:
09099 case 367:
09100 case 366:
09101 case 365:
09102 case 364:
09103 case 363:
09104 case 362:
09105 case 361:
09106 case 360:
09107 case 349:
09108 case 285:
09109 case 284:
09110 case 273:
09111 case 271:
09112 case 270:
09113 case 268:
09114 case 267:
09115 case 265:
09116 case 264:
09117 case 225:
09118 case 179:
09119 case 160:
09120 case 159:
09121 case 118:
09122 case 114:
09123 case 99:
09124 case 98:
09125 case 97:
09126 case 96:
09127 case 92:
09128 case 91:
09129 case 84:
09130 case 75:
09131 case 67:
09132 case 51:
09133 case 45:
09134 case 30:
09135 case 29:
09136 case 28:
09137 case 26:
09138 case 25:
09139 case 22:
09140 case 18:
09141 return 1;
09142
09143 default:
09144 if ((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_BOTH)))
09145 {
09146 return 3;
09147 }
09148 else
09149 {
09150 return 1;
09151 }
09152
09153 }
09154 }
09155
09156 extern int athlon_load_unit_ready_cost PARAMS ((rtx));
09157 int
09158 athlon_load_unit_ready_cost (insn)
09159 rtx insn;
09160 {
09161 switch (recog_memoized (insn))
09162 {
09163 case -1:
09164 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
09165 && asm_noperands (PATTERN (insn)) < 0)
09166 fatal_insn_not_found (insn);
09167 default:
09168 return 1;
09169
09170 }
09171 }
09172
09173 extern int athlon_fp_store_unit_ready_cost PARAMS ((rtx));
09174 int
09175 athlon_fp_store_unit_ready_cost (insn)
09176 rtx insn;
09177 {
09178 switch (recog_memoized (insn))
09179 {
09180 case -1:
09181 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
09182 && asm_noperands (PATTERN (insn)) < 0)
09183 fatal_insn_not_found (insn);
09184 default:
09185 return 1;
09186
09187 }
09188 }
09189
09190 extern int athlon_fp_muladd_unit_ready_cost PARAMS ((rtx));
09191 int
09192 athlon_fp_muladd_unit_ready_cost (insn)
09193 rtx insn;
09194 {
09195 switch (recog_memoized (insn))
09196 {
09197 case -1:
09198 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
09199 && asm_noperands (PATTERN (insn)) < 0)
09200 fatal_insn_not_found (insn);
09201 default:
09202 return 1;
09203
09204 }
09205 }
09206
09207 extern int athlon_fp_add_unit_ready_cost PARAMS ((rtx));
09208 int
09209 athlon_fp_add_unit_ready_cost (insn)
09210 rtx insn;
09211 {
09212 switch (recog_memoized (insn))
09213 {
09214 case -1:
09215 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
09216 && asm_noperands (PATTERN (insn)) < 0)
09217 fatal_insn_not_found (insn);
09218 default:
09219 return 1;
09220
09221 }
09222 }
09223
09224 extern int athlon_fp_mul_unit_ready_cost PARAMS ((rtx));
09225 int
09226 athlon_fp_mul_unit_ready_cost (insn)
09227 rtx insn;
09228 {
09229 switch (recog_memoized (insn))
09230 {
09231 case -1:
09232 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
09233 && asm_noperands (PATTERN (insn)) < 0)
09234 fatal_insn_not_found (insn);
09235 default:
09236 return 1;
09237
09238 }
09239 }
09240
09241 extern int athlon_fp_unit_ready_cost PARAMS ((rtx));
09242 int
09243 athlon_fp_unit_ready_cost (insn)
09244 rtx insn;
09245 {
09246 switch (recog_memoized (insn))
09247 {
09248 case 645:
09249 case 644:
09250 if (((ix86_cpu) == (CPU_ATHLON)))
09251 {
09252 return 7;
09253 }
09254 else
09255 {
09256 return 100 ;
09257 }
09258
09259 case 642:
09260 extract_constrain_insn_cached (insn);
09261 if (((which_alternative == 0) || (which_alternative == 1)) && (((ix86_cpu) == (CPU_ATHLON))))
09262 {
09263 return 7;
09264 }
09265 else
09266 {
09267 return 100 ;
09268 }
09269
09270 case 643:
09271 case 641:
09272 extract_constrain_insn_cached (insn);
09273 if (((which_alternative == 0) || (which_alternative == 1)) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON))))))
09274 {
09275 return 7;
09276 }
09277 else
09278 {
09279 return 100 ;
09280 }
09281
09282 case 581:
09283 case 579:
09284 case 577:
09285 case 575:
09286 case 573:
09287 case 571:
09288 case 569:
09289 extract_insn_cached (insn);
09290 if ((get_attr_type (insn) == TYPE_FDIV) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON))))))
09291 {
09292 return 24 ;
09293 }
09294 else if (((mult_operator (operands[3], TFmode)) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON)))))) || ((get_attr_type (insn) == TYPE_FOP) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON)))))))
09295 {
09296 return 4;
09297 }
09298 else
09299 {
09300 return 100 ;
09301 }
09302
09303 case 580:
09304 case 578:
09305 case 576:
09306 case 574:
09307 case 572:
09308 case 570:
09309 case 568:
09310 extract_insn_cached (insn);
09311 if ((get_attr_type (insn) == TYPE_FDIV) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON))))))
09312 {
09313 return 24 ;
09314 }
09315 else if (((mult_operator (operands[3], XFmode)) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON)))))) || ((get_attr_type (insn) == TYPE_FOP) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON)))))))
09316 {
09317 return 4;
09318 }
09319 else
09320 {
09321 return 100 ;
09322 }
09323
09324 case 562:
09325 extract_constrain_insn_cached (insn);
09326 if ((get_attr_type (insn) == TYPE_FDIV) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON))))))
09327 {
09328 return 24 ;
09329 }
09330 else if ((((which_alternative != 2) && (mult_operator (operands[3], DFmode))) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON)))))) || ((get_attr_type (insn) == TYPE_FOP) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON)))))))
09331 {
09332 return 4;
09333 }
09334 else
09335 {
09336 return 100 ;
09337 }
09338
09339 case 567:
09340 case 566:
09341 case 565:
09342 case 564:
09343 case 561:
09344 extract_insn_cached (insn);
09345 if ((get_attr_type (insn) == TYPE_FDIV) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON))))))
09346 {
09347 return 24 ;
09348 }
09349 else if (((mult_operator (operands[3], DFmode)) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON)))))) || ((get_attr_type (insn) == TYPE_FOP) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON)))))))
09350 {
09351 return 4;
09352 }
09353 else
09354 {
09355 return 100 ;
09356 }
09357
09358 case 557:
09359 extract_constrain_insn_cached (insn);
09360 if ((get_attr_type (insn) == TYPE_FDIV) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON))))))
09361 {
09362 return 24 ;
09363 }
09364 else if ((((which_alternative != 2) && (mult_operator (operands[3], SFmode))) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON)))))) || ((get_attr_type (insn) == TYPE_FOP) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON)))))))
09365 {
09366 return 4;
09367 }
09368 else
09369 {
09370 return 100 ;
09371 }
09372
09373 case 560:
09374 case 559:
09375 case 556:
09376 extract_insn_cached (insn);
09377 if ((get_attr_type (insn) == TYPE_FDIV) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON))))))
09378 {
09379 return 24 ;
09380 }
09381 else if (((mult_operator (operands[3], SFmode)) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON)))))) || ((get_attr_type (insn) == TYPE_FOP) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON)))))))
09382 {
09383 return 4;
09384 }
09385 else
09386 {
09387 return 100 ;
09388 }
09389
09390 case 555:
09391 extract_insn_cached (insn);
09392 if (((mult_operator (operands[3], TFmode)) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON)))))) || ((! (mult_operator (operands[3], TFmode))) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON)))))))
09393 {
09394 return 4;
09395 }
09396 else
09397 {
09398 return 100 ;
09399 }
09400
09401 case 554:
09402 extract_insn_cached (insn);
09403 if (((mult_operator (operands[3], XFmode)) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON)))))) || ((! (mult_operator (operands[3], XFmode))) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON)))))))
09404 {
09405 return 4;
09406 }
09407 else
09408 {
09409 return 100 ;
09410 }
09411
09412 case 552:
09413 case 549:
09414 extract_constrain_insn_cached (insn);
09415 if ((((which_alternative == 0) && (mult_operator (operands[3], SFmode))) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON)))))) || (((which_alternative == 0) && (! (mult_operator (operands[3], SFmode)))) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON)))))))
09416 {
09417 return 4;
09418 }
09419 else
09420 {
09421 return 100 ;
09422 }
09423
09424 case 551:
09425 case 548:
09426 extract_insn_cached (insn);
09427 if (((mult_operator (operands[3], SFmode)) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON)))))) || ((! (mult_operator (operands[3], SFmode))) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON)))))))
09428 {
09429 return 4;
09430 }
09431 else
09432 {
09433 return 100 ;
09434 }
09435
09436 case 178:
09437 case 177:
09438 case 176:
09439 case 175:
09440 case 174:
09441 case 173:
09442 extract_constrain_insn_cached (insn);
09443 if ((which_alternative == 0) && (((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_STORE)) && ((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON))))))
09444 {
09445 return 10 ;
09446 }
09447 else if ((which_alternative == 0) && (((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_STORE)) && ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON))))))
09448 {
09449 return 2;
09450 }
09451 else if ((which_alternative == 0) && (((! (get_attr_memory (insn) == MEMORY_LOAD)) && (! (get_attr_memory (insn) == MEMORY_STORE))) && ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON))))))
09452 {
09453 return 2;
09454 }
09455 else
09456 {
09457 return 100 ;
09458 }
09459
09460 case 158:
09461 case 157:
09462 case 156:
09463 case 153:
09464 case 152:
09465 case 151:
09466 case 148:
09467 case 147:
09468 case 146:
09469 if (((ix86_cpu) == (CPU_ATHLON)))
09470 {
09471 return 4;
09472 }
09473 else
09474 {
09475 return 100 ;
09476 }
09477
09478 case 397:
09479 case 396:
09480 case 395:
09481 case 394:
09482 case 393:
09483 case 392:
09484 case 391:
09485 case 390:
09486 case 389:
09487 case 378:
09488 case 377:
09489 case 376:
09490 case 375:
09491 case 374:
09492 case 373:
09493 case 372:
09494 case 371:
09495 case 370:
09496 case 145:
09497 case 143:
09498 case 141:
09499 case 139:
09500 case 136:
09501 if (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON)))))
09502 {
09503 return 2;
09504 }
09505 else
09506 {
09507 return 100 ;
09508 }
09509
09510 case 135:
09511 extract_constrain_insn_cached (insn);
09512 if ((which_alternative == 1) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON))))))
09513 {
09514 return 2;
09515 }
09516 else
09517 {
09518 return 100 ;
09519 }
09520
09521 case 171:
09522 case 170:
09523 case 168:
09524 case 167:
09525 case 165:
09526 case 164:
09527 case 162:
09528 case 161:
09529 case 144:
09530 case 142:
09531 case 140:
09532 case 138:
09533 case 134:
09534 case 133:
09535 extract_constrain_insn_cached (insn);
09536 if ((which_alternative == 0) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON))))))
09537 {
09538 return 2;
09539 }
09540 else
09541 {
09542 return 100 ;
09543 }
09544
09545 case 132:
09546 case 131:
09547 case 130:
09548 case 129:
09549 extract_constrain_insn_cached (insn);
09550 if (((which_alternative == 1) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_STORE))) && ((get_attr_memory (insn) == MEMORY_LOAD) && ((which_alternative == 1) && (((ix86_cpu) == (CPU_ATHLON))))))
09551 {
09552 return 10 ;
09553 }
09554 else if (((which_alternative == 1) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_STORE))) && ((((get_attr_memory (insn) == MEMORY_LOAD) && ((which_alternative == 0) && (((ix86_cpu) == (CPU_ATHLON))))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && ((which_alternative == 1) && (((ix86_cpu) == (CPU_ATHLON)))))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && ((which_alternative == 0) && (((ix86_cpu) == (CPU_ATHLON)))))))
09555 {
09556 return 2;
09557 }
09558 else if (((which_alternative != 1) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (! (get_attr_memory (insn) == MEMORY_STORE)))) && ((((get_attr_memory (insn) == MEMORY_LOAD) && ((which_alternative == 0) && (((ix86_cpu) == (CPU_ATHLON))))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && ((which_alternative == 1) && (((ix86_cpu) == (CPU_ATHLON)))))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && ((which_alternative == 0) && (((ix86_cpu) == (CPU_ATHLON)))))))
09559 {
09560 return 2;
09561 }
09562 else
09563 {
09564 return 100 ;
09565 }
09566
09567 case 127:
09568 extract_constrain_insn_cached (insn);
09569 if (((which_alternative == 0) || (which_alternative == 1)) && ((((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_STORE)) && (which_alternative == 1)) && ((get_attr_memory (insn) == MEMORY_LOAD) && ((which_alternative == 1) && (((ix86_cpu) == (CPU_ATHLON)))))))
09570 {
09571 return 10 ;
09572 }
09573 else if (((which_alternative == 0) || (which_alternative == 1)) && ((((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_STORE)) && (which_alternative == 1)) && ((((get_attr_memory (insn) == MEMORY_LOAD) && ((which_alternative != 1) && (((ix86_cpu) == (CPU_ATHLON))))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && ((which_alternative == 1) && (((ix86_cpu) == (CPU_ATHLON)))))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && ((which_alternative != 1) && (((ix86_cpu) == (CPU_ATHLON))))))))
09574 {
09575 return 2;
09576 }
09577 else if (((which_alternative == 0) || (which_alternative == 1)) && ((((which_alternative != 0) && (which_alternative != 1)) || (((! (get_attr_memory (insn) == MEMORY_LOAD)) && (! (get_attr_memory (insn) == MEMORY_STORE))) || (which_alternative != 1))) && ((((get_attr_memory (insn) == MEMORY_LOAD) && ((which_alternative != 1) && (((ix86_cpu) == (CPU_ATHLON))))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && ((which_alternative == 1) && (((ix86_cpu) == (CPU_ATHLON)))))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && ((which_alternative != 1) && (((ix86_cpu) == (CPU_ATHLON))))))))
09578 {
09579 return 2;
09580 }
09581 else
09582 {
09583 return 100 ;
09584 }
09585
09586 case 103:
09587 case 102:
09588 case 101:
09589 case 100:
09590 extract_constrain_insn_cached (insn);
09591 if (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && (((which_alternative == 3) || ((which_alternative == 4) || ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_STORE)))) && ((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON))))))
09592 {
09593 return 10 ;
09594 }
09595 else if (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && (((which_alternative == 3) || ((which_alternative == 4) || ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_STORE)))) && ((((get_attr_memory (insn) == MEMORY_LOAD) && (((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && (((ix86_cpu) == (CPU_ATHLON))))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON))))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && (((ix86_cpu) == (CPU_ATHLON))))))))
09596 {
09597 return 2;
09598 }
09599 else if (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && (((which_alternative != 3) && ((which_alternative != 4) && (((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (! (get_attr_memory (insn) == MEMORY_STORE)))))) && ((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON))))))
09600 {
09601 return 10 ;
09602 }
09603 else if (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && (((which_alternative != 3) && ((which_alternative != 4) && (((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (! (get_attr_memory (insn) == MEMORY_STORE)))))) && ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON))))))
09604 {
09605 return 2;
09606 }
09607 else
09608 {
09609 return 100 ;
09610 }
09611
09612 case 94:
09613 case 93:
09614 case 89:
09615 extract_constrain_insn_cached (insn);
09616 if (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON))))))
09617 {
09618 return 2;
09619 }
09620 else
09621 {
09622 return 100 ;
09623 }
09624
09625 case 35:
09626 case 32:
09627 extract_constrain_insn_cached (insn);
09628 if ((which_alternative == 0) && (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON))))))
09629 {
09630 return 3;
09631 }
09632 else
09633 {
09634 return 100 ;
09635 }
09636
09637 case 34:
09638 case 31:
09639 case 27:
09640 case 24:
09641 case 23:
09642 case 21:
09643 case 20:
09644 case 19:
09645 if (((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (((ix86_cpu) == (CPU_ATHLON)))))
09646 {
09647 return 3;
09648 }
09649 else
09650 {
09651 return 100 ;
09652 }
09653
09654 case -1:
09655 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
09656 && asm_noperands (PATTERN (insn)) < 0)
09657 fatal_insn_not_found (insn);
09658 default:
09659 return 100 ;
09660
09661 }
09662 }
09663
09664 extern int athlon_muldiv_unit_ready_cost PARAMS ((rtx));
09665 int
09666 athlon_muldiv_unit_ready_cost (insn)
09667 rtx insn;
09668 {
09669 switch (recog_memoized (insn))
09670 {
09671 case 261:
09672 case 260:
09673 case 259:
09674 case 258:
09675 case 257:
09676 case 256:
09677 case 255:
09678 case 254:
09679 case 253:
09680 case 252:
09681 case 251:
09682 case 250:
09683 case 249:
09684 case 248:
09685 case 247:
09686 case 246:
09687 case 245:
09688 if (((ix86_cpu) == (CPU_ATHLON)))
09689 {
09690 return 5;
09691 }
09692 else
09693 {
09694 return 42 ;
09695 }
09696
09697 case -1:
09698 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
09699 && asm_noperands (PATTERN (insn)) < 0)
09700 fatal_insn_not_found (insn);
09701 default:
09702 return 42 ;
09703
09704 }
09705 }
09706
09707 extern unsigned int athlon_muldiv_unit_blockage_range PARAMS ((rtx));
09708 unsigned int
09709 athlon_muldiv_unit_blockage_range (insn)
09710 rtx insn;
09711 {
09712 switch (recog_memoized (insn))
09713 {
09714 case -1:
09715 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
09716 && asm_noperands (PATTERN (insn)) < 0)
09717 fatal_insn_not_found (insn);
09718 default:
09719 return 65578 ;
09720
09721 }
09722 }
09723
09724 extern int athlon_ieu_unit_ready_cost PARAMS ((rtx));
09725 int
09726 athlon_ieu_unit_ready_cost (insn)
09727 rtx insn;
09728 {
09729 switch (recog_memoized (insn))
09730 {
09731 case 659:
09732 extract_constrain_insn_cached (insn);
09733 if ((((which_alternative == 1) && (! (const0_operand (operands[2], DImode)))) && (((ix86_cpu) == (CPU_ATHLON)))) || ((((which_alternative == 1) && (const0_operand (operands[2], DImode))) && (((ix86_cpu) == (CPU_ATHLON)))) || ((which_alternative == 0) && (((ix86_cpu) == (CPU_ATHLON))))))
09734 {
09735 return 1;
09736 }
09737 else
09738 {
09739 return 42 ;
09740 }
09741
09742 case 658:
09743 extract_constrain_insn_cached (insn);
09744 if ((((which_alternative == 1) && (! (const0_operand (operands[2], SImode)))) && (((ix86_cpu) == (CPU_ATHLON)))) || ((((which_alternative == 1) && (const0_operand (operands[2], SImode))) && (((ix86_cpu) == (CPU_ATHLON)))) || ((which_alternative == 0) && (((ix86_cpu) == (CPU_ATHLON))))))
09745 {
09746 return 1;
09747 }
09748 else
09749 {
09750 return 42 ;
09751 }
09752
09753 case 643:
09754 case 641:
09755 extract_constrain_insn_cached (insn);
09756 if (((which_alternative == 2) || (which_alternative == 3)) && (((ix86_cpu) == (CPU_ATHLON))))
09757 {
09758 return 1;
09759 }
09760 else
09761 {
09762 return 42 ;
09763 }
09764
09765 case 635:
09766 case 634:
09767 case 633:
09768 case 632:
09769 case 631:
09770 case 630:
09771 case 629:
09772 case 628:
09773 case 627:
09774 case 626:
09775 case 625:
09776 case 624:
09777 case 623:
09778 case 622:
09779 case 621:
09780 case 620:
09781 case 619:
09782 case 618:
09783 case 617:
09784 case 616:
09785 case 615:
09786 case 614:
09787 case 613:
09788 case 612:
09789 case 611:
09790 case 610:
09791 case 609:
09792 case 608:
09793 case 607:
09794 case 606:
09795 if (((ix86_cpu) == (CPU_ATHLON)))
09796 {
09797 return 15 ;
09798 }
09799 else
09800 {
09801 return 42 ;
09802 }
09803
09804 case 432:
09805 case 431:
09806 case 423:
09807 extract_constrain_insn_cached (insn);
09808 if (((which_alternative == 1) && (((ix86_cpu) == (CPU_ATHLON)))) || ((which_alternative == 0) && (((ix86_cpu) == (CPU_ATHLON)))))
09809 {
09810 return 1;
09811 }
09812 else
09813 {
09814 return 42 ;
09815 }
09816
09817 case 420:
09818 extract_constrain_insn_cached (insn);
09819 if (((get_attr_type (insn) == TYPE_ISHIFT) && (((ix86_cpu) == (CPU_ATHLON)))) || (((which_alternative == 2) && (((ix86_cpu) == (CPU_ATHLON)))) || ((get_attr_type (insn) == TYPE_ALU) && (((ix86_cpu) == (CPU_ATHLON))))))
09820 {
09821 return 1;
09822 }
09823 else
09824 {
09825 return 42 ;
09826 }
09827
09828 case 416:
09829 extract_constrain_insn_cached (insn);
09830 if ((((! ((TARGET_DOUBLE_WITH_ADD) != (0))) || (! (const1_operand (operands[2], VOIDmode)))) && (((ix86_cpu) == (CPU_ATHLON)))) || ((((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode))) && (((ix86_cpu) == (CPU_ATHLON)))))
09831 {
09832 return 1;
09833 }
09834 else
09835 {
09836 return 42 ;
09837 }
09838
09839 case 414:
09840 extract_constrain_insn_cached (insn);
09841 if ((((which_alternative == 0) && ((! ((TARGET_DOUBLE_WITH_ADD) != (0))) || (! (const1_operand (operands[2], VOIDmode))))) && (((ix86_cpu) == (CPU_ATHLON)))) || (((which_alternative == 1) && (((ix86_cpu) == (CPU_ATHLON)))) || (((which_alternative == 0) && (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode)))) && (((ix86_cpu) == (CPU_ATHLON))))))
09842 {
09843 return 1;
09844 }
09845 else
09846 {
09847 return 42 ;
09848 }
09849
09850 case 422:
09851 case 421:
09852 case 419:
09853 case 418:
09854 case 415:
09855 case 409:
09856 if (((get_attr_type (insn) == TYPE_ISHIFT) && (((ix86_cpu) == (CPU_ATHLON)))) || ((get_attr_type (insn) == TYPE_ALU) && (((ix86_cpu) == (CPU_ATHLON)))))
09857 {
09858 return 1;
09859 }
09860 else
09861 {
09862 return 42 ;
09863 }
09864
09865 case 417:
09866 case 413:
09867 case 408:
09868 extract_constrain_insn_cached (insn);
09869 if (((get_attr_type (insn) == TYPE_ISHIFT) && (((ix86_cpu) == (CPU_ATHLON)))) || (((which_alternative == 1) && (((ix86_cpu) == (CPU_ATHLON)))) || ((get_attr_type (insn) == TYPE_ALU) && (((ix86_cpu) == (CPU_ATHLON))))))
09870 {
09871 return 1;
09872 }
09873 else
09874 {
09875 return 42 ;
09876 }
09877
09878 case 292:
09879 case 288:
09880 extract_constrain_insn_cached (insn);
09881 if ((((which_alternative != 0) && (which_alternative != 1)) && (((ix86_cpu) == (CPU_ATHLON)))) || (((which_alternative == 0) || (which_alternative == 1)) && (((ix86_cpu) == (CPU_ATHLON)))))
09882 {
09883 return 1;
09884 }
09885 else
09886 {
09887 return 42 ;
09888 }
09889
09890 case 286:
09891 extract_constrain_insn_cached (insn);
09892 if ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && (((ix86_cpu) == (CPU_ATHLON)))) || (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && (((ix86_cpu) == (CPU_ATHLON)))))
09893 {
09894 return 1;
09895 }
09896 else
09897 {
09898 return 42 ;
09899 }
09900
09901 case 261:
09902 case 260:
09903 case 259:
09904 case 258:
09905 case 257:
09906 case 256:
09907 case 255:
09908 case 254:
09909 case 253:
09910 case 252:
09911 case 251:
09912 case 250:
09913 case 249:
09914 case 248:
09915 case 247:
09916 case 246:
09917 case 245:
09918 if (((ix86_cpu) == (CPU_ATHLON)))
09919 {
09920 return 5;
09921 }
09922 else
09923 {
09924 return 42 ;
09925 }
09926
09927 case 223:
09928 case 222:
09929 case 221:
09930 case 219:
09931 case 218:
09932 case 217:
09933 case 216:
09934 extract_insn_cached (insn);
09935 if (((incdec_operand (operands[2], QImode)) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (incdec_operand (operands[2], QImode))) && (((ix86_cpu) == (CPU_ATHLON)))))
09936 {
09937 return 1;
09938 }
09939 else
09940 {
09941 return 42 ;
09942 }
09943
09944 case 215:
09945 extract_constrain_insn_cached (insn);
09946 if ((((which_alternative != 3) && (incdec_operand (operands[2], QImode))) && (((ix86_cpu) == (CPU_ATHLON)))) || (((which_alternative == 3) && (((ix86_cpu) == (CPU_ATHLON)))) || (((which_alternative != 3) && (! (incdec_operand (operands[2], QImode)))) && (((ix86_cpu) == (CPU_ATHLON))))))
09947 {
09948 return 1;
09949 }
09950 else
09951 {
09952 return 42 ;
09953 }
09954
09955 case 220:
09956 case 214:
09957 case 213:
09958 case 212:
09959 case 211:
09960 case 210:
09961 extract_insn_cached (insn);
09962 if (((incdec_operand (operands[2], HImode)) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (incdec_operand (operands[2], HImode))) && (((ix86_cpu) == (CPU_ATHLON)))))
09963 {
09964 return 1;
09965 }
09966 else
09967 {
09968 return 42 ;
09969 }
09970
09971 case 209:
09972 extract_constrain_insn_cached (insn);
09973 if ((((which_alternative != 2) && (incdec_operand (operands[2], HImode))) && (((ix86_cpu) == (CPU_ATHLON)))) || (((which_alternative == 2) && (((ix86_cpu) == (CPU_ATHLON)))) || (((which_alternative != 2) && (! (incdec_operand (operands[2], HImode)))) && (((ix86_cpu) == (CPU_ATHLON))))))
09974 {
09975 return 1;
09976 }
09977 else
09978 {
09979 return 42 ;
09980 }
09981
09982 case 208:
09983 case 207:
09984 case 206:
09985 case 205:
09986 case 204:
09987 case 203:
09988 extract_insn_cached (insn);
09989 if (((incdec_operand (operands[2], SImode)) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (incdec_operand (operands[2], SImode))) && (((ix86_cpu) == (CPU_ATHLON)))))
09990 {
09991 return 1;
09992 }
09993 else
09994 {
09995 return 42 ;
09996 }
09997
09998 case 202:
09999 extract_constrain_insn_cached (insn);
10000 if (((get_attr_type (insn) == TYPE_INCDEC) && (((ix86_cpu) == (CPU_ATHLON)))) || ((((which_alternative != 0) || (pic_symbolic_operand (operands[2], SImode))) && (((ix86_cpu) == (CPU_ATHLON)))) || ((get_attr_type (insn) == TYPE_ALU) && (((ix86_cpu) == (CPU_ATHLON))))))
10001 {
10002 return 1;
10003 }
10004 else
10005 {
10006 return 42 ;
10007 }
10008
10009 case 201:
10010 extract_constrain_insn_cached (insn);
10011 if (((get_attr_type (insn) == TYPE_INCDEC) && (((ix86_cpu) == (CPU_ATHLON)))) || ((((which_alternative == 2) || (pic_symbolic_operand (operands[2], SImode))) && (((ix86_cpu) == (CPU_ATHLON)))) || ((get_attr_type (insn) == TYPE_ALU) && (((ix86_cpu) == (CPU_ATHLON))))))
10012 {
10013 return 1;
10014 }
10015 else
10016 {
10017 return 42 ;
10018 }
10019
10020 case 200:
10021 case 199:
10022 case 198:
10023 case 197:
10024 extract_insn_cached (insn);
10025 if (((incdec_operand (operands[2], DImode)) && (((ix86_cpu) == (CPU_ATHLON)))) || ((! (incdec_operand (operands[2], DImode))) && (((ix86_cpu) == (CPU_ATHLON)))))
10026 {
10027 return 1;
10028 }
10029 else
10030 {
10031 return 42 ;
10032 }
10033
10034 case 196:
10035 extract_constrain_insn_cached (insn);
10036 if (((get_attr_type (insn) == TYPE_INCDEC) && (((ix86_cpu) == (CPU_ATHLON)))) || ((((which_alternative == 2) || (pic_symbolic_operand (operands[2], DImode))) && (((ix86_cpu) == (CPU_ATHLON)))) || ((get_attr_type (insn) == TYPE_ALU) && (((ix86_cpu) == (CPU_ATHLON))))))
10037 {
10038 return 1;
10039 }
10040 else
10041 {
10042 return 42 ;
10043 }
10044
10045 case 89:
10046 extract_constrain_insn_cached (insn);
10047 if ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 3) || (which_alternative == 4))) && (((ix86_cpu) == (CPU_ATHLON))))
10048 {
10049 return 1;
10050 }
10051 else
10052 {
10053 return 42 ;
10054 }
10055
10056 case 88:
10057 case 87:
10058 extract_constrain_insn_cached (insn);
10059 if ((which_alternative == 1) && (((ix86_cpu) == (CPU_ATHLON))))
10060 {
10061 return 1;
10062 }
10063 else
10064 {
10065 return 42 ;
10066 }
10067
10068 case 83:
10069 extract_constrain_insn_cached (insn);
10070 if (((((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative != 7) && ((which_alternative != 8) && ((which_alternative != 9) && ((which_alternative != 4) && (((flag_pic) != (0)) && (symbolic_operand (operands[1], DImode)))))))) && (((ix86_cpu) == (CPU_ATHLON)))) || ((((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative != 7) && ((which_alternative != 8) && ((which_alternative != 9) && ((which_alternative != 4) && ((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], DImode))))))))) && (((ix86_cpu) == (CPU_ATHLON)))))
10071 {
10072 return 1;
10073 }
10074 else
10075 {
10076 return 42 ;
10077 }
10078
10079 case 76:
10080 extract_constrain_insn_cached (insn);
10081 if ((which_alternative == 0) && (((ix86_cpu) == (CPU_ATHLON))))
10082 {
10083 return 1;
10084 }
10085 else
10086 {
10087 return 42 ;
10088 }
10089
10090 case 71:
10091 extract_constrain_insn_cached (insn);
10092 if ((((! (q_regs_operand (operands[0], QImode))) || ((TARGET_MOVX) != (0))) && (((ix86_cpu) == (CPU_ATHLON)))) || (((q_regs_operand (operands[0], QImode)) && (! ((TARGET_MOVX) != (0)))) && (((ix86_cpu) == (CPU_ATHLON)))))
10093 {
10094 return 1;
10095 }
10096 else
10097 {
10098 return 42 ;
10099 }
10100
10101 case 70:
10102 case 66:
10103 case 65:
10104 if (((get_attr_type (insn) == TYPE_IMOVX) && (((ix86_cpu) == (CPU_ATHLON)))) || ((get_attr_type (insn) == TYPE_IMOV) && (((ix86_cpu) == (CPU_ATHLON)))))
10105 {
10106 return 1;
10107 }
10108 else
10109 {
10110 return 42 ;
10111 }
10112
10113 case 59:
10114 extract_constrain_insn_cached (insn);
10115 if (((((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2))))) && (((ix86_cpu) == (CPU_ATHLON)))) || ((((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2)))))) && (((ix86_cpu) == (CPU_ATHLON)))))
10116 {
10117 return 1;
10118 }
10119 else
10120 {
10121 return 42 ;
10122 }
10123
10124 case 50:
10125 extract_constrain_insn_cached (insn);
10126 if ((((((which_alternative != 0) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_HIMODE_MATH) == (0))))) && (((which_alternative != 1) && (which_alternative != 2)) || (! (aligned_operand (operands[1], HImode))))) && (((TARGET_MOVX) != (0)) && ((which_alternative == 0) || (which_alternative == 2)))) && (((ix86_cpu) == (CPU_ATHLON)))) || ((get_attr_type (insn) == TYPE_IMOV) && (((ix86_cpu) == (CPU_ATHLON)))))
10127 {
10128 return 1;
10129 }
10130 else
10131 {
10132 return 42 ;
10133 }
10134
10135 case 44:
10136 extract_constrain_insn_cached (insn);
10137 if (((((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (((flag_pic) != (0)) && (symbolic_operand (operands[1], SImode))))))) && (((ix86_cpu) == (CPU_ATHLON)))) || ((((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && ((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], SImode)))))))) && (((ix86_cpu) == (CPU_ATHLON)))))
10138 {
10139 return 1;
10140 }
10141 else
10142 {
10143 return 42 ;
10144 }
10145
10146 case 679:
10147 case 678:
10148 case 677:
10149 case 676:
10150 case 675:
10151 case 674:
10152 case 640:
10153 case 639:
10154 case 638:
10155 case 637:
10156 case 636:
10157 case 605:
10158 case 547:
10159 case 546:
10160 case 545:
10161 case 544:
10162 case 529:
10163 case 525:
10164 case 524:
10165 case 523:
10166 case 522:
10167 case 521:
10168 case 520:
10169 case 519:
10170 case 518:
10171 case 517:
10172 case 516:
10173 case 515:
10174 case 504:
10175 case 503:
10176 case 500:
10177 case 499:
10178 case 498:
10179 case 497:
10180 case 496:
10181 case 495:
10182 case 494:
10183 case 493:
10184 case 492:
10185 case 491:
10186 case 490:
10187 case 489:
10188 case 488:
10189 case 487:
10190 case 486:
10191 case 485:
10192 case 484:
10193 case 483:
10194 case 482:
10195 case 481:
10196 case 480:
10197 case 479:
10198 case 478:
10199 case 477:
10200 case 476:
10201 case 475:
10202 case 474:
10203 case 473:
10204 case 472:
10205 case 471:
10206 case 470:
10207 case 469:
10208 case 468:
10209 case 467:
10210 case 466:
10211 case 465:
10212 case 464:
10213 case 463:
10214 case 462:
10215 case 461:
10216 case 460:
10217 case 459:
10218 case 458:
10219 case 457:
10220 case 454:
10221 case 453:
10222 case 452:
10223 case 451:
10224 case 450:
10225 case 449:
10226 case 448:
10227 case 447:
10228 case 446:
10229 case 445:
10230 case 444:
10231 case 443:
10232 case 442:
10233 case 441:
10234 case 440:
10235 case 439:
10236 case 438:
10237 case 437:
10238 case 436:
10239 case 435:
10240 case 434:
10241 case 433:
10242 case 430:
10243 case 427:
10244 case 426:
10245 case 425:
10246 case 424:
10247 case 412:
10248 case 407:
10249 case 406:
10250 case 405:
10251 case 404:
10252 case 403:
10253 case 402:
10254 case 401:
10255 case 400:
10256 case 399:
10257 case 398:
10258 case 359:
10259 case 358:
10260 case 357:
10261 case 356:
10262 case 355:
10263 case 354:
10264 case 353:
10265 case 352:
10266 case 351:
10267 case 350:
10268 case 348:
10269 case 347:
10270 case 346:
10271 case 345:
10272 case 344:
10273 case 343:
10274 case 342:
10275 case 341:
10276 case 340:
10277 case 339:
10278 case 338:
10279 case 337:
10280 case 336:
10281 case 335:
10282 case 334:
10283 case 333:
10284 case 332:
10285 case 331:
10286 case 330:
10287 case 329:
10288 case 328:
10289 case 327:
10290 case 326:
10291 case 325:
10292 case 324:
10293 case 323:
10294 case 322:
10295 case 321:
10296 case 320:
10297 case 319:
10298 case 318:
10299 case 317:
10300 case 316:
10301 case 315:
10302 case 314:
10303 case 313:
10304 case 312:
10305 case 311:
10306 case 310:
10307 case 309:
10308 case 308:
10309 case 307:
10310 case 306:
10311 case 305:
10312 case 304:
10313 case 303:
10314 case 302:
10315 case 301:
10316 case 300:
10317 case 299:
10318 case 298:
10319 case 297:
10320 case 296:
10321 case 295:
10322 case 294:
10323 case 293:
10324 case 291:
10325 case 290:
10326 case 289:
10327 case 287:
10328 case 283:
10329 case 282:
10330 case 281:
10331 case 280:
10332 case 279:
10333 case 278:
10334 case 277:
10335 case 276:
10336 case 244:
10337 case 243:
10338 case 242:
10339 case 241:
10340 case 240:
10341 case 239:
10342 case 238:
10343 case 237:
10344 case 236:
10345 case 235:
10346 case 234:
10347 case 233:
10348 case 232:
10349 case 231:
10350 case 230:
10351 case 229:
10352 case 228:
10353 case 227:
10354 case 226:
10355 case 224:
10356 case 195:
10357 case 194:
10358 case 193:
10359 case 192:
10360 case 191:
10361 case 190:
10362 case 189:
10363 case 188:
10364 case 187:
10365 case 186:
10366 case 185:
10367 case 184:
10368 case 183:
10369 case 182:
10370 case 181:
10371 case 180:
10372 case 126:
10373 case 125:
10374 case 124:
10375 case 123:
10376 case 122:
10377 case 121:
10378 case 120:
10379 case 119:
10380 case 117:
10381 case 116:
10382 case 113:
10383 case 111:
10384 case 110:
10385 case 108:
10386 case 107:
10387 case 106:
10388 case 86:
10389 case 85:
10390 case 84:
10391 case 81:
10392 case 80:
10393 case 79:
10394 case 78:
10395 case 77:
10396 case 74:
10397 case 73:
10398 case 72:
10399 case 69:
10400 case 68:
10401 case 67:
10402 case 64:
10403 case 63:
10404 case 62:
10405 case 61:
10406 case 60:
10407 case 58:
10408 case 57:
10409 case 56:
10410 case 55:
10411 case 54:
10412 case 53:
10413 case 52:
10414 case 51:
10415 case 49:
10416 case 48:
10417 case 47:
10418 case 46:
10419 case 45:
10420 case 43:
10421 case 42:
10422 case 41:
10423 case 40:
10424 case 39:
10425 case 38:
10426 case 37:
10427 case 17:
10428 case 16:
10429 case 15:
10430 case 14:
10431 case 13:
10432 case 12:
10433 case 11:
10434 case 10:
10435 case 8:
10436 case 7:
10437 case 5:
10438 case 4:
10439 case 2:
10440 case 1:
10441 if (((ix86_cpu) == (CPU_ATHLON)))
10442 {
10443 return 1;
10444 }
10445 else
10446 {
10447 return 42 ;
10448 }
10449
10450 case 115:
10451 case 112:
10452 case 109:
10453 case 9:
10454 case 6:
10455 case 3:
10456 case 0:
10457 extract_constrain_insn_cached (insn);
10458 if (((which_alternative == 0) && (((ix86_cpu) == (CPU_ATHLON)))) || ((which_alternative == 1) && (((ix86_cpu) == (CPU_ATHLON)))))
10459 {
10460 return 1;
10461 }
10462 else
10463 {
10464 return 42 ;
10465 }
10466
10467 case -1:
10468 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
10469 && asm_noperands (PATTERN (insn)) < 0)
10470 fatal_insn_not_found (insn);
10471 default:
10472 return 42 ;
10473
10474 }
10475 }
10476
10477 extern unsigned int athlon_ieu_unit_blockage_range PARAMS ((rtx));
10478 unsigned int
10479 athlon_ieu_unit_blockage_range (insn)
10480 rtx insn;
10481 {
10482 switch (recog_memoized (insn))
10483 {
10484 case -1:
10485 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
10486 && asm_noperands (PATTERN (insn)) < 0)
10487 fatal_insn_not_found (insn);
10488 default:
10489 return 65551 ;
10490
10491 }
10492 }
10493
10494 extern int athlon_directdec_unit_ready_cost PARAMS ((rtx));
10495 int
10496 athlon_directdec_unit_ready_cost (insn)
10497 rtx insn;
10498 {
10499 switch (recog_memoized (insn))
10500 {
10501 case -1:
10502 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
10503 && asm_noperands (PATTERN (insn)) < 0)
10504 fatal_insn_not_found (insn);
10505 default:
10506 return 1;
10507
10508 }
10509 }
10510
10511 extern int athlon_vectordec_unit_ready_cost PARAMS ((rtx));
10512 int
10513 athlon_vectordec_unit_ready_cost (insn)
10514 rtx insn;
10515 {
10516 switch (recog_memoized (insn))
10517 {
10518 case -1:
10519 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
10520 && asm_noperands (PATTERN (insn)) < 0)
10521 fatal_insn_not_found (insn);
10522 default:
10523 return 1;
10524
10525 }
10526 }
10527
10528 extern unsigned int athlon_vectordec_unit_blockage_range PARAMS ((rtx));
10529 unsigned int
10530 athlon_vectordec_unit_blockage_range (insn)
10531 rtx insn;
10532 {
10533 switch (recog_memoized (insn))
10534 {
10535 case 926:
10536 extract_constrain_insn_cached (insn);
10537 if ((which_alternative == 1) && (((ix86_cpu) == (CPU_ATHLON))))
10538 {
10539 return 1 ;
10540 }
10541 else
10542 {
10543 return 65537 ;
10544 }
10545
10546 case 178:
10547 case 177:
10548 case 176:
10549 case 175:
10550 case 174:
10551 case 173:
10552 extract_constrain_insn_cached (insn);
10553 if (((which_alternative == 0) && ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (! (get_attr_memory (insn) == MEMORY_STORE)))) && (((ix86_cpu) == (CPU_ATHLON))))
10554 {
10555 return 1 ;
10556 }
10557 else
10558 {
10559 return 65537 ;
10560 }
10561
10562 case 171:
10563 case 168:
10564 case 165:
10565 case 162:
10566 extract_constrain_insn_cached (insn);
10567 if ((which_alternative != 1) && (((ix86_cpu) == (CPU_ATHLON))))
10568 {
10569 return 1 ;
10570 }
10571 else
10572 {
10573 return 65537 ;
10574 }
10575
10576 case 134:
10577 extract_constrain_insn_cached (insn);
10578 if (((which_alternative != 1) && ((which_alternative != 2) && (which_alternative != 3))) && (((ix86_cpu) == (CPU_ATHLON))))
10579 {
10580 return 1 ;
10581 }
10582 else
10583 {
10584 return 65537 ;
10585 }
10586
10587 case 170:
10588 case 167:
10589 case 164:
10590 case 161:
10591 case 144:
10592 case 142:
10593 case 140:
10594 case 138:
10595 case 133:
10596 extract_constrain_insn_cached (insn);
10597 if ((which_alternative == 0) && (((ix86_cpu) == (CPU_ATHLON))))
10598 {
10599 return 1 ;
10600 }
10601 else
10602 {
10603 return 65537 ;
10604 }
10605
10606 case 132:
10607 case 131:
10608 case 130:
10609 case 129:
10610 extract_constrain_insn_cached (insn);
10611 if (((which_alternative != 1) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (! (get_attr_memory (insn) == MEMORY_STORE)))) && (((ix86_cpu) == (CPU_ATHLON))))
10612 {
10613 return 1 ;
10614 }
10615 else
10616 {
10617 return 65537 ;
10618 }
10619
10620 case 127:
10621 extract_constrain_insn_cached (insn);
10622 if ((((which_alternative != 0) && (which_alternative != 1)) || (((! (get_attr_memory (insn) == MEMORY_LOAD)) && (! (get_attr_memory (insn) == MEMORY_STORE))) || (which_alternative != 1))) && (((ix86_cpu) == (CPU_ATHLON))))
10623 {
10624 return 1 ;
10625 }
10626 else
10627 {
10628 return 65537 ;
10629 }
10630
10631 case 103:
10632 case 102:
10633 case 101:
10634 case 100:
10635 extract_constrain_insn_cached (insn);
10636 if (((which_alternative != 3) && ((which_alternative != 4) && (((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (! (get_attr_memory (insn) == MEMORY_STORE)))))) && (((ix86_cpu) == (CPU_ATHLON))))
10637 {
10638 return 1 ;
10639 }
10640 else
10641 {
10642 return 65537 ;
10643 }
10644
10645 case 94:
10646 case 93:
10647 extract_constrain_insn_cached (insn);
10648 if ((((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) || ((which_alternative != 3) && (which_alternative != 4))) && (((ix86_cpu) == (CPU_ATHLON))))
10649 {
10650 return 1 ;
10651 }
10652 else
10653 {
10654 return 65537 ;
10655 }
10656
10657 case 88:
10658 case 87:
10659 extract_constrain_insn_cached (insn);
10660 if (((which_alternative == 1) && (! (memory_operand (operands[1], VOIDmode)))) && (((ix86_cpu) == (CPU_ATHLON))))
10661 {
10662 return 1 ;
10663 }
10664 else
10665 {
10666 return 65537 ;
10667 }
10668
10669 case 83:
10670 extract_constrain_insn_cached (insn);
10671 if ((which_alternative != 4) && (((ix86_cpu) == (CPU_ATHLON))))
10672 {
10673 return 1 ;
10674 }
10675 else
10676 {
10677 return 65537 ;
10678 }
10679
10680 case 714:
10681 case 643:
10682 case 641:
10683 case 82:
10684 extract_constrain_insn_cached (insn);
10685 if (((which_alternative != 0) && (which_alternative != 1)) && (((ix86_cpu) == (CPU_ATHLON))))
10686 {
10687 return 1 ;
10688 }
10689 else
10690 {
10691 return 65537 ;
10692 }
10693
10694 case 76:
10695 extract_constrain_insn_cached (insn);
10696 if (((which_alternative == 0) && (! (memory_operand (operands[1], VOIDmode)))) && (((ix86_cpu) == (CPU_ATHLON))))
10697 {
10698 return 1 ;
10699 }
10700 else
10701 {
10702 return 65537 ;
10703 }
10704
10705 case 77:
10706 case 58:
10707 case 57:
10708 case 49:
10709 case 48:
10710 case 39:
10711 case 38:
10712 case 37:
10713 extract_insn_cached (insn);
10714 if ((! (memory_operand (operands[1], VOIDmode))) && (((ix86_cpu) == (CPU_ATHLON))))
10715 {
10716 return 1 ;
10717 }
10718 else
10719 {
10720 return 65537 ;
10721 }
10722
10723 case -1:
10724 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
10725 && asm_noperands (PATTERN (insn)) < 0)
10726 fatal_insn_not_found (insn);
10727 case 1024:
10728 case 1023:
10729 case 924:
10730 case 854:
10731 case 791:
10732 case 789:
10733 case 787:
10734 case 708:
10735 case 707:
10736 case 706:
10737 case 705:
10738 case 704:
10739 case 703:
10740 case 702:
10741 case 701:
10742 case 700:
10743 case 699:
10744 case 698:
10745 case 697:
10746 case 696:
10747 case 695:
10748 case 694:
10749 case 693:
10750 case 692:
10751 case 681:
10752 case 680:
10753 case 673:
10754 case 672:
10755 case 671:
10756 case 670:
10757 case 669:
10758 case 668:
10759 case 667:
10760 case 666:
10761 case 665:
10762 case 664:
10763 case 663:
10764 case 662:
10765 case 661:
10766 case 660:
10767 case 656:
10768 case 655:
10769 case 653:
10770 case 652:
10771 case 650:
10772 case 649:
10773 case 647:
10774 case 646:
10775 case 645:
10776 case 644:
10777 case 642:
10778 case 635:
10779 case 634:
10780 case 633:
10781 case 632:
10782 case 631:
10783 case 630:
10784 case 629:
10785 case 628:
10786 case 627:
10787 case 626:
10788 case 625:
10789 case 624:
10790 case 623:
10791 case 622:
10792 case 621:
10793 case 620:
10794 case 619:
10795 case 618:
10796 case 617:
10797 case 616:
10798 case 615:
10799 case 614:
10800 case 613:
10801 case 612:
10802 case 611:
10803 case 610:
10804 case 609:
10805 case 608:
10806 case 607:
10807 case 606:
10808 case 605:
10809 case 604:
10810 case 603:
10811 case 602:
10812 case 601:
10813 case 600:
10814 case 599:
10815 case 598:
10816 case 597:
10817 case 596:
10818 case 595:
10819 case 543:
10820 case 542:
10821 case 541:
10822 case 540:
10823 case 539:
10824 case 538:
10825 case 537:
10826 case 536:
10827 case 535:
10828 case 534:
10829 case 533:
10830 case 532:
10831 case 531:
10832 case 530:
10833 case 528:
10834 case 527:
10835 case 526:
10836 case 525:
10837 case 524:
10838 case 523:
10839 case 522:
10840 case 521:
10841 case 514:
10842 case 513:
10843 case 512:
10844 case 511:
10845 case 510:
10846 case 509:
10847 case 508:
10848 case 507:
10849 case 506:
10850 case 505:
10851 case 456:
10852 case 455:
10853 case 429:
10854 case 428:
10855 case 412:
10856 case 411:
10857 case 410:
10858 case 388:
10859 case 387:
10860 case 386:
10861 case 385:
10862 case 384:
10863 case 383:
10864 case 382:
10865 case 381:
10866 case 380:
10867 case 379:
10868 case 369:
10869 case 368:
10870 case 367:
10871 case 366:
10872 case 365:
10873 case 364:
10874 case 363:
10875 case 362:
10876 case 361:
10877 case 360:
10878 case 349:
10879 case 285:
10880 case 284:
10881 case 275:
10882 case 274:
10883 case 273:
10884 case 272:
10885 case 271:
10886 case 270:
10887 case 269:
10888 case 268:
10889 case 267:
10890 case 266:
10891 case 265:
10892 case 264:
10893 case 263:
10894 case 262:
10895 case 261:
10896 case 260:
10897 case 259:
10898 case 258:
10899 case 257:
10900 case 256:
10901 case 255:
10902 case 254:
10903 case 253:
10904 case 252:
10905 case 251:
10906 case 250:
10907 case 249:
10908 case 248:
10909 case 247:
10910 case 246:
10911 case 245:
10912 case 225:
10913 case 179:
10914 case 160:
10915 case 159:
10916 case 118:
10917 case 114:
10918 case 99:
10919 case 98:
10920 case 97:
10921 case 96:
10922 case 92:
10923 case 91:
10924 case 86:
10925 case 79:
10926 case 78:
10927 case 75:
10928 case 47:
10929 case 41:
10930 case 40:
10931 case 36:
10932 case 35:
10933 case 34:
10934 case 33:
10935 case 32:
10936 case 31:
10937 case 30:
10938 case 29:
10939 case 28:
10940 case 26:
10941 case 25:
10942 case 22:
10943 case 18:
10944 return 65537 ;
10945
10946 default:
10947 if (((ix86_cpu) == (CPU_ATHLON)))
10948 {
10949 return 1 ;
10950 }
10951 else
10952 {
10953 return 65537 ;
10954 }
10955
10956 }
10957 }
10958
10959 extern int k6_fpu_unit_ready_cost PARAMS ((rtx));
10960 int
10961 k6_fpu_unit_ready_cost (insn)
10962 rtx insn;
10963 {
10964 switch (recog_memoized (insn))
10965 {
10966 case 581:
10967 case 579:
10968 case 577:
10969 case 575:
10970 case 573:
10971 case 571:
10972 case 569:
10973 extract_insn_cached (insn);
10974 if (((mult_operator (operands[3], TFmode)) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_type (insn) == TYPE_FOP) && (((ix86_cpu) == (CPU_K6)))))
10975 {
10976 return 2;
10977 }
10978 else
10979 {
10980 return 56 ;
10981 }
10982
10983 case 580:
10984 case 578:
10985 case 576:
10986 case 574:
10987 case 572:
10988 case 570:
10989 case 568:
10990 extract_insn_cached (insn);
10991 if (((mult_operator (operands[3], XFmode)) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_type (insn) == TYPE_FOP) && (((ix86_cpu) == (CPU_K6)))))
10992 {
10993 return 2;
10994 }
10995 else
10996 {
10997 return 56 ;
10998 }
10999
11000 case 562:
11001 extract_constrain_insn_cached (insn);
11002 if ((((which_alternative != 2) && (mult_operator (operands[3], DFmode))) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_type (insn) == TYPE_FOP) && (((ix86_cpu) == (CPU_K6)))))
11003 {
11004 return 2;
11005 }
11006 else
11007 {
11008 return 56 ;
11009 }
11010
11011 case 567:
11012 case 566:
11013 case 565:
11014 case 564:
11015 case 561:
11016 extract_insn_cached (insn);
11017 if (((mult_operator (operands[3], DFmode)) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_type (insn) == TYPE_FOP) && (((ix86_cpu) == (CPU_K6)))))
11018 {
11019 return 2;
11020 }
11021 else
11022 {
11023 return 56 ;
11024 }
11025
11026 case 557:
11027 extract_constrain_insn_cached (insn);
11028 if ((((which_alternative != 2) && (mult_operator (operands[3], SFmode))) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_type (insn) == TYPE_FOP) && (((ix86_cpu) == (CPU_K6)))))
11029 {
11030 return 2;
11031 }
11032 else
11033 {
11034 return 56 ;
11035 }
11036
11037 case 560:
11038 case 559:
11039 case 556:
11040 extract_insn_cached (insn);
11041 if (((mult_operator (operands[3], SFmode)) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_type (insn) == TYPE_FOP) && (((ix86_cpu) == (CPU_K6)))))
11042 {
11043 return 2;
11044 }
11045 else
11046 {
11047 return 56 ;
11048 }
11049
11050 case 555:
11051 extract_insn_cached (insn);
11052 if (((mult_operator (operands[3], TFmode)) && (((ix86_cpu) == (CPU_K6)))) || ((! (mult_operator (operands[3], TFmode))) && (((ix86_cpu) == (CPU_K6)))))
11053 {
11054 return 2;
11055 }
11056 else
11057 {
11058 return 56 ;
11059 }
11060
11061 case 554:
11062 extract_insn_cached (insn);
11063 if (((mult_operator (operands[3], XFmode)) && (((ix86_cpu) == (CPU_K6)))) || ((! (mult_operator (operands[3], XFmode))) && (((ix86_cpu) == (CPU_K6)))))
11064 {
11065 return 2;
11066 }
11067 else
11068 {
11069 return 56 ;
11070 }
11071
11072 case 552:
11073 case 549:
11074 extract_constrain_insn_cached (insn);
11075 if ((((which_alternative == 0) && (mult_operator (operands[3], SFmode))) && (((ix86_cpu) == (CPU_K6)))) || (((which_alternative == 0) && (! (mult_operator (operands[3], SFmode)))) && (((ix86_cpu) == (CPU_K6)))))
11076 {
11077 return 2;
11078 }
11079 else
11080 {
11081 return 56 ;
11082 }
11083
11084 case 551:
11085 case 548:
11086 extract_insn_cached (insn);
11087 if (((mult_operator (operands[3], SFmode)) && (((ix86_cpu) == (CPU_K6)))) || ((! (mult_operator (operands[3], SFmode))) && (((ix86_cpu) == (CPU_K6)))))
11088 {
11089 return 2;
11090 }
11091 else
11092 {
11093 return 56 ;
11094 }
11095
11096 case 135:
11097 extract_constrain_insn_cached (insn);
11098 if ((which_alternative == 1) && (((ix86_cpu) == (CPU_K6))))
11099 {
11100 return 2;
11101 }
11102 else
11103 {
11104 return 56 ;
11105 }
11106
11107 case 127:
11108 extract_constrain_insn_cached (insn);
11109 if (((which_alternative == 0) || (which_alternative == 1)) && (((ix86_cpu) == (CPU_K6))))
11110 {
11111 return 2;
11112 }
11113 else
11114 {
11115 return 56 ;
11116 }
11117
11118 case 103:
11119 case 102:
11120 case 101:
11121 case 100:
11122 case 94:
11123 case 93:
11124 case 89:
11125 extract_constrain_insn_cached (insn);
11126 if (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && (((ix86_cpu) == (CPU_K6))))
11127 {
11128 return 2;
11129 }
11130 else
11131 {
11132 return 56 ;
11133 }
11134
11135 case 178:
11136 case 177:
11137 case 176:
11138 case 175:
11139 case 174:
11140 case 173:
11141 case 171:
11142 case 170:
11143 case 168:
11144 case 167:
11145 case 165:
11146 case 164:
11147 case 162:
11148 case 161:
11149 case 144:
11150 case 142:
11151 case 140:
11152 case 138:
11153 case 134:
11154 case 133:
11155 case 35:
11156 case 32:
11157 extract_constrain_insn_cached (insn);
11158 if ((which_alternative == 0) && (((ix86_cpu) == (CPU_K6))))
11159 {
11160 return 2;
11161 }
11162 else
11163 {
11164 return 56 ;
11165 }
11166
11167 case 158:
11168 case 157:
11169 case 156:
11170 case 153:
11171 case 152:
11172 case 151:
11173 case 148:
11174 case 147:
11175 case 146:
11176 case 145:
11177 case 143:
11178 case 141:
11179 case 139:
11180 case 136:
11181 case 132:
11182 case 131:
11183 case 130:
11184 case 129:
11185 case 34:
11186 case 31:
11187 case 27:
11188 case 24:
11189 case 23:
11190 case 21:
11191 case 20:
11192 case 19:
11193 if (((ix86_cpu) == (CPU_K6)))
11194 {
11195 return 2;
11196 }
11197 else
11198 {
11199 return 56 ;
11200 }
11201
11202 case -1:
11203 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
11204 && asm_noperands (PATTERN (insn)) < 0)
11205 fatal_insn_not_found (insn);
11206 default:
11207 return 56 ;
11208
11209 }
11210 }
11211
11212 extern unsigned int k6_fpu_unit_blockage_range PARAMS ((rtx));
11213 unsigned int
11214 k6_fpu_unit_blockage_range (insn)
11215 rtx insn;
11216 {
11217 switch (recog_memoized (insn))
11218 {
11219 case -1:
11220 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
11221 && asm_noperands (PATTERN (insn)) < 0)
11222 fatal_insn_not_found (insn);
11223 default:
11224 return 131128 ;
11225
11226 }
11227 }
11228
11229 extern int k6_store_unit_ready_cost PARAMS ((rtx));
11230 int
11231 k6_store_unit_ready_cost (insn)
11232 rtx insn;
11233 {
11234 switch (recog_memoized (insn))
11235 {
11236 case 659:
11237 extract_constrain_insn_cached (insn);
11238 if (((which_alternative == 1) && (! (const0_operand (operands[2], DImode)))) && ((((get_attr_memory (insn) == MEMORY_BOTH) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_memory (insn) == MEMORY_STORE) && (((ix86_cpu) == (CPU_K6))))) || ((! (get_attr_memory (insn) == MEMORY_BOTH)) && ((! (get_attr_memory (insn) == MEMORY_STORE)) && (((ix86_cpu) == (CPU_K6)))))))
11239 {
11240 return 2;
11241 }
11242 else if (((which_alternative != 1) || (const0_operand (operands[2], DImode))) && (((get_attr_memory (insn) == MEMORY_BOTH) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_memory (insn) == MEMORY_STORE) && (((ix86_cpu) == (CPU_K6))))))
11243 {
11244 return 1;
11245 }
11246 else
11247 {
11248 return 10 ;
11249 }
11250
11251 case 658:
11252 extract_constrain_insn_cached (insn);
11253 if (((which_alternative == 1) && (! (const0_operand (operands[2], SImode)))) && ((((get_attr_memory (insn) == MEMORY_BOTH) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_memory (insn) == MEMORY_STORE) && (((ix86_cpu) == (CPU_K6))))) || ((! (get_attr_memory (insn) == MEMORY_BOTH)) && ((! (get_attr_memory (insn) == MEMORY_STORE)) && (((ix86_cpu) == (CPU_K6)))))))
11254 {
11255 return 2;
11256 }
11257 else if (((which_alternative != 1) || (const0_operand (operands[2], SImode))) && (((get_attr_memory (insn) == MEMORY_BOTH) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_memory (insn) == MEMORY_STORE) && (((ix86_cpu) == (CPU_K6))))))
11258 {
11259 return 1;
11260 }
11261 else
11262 {
11263 return 10 ;
11264 }
11265
11266 case 417:
11267 case 414:
11268 case 413:
11269 case 408:
11270 extract_constrain_insn_cached (insn);
11271 if ((which_alternative == 1) && ((((get_attr_memory (insn) == MEMORY_BOTH) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_memory (insn) == MEMORY_STORE) && (((ix86_cpu) == (CPU_K6))))) || ((! (get_attr_memory (insn) == MEMORY_BOTH)) && ((! (get_attr_memory (insn) == MEMORY_STORE)) && (((ix86_cpu) == (CPU_K6)))))))
11272 {
11273 return 2;
11274 }
11275 else if ((which_alternative == 0) && (((get_attr_memory (insn) == MEMORY_BOTH) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_memory (insn) == MEMORY_STORE) && (((ix86_cpu) == (CPU_K6))))))
11276 {
11277 return 1;
11278 }
11279 else
11280 {
11281 return 10 ;
11282 }
11283
11284 case 215:
11285 extract_constrain_insn_cached (insn);
11286 if ((which_alternative == 3) && ((((get_attr_memory (insn) == MEMORY_BOTH) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_memory (insn) == MEMORY_STORE) && (((ix86_cpu) == (CPU_K6))))) || ((! (get_attr_memory (insn) == MEMORY_BOTH)) && ((! (get_attr_memory (insn) == MEMORY_STORE)) && (((ix86_cpu) == (CPU_K6)))))))
11287 {
11288 return 2;
11289 }
11290 else if ((which_alternative != 3) && (((get_attr_memory (insn) == MEMORY_BOTH) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_memory (insn) == MEMORY_STORE) && (((ix86_cpu) == (CPU_K6))))))
11291 {
11292 return 1;
11293 }
11294 else
11295 {
11296 return 10 ;
11297 }
11298
11299 case 420:
11300 case 209:
11301 extract_constrain_insn_cached (insn);
11302 if ((which_alternative == 2) && ((((get_attr_memory (insn) == MEMORY_BOTH) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_memory (insn) == MEMORY_STORE) && (((ix86_cpu) == (CPU_K6))))) || ((! (get_attr_memory (insn) == MEMORY_BOTH)) && ((! (get_attr_memory (insn) == MEMORY_STORE)) && (((ix86_cpu) == (CPU_K6)))))))
11303 {
11304 return 2;
11305 }
11306 else if ((which_alternative != 2) && (((get_attr_memory (insn) == MEMORY_BOTH) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_memory (insn) == MEMORY_STORE) && (((ix86_cpu) == (CPU_K6))))))
11307 {
11308 return 1;
11309 }
11310 else
11311 {
11312 return 10 ;
11313 }
11314
11315 case 202:
11316 extract_constrain_insn_cached (insn);
11317 if (((which_alternative != 0) || (pic_symbolic_operand (operands[2], SImode))) && ((((get_attr_memory (insn) == MEMORY_BOTH) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_memory (insn) == MEMORY_STORE) && (((ix86_cpu) == (CPU_K6))))) || ((! (get_attr_memory (insn) == MEMORY_BOTH)) && ((! (get_attr_memory (insn) == MEMORY_STORE)) && (((ix86_cpu) == (CPU_K6)))))))
11318 {
11319 return 2;
11320 }
11321 else if (((which_alternative == 0) && (! (pic_symbolic_operand (operands[2], SImode)))) && (((get_attr_memory (insn) == MEMORY_BOTH) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_memory (insn) == MEMORY_STORE) && (((ix86_cpu) == (CPU_K6))))))
11322 {
11323 return 1;
11324 }
11325 else
11326 {
11327 return 10 ;
11328 }
11329
11330 case 201:
11331 extract_constrain_insn_cached (insn);
11332 if (((which_alternative == 2) || (pic_symbolic_operand (operands[2], SImode))) && ((((get_attr_memory (insn) == MEMORY_BOTH) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_memory (insn) == MEMORY_STORE) && (((ix86_cpu) == (CPU_K6))))) || ((! (get_attr_memory (insn) == MEMORY_BOTH)) && ((! (get_attr_memory (insn) == MEMORY_STORE)) && (((ix86_cpu) == (CPU_K6)))))))
11333 {
11334 return 2;
11335 }
11336 else if (((which_alternative != 2) && (! (pic_symbolic_operand (operands[2], SImode)))) && (((get_attr_memory (insn) == MEMORY_BOTH) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_memory (insn) == MEMORY_STORE) && (((ix86_cpu) == (CPU_K6))))))
11337 {
11338 return 1;
11339 }
11340 else
11341 {
11342 return 10 ;
11343 }
11344
11345 case 196:
11346 extract_constrain_insn_cached (insn);
11347 if (((which_alternative == 2) || (pic_symbolic_operand (operands[2], DImode))) && ((((get_attr_memory (insn) == MEMORY_BOTH) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_memory (insn) == MEMORY_STORE) && (((ix86_cpu) == (CPU_K6))))) || ((! (get_attr_memory (insn) == MEMORY_BOTH)) && ((! (get_attr_memory (insn) == MEMORY_STORE)) && (((ix86_cpu) == (CPU_K6)))))))
11348 {
11349 return 2;
11350 }
11351 else if (((which_alternative != 2) && (! (pic_symbolic_operand (operands[2], DImode)))) && (((get_attr_memory (insn) == MEMORY_BOTH) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_memory (insn) == MEMORY_STORE) && (((ix86_cpu) == (CPU_K6))))))
11352 {
11353 return 1;
11354 }
11355 else
11356 {
11357 return 10 ;
11358 }
11359
11360 case 195:
11361 case 194:
11362 case 193:
11363 case 192:
11364 case 191:
11365 case 190:
11366 case 189:
11367 case 188:
11368 case 187:
11369 case 186:
11370 if (((ix86_cpu) == (CPU_K6)))
11371 {
11372 return 2;
11373 }
11374 else
11375 {
11376 return 10 ;
11377 }
11378
11379 case 88:
11380 case 87:
11381 extract_constrain_insn_cached (insn);
11382 if ((which_alternative == 1) && (((memory_operand (operands[1], VOIDmode)) && (((ix86_cpu) == (CPU_K6)))) || ((! (memory_operand (operands[1], VOIDmode))) && (((ix86_cpu) == (CPU_K6))))))
11383 {
11384 return 1;
11385 }
11386 else
11387 {
11388 return 10 ;
11389 }
11390
11391 case 83:
11392 extract_constrain_insn_cached (insn);
11393 if ((((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative != 7) && ((which_alternative != 8) && ((which_alternative != 9) && ((which_alternative != 4) && (((flag_pic) != (0)) && (symbolic_operand (operands[1], DImode)))))))) && ((((get_attr_memory (insn) == MEMORY_BOTH) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_memory (insn) == MEMORY_STORE) && (((ix86_cpu) == (CPU_K6))))) || ((! (get_attr_memory (insn) == MEMORY_BOTH)) && ((! (get_attr_memory (insn) == MEMORY_STORE)) && (((ix86_cpu) == (CPU_K6)))))))
11394 {
11395 return 2;
11396 }
11397 else if ((((which_alternative == 5) || (which_alternative == 6)) || ((which_alternative == 7) || ((which_alternative == 8) || ((which_alternative == 9) || ((which_alternative == 4) || ((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], DImode))))))))) && (((get_attr_memory (insn) == MEMORY_BOTH) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_memory (insn) == MEMORY_STORE) && (((ix86_cpu) == (CPU_K6))))))
11398 {
11399 return 1;
11400 }
11401 else
11402 {
11403 return 10 ;
11404 }
11405
11406 case 76:
11407 extract_constrain_insn_cached (insn);
11408 if ((which_alternative == 0) && (((memory_operand (operands[1], VOIDmode)) && (((ix86_cpu) == (CPU_K6)))) || ((! (memory_operand (operands[1], VOIDmode))) && (((ix86_cpu) == (CPU_K6))))))
11409 {
11410 return 1;
11411 }
11412 else
11413 {
11414 return 10 ;
11415 }
11416
11417 case 854:
11418 case 852:
11419 case 158:
11420 case 157:
11421 case 156:
11422 case 153:
11423 case 152:
11424 case 151:
11425 case 148:
11426 case 147:
11427 case 146:
11428 case 84:
11429 case 67:
11430 case 51:
11431 case 45:
11432 if (((ix86_cpu) == (CPU_K6)))
11433 {
11434 return 1;
11435 }
11436 else
11437 {
11438 return 10 ;
11439 }
11440
11441 case 44:
11442 extract_constrain_insn_cached (insn);
11443 if ((((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (((flag_pic) != (0)) && (symbolic_operand (operands[1], SImode))))))) && ((((get_attr_memory (insn) == MEMORY_BOTH) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_memory (insn) == MEMORY_STORE) && (((ix86_cpu) == (CPU_K6))))) || ((! (get_attr_memory (insn) == MEMORY_BOTH)) && ((! (get_attr_memory (insn) == MEMORY_STORE)) && (((ix86_cpu) == (CPU_K6)))))))
11444 {
11445 return 2;
11446 }
11447 else if ((((which_alternative == 2) || ((which_alternative == 3) || (which_alternative == 4))) || ((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || ((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], SImode)))))))) && (((get_attr_memory (insn) == MEMORY_BOTH) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_memory (insn) == MEMORY_STORE) && (((ix86_cpu) == (CPU_K6))))))
11448 {
11449 return 1;
11450 }
11451 else
11452 {
11453 return 10 ;
11454 }
11455
11456 case 407:
11457 case 406:
11458 case 405:
11459 case 404:
11460 case 403:
11461 case 402:
11462 case 401:
11463 case 400:
11464 case 399:
11465 case 398:
11466 case 359:
11467 case 358:
11468 case 357:
11469 case 356:
11470 case 355:
11471 case 354:
11472 case 353:
11473 case 352:
11474 case 351:
11475 case 350:
11476 case 345:
11477 case 339:
11478 case 319:
11479 case 317:
11480 case 297:
11481 case 295:
11482 case 242:
11483 case 111:
11484 case 108:
11485 case 106:
11486 case 81:
11487 case 80:
11488 case 62:
11489 case 56:
11490 case 43:
11491 case 42:
11492 extract_insn_cached (insn);
11493 if (((memory_operand (operands[1], VOIDmode)) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_memory (insn) == MEMORY_STORE) && (((ix86_cpu) == (CPU_K6)))))
11494 {
11495 return 1;
11496 }
11497 else
11498 {
11499 return 10 ;
11500 }
11501
11502 case 500:
11503 case 499:
11504 case 79:
11505 case 78:
11506 case 41:
11507 case 40:
11508 extract_insn_cached (insn);
11509 if ((memory_operand (operands[0], VOIDmode)) && (((ix86_cpu) == (CPU_K6))))
11510 {
11511 return 1;
11512 }
11513 else
11514 {
11515 return 10 ;
11516 }
11517
11518 case 77:
11519 case 58:
11520 case 57:
11521 case 49:
11522 case 48:
11523 case 39:
11524 case 38:
11525 case 37:
11526 extract_insn_cached (insn);
11527 if (((memory_operand (operands[1], VOIDmode)) && (((ix86_cpu) == (CPU_K6)))) || ((! (memory_operand (operands[1], VOIDmode))) && (((ix86_cpu) == (CPU_K6)))))
11528 {
11529 return 1;
11530 }
11531 else
11532 {
11533 return 10 ;
11534 }
11535
11536 case -1:
11537 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
11538 && asm_noperands (PATTERN (insn)) < 0)
11539 fatal_insn_not_found (insn);
11540 case 1024:
11541 case 1023:
11542 case 1022:
11543 case 1021:
11544 case 1020:
11545 case 967:
11546 case 966:
11547 case 965:
11548 case 964:
11549 case 963:
11550 case 962:
11551 case 953:
11552 case 904:
11553 case 903:
11554 case 902:
11555 case 901:
11556 case 900:
11557 case 899:
11558 case 884:
11559 case 883:
11560 case 882:
11561 case 881:
11562 case 864:
11563 case 860:
11564 case 859:
11565 case 858:
11566 case 853:
11567 case 851:
11568 case 850:
11569 case 828:
11570 case 827:
11571 case 826:
11572 case 825:
11573 case 824:
11574 case 823:
11575 case 814:
11576 case 813:
11577 case 776:
11578 case 775:
11579 case 774:
11580 case 773:
11581 case 772:
11582 case 771:
11583 case 770:
11584 case 769:
11585 case 708:
11586 case 707:
11587 case 706:
11588 case 705:
11589 case 704:
11590 case 703:
11591 case 702:
11592 case 701:
11593 case 700:
11594 case 699:
11595 case 698:
11596 case 697:
11597 case 696:
11598 case 695:
11599 case 694:
11600 case 693:
11601 case 692:
11602 case 681:
11603 case 680:
11604 case 679:
11605 case 678:
11606 case 677:
11607 case 676:
11608 case 675:
11609 case 674:
11610 case 673:
11611 case 672:
11612 case 671:
11613 case 670:
11614 case 669:
11615 case 668:
11616 case 667:
11617 case 666:
11618 case 665:
11619 case 664:
11620 case 663:
11621 case 662:
11622 case 661:
11623 case 660:
11624 case 656:
11625 case 655:
11626 case 653:
11627 case 652:
11628 case 650:
11629 case 649:
11630 case 647:
11631 case 646:
11632 case 645:
11633 case 644:
11634 case 642:
11635 case 638:
11636 case 636:
11637 case 635:
11638 case 634:
11639 case 633:
11640 case 632:
11641 case 631:
11642 case 630:
11643 case 629:
11644 case 628:
11645 case 627:
11646 case 626:
11647 case 625:
11648 case 624:
11649 case 623:
11650 case 622:
11651 case 621:
11652 case 620:
11653 case 619:
11654 case 618:
11655 case 617:
11656 case 616:
11657 case 615:
11658 case 614:
11659 case 613:
11660 case 612:
11661 case 611:
11662 case 610:
11663 case 609:
11664 case 608:
11665 case 607:
11666 case 606:
11667 case 605:
11668 case 604:
11669 case 603:
11670 case 602:
11671 case 601:
11672 case 600:
11673 case 599:
11674 case 598:
11675 case 597:
11676 case 596:
11677 case 595:
11678 case 594:
11679 case 593:
11680 case 592:
11681 case 591:
11682 case 590:
11683 case 589:
11684 case 588:
11685 case 587:
11686 case 584:
11687 case 547:
11688 case 546:
11689 case 545:
11690 case 544:
11691 case 543:
11692 case 542:
11693 case 541:
11694 case 540:
11695 case 539:
11696 case 538:
11697 case 537:
11698 case 536:
11699 case 535:
11700 case 534:
11701 case 533:
11702 case 532:
11703 case 531:
11704 case 530:
11705 case 529:
11706 case 528:
11707 case 527:
11708 case 526:
11709 case 525:
11710 case 524:
11711 case 523:
11712 case 522:
11713 case 521:
11714 case 520:
11715 case 519:
11716 case 518:
11717 case 517:
11718 case 516:
11719 case 515:
11720 case 514:
11721 case 513:
11722 case 512:
11723 case 511:
11724 case 510:
11725 case 509:
11726 case 508:
11727 case 507:
11728 case 506:
11729 case 505:
11730 case 504:
11731 case 503:
11732 case 502:
11733 case 501:
11734 case 456:
11735 case 455:
11736 case 429:
11737 case 428:
11738 case 411:
11739 case 410:
11740 case 388:
11741 case 387:
11742 case 386:
11743 case 385:
11744 case 384:
11745 case 383:
11746 case 382:
11747 case 381:
11748 case 380:
11749 case 379:
11750 case 369:
11751 case 368:
11752 case 367:
11753 case 366:
11754 case 365:
11755 case 364:
11756 case 363:
11757 case 362:
11758 case 361:
11759 case 360:
11760 case 349:
11761 case 285:
11762 case 284:
11763 case 283:
11764 case 282:
11765 case 281:
11766 case 280:
11767 case 279:
11768 case 278:
11769 case 277:
11770 case 276:
11771 case 273:
11772 case 271:
11773 case 270:
11774 case 268:
11775 case 267:
11776 case 265:
11777 case 264:
11778 case 225:
11779 case 179:
11780 case 160:
11781 case 159:
11782 case 118:
11783 case 114:
11784 case 99:
11785 case 98:
11786 case 97:
11787 case 96:
11788 case 92:
11789 case 91:
11790 case 85:
11791 case 75:
11792 case 68:
11793 case 52:
11794 case 46:
11795 case 36:
11796 case 35:
11797 case 34:
11798 case 33:
11799 case 32:
11800 case 31:
11801 case 30:
11802 case 29:
11803 case 28:
11804 case 27:
11805 case 26:
11806 case 25:
11807 case 24:
11808 case 23:
11809 case 22:
11810 case 21:
11811 case 20:
11812 case 19:
11813 case 18:
11814 case 17:
11815 case 16:
11816 case 15:
11817 case 14:
11818 case 13:
11819 case 12:
11820 case 11:
11821 case 10:
11822 case 9:
11823 case 8:
11824 case 7:
11825 case 6:
11826 case 5:
11827 case 4:
11828 case 3:
11829 case 2:
11830 case 1:
11831 case 0:
11832 return 10 ;
11833
11834 default:
11835 if (((get_attr_memory (insn) == MEMORY_BOTH) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_memory (insn) == MEMORY_STORE) && (((ix86_cpu) == (CPU_K6)))))
11836 {
11837 return 1;
11838 }
11839 else
11840 {
11841 return 10 ;
11842 }
11843
11844 }
11845 }
11846
11847 extern unsigned int k6_store_unit_blockage_range PARAMS ((rtx));
11848 unsigned int
11849 k6_store_unit_blockage_range (insn)
11850 rtx insn;
11851 {
11852 switch (recog_memoized (insn))
11853 {
11854 case -1:
11855 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
11856 && asm_noperands (PATTERN (insn)) < 0)
11857 fatal_insn_not_found (insn);
11858 default:
11859 return 65546 ;
11860
11861 }
11862 }
11863
11864 extern int k6_load_unit_ready_cost PARAMS ((rtx));
11865 int
11866 k6_load_unit_ready_cost (insn)
11867 rtx insn;
11868 {
11869 switch (recog_memoized (insn))
11870 {
11871 case 679:
11872 case 678:
11873 case 677:
11874 case 676:
11875 case 675:
11876 case 674:
11877 extract_insn_cached (insn);
11878 if ((! (constant_call_address_operand (operands[1], VOIDmode))) && (((ix86_cpu) == (CPU_K6))))
11879 {
11880 return 1;
11881 }
11882 else
11883 {
11884 return 10 ;
11885 }
11886
11887 case 525:
11888 case 524:
11889 case 523:
11890 case 522:
11891 case 521:
11892 extract_insn_cached (insn);
11893 if ((! (constant_call_address_operand (operands[0], VOIDmode))) && (((ix86_cpu) == (CPU_K6))))
11894 {
11895 return 1;
11896 }
11897 else
11898 {
11899 return 10 ;
11900 }
11901
11902 case 529:
11903 case 520:
11904 case 519:
11905 case 518:
11906 case 517:
11907 case 516:
11908 case 515:
11909 case 504:
11910 case 503:
11911 extract_insn_cached (insn);
11912 if ((memory_operand (operands[0], VOIDmode)) && (((ix86_cpu) == (CPU_K6))))
11913 {
11914 return 1;
11915 }
11916 else
11917 {
11918 return 10 ;
11919 }
11920
11921 case 88:
11922 case 87:
11923 extract_constrain_insn_cached (insn);
11924 if (((which_alternative == 1) && (memory_operand (operands[1], VOIDmode))) && (((ix86_cpu) == (CPU_K6))))
11925 {
11926 return 1;
11927 }
11928 else
11929 {
11930 return 10 ;
11931 }
11932
11933 case 76:
11934 extract_constrain_insn_cached (insn);
11935 if (((which_alternative == 0) && (memory_operand (operands[1], VOIDmode))) && (((ix86_cpu) == (CPU_K6))))
11936 {
11937 return 1;
11938 }
11939 else
11940 {
11941 return 10 ;
11942 }
11943
11944 case 851:
11945 case 547:
11946 case 546:
11947 case 545:
11948 case 544:
11949 case 158:
11950 case 157:
11951 case 156:
11952 case 153:
11953 case 152:
11954 case 151:
11955 case 148:
11956 case 147:
11957 case 146:
11958 case 85:
11959 case 68:
11960 case 52:
11961 case 46:
11962 if (((ix86_cpu) == (CPU_K6)))
11963 {
11964 return 1;
11965 }
11966 else
11967 {
11968 return 10 ;
11969 }
11970
11971 case 500:
11972 case 499:
11973 case 79:
11974 case 78:
11975 case 41:
11976 case 40:
11977 extract_insn_cached (insn);
11978 if (((memory_operand (operands[0], VOIDmode)) && (((ix86_cpu) == (CPU_K6)))) || ((! (memory_operand (operands[0], VOIDmode))) && (((ix86_cpu) == (CPU_K6)))))
11979 {
11980 return 1;
11981 }
11982 else
11983 {
11984 return 10 ;
11985 }
11986
11987 case 407:
11988 case 406:
11989 case 405:
11990 case 404:
11991 case 403:
11992 case 402:
11993 case 401:
11994 case 400:
11995 case 399:
11996 case 398:
11997 case 359:
11998 case 358:
11999 case 357:
12000 case 356:
12001 case 355:
12002 case 354:
12003 case 353:
12004 case 352:
12005 case 351:
12006 case 350:
12007 case 345:
12008 case 339:
12009 case 319:
12010 case 317:
12011 case 297:
12012 case 295:
12013 case 242:
12014 case 111:
12015 case 108:
12016 case 106:
12017 case 81:
12018 case 80:
12019 case 77:
12020 case 62:
12021 case 58:
12022 case 57:
12023 case 56:
12024 case 49:
12025 case 48:
12026 case 43:
12027 case 42:
12028 case 39:
12029 case 38:
12030 case 37:
12031 extract_insn_cached (insn);
12032 if ((memory_operand (operands[1], VOIDmode)) && (((ix86_cpu) == (CPU_K6))))
12033 {
12034 return 1;
12035 }
12036 else
12037 {
12038 return 10 ;
12039 }
12040
12041 case 967:
12042 case 966:
12043 case 965:
12044 case 964:
12045 case 963:
12046 case 962:
12047 case 904:
12048 case 903:
12049 case 902:
12050 case 901:
12051 case 900:
12052 case 899:
12053 case 860:
12054 case 859:
12055 case 858:
12056 case 828:
12057 case 827:
12058 case 826:
12059 case 825:
12060 case 824:
12061 case 823:
12062 case 776:
12063 case 775:
12064 case 774:
12065 case 773:
12066 case 772:
12067 case 771:
12068 case 502:
12069 case 501:
12070 case 283:
12071 case 282:
12072 case 281:
12073 case 280:
12074 case 279:
12075 case 278:
12076 case 277:
12077 case 276:
12078 case 36:
12079 case 35:
12080 case 34:
12081 case 33:
12082 case 32:
12083 case 31:
12084 case 27:
12085 case 24:
12086 case 23:
12087 case 21:
12088 case 20:
12089 case 19:
12090 case 17:
12091 case 16:
12092 case 15:
12093 case 14:
12094 case 13:
12095 case 12:
12096 case 11:
12097 case 10:
12098 case 9:
12099 case 8:
12100 case 7:
12101 case 6:
12102 case 5:
12103 case 4:
12104 case 3:
12105 case 2:
12106 case 1:
12107 case 0:
12108 if ((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_K6))))
12109 {
12110 return 1;
12111 }
12112 else
12113 {
12114 return 10 ;
12115 }
12116
12117 case -1:
12118 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
12119 && asm_noperands (PATTERN (insn)) < 0)
12120 fatal_insn_not_found (insn);
12121 case 1024:
12122 case 1023:
12123 case 1022:
12124 case 1021:
12125 case 1020:
12126 case 953:
12127 case 884:
12128 case 883:
12129 case 882:
12130 case 881:
12131 case 864:
12132 case 854:
12133 case 853:
12134 case 852:
12135 case 850:
12136 case 814:
12137 case 813:
12138 case 770:
12139 case 769:
12140 case 708:
12141 case 707:
12142 case 706:
12143 case 705:
12144 case 704:
12145 case 703:
12146 case 702:
12147 case 701:
12148 case 700:
12149 case 699:
12150 case 698:
12151 case 697:
12152 case 696:
12153 case 695:
12154 case 694:
12155 case 693:
12156 case 692:
12157 case 681:
12158 case 680:
12159 case 673:
12160 case 672:
12161 case 671:
12162 case 670:
12163 case 669:
12164 case 668:
12165 case 667:
12166 case 666:
12167 case 665:
12168 case 664:
12169 case 663:
12170 case 662:
12171 case 661:
12172 case 660:
12173 case 656:
12174 case 655:
12175 case 653:
12176 case 652:
12177 case 650:
12178 case 649:
12179 case 647:
12180 case 646:
12181 case 645:
12182 case 644:
12183 case 642:
12184 case 638:
12185 case 636:
12186 case 635:
12187 case 634:
12188 case 633:
12189 case 632:
12190 case 631:
12191 case 630:
12192 case 629:
12193 case 628:
12194 case 627:
12195 case 626:
12196 case 625:
12197 case 624:
12198 case 623:
12199 case 622:
12200 case 621:
12201 case 620:
12202 case 619:
12203 case 618:
12204 case 617:
12205 case 616:
12206 case 615:
12207 case 614:
12208 case 613:
12209 case 612:
12210 case 611:
12211 case 610:
12212 case 609:
12213 case 608:
12214 case 607:
12215 case 606:
12216 case 605:
12217 case 604:
12218 case 603:
12219 case 602:
12220 case 601:
12221 case 600:
12222 case 599:
12223 case 598:
12224 case 597:
12225 case 596:
12226 case 595:
12227 case 594:
12228 case 593:
12229 case 592:
12230 case 591:
12231 case 590:
12232 case 589:
12233 case 588:
12234 case 587:
12235 case 584:
12236 case 543:
12237 case 542:
12238 case 541:
12239 case 540:
12240 case 539:
12241 case 538:
12242 case 537:
12243 case 536:
12244 case 535:
12245 case 534:
12246 case 533:
12247 case 532:
12248 case 531:
12249 case 530:
12250 case 528:
12251 case 527:
12252 case 526:
12253 case 514:
12254 case 513:
12255 case 512:
12256 case 511:
12257 case 510:
12258 case 509:
12259 case 508:
12260 case 507:
12261 case 506:
12262 case 505:
12263 case 456:
12264 case 455:
12265 case 429:
12266 case 428:
12267 case 411:
12268 case 410:
12269 case 388:
12270 case 387:
12271 case 386:
12272 case 385:
12273 case 384:
12274 case 383:
12275 case 382:
12276 case 381:
12277 case 380:
12278 case 379:
12279 case 369:
12280 case 368:
12281 case 367:
12282 case 366:
12283 case 365:
12284 case 364:
12285 case 363:
12286 case 362:
12287 case 361:
12288 case 360:
12289 case 349:
12290 case 285:
12291 case 284:
12292 case 273:
12293 case 271:
12294 case 270:
12295 case 268:
12296 case 267:
12297 case 265:
12298 case 264:
12299 case 225:
12300 case 195:
12301 case 194:
12302 case 193:
12303 case 192:
12304 case 191:
12305 case 190:
12306 case 189:
12307 case 188:
12308 case 187:
12309 case 186:
12310 case 179:
12311 case 160:
12312 case 159:
12313 case 118:
12314 case 114:
12315 case 99:
12316 case 98:
12317 case 97:
12318 case 96:
12319 case 92:
12320 case 91:
12321 case 84:
12322 case 75:
12323 case 67:
12324 case 51:
12325 case 45:
12326 case 30:
12327 case 29:
12328 case 28:
12329 case 26:
12330 case 25:
12331 case 22:
12332 case 18:
12333 return 10 ;
12334
12335 default:
12336 if (((get_attr_memory (insn) == MEMORY_BOTH) && (((ix86_cpu) == (CPU_K6)))) || ((get_attr_memory (insn) == MEMORY_LOAD) && (((ix86_cpu) == (CPU_K6)))))
12337 {
12338 return 1;
12339 }
12340 else
12341 {
12342 return 10 ;
12343 }
12344
12345 }
12346 }
12347
12348 extern unsigned int k6_load_unit_blockage_range PARAMS ((rtx));
12349 unsigned int
12350 k6_load_unit_blockage_range (insn)
12351 rtx insn;
12352 {
12353 switch (recog_memoized (insn))
12354 {
12355 case -1:
12356 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
12357 && asm_noperands (PATTERN (insn)) < 0)
12358 fatal_insn_not_found (insn);
12359 default:
12360 return 65546 ;
12361
12362 }
12363 }
12364
12365 extern int k6_branch_unit_ready_cost PARAMS ((rtx));
12366 int
12367 k6_branch_unit_ready_cost (insn)
12368 rtx insn;
12369 {
12370 switch (recog_memoized (insn))
12371 {
12372 case -1:
12373 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
12374 && asm_noperands (PATTERN (insn)) < 0)
12375 fatal_insn_not_found (insn);
12376 default:
12377 return 1;
12378
12379 }
12380 }
12381
12382 extern int k6_alu_unit_ready_cost PARAMS ((rtx));
12383 int
12384 k6_alu_unit_ready_cost (insn)
12385 rtx insn;
12386 {
12387 switch (recog_memoized (insn))
12388 {
12389 case 659:
12390 extract_constrain_insn_cached (insn);
12391 if ((((which_alternative == 1) && (const0_operand (operands[2], DImode))) && ((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6))))) || ((((which_alternative == 1) && (! (const0_operand (operands[2], DImode)))) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))) || ((which_alternative == 0) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6))))))))
12392 {
12393 return 1;
12394 }
12395 else
12396 {
12397 return 17 ;
12398 }
12399
12400 case 658:
12401 extract_constrain_insn_cached (insn);
12402 if ((((which_alternative == 1) && (const0_operand (operands[2], SImode))) && ((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6))))) || ((((which_alternative == 1) && (! (const0_operand (operands[2], SImode)))) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))) || ((which_alternative == 0) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6))))))))
12403 {
12404 return 1;
12405 }
12406 else
12407 {
12408 return 17 ;
12409 }
12410
12411 case 420:
12412 extract_constrain_insn_cached (insn);
12413 if (((which_alternative == 2) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))) || (((get_attr_type (insn) == TYPE_ALU) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))) || ((get_attr_type (insn) == TYPE_ISHIFT) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6))))))))
12414 {
12415 return 1;
12416 }
12417 else
12418 {
12419 return 17 ;
12420 }
12421
12422 case 416:
12423 extract_constrain_insn_cached (insn);
12424 if (((((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode))) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))) || (((! ((TARGET_DOUBLE_WITH_ADD) != (0))) || (! (const1_operand (operands[2], VOIDmode)))) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))))
12425 {
12426 return 1;
12427 }
12428 else
12429 {
12430 return 17 ;
12431 }
12432
12433 case 414:
12434 extract_constrain_insn_cached (insn);
12435 if (((which_alternative == 1) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))) || ((((which_alternative == 0) && (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode)))) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))) || (((which_alternative == 0) && ((! ((TARGET_DOUBLE_WITH_ADD) != (0))) || (! (const1_operand (operands[2], VOIDmode))))) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6))))))))
12436 {
12437 return 1;
12438 }
12439 else
12440 {
12441 return 17 ;
12442 }
12443
12444 case 422:
12445 case 421:
12446 case 419:
12447 case 418:
12448 case 415:
12449 case 409:
12450 if (((get_attr_type (insn) == TYPE_ALU) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))) || ((get_attr_type (insn) == TYPE_ISHIFT) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))))
12451 {
12452 return 1;
12453 }
12454 else
12455 {
12456 return 17 ;
12457 }
12458
12459 case 417:
12460 case 413:
12461 case 408:
12462 extract_constrain_insn_cached (insn);
12463 if (((which_alternative == 1) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))) || (((get_attr_type (insn) == TYPE_ALU) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))) || ((get_attr_type (insn) == TYPE_ISHIFT) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6))))))))
12464 {
12465 return 1;
12466 }
12467 else
12468 {
12469 return 17 ;
12470 }
12471
12472 case 292:
12473 case 288:
12474 extract_constrain_insn_cached (insn);
12475 if (((which_alternative == 2) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))) || (((which_alternative == 0) || (which_alternative == 1)) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))))
12476 {
12477 return 1;
12478 }
12479 else
12480 {
12481 return 17 ;
12482 }
12483
12484 case 286:
12485 extract_constrain_insn_cached (insn);
12486 if (((which_alternative == 3) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))) || (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))))
12487 {
12488 return 1;
12489 }
12490 else
12491 {
12492 return 17 ;
12493 }
12494
12495 case 261:
12496 case 260:
12497 case 259:
12498 case 258:
12499 case 257:
12500 case 256:
12501 case 255:
12502 case 254:
12503 case 253:
12504 case 252:
12505 case 251:
12506 case 250:
12507 case 249:
12508 case 248:
12509 case 247:
12510 case 246:
12511 case 245:
12512 if (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))
12513 {
12514 return 2;
12515 }
12516 else
12517 {
12518 return 17 ;
12519 }
12520
12521 case 223:
12522 case 222:
12523 case 221:
12524 case 219:
12525 case 218:
12526 case 217:
12527 case 216:
12528 extract_insn_cached (insn);
12529 if (((incdec_operand (operands[2], QImode)) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))) || ((! (incdec_operand (operands[2], QImode))) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))))
12530 {
12531 return 1;
12532 }
12533 else
12534 {
12535 return 17 ;
12536 }
12537
12538 case 215:
12539 extract_constrain_insn_cached (insn);
12540 if (((which_alternative == 3) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))) || ((((which_alternative != 3) && (incdec_operand (operands[2], QImode))) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))) || (((which_alternative != 3) && (! (incdec_operand (operands[2], QImode)))) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6))))))))
12541 {
12542 return 1;
12543 }
12544 else
12545 {
12546 return 17 ;
12547 }
12548
12549 case 220:
12550 case 214:
12551 case 213:
12552 case 212:
12553 case 211:
12554 case 210:
12555 extract_insn_cached (insn);
12556 if (((incdec_operand (operands[2], HImode)) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))) || ((! (incdec_operand (operands[2], HImode))) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))))
12557 {
12558 return 1;
12559 }
12560 else
12561 {
12562 return 17 ;
12563 }
12564
12565 case 209:
12566 extract_constrain_insn_cached (insn);
12567 if (((which_alternative == 2) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))) || ((((which_alternative != 2) && (incdec_operand (operands[2], HImode))) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))) || (((which_alternative != 2) && (! (incdec_operand (operands[2], HImode)))) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6))))))))
12568 {
12569 return 1;
12570 }
12571 else
12572 {
12573 return 17 ;
12574 }
12575
12576 case 208:
12577 case 207:
12578 case 206:
12579 case 205:
12580 case 204:
12581 case 203:
12582 extract_insn_cached (insn);
12583 if (((incdec_operand (operands[2], SImode)) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))) || ((! (incdec_operand (operands[2], SImode))) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))))
12584 {
12585 return 1;
12586 }
12587 else
12588 {
12589 return 17 ;
12590 }
12591
12592 case 202:
12593 extract_constrain_insn_cached (insn);
12594 if ((((which_alternative != 0) || (pic_symbolic_operand (operands[2], SImode))) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))) || (((get_attr_type (insn) == TYPE_INCDEC) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))) || ((get_attr_type (insn) == TYPE_ALU) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6))))))))
12595 {
12596 return 1;
12597 }
12598 else
12599 {
12600 return 17 ;
12601 }
12602
12603 case 201:
12604 extract_constrain_insn_cached (insn);
12605 if ((((which_alternative == 2) || (pic_symbolic_operand (operands[2], SImode))) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))) || (((get_attr_type (insn) == TYPE_INCDEC) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))) || ((get_attr_type (insn) == TYPE_ALU) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6))))))))
12606 {
12607 return 1;
12608 }
12609 else
12610 {
12611 return 17 ;
12612 }
12613
12614 case 200:
12615 case 199:
12616 case 198:
12617 case 197:
12618 extract_insn_cached (insn);
12619 if (((incdec_operand (operands[2], DImode)) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))) || ((! (incdec_operand (operands[2], DImode))) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))))
12620 {
12621 return 1;
12622 }
12623 else
12624 {
12625 return 17 ;
12626 }
12627
12628 case 196:
12629 extract_constrain_insn_cached (insn);
12630 if ((((which_alternative == 2) || (pic_symbolic_operand (operands[2], DImode))) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))) || (((get_attr_type (insn) == TYPE_INCDEC) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))) || ((get_attr_type (insn) == TYPE_ALU) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6))))))))
12631 {
12632 return 1;
12633 }
12634 else
12635 {
12636 return 17 ;
12637 }
12638
12639 case 638:
12640 case 636:
12641 case 547:
12642 case 546:
12643 case 500:
12644 case 499:
12645 case 195:
12646 case 194:
12647 case 193:
12648 case 192:
12649 case 191:
12650 case 190:
12651 case 189:
12652 case 188:
12653 case 187:
12654 case 186:
12655 if (((ix86_cpu) == (CPU_K6)))
12656 {
12657 return 1;
12658 }
12659 else
12660 {
12661 return 17 ;
12662 }
12663
12664 case 115:
12665 extract_constrain_insn_cached (insn);
12666 if (((which_alternative == 1) && ((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6))))) || ((which_alternative == 0) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))))
12667 {
12668 return 1;
12669 }
12670 else
12671 {
12672 return 17 ;
12673 }
12674
12675 case 89:
12676 extract_constrain_insn_cached (insn);
12677 if ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 3) || (which_alternative == 4))) && ((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))))
12678 {
12679 return 1;
12680 }
12681 else
12682 {
12683 return 17 ;
12684 }
12685
12686 case 83:
12687 extract_constrain_insn_cached (insn);
12688 if (((((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative != 7) && ((which_alternative != 8) && ((which_alternative != 9) && ((which_alternative != 4) && ((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], DImode))))))))) && ((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6))))) || ((((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative != 7) && ((which_alternative != 8) && ((which_alternative != 9) && ((which_alternative != 4) && (((flag_pic) != (0)) && (symbolic_operand (operands[1], DImode)))))))) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))))
12689 {
12690 return 1;
12691 }
12692 else
12693 {
12694 return 17 ;
12695 }
12696
12697 case 71:
12698 extract_constrain_insn_cached (insn);
12699 if ((((q_regs_operand (operands[0], QImode)) && (! ((TARGET_MOVX) != (0)))) && ((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6))))) || (((! (q_regs_operand (operands[0], QImode))) || ((TARGET_MOVX) != (0))) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))))
12700 {
12701 return 1;
12702 }
12703 else
12704 {
12705 return 17 ;
12706 }
12707
12708 case 70:
12709 case 66:
12710 case 65:
12711 if (((get_attr_type (insn) == TYPE_IMOV) && ((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6))))) || ((get_attr_type (insn) == TYPE_IMOVX) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))))
12712 {
12713 return 1;
12714 }
12715 else
12716 {
12717 return 17 ;
12718 }
12719
12720 case 59:
12721 extract_constrain_insn_cached (insn);
12722 if (((((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2)))))) && ((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6))))) || ((((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2))))) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))))
12723 {
12724 return 1;
12725 }
12726 else
12727 {
12728 return 17 ;
12729 }
12730
12731 case 50:
12732 extract_constrain_insn_cached (insn);
12733 if (((get_attr_type (insn) == TYPE_IMOV) && ((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6))))) || (((((which_alternative != 0) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_HIMODE_MATH) == (0))))) && (((which_alternative != 1) && (which_alternative != 2)) || (! (aligned_operand (operands[1], HImode))))) && (((TARGET_MOVX) != (0)) && ((which_alternative == 0) || (which_alternative == 2)))) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))))
12734 {
12735 return 1;
12736 }
12737 else
12738 {
12739 return 17 ;
12740 }
12741
12742 case 86:
12743 case 74:
12744 case 73:
12745 case 72:
12746 case 61:
12747 case 60:
12748 case 55:
12749 case 54:
12750 case 53:
12751 case 47:
12752 if ((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6))))
12753 {
12754 return 1;
12755 }
12756 else
12757 {
12758 return 17 ;
12759 }
12760
12761 case 44:
12762 extract_constrain_insn_cached (insn);
12763 if (((((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && ((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], SImode)))))))) && ((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6))))) || ((((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (((flag_pic) != (0)) && (symbolic_operand (operands[1], SImode))))))) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))))
12764 {
12765 return 1;
12766 }
12767 else
12768 {
12769 return 17 ;
12770 }
12771
12772 case 498:
12773 case 497:
12774 case 496:
12775 case 495:
12776 case 494:
12777 case 493:
12778 case 492:
12779 case 491:
12780 case 490:
12781 case 489:
12782 case 488:
12783 case 487:
12784 case 486:
12785 case 485:
12786 case 484:
12787 case 483:
12788 case 482:
12789 case 481:
12790 case 480:
12791 case 479:
12792 case 478:
12793 case 477:
12794 case 476:
12795 case 475:
12796 case 474:
12797 case 473:
12798 case 472:
12799 case 471:
12800 case 470:
12801 case 469:
12802 case 468:
12803 case 467:
12804 case 466:
12805 case 465:
12806 case 464:
12807 case 463:
12808 case 462:
12809 case 461:
12810 case 460:
12811 case 459:
12812 case 458:
12813 case 457:
12814 case 454:
12815 case 453:
12816 case 452:
12817 case 451:
12818 case 450:
12819 case 449:
12820 case 448:
12821 case 447:
12822 case 446:
12823 case 445:
12824 case 444:
12825 case 443:
12826 case 442:
12827 case 441:
12828 case 440:
12829 case 439:
12830 case 438:
12831 case 437:
12832 case 436:
12833 case 435:
12834 case 434:
12835 case 433:
12836 case 430:
12837 case 427:
12838 case 426:
12839 case 425:
12840 case 424:
12841 case 412:
12842 case 407:
12843 case 406:
12844 case 405:
12845 case 404:
12846 case 403:
12847 case 402:
12848 case 401:
12849 case 400:
12850 case 399:
12851 case 398:
12852 case 359:
12853 case 358:
12854 case 357:
12855 case 356:
12856 case 355:
12857 case 354:
12858 case 353:
12859 case 352:
12860 case 351:
12861 case 350:
12862 case 348:
12863 case 347:
12864 case 346:
12865 case 345:
12866 case 344:
12867 case 343:
12868 case 342:
12869 case 341:
12870 case 340:
12871 case 339:
12872 case 338:
12873 case 337:
12874 case 336:
12875 case 335:
12876 case 334:
12877 case 333:
12878 case 332:
12879 case 331:
12880 case 330:
12881 case 329:
12882 case 328:
12883 case 327:
12884 case 326:
12885 case 325:
12886 case 324:
12887 case 323:
12888 case 322:
12889 case 321:
12890 case 320:
12891 case 319:
12892 case 318:
12893 case 317:
12894 case 316:
12895 case 315:
12896 case 314:
12897 case 313:
12898 case 312:
12899 case 311:
12900 case 310:
12901 case 309:
12902 case 308:
12903 case 307:
12904 case 306:
12905 case 305:
12906 case 304:
12907 case 303:
12908 case 302:
12909 case 301:
12910 case 300:
12911 case 299:
12912 case 298:
12913 case 297:
12914 case 296:
12915 case 295:
12916 case 294:
12917 case 293:
12918 case 291:
12919 case 290:
12920 case 289:
12921 case 287:
12922 case 283:
12923 case 282:
12924 case 281:
12925 case 280:
12926 case 279:
12927 case 278:
12928 case 277:
12929 case 276:
12930 case 244:
12931 case 243:
12932 case 242:
12933 case 241:
12934 case 240:
12935 case 239:
12936 case 238:
12937 case 237:
12938 case 236:
12939 case 235:
12940 case 234:
12941 case 233:
12942 case 232:
12943 case 231:
12944 case 230:
12945 case 229:
12946 case 228:
12947 case 227:
12948 case 226:
12949 case 224:
12950 case 185:
12951 case 184:
12952 case 183:
12953 case 182:
12954 case 181:
12955 case 180:
12956 case 126:
12957 case 125:
12958 case 124:
12959 case 123:
12960 case 122:
12961 case 121:
12962 case 120:
12963 case 119:
12964 case 117:
12965 case 116:
12966 case 113:
12967 case 111:
12968 case 110:
12969 case 108:
12970 case 107:
12971 case 106:
12972 case 81:
12973 case 80:
12974 case 69:
12975 case 64:
12976 case 63:
12977 case 62:
12978 case 56:
12979 case 43:
12980 case 42:
12981 case 17:
12982 case 16:
12983 case 15:
12984 case 14:
12985 case 13:
12986 case 12:
12987 case 11:
12988 case 10:
12989 case 8:
12990 case 7:
12991 case 5:
12992 case 4:
12993 case 2:
12994 case 1:
12995 if (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))
12996 {
12997 return 1;
12998 }
12999 else
13000 {
13001 return 17 ;
13002 }
13003
13004 case 432:
13005 case 431:
13006 case 423:
13007 case 112:
13008 case 109:
13009 case 9:
13010 case 6:
13011 case 3:
13012 case 0:
13013 extract_constrain_insn_cached (insn);
13014 if (((which_alternative == 0) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))) || ((which_alternative == 1) && (((get_attr_memory (insn) == MEMORY_NONE) && (((ix86_cpu) == (CPU_K6)))) || ((! (get_attr_memory (insn) == MEMORY_NONE)) && (((ix86_cpu) == (CPU_K6)))))))
13015 {
13016 return 1;
13017 }
13018 else
13019 {
13020 return 17 ;
13021 }
13022
13023 case -1:
13024 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
13025 && asm_noperands (PATTERN (insn)) < 0)
13026 fatal_insn_not_found (insn);
13027 default:
13028 return 17 ;
13029
13030 }
13031 }
13032
13033 extern unsigned int k6_alu_unit_blockage_range PARAMS ((rtx));
13034 unsigned int
13035 k6_alu_unit_blockage_range (insn)
13036 rtx insn;
13037 {
13038 switch (recog_memoized (insn))
13039 {
13040 case -1:
13041 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
13042 && asm_noperands (PATTERN (insn)) < 0)
13043 fatal_insn_not_found (insn);
13044 default:
13045 return 65553 ;
13046
13047 }
13048 }
13049
13050 extern int k6_alux_unit_ready_cost PARAMS ((rtx));
13051 int
13052 k6_alux_unit_ready_cost (insn)
13053 rtx insn;
13054 {
13055 switch (recog_memoized (insn))
13056 {
13057 case 416:
13058 extract_constrain_insn_cached (insn);
13059 if ((((ix86_cpu) == (CPU_K6))) && (((! ((TARGET_DOUBLE_WITH_ADD) != (0))) || (! (const1_operand (operands[2], VOIDmode)))) || ((((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode))) && (general_operand (operands[0], QImode)))))
13060 {
13061 return 1;
13062 }
13063 else
13064 {
13065 return 17 ;
13066 }
13067
13068 case 414:
13069 extract_constrain_insn_cached (insn);
13070 if ((((ix86_cpu) == (CPU_K6))) && (((which_alternative == 0) && ((! ((TARGET_DOUBLE_WITH_ADD) != (0))) || (! (const1_operand (operands[2], VOIDmode))))) || (((which_alternative == 0) && (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode)))) && (general_operand (operands[0], QImode)))))
13071 {
13072 return 1;
13073 }
13074 else
13075 {
13076 return 17 ;
13077 }
13078
13079 case 422:
13080 case 421:
13081 case 420:
13082 case 419:
13083 case 418:
13084 case 417:
13085 case 415:
13086 case 413:
13087 case 409:
13088 case 408:
13089 extract_insn_cached (insn);
13090 if ((((ix86_cpu) == (CPU_K6))) && ((get_attr_type (insn) == TYPE_ISHIFT) || ((get_attr_type (insn) == TYPE_ALU) && (general_operand (operands[0], QImode)))))
13091 {
13092 return 1;
13093 }
13094 else
13095 {
13096 return 17 ;
13097 }
13098
13099 case 275:
13100 case 274:
13101 case 272:
13102 case 269:
13103 case 266:
13104 case 263:
13105 case 262:
13106 if (((ix86_cpu) == (CPU_K6)))
13107 {
13108 return 17 ;
13109 }
13110 else
13111 {
13112 return 17 ;
13113 }
13114
13115 case 261:
13116 case 260:
13117 case 259:
13118 case 258:
13119 case 257:
13120 case 256:
13121 case 255:
13122 case 254:
13123 case 253:
13124 case 252:
13125 case 251:
13126 case 250:
13127 case 249:
13128 case 248:
13129 case 247:
13130 case 246:
13131 case 245:
13132 if (((ix86_cpu) == (CPU_K6)))
13133 {
13134 return 2;
13135 }
13136 else
13137 {
13138 return 17 ;
13139 }
13140
13141 case 217:
13142 extract_insn_cached (insn);
13143 if ((((ix86_cpu) == (CPU_K6))) && ((! (incdec_operand (operands[2], QImode))) || (general_operand (operands[0], QImode))))
13144 {
13145 return 1;
13146 }
13147 else
13148 {
13149 return 17 ;
13150 }
13151
13152 case 215:
13153 extract_constrain_insn_cached (insn);
13154 if ((((ix86_cpu) == (CPU_K6))) && ((which_alternative != 3) && (general_operand (operands[0], QImode))))
13155 {
13156 return 1;
13157 }
13158 else
13159 {
13160 return 17 ;
13161 }
13162
13163 case 209:
13164 extract_constrain_insn_cached (insn);
13165 if ((((ix86_cpu) == (CPU_K6))) && ((which_alternative != 2) && (general_operand (operands[0], QImode))))
13166 {
13167 return 1;
13168 }
13169 else
13170 {
13171 return 17 ;
13172 }
13173
13174 case 202:
13175 case 201:
13176 case 196:
13177 extract_insn_cached (insn);
13178 if ((((ix86_cpu) == (CPU_K6))) && (((get_attr_type (insn) == TYPE_ALU) || (get_attr_type (insn) == TYPE_INCDEC)) && (general_operand (operands[0], QImode))))
13179 {
13180 return 1;
13181 }
13182 else
13183 {
13184 return 17 ;
13185 }
13186
13187 case 659:
13188 case 658:
13189 case 115:
13190 extract_constrain_insn_cached (insn);
13191 if ((((ix86_cpu) == (CPU_K6))) && ((which_alternative == 0) && (general_operand (operands[0], QImode))))
13192 {
13193 return 1;
13194 }
13195 else
13196 {
13197 return 17 ;
13198 }
13199
13200 case 432:
13201 case 431:
13202 case 423:
13203 case 112:
13204 case 109:
13205 extract_constrain_insn_cached (insn);
13206 if ((((ix86_cpu) == (CPU_K6))) && ((which_alternative != 0) || (general_operand (operands[0], QImode))))
13207 {
13208 return 1;
13209 }
13210 else
13211 {
13212 return 17 ;
13213 }
13214
13215 case 71:
13216 extract_constrain_insn_cached (insn);
13217 if ((((ix86_cpu) == (CPU_K6))) && (((! (q_regs_operand (operands[0], QImode))) || ((TARGET_MOVX) != (0))) && (general_operand (operands[0], QImode))))
13218 {
13219 return 1;
13220 }
13221 else
13222 {
13223 return 17 ;
13224 }
13225
13226 case 70:
13227 case 66:
13228 case 65:
13229 extract_insn_cached (insn);
13230 if ((((ix86_cpu) == (CPU_K6))) && ((get_attr_type (insn) == TYPE_IMOVX) && (general_operand (operands[0], QImode))))
13231 {
13232 return 1;
13233 }
13234 else
13235 {
13236 return 17 ;
13237 }
13238
13239 case 59:
13240 extract_constrain_insn_cached (insn);
13241 if ((((ix86_cpu) == (CPU_K6))) && ((((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2))))) && (general_operand (operands[0], QImode))))
13242 {
13243 return 1;
13244 }
13245 else
13246 {
13247 return 17 ;
13248 }
13249
13250 case 50:
13251 extract_constrain_insn_cached (insn);
13252 if ((((ix86_cpu) == (CPU_K6))) && (((((which_alternative != 0) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_HIMODE_MATH) == (0))))) && (((which_alternative != 1) && (which_alternative != 2)) || (! (aligned_operand (operands[1], HImode))))) && (((TARGET_MOVX) != (0)) && ((which_alternative == 0) || (which_alternative == 2)))) && (general_operand (operands[0], QImode))))
13253 {
13254 return 1;
13255 }
13256 else
13257 {
13258 return 17 ;
13259 }
13260
13261 case 605:
13262 case 498:
13263 case 497:
13264 case 496:
13265 case 495:
13266 case 494:
13267 case 493:
13268 case 492:
13269 case 491:
13270 case 490:
13271 case 489:
13272 case 488:
13273 case 487:
13274 case 486:
13275 case 485:
13276 case 484:
13277 case 483:
13278 case 482:
13279 case 481:
13280 case 480:
13281 case 479:
13282 case 478:
13283 case 477:
13284 case 476:
13285 case 475:
13286 case 474:
13287 case 473:
13288 case 472:
13289 case 471:
13290 case 470:
13291 case 469:
13292 case 468:
13293 case 467:
13294 case 466:
13295 case 465:
13296 case 464:
13297 case 463:
13298 case 462:
13299 case 461:
13300 case 460:
13301 case 459:
13302 case 458:
13303 case 457:
13304 case 454:
13305 case 453:
13306 case 452:
13307 case 451:
13308 case 450:
13309 case 449:
13310 case 448:
13311 case 447:
13312 case 446:
13313 case 445:
13314 case 444:
13315 case 443:
13316 case 442:
13317 case 441:
13318 case 440:
13319 case 439:
13320 case 438:
13321 case 437:
13322 case 436:
13323 case 435:
13324 case 434:
13325 case 433:
13326 case 430:
13327 case 427:
13328 case 426:
13329 case 425:
13330 case 424:
13331 case 412:
13332 case 407:
13333 case 406:
13334 case 405:
13335 case 404:
13336 case 403:
13337 case 402:
13338 case 401:
13339 case 400:
13340 case 399:
13341 case 398:
13342 case 359:
13343 case 358:
13344 case 357:
13345 case 356:
13346 case 355:
13347 case 354:
13348 case 353:
13349 case 352:
13350 case 351:
13351 case 350:
13352 case 345:
13353 case 339:
13354 case 319:
13355 case 317:
13356 case 297:
13357 case 295:
13358 case 242:
13359 case 111:
13360 case 108:
13361 case 106:
13362 case 81:
13363 case 80:
13364 case 62:
13365 case 56:
13366 case 43:
13367 case 42:
13368 if (((ix86_cpu) == (CPU_K6)))
13369 {
13370 return 1;
13371 }
13372 else
13373 {
13374 return 17 ;
13375 }
13376
13377 case 638:
13378 case 636:
13379 case 547:
13380 case 546:
13381 case 348:
13382 case 347:
13383 case 346:
13384 case 344:
13385 case 343:
13386 case 342:
13387 case 341:
13388 case 340:
13389 case 338:
13390 case 337:
13391 case 336:
13392 case 335:
13393 case 334:
13394 case 333:
13395 case 332:
13396 case 331:
13397 case 330:
13398 case 329:
13399 case 328:
13400 case 327:
13401 case 326:
13402 case 325:
13403 case 324:
13404 case 323:
13405 case 322:
13406 case 321:
13407 case 320:
13408 case 318:
13409 case 316:
13410 case 315:
13411 case 314:
13412 case 313:
13413 case 312:
13414 case 311:
13415 case 310:
13416 case 309:
13417 case 308:
13418 case 307:
13419 case 306:
13420 case 305:
13421 case 304:
13422 case 303:
13423 case 302:
13424 case 301:
13425 case 300:
13426 case 299:
13427 case 298:
13428 case 296:
13429 case 294:
13430 case 293:
13431 case 292:
13432 case 291:
13433 case 290:
13434 case 289:
13435 case 288:
13436 case 287:
13437 case 286:
13438 case 283:
13439 case 282:
13440 case 281:
13441 case 280:
13442 case 279:
13443 case 278:
13444 case 277:
13445 case 276:
13446 case 244:
13447 case 243:
13448 case 241:
13449 case 240:
13450 case 239:
13451 case 238:
13452 case 237:
13453 case 236:
13454 case 235:
13455 case 234:
13456 case 233:
13457 case 232:
13458 case 231:
13459 case 230:
13460 case 229:
13461 case 228:
13462 case 227:
13463 case 226:
13464 case 224:
13465 case 223:
13466 case 222:
13467 case 221:
13468 case 220:
13469 case 219:
13470 case 218:
13471 case 216:
13472 case 214:
13473 case 213:
13474 case 212:
13475 case 211:
13476 case 210:
13477 case 208:
13478 case 207:
13479 case 206:
13480 case 205:
13481 case 204:
13482 case 203:
13483 case 200:
13484 case 199:
13485 case 198:
13486 case 197:
13487 case 185:
13488 case 184:
13489 case 183:
13490 case 182:
13491 case 181:
13492 case 180:
13493 case 126:
13494 case 125:
13495 case 124:
13496 case 123:
13497 case 122:
13498 case 121:
13499 case 120:
13500 case 119:
13501 case 117:
13502 case 116:
13503 case 113:
13504 case 110:
13505 case 107:
13506 case 69:
13507 case 64:
13508 case 63:
13509 case 17:
13510 case 16:
13511 case 15:
13512 case 14:
13513 case 13:
13514 case 12:
13515 case 11:
13516 case 10:
13517 case 9:
13518 case 8:
13519 case 7:
13520 case 6:
13521 case 5:
13522 case 4:
13523 case 3:
13524 case 2:
13525 case 1:
13526 case 0:
13527 extract_insn_cached (insn);
13528 if ((((ix86_cpu) == (CPU_K6))) && (general_operand (operands[0], QImode)))
13529 {
13530 return 1;
13531 }
13532 else
13533 {
13534 return 17 ;
13535 }
13536
13537 case -1:
13538 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
13539 && asm_noperands (PATTERN (insn)) < 0)
13540 fatal_insn_not_found (insn);
13541 default:
13542 return 17 ;
13543
13544 }
13545 }
13546
13547 extern unsigned int k6_alux_unit_blockage_range PARAMS ((rtx));
13548 unsigned int
13549 k6_alux_unit_blockage_range (insn)
13550 rtx insn;
13551 {
13552 switch (recog_memoized (insn))
13553 {
13554 case -1:
13555 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
13556 && asm_noperands (PATTERN (insn)) < 0)
13557 fatal_insn_not_found (insn);
13558 default:
13559 return 65553 ;
13560
13561 }
13562 }
13563
13564 extern int fpu_unit_ready_cost PARAMS ((rtx));
13565 int
13566 fpu_unit_ready_cost (insn)
13567 rtx insn;
13568 {
13569 switch (recog_memoized (insn))
13570 {
13571 case 581:
13572 case 579:
13573 case 577:
13574 case 575:
13575 case 573:
13576 case 571:
13577 case 569:
13578 extract_insn_cached (insn);
13579 if ((mult_operator (operands[3], TFmode)) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
13580 {
13581 return 5;
13582 }
13583 else if ((get_attr_type (insn) == TYPE_FOP) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
13584 {
13585 return 1;
13586 }
13587 else
13588 {
13589 return 56 ;
13590 }
13591
13592 case 580:
13593 case 578:
13594 case 576:
13595 case 574:
13596 case 572:
13597 case 570:
13598 case 568:
13599 extract_insn_cached (insn);
13600 if ((mult_operator (operands[3], XFmode)) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
13601 {
13602 return 5;
13603 }
13604 else if ((get_attr_type (insn) == TYPE_FOP) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
13605 {
13606 return 1;
13607 }
13608 else
13609 {
13610 return 56 ;
13611 }
13612
13613 case 562:
13614 extract_constrain_insn_cached (insn);
13615 if (((which_alternative != 2) && (mult_operator (operands[3], DFmode))) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
13616 {
13617 return 5;
13618 }
13619 else if ((get_attr_type (insn) == TYPE_FOP) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
13620 {
13621 return 1;
13622 }
13623 else
13624 {
13625 return 56 ;
13626 }
13627
13628 case 567:
13629 case 566:
13630 case 565:
13631 case 564:
13632 case 561:
13633 extract_insn_cached (insn);
13634 if ((mult_operator (operands[3], DFmode)) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
13635 {
13636 return 5;
13637 }
13638 else if ((get_attr_type (insn) == TYPE_FOP) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
13639 {
13640 return 1;
13641 }
13642 else
13643 {
13644 return 56 ;
13645 }
13646
13647 case 557:
13648 extract_constrain_insn_cached (insn);
13649 if (((which_alternative != 2) && (mult_operator (operands[3], SFmode))) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
13650 {
13651 return 5;
13652 }
13653 else if ((get_attr_type (insn) == TYPE_FOP) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
13654 {
13655 return 1;
13656 }
13657 else
13658 {
13659 return 56 ;
13660 }
13661
13662 case 560:
13663 case 559:
13664 case 556:
13665 extract_insn_cached (insn);
13666 if ((mult_operator (operands[3], SFmode)) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
13667 {
13668 return 5;
13669 }
13670 else if ((get_attr_type (insn) == TYPE_FOP) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
13671 {
13672 return 1;
13673 }
13674 else
13675 {
13676 return 56 ;
13677 }
13678
13679 case 555:
13680 extract_insn_cached (insn);
13681 if ((mult_operator (operands[3], TFmode)) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
13682 {
13683 return 5;
13684 }
13685 else if ((! (mult_operator (operands[3], TFmode))) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
13686 {
13687 return 1;
13688 }
13689 else
13690 {
13691 return 56 ;
13692 }
13693
13694 case 554:
13695 extract_insn_cached (insn);
13696 if ((mult_operator (operands[3], XFmode)) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
13697 {
13698 return 5;
13699 }
13700 else if ((! (mult_operator (operands[3], XFmode))) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
13701 {
13702 return 1;
13703 }
13704 else
13705 {
13706 return 56 ;
13707 }
13708
13709 case 552:
13710 case 549:
13711 extract_constrain_insn_cached (insn);
13712 if (((which_alternative == 0) && (mult_operator (operands[3], SFmode))) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
13713 {
13714 return 5;
13715 }
13716 else if (((which_alternative == 0) && (! (mult_operator (operands[3], SFmode)))) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
13717 {
13718 return 1;
13719 }
13720 else
13721 {
13722 return 56 ;
13723 }
13724
13725 case 551:
13726 case 548:
13727 extract_insn_cached (insn);
13728 if ((mult_operator (operands[3], SFmode)) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
13729 {
13730 return 5;
13731 }
13732 else if ((! (mult_operator (operands[3], SFmode))) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
13733 {
13734 return 1;
13735 }
13736 else
13737 {
13738 return 56 ;
13739 }
13740
13741 case 261:
13742 case 260:
13743 case 259:
13744 case 258:
13745 case 257:
13746 case 256:
13747 case 255:
13748 case 254:
13749 case 253:
13750 case 252:
13751 case 251:
13752 case 250:
13753 case 249:
13754 case 248:
13755 case 247:
13756 case 246:
13757 case 245:
13758 if (((ix86_cpu) == (CPU_PENTIUMPRO)))
13759 {
13760 return 4;
13761 }
13762 else
13763 {
13764 return 56 ;
13765 }
13766
13767 case 135:
13768 extract_constrain_insn_cached (insn);
13769 if ((which_alternative == 1) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
13770 {
13771 return 1;
13772 }
13773 else
13774 {
13775 return 56 ;
13776 }
13777
13778 case 643:
13779 case 642:
13780 case 641:
13781 case 127:
13782 extract_constrain_insn_cached (insn);
13783 if (((which_alternative == 0) || (which_alternative == 1)) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
13784 {
13785 return 1;
13786 }
13787 else
13788 {
13789 return 56 ;
13790 }
13791
13792 case 103:
13793 case 102:
13794 case 101:
13795 case 100:
13796 case 94:
13797 case 93:
13798 case 89:
13799 extract_constrain_insn_cached (insn);
13800 if (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
13801 {
13802 return 1;
13803 }
13804 else
13805 {
13806 return 56 ;
13807 }
13808
13809 case 178:
13810 case 177:
13811 case 176:
13812 case 175:
13813 case 174:
13814 case 173:
13815 case 171:
13816 case 170:
13817 case 168:
13818 case 167:
13819 case 165:
13820 case 164:
13821 case 162:
13822 case 161:
13823 case 144:
13824 case 142:
13825 case 140:
13826 case 138:
13827 case 134:
13828 case 133:
13829 case 35:
13830 case 32:
13831 extract_constrain_insn_cached (insn);
13832 if ((which_alternative == 0) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
13833 {
13834 return 1;
13835 }
13836 else
13837 {
13838 return 56 ;
13839 }
13840
13841 case 645:
13842 case 644:
13843 case 397:
13844 case 396:
13845 case 395:
13846 case 394:
13847 case 393:
13848 case 392:
13849 case 391:
13850 case 390:
13851 case 389:
13852 case 378:
13853 case 377:
13854 case 376:
13855 case 375:
13856 case 374:
13857 case 373:
13858 case 372:
13859 case 371:
13860 case 370:
13861 case 158:
13862 case 157:
13863 case 156:
13864 case 153:
13865 case 152:
13866 case 151:
13867 case 148:
13868 case 147:
13869 case 146:
13870 case 145:
13871 case 143:
13872 case 141:
13873 case 139:
13874 case 136:
13875 case 132:
13876 case 131:
13877 case 130:
13878 case 129:
13879 case 34:
13880 case 31:
13881 case 27:
13882 case 24:
13883 case 23:
13884 case 21:
13885 case 20:
13886 case 19:
13887 if (((ix86_cpu) == (CPU_PENTIUMPRO)))
13888 {
13889 return 1;
13890 }
13891 else
13892 {
13893 return 56 ;
13894 }
13895
13896 case -1:
13897 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
13898 && asm_noperands (PATTERN (insn)) < 0)
13899 fatal_insn_not_found (insn);
13900 default:
13901 return 56 ;
13902
13903 }
13904 }
13905
13906 extern unsigned int fpu_unit_blockage_range PARAMS ((rtx));
13907 unsigned int
13908 fpu_unit_blockage_range (insn)
13909 rtx insn;
13910 {
13911 switch (recog_memoized (insn))
13912 {
13913 case -1:
13914 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
13915 && asm_noperands (PATTERN (insn)) < 0)
13916 fatal_insn_not_found (insn);
13917 default:
13918 return 65592 ;
13919
13920 }
13921 }
13922
13923 extern int ppro_p34_unit_ready_cost PARAMS ((rtx));
13924 int
13925 ppro_p34_unit_ready_cost (insn)
13926 rtx insn;
13927 {
13928 switch (recog_memoized (insn))
13929 {
13930 case -1:
13931 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
13932 && asm_noperands (PATTERN (insn)) < 0)
13933 fatal_insn_not_found (insn);
13934 default:
13935 return 1;
13936
13937 }
13938 }
13939
13940 extern int ppro_p2_unit_ready_cost PARAMS ((rtx));
13941 int
13942 ppro_p2_unit_ready_cost (insn)
13943 rtx insn;
13944 {
13945 switch (recog_memoized (insn))
13946 {
13947 case -1:
13948 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
13949 && asm_noperands (PATTERN (insn)) < 0)
13950 fatal_insn_not_found (insn);
13951 default:
13952 return 3;
13953
13954 }
13955 }
13956
13957 extern int ppro_p01_unit_ready_cost PARAMS ((rtx));
13958 int
13959 ppro_p01_unit_ready_cost (insn)
13960 rtx insn;
13961 {
13962 switch (recog_memoized (insn))
13963 {
13964 case -1:
13965 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
13966 && asm_noperands (PATTERN (insn)) < 0)
13967 fatal_insn_not_found (insn);
13968 default:
13969 return 1;
13970
13971 }
13972 }
13973
13974 extern int ppro_p0_unit_ready_cost PARAMS ((rtx));
13975 int
13976 ppro_p0_unit_ready_cost (insn)
13977 rtx insn;
13978 {
13979 switch (recog_memoized (insn))
13980 {
13981 case 659:
13982 extract_constrain_insn_cached (insn);
13983 if (((which_alternative == 1) && (! (const0_operand (operands[2], DImode)))) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
13984 {
13985 return 1;
13986 }
13987 else
13988 {
13989 return 56 ;
13990 }
13991
13992 case 658:
13993 extract_constrain_insn_cached (insn);
13994 if (((which_alternative == 1) && (! (const0_operand (operands[2], SImode)))) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
13995 {
13996 return 1;
13997 }
13998 else
13999 {
14000 return 56 ;
14001 }
14002
14003 case 645:
14004 case 644:
14005 if (((ix86_cpu) == (CPU_PENTIUMPRO)))
14006 {
14007 return 2;
14008 }
14009 else
14010 {
14011 return 56 ;
14012 }
14013
14014 case 643:
14015 case 642:
14016 case 641:
14017 extract_constrain_insn_cached (insn);
14018 if (((which_alternative == 0) || (which_alternative == 1)) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14019 {
14020 return 2;
14021 }
14022 else
14023 {
14024 return 56 ;
14025 }
14026
14027 case 581:
14028 case 579:
14029 case 577:
14030 case 575:
14031 case 573:
14032 case 571:
14033 case 569:
14034 extract_insn_cached (insn);
14035 if ((mult_operator (operands[3], TFmode)) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14036 {
14037 return 5;
14038 }
14039 else if ((get_attr_type (insn) == TYPE_FOP) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14040 {
14041 return 3;
14042 }
14043 else
14044 {
14045 return 56 ;
14046 }
14047
14048 case 580:
14049 case 578:
14050 case 576:
14051 case 574:
14052 case 572:
14053 case 570:
14054 case 568:
14055 extract_insn_cached (insn);
14056 if ((mult_operator (operands[3], XFmode)) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14057 {
14058 return 5;
14059 }
14060 else if ((get_attr_type (insn) == TYPE_FOP) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14061 {
14062 return 3;
14063 }
14064 else
14065 {
14066 return 56 ;
14067 }
14068
14069 case 562:
14070 extract_constrain_insn_cached (insn);
14071 if (((which_alternative != 2) && (mult_operator (operands[3], DFmode))) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14072 {
14073 return 5;
14074 }
14075 else if ((get_attr_type (insn) == TYPE_FOP) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14076 {
14077 return 3;
14078 }
14079 else
14080 {
14081 return 56 ;
14082 }
14083
14084 case 567:
14085 case 566:
14086 case 565:
14087 case 564:
14088 case 561:
14089 extract_insn_cached (insn);
14090 if ((mult_operator (operands[3], DFmode)) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14091 {
14092 return 5;
14093 }
14094 else if ((get_attr_type (insn) == TYPE_FOP) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14095 {
14096 return 3;
14097 }
14098 else
14099 {
14100 return 56 ;
14101 }
14102
14103 case 557:
14104 extract_constrain_insn_cached (insn);
14105 if (((which_alternative != 2) && (mult_operator (operands[3], SFmode))) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14106 {
14107 return 5;
14108 }
14109 else if ((get_attr_type (insn) == TYPE_FOP) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14110 {
14111 return 3;
14112 }
14113 else
14114 {
14115 return 56 ;
14116 }
14117
14118 case 560:
14119 case 559:
14120 case 556:
14121 extract_insn_cached (insn);
14122 if ((mult_operator (operands[3], SFmode)) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14123 {
14124 return 5;
14125 }
14126 else if ((get_attr_type (insn) == TYPE_FOP) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14127 {
14128 return 3;
14129 }
14130 else
14131 {
14132 return 56 ;
14133 }
14134
14135 case 555:
14136 extract_insn_cached (insn);
14137 if ((mult_operator (operands[3], TFmode)) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14138 {
14139 return 5;
14140 }
14141 else if ((! (mult_operator (operands[3], TFmode))) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14142 {
14143 return 3;
14144 }
14145 else
14146 {
14147 return 56 ;
14148 }
14149
14150 case 554:
14151 extract_insn_cached (insn);
14152 if ((mult_operator (operands[3], XFmode)) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14153 {
14154 return 5;
14155 }
14156 else if ((! (mult_operator (operands[3], XFmode))) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14157 {
14158 return 3;
14159 }
14160 else
14161 {
14162 return 56 ;
14163 }
14164
14165 case 552:
14166 case 549:
14167 extract_constrain_insn_cached (insn);
14168 if (((which_alternative == 0) && (mult_operator (operands[3], SFmode))) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14169 {
14170 return 5;
14171 }
14172 else if (((which_alternative == 0) && (! (mult_operator (operands[3], SFmode)))) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14173 {
14174 return 3;
14175 }
14176 else
14177 {
14178 return 56 ;
14179 }
14180
14181 case 551:
14182 case 548:
14183 extract_insn_cached (insn);
14184 if ((mult_operator (operands[3], SFmode)) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14185 {
14186 return 5;
14187 }
14188 else if ((! (mult_operator (operands[3], SFmode))) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14189 {
14190 return 3;
14191 }
14192 else
14193 {
14194 return 56 ;
14195 }
14196
14197 case 420:
14198 extract_constrain_insn_cached (insn);
14199 if (((which_alternative == 2) && (((ix86_cpu) == (CPU_PENTIUMPRO)))) || ((get_attr_type (insn) == TYPE_ISHIFT) && (((ix86_cpu) == (CPU_PENTIUMPRO)))))
14200 {
14201 return 1;
14202 }
14203 else
14204 {
14205 return 56 ;
14206 }
14207
14208 case 416:
14209 extract_constrain_insn_cached (insn);
14210 if (((! ((TARGET_DOUBLE_WITH_ADD) != (0))) || (! (const1_operand (operands[2], VOIDmode)))) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14211 {
14212 return 1;
14213 }
14214 else
14215 {
14216 return 56 ;
14217 }
14218
14219 case 414:
14220 extract_constrain_insn_cached (insn);
14221 if (((which_alternative == 1) && (((ix86_cpu) == (CPU_PENTIUMPRO)))) || (((which_alternative == 0) && ((! ((TARGET_DOUBLE_WITH_ADD) != (0))) || (! (const1_operand (operands[2], VOIDmode))))) && (((ix86_cpu) == (CPU_PENTIUMPRO)))))
14222 {
14223 return 1;
14224 }
14225 else
14226 {
14227 return 56 ;
14228 }
14229
14230 case 422:
14231 case 421:
14232 case 419:
14233 case 418:
14234 case 415:
14235 case 409:
14236 if ((get_attr_type (insn) == TYPE_ISHIFT) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14237 {
14238 return 1;
14239 }
14240 else
14241 {
14242 return 56 ;
14243 }
14244
14245 case 417:
14246 case 413:
14247 case 408:
14248 extract_constrain_insn_cached (insn);
14249 if (((which_alternative == 1) && (((ix86_cpu) == (CPU_PENTIUMPRO)))) || ((get_attr_type (insn) == TYPE_ISHIFT) && (((ix86_cpu) == (CPU_PENTIUMPRO)))))
14250 {
14251 return 1;
14252 }
14253 else
14254 {
14255 return 56 ;
14256 }
14257
14258 case 275:
14259 case 274:
14260 case 272:
14261 case 269:
14262 case 266:
14263 case 263:
14264 case 262:
14265 if (((ix86_cpu) == (CPU_PENTIUMPRO)))
14266 {
14267 return 17 ;
14268 }
14269 else
14270 {
14271 return 56 ;
14272 }
14273
14274 case 261:
14275 case 260:
14276 case 259:
14277 case 258:
14278 case 257:
14279 case 256:
14280 case 255:
14281 case 254:
14282 case 253:
14283 case 252:
14284 case 251:
14285 case 250:
14286 case 249:
14287 case 248:
14288 case 247:
14289 case 246:
14290 case 245:
14291 if (((ix86_cpu) == (CPU_PENTIUMPRO)))
14292 {
14293 return 4;
14294 }
14295 else
14296 {
14297 return 56 ;
14298 }
14299
14300 case 215:
14301 extract_constrain_insn_cached (insn);
14302 if ((which_alternative == 3) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14303 {
14304 return 1;
14305 }
14306 else
14307 {
14308 return 56 ;
14309 }
14310
14311 case 209:
14312 extract_constrain_insn_cached (insn);
14313 if ((which_alternative == 2) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14314 {
14315 return 1;
14316 }
14317 else
14318 {
14319 return 56 ;
14320 }
14321
14322 case 202:
14323 extract_constrain_insn_cached (insn);
14324 if (((which_alternative != 0) || (pic_symbolic_operand (operands[2], SImode))) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14325 {
14326 return 1;
14327 }
14328 else
14329 {
14330 return 56 ;
14331 }
14332
14333 case 201:
14334 extract_constrain_insn_cached (insn);
14335 if (((which_alternative == 2) || (pic_symbolic_operand (operands[2], SImode))) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14336 {
14337 return 1;
14338 }
14339 else
14340 {
14341 return 56 ;
14342 }
14343
14344 case 196:
14345 extract_constrain_insn_cached (insn);
14346 if (((which_alternative == 2) || (pic_symbolic_operand (operands[2], DImode))) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14347 {
14348 return 1;
14349 }
14350 else
14351 {
14352 return 56 ;
14353 }
14354
14355 case 397:
14356 case 396:
14357 case 395:
14358 case 394:
14359 case 393:
14360 case 392:
14361 case 391:
14362 case 390:
14363 case 389:
14364 case 378:
14365 case 377:
14366 case 376:
14367 case 375:
14368 case 374:
14369 case 373:
14370 case 372:
14371 case 371:
14372 case 370:
14373 case 158:
14374 case 157:
14375 case 156:
14376 case 153:
14377 case 152:
14378 case 151:
14379 case 148:
14380 case 147:
14381 case 146:
14382 if (((ix86_cpu) == (CPU_PENTIUMPRO)))
14383 {
14384 return 3;
14385 }
14386 else
14387 {
14388 return 56 ;
14389 }
14390
14391 case 432:
14392 case 431:
14393 case 423:
14394 case 135:
14395 extract_constrain_insn_cached (insn);
14396 if ((which_alternative == 1) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14397 {
14398 return 1;
14399 }
14400 else
14401 {
14402 return 56 ;
14403 }
14404
14405 case 127:
14406 extract_constrain_insn_cached (insn);
14407 if (((which_alternative == 0) || (which_alternative == 1)) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14408 {
14409 return 1;
14410 }
14411 else
14412 {
14413 return 56 ;
14414 }
14415
14416 case 103:
14417 case 102:
14418 case 101:
14419 case 100:
14420 case 94:
14421 case 93:
14422 case 89:
14423 extract_constrain_insn_cached (insn);
14424 if (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14425 {
14426 return 1;
14427 }
14428 else
14429 {
14430 return 56 ;
14431 }
14432
14433 case 83:
14434 extract_constrain_insn_cached (insn);
14435 if ((((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative != 7) && ((which_alternative != 8) && ((which_alternative != 9) && ((which_alternative != 4) && (((flag_pic) != (0)) && (symbolic_operand (operands[1], DImode)))))))) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14436 {
14437 return 1;
14438 }
14439 else
14440 {
14441 return 56 ;
14442 }
14443
14444 case 44:
14445 extract_constrain_insn_cached (insn);
14446 if ((((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (((flag_pic) != (0)) && (symbolic_operand (operands[1], SImode))))))) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14447 {
14448 return 1;
14449 }
14450 else
14451 {
14452 return 56 ;
14453 }
14454
14455 case 178:
14456 case 177:
14457 case 176:
14458 case 175:
14459 case 174:
14460 case 173:
14461 case 171:
14462 case 170:
14463 case 168:
14464 case 167:
14465 case 165:
14466 case 164:
14467 case 162:
14468 case 161:
14469 case 144:
14470 case 142:
14471 case 140:
14472 case 138:
14473 case 134:
14474 case 133:
14475 case 35:
14476 case 32:
14477 extract_constrain_insn_cached (insn);
14478 if ((which_alternative == 0) && (((ix86_cpu) == (CPU_PENTIUMPRO))))
14479 {
14480 return 1;
14481 }
14482 else
14483 {
14484 return 56 ;
14485 }
14486
14487 case 605:
14488 case 529:
14489 case 520:
14490 case 519:
14491 case 518:
14492 case 517:
14493 case 516:
14494 case 515:
14495 case 504:
14496 case 503:
14497 case 498:
14498 case 497:
14499 case 496:
14500 case 495:
14501 case 494:
14502 case 493:
14503 case 492:
14504 case 491:
14505 case 490:
14506 case 489:
14507 case 488:
14508 case 487:
14509 case 486:
14510 case 485:
14511 case 484:
14512 case 483:
14513 case 482:
14514 case 481:
14515 case 480:
14516 case 479:
14517 case 478:
14518 case 477:
14519 case 476:
14520 case 475:
14521 case 474:
14522 case 473:
14523 case 472:
14524 case 471:
14525 case 470:
14526 case 469:
14527 case 468:
14528 case 467:
14529 case 466:
14530 case 465:
14531 case 464:
14532 case 463:
14533 case 462:
14534 case 461:
14535 case 460:
14536 case 459:
14537 case 458:
14538 case 457:
14539 case 454:
14540 case 453:
14541 case 452:
14542 case 451:
14543 case 450:
14544 case 449:
14545 case 448:
14546 case 447:
14547 case 446:
14548 case 445:
14549 case 444:
14550 case 443:
14551 case 442:
14552 case 441:
14553 case 440:
14554 case 439:
14555 case 438:
14556 case 437:
14557 case 436:
14558 case 435:
14559 case 434:
14560 case 433:
14561 case 430:
14562 case 427:
14563 case 426:
14564 case 425:
14565 case 424:
14566 case 412:
14567 case 195:
14568 case 194:
14569 case 193:
14570 case 192:
14571 case 191:
14572 case 190:
14573 case 189:
14574 case 188:
14575 case 187:
14576 case 186:
14577 case 145:
14578 case 143:
14579 case 141:
14580 case 139:
14581 case 136:
14582 case 132:
14583 case 131:
14584 case 130:
14585 case 129:
14586 case 34:
14587 case 31:
14588 case 27:
14589 case 24:
14590 case 23:
14591 case 21:
14592 case 20:
14593 case 19:
14594 if (((ix86_cpu) == (CPU_PENTIUMPRO)))
14595 {
14596 return 1;
14597 }
14598 else
14599 {
14600 return 56 ;
14601 }
14602
14603 case -1:
14604 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
14605 && asm_noperands (PATTERN (insn)) < 0)
14606 fatal_insn_not_found (insn);
14607 default:
14608 return 56 ;
14609
14610 }
14611 }
14612
14613 extern unsigned int ppro_p0_unit_blockage_range PARAMS ((rtx));
14614 unsigned int
14615 ppro_p0_unit_blockage_range (insn)
14616 rtx insn;
14617 {
14618 switch (recog_memoized (insn))
14619 {
14620 case -1:
14621 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
14622 && asm_noperands (PATTERN (insn)) < 0)
14623 fatal_insn_not_found (insn);
14624 default:
14625 return 65553 ;
14626
14627 }
14628 }
14629
14630 extern int function_units_used PARAMS ((rtx));
14631 int
14632 function_units_used (insn)
14633 rtx insn;
14634 {
14635 enum attr_athlon_fpunits attr_athlon_fpunits = get_attr_athlon_fpunits (insn);
14636 enum attr_athlon_decode attr_athlon_decode = get_attr_athlon_decode (insn);
14637 enum attr_memory attr_memory = get_attr_memory (insn);
14638 enum attr_mode attr_mode = get_attr_mode (insn);
14639 enum attr_type attr_type = get_attr_type (insn);
14640 unsigned long accum = 0;
14641
14642 accum |= (((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((((((((((attr_type == TYPE_ISHIFT) || ((attr_type == TYPE_ROTATE) || ((attr_type == TYPE_ISHIFT1) || ((attr_type == TYPE_ROTATE1) || ((attr_type == TYPE_LEA) || ((attr_type == TYPE_IBR) || (attr_type == TYPE_CLD))))))) || (attr_type == TYPE_IMUL)) || (attr_type == TYPE_IDIV)) || ((attr_type == TYPE_FOP) || ((attr_type == TYPE_FSGN) || (attr_type == TYPE_FISTP)))) || (attr_type == TYPE_FCMOV)) || (attr_type == TYPE_FCMP)) || (attr_type == TYPE_FMOV)) || (attr_type == TYPE_FMUL)) || ((attr_type == TYPE_FDIV) || (attr_type == TYPE_FPSPC)))) ? (1) : (0));
14643 accum |= ((((((ix86_cpu) == (CPU_PENTIUMPRO))) && (! ((attr_type == TYPE_IMOV) || (attr_type == TYPE_FMOV)))) || (((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((attr_type == TYPE_IMOV) || (attr_type == TYPE_FMOV))) && (attr_memory == MEMORY_NONE))) ? (2) : (0));
14644 accum |= (((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((attr_type == TYPE_POP) || ((attr_memory == MEMORY_LOAD) || (attr_memory == MEMORY_BOTH)))) ? (4) : (0));
14645 accum |= (((((ix86_cpu) == (CPU_PENTIUMPRO))) && ((attr_type == TYPE_PUSH) || ((attr_memory == MEMORY_STORE) || (attr_memory == MEMORY_BOTH)))) ? (8) : (0));
14646 accum |= (((((ix86_cpu) == (CPU_PENTIUMPRO))) && (((((attr_type == TYPE_FOP) || ((attr_type == TYPE_FSGN) || ((attr_type == TYPE_FMOV) || ((attr_type == TYPE_FCMP) || ((attr_type == TYPE_FCMOV) || (attr_type == TYPE_FISTP)))))) || (attr_type == TYPE_FMUL)) || ((attr_type == TYPE_FDIV) || (attr_type == TYPE_FPSPC))) || (attr_type == TYPE_IMUL))) ? (16) : (0));
14647 accum |= (((((ix86_cpu) == (CPU_K6))) && (((((attr_type == TYPE_ISHIFT) || ((attr_type == TYPE_ISHIFT1) || ((attr_type == TYPE_ROTATE) || ((attr_type == TYPE_ROTATE1) || ((attr_type == TYPE_ALU1) || ((attr_type == TYPE_NEGNOT) || (attr_type == TYPE_CLD))))))) || (((attr_type == TYPE_ALU) || ((attr_type == TYPE_ALU1) || ((attr_type == TYPE_NEGNOT) || ((attr_type == TYPE_ICMP) || ((attr_type == TYPE_TEST) || ((attr_type == TYPE_IMOVX) || (attr_type == TYPE_INCDEC))))))) && (general_operand (operands[0], QImode)))) || (attr_type == TYPE_IMUL)) || (attr_type == TYPE_IDIV))) ? (32) : (0));
14648 accum |= (((((ix86_cpu) == (CPU_K6))) && (((((attr_type == TYPE_ISHIFT) || ((attr_type == TYPE_ISHIFT1) || ((attr_type == TYPE_ROTATE) || ((attr_type == TYPE_ROTATE1) || ((attr_type == TYPE_ALU1) || ((attr_type == TYPE_NEGNOT) || ((attr_type == TYPE_ALU) || ((attr_type == TYPE_ICMP) || ((attr_type == TYPE_TEST) || ((attr_type == TYPE_IMOVX) || ((attr_type == TYPE_INCDEC) || ((attr_type == TYPE_SETCC) || (attr_type == TYPE_LEA))))))))))))) || ((attr_type == TYPE_IMOV) && (attr_memory == MEMORY_NONE))) || (attr_type == TYPE_IMUL)) || (attr_type == TYPE_IDIV))) ? (64) : (0));
14649 accum |= (((((ix86_cpu) == (CPU_K6))) && ((attr_type == TYPE_CALL) || ((attr_type == TYPE_CALLV) || (attr_type == TYPE_IBR)))) ? (128) : (0));
14650 accum |= (((((ix86_cpu) == (CPU_K6))) && (((attr_type == TYPE_POP) || ((attr_memory == MEMORY_LOAD) || (attr_memory == MEMORY_BOTH))) || ((attr_type == TYPE_STR) && ((attr_memory == MEMORY_LOAD) || (attr_memory == MEMORY_BOTH))))) ? (256) : (0));
14651 accum |= (((((ix86_cpu) == (CPU_K6))) && (((attr_type == TYPE_LEA) || (attr_type == TYPE_STR)) || ((attr_type == TYPE_PUSH) || ((attr_memory == MEMORY_STORE) || (attr_memory == MEMORY_BOTH))))) ? (512) : (0));
14652 accum |= (((((ix86_cpu) == (CPU_K6))) && ((((attr_type == TYPE_FOP) || ((attr_type == TYPE_FMOV) || ((attr_type == TYPE_FCMP) || (attr_type == TYPE_FISTP)))) || (attr_type == TYPE_FMUL)) || ((attr_type == TYPE_FDIV) || (attr_type == TYPE_FPSPC)))) ? (1024) : (0));
14653 accum |= (((((ix86_cpu) == (CPU_ATHLON))) && ((attr_athlon_decode == ATHLON_DECODE_VECTOR) || (attr_athlon_decode == ATHLON_DECODE_DIRECT))) ? (2048) : (0));
14654 accum |= (((((ix86_cpu) == (CPU_ATHLON))) && (attr_athlon_decode == ATHLON_DECODE_DIRECT)) ? (4096) : (0));
14655 accum |= (((((ix86_cpu) == (CPU_ATHLON))) && (((((attr_type == TYPE_ALU1) || ((attr_type == TYPE_NEGNOT) || ((attr_type == TYPE_ALU) || ((attr_type == TYPE_ICMP) || ((attr_type == TYPE_TEST) || ((attr_type == TYPE_IMOV) || ((attr_type == TYPE_IMOVX) || ((attr_type == TYPE_LEA) || ((attr_type == TYPE_INCDEC) || ((attr_type == TYPE_ISHIFT) || ((attr_type == TYPE_ISHIFT1) || ((attr_type == TYPE_ROTATE) || ((attr_type == TYPE_ROTATE1) || ((attr_type == TYPE_IBR) || ((attr_type == TYPE_CALL) || ((attr_type == TYPE_CALLV) || ((attr_type == TYPE_ICMOV) || ((attr_type == TYPE_CLD) || ((attr_type == TYPE_POP) || ((attr_type == TYPE_SETCC) || (attr_type == TYPE_PUSH))))))))))))))))))))) || (attr_type == TYPE_STR)) || (attr_type == TYPE_IMUL)) || (attr_type == TYPE_IDIV))) ? (8192) : (0));
14656 accum |= (((((ix86_cpu) == (CPU_ATHLON))) && ((attr_type == TYPE_IMUL) || (attr_type == TYPE_IDIV))) ? (16384) : (0));
14657 accum |= (((((ix86_cpu) == (CPU_ATHLON))) && ((((((((attr_type == TYPE_FPSPC) || (attr_type == TYPE_FDIV)) || ((attr_type == TYPE_FOP) || ((attr_type == TYPE_FMUL) || (attr_type == TYPE_FISTP)))) || ((attr_type == TYPE_FMOV) && ((attr_memory == MEMORY_LOAD) && (attr_mode == MODE_XF)))) || ((attr_type == TYPE_FMOV) || (attr_type == TYPE_FSGN))) || ((attr_type == TYPE_FCMP) && (attr_athlon_decode == ATHLON_DECODE_DIRECT))) || ((attr_type == TYPE_FCMP) && (attr_athlon_decode == ATHLON_DECODE_VECTOR))) || (attr_type == TYPE_FCMOV))) ? (32768) : (0));
14658 accum |= (((((ix86_cpu) == (CPU_ATHLON))) && (attr_athlon_fpunits == ATHLON_FPUNITS_MUL)) ? (65536) : (0));
14659 accum |= (((((ix86_cpu) == (CPU_ATHLON))) && (attr_athlon_fpunits == ATHLON_FPUNITS_ADD)) ? (131072) : (0));
14660 accum |= (((((ix86_cpu) == (CPU_ATHLON))) && ((attr_athlon_fpunits == ATHLON_FPUNITS_MULADD) || ((attr_athlon_fpunits == ATHLON_FPUNITS_MUL) || (attr_athlon_fpunits == ATHLON_FPUNITS_ADD)))) ? (262144) : (0));
14661 accum |= (((((ix86_cpu) == (CPU_ATHLON))) && ((attr_memory == MEMORY_LOAD) || (attr_memory == MEMORY_BOTH))) ? (1048576) : (0));
14662 accum |= (((((ix86_cpu) == (CPU_ATHLON))) && (attr_athlon_fpunits == ATHLON_FPUNITS_STORE)) ? (524288) : (0));
14663
14664 if (accum && accum == (accum & -accum))
14665 {
14666 int i;
14667 for (i = 0; accum >>= 1; ++i) continue;
14668 accum = i;
14669 }
14670 else
14671 accum = ~accum;
14672 return accum;
14673 }
14674
14675 extern enum attr_athlon_fpunits get_attr_athlon_fpunits PARAMS ((rtx));
14676 enum attr_athlon_fpunits
14677 get_attr_athlon_fpunits (insn)
14678 rtx insn;
14679 {
14680 switch (recog_memoized (insn))
14681 {
14682 case 643:
14683 case 642:
14684 case 641:
14685 extract_constrain_insn_cached (insn);
14686 if ((which_alternative == 0) || (which_alternative == 1))
14687 {
14688 return ATHLON_FPUNITS_MUL;
14689 }
14690 else
14691 {
14692 return ATHLON_FPUNITS_NONE;
14693 }
14694
14695 case 585:
14696 case 582:
14697 extract_constrain_insn_cached (insn);
14698 if (which_alternative == 0)
14699 {
14700 return ATHLON_FPUNITS_MUL;
14701 }
14702 else
14703 {
14704 return ATHLON_FPUNITS_NONE;
14705 }
14706
14707 case 581:
14708 case 579:
14709 case 577:
14710 case 575:
14711 case 573:
14712 case 571:
14713 case 569:
14714 extract_insn_cached (insn);
14715 if (get_attr_type (insn) == TYPE_FOP)
14716 {
14717 return ATHLON_FPUNITS_ADD;
14718 }
14719 else if ((mult_operator (operands[3], TFmode)) || (get_attr_type (insn) == TYPE_FDIV))
14720 {
14721 return ATHLON_FPUNITS_MUL;
14722 }
14723 else
14724 {
14725 return ATHLON_FPUNITS_NONE;
14726 }
14727
14728 case 580:
14729 case 578:
14730 case 576:
14731 case 574:
14732 case 572:
14733 case 570:
14734 case 568:
14735 extract_insn_cached (insn);
14736 if (get_attr_type (insn) == TYPE_FOP)
14737 {
14738 return ATHLON_FPUNITS_ADD;
14739 }
14740 else if ((mult_operator (operands[3], XFmode)) || (get_attr_type (insn) == TYPE_FDIV))
14741 {
14742 return ATHLON_FPUNITS_MUL;
14743 }
14744 else
14745 {
14746 return ATHLON_FPUNITS_NONE;
14747 }
14748
14749 case 562:
14750 extract_constrain_insn_cached (insn);
14751 if (get_attr_type (insn) == TYPE_FOP)
14752 {
14753 return ATHLON_FPUNITS_ADD;
14754 }
14755 else if (((which_alternative != 2) && (mult_operator (operands[3], DFmode))) || (get_attr_type (insn) == TYPE_FDIV))
14756 {
14757 return ATHLON_FPUNITS_MUL;
14758 }
14759 else
14760 {
14761 return ATHLON_FPUNITS_NONE;
14762 }
14763
14764 case 567:
14765 case 566:
14766 case 565:
14767 case 564:
14768 case 561:
14769 extract_insn_cached (insn);
14770 if (get_attr_type (insn) == TYPE_FOP)
14771 {
14772 return ATHLON_FPUNITS_ADD;
14773 }
14774 else if ((mult_operator (operands[3], DFmode)) || (get_attr_type (insn) == TYPE_FDIV))
14775 {
14776 return ATHLON_FPUNITS_MUL;
14777 }
14778 else
14779 {
14780 return ATHLON_FPUNITS_NONE;
14781 }
14782
14783 case 557:
14784 extract_constrain_insn_cached (insn);
14785 if (get_attr_type (insn) == TYPE_FOP)
14786 {
14787 return ATHLON_FPUNITS_ADD;
14788 }
14789 else if (((which_alternative != 2) && (mult_operator (operands[3], SFmode))) || (get_attr_type (insn) == TYPE_FDIV))
14790 {
14791 return ATHLON_FPUNITS_MUL;
14792 }
14793 else
14794 {
14795 return ATHLON_FPUNITS_NONE;
14796 }
14797
14798 case 560:
14799 case 559:
14800 case 556:
14801 extract_insn_cached (insn);
14802 if (get_attr_type (insn) == TYPE_FOP)
14803 {
14804 return ATHLON_FPUNITS_ADD;
14805 }
14806 else if ((mult_operator (operands[3], SFmode)) || (get_attr_type (insn) == TYPE_FDIV))
14807 {
14808 return ATHLON_FPUNITS_MUL;
14809 }
14810 else
14811 {
14812 return ATHLON_FPUNITS_NONE;
14813 }
14814
14815 case 555:
14816 extract_insn_cached (insn);
14817 if (! (mult_operator (operands[3], TFmode)))
14818 {
14819 return ATHLON_FPUNITS_ADD;
14820 }
14821 else
14822 {
14823 return ATHLON_FPUNITS_MUL;
14824 }
14825
14826 case 554:
14827 extract_insn_cached (insn);
14828 if (! (mult_operator (operands[3], XFmode)))
14829 {
14830 return ATHLON_FPUNITS_ADD;
14831 }
14832 else
14833 {
14834 return ATHLON_FPUNITS_MUL;
14835 }
14836
14837 case 552:
14838 case 549:
14839 extract_constrain_insn_cached (insn);
14840 if ((which_alternative == 0) && (! (mult_operator (operands[3], SFmode))))
14841 {
14842 return ATHLON_FPUNITS_ADD;
14843 }
14844 else if ((which_alternative == 0) && (mult_operator (operands[3], SFmode)))
14845 {
14846 return ATHLON_FPUNITS_MUL;
14847 }
14848 else
14849 {
14850 return ATHLON_FPUNITS_NONE;
14851 }
14852
14853 case 551:
14854 case 548:
14855 extract_insn_cached (insn);
14856 if (! (mult_operator (operands[3], SFmode)))
14857 {
14858 return ATHLON_FPUNITS_ADD;
14859 }
14860 else
14861 {
14862 return ATHLON_FPUNITS_MUL;
14863 }
14864
14865 case 135:
14866 extract_constrain_insn_cached (insn);
14867 if ((which_alternative == 1) && ((get_attr_memory (insn) == MEMORY_STORE) || (get_attr_memory (insn) == MEMORY_BOTH)))
14868 {
14869 return ATHLON_FPUNITS_STORE;
14870 }
14871 else if ((which_alternative == 1) && (get_attr_memory (insn) == MEMORY_LOAD))
14872 {
14873 return ATHLON_FPUNITS_ANY;
14874 }
14875 else if ((which_alternative == 1) && ((register_operand (operands[1], SImode)) || (immediate_operand (operands[1], VOIDmode))))
14876 {
14877 return ATHLON_FPUNITS_STORE;
14878 }
14879 else if (which_alternative != 0)
14880 {
14881 return ATHLON_FPUNITS_MULADD;
14882 }
14883 else
14884 {
14885 return ATHLON_FPUNITS_NONE;
14886 }
14887
14888 case 178:
14889 case 177:
14890 case 176:
14891 case 175:
14892 case 174:
14893 case 173:
14894 case 171:
14895 case 170:
14896 case 168:
14897 case 167:
14898 case 165:
14899 case 164:
14900 case 162:
14901 case 161:
14902 case 144:
14903 case 142:
14904 case 140:
14905 case 138:
14906 case 134:
14907 case 133:
14908 extract_constrain_insn_cached (insn);
14909 if ((which_alternative == 0) && ((get_attr_memory (insn) == MEMORY_STORE) || (get_attr_memory (insn) == MEMORY_BOTH)))
14910 {
14911 return ATHLON_FPUNITS_STORE;
14912 }
14913 else if ((which_alternative == 0) && (get_attr_memory (insn) == MEMORY_LOAD))
14914 {
14915 return ATHLON_FPUNITS_ANY;
14916 }
14917 else if ((which_alternative == 0) && ((register_operand (operands[1], SImode)) || (immediate_operand (operands[1], VOIDmode))))
14918 {
14919 return ATHLON_FPUNITS_STORE;
14920 }
14921 else if (which_alternative == 0)
14922 {
14923 return ATHLON_FPUNITS_MULADD;
14924 }
14925 else
14926 {
14927 return ATHLON_FPUNITS_NONE;
14928 }
14929
14930 case 145:
14931 case 143:
14932 case 141:
14933 case 139:
14934 case 136:
14935 case 132:
14936 case 131:
14937 case 130:
14938 case 129:
14939 extract_insn_cached (insn);
14940 if ((get_attr_memory (insn) == MEMORY_STORE) || (get_attr_memory (insn) == MEMORY_BOTH))
14941 {
14942 return ATHLON_FPUNITS_STORE;
14943 }
14944 else if (get_attr_memory (insn) == MEMORY_LOAD)
14945 {
14946 return ATHLON_FPUNITS_ANY;
14947 }
14948 else if ((register_operand (operands[1], SImode)) || (immediate_operand (operands[1], VOIDmode)))
14949 {
14950 return ATHLON_FPUNITS_STORE;
14951 }
14952 else
14953 {
14954 return ATHLON_FPUNITS_MULADD;
14955 }
14956
14957 case 127:
14958 extract_constrain_insn_cached (insn);
14959 if (((which_alternative == 0) || (which_alternative == 1)) && ((get_attr_memory (insn) == MEMORY_STORE) || (get_attr_memory (insn) == MEMORY_BOTH)))
14960 {
14961 return ATHLON_FPUNITS_STORE;
14962 }
14963 else if (((which_alternative == 0) || (which_alternative == 1)) && (get_attr_memory (insn) == MEMORY_LOAD))
14964 {
14965 return ATHLON_FPUNITS_ANY;
14966 }
14967 else if (((which_alternative == 0) || (which_alternative == 1)) && ((register_operand (operands[1], SImode)) || (immediate_operand (operands[1], VOIDmode))))
14968 {
14969 return ATHLON_FPUNITS_STORE;
14970 }
14971 else if ((which_alternative == 0) || (which_alternative == 1))
14972 {
14973 return ATHLON_FPUNITS_MULADD;
14974 }
14975 else
14976 {
14977 return ATHLON_FPUNITS_NONE;
14978 }
14979
14980 case 103:
14981 case 102:
14982 case 101:
14983 case 100:
14984 case 94:
14985 case 93:
14986 case 89:
14987 extract_constrain_insn_cached (insn);
14988 if (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && ((get_attr_memory (insn) == MEMORY_STORE) || (get_attr_memory (insn) == MEMORY_BOTH)))
14989 {
14990 return ATHLON_FPUNITS_STORE;
14991 }
14992 else if (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && (get_attr_memory (insn) == MEMORY_LOAD))
14993 {
14994 return ATHLON_FPUNITS_ANY;
14995 }
14996 else if (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && ((register_operand (operands[1], SImode)) || (immediate_operand (operands[1], VOIDmode))))
14997 {
14998 return ATHLON_FPUNITS_STORE;
14999 }
15000 else if ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))
15001 {
15002 return ATHLON_FPUNITS_MULADD;
15003 }
15004 else
15005 {
15006 return ATHLON_FPUNITS_NONE;
15007 }
15008
15009 case 35:
15010 case 32:
15011 extract_constrain_insn_cached (insn);
15012 if (which_alternative == 0)
15013 {
15014 return ATHLON_FPUNITS_ADD;
15015 }
15016 else
15017 {
15018 return ATHLON_FPUNITS_NONE;
15019 }
15020
15021 case 158:
15022 case 157:
15023 case 156:
15024 case 153:
15025 case 152:
15026 case 151:
15027 case 148:
15028 case 147:
15029 case 146:
15030 case 34:
15031 case 31:
15032 case 27:
15033 case 24:
15034 case 23:
15035 case 21:
15036 case 20:
15037 case 19:
15038 return ATHLON_FPUNITS_ADD;
15039
15040 case 645:
15041 case 644:
15042 case 604:
15043 case 603:
15044 case 602:
15045 case 601:
15046 case 600:
15047 case 599:
15048 case 598:
15049 case 597:
15050 case 596:
15051 case 595:
15052 case 594:
15053 case 593:
15054 case 592:
15055 case 591:
15056 case 590:
15057 case 589:
15058 case 588:
15059 case 587:
15060 case 584:
15061 case 397:
15062 case 396:
15063 case 395:
15064 case 394:
15065 case 393:
15066 case 392:
15067 case 391:
15068 case 390:
15069 case 389:
15070 case 378:
15071 case 377:
15072 case 376:
15073 case 375:
15074 case 374:
15075 case 373:
15076 case 372:
15077 case 371:
15078 case 370:
15079 return ATHLON_FPUNITS_MUL;
15080
15081 case -1:
15082 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
15083 && asm_noperands (PATTERN (insn)) < 0)
15084 fatal_insn_not_found (insn);
15085 default:
15086 return ATHLON_FPUNITS_NONE;
15087
15088 }
15089 }
15090
15091 extern enum attr_athlon_decode get_attr_athlon_decode PARAMS ((rtx));
15092 enum attr_athlon_decode
15093 get_attr_athlon_decode (insn)
15094 rtx insn;
15095 {
15096 switch (recog_memoized (insn))
15097 {
15098 case 585:
15099 case 582:
15100 extract_constrain_insn_cached (insn);
15101 if (which_alternative == 0)
15102 {
15103 return ATHLON_DECODE_DIRECT;
15104 }
15105 else
15106 {
15107 return ATHLON_DECODE_DIRECT;
15108 }
15109
15110 case 178:
15111 case 177:
15112 case 176:
15113 case 175:
15114 case 174:
15115 case 173:
15116 extract_constrain_insn_cached (insn);
15117 if ((which_alternative != 0) || ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_STORE)))
15118 {
15119 return ATHLON_DECODE_VECTOR;
15120 }
15121 else
15122 {
15123 return ATHLON_DECODE_DIRECT;
15124 }
15125
15126 case 171:
15127 case 168:
15128 case 165:
15129 case 162:
15130 extract_constrain_insn_cached (insn);
15131 if (which_alternative == 1)
15132 {
15133 return ATHLON_DECODE_VECTOR;
15134 }
15135 else
15136 {
15137 return ATHLON_DECODE_DIRECT;
15138 }
15139
15140 case 134:
15141 extract_constrain_insn_cached (insn);
15142 if ((which_alternative == 1) || ((which_alternative == 2) || (which_alternative == 3)))
15143 {
15144 return ATHLON_DECODE_VECTOR;
15145 }
15146 else
15147 {
15148 return ATHLON_DECODE_DIRECT;
15149 }
15150
15151 case 170:
15152 case 167:
15153 case 164:
15154 case 161:
15155 case 144:
15156 case 142:
15157 case 140:
15158 case 138:
15159 case 133:
15160 extract_constrain_insn_cached (insn);
15161 if (which_alternative != 0)
15162 {
15163 return ATHLON_DECODE_VECTOR;
15164 }
15165 else
15166 {
15167 return ATHLON_DECODE_DIRECT;
15168 }
15169
15170 case 132:
15171 case 131:
15172 case 130:
15173 case 129:
15174 extract_constrain_insn_cached (insn);
15175 if ((which_alternative == 1) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_STORE)))
15176 {
15177 return ATHLON_DECODE_VECTOR;
15178 }
15179 else
15180 {
15181 return ATHLON_DECODE_DIRECT;
15182 }
15183
15184 case 127:
15185 extract_constrain_insn_cached (insn);
15186 if (((which_alternative == 0) || (which_alternative == 1)) && (((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_STORE)) && (which_alternative == 1)))
15187 {
15188 return ATHLON_DECODE_VECTOR;
15189 }
15190 else
15191 {
15192 return ATHLON_DECODE_DIRECT;
15193 }
15194
15195 case 103:
15196 case 102:
15197 case 101:
15198 case 100:
15199 extract_constrain_insn_cached (insn);
15200 if ((which_alternative == 3) || ((which_alternative == 4) || (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_STORE)))))
15201 {
15202 return ATHLON_DECODE_VECTOR;
15203 }
15204 else
15205 {
15206 return ATHLON_DECODE_DIRECT;
15207 }
15208
15209 case 94:
15210 case 93:
15211 extract_constrain_insn_cached (insn);
15212 if (((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 3) || (which_alternative == 4)))
15213 {
15214 return ATHLON_DECODE_VECTOR;
15215 }
15216 else
15217 {
15218 return ATHLON_DECODE_DIRECT;
15219 }
15220
15221 case 88:
15222 case 87:
15223 extract_constrain_insn_cached (insn);
15224 if ((which_alternative != 1) || (memory_operand (operands[1], VOIDmode)))
15225 {
15226 return ATHLON_DECODE_VECTOR;
15227 }
15228 else
15229 {
15230 return ATHLON_DECODE_DIRECT;
15231 }
15232
15233 case 83:
15234 extract_constrain_insn_cached (insn);
15235 if (which_alternative == 4)
15236 {
15237 return ATHLON_DECODE_VECTOR;
15238 }
15239 else
15240 {
15241 return ATHLON_DECODE_DIRECT;
15242 }
15243
15244 case 714:
15245 case 643:
15246 case 641:
15247 case 82:
15248 extract_constrain_insn_cached (insn);
15249 if ((which_alternative == 0) || (which_alternative == 1))
15250 {
15251 return ATHLON_DECODE_VECTOR;
15252 }
15253 else
15254 {
15255 return ATHLON_DECODE_DIRECT;
15256 }
15257
15258 case 76:
15259 extract_constrain_insn_cached (insn);
15260 if ((which_alternative != 0) || (memory_operand (operands[1], VOIDmode)))
15261 {
15262 return ATHLON_DECODE_VECTOR;
15263 }
15264 else
15265 {
15266 return ATHLON_DECODE_DIRECT;
15267 }
15268
15269 case 77:
15270 case 58:
15271 case 57:
15272 case 49:
15273 case 48:
15274 case 39:
15275 case 38:
15276 case 37:
15277 extract_insn_cached (insn);
15278 if (memory_operand (operands[1], VOIDmode))
15279 {
15280 return ATHLON_DECODE_VECTOR;
15281 }
15282 else
15283 {
15284 return ATHLON_DECODE_DIRECT;
15285 }
15286
15287 case 926:
15288 extract_constrain_insn_cached (insn);
15289 if (which_alternative == 0)
15290 {
15291 return ATHLON_DECODE_VECTOR;
15292 }
15293 else
15294 {
15295 return ATHLON_DECODE_DIRECT;
15296 }
15297
15298 case -1:
15299 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
15300 && asm_noperands (PATTERN (insn)) < 0)
15301 fatal_insn_not_found (insn);
15302 case 1024:
15303 case 1023:
15304 case 854:
15305 case 708:
15306 case 707:
15307 case 706:
15308 case 705:
15309 case 704:
15310 case 703:
15311 case 702:
15312 case 701:
15313 case 700:
15314 case 699:
15315 case 698:
15316 case 697:
15317 case 696:
15318 case 695:
15319 case 694:
15320 case 693:
15321 case 692:
15322 case 681:
15323 case 680:
15324 case 673:
15325 case 672:
15326 case 671:
15327 case 670:
15328 case 669:
15329 case 668:
15330 case 667:
15331 case 666:
15332 case 665:
15333 case 664:
15334 case 663:
15335 case 662:
15336 case 661:
15337 case 660:
15338 case 656:
15339 case 655:
15340 case 653:
15341 case 652:
15342 case 650:
15343 case 649:
15344 case 647:
15345 case 646:
15346 case 645:
15347 case 644:
15348 case 642:
15349 case 635:
15350 case 634:
15351 case 633:
15352 case 632:
15353 case 631:
15354 case 630:
15355 case 629:
15356 case 628:
15357 case 627:
15358 case 626:
15359 case 625:
15360 case 624:
15361 case 623:
15362 case 622:
15363 case 621:
15364 case 620:
15365 case 619:
15366 case 618:
15367 case 617:
15368 case 616:
15369 case 615:
15370 case 614:
15371 case 613:
15372 case 612:
15373 case 611:
15374 case 610:
15375 case 609:
15376 case 608:
15377 case 607:
15378 case 606:
15379 case 605:
15380 case 604:
15381 case 603:
15382 case 602:
15383 case 601:
15384 case 600:
15385 case 599:
15386 case 598:
15387 case 597:
15388 case 596:
15389 case 595:
15390 case 543:
15391 case 542:
15392 case 541:
15393 case 540:
15394 case 539:
15395 case 538:
15396 case 537:
15397 case 536:
15398 case 533:
15399 case 532:
15400 case 531:
15401 case 530:
15402 case 528:
15403 case 527:
15404 case 526:
15405 case 525:
15406 case 524:
15407 case 523:
15408 case 522:
15409 case 521:
15410 case 514:
15411 case 513:
15412 case 512:
15413 case 511:
15414 case 510:
15415 case 509:
15416 case 508:
15417 case 507:
15418 case 506:
15419 case 505:
15420 case 456:
15421 case 455:
15422 case 429:
15423 case 428:
15424 case 411:
15425 case 410:
15426 case 388:
15427 case 387:
15428 case 386:
15429 case 385:
15430 case 384:
15431 case 383:
15432 case 382:
15433 case 381:
15434 case 380:
15435 case 379:
15436 case 369:
15437 case 368:
15438 case 367:
15439 case 366:
15440 case 365:
15441 case 364:
15442 case 363:
15443 case 362:
15444 case 361:
15445 case 360:
15446 case 349:
15447 case 285:
15448 case 284:
15449 case 275:
15450 case 274:
15451 case 273:
15452 case 272:
15453 case 271:
15454 case 270:
15455 case 269:
15456 case 268:
15457 case 267:
15458 case 266:
15459 case 265:
15460 case 264:
15461 case 263:
15462 case 262:
15463 case 261:
15464 case 260:
15465 case 259:
15466 case 258:
15467 case 257:
15468 case 256:
15469 case 255:
15470 case 254:
15471 case 253:
15472 case 252:
15473 case 251:
15474 case 250:
15475 case 249:
15476 case 248:
15477 case 247:
15478 case 246:
15479 case 245:
15480 case 225:
15481 case 179:
15482 case 159:
15483 case 118:
15484 case 114:
15485 case 99:
15486 case 98:
15487 case 97:
15488 case 96:
15489 case 92:
15490 case 91:
15491 case 79:
15492 case 78:
15493 case 75:
15494 case 41:
15495 case 40:
15496 case 29:
15497 case 28:
15498 case 26:
15499 case 25:
15500 case 22:
15501 case 18:
15502 case 30:
15503 case 31:
15504 case 32:
15505 case 33:
15506 case 34:
15507 case 35:
15508 case 36:
15509 case 47:
15510 case 86:
15511 case 160:
15512 case 412:
15513 case 534:
15514 case 535:
15515 case 787:
15516 case 789:
15517 case 791:
15518 case 924:
15519 return ATHLON_DECODE_VECTOR;
15520
15521 default:
15522 return ATHLON_DECODE_DIRECT;
15523
15524 }
15525 }
15526
15527 extern enum attr_fp_int_src get_attr_fp_int_src PARAMS ((rtx));
15528 enum attr_fp_int_src
15529 get_attr_fp_int_src (insn)
15530 rtx insn;
15531 {
15532 switch (recog_memoized (insn))
15533 {
15534 case 161:
15535 case 162:
15536 case 163:
15537 case 164:
15538 case 165:
15539 case 166:
15540 case 167:
15541 case 168:
15542 case 169:
15543 case 170:
15544 case 171:
15545 case 172:
15546 case 173:
15547 case 174:
15548 case 175:
15549 case 176:
15550 case 177:
15551 case 178:
15552 case 559:
15553 case 560:
15554 case 564:
15555 case 565:
15556 case 570:
15557 case 571:
15558 case 572:
15559 case 573:
15560 return FP_INT_SRC_TRUE;
15561
15562 case -1:
15563 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
15564 && asm_noperands (PATTERN (insn)) < 0)
15565 fatal_insn_not_found (insn);
15566 default:
15567 return FP_INT_SRC_FALSE;
15568
15569 }
15570 }
15571
15572 extern enum attr_imm_disp get_attr_imm_disp PARAMS ((rtx));
15573 enum attr_imm_disp
15574 get_attr_imm_disp (insn)
15575 rtx insn;
15576 {
15577 switch (recog_memoized (insn))
15578 {
15579 case 659:
15580 extract_constrain_insn_cached (insn);
15581 if ((((which_alternative == 1) && (const0_operand (operands[2], DImode))) && ((memory_displacement_operand (operands[0], VOIDmode)) && (immediate_operand (operands[1], VOIDmode)))) || ((which_alternative == 0) && ((memory_displacement_operand (operands[0], VOIDmode)) && (immediate_operand (operands[2], VOIDmode)))))
15582 {
15583 return IMM_DISP_TRUE;
15584 }
15585 else
15586 {
15587 return IMM_DISP_FALSE;
15588 }
15589
15590 case 658:
15591 extract_constrain_insn_cached (insn);
15592 if ((((which_alternative == 1) && (const0_operand (operands[2], SImode))) && ((memory_displacement_operand (operands[0], VOIDmode)) && (immediate_operand (operands[1], VOIDmode)))) || ((which_alternative == 0) && ((memory_displacement_operand (operands[0], VOIDmode)) && (immediate_operand (operands[2], VOIDmode)))))
15593 {
15594 return IMM_DISP_TRUE;
15595 }
15596 else
15597 {
15598 return IMM_DISP_FALSE;
15599 }
15600
15601 case 642:
15602 extract_constrain_insn_cached (insn);
15603 if ((which_alternative == 2) || (which_alternative == 3))
15604 {
15605 return IMM_DISP_UNKNOWN;
15606 }
15607 else
15608 {
15609 return IMM_DISP_FALSE;
15610 }
15611
15612 case 432:
15613 case 431:
15614 case 423:
15615 extract_constrain_insn_cached (insn);
15616 if ((which_alternative == 1) && ((memory_displacement_operand (operands[0], VOIDmode)) && (immediate_operand (operands[2], VOIDmode))))
15617 {
15618 return IMM_DISP_TRUE;
15619 }
15620 else
15621 {
15622 return IMM_DISP_FALSE;
15623 }
15624
15625 case 416:
15626 extract_constrain_insn_cached (insn);
15627 if (((((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode))) || ((! ((TARGET_DOUBLE_WITH_ADD) != (0))) || (! (const1_operand (operands[2], VOIDmode))))) && ((memory_displacement_operand (operands[0], VOIDmode)) && (immediate_operand (operands[2], VOIDmode))))
15628 {
15629 return IMM_DISP_TRUE;
15630 }
15631 else
15632 {
15633 return IMM_DISP_FALSE;
15634 }
15635
15636 case 414:
15637 extract_constrain_insn_cached (insn);
15638 if (((which_alternative == 0) && ((((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode))) || ((! ((TARGET_DOUBLE_WITH_ADD) != (0))) || (! (const1_operand (operands[2], VOIDmode)))))) && ((memory_displacement_operand (operands[0], VOIDmode)) && (immediate_operand (operands[2], VOIDmode))))
15639 {
15640 return IMM_DISP_TRUE;
15641 }
15642 else
15643 {
15644 return IMM_DISP_FALSE;
15645 }
15646
15647 case 422:
15648 case 421:
15649 case 420:
15650 case 419:
15651 case 418:
15652 case 417:
15653 case 415:
15654 case 413:
15655 case 409:
15656 case 408:
15657 extract_insn_cached (insn);
15658 if (((get_attr_type (insn) == TYPE_ALU) || (get_attr_type (insn) == TYPE_ISHIFT)) && ((memory_displacement_operand (operands[0], VOIDmode)) && (immediate_operand (operands[2], VOIDmode))))
15659 {
15660 return IMM_DISP_TRUE;
15661 }
15662 else
15663 {
15664 return IMM_DISP_FALSE;
15665 }
15666
15667 case 292:
15668 case 288:
15669 extract_constrain_insn_cached (insn);
15670 if (((which_alternative == 0) || (which_alternative == 1)) && ((memory_displacement_operand (operands[0], VOIDmode)) && (immediate_operand (operands[2], VOIDmode))))
15671 {
15672 return IMM_DISP_TRUE;
15673 }
15674 else
15675 {
15676 return IMM_DISP_FALSE;
15677 }
15678
15679 case 286:
15680 extract_constrain_insn_cached (insn);
15681 if (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && ((memory_displacement_operand (operands[0], VOIDmode)) && (immediate_operand (operands[2], VOIDmode))))
15682 {
15683 return IMM_DISP_TRUE;
15684 }
15685 else
15686 {
15687 return IMM_DISP_FALSE;
15688 }
15689
15690 case 217:
15691 extract_insn_cached (insn);
15692 if ((! (incdec_operand (operands[2], QImode))) && ((memory_displacement_operand (operands[0], VOIDmode)) && (immediate_operand (operands[1], VOIDmode))))
15693 {
15694 return IMM_DISP_TRUE;
15695 }
15696 else
15697 {
15698 return IMM_DISP_FALSE;
15699 }
15700
15701 case 223:
15702 case 222:
15703 case 221:
15704 case 219:
15705 case 218:
15706 case 216:
15707 extract_insn_cached (insn);
15708 if ((! (incdec_operand (operands[2], QImode))) && ((memory_displacement_operand (operands[0], VOIDmode)) && (immediate_operand (operands[2], VOIDmode))))
15709 {
15710 return IMM_DISP_TRUE;
15711 }
15712 else
15713 {
15714 return IMM_DISP_FALSE;
15715 }
15716
15717 case 215:
15718 extract_constrain_insn_cached (insn);
15719 if (((which_alternative != 3) && (! (incdec_operand (operands[2], QImode)))) && ((memory_displacement_operand (operands[0], VOIDmode)) && (immediate_operand (operands[2], VOIDmode))))
15720 {
15721 return IMM_DISP_TRUE;
15722 }
15723 else
15724 {
15725 return IMM_DISP_FALSE;
15726 }
15727
15728 case 220:
15729 case 214:
15730 case 213:
15731 case 212:
15732 case 211:
15733 case 210:
15734 extract_insn_cached (insn);
15735 if ((! (incdec_operand (operands[2], HImode))) && ((memory_displacement_operand (operands[0], VOIDmode)) && (immediate_operand (operands[2], VOIDmode))))
15736 {
15737 return IMM_DISP_TRUE;
15738 }
15739 else
15740 {
15741 return IMM_DISP_FALSE;
15742 }
15743
15744 case 209:
15745 extract_constrain_insn_cached (insn);
15746 if (((which_alternative != 2) && (! (incdec_operand (operands[2], HImode)))) && ((memory_displacement_operand (operands[0], VOIDmode)) && (immediate_operand (operands[2], VOIDmode))))
15747 {
15748 return IMM_DISP_TRUE;
15749 }
15750 else
15751 {
15752 return IMM_DISP_FALSE;
15753 }
15754
15755 case 208:
15756 case 207:
15757 case 206:
15758 case 205:
15759 case 204:
15760 case 203:
15761 extract_insn_cached (insn);
15762 if ((! (incdec_operand (operands[2], SImode))) && ((memory_displacement_operand (operands[0], VOIDmode)) && (immediate_operand (operands[2], VOIDmode))))
15763 {
15764 return IMM_DISP_TRUE;
15765 }
15766 else
15767 {
15768 return IMM_DISP_FALSE;
15769 }
15770
15771 case 200:
15772 case 199:
15773 case 198:
15774 case 197:
15775 extract_insn_cached (insn);
15776 if ((! (incdec_operand (operands[2], DImode))) && ((memory_displacement_operand (operands[0], VOIDmode)) && (immediate_operand (operands[2], VOIDmode))))
15777 {
15778 return IMM_DISP_TRUE;
15779 }
15780 else
15781 {
15782 return IMM_DISP_FALSE;
15783 }
15784
15785 case 202:
15786 case 201:
15787 case 196:
15788 extract_insn_cached (insn);
15789 if ((get_attr_type (insn) == TYPE_ALU) && ((memory_displacement_operand (operands[0], VOIDmode)) && (immediate_operand (operands[2], VOIDmode))))
15790 {
15791 return IMM_DISP_TRUE;
15792 }
15793 else
15794 {
15795 return IMM_DISP_FALSE;
15796 }
15797
15798 case 497:
15799 case 495:
15800 case 494:
15801 case 493:
15802 case 492:
15803 case 491:
15804 case 490:
15805 case 489:
15806 case 488:
15807 case 487:
15808 case 486:
15809 case 484:
15810 case 482:
15811 case 481:
15812 case 480:
15813 case 479:
15814 case 478:
15815 case 477:
15816 case 476:
15817 case 475:
15818 case 474:
15819 case 473:
15820 case 471:
15821 case 469:
15822 case 468:
15823 case 467:
15824 case 466:
15825 case 465:
15826 case 464:
15827 case 463:
15828 case 462:
15829 case 461:
15830 case 460:
15831 case 459:
15832 case 458:
15833 case 457:
15834 case 454:
15835 case 453:
15836 case 452:
15837 case 451:
15838 case 450:
15839 case 449:
15840 case 447:
15841 case 445:
15842 case 444:
15843 case 443:
15844 case 442:
15845 case 441:
15846 case 440:
15847 case 439:
15848 case 438:
15849 case 437:
15850 case 436:
15851 case 435:
15852 case 434:
15853 case 433:
15854 case 430:
15855 case 427:
15856 case 426:
15857 case 425:
15858 case 424:
15859 case 412:
15860 case 348:
15861 case 347:
15862 case 346:
15863 case 344:
15864 case 343:
15865 case 342:
15866 case 341:
15867 case 340:
15868 case 338:
15869 case 337:
15870 case 336:
15871 case 335:
15872 case 334:
15873 case 333:
15874 case 332:
15875 case 331:
15876 case 330:
15877 case 329:
15878 case 328:
15879 case 327:
15880 case 326:
15881 case 325:
15882 case 324:
15883 case 323:
15884 case 322:
15885 case 321:
15886 case 320:
15887 case 318:
15888 case 316:
15889 case 315:
15890 case 314:
15891 case 313:
15892 case 312:
15893 case 311:
15894 case 310:
15895 case 309:
15896 case 308:
15897 case 307:
15898 case 306:
15899 case 305:
15900 case 304:
15901 case 303:
15902 case 302:
15903 case 301:
15904 case 300:
15905 case 299:
15906 case 298:
15907 case 296:
15908 case 294:
15909 case 293:
15910 case 291:
15911 case 290:
15912 case 289:
15913 case 287:
15914 case 275:
15915 case 274:
15916 case 272:
15917 case 269:
15918 case 266:
15919 case 263:
15920 case 262:
15921 case 261:
15922 case 260:
15923 case 259:
15924 case 258:
15925 case 257:
15926 case 256:
15927 case 255:
15928 case 254:
15929 case 253:
15930 case 252:
15931 case 251:
15932 case 250:
15933 case 249:
15934 case 248:
15935 case 247:
15936 case 246:
15937 case 245:
15938 case 244:
15939 case 243:
15940 case 241:
15941 case 240:
15942 case 239:
15943 case 238:
15944 case 237:
15945 case 236:
15946 case 235:
15947 case 234:
15948 case 233:
15949 case 232:
15950 case 231:
15951 case 230:
15952 case 229:
15953 case 228:
15954 case 227:
15955 case 226:
15956 case 224:
15957 case 185:
15958 case 184:
15959 case 183:
15960 case 182:
15961 case 181:
15962 case 180:
15963 extract_insn_cached (insn);
15964 if ((memory_displacement_operand (operands[0], VOIDmode)) && (immediate_operand (operands[2], VOIDmode)))
15965 {
15966 return IMM_DISP_TRUE;
15967 }
15968 else
15969 {
15970 return IMM_DISP_FALSE;
15971 }
15972
15973 case 171:
15974 case 168:
15975 case 165:
15976 case 162:
15977 extract_constrain_insn_cached (insn);
15978 if (which_alternative == 1)
15979 {
15980 return IMM_DISP_UNKNOWN;
15981 }
15982 else
15983 {
15984 return IMM_DISP_FALSE;
15985 }
15986
15987 case 134:
15988 extract_constrain_insn_cached (insn);
15989 if ((which_alternative == 1) || ((which_alternative == 2) || (which_alternative == 3)))
15990 {
15991 return IMM_DISP_UNKNOWN;
15992 }
15993 else
15994 {
15995 return IMM_DISP_FALSE;
15996 }
15997
15998 case 115:
15999 case 112:
16000 case 109:
16001 extract_constrain_insn_cached (insn);
16002 if ((which_alternative == 1) && ((memory_displacement_operand (operands[0], VOIDmode)) && (immediate_operand (operands[1], VOIDmode))))
16003 {
16004 return IMM_DISP_TRUE;
16005 }
16006 else
16007 {
16008 return IMM_DISP_FALSE;
16009 }
16010
16011 case 103:
16012 case 102:
16013 case 101:
16014 case 100:
16015 extract_constrain_insn_cached (insn);
16016 if ((which_alternative == 3) || (which_alternative == 4))
16017 {
16018 return IMM_DISP_UNKNOWN;
16019 }
16020 else
16021 {
16022 return IMM_DISP_FALSE;
16023 }
16024
16025 case 94:
16026 case 93:
16027 extract_constrain_insn_cached (insn);
16028 if (((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 3) || (which_alternative == 4)))
16029 {
16030 return IMM_DISP_UNKNOWN;
16031 }
16032 else
16033 {
16034 return IMM_DISP_FALSE;
16035 }
16036
16037 case 89:
16038 extract_constrain_insn_cached (insn);
16039 if ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 3) || (which_alternative == 4))) && ((memory_displacement_operand (operands[0], VOIDmode)) && (immediate_operand (operands[1], VOIDmode))))
16040 {
16041 return IMM_DISP_TRUE;
16042 }
16043 else
16044 {
16045 return IMM_DISP_FALSE;
16046 }
16047
16048 case 88:
16049 case 87:
16050 extract_constrain_insn_cached (insn);
16051 if (which_alternative != 1)
16052 {
16053 return IMM_DISP_UNKNOWN;
16054 }
16055 else
16056 {
16057 return IMM_DISP_FALSE;
16058 }
16059
16060 case 83:
16061 extract_constrain_insn_cached (insn);
16062 if (which_alternative == 4)
16063 {
16064 return IMM_DISP_UNKNOWN;
16065 }
16066 else if ((((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative != 7) && ((which_alternative != 8) && ((which_alternative != 9) && ((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], DImode)))))))) && ((memory_displacement_operand (operands[0], VOIDmode)) && (immediate_operand (operands[1], VOIDmode))))
16067 {
16068 return IMM_DISP_TRUE;
16069 }
16070 else
16071 {
16072 return IMM_DISP_FALSE;
16073 }
16074
16075 case 714:
16076 case 82:
16077 extract_constrain_insn_cached (insn);
16078 if ((which_alternative == 0) || (which_alternative == 1))
16079 {
16080 return IMM_DISP_UNKNOWN;
16081 }
16082 else
16083 {
16084 return IMM_DISP_FALSE;
16085 }
16086
16087 case 178:
16088 case 177:
16089 case 176:
16090 case 175:
16091 case 174:
16092 case 173:
16093 case 170:
16094 case 167:
16095 case 164:
16096 case 161:
16097 case 144:
16098 case 142:
16099 case 140:
16100 case 138:
16101 case 133:
16102 case 76:
16103 extract_constrain_insn_cached (insn);
16104 if (which_alternative != 0)
16105 {
16106 return IMM_DISP_UNKNOWN;
16107 }
16108 else
16109 {
16110 return IMM_DISP_FALSE;
16111 }
16112
16113 case 71:
16114 extract_constrain_insn_cached (insn);
16115 if (((q_regs_operand (operands[0], QImode)) && (! ((TARGET_MOVX) != (0)))) && ((memory_displacement_operand (operands[0], VOIDmode)) && (immediate_operand (operands[1], VOIDmode))))
16116 {
16117 return IMM_DISP_TRUE;
16118 }
16119 else
16120 {
16121 return IMM_DISP_FALSE;
16122 }
16123
16124 case 59:
16125 extract_constrain_insn_cached (insn);
16126 if ((((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2)))))) && ((memory_displacement_operand (operands[0], VOIDmode)) && (immediate_operand (operands[1], VOIDmode))))
16127 {
16128 return IMM_DISP_TRUE;
16129 }
16130 else
16131 {
16132 return IMM_DISP_FALSE;
16133 }
16134
16135 case 70:
16136 case 66:
16137 case 65:
16138 case 50:
16139 extract_insn_cached (insn);
16140 if ((get_attr_type (insn) == TYPE_IMOV) && ((memory_displacement_operand (operands[0], VOIDmode)) && (immediate_operand (operands[1], VOIDmode))))
16141 {
16142 return IMM_DISP_TRUE;
16143 }
16144 else
16145 {
16146 return IMM_DISP_FALSE;
16147 }
16148
16149 case 44:
16150 extract_constrain_insn_cached (insn);
16151 if ((((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && ((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], SImode)))))))) && ((memory_displacement_operand (operands[0], VOIDmode)) && (immediate_operand (operands[1], VOIDmode))))
16152 {
16153 return IMM_DISP_TRUE;
16154 }
16155 else
16156 {
16157 return IMM_DISP_FALSE;
16158 }
16159
16160 case 498:
16161 case 496:
16162 case 485:
16163 case 483:
16164 case 472:
16165 case 470:
16166 case 448:
16167 case 446:
16168 case 407:
16169 case 405:
16170 case 403:
16171 case 402:
16172 case 399:
16173 case 345:
16174 case 339:
16175 case 319:
16176 case 317:
16177 case 297:
16178 case 295:
16179 case 283:
16180 case 282:
16181 case 281:
16182 case 280:
16183 case 279:
16184 case 278:
16185 case 277:
16186 case 276:
16187 case 242:
16188 case 111:
16189 case 108:
16190 case 106:
16191 case 86:
16192 case 85:
16193 case 84:
16194 case 81:
16195 case 80:
16196 case 74:
16197 case 73:
16198 case 72:
16199 case 68:
16200 case 67:
16201 case 62:
16202 case 61:
16203 case 60:
16204 case 56:
16205 case 55:
16206 case 54:
16207 case 53:
16208 case 52:
16209 case 51:
16210 case 47:
16211 case 46:
16212 case 45:
16213 case 43:
16214 case 42:
16215 case 17:
16216 case 16:
16217 case 15:
16218 case 14:
16219 case 13:
16220 case 12:
16221 case 11:
16222 case 10:
16223 case 9:
16224 case 8:
16225 case 7:
16226 case 6:
16227 case 5:
16228 case 4:
16229 case 3:
16230 case 2:
16231 case 1:
16232 case 0:
16233 extract_insn_cached (insn);
16234 if ((memory_displacement_operand (operands[0], VOIDmode)) && (immediate_operand (operands[1], VOIDmode)))
16235 {
16236 return IMM_DISP_TRUE;
16237 }
16238 else
16239 {
16240 return IMM_DISP_FALSE;
16241 }
16242
16243 case -1:
16244 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
16245 && asm_noperands (PATTERN (insn)) < 0)
16246 fatal_insn_not_found (insn);
16247 case 1024:
16248 case 1023:
16249 case 854:
16250 case 708:
16251 case 707:
16252 case 706:
16253 case 705:
16254 case 704:
16255 case 703:
16256 case 702:
16257 case 701:
16258 case 700:
16259 case 699:
16260 case 698:
16261 case 697:
16262 case 696:
16263 case 695:
16264 case 694:
16265 case 693:
16266 case 692:
16267 case 681:
16268 case 680:
16269 case 673:
16270 case 672:
16271 case 671:
16272 case 670:
16273 case 669:
16274 case 668:
16275 case 667:
16276 case 666:
16277 case 665:
16278 case 664:
16279 case 663:
16280 case 662:
16281 case 661:
16282 case 660:
16283 case 656:
16284 case 655:
16285 case 653:
16286 case 652:
16287 case 650:
16288 case 649:
16289 case 647:
16290 case 646:
16291 case 543:
16292 case 542:
16293 case 541:
16294 case 540:
16295 case 539:
16296 case 538:
16297 case 537:
16298 case 536:
16299 case 535:
16300 case 534:
16301 case 533:
16302 case 532:
16303 case 531:
16304 case 530:
16305 case 528:
16306 case 527:
16307 case 526:
16308 case 514:
16309 case 513:
16310 case 512:
16311 case 511:
16312 case 510:
16313 case 509:
16314 case 508:
16315 case 507:
16316 case 506:
16317 case 505:
16318 case 456:
16319 case 455:
16320 case 429:
16321 case 428:
16322 case 411:
16323 case 410:
16324 case 388:
16325 case 387:
16326 case 386:
16327 case 385:
16328 case 384:
16329 case 383:
16330 case 382:
16331 case 381:
16332 case 380:
16333 case 379:
16334 case 369:
16335 case 368:
16336 case 367:
16337 case 366:
16338 case 365:
16339 case 364:
16340 case 363:
16341 case 362:
16342 case 361:
16343 case 360:
16344 case 349:
16345 case 285:
16346 case 284:
16347 case 273:
16348 case 271:
16349 case 270:
16350 case 268:
16351 case 267:
16352 case 265:
16353 case 264:
16354 case 225:
16355 case 179:
16356 case 160:
16357 case 159:
16358 case 118:
16359 case 114:
16360 case 99:
16361 case 98:
16362 case 97:
16363 case 96:
16364 case 92:
16365 case 91:
16366 case 75:
16367 case 30:
16368 case 29:
16369 case 28:
16370 case 26:
16371 case 25:
16372 case 22:
16373 case 18:
16374 return IMM_DISP_UNKNOWN;
16375
16376 default:
16377 return IMM_DISP_FALSE;
16378
16379 }
16380 }
16381
16382 extern int get_attr_length_address PARAMS ((rtx));
16383 int
16384 get_attr_length_address (insn)
16385 rtx insn;
16386 {
16387 switch (recog_memoized (insn))
16388 {
16389 case 679:
16390 case 678:
16391 case 677:
16392 case 676:
16393 case 675:
16394 case 674:
16395 extract_constrain_insn_cached (insn);
16396 if (constant_call_address_operand (operands[1], VOIDmode))
16397 {
16398 return 0;
16399 }
16400 else
16401 {
16402 return ix86_attr_length_address_default (insn);
16403 }
16404
16405 case 642:
16406 extract_constrain_insn_cached (insn);
16407 if ((which_alternative == 2) || (which_alternative == 3))
16408 {
16409 return 0;
16410 }
16411 else
16412 {
16413 return ix86_attr_length_address_default (insn);
16414 }
16415
16416 case 525:
16417 case 524:
16418 case 523:
16419 case 522:
16420 case 521:
16421 extract_constrain_insn_cached (insn);
16422 if (constant_call_address_operand (operands[0], VOIDmode))
16423 {
16424 return 0;
16425 }
16426 else
16427 {
16428 return ix86_attr_length_address_default (insn);
16429 }
16430
16431 case 171:
16432 case 168:
16433 case 165:
16434 case 162:
16435 extract_constrain_insn_cached (insn);
16436 if (which_alternative == 1)
16437 {
16438 return 0;
16439 }
16440 else
16441 {
16442 return ix86_attr_length_address_default (insn);
16443 }
16444
16445 case 134:
16446 extract_constrain_insn_cached (insn);
16447 if ((which_alternative == 1) || ((which_alternative == 2) || (which_alternative == 3)))
16448 {
16449 return 0;
16450 }
16451 else
16452 {
16453 return ix86_attr_length_address_default (insn);
16454 }
16455
16456 case 103:
16457 case 102:
16458 case 101:
16459 case 100:
16460 extract_constrain_insn_cached (insn);
16461 if ((which_alternative == 3) || (which_alternative == 4))
16462 {
16463 return 0;
16464 }
16465 else
16466 {
16467 return ix86_attr_length_address_default (insn);
16468 }
16469
16470 case 94:
16471 case 93:
16472 extract_constrain_insn_cached (insn);
16473 if (((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 3) || (which_alternative == 4)))
16474 {
16475 return 0;
16476 }
16477 else
16478 {
16479 return ix86_attr_length_address_default (insn);
16480 }
16481
16482 case 88:
16483 case 87:
16484 extract_constrain_insn_cached (insn);
16485 if (which_alternative != 1)
16486 {
16487 return 0;
16488 }
16489 else
16490 {
16491 return ix86_attr_length_address_default (insn);
16492 }
16493
16494 case 83:
16495 extract_constrain_insn_cached (insn);
16496 if (which_alternative == 4)
16497 {
16498 return 0;
16499 }
16500 else
16501 {
16502 return ix86_attr_length_address_default (insn);
16503 }
16504
16505 case 714:
16506 case 82:
16507 extract_constrain_insn_cached (insn);
16508 if ((which_alternative == 0) || (which_alternative == 1))
16509 {
16510 return 0;
16511 }
16512 else
16513 {
16514 return ix86_attr_length_address_default (insn);
16515 }
16516
16517 case 178:
16518 case 177:
16519 case 176:
16520 case 175:
16521 case 174:
16522 case 173:
16523 case 170:
16524 case 167:
16525 case 164:
16526 case 161:
16527 case 144:
16528 case 142:
16529 case 140:
16530 case 138:
16531 case 133:
16532 case 76:
16533 extract_constrain_insn_cached (insn);
16534 if (which_alternative != 0)
16535 {
16536 return 0;
16537 }
16538 else
16539 {
16540 return ix86_attr_length_address_default (insn);
16541 }
16542
16543 case 45:
16544 case 46:
16545 case 51:
16546 case 52:
16547 case 67:
16548 case 68:
16549 case 84:
16550 case 85:
16551 extract_constrain_insn_cached (insn);
16552 if (which_alternative == 0)
16553 {
16554 return 8;
16555 }
16556 else
16557 {
16558 return 0;
16559 }
16560
16561 case -1:
16562 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
16563 && asm_noperands (PATTERN (insn)) < 0)
16564 fatal_insn_not_found (insn);
16565 case 1024:
16566 case 1023:
16567 case 708:
16568 case 707:
16569 case 706:
16570 case 705:
16571 case 704:
16572 case 703:
16573 case 702:
16574 case 701:
16575 case 700:
16576 case 699:
16577 case 698:
16578 case 697:
16579 case 696:
16580 case 695:
16581 case 694:
16582 case 693:
16583 case 692:
16584 case 681:
16585 case 680:
16586 case 673:
16587 case 672:
16588 case 671:
16589 case 670:
16590 case 669:
16591 case 668:
16592 case 667:
16593 case 666:
16594 case 665:
16595 case 664:
16596 case 663:
16597 case 662:
16598 case 661:
16599 case 660:
16600 case 656:
16601 case 655:
16602 case 653:
16603 case 652:
16604 case 650:
16605 case 649:
16606 case 647:
16607 case 646:
16608 case 635:
16609 case 634:
16610 case 633:
16611 case 632:
16612 case 631:
16613 case 630:
16614 case 629:
16615 case 628:
16616 case 627:
16617 case 626:
16618 case 625:
16619 case 624:
16620 case 623:
16621 case 622:
16622 case 621:
16623 case 620:
16624 case 619:
16625 case 618:
16626 case 617:
16627 case 616:
16628 case 615:
16629 case 614:
16630 case 613:
16631 case 612:
16632 case 611:
16633 case 610:
16634 case 609:
16635 case 608:
16636 case 607:
16637 case 606:
16638 case 605:
16639 case 543:
16640 case 542:
16641 case 541:
16642 case 540:
16643 case 539:
16644 case 538:
16645 case 537:
16646 case 536:
16647 case 535:
16648 case 534:
16649 case 533:
16650 case 532:
16651 case 531:
16652 case 530:
16653 case 528:
16654 case 527:
16655 case 526:
16656 case 514:
16657 case 513:
16658 case 512:
16659 case 511:
16660 case 510:
16661 case 509:
16662 case 508:
16663 case 507:
16664 case 506:
16665 case 505:
16666 case 456:
16667 case 455:
16668 case 429:
16669 case 428:
16670 case 411:
16671 case 410:
16672 case 388:
16673 case 387:
16674 case 386:
16675 case 385:
16676 case 384:
16677 case 383:
16678 case 382:
16679 case 381:
16680 case 380:
16681 case 379:
16682 case 369:
16683 case 368:
16684 case 367:
16685 case 366:
16686 case 365:
16687 case 364:
16688 case 363:
16689 case 362:
16690 case 361:
16691 case 360:
16692 case 349:
16693 case 285:
16694 case 284:
16695 case 273:
16696 case 271:
16697 case 270:
16698 case 268:
16699 case 267:
16700 case 265:
16701 case 264:
16702 case 225:
16703 case 179:
16704 case 160:
16705 case 159:
16706 case 118:
16707 case 114:
16708 case 105:
16709 case 104:
16710 case 99:
16711 case 98:
16712 case 97:
16713 case 96:
16714 case 95:
16715 case 92:
16716 case 91:
16717 case 90:
16718 case 75:
16719 case 30:
16720 case 29:
16721 case 28:
16722 case 26:
16723 case 25:
16724 case 22:
16725 case 18:
16726 case 854:
16727 return 0;
16728
16729 default:
16730 extract_constrain_insn_cached (insn);
16731 return ix86_attr_length_address_default (insn);
16732
16733 }
16734 }
16735
16736 extern int get_attr_length_immediate PARAMS ((rtx));
16737 int
16738 get_attr_length_immediate (insn)
16739 rtx insn;
16740 {
16741 switch (recog_memoized (insn))
16742 {
16743 case 679:
16744 case 678:
16745 case 677:
16746 case 676:
16747 case 675:
16748 case 674:
16749 extract_insn_cached (insn);
16750 if (constant_call_address_operand (operands[1], VOIDmode))
16751 {
16752 return 4;
16753 }
16754 else
16755 {
16756 return 0;
16757 }
16758
16759 case 659:
16760 extract_constrain_insn_cached (insn);
16761 if ((which_alternative == 1) && (! (const0_operand (operands[2], DImode))))
16762 {
16763 return 0;
16764 }
16765 else if (which_alternative == 0)
16766 {
16767 return ix86_attr_length_immediate_default(insn,1);
16768 }
16769 else
16770 {
16771 return ix86_attr_length_immediate_default(insn,0);
16772 }
16773
16774 case 658:
16775 extract_constrain_insn_cached (insn);
16776 if ((which_alternative == 1) && (! (const0_operand (operands[2], SImode))))
16777 {
16778 return 0;
16779 }
16780 else if (which_alternative == 0)
16781 {
16782 return ix86_attr_length_immediate_default(insn,1);
16783 }
16784 else
16785 {
16786 return ix86_attr_length_immediate_default(insn,0);
16787 }
16788
16789 case 563:
16790 case 558:
16791 extract_constrain_insn_cached (insn);
16792 if (get_attr_unit (insn) == UNIT_SSE)
16793 {
16794 return 0;
16795 }
16796 else
16797 {
16798 return
16799 abort(),1;
16800 }
16801
16802 case 562:
16803 case 557:
16804 extract_constrain_insn_cached (insn);
16805 if ((get_attr_unit (insn) == UNIT_I387) || (get_attr_unit (insn) == UNIT_SSE))
16806 {
16807 return 0;
16808 }
16809 else
16810 {
16811 return
16812 abort(),1;
16813 }
16814
16815 case 581:
16816 case 580:
16817 case 579:
16818 case 578:
16819 case 577:
16820 case 576:
16821 case 575:
16822 case 574:
16823 case 573:
16824 case 572:
16825 case 571:
16826 case 570:
16827 case 569:
16828 case 568:
16829 case 567:
16830 case 566:
16831 case 565:
16832 case 564:
16833 case 561:
16834 case 560:
16835 case 559:
16836 case 556:
16837 extract_constrain_insn_cached (insn);
16838 if (get_attr_unit (insn) == UNIT_I387)
16839 {
16840 return 0;
16841 }
16842 else
16843 {
16844 return
16845 abort(),1;
16846 }
16847
16848 case 525:
16849 case 524:
16850 case 523:
16851 case 522:
16852 case 521:
16853 extract_insn_cached (insn);
16854 if (constant_call_address_operand (operands[0], VOIDmode))
16855 {
16856 return 4;
16857 }
16858 else
16859 {
16860 return 0;
16861 }
16862
16863 case 432:
16864 case 431:
16865 case 423:
16866 extract_constrain_insn_cached (insn);
16867 if (which_alternative == 0)
16868 {
16869 return 0;
16870 }
16871 else
16872 {
16873 return ix86_attr_length_immediate_default(insn,1);
16874 }
16875
16876 case 420:
16877 extract_constrain_insn_cached (insn);
16878 if (which_alternative == 2)
16879 {
16880 return 0;
16881 }
16882 else if ((get_attr_type (insn) == TYPE_ALU) || (get_attr_type (insn) == TYPE_ISHIFT))
16883 {
16884 return ix86_attr_length_immediate_default(insn,1);
16885 }
16886 else
16887 {
16888 return
16889 abort(),1;
16890 }
16891
16892 case 416:
16893 extract_constrain_insn_cached (insn);
16894 if ((((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode))) || ((! ((TARGET_DOUBLE_WITH_ADD) != (0))) || (! (const1_operand (operands[2], VOIDmode)))))
16895 {
16896 return ix86_attr_length_immediate_default(insn,1);
16897 }
16898 else
16899 {
16900 return
16901 abort(),1;
16902 }
16903
16904 case 414:
16905 extract_constrain_insn_cached (insn);
16906 if (which_alternative == 1)
16907 {
16908 return 0;
16909 }
16910 else if ((which_alternative == 0) && ((((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode))) || ((! ((TARGET_DOUBLE_WITH_ADD) != (0))) || (! (const1_operand (operands[2], VOIDmode))))))
16911 {
16912 return ix86_attr_length_immediate_default(insn,1);
16913 }
16914 else
16915 {
16916 return
16917 abort(),1;
16918 }
16919
16920 case 422:
16921 case 421:
16922 case 419:
16923 case 418:
16924 case 415:
16925 case 409:
16926 extract_constrain_insn_cached (insn);
16927 if ((get_attr_type (insn) == TYPE_ALU) || (get_attr_type (insn) == TYPE_ISHIFT))
16928 {
16929 return ix86_attr_length_immediate_default(insn,1);
16930 }
16931 else
16932 {
16933 return
16934 abort(),1;
16935 }
16936
16937 case 417:
16938 case 413:
16939 case 408:
16940 extract_constrain_insn_cached (insn);
16941 if (which_alternative == 1)
16942 {
16943 return 0;
16944 }
16945 else if ((get_attr_type (insn) == TYPE_ALU) || (get_attr_type (insn) == TYPE_ISHIFT))
16946 {
16947 return ix86_attr_length_immediate_default(insn,1);
16948 }
16949 else
16950 {
16951 return
16952 abort(),1;
16953 }
16954
16955 case 292:
16956 case 288:
16957 extract_constrain_insn_cached (insn);
16958 if ((which_alternative == 0) || (which_alternative == 1))
16959 {
16960 return ix86_attr_length_immediate_default(insn,1);
16961 }
16962 else
16963 {
16964 return 0;
16965 }
16966
16967 case 286:
16968 extract_constrain_insn_cached (insn);
16969 if ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))
16970 {
16971 return ix86_attr_length_immediate_default(insn,1);
16972 }
16973 else
16974 {
16975 return 0;
16976 }
16977
16978 case 223:
16979 case 222:
16980 case 221:
16981 case 219:
16982 case 218:
16983 case 217:
16984 case 216:
16985 extract_constrain_insn_cached (insn);
16986 if (incdec_operand (operands[2], QImode))
16987 {
16988 return 0;
16989 }
16990 else
16991 {
16992 return ix86_attr_length_immediate_default(insn,1);
16993 }
16994
16995 case 215:
16996 extract_constrain_insn_cached (insn);
16997 if ((incdec_operand (operands[2], QImode)) || (which_alternative == 3))
16998 {
16999 return 0;
17000 }
17001 else
17002 {
17003 return ix86_attr_length_immediate_default(insn,1);
17004 }
17005
17006 case 220:
17007 case 214:
17008 case 213:
17009 case 212:
17010 case 211:
17011 case 210:
17012 extract_constrain_insn_cached (insn);
17013 if (incdec_operand (operands[2], HImode))
17014 {
17015 return 0;
17016 }
17017 else
17018 {
17019 return ix86_attr_length_immediate_default(insn,1);
17020 }
17021
17022 case 209:
17023 extract_constrain_insn_cached (insn);
17024 if ((incdec_operand (operands[2], HImode)) || (which_alternative == 2))
17025 {
17026 return 0;
17027 }
17028 else
17029 {
17030 return ix86_attr_length_immediate_default(insn,1);
17031 }
17032
17033 case 208:
17034 case 207:
17035 case 206:
17036 case 205:
17037 case 204:
17038 case 203:
17039 extract_constrain_insn_cached (insn);
17040 if (incdec_operand (operands[2], SImode))
17041 {
17042 return 0;
17043 }
17044 else
17045 {
17046 return ix86_attr_length_immediate_default(insn,1);
17047 }
17048
17049 case 202:
17050 extract_constrain_insn_cached (insn);
17051 if ((get_attr_type (insn) == TYPE_INCDEC) || ((which_alternative != 0) || (pic_symbolic_operand (operands[2], SImode))))
17052 {
17053 return 0;
17054 }
17055 else if (get_attr_type (insn) == TYPE_ALU)
17056 {
17057 return ix86_attr_length_immediate_default(insn,1);
17058 }
17059 else
17060 {
17061 return
17062 abort(),1;
17063 }
17064
17065 case 201:
17066 extract_constrain_insn_cached (insn);
17067 if ((get_attr_type (insn) == TYPE_INCDEC) || ((which_alternative == 2) || (pic_symbolic_operand (operands[2], SImode))))
17068 {
17069 return 0;
17070 }
17071 else if (get_attr_type (insn) == TYPE_ALU)
17072 {
17073 return ix86_attr_length_immediate_default(insn,1);
17074 }
17075 else
17076 {
17077 return
17078 abort(),1;
17079 }
17080
17081 case 200:
17082 case 199:
17083 case 198:
17084 case 197:
17085 extract_constrain_insn_cached (insn);
17086 if (incdec_operand (operands[2], DImode))
17087 {
17088 return 0;
17089 }
17090 else
17091 {
17092 return ix86_attr_length_immediate_default(insn,1);
17093 }
17094
17095 case 196:
17096 extract_constrain_insn_cached (insn);
17097 if ((get_attr_type (insn) == TYPE_INCDEC) || ((which_alternative == 2) || (pic_symbolic_operand (operands[2], DImode))))
17098 {
17099 return 0;
17100 }
17101 else if (get_attr_type (insn) == TYPE_ALU)
17102 {
17103 return ix86_attr_length_immediate_default(insn,1);
17104 }
17105 else
17106 {
17107 return
17108 abort(),1;
17109 }
17110
17111 case 115:
17112 extract_constrain_insn_cached (insn);
17113 if (which_alternative == 0)
17114 {
17115 return ix86_attr_length_immediate_default(insn,1);
17116 }
17117 else
17118 {
17119 return ix86_attr_length_immediate_default(insn,0);
17120 }
17121
17122 case 94:
17123 case 93:
17124 extract_constrain_insn_cached (insn);
17125 if ((((which_alternative != 1) && (which_alternative != 2)) && ((which_alternative == 3) || (which_alternative == 4))) || ((which_alternative != 3) && (which_alternative != 4)))
17126 {
17127 return 0;
17128 }
17129 else
17130 {
17131 return
17132 abort(),1;
17133 }
17134
17135 case 89:
17136 extract_constrain_insn_cached (insn);
17137 if (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) || (((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && (((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8)))) || ((which_alternative == 9) || ((which_alternative == 10) || (which_alternative == 11))))))
17138 {
17139 return 0;
17140 }
17141 else if ((which_alternative == 3) || (which_alternative == 4))
17142 {
17143 return ix86_attr_length_immediate_default(insn,0);
17144 }
17145 else
17146 {
17147 return
17148 abort(),1;
17149 }
17150
17151 case 88:
17152 case 87:
17153 extract_constrain_insn_cached (insn);
17154 if (which_alternative != 1)
17155 {
17156 return 0;
17157 }
17158 else
17159 {
17160 return ix86_attr_length_immediate_default(insn,1);
17161 }
17162
17163 case 83:
17164 extract_constrain_insn_cached (insn);
17165 if (which_alternative == 0)
17166 {
17167 if (((flag_pic) != (0)) && (symbolic_operand (operands[1], DImode)))
17168 {
17169 return 0;
17170 }
17171 else
17172 {
17173 return ix86_attr_length_immediate_default(insn,0);
17174 }
17175 }
17176 else if (which_alternative == 1)
17177 {
17178 return 4;
17179 }
17180 else if (which_alternative == 2)
17181 {
17182 return 8;
17183 }
17184 else
17185 {
17186 if ((((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative != 7) && ((which_alternative != 8) && ((which_alternative != 9) && (((flag_pic) != (0)) && (symbolic_operand (operands[1], DImode))))))) || ((which_alternative == 4) || (((which_alternative == 7) || ((which_alternative == 8) || (which_alternative == 9))) || ((which_alternative == 5) || (which_alternative == 6)))))
17187 {
17188 return 0;
17189 }
17190 else
17191 {
17192 return ix86_attr_length_immediate_default(insn,0);
17193 }
17194 }
17195
17196 case 76:
17197 extract_constrain_insn_cached (insn);
17198 if (which_alternative != 0)
17199 {
17200 return 0;
17201 }
17202 else
17203 {
17204 return ix86_attr_length_immediate_default(insn,1);
17205 }
17206
17207 case 71:
17208 extract_constrain_insn_cached (insn);
17209 if ((! (q_regs_operand (operands[0], QImode))) || ((TARGET_MOVX) != (0)))
17210 {
17211 return ix86_attr_length_immediate_default(insn,1);
17212 }
17213 else
17214 {
17215 return ix86_attr_length_immediate_default(insn,0);
17216 }
17217
17218 case 70:
17219 case 66:
17220 case 65:
17221 extract_constrain_insn_cached (insn);
17222 if (get_attr_type (insn) == TYPE_IMOVX)
17223 {
17224 return ix86_attr_length_immediate_default(insn,1);
17225 }
17226 else if (get_attr_type (insn) == TYPE_IMOV)
17227 {
17228 return ix86_attr_length_immediate_default(insn,0);
17229 }
17230 else
17231 {
17232 return
17233 abort(),1;
17234 }
17235
17236 case 59:
17237 extract_constrain_insn_cached (insn);
17238 if (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2)))))
17239 {
17240 return ix86_attr_length_immediate_default(insn,1);
17241 }
17242 else if (((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2))))))
17243 {
17244 return ix86_attr_length_immediate_default(insn,0);
17245 }
17246 else
17247 {
17248 return
17249 abort(),1;
17250 }
17251
17252 case 50:
17253 extract_constrain_insn_cached (insn);
17254 if ((((which_alternative != 0) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_HIMODE_MATH) == (0))))) && (((which_alternative != 1) && (which_alternative != 2)) || (! (aligned_operand (operands[1], HImode))))) && (((TARGET_MOVX) != (0)) && ((which_alternative == 0) || (which_alternative == 2))))
17255 {
17256 return ix86_attr_length_immediate_default(insn,1);
17257 }
17258 else if (get_attr_type (insn) == TYPE_IMOV)
17259 {
17260 return ix86_attr_length_immediate_default(insn,0);
17261 }
17262 else
17263 {
17264 return
17265 abort(),1;
17266 }
17267
17268 case 545:
17269 case 544:
17270 case 283:
17271 case 282:
17272 case 281:
17273 case 279:
17274 case 278:
17275 case 277:
17276 case 276:
17277 case 86:
17278 case 74:
17279 case 73:
17280 case 72:
17281 case 61:
17282 case 60:
17283 case 55:
17284 case 54:
17285 case 53:
17286 case 47:
17287 extract_constrain_insn_cached (insn);
17288 return ix86_attr_length_immediate_default(insn,0);
17289
17290 case 84:
17291 case 67:
17292 case 51:
17293 case 45:
17294 extract_constrain_insn_cached (insn);
17295 if (which_alternative == 0)
17296 {
17297 return 0;
17298 }
17299 else
17300 {
17301 return ix86_attr_length_immediate_default(insn,0);
17302 }
17303
17304 case 44:
17305 extract_constrain_insn_cached (insn);
17306 if ((((which_alternative != 3) && (which_alternative != 4)) && (((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (((flag_pic) != (0)) && (symbolic_operand (operands[1], SImode)))))) || ((which_alternative == 5) || ((which_alternative == 6) || (which_alternative == 7))))) || ((which_alternative == 2) || ((which_alternative == 3) || (which_alternative == 4))))
17307 {
17308 return 0;
17309 }
17310 else if ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && ((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], SImode)))))))
17311 {
17312 return ix86_attr_length_immediate_default(insn,0);
17313 }
17314 else
17315 {
17316 return
17317 abort(),1;
17318 }
17319
17320 case 547:
17321 case 546:
17322 case 498:
17323 case 497:
17324 case 496:
17325 case 495:
17326 case 494:
17327 case 493:
17328 case 492:
17329 case 491:
17330 case 490:
17331 case 489:
17332 case 488:
17333 case 487:
17334 case 486:
17335 case 485:
17336 case 484:
17337 case 483:
17338 case 482:
17339 case 481:
17340 case 480:
17341 case 479:
17342 case 478:
17343 case 477:
17344 case 476:
17345 case 475:
17346 case 474:
17347 case 473:
17348 case 472:
17349 case 471:
17350 case 470:
17351 case 469:
17352 case 468:
17353 case 467:
17354 case 466:
17355 case 465:
17356 case 464:
17357 case 463:
17358 case 462:
17359 case 461:
17360 case 460:
17361 case 459:
17362 case 458:
17363 case 457:
17364 case 454:
17365 case 453:
17366 case 452:
17367 case 451:
17368 case 450:
17369 case 449:
17370 case 448:
17371 case 447:
17372 case 446:
17373 case 445:
17374 case 444:
17375 case 443:
17376 case 442:
17377 case 441:
17378 case 440:
17379 case 439:
17380 case 438:
17381 case 437:
17382 case 436:
17383 case 435:
17384 case 434:
17385 case 433:
17386 case 430:
17387 case 427:
17388 case 426:
17389 case 425:
17390 case 424:
17391 case 412:
17392 case 407:
17393 case 406:
17394 case 405:
17395 case 404:
17396 case 403:
17397 case 402:
17398 case 401:
17399 case 400:
17400 case 399:
17401 case 398:
17402 case 359:
17403 case 358:
17404 case 357:
17405 case 356:
17406 case 355:
17407 case 354:
17408 case 353:
17409 case 352:
17410 case 351:
17411 case 350:
17412 case 348:
17413 case 347:
17414 case 346:
17415 case 345:
17416 case 344:
17417 case 339:
17418 case 338:
17419 case 337:
17420 case 336:
17421 case 335:
17422 case 334:
17423 case 333:
17424 case 332:
17425 case 331:
17426 case 330:
17427 case 329:
17428 case 328:
17429 case 327:
17430 case 326:
17431 case 325:
17432 case 320:
17433 case 319:
17434 case 318:
17435 case 317:
17436 case 316:
17437 case 315:
17438 case 314:
17439 case 313:
17440 case 312:
17441 case 311:
17442 case 310:
17443 case 309:
17444 case 308:
17445 case 307:
17446 case 306:
17447 case 305:
17448 case 304:
17449 case 303:
17450 case 297:
17451 case 296:
17452 case 295:
17453 case 294:
17454 case 293:
17455 case 291:
17456 case 290:
17457 case 289:
17458 case 287:
17459 case 261:
17460 case 260:
17461 case 259:
17462 case 248:
17463 case 247:
17464 case 246:
17465 case 245:
17466 case 244:
17467 case 243:
17468 case 242:
17469 case 241:
17470 case 240:
17471 case 239:
17472 case 238:
17473 case 237:
17474 case 236:
17475 case 235:
17476 case 234:
17477 case 233:
17478 case 232:
17479 case 231:
17480 case 230:
17481 case 229:
17482 case 228:
17483 case 227:
17484 case 226:
17485 case 224:
17486 case 185:
17487 case 184:
17488 case 183:
17489 case 182:
17490 case 181:
17491 case 180:
17492 case 126:
17493 case 125:
17494 case 124:
17495 case 123:
17496 case 122:
17497 case 121:
17498 case 120:
17499 case 119:
17500 case 117:
17501 case 116:
17502 case 113:
17503 case 112:
17504 case 111:
17505 case 110:
17506 case 109:
17507 case 108:
17508 case 107:
17509 case 106:
17510 case 79:
17511 case 78:
17512 case 77:
17513 case 69:
17514 case 64:
17515 case 63:
17516 case 58:
17517 case 57:
17518 case 49:
17519 case 48:
17520 case 41:
17521 case 40:
17522 case 39:
17523 case 38:
17524 case 37:
17525 case 17:
17526 case 16:
17527 case 15:
17528 case 13:
17529 case 12:
17530 case 11:
17531 case 10:
17532 case 8:
17533 case 7:
17534 case 5:
17535 case 4:
17536 case 2:
17537 case 1:
17538 extract_constrain_insn_cached (insn);
17539 return ix86_attr_length_immediate_default(insn,1);
17540
17541 case 0:
17542 case 3:
17543 case 6:
17544 case 9:
17545 extract_constrain_insn_cached (insn);
17546 if (which_alternative == 0)
17547 {
17548 return 0;
17549 }
17550 else
17551 {
17552 return 1;
17553 }
17554
17555 case 520:
17556 case 515:
17557 case 504:
17558 case 503:
17559 case 43:
17560 case 81:
17561 case 280:
17562 case 298:
17563 case 299:
17564 case 321:
17565 case 340:
17566 return 1;
17567
17568 case 528:
17569 return 2;
17570
17571 case -1:
17572 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
17573 && asm_noperands (PATTERN (insn)) < 0)
17574 fatal_insn_not_found (insn);
17575 default:
17576 return 0;
17577
17578 }
17579 }
17580
17581 extern enum attr_memory get_attr_memory PARAMS ((rtx));
17582 enum attr_memory
17583 get_attr_memory (insn)
17584 rtx insn;
17585 {
17586 switch (recog_memoized (insn))
17587 {
17588 case 714:
17589 extract_constrain_insn_cached (insn);
17590 if ((which_alternative == 0) || (which_alternative == 1))
17591 {
17592 return MEMORY_UNKNOWN;
17593 }
17594 else if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
17595 {
17596 return MEMORY_BOTH;
17597 }
17598 else if (memory_operand (operands[0], VOIDmode))
17599 {
17600 return MEMORY_STORE;
17601 }
17602 else if (memory_operand (operands[1], VOIDmode))
17603 {
17604 return MEMORY_LOAD;
17605 }
17606 else
17607 {
17608 return MEMORY_NONE;
17609 }
17610
17611 case 679:
17612 case 678:
17613 case 677:
17614 case 676:
17615 case 675:
17616 case 674:
17617 extract_insn_cached (insn);
17618 if (constant_call_address_operand (operands[1], VOIDmode))
17619 {
17620 return MEMORY_NONE;
17621 }
17622 else
17623 {
17624 return MEMORY_LOAD;
17625 }
17626
17627 case 659:
17628 extract_constrain_insn_cached (insn);
17629 if ((which_alternative == 1) && (! (const0_operand (operands[2], DImode))))
17630 {
17631 return MEMORY_NONE;
17632 }
17633 else if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
17634 {
17635 return MEMORY_BOTH;
17636 }
17637 else if (memory_operand (operands[0], VOIDmode))
17638 {
17639 return MEMORY_STORE;
17640 }
17641 else if ((memory_operand (operands[1], VOIDmode)) || (((which_alternative != 1) || (! (const0_operand (operands[2], DImode)))) && (memory_operand (operands[2], VOIDmode))))
17642 {
17643 return MEMORY_LOAD;
17644 }
17645 else
17646 {
17647 return MEMORY_NONE;
17648 }
17649
17650 case 658:
17651 extract_constrain_insn_cached (insn);
17652 if ((which_alternative == 1) && (! (const0_operand (operands[2], SImode))))
17653 {
17654 return MEMORY_NONE;
17655 }
17656 else if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
17657 {
17658 return MEMORY_BOTH;
17659 }
17660 else if (memory_operand (operands[0], VOIDmode))
17661 {
17662 return MEMORY_STORE;
17663 }
17664 else if ((memory_operand (operands[1], VOIDmode)) || (((which_alternative != 1) || (! (const0_operand (operands[2], SImode)))) && (memory_operand (operands[2], VOIDmode))))
17665 {
17666 return MEMORY_LOAD;
17667 }
17668 else
17669 {
17670 return MEMORY_NONE;
17671 }
17672
17673 case 642:
17674 extract_constrain_insn_cached (insn);
17675 if ((which_alternative == 2) || (which_alternative == 3))
17676 {
17677 return MEMORY_UNKNOWN;
17678 }
17679 else
17680 {
17681 return MEMORY_NONE;
17682 }
17683
17684 case 643:
17685 case 641:
17686 extract_constrain_insn_cached (insn);
17687 if ((which_alternative == 0) || (which_alternative == 1))
17688 {
17689 return MEMORY_NONE;
17690 }
17691 else if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
17692 {
17693 return MEMORY_BOTH;
17694 }
17695 else if (memory_operand (operands[0], VOIDmode))
17696 {
17697 return MEMORY_STORE;
17698 }
17699 else if ((memory_operand (operands[1], VOIDmode)) || ((memory_operand (operands[2], VOIDmode)) || (((which_alternative == 2) || (which_alternative == 3)) && (memory_operand (operands[3], VOIDmode)))))
17700 {
17701 return MEMORY_LOAD;
17702 }
17703 else
17704 {
17705 return MEMORY_NONE;
17706 }
17707
17708 case 640:
17709 case 639:
17710 case 637:
17711 extract_insn_cached (insn);
17712 if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
17713 {
17714 return MEMORY_BOTH;
17715 }
17716 else if (memory_operand (operands[0], VOIDmode))
17717 {
17718 return MEMORY_STORE;
17719 }
17720 else if ((memory_operand (operands[1], VOIDmode)) || ((memory_operand (operands[2], VOIDmode)) || (memory_operand (operands[3], VOIDmode))))
17721 {
17722 return MEMORY_LOAD;
17723 }
17724 else
17725 {
17726 return MEMORY_NONE;
17727 }
17728
17729 case 585:
17730 case 582:
17731 extract_constrain_insn_cached (insn);
17732 if (which_alternative == 0)
17733 {
17734 return MEMORY_NONE;
17735 }
17736 else if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
17737 {
17738 return MEMORY_BOTH;
17739 }
17740 else if (memory_operand (operands[0], VOIDmode))
17741 {
17742 return MEMORY_STORE;
17743 }
17744 else if (memory_operand (operands[1], VOIDmode))
17745 {
17746 return MEMORY_LOAD;
17747 }
17748 else
17749 {
17750 return MEMORY_NONE;
17751 }
17752
17753 case 525:
17754 case 524:
17755 case 523:
17756 case 522:
17757 case 521:
17758 extract_insn_cached (insn);
17759 if (constant_call_address_operand (operands[0], VOIDmode))
17760 {
17761 return MEMORY_NONE;
17762 }
17763 else
17764 {
17765 return MEMORY_LOAD;
17766 }
17767
17768 case 529:
17769 case 520:
17770 case 519:
17771 case 518:
17772 case 517:
17773 case 516:
17774 case 515:
17775 case 504:
17776 case 503:
17777 extract_insn_cached (insn);
17778 if (memory_operand (operands[0], VOIDmode))
17779 {
17780 return MEMORY_LOAD;
17781 }
17782 else
17783 {
17784 return MEMORY_NONE;
17785 }
17786
17787 case 432:
17788 case 431:
17789 case 423:
17790 extract_constrain_insn_cached (insn);
17791 if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
17792 {
17793 return MEMORY_BOTH;
17794 }
17795 else if (memory_operand (operands[0], VOIDmode))
17796 {
17797 return MEMORY_STORE;
17798 }
17799 else if ((memory_operand (operands[1], VOIDmode)) || ((which_alternative == 1) && (memory_operand (operands[2], VOIDmode))))
17800 {
17801 return MEMORY_LOAD;
17802 }
17803 else
17804 {
17805 return MEMORY_NONE;
17806 }
17807
17808 case 417:
17809 case 414:
17810 case 413:
17811 case 408:
17812 extract_constrain_insn_cached (insn);
17813 if (which_alternative == 1)
17814 {
17815 return MEMORY_NONE;
17816 }
17817 else if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
17818 {
17819 return MEMORY_BOTH;
17820 }
17821 else if (memory_operand (operands[0], VOIDmode))
17822 {
17823 return MEMORY_STORE;
17824 }
17825 else if ((memory_operand (operands[1], VOIDmode)) || (memory_operand (operands[2], VOIDmode)))
17826 {
17827 return MEMORY_LOAD;
17828 }
17829 else
17830 {
17831 return MEMORY_NONE;
17832 }
17833
17834 case 292:
17835 case 288:
17836 extract_constrain_insn_cached (insn);
17837 if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
17838 {
17839 return MEMORY_BOTH;
17840 }
17841 else if (memory_operand (operands[0], VOIDmode))
17842 {
17843 return MEMORY_STORE;
17844 }
17845 else if ((memory_operand (operands[1], VOIDmode)) || (((which_alternative == 0) || (which_alternative == 1)) && (memory_operand (operands[2], VOIDmode))))
17846 {
17847 return MEMORY_LOAD;
17848 }
17849 else
17850 {
17851 return MEMORY_NONE;
17852 }
17853
17854 case 286:
17855 extract_constrain_insn_cached (insn);
17856 if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
17857 {
17858 return MEMORY_BOTH;
17859 }
17860 else if (memory_operand (operands[0], VOIDmode))
17861 {
17862 return MEMORY_STORE;
17863 }
17864 else if ((memory_operand (operands[1], VOIDmode)) || (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && (memory_operand (operands[2], VOIDmode))))
17865 {
17866 return MEMORY_LOAD;
17867 }
17868 else
17869 {
17870 return MEMORY_NONE;
17871 }
17872
17873 case 217:
17874 extract_insn_cached (insn);
17875 if (((! (incdec_operand (operands[2], QImode))) && (memory_operand (operands[1], VOIDmode))) || ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode))))
17876 {
17877 return MEMORY_BOTH;
17878 }
17879 else if (memory_operand (operands[0], VOIDmode))
17880 {
17881 return MEMORY_STORE;
17882 }
17883 else if ((memory_operand (operands[1], VOIDmode)) || ((incdec_operand (operands[2], QImode)) && (memory_operand (operands[2], VOIDmode))))
17884 {
17885 return MEMORY_LOAD;
17886 }
17887 else
17888 {
17889 return MEMORY_NONE;
17890 }
17891
17892 case 215:
17893 extract_constrain_insn_cached (insn);
17894 if (which_alternative == 3)
17895 {
17896 return MEMORY_NONE;
17897 }
17898 else if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
17899 {
17900 return MEMORY_BOTH;
17901 }
17902 else if (memory_operand (operands[0], VOIDmode))
17903 {
17904 return MEMORY_STORE;
17905 }
17906 else if ((memory_operand (operands[1], VOIDmode)) || (memory_operand (operands[2], VOIDmode)))
17907 {
17908 return MEMORY_LOAD;
17909 }
17910 else
17911 {
17912 return MEMORY_NONE;
17913 }
17914
17915 case 420:
17916 case 209:
17917 extract_constrain_insn_cached (insn);
17918 if (which_alternative == 2)
17919 {
17920 return MEMORY_NONE;
17921 }
17922 else if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
17923 {
17924 return MEMORY_BOTH;
17925 }
17926 else if (memory_operand (operands[0], VOIDmode))
17927 {
17928 return MEMORY_STORE;
17929 }
17930 else if ((memory_operand (operands[1], VOIDmode)) || (memory_operand (operands[2], VOIDmode)))
17931 {
17932 return MEMORY_LOAD;
17933 }
17934 else
17935 {
17936 return MEMORY_NONE;
17937 }
17938
17939 case 202:
17940 extract_constrain_insn_cached (insn);
17941 if ((which_alternative != 0) || (pic_symbolic_operand (operands[2], SImode)))
17942 {
17943 return MEMORY_NONE;
17944 }
17945 else if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
17946 {
17947 return MEMORY_BOTH;
17948 }
17949 else if (memory_operand (operands[0], VOIDmode))
17950 {
17951 return MEMORY_STORE;
17952 }
17953 else if ((memory_operand (operands[1], VOIDmode)) || (memory_operand (operands[2], VOIDmode)))
17954 {
17955 return MEMORY_LOAD;
17956 }
17957 else
17958 {
17959 return MEMORY_NONE;
17960 }
17961
17962 case 201:
17963 extract_constrain_insn_cached (insn);
17964 if ((which_alternative == 2) || (pic_symbolic_operand (operands[2], SImode)))
17965 {
17966 return MEMORY_NONE;
17967 }
17968 else if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
17969 {
17970 return MEMORY_BOTH;
17971 }
17972 else if (memory_operand (operands[0], VOIDmode))
17973 {
17974 return MEMORY_STORE;
17975 }
17976 else if ((memory_operand (operands[1], VOIDmode)) || (memory_operand (operands[2], VOIDmode)))
17977 {
17978 return MEMORY_LOAD;
17979 }
17980 else
17981 {
17982 return MEMORY_NONE;
17983 }
17984
17985 case 196:
17986 extract_constrain_insn_cached (insn);
17987 if ((which_alternative == 2) || (pic_symbolic_operand (operands[2], DImode)))
17988 {
17989 return MEMORY_NONE;
17990 }
17991 else if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
17992 {
17993 return MEMORY_BOTH;
17994 }
17995 else if (memory_operand (operands[0], VOIDmode))
17996 {
17997 return MEMORY_STORE;
17998 }
17999 else if ((memory_operand (operands[1], VOIDmode)) || (memory_operand (operands[2], VOIDmode)))
18000 {
18001 return MEMORY_LOAD;
18002 }
18003 else
18004 {
18005 return MEMORY_NONE;
18006 }
18007
18008 case 171:
18009 case 168:
18010 case 165:
18011 case 162:
18012 extract_constrain_insn_cached (insn);
18013 if (which_alternative == 1)
18014 {
18015 return MEMORY_UNKNOWN;
18016 }
18017 else if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
18018 {
18019 return MEMORY_BOTH;
18020 }
18021 else if (memory_operand (operands[0], VOIDmode))
18022 {
18023 return MEMORY_STORE;
18024 }
18025 else if (memory_operand (operands[1], VOIDmode))
18026 {
18027 return MEMORY_LOAD;
18028 }
18029 else
18030 {
18031 return MEMORY_NONE;
18032 }
18033
18034 case 178:
18035 case 177:
18036 case 176:
18037 case 175:
18038 case 174:
18039 case 173:
18040 case 170:
18041 case 167:
18042 case 164:
18043 case 161:
18044 extract_constrain_insn_cached (insn);
18045 if (which_alternative != 0)
18046 {
18047 return MEMORY_UNKNOWN;
18048 }
18049 else if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
18050 {
18051 return MEMORY_BOTH;
18052 }
18053 else if (memory_operand (operands[0], VOIDmode))
18054 {
18055 return MEMORY_STORE;
18056 }
18057 else if (memory_operand (operands[1], VOIDmode))
18058 {
18059 return MEMORY_LOAD;
18060 }
18061 else
18062 {
18063 return MEMORY_NONE;
18064 }
18065
18066 case 134:
18067 extract_constrain_insn_cached (insn);
18068 if ((which_alternative == 1) || ((which_alternative == 2) || (which_alternative == 3)))
18069 {
18070 return MEMORY_UNKNOWN;
18071 }
18072 else if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
18073 {
18074 return MEMORY_BOTH;
18075 }
18076 else if (memory_operand (operands[0], VOIDmode))
18077 {
18078 return MEMORY_STORE;
18079 }
18080 else if (memory_operand (operands[1], VOIDmode))
18081 {
18082 return MEMORY_LOAD;
18083 }
18084 else
18085 {
18086 return MEMORY_NONE;
18087 }
18088
18089 case 144:
18090 case 142:
18091 case 140:
18092 case 138:
18093 case 133:
18094 extract_constrain_insn_cached (insn);
18095 if (which_alternative != 0)
18096 {
18097 return MEMORY_UNKNOWN;
18098 }
18099 else if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
18100 {
18101 return MEMORY_BOTH;
18102 }
18103 else if (memory_operand (operands[0], VOIDmode))
18104 {
18105 return MEMORY_STORE;
18106 }
18107 else if (memory_operand (operands[1], VOIDmode))
18108 {
18109 return MEMORY_LOAD;
18110 }
18111 else
18112 {
18113 return MEMORY_NONE;
18114 }
18115
18116 case 112:
18117 case 109:
18118 extract_constrain_insn_cached (insn);
18119 if (((which_alternative == 1) && (memory_operand (operands[1], VOIDmode))) || ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode))))
18120 {
18121 return MEMORY_BOTH;
18122 }
18123 else if (memory_operand (operands[0], VOIDmode))
18124 {
18125 return MEMORY_STORE;
18126 }
18127 else if (memory_operand (operands[1], VOIDmode))
18128 {
18129 return MEMORY_LOAD;
18130 }
18131 else
18132 {
18133 return MEMORY_NONE;
18134 }
18135
18136 case 103:
18137 case 102:
18138 case 101:
18139 case 100:
18140 extract_constrain_insn_cached (insn);
18141 if ((which_alternative == 3) || (which_alternative == 4))
18142 {
18143 return MEMORY_UNKNOWN;
18144 }
18145 else if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
18146 {
18147 return MEMORY_BOTH;
18148 }
18149 else if (memory_operand (operands[0], VOIDmode))
18150 {
18151 return MEMORY_STORE;
18152 }
18153 else if ((memory_operand (operands[1], VOIDmode)) || (((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && (memory_operand (operands[2], VOIDmode))))
18154 {
18155 return MEMORY_LOAD;
18156 }
18157 else
18158 {
18159 return MEMORY_NONE;
18160 }
18161
18162 case 94:
18163 case 93:
18164 extract_constrain_insn_cached (insn);
18165 if (((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 3) || (which_alternative == 4)))
18166 {
18167 return MEMORY_UNKNOWN;
18168 }
18169 else if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
18170 {
18171 return MEMORY_BOTH;
18172 }
18173 else if (memory_operand (operands[0], VOIDmode))
18174 {
18175 return MEMORY_STORE;
18176 }
18177 else if ((memory_operand (operands[1], VOIDmode)) || ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) || ((which_alternative == 3) || (which_alternative == 4)))) && (memory_operand (operands[2], VOIDmode))))
18178 {
18179 return MEMORY_LOAD;
18180 }
18181 else
18182 {
18183 return MEMORY_NONE;
18184 }
18185
18186 case 89:
18187 extract_constrain_insn_cached (insn);
18188 if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
18189 {
18190 return MEMORY_BOTH;
18191 }
18192 else if (memory_operand (operands[0], VOIDmode))
18193 {
18194 return MEMORY_STORE;
18195 }
18196 else if ((memory_operand (operands[1], VOIDmode)) || (((((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) || ((which_alternative != 3) && (which_alternative != 4))) && (((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) || (((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (which_alternative != 8)))) && ((which_alternative == 3) || ((which_alternative == 4) || ((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8)))))))))) && (memory_operand (operands[2], VOIDmode))))
18197 {
18198 return MEMORY_LOAD;
18199 }
18200 else
18201 {
18202 return MEMORY_NONE;
18203 }
18204
18205 case 88:
18206 case 87:
18207 extract_constrain_insn_cached (insn);
18208 if (which_alternative != 1)
18209 {
18210 return MEMORY_UNKNOWN;
18211 }
18212 else
18213 {
18214 if (memory_operand (operands[1], VOIDmode))
18215 {
18216 return MEMORY_BOTH;
18217 }
18218 else
18219 {
18220 return MEMORY_STORE;
18221 }
18222 }
18223
18224 case 83:
18225 extract_constrain_insn_cached (insn);
18226 if (which_alternative == 4)
18227 {
18228 return MEMORY_UNKNOWN;
18229 }
18230 else if (((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative != 7) && ((which_alternative != 8) && ((which_alternative != 9) && (((flag_pic) != (0)) && (symbolic_operand (operands[1], DImode)))))))
18231 {
18232 return MEMORY_NONE;
18233 }
18234 else if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
18235 {
18236 return MEMORY_BOTH;
18237 }
18238 else if (memory_operand (operands[0], VOIDmode))
18239 {
18240 return MEMORY_STORE;
18241 }
18242 else if ((memory_operand (operands[1], VOIDmode)) || (((((which_alternative == 5) || (which_alternative == 6)) || ((which_alternative == 7) || ((which_alternative == 8) || ((which_alternative == 9) || (((flag_pic) != (0)) && (symbolic_operand (operands[1], DImode))))))) && ((((which_alternative == 5) || (which_alternative == 6)) || ((which_alternative != 7) && ((which_alternative != 8) && (which_alternative != 9)))) && ((which_alternative != 5) && (which_alternative != 6)))) && (memory_operand (operands[2], VOIDmode))))
18243 {
18244 return MEMORY_LOAD;
18245 }
18246 else
18247 {
18248 return MEMORY_NONE;
18249 }
18250
18251 case 82:
18252 extract_constrain_insn_cached (insn);
18253 if ((which_alternative == 0) || (which_alternative == 1))
18254 {
18255 return MEMORY_UNKNOWN;
18256 }
18257 else if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
18258 {
18259 return MEMORY_BOTH;
18260 }
18261 else if (memory_operand (operands[0], VOIDmode))
18262 {
18263 return MEMORY_STORE;
18264 }
18265 else if ((memory_operand (operands[1], VOIDmode)) || ((((which_alternative == 2) || (which_alternative == 3)) && ((which_alternative != 2) && (which_alternative != 3))) && (memory_operand (operands[2], VOIDmode))))
18266 {
18267 return MEMORY_LOAD;
18268 }
18269 else
18270 {
18271 return MEMORY_NONE;
18272 }
18273
18274 case 76:
18275 extract_constrain_insn_cached (insn);
18276 if (which_alternative != 0)
18277 {
18278 return MEMORY_UNKNOWN;
18279 }
18280 else
18281 {
18282 if (memory_operand (operands[1], VOIDmode))
18283 {
18284 return MEMORY_BOTH;
18285 }
18286 else
18287 {
18288 return MEMORY_STORE;
18289 }
18290 }
18291
18292 case 71:
18293 extract_constrain_insn_cached (insn);
18294 if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
18295 {
18296 return MEMORY_BOTH;
18297 }
18298 else if (memory_operand (operands[0], VOIDmode))
18299 {
18300 return MEMORY_STORE;
18301 }
18302 else if ((memory_operand (operands[1], VOIDmode)) || ((((! (q_regs_operand (operands[0], QImode))) || ((TARGET_MOVX) != (0))) && ((q_regs_operand (operands[0], QImode)) && (! ((TARGET_MOVX) != (0))))) && (memory_operand (operands[2], VOIDmode))))
18303 {
18304 return MEMORY_LOAD;
18305 }
18306 else
18307 {
18308 return MEMORY_NONE;
18309 }
18310
18311 case 70:
18312 case 66:
18313 case 65:
18314 extract_insn_cached (insn);
18315 if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
18316 {
18317 return MEMORY_BOTH;
18318 }
18319 else if (memory_operand (operands[0], VOIDmode))
18320 {
18321 return MEMORY_STORE;
18322 }
18323 else if ((memory_operand (operands[1], VOIDmode)) || (((! (get_attr_type (insn) == TYPE_IMOV)) && (! (get_attr_type (insn) == TYPE_IMOVX))) && (memory_operand (operands[2], VOIDmode))))
18324 {
18325 return MEMORY_LOAD;
18326 }
18327 else
18328 {
18329 return MEMORY_NONE;
18330 }
18331
18332 case 59:
18333 extract_constrain_insn_cached (insn);
18334 if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
18335 {
18336 return MEMORY_BOTH;
18337 }
18338 else if (memory_operand (operands[0], VOIDmode))
18339 {
18340 return MEMORY_STORE;
18341 }
18342 else if ((memory_operand (operands[1], VOIDmode)) || (((((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && (((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2)))))) && (((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2)))))) && (memory_operand (operands[2], VOIDmode))))
18343 {
18344 return MEMORY_LOAD;
18345 }
18346 else
18347 {
18348 return MEMORY_NONE;
18349 }
18350
18351 case 50:
18352 extract_constrain_insn_cached (insn);
18353 if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
18354 {
18355 return MEMORY_BOTH;
18356 }
18357 else if (memory_operand (operands[0], VOIDmode))
18358 {
18359 return MEMORY_STORE;
18360 }
18361 else if ((memory_operand (operands[1], VOIDmode)) || (((! (get_attr_type (insn) == TYPE_IMOV)) && ((((which_alternative == 0) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_HIMODE_MATH) == (0)))) || (((which_alternative == 1) || (which_alternative == 2)) && (aligned_operand (operands[1], HImode)))) || ((! ((TARGET_MOVX) != (0))) || ((which_alternative != 0) && (which_alternative != 2))))) && (memory_operand (operands[2], VOIDmode))))
18362 {
18363 return MEMORY_LOAD;
18364 }
18365 else
18366 {
18367 return MEMORY_NONE;
18368 }
18369
18370 case 1035:
18371 case 1034:
18372 case 1033:
18373 case 1032:
18374 case 1031:
18375 case 1019:
18376 case 1018:
18377 case 1017:
18378 case 1016:
18379 case 1015:
18380 case 1014:
18381 case 1013:
18382 case 1012:
18383 case 1011:
18384 case 1010:
18385 case 1009:
18386 case 1008:
18387 case 1007:
18388 case 1006:
18389 case 1005:
18390 case 1004:
18391 case 1003:
18392 case 1002:
18393 case 1001:
18394 case 1000:
18395 case 999:
18396 case 998:
18397 case 997:
18398 case 996:
18399 case 995:
18400 case 994:
18401 case 993:
18402 case 992:
18403 case 991:
18404 case 990:
18405 case 961:
18406 case 960:
18407 case 959:
18408 case 958:
18409 case 957:
18410 case 930:
18411 case 929:
18412 case 928:
18413 case 927:
18414 case 926:
18415 case 925:
18416 case 924:
18417 case 923:
18418 case 922:
18419 case 921:
18420 case 920:
18421 case 919:
18422 case 918:
18423 case 917:
18424 case 916:
18425 case 915:
18426 case 914:
18427 case 913:
18428 case 912:
18429 case 911:
18430 case 910:
18431 case 909:
18432 case 908:
18433 case 907:
18434 case 906:
18435 case 905:
18436 case 898:
18437 case 897:
18438 case 880:
18439 case 879:
18440 case 877:
18441 case 876:
18442 case 875:
18443 case 874:
18444 case 873:
18445 case 871:
18446 case 870:
18447 case 866:
18448 case 865:
18449 case 849:
18450 case 848:
18451 case 847:
18452 case 846:
18453 case 845:
18454 case 844:
18455 case 822:
18456 case 821:
18457 case 820:
18458 case 791:
18459 case 790:
18460 case 789:
18461 case 788:
18462 case 787:
18463 case 786:
18464 case 785:
18465 case 784:
18466 case 783:
18467 case 782:
18468 case 781:
18469 case 780:
18470 case 779:
18471 case 778:
18472 case 777:
18473 case 744:
18474 case 743:
18475 case 742:
18476 case 741:
18477 case 740:
18478 case 739:
18479 case 730:
18480 case 729:
18481 case 728:
18482 case 727:
18483 case 726:
18484 case 725:
18485 case 724:
18486 case 723:
18487 case 722:
18488 case 721:
18489 case 720:
18490 case 719:
18491 case 718:
18492 case 717:
18493 case 716:
18494 case 715:
18495 case 713:
18496 case 712:
18497 case 711:
18498 case 710:
18499 case 709:
18500 case 691:
18501 case 690:
18502 case 689:
18503 case 688:
18504 case 687:
18505 case 686:
18506 case 685:
18507 case 684:
18508 case 683:
18509 case 682:
18510 case 657:
18511 case 654:
18512 case 651:
18513 case 648:
18514 case 586:
18515 case 583:
18516 case 397:
18517 case 396:
18518 case 395:
18519 case 394:
18520 case 393:
18521 case 392:
18522 case 391:
18523 case 390:
18524 case 389:
18525 case 378:
18526 case 377:
18527 case 376:
18528 case 375:
18529 case 374:
18530 case 373:
18531 case 372:
18532 case 371:
18533 case 370:
18534 case 172:
18535 case 169:
18536 case 166:
18537 case 163:
18538 case 155:
18539 case 154:
18540 case 150:
18541 case 149:
18542 case 145:
18543 case 143:
18544 case 141:
18545 case 139:
18546 case 137:
18547 case 136:
18548 case 135:
18549 case 132:
18550 case 131:
18551 case 130:
18552 case 129:
18553 case 128:
18554 case 127:
18555 case 126:
18556 case 125:
18557 case 124:
18558 case 123:
18559 case 122:
18560 case 121:
18561 case 120:
18562 case 119:
18563 case 117:
18564 case 116:
18565 case 115:
18566 case 113:
18567 case 110:
18568 case 107:
18569 case 86:
18570 case 74:
18571 case 73:
18572 case 72:
18573 case 69:
18574 case 64:
18575 case 63:
18576 case 61:
18577 case 60:
18578 case 55:
18579 case 54:
18580 case 53:
18581 case 47:
18582 extract_insn_cached (insn);
18583 if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
18584 {
18585 return MEMORY_BOTH;
18586 }
18587 else if (memory_operand (operands[0], VOIDmode))
18588 {
18589 return MEMORY_STORE;
18590 }
18591 else if (memory_operand (operands[1], VOIDmode))
18592 {
18593 return MEMORY_LOAD;
18594 }
18595 else
18596 {
18597 return MEMORY_NONE;
18598 }
18599
18600 case 44:
18601 extract_constrain_insn_cached (insn);
18602 if (((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (((flag_pic) != (0)) && (symbolic_operand (operands[1], SImode)))))))
18603 {
18604 return MEMORY_NONE;
18605 }
18606 else if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
18607 {
18608 return MEMORY_BOTH;
18609 }
18610 else if (memory_operand (operands[0], VOIDmode))
18611 {
18612 return MEMORY_STORE;
18613 }
18614 else if ((memory_operand (operands[1], VOIDmode)) || (((((which_alternative == 2) || ((which_alternative == 3) || (which_alternative == 4))) || ((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (((flag_pic) != (0)) && (symbolic_operand (operands[1], SImode))))))) && ((((which_alternative == 2) || ((which_alternative == 3) || (which_alternative == 4))) || ((which_alternative != 5) && ((which_alternative != 6) && (which_alternative != 7)))) && ((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))))) && (memory_operand (operands[2], VOIDmode))))
18615 {
18616 return MEMORY_LOAD;
18617 }
18618 else
18619 {
18620 return MEMORY_NONE;
18621 }
18622
18623 case 407:
18624 case 406:
18625 case 405:
18626 case 404:
18627 case 403:
18628 case 402:
18629 case 401:
18630 case 400:
18631 case 399:
18632 case 398:
18633 case 359:
18634 case 358:
18635 case 357:
18636 case 356:
18637 case 355:
18638 case 354:
18639 case 353:
18640 case 352:
18641 case 351:
18642 case 350:
18643 case 345:
18644 case 339:
18645 case 319:
18646 case 317:
18647 case 297:
18648 case 295:
18649 case 242:
18650 case 111:
18651 case 108:
18652 case 106:
18653 case 81:
18654 case 80:
18655 case 62:
18656 case 56:
18657 case 43:
18658 case 42:
18659 extract_insn_cached (insn);
18660 if (memory_operand (operands[1], VOIDmode))
18661 {
18662 return MEMORY_BOTH;
18663 }
18664 else if (memory_operand (operands[0], VOIDmode))
18665 {
18666 return MEMORY_STORE;
18667 }
18668 else
18669 {
18670 return MEMORY_NONE;
18671 }
18672
18673 case 500:
18674 case 499:
18675 case 79:
18676 case 78:
18677 case 41:
18678 case 40:
18679 extract_insn_cached (insn);
18680 if (memory_operand (operands[0], VOIDmode))
18681 {
18682 return MEMORY_BOTH;
18683 }
18684 else
18685 {
18686 return MEMORY_LOAD;
18687 }
18688
18689 case 77:
18690 case 58:
18691 case 57:
18692 case 49:
18693 case 48:
18694 case 39:
18695 case 38:
18696 case 37:
18697 extract_insn_cached (insn);
18698 if (memory_operand (operands[1], VOIDmode))
18699 {
18700 return MEMORY_BOTH;
18701 }
18702 else
18703 {
18704 return MEMORY_STORE;
18705 }
18706
18707 case 967:
18708 case 966:
18709 case 965:
18710 case 964:
18711 case 963:
18712 case 962:
18713 case 904:
18714 case 903:
18715 case 902:
18716 case 901:
18717 case 900:
18718 case 899:
18719 case 860:
18720 case 859:
18721 case 858:
18722 case 828:
18723 case 827:
18724 case 826:
18725 case 825:
18726 case 824:
18727 case 823:
18728 case 776:
18729 case 775:
18730 case 774:
18731 case 773:
18732 case 772:
18733 case 771:
18734 case 502:
18735 case 501:
18736 case 283:
18737 case 282:
18738 case 281:
18739 case 280:
18740 case 279:
18741 case 278:
18742 case 277:
18743 case 276:
18744 case 36:
18745 case 35:
18746 case 34:
18747 case 33:
18748 case 32:
18749 case 31:
18750 case 27:
18751 case 24:
18752 case 23:
18753 case 21:
18754 case 20:
18755 case 19:
18756 case 17:
18757 case 16:
18758 case 15:
18759 case 14:
18760 case 13:
18761 case 12:
18762 case 11:
18763 case 10:
18764 case 9:
18765 case 8:
18766 case 7:
18767 case 6:
18768 case 5:
18769 case 4:
18770 case 3:
18771 case 2:
18772 case 1:
18773 case 0:
18774 extract_insn_cached (insn);
18775 if ((memory_operand (operands[0], VOIDmode)) || (memory_operand (operands[1], VOIDmode)))
18776 {
18777 return MEMORY_LOAD;
18778 }
18779 else
18780 {
18781 return MEMORY_NONE;
18782 }
18783
18784 case -1:
18785 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
18786 && asm_noperands (PATTERN (insn)) < 0)
18787 fatal_insn_not_found (insn);
18788 case 1024:
18789 case 1023:
18790 case 708:
18791 case 707:
18792 case 706:
18793 case 705:
18794 case 704:
18795 case 703:
18796 case 702:
18797 case 701:
18798 case 700:
18799 case 699:
18800 case 698:
18801 case 697:
18802 case 696:
18803 case 695:
18804 case 694:
18805 case 693:
18806 case 692:
18807 case 681:
18808 case 680:
18809 case 673:
18810 case 672:
18811 case 671:
18812 case 670:
18813 case 669:
18814 case 668:
18815 case 667:
18816 case 666:
18817 case 665:
18818 case 664:
18819 case 663:
18820 case 662:
18821 case 661:
18822 case 660:
18823 case 656:
18824 case 655:
18825 case 653:
18826 case 652:
18827 case 650:
18828 case 649:
18829 case 647:
18830 case 646:
18831 case 635:
18832 case 634:
18833 case 633:
18834 case 632:
18835 case 631:
18836 case 630:
18837 case 543:
18838 case 542:
18839 case 541:
18840 case 540:
18841 case 539:
18842 case 538:
18843 case 537:
18844 case 536:
18845 case 535:
18846 case 534:
18847 case 533:
18848 case 532:
18849 case 531:
18850 case 530:
18851 case 528:
18852 case 527:
18853 case 526:
18854 case 514:
18855 case 513:
18856 case 512:
18857 case 511:
18858 case 510:
18859 case 509:
18860 case 508:
18861 case 507:
18862 case 506:
18863 case 505:
18864 case 456:
18865 case 455:
18866 case 429:
18867 case 428:
18868 case 411:
18869 case 410:
18870 case 388:
18871 case 387:
18872 case 386:
18873 case 385:
18874 case 384:
18875 case 383:
18876 case 382:
18877 case 381:
18878 case 380:
18879 case 379:
18880 case 369:
18881 case 368:
18882 case 367:
18883 case 366:
18884 case 365:
18885 case 364:
18886 case 363:
18887 case 362:
18888 case 361:
18889 case 360:
18890 case 349:
18891 case 285:
18892 case 284:
18893 case 273:
18894 case 271:
18895 case 270:
18896 case 268:
18897 case 267:
18898 case 265:
18899 case 264:
18900 case 225:
18901 case 179:
18902 case 160:
18903 case 159:
18904 case 118:
18905 case 114:
18906 case 99:
18907 case 98:
18908 case 97:
18909 case 96:
18910 case 92:
18911 case 91:
18912 case 75:
18913 case 30:
18914 case 29:
18915 case 28:
18916 case 26:
18917 case 25:
18918 case 22:
18919 case 18:
18920 case 850:
18921 case 853:
18922 case 1020:
18923 case 1021:
18924 case 1022:
18925 return MEMORY_UNKNOWN;
18926
18927 case 158:
18928 case 157:
18929 case 156:
18930 case 153:
18931 case 152:
18932 case 151:
18933 case 148:
18934 case 147:
18935 case 146:
18936 case 606:
18937 case 607:
18938 case 608:
18939 case 609:
18940 case 610:
18941 case 611:
18942 case 612:
18943 case 613:
18944 case 614:
18945 case 615:
18946 case 616:
18947 case 617:
18948 return MEMORY_BOTH;
18949
18950 case 45:
18951 case 51:
18952 case 67:
18953 case 84:
18954 case 618:
18955 case 619:
18956 case 620:
18957 case 621:
18958 case 622:
18959 case 623:
18960 case 624:
18961 case 625:
18962 case 626:
18963 case 627:
18964 case 628:
18965 case 629:
18966 case 852:
18967 case 854:
18968 return MEMORY_STORE;
18969
18970 case 46:
18971 case 52:
18972 case 68:
18973 case 85:
18974 case 544:
18975 case 545:
18976 case 546:
18977 case 547:
18978 case 851:
18979 return MEMORY_LOAD;
18980
18981 case 645:
18982 case 644:
18983 case 605:
18984 case 604:
18985 case 603:
18986 case 602:
18987 case 601:
18988 case 600:
18989 case 599:
18990 case 598:
18991 case 597:
18992 case 596:
18993 case 595:
18994 case 594:
18995 case 593:
18996 case 592:
18997 case 591:
18998 case 590:
18999 case 589:
19000 case 588:
19001 case 587:
19002 case 584:
19003 case 195:
19004 case 194:
19005 case 193:
19006 case 192:
19007 case 191:
19008 case 190:
19009 case 189:
19010 case 188:
19011 case 187:
19012 case 186:
19013 case 636:
19014 case 638:
19015 case 769:
19016 case 770:
19017 case 813:
19018 case 814:
19019 case 864:
19020 case 881:
19021 case 882:
19022 case 883:
19023 case 884:
19024 case 953:
19025 return MEMORY_NONE;
19026
19027 default:
19028 extract_insn_cached (insn);
19029 if ((memory_operand (operands[0], VOIDmode)) && (memory_operand (operands[1], VOIDmode)))
19030 {
19031 return MEMORY_BOTH;
19032 }
19033 else if (memory_operand (operands[0], VOIDmode))
19034 {
19035 return MEMORY_STORE;
19036 }
19037 else if ((memory_operand (operands[1], VOIDmode)) || (memory_operand (operands[2], VOIDmode)))
19038 {
19039 return MEMORY_LOAD;
19040 }
19041 else
19042 {
19043 return MEMORY_NONE;
19044 }
19045
19046 }
19047 }
19048
19049 extern int get_attr_modrm PARAMS ((rtx));
19050 int
19051 get_attr_modrm (insn)
19052 rtx insn;
19053 {
19054 switch (recog_memoized (insn))
19055 {
19056 case 679:
19057 case 678:
19058 case 677:
19059 case 676:
19060 case 675:
19061 case 674:
19062 extract_insn_cached (insn);
19063 if (constant_call_address_operand (operands[1], VOIDmode))
19064 {
19065 return 0;
19066 }
19067 else
19068 {
19069 return 1;
19070 }
19071
19072 case 659:
19073 extract_constrain_insn_cached (insn);
19074 if (((which_alternative == 1) && (const0_operand (operands[2], DImode))) && ((register_operand (operands[0], VOIDmode)) && (immediate_operand (operands[1], VOIDmode))))
19075 {
19076 return 0;
19077 }
19078 else
19079 {
19080 return 1;
19081 }
19082
19083 case 658:
19084 extract_constrain_insn_cached (insn);
19085 if (((which_alternative == 1) && (const0_operand (operands[2], SImode))) && ((register_operand (operands[0], VOIDmode)) && (immediate_operand (operands[1], VOIDmode))))
19086 {
19087 return 0;
19088 }
19089 else
19090 {
19091 return 1;
19092 }
19093
19094 case 581:
19095 case 580:
19096 case 579:
19097 case 578:
19098 case 577:
19099 case 576:
19100 case 575:
19101 case 574:
19102 case 573:
19103 case 572:
19104 case 571:
19105 case 570:
19106 case 569:
19107 case 568:
19108 case 567:
19109 case 566:
19110 case 565:
19111 case 564:
19112 case 562:
19113 case 561:
19114 case 560:
19115 case 559:
19116 case 557:
19117 case 556:
19118 if (get_attr_unit (insn) == UNIT_I387)
19119 {
19120 return 0;
19121 }
19122 else
19123 {
19124 return 1;
19125 }
19126
19127 case 525:
19128 case 524:
19129 case 523:
19130 case 522:
19131 case 521:
19132 extract_insn_cached (insn);
19133 if (constant_call_address_operand (operands[0], VOIDmode))
19134 {
19135 return 0;
19136 }
19137 else
19138 {
19139 return 1;
19140 }
19141
19142 case 279:
19143 extract_constrain_insn_cached (insn);
19144 if (which_alternative == 0)
19145 {
19146 return 0;
19147 }
19148 else if ((which_alternative == 1) || (which_alternative == 2))
19149 {
19150 return 1;
19151 }
19152 else
19153 {
19154 return 1;
19155 }
19156
19157 case 223:
19158 case 222:
19159 case 221:
19160 case 219:
19161 case 218:
19162 case 217:
19163 case 216:
19164 extract_insn_cached (insn);
19165 if ((incdec_operand (operands[2], QImode)) && ((register_operand (operands[1], SImode)) || (register_operand (operands[1], HImode))))
19166 {
19167 return 0;
19168 }
19169 else
19170 {
19171 return 1;
19172 }
19173
19174 case 215:
19175 extract_constrain_insn_cached (insn);
19176 if (((which_alternative != 3) && (incdec_operand (operands[2], QImode))) && ((register_operand (operands[1], SImode)) || (register_operand (operands[1], HImode))))
19177 {
19178 return 0;
19179 }
19180 else
19181 {
19182 return 1;
19183 }
19184
19185 case 220:
19186 case 214:
19187 case 213:
19188 case 212:
19189 case 211:
19190 case 210:
19191 extract_insn_cached (insn);
19192 if ((incdec_operand (operands[2], HImode)) && ((register_operand (operands[1], SImode)) || (register_operand (operands[1], HImode))))
19193 {
19194 return 0;
19195 }
19196 else
19197 {
19198 return 1;
19199 }
19200
19201 case 209:
19202 extract_constrain_insn_cached (insn);
19203 if (((which_alternative != 2) && (incdec_operand (operands[2], HImode))) && ((register_operand (operands[1], SImode)) || (register_operand (operands[1], HImode))))
19204 {
19205 return 0;
19206 }
19207 else
19208 {
19209 return 1;
19210 }
19211
19212 case 208:
19213 case 207:
19214 case 206:
19215 case 205:
19216 case 204:
19217 case 203:
19218 extract_insn_cached (insn);
19219 if ((incdec_operand (operands[2], SImode)) && ((register_operand (operands[1], SImode)) || (register_operand (operands[1], HImode))))
19220 {
19221 return 0;
19222 }
19223 else
19224 {
19225 return 1;
19226 }
19227
19228 case 200:
19229 case 199:
19230 case 198:
19231 case 197:
19232 extract_insn_cached (insn);
19233 if ((incdec_operand (operands[2], DImode)) && ((register_operand (operands[1], SImode)) || (register_operand (operands[1], HImode))))
19234 {
19235 return 0;
19236 }
19237 else
19238 {
19239 return 1;
19240 }
19241
19242 case 202:
19243 case 201:
19244 case 196:
19245 extract_insn_cached (insn);
19246 if ((get_attr_type (insn) == TYPE_INCDEC) && ((register_operand (operands[1], SImode)) || (register_operand (operands[1], HImode))))
19247 {
19248 return 0;
19249 }
19250 else
19251 {
19252 return 1;
19253 }
19254
19255 case 135:
19256 extract_constrain_insn_cached (insn);
19257 if (which_alternative != 0)
19258 {
19259 return 0;
19260 }
19261 else
19262 {
19263 return 1;
19264 }
19265
19266 case 643:
19267 case 642:
19268 case 641:
19269 case 127:
19270 extract_constrain_insn_cached (insn);
19271 if ((which_alternative == 0) || (which_alternative == 1))
19272 {
19273 return 0;
19274 }
19275 else
19276 {
19277 return 1;
19278 }
19279
19280 case 124:
19281 case 123:
19282 case 122:
19283 extract_constrain_insn_cached (insn);
19284 if ((! (((ix86_cpu) == (CPU_K6)))) && (which_alternative == 0))
19285 {
19286 return 0;
19287 }
19288 else
19289 {
19290 return 1;
19291 }
19292
19293 case 115:
19294 extract_constrain_insn_cached (insn);
19295 if ((which_alternative == 1) && ((register_operand (operands[0], VOIDmode)) && (immediate_operand (operands[1], VOIDmode))))
19296 {
19297 return 0;
19298 }
19299 else
19300 {
19301 return 1;
19302 }
19303
19304 case 103:
19305 case 102:
19306 case 101:
19307 case 100:
19308 case 94:
19309 case 93:
19310 extract_constrain_insn_cached (insn);
19311 if ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))
19312 {
19313 return 0;
19314 }
19315 else
19316 {
19317 return 1;
19318 }
19319
19320 case 89:
19321 extract_constrain_insn_cached (insn);
19322 if ((which_alternative == 0) || ((which_alternative == 1) || ((which_alternative == 2) || (((which_alternative == 3) || (which_alternative == 4)) && ((register_operand (operands[0], VOIDmode)) && (immediate_operand (operands[1], VOIDmode)))))))
19323 {
19324 return 0;
19325 }
19326 else
19327 {
19328 return 1;
19329 }
19330
19331 case 88:
19332 case 87:
19333 extract_constrain_insn_cached (insn);
19334 if ((which_alternative == 1) && (! (memory_operand (operands[1], VOIDmode))))
19335 {
19336 return 0;
19337 }
19338 else
19339 {
19340 return 1;
19341 }
19342
19343 case 83:
19344 extract_constrain_insn_cached (insn);
19345 if (which_alternative == 0)
19346 {
19347 if (((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], DImode)))) && ((register_operand (operands[0], VOIDmode)) && (immediate_operand (operands[1], VOIDmode))))
19348 {
19349 return 0;
19350 }
19351 else
19352 {
19353 return 1;
19354 }
19355 }
19356 else if ((which_alternative == 1) || (which_alternative == 2))
19357 {
19358 return 0;
19359 }
19360 else
19361 {
19362 if ((((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative != 7) && ((which_alternative != 8) && ((which_alternative != 9) && ((which_alternative != 4) && ((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], DImode))))))))) && ((register_operand (operands[0], VOIDmode)) && (immediate_operand (operands[1], VOIDmode))))
19363 {
19364 return 0;
19365 }
19366 else
19367 {
19368 return 1;
19369 }
19370 }
19371
19372 case 76:
19373 extract_constrain_insn_cached (insn);
19374 if ((which_alternative == 0) && (! (memory_operand (operands[1], VOIDmode))))
19375 {
19376 return 0;
19377 }
19378 else
19379 {
19380 return 1;
19381 }
19382
19383 case 71:
19384 extract_constrain_insn_cached (insn);
19385 if (((q_regs_operand (operands[0], QImode)) && (! ((TARGET_MOVX) != (0)))) && ((register_operand (operands[0], VOIDmode)) && (immediate_operand (operands[1], VOIDmode))))
19386 {
19387 return 0;
19388 }
19389 else
19390 {
19391 return 1;
19392 }
19393
19394 case 59:
19395 extract_constrain_insn_cached (insn);
19396 if ((((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2)))))) && ((register_operand (operands[0], VOIDmode)) && (immediate_operand (operands[1], VOIDmode))))
19397 {
19398 return 0;
19399 }
19400 else
19401 {
19402 return 1;
19403 }
19404
19405 case 74:
19406 case 73:
19407 case 72:
19408 case 61:
19409 case 55:
19410 extract_insn_cached (insn);
19411 if ((register_operand (operands[0], VOIDmode)) && (immediate_operand (operands[1], VOIDmode)))
19412 {
19413 return 0;
19414 }
19415 else
19416 {
19417 return 1;
19418 }
19419
19420 case 70:
19421 case 66:
19422 case 65:
19423 case 50:
19424 extract_insn_cached (insn);
19425 if ((get_attr_type (insn) == TYPE_IMOV) && ((register_operand (operands[0], VOIDmode)) && (immediate_operand (operands[1], VOIDmode))))
19426 {
19427 return 0;
19428 }
19429 else
19430 {
19431 return 1;
19432 }
19433
19434 case 85:
19435 case 84:
19436 case 68:
19437 case 67:
19438 case 52:
19439 case 51:
19440 case 46:
19441 case 45:
19442 extract_constrain_insn_cached (insn);
19443 if (which_alternative == 0)
19444 {
19445 return 0;
19446 }
19447 else
19448 {
19449 if ((register_operand (operands[0], VOIDmode)) && (immediate_operand (operands[1], VOIDmode)))
19450 {
19451 return 0;
19452 }
19453 else
19454 {
19455 return 1;
19456 }
19457 }
19458
19459 case 44:
19460 extract_constrain_insn_cached (insn);
19461 if ((((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && ((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], SImode)))))))) && ((register_operand (operands[0], VOIDmode)) && (immediate_operand (operands[1], VOIDmode))))
19462 {
19463 return 0;
19464 }
19465 else
19466 {
19467 return 1;
19468 }
19469
19470 case 79:
19471 case 78:
19472 case 41:
19473 case 40:
19474 extract_insn_cached (insn);
19475 if (! (memory_operand (operands[0], VOIDmode)))
19476 {
19477 return 0;
19478 }
19479 else
19480 {
19481 return 1;
19482 }
19483
19484 case 77:
19485 case 58:
19486 case 57:
19487 case 49:
19488 case 48:
19489 case 39:
19490 case 38:
19491 case 37:
19492 extract_insn_cached (insn);
19493 if (! (memory_operand (operands[1], VOIDmode)))
19494 {
19495 return 0;
19496 }
19497 else
19498 {
19499 return 1;
19500 }
19501
19502 case 276:
19503 extract_constrain_insn_cached (insn);
19504 if (which_alternative == 0)
19505 {
19506 return 0;
19507 }
19508 else if (which_alternative == 1)
19509 {
19510 return 1;
19511 }
19512 else if (which_alternative == 2)
19513 {
19514 return 0;
19515 }
19516 else if (which_alternative == 3)
19517 {
19518 return 1;
19519 }
19520 else
19521 {
19522 return 1;
19523 }
19524
19525 case 277:
19526 case 278:
19527 extract_constrain_insn_cached (insn);
19528 if (which_alternative == 0)
19529 {
19530 return 0;
19531 }
19532 else if (which_alternative == 1)
19533 {
19534 return 1;
19535 }
19536 else
19537 {
19538 return 1;
19539 }
19540
19541 case 585:
19542 case 582:
19543 case 552:
19544 case 549:
19545 case 178:
19546 case 177:
19547 case 176:
19548 case 175:
19549 case 174:
19550 case 173:
19551 case 171:
19552 case 170:
19553 case 168:
19554 case 167:
19555 case 165:
19556 case 164:
19557 case 162:
19558 case 161:
19559 case 144:
19560 case 142:
19561 case 140:
19562 case 138:
19563 case 134:
19564 case 133:
19565 case 35:
19566 case 32:
19567 case 119:
19568 case 423:
19569 case 431:
19570 case 432:
19571 extract_constrain_insn_cached (insn);
19572 if (which_alternative == 0)
19573 {
19574 return 0;
19575 }
19576 else
19577 {
19578 return 1;
19579 }
19580
19581 case 645:
19582 case 644:
19583 case 635:
19584 case 634:
19585 case 633:
19586 case 632:
19587 case 631:
19588 case 630:
19589 case 629:
19590 case 628:
19591 case 627:
19592 case 626:
19593 case 625:
19594 case 624:
19595 case 623:
19596 case 622:
19597 case 621:
19598 case 620:
19599 case 619:
19600 case 618:
19601 case 617:
19602 case 616:
19603 case 615:
19604 case 614:
19605 case 613:
19606 case 612:
19607 case 611:
19608 case 610:
19609 case 609:
19610 case 608:
19611 case 607:
19612 case 606:
19613 case 605:
19614 case 604:
19615 case 603:
19616 case 602:
19617 case 601:
19618 case 600:
19619 case 599:
19620 case 598:
19621 case 597:
19622 case 596:
19623 case 595:
19624 case 594:
19625 case 593:
19626 case 592:
19627 case 591:
19628 case 590:
19629 case 589:
19630 case 588:
19631 case 587:
19632 case 584:
19633 case 555:
19634 case 554:
19635 case 551:
19636 case 548:
19637 case 397:
19638 case 396:
19639 case 395:
19640 case 394:
19641 case 393:
19642 case 392:
19643 case 391:
19644 case 390:
19645 case 389:
19646 case 378:
19647 case 377:
19648 case 376:
19649 case 375:
19650 case 374:
19651 case 373:
19652 case 372:
19653 case 371:
19654 case 370:
19655 case 160:
19656 case 159:
19657 case 158:
19658 case 157:
19659 case 156:
19660 case 153:
19661 case 152:
19662 case 151:
19663 case 148:
19664 case 147:
19665 case 146:
19666 case 145:
19667 case 143:
19668 case 141:
19669 case 139:
19670 case 136:
19671 case 132:
19672 case 131:
19673 case 130:
19674 case 129:
19675 case 105:
19676 case 104:
19677 case 95:
19678 case 90:
19679 case 34:
19680 case 31:
19681 case 29:
19682 case 27:
19683 case 24:
19684 case 23:
19685 case 21:
19686 case 20:
19687 case 19:
19688 case 47:
19689 case 53:
19690 case 54:
19691 case 60:
19692 case 86:
19693 case 503:
19694 case 504:
19695 case 515:
19696 case 527:
19697 case 528:
19698 case 530:
19699 case 534:
19700 case 535:
19701 case 544:
19702 case 545:
19703 case 546:
19704 case 547:
19705 case 854:
19706 return 0;
19707
19708 case -1:
19709 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
19710 && asm_noperands (PATTERN (insn)) < 0)
19711 fatal_insn_not_found (insn);
19712 default:
19713 return 1;
19714
19715 }
19716 }
19717
19718 extern enum attr_mode get_attr_mode PARAMS ((rtx));
19719 enum attr_mode
19720 get_attr_mode (insn)
19721 rtx insn;
19722 {
19723 switch (recog_memoized (insn))
19724 {
19725 case 641:
19726 extract_constrain_insn_cached (insn);
19727 if ((which_alternative == 0) || (which_alternative == 1))
19728 {
19729 return MODE_SF;
19730 }
19731 else
19732 {
19733 return MODE_SI;
19734 }
19735
19736 case 279:
19737 extract_constrain_insn_cached (insn);
19738 if ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))
19739 {
19740 return MODE_QI;
19741 }
19742 else
19743 {
19744 return MODE_SI;
19745 }
19746
19747 case 276:
19748 extract_constrain_insn_cached (insn);
19749 if ((which_alternative == 0) || (which_alternative == 1))
19750 {
19751 return MODE_SI;
19752 }
19753 else
19754 {
19755 return MODE_DI;
19756 }
19757
19758 case 338:
19759 case 316:
19760 case 296:
19761 case 294:
19762 case 216:
19763 case 215:
19764 extract_constrain_insn_cached (insn);
19765 if ((which_alternative == 0) || (which_alternative == 1))
19766 {
19767 return MODE_QI;
19768 }
19769 else
19770 {
19771 return MODE_SI;
19772 }
19773
19774 case 292:
19775 case 209:
19776 extract_constrain_insn_cached (insn);
19777 if ((which_alternative == 0) || (which_alternative == 1))
19778 {
19779 return MODE_HI;
19780 }
19781 else
19782 {
19783 return MODE_SI;
19784 }
19785
19786 case 134:
19787 extract_constrain_insn_cached (insn);
19788 if ((which_alternative == 0) || ((which_alternative == 1) || ((which_alternative == 2) || (which_alternative == 3))))
19789 {
19790 return MODE_SF;
19791 }
19792 else
19793 {
19794 return MODE_DF;
19795 }
19796
19797 case 103:
19798 case 102:
19799 case 101:
19800 case 100:
19801 extract_constrain_insn_cached (insn);
19802 if ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))
19803 {
19804 return MODE_XF;
19805 }
19806 else
19807 {
19808 return MODE_SI;
19809 }
19810
19811 case 94:
19812 case 93:
19813 extract_constrain_insn_cached (insn);
19814 if ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))
19815 {
19816 return MODE_DF;
19817 }
19818 else if ((which_alternative == 3) || (which_alternative == 4))
19819 {
19820 return MODE_SI;
19821 }
19822 else if (which_alternative == 5)
19823 {
19824 return MODE_TI;
19825 }
19826 else
19827 {
19828 return MODE_DF;
19829 }
19830
19831 case 91:
19832 extract_constrain_insn_cached (insn);
19833 if (which_alternative == 0)
19834 {
19835 return MODE_DF;
19836 }
19837 else if ((which_alternative == 1) || (which_alternative == 2))
19838 {
19839 return MODE_SI;
19840 }
19841 else
19842 {
19843 return MODE_DF;
19844 }
19845
19846 case 89:
19847 extract_constrain_insn_cached (insn);
19848 if ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))
19849 {
19850 return MODE_SF;
19851 }
19852 else if ((which_alternative == 3) || (which_alternative == 4))
19853 {
19854 return MODE_SI;
19855 }
19856 else if (which_alternative == 5)
19857 {
19858 return MODE_TI;
19859 }
19860 else if ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8)))
19861 {
19862 return MODE_SF;
19863 }
19864 else if ((which_alternative == 9) || (which_alternative == 10))
19865 {
19866 return MODE_SI;
19867 }
19868 else
19869 {
19870 return MODE_DI;
19871 }
19872
19873 case 83:
19874 extract_constrain_insn_cached (insn);
19875 if (which_alternative == 0)
19876 {
19877 return MODE_SI;
19878 }
19879 else if ((which_alternative == 1) || ((which_alternative == 2) || (which_alternative == 3)))
19880 {
19881 return MODE_DI;
19882 }
19883 else if (which_alternative == 4)
19884 {
19885 return MODE_SI;
19886 }
19887 else if ((which_alternative == 5) || ((which_alternative == 6) || (which_alternative == 7)))
19888 {
19889 return MODE_DI;
19890 }
19891 else if (which_alternative == 8)
19892 {
19893 return MODE_TI;
19894 }
19895 else
19896 {
19897 return MODE_DI;
19898 }
19899
19900 case 82:
19901 extract_constrain_insn_cached (insn);
19902 if ((which_alternative == 0) || ((which_alternative == 1) || ((which_alternative == 2) || ((which_alternative == 3) || (which_alternative == 4)))))
19903 {
19904 return MODE_DI;
19905 }
19906 else if (which_alternative == 5)
19907 {
19908 return MODE_TI;
19909 }
19910 else
19911 {
19912 return MODE_DI;
19913 }
19914
19915 case 71:
19916 extract_constrain_insn_cached (insn);
19917 if ((! (q_regs_operand (operands[0], QImode))) || ((TARGET_MOVX) != (0)))
19918 {
19919 return MODE_SI;
19920 }
19921 else
19922 {
19923 return MODE_QI;
19924 }
19925
19926 case 59:
19927 extract_constrain_insn_cached (insn);
19928 if ((which_alternative == 3) || ((which_alternative == 4) || (which_alternative == 5)))
19929 {
19930 return MODE_SI;
19931 }
19932 else if (which_alternative == 6)
19933 {
19934 return MODE_QI;
19935 }
19936 else if ((((TARGET_MOVX) != (0)) && (which_alternative == 2)) || (((! ((TARGET_MOVX) != (0))) || (which_alternative != 2)) && (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && (((TARGET_PARTIAL_REG_DEPENDENCY) != (0)) || (((TARGET_PARTIAL_REG_STALL) != (0)) && ((TARGET_QIMODE_MATH) == (0)))))))
19937 {
19938 return MODE_SI;
19939 }
19940 else
19941 {
19942 return MODE_QI;
19943 }
19944
19945 case 50:
19946 extract_constrain_insn_cached (insn);
19947 if (((((which_alternative != 0) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_HIMODE_MATH) == (0))))) && (((which_alternative != 1) && (which_alternative != 2)) || (! (aligned_operand (operands[1], HImode))))) && (((TARGET_MOVX) != (0)) && ((which_alternative == 0) || (which_alternative == 2)))) || ((((which_alternative == 1) || (which_alternative == 2)) && (aligned_operand (operands[1], HImode))) || ((which_alternative == 0) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_HIMODE_MATH) == (0))))))
19948 {
19949 return MODE_SI;
19950 }
19951 else
19952 {
19953 return MODE_HI;
19954 }
19955
19956 case 44:
19957 extract_constrain_insn_cached (insn);
19958 if ((which_alternative == 0) || ((which_alternative == 1) || ((which_alternative == 2) || (which_alternative == 3))))
19959 {
19960 return MODE_SI;
19961 }
19962 else if (which_alternative == 4)
19963 {
19964 return MODE_DI;
19965 }
19966 else if (which_alternative == 5)
19967 {
19968 return MODE_TI;
19969 }
19970 else
19971 {
19972 return MODE_SI;
19973 }
19974
19975 case 65:
19976 case 66:
19977 case 70:
19978 if (get_attr_type (insn) == TYPE_IMOVX)
19979 {
19980 return MODE_SI;
19981 }
19982 else
19983 {
19984 return MODE_QI;
19985 }
19986
19987 case 87:
19988 extract_constrain_insn_cached (insn);
19989 if (which_alternative == 0)
19990 {
19991 return MODE_SF;
19992 }
19993 else if (which_alternative == 1)
19994 {
19995 return MODE_SI;
19996 }
19997 else
19998 {
19999 return MODE_SF;
20000 }
20001
20002 case 88:
20003 extract_constrain_insn_cached (insn);
20004 if (which_alternative == 0)
20005 {
20006 return MODE_SF;
20007 }
20008 else if (which_alternative == 1)
20009 {
20010 return MODE_DI;
20011 }
20012 else
20013 {
20014 return MODE_SF;
20015 }
20016
20017 case 92:
20018 extract_constrain_insn_cached (insn);
20019 if (which_alternative == 0)
20020 {
20021 return MODE_DF;
20022 }
20023 else if (which_alternative == 1)
20024 {
20025 return MODE_SI;
20026 }
20027 else
20028 {
20029 return MODE_DF;
20030 }
20031
20032 case 97:
20033 case 96:
20034 case 98:
20035 case 99:
20036 extract_constrain_insn_cached (insn);
20037 if (which_alternative == 0)
20038 {
20039 return MODE_XF;
20040 }
20041 else
20042 {
20043 return MODE_SI;
20044 }
20045
20046 case 287:
20047 case 286:
20048 case 115:
20049 case 116:
20050 case 117:
20051 extract_constrain_insn_cached (insn);
20052 if (which_alternative == 0)
20053 {
20054 return MODE_SI;
20055 }
20056 else
20057 {
20058 return MODE_DI;
20059 }
20060
20061 case 127:
20062 extract_constrain_insn_cached (insn);
20063 if (which_alternative == 0)
20064 {
20065 return MODE_SF;
20066 }
20067 else if (which_alternative == 1)
20068 {
20069 return MODE_XF;
20070 }
20071 else
20072 {
20073 return MODE_DF;
20074 }
20075
20076 case 129:
20077 case 130:
20078 extract_constrain_insn_cached (insn);
20079 if (which_alternative == 0)
20080 {
20081 return MODE_SF;
20082 }
20083 else
20084 {
20085 return MODE_XF;
20086 }
20087
20088 case 131:
20089 case 132:
20090 extract_constrain_insn_cached (insn);
20091 if (which_alternative == 0)
20092 {
20093 return MODE_DF;
20094 }
20095 else
20096 {
20097 return MODE_XF;
20098 }
20099
20100 case 135:
20101 extract_constrain_insn_cached (insn);
20102 if (which_alternative == 0)
20103 {
20104 return MODE_DF;
20105 }
20106 else
20107 {
20108 return MODE_SF;
20109 }
20110
20111 case 417:
20112 extract_constrain_insn_cached (insn);
20113 if (which_alternative == 0)
20114 {
20115 return MODE_HI;
20116 }
20117 else
20118 {
20119 return MODE_SI;
20120 }
20121
20122 case 420:
20123 case 406:
20124 case 421:
20125 extract_constrain_insn_cached (insn);
20126 if (which_alternative == 0)
20127 {
20128 return MODE_QI;
20129 }
20130 else
20131 {
20132 return MODE_SI;
20133 }
20134
20135 case 855:
20136 case 856:
20137 case 857:
20138 case 858:
20139 case 859:
20140 case 860:
20141 case 861:
20142 case 862:
20143 case 863:
20144 case 865:
20145 case 866:
20146 case 867:
20147 case 868:
20148 case 869:
20149 case 870:
20150 case 871:
20151 return MODE_V2SF;
20152
20153 case 689:
20154 case 753:
20155 case 754:
20156 case 755:
20157 case 756:
20158 case 757:
20159 case 758:
20160 case 759:
20161 case 760:
20162 case 885:
20163 case 887:
20164 case 889:
20165 case 891:
20166 case 893:
20167 case 895:
20168 case 897:
20169 case 899:
20170 case 900:
20171 case 905:
20172 case 906:
20173 case 909:
20174 case 911:
20175 case 912:
20176 case 915:
20177 case 930:
20178 case 1003:
20179 case 1004:
20180 case 1014:
20181 case 1015:
20182 case 1019:
20183 case 1026:
20184 case 1028:
20185 case 1030:
20186 return MODE_V2DF;
20187
20188 case 682:
20189 case 683:
20190 case 684:
20191 case 690:
20192 case 691:
20193 case 713:
20194 case 714:
20195 case 715:
20196 case 716:
20197 case 717:
20198 case 718:
20199 case 721:
20200 case 723:
20201 case 724:
20202 case 725:
20203 case 726:
20204 case 730:
20205 case 731:
20206 case 733:
20207 case 735:
20208 case 737:
20209 case 739:
20210 case 741:
20211 case 743:
20212 case 745:
20213 case 746:
20214 case 747:
20215 case 748:
20216 case 749:
20217 case 750:
20218 case 751:
20219 case 752:
20220 case 769:
20221 case 770:
20222 case 771:
20223 case 772:
20224 case 777:
20225 case 778:
20226 case 779:
20227 case 781:
20228 case 783:
20229 case 784:
20230 case 929:
20231 case 1025:
20232 case 1027:
20233 case 1029:
20234 case 1031:
20235 case 1032:
20236 return MODE_V4SF;
20237
20238 case 761:
20239 case 762:
20240 case 763:
20241 case 764:
20242 case 765:
20243 case 766:
20244 case 767:
20245 case 768:
20246 case 872:
20247 case 873:
20248 case 874:
20249 case 875:
20250 case 876:
20251 case 877:
20252 case 878:
20253 case 879:
20254 case 880:
20255 case 907:
20256 case 908:
20257 case 910:
20258 case 913:
20259 case 914:
20260 case 916:
20261 case 917:
20262 case 918:
20263 case 919:
20264 case 920:
20265 case 931:
20266 case 932:
20267 case 933:
20268 case 934:
20269 case 935:
20270 case 936:
20271 case 937:
20272 case 938:
20273 case 939:
20274 case 940:
20275 case 941:
20276 case 942:
20277 case 943:
20278 case 944:
20279 case 945:
20280 case 946:
20281 case 947:
20282 case 948:
20283 case 949:
20284 case 950:
20285 case 951:
20286 case 952:
20287 case 953:
20288 case 954:
20289 case 955:
20290 case 956:
20291 case 957:
20292 case 958:
20293 case 959:
20294 case 960:
20295 case 961:
20296 case 962:
20297 case 963:
20298 case 964:
20299 case 965:
20300 case 966:
20301 case 967:
20302 case 968:
20303 case 969:
20304 case 970:
20305 case 971:
20306 case 972:
20307 case 973:
20308 case 974:
20309 case 975:
20310 case 976:
20311 case 977:
20312 case 978:
20313 case 979:
20314 case 980:
20315 case 981:
20316 case 982:
20317 case 983:
20318 case 984:
20319 case 985:
20320 case 986:
20321 case 987:
20322 case 988:
20323 case 989:
20324 case 990:
20325 case 991:
20326 case 992:
20327 case 993:
20328 case 994:
20329 case 995:
20330 case 996:
20331 case 997:
20332 case 998:
20333 case 999:
20334 case 1000:
20335 case 1001:
20336 case 1002:
20337 case 1005:
20338 case 1006:
20339 case 1007:
20340 case 1008:
20341 case 1009:
20342 case 1010:
20343 case 1011:
20344 case 1012:
20345 case 1013:
20346 case 1033:
20347 return MODE_TI;
20348
20349 case 23:
20350 case 24:
20351 case 25:
20352 case 26:
20353 case 104:
20354 case 105:
20355 case 173:
20356 case 174:
20357 case 175:
20358 case 176:
20359 case 177:
20360 case 178:
20361 case 373:
20362 case 374:
20363 case 375:
20364 case 376:
20365 case 377:
20366 case 378:
20367 case 393:
20368 case 394:
20369 case 396:
20370 case 397:
20371 case 554:
20372 case 555:
20373 case 568:
20374 case 569:
20375 case 589:
20376 case 590:
20377 case 591:
20378 case 592:
20379 case 593:
20380 case 594:
20381 case 598:
20382 case 599:
20383 case 603:
20384 case 604:
20385 case 644:
20386 case 645:
20387 return MODE_XF;
20388
20389 case 21:
20390 case 22:
20391 case 95:
20392 case 128:
20393 case 137:
20394 case 142:
20395 case 143:
20396 case 144:
20397 case 145:
20398 case 167:
20399 case 168:
20400 case 169:
20401 case 170:
20402 case 171:
20403 case 172:
20404 case 371:
20405 case 372:
20406 case 390:
20407 case 391:
20408 case 392:
20409 case 395:
20410 case 502:
20411 case 551:
20412 case 552:
20413 case 553:
20414 case 561:
20415 case 562:
20416 case 563:
20417 case 578:
20418 case 579:
20419 case 580:
20420 case 581:
20421 case 585:
20422 case 586:
20423 case 587:
20424 case 588:
20425 case 595:
20426 case 597:
20427 case 600:
20428 case 602:
20429 case 642:
20430 case 643:
20431 case 651:
20432 case 657:
20433 case 886:
20434 case 888:
20435 case 890:
20436 case 892:
20437 case 894:
20438 case 896:
20439 case 901:
20440 case 902:
20441 case 903:
20442 case 904:
20443 case 925:
20444 case 926:
20445 case 928:
20446 case 1016:
20447 case 1017:
20448 case 1018:
20449 case 1034:
20450 case 1035:
20451 return MODE_DF;
20452
20453 case 19:
20454 case 20:
20455 case 90:
20456 case 133:
20457 case 136:
20458 case 138:
20459 case 139:
20460 case 140:
20461 case 141:
20462 case 161:
20463 case 162:
20464 case 163:
20465 case 164:
20466 case 165:
20467 case 166:
20468 case 370:
20469 case 389:
20470 case 501:
20471 case 548:
20472 case 549:
20473 case 550:
20474 case 556:
20475 case 557:
20476 case 558:
20477 case 566:
20478 case 567:
20479 case 574:
20480 case 575:
20481 case 576:
20482 case 577:
20483 case 582:
20484 case 583:
20485 case 584:
20486 case 596:
20487 case 601:
20488 case 648:
20489 case 654:
20490 case 727:
20491 case 728:
20492 case 729:
20493 case 732:
20494 case 734:
20495 case 736:
20496 case 738:
20497 case 740:
20498 case 742:
20499 case 744:
20500 case 773:
20501 case 774:
20502 case 775:
20503 case 776:
20504 case 780:
20505 case 782:
20506 case 785:
20507 case 786:
20508 case 787:
20509 case 788:
20510 case 789:
20511 case 790:
20512 case 791:
20513 case 898:
20514 case 927:
20515 return MODE_SF;
20516
20517 case 18:
20518 case 27:
20519 case 28:
20520 case 31:
20521 case 32:
20522 case 33:
20523 case 34:
20524 case 35:
20525 case 36:
20526 return MODE_UNKNOWNFP;
20527
20528 case 0:
20529 case 1:
20530 case 2:
20531 case 76:
20532 case 77:
20533 case 78:
20534 case 79:
20535 case 81:
20536 case 84:
20537 case 85:
20538 case 86:
20539 case 119:
20540 case 120:
20541 case 121:
20542 case 180:
20543 case 181:
20544 case 189:
20545 case 196:
20546 case 197:
20547 case 198:
20548 case 199:
20549 case 200:
20550 case 226:
20551 case 227:
20552 case 228:
20553 case 229:
20554 case 237:
20555 case 245:
20556 case 252:
20557 case 254:
20558 case 256:
20559 case 259:
20560 case 266:
20561 case 271:
20562 case 272:
20563 case 303:
20564 case 304:
20565 case 305:
20566 case 325:
20567 case 326:
20568 case 327:
20569 case 350:
20570 case 351:
20571 case 398:
20572 case 399:
20573 case 408:
20574 case 409:
20575 case 423:
20576 case 425:
20577 case 427:
20578 case 452:
20579 case 454:
20580 case 476:
20581 case 488:
20582 case 606:
20583 case 613:
20584 case 618:
20585 case 625:
20586 case 636:
20587 case 637:
20588 case 659:
20589 case 685:
20590 case 686:
20591 case 687:
20592 case 688:
20593 case 719:
20594 case 720:
20595 case 722:
20596 case 792:
20597 case 793:
20598 case 794:
20599 case 795:
20600 case 796:
20601 case 797:
20602 case 798:
20603 case 799:
20604 case 800:
20605 case 801:
20606 case 802:
20607 case 803:
20608 case 804:
20609 case 805:
20610 case 806:
20611 case 807:
20612 case 808:
20613 case 809:
20614 case 810:
20615 case 811:
20616 case 812:
20617 case 813:
20618 case 814:
20619 case 815:
20620 case 816:
20621 case 817:
20622 case 818:
20623 case 819:
20624 case 820:
20625 case 821:
20626 case 822:
20627 case 823:
20628 case 824:
20629 case 825:
20630 case 826:
20631 case 827:
20632 case 828:
20633 case 829:
20634 case 830:
20635 case 831:
20636 case 832:
20637 case 833:
20638 case 834:
20639 case 835:
20640 case 836:
20641 case 837:
20642 case 838:
20643 case 839:
20644 case 840:
20645 case 841:
20646 case 842:
20647 case 843:
20648 case 844:
20649 case 845:
20650 case 846:
20651 case 847:
20652 case 848:
20653 case 849:
20654 case 854:
20655 case 924:
20656 return MODE_DI;
20657
20658 case 3:
20659 case 4:
20660 case 5:
20661 case 29:
20662 case 30:
20663 case 37:
20664 case 38:
20665 case 39:
20666 case 40:
20667 case 41:
20668 case 42:
20669 case 43:
20670 case 45:
20671 case 46:
20672 case 47:
20673 case 54:
20674 case 63:
20675 case 64:
20676 case 69:
20677 case 80:
20678 case 106:
20679 case 107:
20680 case 111:
20681 case 112:
20682 case 113:
20683 case 114:
20684 case 122:
20685 case 123:
20686 case 125:
20687 case 126:
20688 case 182:
20689 case 183:
20690 case 184:
20691 case 186:
20692 case 187:
20693 case 188:
20694 case 190:
20695 case 191:
20696 case 192:
20697 case 193:
20698 case 194:
20699 case 195:
20700 case 201:
20701 case 202:
20702 case 203:
20703 case 204:
20704 case 205:
20705 case 206:
20706 case 207:
20707 case 208:
20708 case 213:
20709 case 230:
20710 case 231:
20711 case 232:
20712 case 233:
20713 case 234:
20714 case 235:
20715 case 236:
20716 case 246:
20717 case 247:
20718 case 253:
20719 case 255:
20720 case 257:
20721 case 258:
20722 case 260:
20723 case 261:
20724 case 269:
20725 case 270:
20726 case 273:
20727 case 274:
20728 case 277:
20729 case 288:
20730 case 289:
20731 case 290:
20732 case 291:
20733 case 306:
20734 case 307:
20735 case 308:
20736 case 309:
20737 case 310:
20738 case 311:
20739 case 312:
20740 case 328:
20741 case 329:
20742 case 330:
20743 case 331:
20744 case 332:
20745 case 333:
20746 case 334:
20747 case 352:
20748 case 353:
20749 case 354:
20750 case 355:
20751 case 400:
20752 case 401:
20753 case 402:
20754 case 403:
20755 case 412:
20756 case 413:
20757 case 414:
20758 case 415:
20759 case 416:
20760 case 430:
20761 case 431:
20762 case 432:
20763 case 435:
20764 case 436:
20765 case 439:
20766 case 440:
20767 case 459:
20768 case 460:
20769 case 463:
20770 case 464:
20771 case 479:
20772 case 480:
20773 case 491:
20774 case 492:
20775 case 559:
20776 case 560:
20777 case 564:
20778 case 565:
20779 case 570:
20780 case 571:
20781 case 572:
20782 case 573:
20783 case 607:
20784 case 608:
20785 case 614:
20786 case 615:
20787 case 616:
20788 case 617:
20789 case 619:
20790 case 620:
20791 case 626:
20792 case 627:
20793 case 638:
20794 case 639:
20795 case 658:
20796 case 921:
20797 case 922:
20798 case 923:
20799 return MODE_SI;
20800
20801 case 6:
20802 case 7:
20803 case 8:
20804 case 48:
20805 case 51:
20806 case 52:
20807 case 53:
20808 case 55:
20809 case 56:
20810 case 57:
20811 case 108:
20812 case 109:
20813 case 110:
20814 case 124:
20815 case 159:
20816 case 160:
20817 case 210:
20818 case 211:
20819 case 212:
20820 case 214:
20821 case 238:
20822 case 239:
20823 case 240:
20824 case 248:
20825 case 275:
20826 case 278:
20827 case 293:
20828 case 313:
20829 case 314:
20830 case 315:
20831 case 335:
20832 case 336:
20833 case 337:
20834 case 356:
20835 case 357:
20836 case 404:
20837 case 405:
20838 case 418:
20839 case 419:
20840 case 442:
20841 case 444:
20842 case 466:
20843 case 468:
20844 case 482:
20845 case 494:
20846 case 609:
20847 case 610:
20848 case 621:
20849 case 622:
20850 case 640:
20851 return MODE_HI;
20852
20853 case 9:
20854 case 10:
20855 case 11:
20856 case 12:
20857 case 13:
20858 case 14:
20859 case 15:
20860 case 16:
20861 case 17:
20862 case 49:
20863 case 58:
20864 case 60:
20865 case 61:
20866 case 62:
20867 case 67:
20868 case 68:
20869 case 72:
20870 case 73:
20871 case 74:
20872 case 185:
20873 case 217:
20874 case 218:
20875 case 219:
20876 case 220:
20877 case 221:
20878 case 222:
20879 case 223:
20880 case 224:
20881 case 241:
20882 case 242:
20883 case 243:
20884 case 244:
20885 case 249:
20886 case 250:
20887 case 251:
20888 case 262:
20889 case 263:
20890 case 280:
20891 case 281:
20892 case 282:
20893 case 283:
20894 case 295:
20895 case 297:
20896 case 298:
20897 case 299:
20898 case 300:
20899 case 301:
20900 case 302:
20901 case 317:
20902 case 318:
20903 case 319:
20904 case 320:
20905 case 321:
20906 case 322:
20907 case 323:
20908 case 324:
20909 case 339:
20910 case 340:
20911 case 341:
20912 case 342:
20913 case 343:
20914 case 344:
20915 case 345:
20916 case 346:
20917 case 347:
20918 case 348:
20919 case 358:
20920 case 359:
20921 case 407:
20922 case 422:
20923 case 447:
20924 case 448:
20925 case 450:
20926 case 471:
20927 case 472:
20928 case 474:
20929 case 485:
20930 case 486:
20931 case 497:
20932 case 498:
20933 case 499:
20934 case 500:
20935 case 611:
20936 case 612:
20937 case 623:
20938 case 624:
20939 case 628:
20940 case 629:
20941 case 630:
20942 case 631:
20943 case 632:
20944 case 633:
20945 case 634:
20946 case 635:
20947 return MODE_QI;
20948
20949 case -1:
20950 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
20951 && asm_noperands (PATTERN (insn)) < 0)
20952 fatal_insn_not_found (insn);
20953 default:
20954 return MODE_UNKNOWN;
20955
20956 }
20957 }
20958
20959 extern enum attr_ppro_uops get_attr_ppro_uops PARAMS ((rtx));
20960 enum attr_ppro_uops
20961 get_attr_ppro_uops (insn)
20962 rtx insn;
20963 {
20964 switch (recog_memoized (insn))
20965 {
20966 case 659:
20967 extract_constrain_insn_cached (insn);
20968 if ((which_alternative == 1) && (const0_operand (operands[2], DImode)))
20969 {
20970 if ((get_attr_memory (insn) == MEMORY_STORE) || (get_attr_memory (insn) == MEMORY_BOTH))
20971 {
20972 return PPRO_UOPS_FEW;
20973 }
20974 else
20975 {
20976 return PPRO_UOPS_ONE;
20977 }
20978 }
20979 else if (! (get_attr_memory (insn) == MEMORY_NONE))
20980 {
20981 return PPRO_UOPS_FEW;
20982 }
20983 else
20984 {
20985 return PPRO_UOPS_ONE;
20986 }
20987
20988 case 658:
20989 extract_constrain_insn_cached (insn);
20990 if ((which_alternative == 1) && (const0_operand (operands[2], SImode)))
20991 {
20992 if ((get_attr_memory (insn) == MEMORY_STORE) || (get_attr_memory (insn) == MEMORY_BOTH))
20993 {
20994 return PPRO_UOPS_FEW;
20995 }
20996 else
20997 {
20998 return PPRO_UOPS_ONE;
20999 }
21000 }
21001 else if (! (get_attr_memory (insn) == MEMORY_NONE))
21002 {
21003 return PPRO_UOPS_FEW;
21004 }
21005 else
21006 {
21007 return PPRO_UOPS_ONE;
21008 }
21009
21010 case 642:
21011 extract_constrain_insn_cached (insn);
21012 if ((which_alternative == 2) || (which_alternative == 3))
21013 {
21014 return PPRO_UOPS_MANY;
21015 }
21016 else
21017 {
21018 return PPRO_UOPS_FEW;
21019 }
21020
21021 case 585:
21022 case 582:
21023 extract_constrain_insn_cached (insn);
21024 if (which_alternative == 0)
21025 {
21026 return PPRO_UOPS_MANY;
21027 }
21028 else if (! (get_attr_memory (insn) == MEMORY_NONE))
21029 {
21030 return PPRO_UOPS_FEW;
21031 }
21032 else
21033 {
21034 return PPRO_UOPS_ONE;
21035 }
21036
21037 case 529:
21038 case 519:
21039 case 518:
21040 case 517:
21041 case 516:
21042 case 515:
21043 case 504:
21044 case 503:
21045 extract_insn_cached (insn);
21046 if (memory_operand (operands[0], VOIDmode))
21047 {
21048 return PPRO_UOPS_FEW;
21049 }
21050 else
21051 {
21052 return PPRO_UOPS_ONE;
21053 }
21054
21055 case 171:
21056 case 168:
21057 case 165:
21058 case 162:
21059 extract_constrain_insn_cached (insn);
21060 if (which_alternative == 1)
21061 {
21062 return PPRO_UOPS_MANY;
21063 }
21064 else if (! (get_attr_memory (insn) == MEMORY_NONE))
21065 {
21066 return PPRO_UOPS_FEW;
21067 }
21068 else
21069 {
21070 return PPRO_UOPS_ONE;
21071 }
21072
21073 case 134:
21074 extract_constrain_insn_cached (insn);
21075 if ((which_alternative == 1) || ((which_alternative == 2) || (which_alternative == 3)))
21076 {
21077 return PPRO_UOPS_MANY;
21078 }
21079 else if (! (get_attr_memory (insn) == MEMORY_NONE))
21080 {
21081 return PPRO_UOPS_FEW;
21082 }
21083 else
21084 {
21085 return PPRO_UOPS_ONE;
21086 }
21087
21088 case 178:
21089 case 177:
21090 case 176:
21091 case 175:
21092 case 174:
21093 case 173:
21094 case 170:
21095 case 167:
21096 case 164:
21097 case 161:
21098 case 144:
21099 case 142:
21100 case 140:
21101 case 138:
21102 case 133:
21103 extract_constrain_insn_cached (insn);
21104 if (which_alternative != 0)
21105 {
21106 return PPRO_UOPS_MANY;
21107 }
21108 else if (! (get_attr_memory (insn) == MEMORY_NONE))
21109 {
21110 return PPRO_UOPS_FEW;
21111 }
21112 else
21113 {
21114 return PPRO_UOPS_ONE;
21115 }
21116
21117 case 115:
21118 extract_constrain_insn_cached (insn);
21119 if (which_alternative != 0)
21120 {
21121 if ((get_attr_memory (insn) == MEMORY_STORE) || (get_attr_memory (insn) == MEMORY_BOTH))
21122 {
21123 return PPRO_UOPS_FEW;
21124 }
21125 else
21126 {
21127 return PPRO_UOPS_ONE;
21128 }
21129 }
21130 else if (! (get_attr_memory (insn) == MEMORY_NONE))
21131 {
21132 return PPRO_UOPS_FEW;
21133 }
21134 else
21135 {
21136 return PPRO_UOPS_ONE;
21137 }
21138
21139 case 103:
21140 case 102:
21141 case 101:
21142 case 100:
21143 extract_constrain_insn_cached (insn);
21144 if ((which_alternative == 3) || (which_alternative == 4))
21145 {
21146 return PPRO_UOPS_MANY;
21147 }
21148 else if (! (get_attr_memory (insn) == MEMORY_NONE))
21149 {
21150 return PPRO_UOPS_FEW;
21151 }
21152 else
21153 {
21154 return PPRO_UOPS_ONE;
21155 }
21156
21157 case 94:
21158 case 93:
21159 extract_constrain_insn_cached (insn);
21160 if (((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 3) || (which_alternative == 4)))
21161 {
21162 return PPRO_UOPS_MANY;
21163 }
21164 else if (! (get_attr_memory (insn) == MEMORY_NONE))
21165 {
21166 return PPRO_UOPS_FEW;
21167 }
21168 else
21169 {
21170 return PPRO_UOPS_ONE;
21171 }
21172
21173 case 89:
21174 extract_constrain_insn_cached (insn);
21175 if (((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 3) || (which_alternative == 4)))
21176 {
21177 if ((get_attr_memory (insn) == MEMORY_STORE) || (get_attr_memory (insn) == MEMORY_BOTH))
21178 {
21179 return PPRO_UOPS_FEW;
21180 }
21181 else
21182 {
21183 return PPRO_UOPS_ONE;
21184 }
21185 }
21186 else if (! (get_attr_memory (insn) == MEMORY_NONE))
21187 {
21188 return PPRO_UOPS_FEW;
21189 }
21190 else
21191 {
21192 return PPRO_UOPS_ONE;
21193 }
21194
21195 case 88:
21196 case 87:
21197 extract_constrain_insn_cached (insn);
21198 if (which_alternative != 1)
21199 {
21200 return PPRO_UOPS_MANY;
21201 }
21202 else
21203 {
21204 return PPRO_UOPS_FEW;
21205 }
21206
21207 case 83:
21208 extract_constrain_insn_cached (insn);
21209 if (which_alternative == 4)
21210 {
21211 return PPRO_UOPS_MANY;
21212 }
21213 else if (((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative != 7) && ((which_alternative != 8) && ((which_alternative != 9) && ((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], DImode))))))))
21214 {
21215 if ((get_attr_memory (insn) == MEMORY_STORE) || (get_attr_memory (insn) == MEMORY_BOTH))
21216 {
21217 return PPRO_UOPS_FEW;
21218 }
21219 else
21220 {
21221 return PPRO_UOPS_ONE;
21222 }
21223 }
21224 else if (! (get_attr_memory (insn) == MEMORY_NONE))
21225 {
21226 return PPRO_UOPS_FEW;
21227 }
21228 else
21229 {
21230 return PPRO_UOPS_ONE;
21231 }
21232
21233 case 714:
21234 case 82:
21235 extract_constrain_insn_cached (insn);
21236 if ((which_alternative == 0) || (which_alternative == 1))
21237 {
21238 return PPRO_UOPS_MANY;
21239 }
21240 else if (! (get_attr_memory (insn) == MEMORY_NONE))
21241 {
21242 return PPRO_UOPS_FEW;
21243 }
21244 else
21245 {
21246 return PPRO_UOPS_ONE;
21247 }
21248
21249 case 76:
21250 extract_constrain_insn_cached (insn);
21251 if (which_alternative != 0)
21252 {
21253 return PPRO_UOPS_MANY;
21254 }
21255 else
21256 {
21257 return PPRO_UOPS_FEW;
21258 }
21259
21260 case 71:
21261 extract_constrain_insn_cached (insn);
21262 if ((q_regs_operand (operands[0], QImode)) && (! ((TARGET_MOVX) != (0))))
21263 {
21264 if ((get_attr_memory (insn) == MEMORY_STORE) || (get_attr_memory (insn) == MEMORY_BOTH))
21265 {
21266 return PPRO_UOPS_FEW;
21267 }
21268 else
21269 {
21270 return PPRO_UOPS_ONE;
21271 }
21272 }
21273 else if (! (get_attr_memory (insn) == MEMORY_NONE))
21274 {
21275 return PPRO_UOPS_FEW;
21276 }
21277 else
21278 {
21279 return PPRO_UOPS_ONE;
21280 }
21281
21282 case 59:
21283 extract_constrain_insn_cached (insn);
21284 if (((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2))))))
21285 {
21286 if ((get_attr_memory (insn) == MEMORY_STORE) || (get_attr_memory (insn) == MEMORY_BOTH))
21287 {
21288 return PPRO_UOPS_FEW;
21289 }
21290 else
21291 {
21292 return PPRO_UOPS_ONE;
21293 }
21294 }
21295 else if (! (get_attr_memory (insn) == MEMORY_NONE))
21296 {
21297 return PPRO_UOPS_FEW;
21298 }
21299 else
21300 {
21301 return PPRO_UOPS_ONE;
21302 }
21303
21304 case 74:
21305 case 73:
21306 case 72:
21307 case 61:
21308 case 55:
21309 if ((get_attr_memory (insn) == MEMORY_STORE) || (get_attr_memory (insn) == MEMORY_BOTH))
21310 {
21311 return PPRO_UOPS_FEW;
21312 }
21313 else
21314 {
21315 return PPRO_UOPS_ONE;
21316 }
21317
21318 case 70:
21319 case 66:
21320 case 65:
21321 case 50:
21322 if (get_attr_type (insn) == TYPE_IMOV)
21323 {
21324 if ((get_attr_memory (insn) == MEMORY_STORE) || (get_attr_memory (insn) == MEMORY_BOTH))
21325 {
21326 return PPRO_UOPS_FEW;
21327 }
21328 else
21329 {
21330 return PPRO_UOPS_ONE;
21331 }
21332 }
21333 else if (! (get_attr_memory (insn) == MEMORY_NONE))
21334 {
21335 return PPRO_UOPS_FEW;
21336 }
21337 else
21338 {
21339 return PPRO_UOPS_ONE;
21340 }
21341
21342 case 44:
21343 extract_constrain_insn_cached (insn);
21344 if (((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && ((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], SImode))))))))
21345 {
21346 if ((get_attr_memory (insn) == MEMORY_STORE) || (get_attr_memory (insn) == MEMORY_BOTH))
21347 {
21348 return PPRO_UOPS_FEW;
21349 }
21350 else
21351 {
21352 return PPRO_UOPS_ONE;
21353 }
21354 }
21355 else if (! (get_attr_memory (insn) == MEMORY_NONE))
21356 {
21357 return PPRO_UOPS_FEW;
21358 }
21359 else
21360 {
21361 return PPRO_UOPS_ONE;
21362 }
21363
21364 case -1:
21365 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
21366 && asm_noperands (PATTERN (insn)) < 0)
21367 fatal_insn_not_found (insn);
21368 case 1024:
21369 case 1023:
21370 case 854:
21371 case 708:
21372 case 707:
21373 case 706:
21374 case 705:
21375 case 704:
21376 case 703:
21377 case 702:
21378 case 701:
21379 case 700:
21380 case 699:
21381 case 698:
21382 case 697:
21383 case 696:
21384 case 695:
21385 case 694:
21386 case 693:
21387 case 692:
21388 case 681:
21389 case 680:
21390 case 679:
21391 case 678:
21392 case 677:
21393 case 676:
21394 case 675:
21395 case 674:
21396 case 673:
21397 case 672:
21398 case 671:
21399 case 670:
21400 case 669:
21401 case 668:
21402 case 667:
21403 case 666:
21404 case 665:
21405 case 664:
21406 case 663:
21407 case 662:
21408 case 661:
21409 case 660:
21410 case 656:
21411 case 655:
21412 case 653:
21413 case 652:
21414 case 650:
21415 case 649:
21416 case 647:
21417 case 646:
21418 case 635:
21419 case 634:
21420 case 633:
21421 case 632:
21422 case 631:
21423 case 630:
21424 case 629:
21425 case 628:
21426 case 627:
21427 case 626:
21428 case 625:
21429 case 624:
21430 case 623:
21431 case 622:
21432 case 621:
21433 case 620:
21434 case 619:
21435 case 618:
21436 case 617:
21437 case 616:
21438 case 615:
21439 case 614:
21440 case 613:
21441 case 612:
21442 case 611:
21443 case 610:
21444 case 609:
21445 case 608:
21446 case 607:
21447 case 606:
21448 case 604:
21449 case 603:
21450 case 602:
21451 case 601:
21452 case 600:
21453 case 599:
21454 case 598:
21455 case 597:
21456 case 596:
21457 case 595:
21458 case 594:
21459 case 593:
21460 case 592:
21461 case 591:
21462 case 590:
21463 case 589:
21464 case 588:
21465 case 587:
21466 case 584:
21467 case 543:
21468 case 542:
21469 case 541:
21470 case 540:
21471 case 539:
21472 case 538:
21473 case 537:
21474 case 533:
21475 case 532:
21476 case 531:
21477 case 528:
21478 case 527:
21479 case 526:
21480 case 525:
21481 case 524:
21482 case 523:
21483 case 522:
21484 case 521:
21485 case 514:
21486 case 513:
21487 case 512:
21488 case 511:
21489 case 510:
21490 case 509:
21491 case 508:
21492 case 507:
21493 case 506:
21494 case 505:
21495 case 456:
21496 case 455:
21497 case 429:
21498 case 428:
21499 case 411:
21500 case 410:
21501 case 388:
21502 case 387:
21503 case 386:
21504 case 385:
21505 case 384:
21506 case 383:
21507 case 382:
21508 case 381:
21509 case 380:
21510 case 379:
21511 case 369:
21512 case 368:
21513 case 367:
21514 case 366:
21515 case 365:
21516 case 364:
21517 case 363:
21518 case 362:
21519 case 361:
21520 case 360:
21521 case 349:
21522 case 285:
21523 case 284:
21524 case 273:
21525 case 271:
21526 case 270:
21527 case 268:
21528 case 267:
21529 case 265:
21530 case 264:
21531 case 225:
21532 case 179:
21533 case 118:
21534 case 114:
21535 case 99:
21536 case 98:
21537 case 97:
21538 case 96:
21539 case 92:
21540 case 91:
21541 case 75:
21542 case 28:
21543 case 26:
21544 case 25:
21545 case 22:
21546 case 18:
21547 case 520:
21548 case 559:
21549 case 560:
21550 case 564:
21551 case 565:
21552 case 570:
21553 case 571:
21554 case 572:
21555 case 573:
21556 return PPRO_UOPS_MANY;
21557
21558 case 1022:
21559 case 1021:
21560 case 1020:
21561 case 853:
21562 case 852:
21563 case 851:
21564 case 850:
21565 case 645:
21566 case 644:
21567 case 643:
21568 case 641:
21569 case 640:
21570 case 639:
21571 case 637:
21572 case 605:
21573 case 547:
21574 case 546:
21575 case 500:
21576 case 499:
21577 case 158:
21578 case 157:
21579 case 156:
21580 case 153:
21581 case 152:
21582 case 151:
21583 case 148:
21584 case 147:
21585 case 146:
21586 case 84:
21587 case 79:
21588 case 78:
21589 case 77:
21590 case 67:
21591 case 58:
21592 case 57:
21593 case 51:
21594 case 49:
21595 case 48:
21596 case 45:
21597 case 41:
21598 case 40:
21599 case 39:
21600 case 38:
21601 case 37:
21602 case 29:
21603 case 47:
21604 case 53:
21605 case 54:
21606 case 60:
21607 case 86:
21608 case 159:
21609 case 160:
21610 case 180:
21611 case 182:
21612 case 183:
21613 case 226:
21614 case 230:
21615 case 231:
21616 case 252:
21617 case 253:
21618 case 256:
21619 case 257:
21620 case 258:
21621 case 259:
21622 case 260:
21623 case 261:
21624 case 262:
21625 case 263:
21626 case 266:
21627 case 269:
21628 case 272:
21629 case 274:
21630 case 275:
21631 case 370:
21632 case 371:
21633 case 372:
21634 case 373:
21635 case 374:
21636 case 375:
21637 case 376:
21638 case 377:
21639 case 378:
21640 case 412:
21641 case 430:
21642 case 534:
21643 case 535:
21644 case 536:
21645 return PPRO_UOPS_FEW;
21646
21647 case 953:
21648 case 884:
21649 case 883:
21650 case 882:
21651 case 881:
21652 case 864:
21653 case 814:
21654 case 813:
21655 case 770:
21656 case 769:
21657 case 638:
21658 case 636:
21659 case 545:
21660 case 544:
21661 case 195:
21662 case 194:
21663 case 193:
21664 case 192:
21665 case 191:
21666 case 190:
21667 case 189:
21668 case 188:
21669 case 187:
21670 case 186:
21671 case 85:
21672 case 68:
21673 case 52:
21674 case 46:
21675 case 30:
21676 case 530:
21677 return PPRO_UOPS_ONE;
21678
21679 default:
21680 if (! (get_attr_memory (insn) == MEMORY_NONE))
21681 {
21682 return PPRO_UOPS_FEW;
21683 }
21684 else
21685 {
21686 return PPRO_UOPS_ONE;
21687 }
21688
21689 }
21690 }
21691
21692 extern enum attr_pent_pair get_attr_pent_pair PARAMS ((rtx));
21693 enum attr_pent_pair
21694 get_attr_pent_pair (insn)
21695 rtx insn;
21696 {
21697 switch (recog_memoized (insn))
21698 {
21699 case 679:
21700 case 678:
21701 case 677:
21702 case 676:
21703 case 675:
21704 case 674:
21705 extract_insn_cached (insn);
21706 if (constant_call_address_operand (operands[1], VOIDmode))
21707 {
21708 return PENT_PAIR_PV;
21709 }
21710 else
21711 {
21712 return PENT_PAIR_NP;
21713 }
21714
21715 case 525:
21716 case 524:
21717 case 523:
21718 case 522:
21719 case 521:
21720 extract_insn_cached (insn);
21721 if (constant_call_address_operand (operands[0], VOIDmode))
21722 {
21723 return PENT_PAIR_PV;
21724 }
21725 else
21726 {
21727 return PENT_PAIR_NP;
21728 }
21729
21730 case 498:
21731 case 496:
21732 case 485:
21733 case 483:
21734 extract_insn_cached (insn);
21735 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
21736 {
21737 return PENT_PAIR_NP;
21738 }
21739 else if (const_int_1_operand (operands[1], VOIDmode))
21740 {
21741 return PENT_PAIR_PU;
21742 }
21743 else
21744 {
21745 return PENT_PAIR_NP;
21746 }
21747
21748 case 497:
21749 case 495:
21750 case 494:
21751 case 493:
21752 case 492:
21753 case 491:
21754 case 490:
21755 case 489:
21756 case 488:
21757 case 487:
21758 case 486:
21759 case 484:
21760 case 482:
21761 case 481:
21762 case 480:
21763 case 479:
21764 case 478:
21765 case 477:
21766 case 476:
21767 case 475:
21768 extract_insn_cached (insn);
21769 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
21770 {
21771 return PENT_PAIR_NP;
21772 }
21773 else if (const_int_1_operand (operands[2], VOIDmode))
21774 {
21775 return PENT_PAIR_PU;
21776 }
21777 else
21778 {
21779 return PENT_PAIR_NP;
21780 }
21781
21782 case 472:
21783 case 470:
21784 case 448:
21785 case 446:
21786 extract_insn_cached (insn);
21787 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
21788 {
21789 return PENT_PAIR_NP;
21790 }
21791 else if (const_int_operand (operands[1], VOIDmode))
21792 {
21793 return PENT_PAIR_PU;
21794 }
21795 else
21796 {
21797 return PENT_PAIR_NP;
21798 }
21799
21800 case 474:
21801 case 473:
21802 case 471:
21803 case 469:
21804 case 468:
21805 case 467:
21806 case 466:
21807 case 465:
21808 case 464:
21809 case 463:
21810 case 462:
21811 case 461:
21812 case 460:
21813 case 459:
21814 case 458:
21815 case 457:
21816 case 454:
21817 case 453:
21818 case 452:
21819 case 451:
21820 case 450:
21821 case 449:
21822 case 447:
21823 case 445:
21824 case 444:
21825 case 443:
21826 case 442:
21827 case 441:
21828 case 440:
21829 case 439:
21830 case 438:
21831 case 437:
21832 case 436:
21833 case 435:
21834 case 434:
21835 case 433:
21836 case 427:
21837 case 426:
21838 case 425:
21839 case 424:
21840 extract_insn_cached (insn);
21841 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
21842 {
21843 return PENT_PAIR_NP;
21844 }
21845 else if (const_int_operand (operands[2], VOIDmode))
21846 {
21847 return PENT_PAIR_PU;
21848 }
21849 else
21850 {
21851 return PENT_PAIR_NP;
21852 }
21853
21854 case 432:
21855 case 431:
21856 case 423:
21857 extract_constrain_insn_cached (insn);
21858 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
21859 {
21860 return PENT_PAIR_NP;
21861 }
21862 else if ((which_alternative == 1) && (const_int_operand (operands[2], VOIDmode)))
21863 {
21864 return PENT_PAIR_PU;
21865 }
21866 else
21867 {
21868 return PENT_PAIR_NP;
21869 }
21870
21871 case 420:
21872 extract_constrain_insn_cached (insn);
21873 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
21874 {
21875 return PENT_PAIR_NP;
21876 }
21877 else if ((get_attr_type (insn) == TYPE_ALU) || (which_alternative == 2))
21878 {
21879 return PENT_PAIR_UV;
21880 }
21881 else if ((get_attr_type (insn) == TYPE_ISHIFT) && (const_int_operand (operands[2], VOIDmode)))
21882 {
21883 return PENT_PAIR_PU;
21884 }
21885 else
21886 {
21887 return PENT_PAIR_NP;
21888 }
21889
21890 case 419:
21891 case 418:
21892 extract_insn_cached (insn);
21893 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
21894 {
21895 return PENT_PAIR_NP;
21896 }
21897 else if ((get_attr_type (insn) == TYPE_ALU) || ((get_attr_type (insn) == TYPE_ISHIFT) && (const_int_operand (operands[2], VOIDmode))))
21898 {
21899 return PENT_PAIR_PU;
21900 }
21901 else
21902 {
21903 return PENT_PAIR_NP;
21904 }
21905
21906 case 417:
21907 extract_constrain_insn_cached (insn);
21908 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
21909 {
21910 return PENT_PAIR_NP;
21911 }
21912 else if ((which_alternative != 0) || (get_attr_type (insn) == TYPE_ALU))
21913 {
21914 if (which_alternative == 0)
21915 {
21916 return PENT_PAIR_PU;
21917 }
21918 else
21919 {
21920 return PENT_PAIR_UV;
21921 }
21922 }
21923 else if ((get_attr_type (insn) == TYPE_ISHIFT) && (const_int_operand (operands[2], VOIDmode)))
21924 {
21925 return PENT_PAIR_PU;
21926 }
21927 else
21928 {
21929 return PENT_PAIR_NP;
21930 }
21931
21932 case 416:
21933 extract_constrain_insn_cached (insn);
21934 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
21935 {
21936 return PENT_PAIR_NP;
21937 }
21938 else if (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode)))
21939 {
21940 return PENT_PAIR_UV;
21941 }
21942 else if (const_int_operand (operands[2], VOIDmode))
21943 {
21944 return PENT_PAIR_PU;
21945 }
21946 else
21947 {
21948 return PENT_PAIR_NP;
21949 }
21950
21951 case 414:
21952 extract_constrain_insn_cached (insn);
21953 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
21954 {
21955 return PENT_PAIR_NP;
21956 }
21957 else if ((which_alternative != 0) || (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode))))
21958 {
21959 return PENT_PAIR_UV;
21960 }
21961 else if (const_int_operand (operands[2], VOIDmode))
21962 {
21963 return PENT_PAIR_PU;
21964 }
21965 else
21966 {
21967 return PENT_PAIR_NP;
21968 }
21969
21970 case 422:
21971 case 421:
21972 case 415:
21973 case 409:
21974 extract_insn_cached (insn);
21975 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
21976 {
21977 return PENT_PAIR_NP;
21978 }
21979 else if (get_attr_type (insn) == TYPE_ALU)
21980 {
21981 return PENT_PAIR_UV;
21982 }
21983 else if ((get_attr_type (insn) == TYPE_ISHIFT) && (const_int_operand (operands[2], VOIDmode)))
21984 {
21985 return PENT_PAIR_PU;
21986 }
21987 else
21988 {
21989 return PENT_PAIR_NP;
21990 }
21991
21992 case 413:
21993 case 408:
21994 extract_constrain_insn_cached (insn);
21995 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
21996 {
21997 return PENT_PAIR_NP;
21998 }
21999 else if ((which_alternative != 0) || (get_attr_type (insn) == TYPE_ALU))
22000 {
22001 return PENT_PAIR_UV;
22002 }
22003 else if ((get_attr_type (insn) == TYPE_ISHIFT) && (const_int_operand (operands[2], VOIDmode)))
22004 {
22005 return PENT_PAIR_PU;
22006 }
22007 else
22008 {
22009 return PENT_PAIR_NP;
22010 }
22011
22012 case 292:
22013 extract_constrain_insn_cached (insn);
22014 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
22015 {
22016 return PENT_PAIR_NP;
22017 }
22018 else if ((which_alternative == 0) || (which_alternative == 1))
22019 {
22020 return PENT_PAIR_PU;
22021 }
22022 else
22023 {
22024 return PENT_PAIR_NP;
22025 }
22026
22027 case 288:
22028 extract_constrain_insn_cached (insn);
22029 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
22030 {
22031 return PENT_PAIR_NP;
22032 }
22033 else if ((which_alternative == 0) || (which_alternative == 1))
22034 {
22035 return PENT_PAIR_UV;
22036 }
22037 else
22038 {
22039 return PENT_PAIR_NP;
22040 }
22041
22042 case 286:
22043 extract_constrain_insn_cached (insn);
22044 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
22045 {
22046 return PENT_PAIR_NP;
22047 }
22048 else if ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))
22049 {
22050 return PENT_PAIR_UV;
22051 }
22052 else
22053 {
22054 return PENT_PAIR_NP;
22055 }
22056
22057 case 215:
22058 extract_constrain_insn_cached (insn);
22059 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
22060 {
22061 return PENT_PAIR_NP;
22062 }
22063 else if (((which_alternative != 3) && (! (incdec_operand (operands[2], QImode)))) || ((which_alternative == 3) || (incdec_operand (operands[2], QImode))))
22064 {
22065 return PENT_PAIR_UV;
22066 }
22067 else
22068 {
22069 return PENT_PAIR_NP;
22070 }
22071
22072 case 209:
22073 extract_constrain_insn_cached (insn);
22074 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
22075 {
22076 return PENT_PAIR_NP;
22077 }
22078 else if (((which_alternative != 2) && (! (incdec_operand (operands[2], HImode)))) || ((which_alternative == 2) || (incdec_operand (operands[2], HImode))))
22079 {
22080 if ((which_alternative == 0) || (which_alternative == 1))
22081 {
22082 return PENT_PAIR_PU;
22083 }
22084 else
22085 {
22086 return PENT_PAIR_UV;
22087 }
22088 }
22089 else
22090 {
22091 return PENT_PAIR_NP;
22092 }
22093
22094 case 202:
22095 extract_constrain_insn_cached (insn);
22096 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
22097 {
22098 return PENT_PAIR_NP;
22099 }
22100 else if ((get_attr_type (insn) == TYPE_ALU) || (((which_alternative != 0) || (pic_symbolic_operand (operands[2], SImode))) || (get_attr_type (insn) == TYPE_INCDEC)))
22101 {
22102 return PENT_PAIR_UV;
22103 }
22104 else
22105 {
22106 return PENT_PAIR_NP;
22107 }
22108
22109 case 201:
22110 extract_constrain_insn_cached (insn);
22111 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
22112 {
22113 return PENT_PAIR_NP;
22114 }
22115 else if ((get_attr_type (insn) == TYPE_ALU) || (((which_alternative == 2) || (pic_symbolic_operand (operands[2], SImode))) || (get_attr_type (insn) == TYPE_INCDEC)))
22116 {
22117 return PENT_PAIR_UV;
22118 }
22119 else
22120 {
22121 return PENT_PAIR_NP;
22122 }
22123
22124 case 196:
22125 extract_constrain_insn_cached (insn);
22126 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
22127 {
22128 return PENT_PAIR_NP;
22129 }
22130 else if ((get_attr_type (insn) == TYPE_ALU) || (((which_alternative == 2) || (pic_symbolic_operand (operands[2], DImode))) || (get_attr_type (insn) == TYPE_INCDEC)))
22131 {
22132 return PENT_PAIR_UV;
22133 }
22134 else
22135 {
22136 return PENT_PAIR_NP;
22137 }
22138
22139 case 115:
22140 case 112:
22141 extract_constrain_insn_cached (insn);
22142 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
22143 {
22144 return PENT_PAIR_NP;
22145 }
22146 else if (which_alternative != 0)
22147 {
22148 return PENT_PAIR_UV;
22149 }
22150 else
22151 {
22152 return PENT_PAIR_NP;
22153 }
22154
22155 case 109:
22156 extract_constrain_insn_cached (insn);
22157 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
22158 {
22159 return PENT_PAIR_NP;
22160 }
22161 else if (which_alternative != 0)
22162 {
22163 return PENT_PAIR_PU;
22164 }
22165 else
22166 {
22167 return PENT_PAIR_NP;
22168 }
22169
22170 case 89:
22171 extract_constrain_insn_cached (insn);
22172 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
22173 {
22174 return PENT_PAIR_NP;
22175 }
22176 else if (((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 3) || (which_alternative == 4)))
22177 {
22178 if ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && (((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8)))) || ((which_alternative != 3) && ((which_alternative != 4) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (which_alternative != 8)))))))) || ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8))))) && ((which_alternative == 0) || ((which_alternative == 1) || ((which_alternative == 2) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8))))))))
22179 {
22180 return PENT_PAIR_PU;
22181 }
22182 else
22183 {
22184 return PENT_PAIR_UV;
22185 }
22186 }
22187 else
22188 {
22189 return PENT_PAIR_NP;
22190 }
22191
22192 case 88:
22193 case 87:
22194 extract_constrain_insn_cached (insn);
22195 if ((which_alternative == 1) && (! (memory_operand (operands[1], VOIDmode))))
22196 {
22197 return PENT_PAIR_UV;
22198 }
22199 else
22200 {
22201 return PENT_PAIR_NP;
22202 }
22203
22204 case 83:
22205 extract_constrain_insn_cached (insn);
22206 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
22207 {
22208 return PENT_PAIR_NP;
22209 }
22210 else if (((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative != 7) && ((which_alternative != 8) && ((which_alternative != 9) && ((which_alternative != 4) && (((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], DImode)))) || (((flag_pic) != (0)) && (symbolic_operand (operands[1], DImode)))))))))
22211 {
22212 return PENT_PAIR_UV;
22213 }
22214 else
22215 {
22216 return PENT_PAIR_NP;
22217 }
22218
22219 case 76:
22220 extract_constrain_insn_cached (insn);
22221 if ((which_alternative == 0) && (! (memory_operand (operands[1], VOIDmode))))
22222 {
22223 return PENT_PAIR_UV;
22224 }
22225 else
22226 {
22227 return PENT_PAIR_NP;
22228 }
22229
22230 case 71:
22231 extract_constrain_insn_cached (insn);
22232 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
22233 {
22234 return PENT_PAIR_NP;
22235 }
22236 else if ((q_regs_operand (operands[0], QImode)) && (! ((TARGET_MOVX) != (0))))
22237 {
22238 return PENT_PAIR_UV;
22239 }
22240 else
22241 {
22242 return PENT_PAIR_NP;
22243 }
22244
22245 case 70:
22246 case 66:
22247 case 65:
22248 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
22249 {
22250 return PENT_PAIR_NP;
22251 }
22252 else if (get_attr_type (insn) == TYPE_IMOV)
22253 {
22254 return PENT_PAIR_UV;
22255 }
22256 else
22257 {
22258 return PENT_PAIR_NP;
22259 }
22260
22261 case 59:
22262 extract_constrain_insn_cached (insn);
22263 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
22264 {
22265 return PENT_PAIR_NP;
22266 }
22267 else if (((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2))))))
22268 {
22269 if (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2)))))
22270 {
22271 return PENT_PAIR_PU;
22272 }
22273 else
22274 {
22275 return PENT_PAIR_UV;
22276 }
22277 }
22278 else
22279 {
22280 return PENT_PAIR_NP;
22281 }
22282
22283 case 50:
22284 extract_constrain_insn_cached (insn);
22285 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
22286 {
22287 return PENT_PAIR_NP;
22288 }
22289 else if (get_attr_type (insn) == TYPE_IMOV)
22290 {
22291 if (((((which_alternative != 0) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_HIMODE_MATH) == (0))))) && (((which_alternative != 1) && (which_alternative != 2)) || (! (aligned_operand (operands[1], HImode))))) && (((TARGET_MOVX) != (0)) && ((which_alternative == 0) || (which_alternative == 2)))) || (get_attr_mode (insn) == MODE_HI))
22292 {
22293 return PENT_PAIR_PU;
22294 }
22295 else
22296 {
22297 return PENT_PAIR_UV;
22298 }
22299 }
22300 else
22301 {
22302 return PENT_PAIR_NP;
22303 }
22304
22305 case 57:
22306 case 48:
22307 extract_insn_cached (insn);
22308 if (! (memory_operand (operands[1], VOIDmode)))
22309 {
22310 return PENT_PAIR_PU;
22311 }
22312 else
22313 {
22314 return PENT_PAIR_NP;
22315 }
22316
22317 case 44:
22318 extract_constrain_insn_cached (insn);
22319 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
22320 {
22321 return PENT_PAIR_NP;
22322 }
22323 else if (((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], SImode)))) || (((flag_pic) != (0)) && (symbolic_operand (operands[1], SImode))))))))
22324 {
22325 return PENT_PAIR_UV;
22326 }
22327 else
22328 {
22329 return PENT_PAIR_NP;
22330 }
22331
22332 case 79:
22333 case 78:
22334 case 41:
22335 case 40:
22336 extract_insn_cached (insn);
22337 if (! (memory_operand (operands[0], VOIDmode)))
22338 {
22339 return PENT_PAIR_UV;
22340 }
22341 else
22342 {
22343 return PENT_PAIR_NP;
22344 }
22345
22346 case 77:
22347 case 58:
22348 case 49:
22349 case 39:
22350 case 38:
22351 case 37:
22352 extract_insn_cached (insn);
22353 if (! (memory_operand (operands[1], VOIDmode)))
22354 {
22355 return PENT_PAIR_UV;
22356 }
22357 else
22358 {
22359 return PENT_PAIR_NP;
22360 }
22361
22362 case 405:
22363 case 337:
22364 case 336:
22365 case 335:
22366 case 315:
22367 case 314:
22368 case 313:
22369 case 293:
22370 case 240:
22371 case 239:
22372 case 238:
22373 case 214:
22374 case 212:
22375 case 211:
22376 case 210:
22377 case 108:
22378 case 56:
22379 case 55:
22380 case 52:
22381 case 51:
22382 case 8:
22383 case 7:
22384 case 6:
22385 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
22386 {
22387 return PENT_PAIR_NP;
22388 }
22389 else
22390 {
22391 return PENT_PAIR_PU;
22392 }
22393
22394 case 659:
22395 case 658:
22396 case 407:
22397 case 403:
22398 case 402:
22399 case 399:
22400 case 348:
22401 case 347:
22402 case 346:
22403 case 345:
22404 case 344:
22405 case 343:
22406 case 342:
22407 case 341:
22408 case 340:
22409 case 339:
22410 case 338:
22411 case 334:
22412 case 333:
22413 case 332:
22414 case 331:
22415 case 330:
22416 case 329:
22417 case 328:
22418 case 327:
22419 case 326:
22420 case 325:
22421 case 324:
22422 case 323:
22423 case 322:
22424 case 321:
22425 case 320:
22426 case 319:
22427 case 318:
22428 case 317:
22429 case 316:
22430 case 312:
22431 case 311:
22432 case 310:
22433 case 309:
22434 case 308:
22435 case 307:
22436 case 306:
22437 case 305:
22438 case 304:
22439 case 303:
22440 case 302:
22441 case 301:
22442 case 300:
22443 case 299:
22444 case 298:
22445 case 297:
22446 case 296:
22447 case 295:
22448 case 294:
22449 case 291:
22450 case 290:
22451 case 289:
22452 case 287:
22453 case 283:
22454 case 282:
22455 case 281:
22456 case 244:
22457 case 243:
22458 case 242:
22459 case 241:
22460 case 237:
22461 case 236:
22462 case 235:
22463 case 234:
22464 case 233:
22465 case 232:
22466 case 229:
22467 case 228:
22468 case 227:
22469 case 224:
22470 case 223:
22471 case 222:
22472 case 221:
22473 case 220:
22474 case 219:
22475 case 218:
22476 case 217:
22477 case 216:
22478 case 213:
22479 case 208:
22480 case 207:
22481 case 206:
22482 case 205:
22483 case 204:
22484 case 203:
22485 case 200:
22486 case 199:
22487 case 198:
22488 case 197:
22489 case 185:
22490 case 184:
22491 case 181:
22492 case 111:
22493 case 106:
22494 case 85:
22495 case 84:
22496 case 81:
22497 case 80:
22498 case 74:
22499 case 73:
22500 case 72:
22501 case 68:
22502 case 67:
22503 case 62:
22504 case 61:
22505 case 46:
22506 case 45:
22507 case 43:
22508 case 42:
22509 case 17:
22510 case 16:
22511 case 15:
22512 case 14:
22513 case 13:
22514 case 12:
22515 case 11:
22516 case 10:
22517 case 9:
22518 case 5:
22519 case 4:
22520 case 3:
22521 case 2:
22522 case 1:
22523 case 0:
22524 if (get_attr_imm_disp (insn) == IMM_DISP_TRUE)
22525 {
22526 return PENT_PAIR_NP;
22527 }
22528 else
22529 {
22530 return PENT_PAIR_UV;
22531 }
22532
22533 case 276:
22534 extract_constrain_insn_cached (insn);
22535 if (which_alternative == 0)
22536 {
22537 return PENT_PAIR_UV;
22538 }
22539 else if (which_alternative == 1)
22540 {
22541 return PENT_PAIR_NP;
22542 }
22543 else if (which_alternative == 2)
22544 {
22545 return PENT_PAIR_UV;
22546 }
22547 else if (which_alternative == 3)
22548 {
22549 return PENT_PAIR_NP;
22550 }
22551 else
22552 {
22553 return PENT_PAIR_UV;
22554 }
22555
22556 case 277:
22557 case 278:
22558 extract_constrain_insn_cached (insn);
22559 if (which_alternative == 0)
22560 {
22561 return PENT_PAIR_UV;
22562 }
22563 else if (which_alternative == 1)
22564 {
22565 return PENT_PAIR_NP;
22566 }
22567 else
22568 {
22569 return PENT_PAIR_UV;
22570 }
22571
22572 case 279:
22573 extract_constrain_insn_cached (insn);
22574 if (which_alternative == 0)
22575 {
22576 return PENT_PAIR_UV;
22577 }
22578 else if (which_alternative == 1)
22579 {
22580 return PENT_PAIR_NP;
22581 }
22582 else if (which_alternative == 2)
22583 {
22584 return PENT_PAIR_UV;
22585 }
22586 else
22587 {
22588 return PENT_PAIR_NP;
22589 }
22590
22591 case 529:
22592 case 520:
22593 case 519:
22594 case 518:
22595 case 517:
22596 case 516:
22597 case 515:
22598 case 504:
22599 case 503:
22600 return PENT_PAIR_PV;
22601
22602 case 180:
22603 case 182:
22604 case 183:
22605 case 226:
22606 case 230:
22607 case 231:
22608 case 636:
22609 case 638:
22610 return PENT_PAIR_PU;
22611
22612 case 547:
22613 case 546:
22614 case 545:
22615 case 544:
22616 case 195:
22617 case 194:
22618 case 193:
22619 case 192:
22620 case 191:
22621 case 190:
22622 case 189:
22623 case 188:
22624 case 187:
22625 case 186:
22626 return PENT_PAIR_UV;
22627
22628 case -1:
22629 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
22630 && asm_noperands (PATTERN (insn)) < 0)
22631 fatal_insn_not_found (insn);
22632 default:
22633 return PENT_PAIR_NP;
22634
22635 }
22636 }
22637
22638 extern enum attr_pent_prefix get_attr_pent_prefix PARAMS ((rtx));
22639 enum attr_pent_prefix
22640 get_attr_pent_prefix (insn)
22641 rtx insn;
22642 {
22643 switch (recog_memoized (insn))
22644 {
22645 case 643:
22646 case 641:
22647 extract_constrain_insn_cached (insn);
22648 if ((which_alternative == 2) || (which_alternative == 3))
22649 {
22650 return PENT_PREFIX_TRUE;
22651 }
22652 else
22653 {
22654 return PENT_PREFIX_FALSE;
22655 }
22656
22657 case 563:
22658 case 562:
22659 case 558:
22660 case 557:
22661 if ((get_attr_prefix_0f (insn) == 1) || (get_attr_unit (insn) == UNIT_SSE))
22662 {
22663 return PENT_PREFIX_TRUE;
22664 }
22665 else
22666 {
22667 return PENT_PREFIX_FALSE;
22668 }
22669
22670 case 552:
22671 case 549:
22672 extract_constrain_insn_cached (insn);
22673 if (which_alternative == 1)
22674 {
22675 return PENT_PREFIX_TRUE;
22676 }
22677 else
22678 {
22679 return PENT_PREFIX_FALSE;
22680 }
22681
22682 case 286:
22683 extract_constrain_insn_cached (insn);
22684 if ((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2)))
22685 {
22686 return PENT_PREFIX_TRUE;
22687 }
22688 else
22689 {
22690 return PENT_PREFIX_FALSE;
22691 }
22692
22693 case 209:
22694 extract_constrain_insn_cached (insn);
22695 if ((which_alternative == 0) || (which_alternative == 1))
22696 {
22697 return PENT_PREFIX_TRUE;
22698 }
22699 else
22700 {
22701 return PENT_PREFIX_FALSE;
22702 }
22703
22704 case 134:
22705 extract_constrain_insn_cached (insn);
22706 if ((which_alternative != 0) && ((which_alternative != 1) && ((which_alternative != 2) && (which_alternative != 3))))
22707 {
22708 return PENT_PREFIX_TRUE;
22709 }
22710 else
22711 {
22712 return PENT_PREFIX_FALSE;
22713 }
22714
22715 case 714:
22716 case 288:
22717 case 247:
22718 case 246:
22719 case 245:
22720 case 171:
22721 case 168:
22722 case 165:
22723 case 162:
22724 case 127:
22725 extract_constrain_insn_cached (insn);
22726 if ((which_alternative != 0) && (which_alternative != 1))
22727 {
22728 return PENT_PREFIX_TRUE;
22729 }
22730 else
22731 {
22732 return PENT_PREFIX_FALSE;
22733 }
22734
22735 case 123:
22736 case 122:
22737 extract_constrain_insn_cached (insn);
22738 if ((((ix86_cpu) == (CPU_K6))) || (which_alternative != 0))
22739 {
22740 return PENT_PREFIX_TRUE;
22741 }
22742 else
22743 {
22744 return PENT_PREFIX_FALSE;
22745 }
22746
22747 case 417:
22748 case 135:
22749 case 115:
22750 case 112:
22751 extract_constrain_insn_cached (insn);
22752 if (which_alternative == 0)
22753 {
22754 return PENT_PREFIX_TRUE;
22755 }
22756 else
22757 {
22758 return PENT_PREFIX_FALSE;
22759 }
22760
22761 case 94:
22762 case 93:
22763 extract_constrain_insn_cached (insn);
22764 if ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative != 3) && (which_alternative != 4))) || ((((which_alternative != 1) && (which_alternative != 2)) && ((which_alternative != 0) && ((which_alternative != 3) && (which_alternative != 4)))) && ((which_alternative != 3) && ((which_alternative != 4) && (which_alternative != 5)))))
22765 {
22766 return PENT_PREFIX_TRUE;
22767 }
22768 else
22769 {
22770 return PENT_PREFIX_FALSE;
22771 }
22772
22773 case 89:
22774 extract_constrain_insn_cached (insn);
22775 if ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && (((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8)))) || ((which_alternative != 3) && ((which_alternative != 4) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (which_alternative != 8)))))))) || ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8))))) && ((which_alternative == 0) || ((which_alternative == 1) || ((which_alternative == 2) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8))))))))
22776 {
22777 return PENT_PREFIX_TRUE;
22778 }
22779 else
22780 {
22781 return PENT_PREFIX_FALSE;
22782 }
22783
22784 case 83:
22785 extract_constrain_insn_cached (insn);
22786 if ((((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative == 7) || ((which_alternative == 8) || (which_alternative == 9)))) || ((which_alternative == 5) || (which_alternative == 6)))
22787 {
22788 return PENT_PREFIX_TRUE;
22789 }
22790 else
22791 {
22792 return PENT_PREFIX_FALSE;
22793 }
22794
22795 case 82:
22796 extract_constrain_insn_cached (insn);
22797 if (((which_alternative != 0) && (which_alternative != 1)) && (((which_alternative != 2) && (which_alternative != 3)) || ((which_alternative == 2) || (which_alternative == 3))))
22798 {
22799 return PENT_PREFIX_TRUE;
22800 }
22801 else
22802 {
22803 return PENT_PREFIX_FALSE;
22804 }
22805
22806 case 71:
22807 extract_constrain_insn_cached (insn);
22808 if ((! (q_regs_operand (operands[0], QImode))) || ((TARGET_MOVX) != (0)))
22809 {
22810 return PENT_PREFIX_TRUE;
22811 }
22812 else
22813 {
22814 return PENT_PREFIX_FALSE;
22815 }
22816
22817 case 70:
22818 case 66:
22819 case 65:
22820 if (get_attr_type (insn) == TYPE_IMOVX)
22821 {
22822 return PENT_PREFIX_TRUE;
22823 }
22824 else
22825 {
22826 return PENT_PREFIX_FALSE;
22827 }
22828
22829 case 59:
22830 extract_constrain_insn_cached (insn);
22831 if (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2)))))
22832 {
22833 return PENT_PREFIX_TRUE;
22834 }
22835 else
22836 {
22837 return PENT_PREFIX_FALSE;
22838 }
22839
22840 case 50:
22841 extract_constrain_insn_cached (insn);
22842 if (((((which_alternative != 0) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_HIMODE_MATH) == (0))))) && (((which_alternative != 1) && (which_alternative != 2)) || (! (aligned_operand (operands[1], HImode))))) && (((TARGET_MOVX) != (0)) && ((which_alternative == 0) || (which_alternative == 2)))) || (get_attr_mode (insn) == MODE_HI))
22843 {
22844 return PENT_PREFIX_TRUE;
22845 }
22846 else
22847 {
22848 return PENT_PREFIX_FALSE;
22849 }
22850
22851 case 44:
22852 extract_constrain_insn_cached (insn);
22853 if ((((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))) && ((which_alternative == 5) || ((which_alternative == 6) || (which_alternative == 7)))) || ((which_alternative == 2) || ((which_alternative == 3) || (which_alternative == 4))))
22854 {
22855 return PENT_PREFIX_TRUE;
22856 }
22857 else
22858 {
22859 return PENT_PREFIX_FALSE;
22860 }
22861
22862 case 585:
22863 case 582:
22864 case 35:
22865 case 32:
22866 extract_constrain_insn_cached (insn);
22867 if (which_alternative != 0)
22868 {
22869 return PENT_PREFIX_TRUE;
22870 }
22871 else
22872 {
22873 return PENT_PREFIX_FALSE;
22874 }
22875
22876 case 1035:
22877 case 1034:
22878 case 1033:
22879 case 1032:
22880 case 1031:
22881 case 1030:
22882 case 1029:
22883 case 1028:
22884 case 1027:
22885 case 1026:
22886 case 1025:
22887 case 1022:
22888 case 1021:
22889 case 1020:
22890 case 1019:
22891 case 1018:
22892 case 1017:
22893 case 1016:
22894 case 1015:
22895 case 1014:
22896 case 1013:
22897 case 1012:
22898 case 1011:
22899 case 1010:
22900 case 1009:
22901 case 1008:
22902 case 1007:
22903 case 1006:
22904 case 1005:
22905 case 1004:
22906 case 1003:
22907 case 1002:
22908 case 1001:
22909 case 1000:
22910 case 999:
22911 case 998:
22912 case 997:
22913 case 996:
22914 case 995:
22915 case 994:
22916 case 993:
22917 case 992:
22918 case 991:
22919 case 990:
22920 case 989:
22921 case 988:
22922 case 987:
22923 case 986:
22924 case 985:
22925 case 984:
22926 case 983:
22927 case 982:
22928 case 981:
22929 case 980:
22930 case 979:
22931 case 978:
22932 case 977:
22933 case 976:
22934 case 975:
22935 case 974:
22936 case 973:
22937 case 972:
22938 case 971:
22939 case 970:
22940 case 969:
22941 case 968:
22942 case 967:
22943 case 966:
22944 case 965:
22945 case 964:
22946 case 963:
22947 case 962:
22948 case 961:
22949 case 960:
22950 case 959:
22951 case 958:
22952 case 957:
22953 case 956:
22954 case 955:
22955 case 954:
22956 case 953:
22957 case 952:
22958 case 951:
22959 case 950:
22960 case 949:
22961 case 948:
22962 case 947:
22963 case 946:
22964 case 945:
22965 case 944:
22966 case 943:
22967 case 942:
22968 case 941:
22969 case 940:
22970 case 939:
22971 case 938:
22972 case 937:
22973 case 936:
22974 case 935:
22975 case 934:
22976 case 933:
22977 case 932:
22978 case 931:
22979 case 930:
22980 case 929:
22981 case 928:
22982 case 927:
22983 case 926:
22984 case 925:
22985 case 924:
22986 case 923:
22987 case 922:
22988 case 921:
22989 case 920:
22990 case 919:
22991 case 918:
22992 case 917:
22993 case 916:
22994 case 915:
22995 case 914:
22996 case 913:
22997 case 912:
22998 case 911:
22999 case 910:
23000 case 909:
23001 case 908:
23002 case 907:
23003 case 906:
23004 case 905:
23005 case 904:
23006 case 903:
23007 case 902:
23008 case 901:
23009 case 900:
23010 case 899:
23011 case 898:
23012 case 897:
23013 case 896:
23014 case 895:
23015 case 894:
23016 case 893:
23017 case 892:
23018 case 891:
23019 case 890:
23020 case 889:
23021 case 888:
23022 case 887:
23023 case 886:
23024 case 885:
23025 case 884:
23026 case 883:
23027 case 882:
23028 case 881:
23029 case 880:
23030 case 879:
23031 case 878:
23032 case 877:
23033 case 876:
23034 case 875:
23035 case 874:
23036 case 873:
23037 case 872:
23038 case 871:
23039 case 870:
23040 case 869:
23041 case 868:
23042 case 867:
23043 case 866:
23044 case 865:
23045 case 864:
23046 case 863:
23047 case 862:
23048 case 861:
23049 case 860:
23050 case 859:
23051 case 858:
23052 case 857:
23053 case 856:
23054 case 855:
23055 case 853:
23056 case 852:
23057 case 851:
23058 case 850:
23059 case 849:
23060 case 848:
23061 case 847:
23062 case 846:
23063 case 845:
23064 case 844:
23065 case 843:
23066 case 842:
23067 case 841:
23068 case 840:
23069 case 839:
23070 case 838:
23071 case 837:
23072 case 836:
23073 case 835:
23074 case 834:
23075 case 833:
23076 case 832:
23077 case 831:
23078 case 830:
23079 case 829:
23080 case 828:
23081 case 827:
23082 case 826:
23083 case 825:
23084 case 824:
23085 case 823:
23086 case 822:
23087 case 821:
23088 case 820:
23089 case 819:
23090 case 818:
23091 case 817:
23092 case 816:
23093 case 815:
23094 case 814:
23095 case 813:
23096 case 812:
23097 case 811:
23098 case 810:
23099 case 809:
23100 case 808:
23101 case 807:
23102 case 806:
23103 case 805:
23104 case 804:
23105 case 803:
23106 case 802:
23107 case 801:
23108 case 800:
23109 case 799:
23110 case 798:
23111 case 797:
23112 case 796:
23113 case 795:
23114 case 794:
23115 case 793:
23116 case 792:
23117 case 791:
23118 case 790:
23119 case 789:
23120 case 788:
23121 case 787:
23122 case 786:
23123 case 785:
23124 case 784:
23125 case 783:
23126 case 782:
23127 case 781:
23128 case 780:
23129 case 779:
23130 case 778:
23131 case 777:
23132 case 776:
23133 case 775:
23134 case 774:
23135 case 773:
23136 case 772:
23137 case 771:
23138 case 770:
23139 case 769:
23140 case 768:
23141 case 767:
23142 case 766:
23143 case 765:
23144 case 764:
23145 case 763:
23146 case 762:
23147 case 761:
23148 case 760:
23149 case 759:
23150 case 758:
23151 case 757:
23152 case 756:
23153 case 755:
23154 case 754:
23155 case 753:
23156 case 752:
23157 case 751:
23158 case 750:
23159 case 749:
23160 case 748:
23161 case 747:
23162 case 746:
23163 case 745:
23164 case 744:
23165 case 743:
23166 case 742:
23167 case 741:
23168 case 740:
23169 case 739:
23170 case 738:
23171 case 737:
23172 case 736:
23173 case 735:
23174 case 734:
23175 case 733:
23176 case 732:
23177 case 731:
23178 case 730:
23179 case 729:
23180 case 728:
23181 case 727:
23182 case 726:
23183 case 725:
23184 case 724:
23185 case 723:
23186 case 722:
23187 case 721:
23188 case 720:
23189 case 719:
23190 case 718:
23191 case 717:
23192 case 716:
23193 case 715:
23194 case 713:
23195 case 712:
23196 case 711:
23197 case 710:
23198 case 709:
23199 case 691:
23200 case 690:
23201 case 689:
23202 case 688:
23203 case 687:
23204 case 686:
23205 case 685:
23206 case 684:
23207 case 683:
23208 case 682:
23209 case 657:
23210 case 654:
23211 case 651:
23212 case 648:
23213 case 640:
23214 case 639:
23215 case 637:
23216 case 635:
23217 case 634:
23218 case 633:
23219 case 632:
23220 case 631:
23221 case 630:
23222 case 629:
23223 case 628:
23224 case 627:
23225 case 626:
23226 case 625:
23227 case 622:
23228 case 621:
23229 case 617:
23230 case 616:
23231 case 615:
23232 case 614:
23233 case 613:
23234 case 610:
23235 case 609:
23236 case 586:
23237 case 583:
23238 case 553:
23239 case 550:
23240 case 536:
23241 case 502:
23242 case 501:
23243 case 500:
23244 case 499:
23245 case 494:
23246 case 482:
23247 case 468:
23248 case 466:
23249 case 444:
23250 case 442:
23251 case 430:
23252 case 419:
23253 case 418:
23254 case 412:
23255 case 405:
23256 case 404:
23257 case 357:
23258 case 356:
23259 case 337:
23260 case 336:
23261 case 335:
23262 case 315:
23263 case 314:
23264 case 313:
23265 case 293:
23266 case 292:
23267 case 278:
23268 case 275:
23269 case 248:
23270 case 240:
23271 case 239:
23272 case 238:
23273 case 214:
23274 case 212:
23275 case 211:
23276 case 210:
23277 case 172:
23278 case 169:
23279 case 166:
23280 case 163:
23281 case 160:
23282 case 159:
23283 case 155:
23284 case 154:
23285 case 150:
23286 case 149:
23287 case 137:
23288 case 128:
23289 case 126:
23290 case 125:
23291 case 124:
23292 case 121:
23293 case 120:
23294 case 117:
23295 case 116:
23296 case 113:
23297 case 110:
23298 case 109:
23299 case 108:
23300 case 107:
23301 case 69:
23302 case 64:
23303 case 63:
23304 case 57:
23305 case 56:
23306 case 55:
23307 case 53:
23308 case 52:
23309 case 51:
23310 case 48:
23311 case 36:
23312 case 33:
23313 case 8:
23314 case 7:
23315 case 6:
23316 return PENT_PREFIX_TRUE;
23317
23318 case -1:
23319 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
23320 && asm_noperands (PATTERN (insn)) < 0)
23321 fatal_insn_not_found (insn);
23322 default:
23323 return PENT_PREFIX_FALSE;
23324
23325 }
23326 }
23327
23328 extern int get_attr_prefix_0f PARAMS ((rtx));
23329 int
23330 get_attr_prefix_0f (insn)
23331 rtx insn;
23332 {
23333 switch (recog_memoized (insn))
23334 {
23335 case 643:
23336 case 641:
23337 extract_constrain_insn_cached (insn);
23338 if ((which_alternative == 2) || (which_alternative == 3))
23339 {
23340 return 1;
23341 }
23342 else
23343 {
23344 return 0;
23345 }
23346
23347 case 563:
23348 case 558:
23349 extract_insn_cached (insn);
23350 if ((get_attr_type (insn) == TYPE_SSEADD) || ((mult_operator (operands[3], SFmode)) || (get_attr_type (insn) == TYPE_SSEDIV)))
23351 {
23352 return 1;
23353 }
23354 else
23355 {
23356 return 0;
23357 }
23358
23359 case 562:
23360 case 557:
23361 extract_constrain_insn_cached (insn);
23362 if ((get_attr_type (insn) == TYPE_SSEADD) || (((which_alternative == 2) && (mult_operator (operands[3], SFmode))) || (get_attr_type (insn) == TYPE_SSEDIV)))
23363 {
23364 return 1;
23365 }
23366 else
23367 {
23368 return 0;
23369 }
23370
23371 case 552:
23372 case 549:
23373 extract_constrain_insn_cached (insn);
23374 if (which_alternative == 1)
23375 {
23376 return 1;
23377 }
23378 else
23379 {
23380 return 0;
23381 }
23382
23383 case 432:
23384 case 431:
23385 case 423:
23386 extract_constrain_insn_cached (insn);
23387 if (which_alternative == 0)
23388 {
23389 return 0;
23390 }
23391 else
23392 {
23393 return 0;
23394 }
23395
23396 case 286:
23397 extract_constrain_insn_cached (insn);
23398 if ((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2)))
23399 {
23400 return 1;
23401 }
23402 else
23403 {
23404 return 0;
23405 }
23406
23407 case 248:
23408 case 247:
23409 case 246:
23410 case 245:
23411 extract_constrain_insn_cached (insn);
23412 if ((which_alternative == 0) || (which_alternative == 1))
23413 {
23414 return 0;
23415 }
23416 else
23417 {
23418 return 1;
23419 }
23420
23421 case 134:
23422 extract_constrain_insn_cached (insn);
23423 if ((which_alternative != 0) && ((which_alternative != 1) && ((which_alternative != 2) && (which_alternative != 3))))
23424 {
23425 return 1;
23426 }
23427 else
23428 {
23429 return 0;
23430 }
23431
23432 case 714:
23433 case 292:
23434 case 288:
23435 case 171:
23436 case 168:
23437 case 165:
23438 case 162:
23439 case 127:
23440 extract_constrain_insn_cached (insn);
23441 if ((which_alternative != 0) && (which_alternative != 1))
23442 {
23443 return 1;
23444 }
23445 else
23446 {
23447 return 0;
23448 }
23449
23450 case 135:
23451 case 115:
23452 case 112:
23453 case 109:
23454 extract_constrain_insn_cached (insn);
23455 if (which_alternative == 0)
23456 {
23457 return 1;
23458 }
23459 else
23460 {
23461 return 0;
23462 }
23463
23464 case 94:
23465 case 93:
23466 extract_constrain_insn_cached (insn);
23467 if (((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative != 3) && (which_alternative != 4)))
23468 {
23469 return 1;
23470 }
23471 else
23472 {
23473 return 0;
23474 }
23475
23476 case 89:
23477 extract_constrain_insn_cached (insn);
23478 if (((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && (((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8)))) || ((which_alternative != 3) && ((which_alternative != 4) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (which_alternative != 8))))))))
23479 {
23480 return 1;
23481 }
23482 else
23483 {
23484 return 0;
23485 }
23486
23487 case 83:
23488 extract_constrain_insn_cached (insn);
23489 if ((((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative == 7) || ((which_alternative == 8) || (which_alternative == 9)))) || ((which_alternative == 5) || (which_alternative == 6)))
23490 {
23491 return 1;
23492 }
23493 else
23494 {
23495 return 0;
23496 }
23497
23498 case 82:
23499 extract_constrain_insn_cached (insn);
23500 if (((which_alternative != 0) && (which_alternative != 1)) && (((which_alternative != 2) && (which_alternative != 3)) || ((which_alternative == 2) || (which_alternative == 3))))
23501 {
23502 return 1;
23503 }
23504 else
23505 {
23506 return 0;
23507 }
23508
23509 case 71:
23510 extract_constrain_insn_cached (insn);
23511 if ((! (q_regs_operand (operands[0], QImode))) || ((TARGET_MOVX) != (0)))
23512 {
23513 return 1;
23514 }
23515 else
23516 {
23517 return 0;
23518 }
23519
23520 case 70:
23521 case 66:
23522 case 65:
23523 if (get_attr_type (insn) == TYPE_IMOVX)
23524 {
23525 return 1;
23526 }
23527 else
23528 {
23529 return 0;
23530 }
23531
23532 case 59:
23533 extract_constrain_insn_cached (insn);
23534 if (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2)))))
23535 {
23536 return 1;
23537 }
23538 else
23539 {
23540 return 0;
23541 }
23542
23543 case 50:
23544 extract_constrain_insn_cached (insn);
23545 if ((((which_alternative != 0) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_HIMODE_MATH) == (0))))) && (((which_alternative != 1) && (which_alternative != 2)) || (! (aligned_operand (operands[1], HImode))))) && (((TARGET_MOVX) != (0)) && ((which_alternative == 0) || (which_alternative == 2))))
23546 {
23547 return 1;
23548 }
23549 else
23550 {
23551 return 0;
23552 }
23553
23554 case 44:
23555 extract_constrain_insn_cached (insn);
23556 if ((((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))) && ((which_alternative == 5) || ((which_alternative == 6) || (which_alternative == 7)))) || ((which_alternative == 2) || ((which_alternative == 3) || (which_alternative == 4))))
23557 {
23558 return 1;
23559 }
23560 else
23561 {
23562 return 0;
23563 }
23564
23565 case 585:
23566 case 582:
23567 case 35:
23568 case 32:
23569 extract_constrain_insn_cached (insn);
23570 if (which_alternative != 0)
23571 {
23572 return 1;
23573 }
23574 else
23575 {
23576 return 0;
23577 }
23578
23579 case 122:
23580 case 123:
23581 case 124:
23582 extract_constrain_insn_cached (insn);
23583 if ((! (((ix86_cpu) == (CPU_K6)))) && (which_alternative == 0))
23584 {
23585 return 0;
23586 }
23587 else
23588 {
23589 return 1;
23590 }
23591
23592 case 1035:
23593 case 1034:
23594 case 1033:
23595 case 1032:
23596 case 1031:
23597 case 1030:
23598 case 1029:
23599 case 1028:
23600 case 1027:
23601 case 1026:
23602 case 1025:
23603 case 1022:
23604 case 1021:
23605 case 1020:
23606 case 1019:
23607 case 1018:
23608 case 1017:
23609 case 1016:
23610 case 1015:
23611 case 1014:
23612 case 1013:
23613 case 1012:
23614 case 1011:
23615 case 1010:
23616 case 1009:
23617 case 1008:
23618 case 1007:
23619 case 1006:
23620 case 1005:
23621 case 1004:
23622 case 1003:
23623 case 1002:
23624 case 1001:
23625 case 1000:
23626 case 999:
23627 case 998:
23628 case 997:
23629 case 996:
23630 case 995:
23631 case 994:
23632 case 993:
23633 case 992:
23634 case 991:
23635 case 990:
23636 case 989:
23637 case 988:
23638 case 987:
23639 case 986:
23640 case 985:
23641 case 984:
23642 case 983:
23643 case 982:
23644 case 981:
23645 case 980:
23646 case 979:
23647 case 978:
23648 case 977:
23649 case 976:
23650 case 975:
23651 case 974:
23652 case 973:
23653 case 972:
23654 case 971:
23655 case 970:
23656 case 969:
23657 case 968:
23658 case 967:
23659 case 966:
23660 case 965:
23661 case 964:
23662 case 963:
23663 case 962:
23664 case 961:
23665 case 960:
23666 case 959:
23667 case 958:
23668 case 957:
23669 case 956:
23670 case 955:
23671 case 954:
23672 case 953:
23673 case 952:
23674 case 951:
23675 case 950:
23676 case 949:
23677 case 948:
23678 case 947:
23679 case 946:
23680 case 945:
23681 case 944:
23682 case 943:
23683 case 942:
23684 case 941:
23685 case 940:
23686 case 939:
23687 case 938:
23688 case 937:
23689 case 936:
23690 case 935:
23691 case 934:
23692 case 933:
23693 case 932:
23694 case 931:
23695 case 930:
23696 case 929:
23697 case 928:
23698 case 927:
23699 case 926:
23700 case 925:
23701 case 924:
23702 case 923:
23703 case 922:
23704 case 921:
23705 case 920:
23706 case 919:
23707 case 918:
23708 case 917:
23709 case 916:
23710 case 915:
23711 case 914:
23712 case 913:
23713 case 912:
23714 case 911:
23715 case 910:
23716 case 909:
23717 case 908:
23718 case 907:
23719 case 906:
23720 case 905:
23721 case 904:
23722 case 903:
23723 case 902:
23724 case 901:
23725 case 900:
23726 case 899:
23727 case 898:
23728 case 897:
23729 case 896:
23730 case 895:
23731 case 894:
23732 case 893:
23733 case 892:
23734 case 891:
23735 case 890:
23736 case 889:
23737 case 888:
23738 case 887:
23739 case 886:
23740 case 885:
23741 case 884:
23742 case 883:
23743 case 882:
23744 case 881:
23745 case 880:
23746 case 879:
23747 case 878:
23748 case 877:
23749 case 876:
23750 case 875:
23751 case 874:
23752 case 873:
23753 case 872:
23754 case 871:
23755 case 870:
23756 case 869:
23757 case 868:
23758 case 867:
23759 case 866:
23760 case 865:
23761 case 864:
23762 case 863:
23763 case 862:
23764 case 861:
23765 case 860:
23766 case 859:
23767 case 858:
23768 case 857:
23769 case 856:
23770 case 855:
23771 case 853:
23772 case 852:
23773 case 851:
23774 case 850:
23775 case 849:
23776 case 848:
23777 case 847:
23778 case 846:
23779 case 845:
23780 case 844:
23781 case 843:
23782 case 842:
23783 case 841:
23784 case 840:
23785 case 839:
23786 case 838:
23787 case 837:
23788 case 836:
23789 case 835:
23790 case 834:
23791 case 833:
23792 case 832:
23793 case 831:
23794 case 830:
23795 case 829:
23796 case 828:
23797 case 827:
23798 case 826:
23799 case 825:
23800 case 824:
23801 case 823:
23802 case 822:
23803 case 821:
23804 case 820:
23805 case 819:
23806 case 818:
23807 case 817:
23808 case 816:
23809 case 815:
23810 case 814:
23811 case 813:
23812 case 812:
23813 case 811:
23814 case 810:
23815 case 809:
23816 case 808:
23817 case 807:
23818 case 806:
23819 case 805:
23820 case 804:
23821 case 803:
23822 case 802:
23823 case 801:
23824 case 800:
23825 case 799:
23826 case 798:
23827 case 797:
23828 case 796:
23829 case 795:
23830 case 794:
23831 case 793:
23832 case 792:
23833 case 791:
23834 case 790:
23835 case 789:
23836 case 788:
23837 case 787:
23838 case 786:
23839 case 785:
23840 case 784:
23841 case 783:
23842 case 782:
23843 case 781:
23844 case 780:
23845 case 779:
23846 case 778:
23847 case 777:
23848 case 776:
23849 case 775:
23850 case 774:
23851 case 773:
23852 case 772:
23853 case 771:
23854 case 770:
23855 case 769:
23856 case 768:
23857 case 767:
23858 case 766:
23859 case 765:
23860 case 764:
23861 case 763:
23862 case 762:
23863 case 761:
23864 case 760:
23865 case 759:
23866 case 758:
23867 case 757:
23868 case 756:
23869 case 755:
23870 case 754:
23871 case 753:
23872 case 752:
23873 case 751:
23874 case 750:
23875 case 749:
23876 case 748:
23877 case 747:
23878 case 746:
23879 case 745:
23880 case 744:
23881 case 743:
23882 case 742:
23883 case 741:
23884 case 740:
23885 case 739:
23886 case 738:
23887 case 737:
23888 case 736:
23889 case 735:
23890 case 734:
23891 case 733:
23892 case 732:
23893 case 731:
23894 case 730:
23895 case 729:
23896 case 728:
23897 case 727:
23898 case 726:
23899 case 725:
23900 case 724:
23901 case 723:
23902 case 722:
23903 case 721:
23904 case 720:
23905 case 719:
23906 case 718:
23907 case 717:
23908 case 716:
23909 case 715:
23910 case 713:
23911 case 712:
23912 case 711:
23913 case 710:
23914 case 709:
23915 case 691:
23916 case 690:
23917 case 689:
23918 case 688:
23919 case 687:
23920 case 686:
23921 case 685:
23922 case 684:
23923 case 683:
23924 case 682:
23925 case 657:
23926 case 654:
23927 case 651:
23928 case 648:
23929 case 640:
23930 case 639:
23931 case 637:
23932 case 586:
23933 case 583:
23934 case 553:
23935 case 550:
23936 case 502:
23937 case 501:
23938 case 500:
23939 case 499:
23940 case 172:
23941 case 169:
23942 case 166:
23943 case 163:
23944 case 155:
23945 case 154:
23946 case 150:
23947 case 149:
23948 case 137:
23949 case 128:
23950 case 126:
23951 case 125:
23952 case 121:
23953 case 120:
23954 case 117:
23955 case 116:
23956 case 113:
23957 case 110:
23958 case 107:
23959 case 69:
23960 case 64:
23961 case 63:
23962 case 36:
23963 case 33:
23964 case 412:
23965 case 430:
23966 case 536:
23967 return 1;
23968
23969 case -1:
23970 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
23971 && asm_noperands (PATTERN (insn)) < 0)
23972 fatal_insn_not_found (insn);
23973 default:
23974 return 0;
23975
23976 }
23977 }
23978
23979 extern int get_attr_prefix_rep PARAMS ((rtx));
23980 int
23981 get_attr_prefix_rep (insn)
23982 rtx insn;
23983 {
23984 switch (recog_memoized (insn))
23985 {
23986 case 585:
23987 case 582:
23988 extract_constrain_insn_cached (insn);
23989 if (which_alternative != 0)
23990 {
23991 return 1;
23992 }
23993 else
23994 {
23995 return 0;
23996 }
23997
23998 case 563:
23999 case 562:
24000 case 558:
24001 case 557:
24002 if (get_attr_unit (insn) == UNIT_SSE)
24003 {
24004 return 1;
24005 }
24006 else
24007 {
24008 return 0;
24009 }
24010
24011 case 552:
24012 case 549:
24013 extract_constrain_insn_cached (insn);
24014 if (which_alternative == 1)
24015 {
24016 return 1;
24017 }
24018 else
24019 {
24020 return 0;
24021 }
24022
24023 case 171:
24024 case 168:
24025 case 165:
24026 case 162:
24027 extract_constrain_insn_cached (insn);
24028 if ((which_alternative != 0) && (which_alternative != 1))
24029 {
24030 return 1;
24031 }
24032 else
24033 {
24034 return 0;
24035 }
24036
24037 case 135:
24038 extract_constrain_insn_cached (insn);
24039 if (which_alternative == 0)
24040 {
24041 return 1;
24042 }
24043 else
24044 {
24045 return 0;
24046 }
24047
24048 case 134:
24049 extract_constrain_insn_cached (insn);
24050 if ((which_alternative != 0) && ((which_alternative != 1) && ((which_alternative != 2) && (which_alternative != 3))))
24051 {
24052 return 1;
24053 }
24054 else
24055 {
24056 return 0;
24057 }
24058
24059 case 127:
24060 extract_constrain_insn_cached (insn);
24061 if (which_alternative == 2)
24062 {
24063 return 1;
24064 }
24065 else
24066 {
24067 return 0;
24068 }
24069
24070 case 94:
24071 case 93:
24072 extract_constrain_insn_cached (insn);
24073 if ((((which_alternative != 1) && (which_alternative != 2)) && ((which_alternative != 0) && ((which_alternative != 3) && (which_alternative != 4)))) && ((which_alternative != 3) && ((which_alternative != 4) && (which_alternative != 5))))
24074 {
24075 return 1;
24076 }
24077 else
24078 {
24079 return 0;
24080 }
24081
24082 case 89:
24083 extract_constrain_insn_cached (insn);
24084 if ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8))))) && ((which_alternative == 0) || ((which_alternative == 1) || ((which_alternative == 2) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8)))))))
24085 {
24086 return 1;
24087 }
24088 else
24089 {
24090 return 0;
24091 }
24092
24093 case 1035:
24094 case 1034:
24095 case 1018:
24096 case 1017:
24097 case 1016:
24098 case 928:
24099 case 927:
24100 case 926:
24101 case 925:
24102 case 904:
24103 case 903:
24104 case 902:
24105 case 901:
24106 case 898:
24107 case 896:
24108 case 894:
24109 case 892:
24110 case 890:
24111 case 888:
24112 case 886:
24113 case 791:
24114 case 790:
24115 case 789:
24116 case 788:
24117 case 787:
24118 case 786:
24119 case 785:
24120 case 782:
24121 case 780:
24122 case 776:
24123 case 775:
24124 case 774:
24125 case 773:
24126 case 744:
24127 case 742:
24128 case 740:
24129 case 738:
24130 case 736:
24131 case 734:
24132 case 732:
24133 case 729:
24134 case 728:
24135 case 727:
24136 case 657:
24137 case 654:
24138 case 651:
24139 case 648:
24140 case 586:
24141 case 583:
24142 case 553:
24143 case 550:
24144 case 502:
24145 case 501:
24146 case 172:
24147 case 169:
24148 case 166:
24149 case 163:
24150 case 137:
24151 case 128:
24152 case 613:
24153 case 614:
24154 case 615:
24155 case 616:
24156 case 617:
24157 case 625:
24158 case 626:
24159 case 627:
24160 case 628:
24161 case 629:
24162 case 630:
24163 case 631:
24164 case 632:
24165 case 633:
24166 case 634:
24167 case 635:
24168 return 1;
24169
24170 case -1:
24171 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
24172 && asm_noperands (PATTERN (insn)) < 0)
24173 fatal_insn_not_found (insn);
24174 default:
24175 return 0;
24176
24177 }
24178 }
24179
24180 extern int get_attr_prefix_data16 PARAMS ((rtx));
24181 int
24182 get_attr_prefix_data16 (insn)
24183 rtx insn;
24184 {
24185 switch (recog_memoized (insn))
24186 {
24187 case 417:
24188 extract_constrain_insn_cached (insn);
24189 if (which_alternative == 0)
24190 {
24191 return 1;
24192 }
24193 else
24194 {
24195 return 0;
24196 }
24197
24198 case 292:
24199 case 209:
24200 extract_constrain_insn_cached (insn);
24201 if ((which_alternative == 0) || (which_alternative == 1))
24202 {
24203 return 1;
24204 }
24205 else
24206 {
24207 return 0;
24208 }
24209
24210 case 50:
24211 if (get_attr_mode (insn) == MODE_HI)
24212 {
24213 return 1;
24214 }
24215 else
24216 {
24217 return 0;
24218 }
24219
24220 case 1030:
24221 case 1028:
24222 case 1026:
24223 case 1019:
24224 case 1015:
24225 case 1014:
24226 case 1004:
24227 case 1003:
24228 case 930:
24229 case 915:
24230 case 912:
24231 case 911:
24232 case 909:
24233 case 906:
24234 case 905:
24235 case 900:
24236 case 899:
24237 case 897:
24238 case 895:
24239 case 893:
24240 case 891:
24241 case 889:
24242 case 887:
24243 case 885:
24244 case 760:
24245 case 759:
24246 case 758:
24247 case 757:
24248 case 756:
24249 case 755:
24250 case 754:
24251 case 753:
24252 case 689:
24253 case 640:
24254 case 622:
24255 case 621:
24256 case 610:
24257 case 609:
24258 case 494:
24259 case 482:
24260 case 468:
24261 case 466:
24262 case 444:
24263 case 442:
24264 case 419:
24265 case 418:
24266 case 405:
24267 case 404:
24268 case 357:
24269 case 356:
24270 case 337:
24271 case 336:
24272 case 335:
24273 case 315:
24274 case 314:
24275 case 313:
24276 case 293:
24277 case 278:
24278 case 275:
24279 case 248:
24280 case 240:
24281 case 239:
24282 case 238:
24283 case 214:
24284 case 212:
24285 case 211:
24286 case 210:
24287 case 160:
24288 case 159:
24289 case 124:
24290 case 110:
24291 case 109:
24292 case 108:
24293 case 57:
24294 case 56:
24295 case 55:
24296 case 53:
24297 case 52:
24298 case 51:
24299 case 48:
24300 case 8:
24301 case 7:
24302 case 6:
24303 return 1;
24304
24305 case -1:
24306 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
24307 && asm_noperands (PATTERN (insn)) < 0)
24308 fatal_insn_not_found (insn);
24309 default:
24310 return 0;
24311
24312 }
24313 }
24314
24315 extern enum attr_type get_attr_type PARAMS ((rtx));
24316 enum attr_type
24317 get_attr_type (insn)
24318 rtx insn;
24319 {
24320 switch (recog_memoized (insn))
24321 {
24322 case 714:
24323 extract_constrain_insn_cached (insn);
24324 if ((which_alternative == 0) || (which_alternative == 1))
24325 {
24326 return TYPE_OTHER;
24327 }
24328 else
24329 {
24330 return TYPE_SSEMOV;
24331 }
24332
24333 case 642:
24334 extract_constrain_insn_cached (insn);
24335 if ((which_alternative == 0) || (which_alternative == 1))
24336 {
24337 return TYPE_FCMOV;
24338 }
24339 else if (which_alternative == 2)
24340 {
24341 return TYPE_MULTI;
24342 }
24343 else
24344 {
24345 return TYPE_MULTI;
24346 }
24347
24348 case 643:
24349 case 641:
24350 extract_constrain_insn_cached (insn);
24351 if ((which_alternative == 0) || (which_alternative == 1))
24352 {
24353 return TYPE_FCMOV;
24354 }
24355 else if (which_alternative == 2)
24356 {
24357 return TYPE_ICMOV;
24358 }
24359 else
24360 {
24361 return TYPE_ICMOV;
24362 }
24363
24364 case 292:
24365 case 288:
24366 extract_constrain_insn_cached (insn);
24367 if ((which_alternative == 0) || (which_alternative == 1))
24368 {
24369 return TYPE_ALU;
24370 }
24371 else
24372 {
24373 return TYPE_IMOVX;
24374 }
24375
24376 case 286:
24377 extract_constrain_insn_cached (insn);
24378 if ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))
24379 {
24380 return TYPE_ALU;
24381 }
24382 else
24383 {
24384 return TYPE_IMOVX;
24385 }
24386
24387 case 202:
24388 extract_constrain_insn_cached (insn);
24389 if ((which_alternative != 0) || (pic_symbolic_operand (operands[2], SImode)))
24390 {
24391 return TYPE_LEA;
24392 }
24393 else if (incdec_operand (operands[2], SImode))
24394 {
24395 return TYPE_INCDEC;
24396 }
24397 else
24398 {
24399 return TYPE_ALU;
24400 }
24401
24402 case 201:
24403 extract_constrain_insn_cached (insn);
24404 if ((which_alternative == 2) || (pic_symbolic_operand (operands[2], SImode)))
24405 {
24406 return TYPE_LEA;
24407 }
24408 else if (incdec_operand (operands[2], SImode))
24409 {
24410 return TYPE_INCDEC;
24411 }
24412 else
24413 {
24414 return TYPE_ALU;
24415 }
24416
24417 case 196:
24418 extract_constrain_insn_cached (insn);
24419 if ((which_alternative == 2) || (pic_symbolic_operand (operands[2], DImode)))
24420 {
24421 return TYPE_LEA;
24422 }
24423 else if (incdec_operand (operands[2], DImode))
24424 {
24425 return TYPE_INCDEC;
24426 }
24427 else
24428 {
24429 return TYPE_ALU;
24430 }
24431
24432 case 134:
24433 extract_constrain_insn_cached (insn);
24434 if (which_alternative == 0)
24435 {
24436 return TYPE_FMOV;
24437 }
24438 else if ((which_alternative == 1) || ((which_alternative == 2) || (which_alternative == 3)))
24439 {
24440 return TYPE_MULTI;
24441 }
24442 else
24443 {
24444 return TYPE_SSECVT;
24445 }
24446
24447 case 144:
24448 case 142:
24449 case 140:
24450 case 138:
24451 case 133:
24452 extract_constrain_insn_cached (insn);
24453 if (which_alternative == 0)
24454 {
24455 return TYPE_FMOV;
24456 }
24457 else if ((which_alternative == 1) || (which_alternative == 2))
24458 {
24459 return TYPE_MULTI;
24460 }
24461 else
24462 {
24463 return TYPE_MULTI;
24464 }
24465
24466 case 127:
24467 extract_constrain_insn_cached (insn);
24468 if ((which_alternative == 0) || (which_alternative == 1))
24469 {
24470 return TYPE_FMOV;
24471 }
24472 else
24473 {
24474 return TYPE_SSECVT;
24475 }
24476
24477 case 103:
24478 case 102:
24479 case 101:
24480 case 100:
24481 extract_constrain_insn_cached (insn);
24482 if ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))
24483 {
24484 return TYPE_FMOV;
24485 }
24486 else if (which_alternative == 3)
24487 {
24488 return TYPE_MULTI;
24489 }
24490 else
24491 {
24492 return TYPE_MULTI;
24493 }
24494
24495 case 94:
24496 case 93:
24497 extract_constrain_insn_cached (insn);
24498 if ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))
24499 {
24500 return TYPE_FMOV;
24501 }
24502 else if ((which_alternative == 3) || (which_alternative == 4))
24503 {
24504 return TYPE_MULTI;
24505 }
24506 else
24507 {
24508 return TYPE_SSEMOV;
24509 }
24510
24511 case 89:
24512 extract_constrain_insn_cached (insn);
24513 if ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))
24514 {
24515 return TYPE_FMOV;
24516 }
24517 else if ((which_alternative == 3) || (which_alternative == 4))
24518 {
24519 return TYPE_IMOV;
24520 }
24521 else if ((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8))))
24522 {
24523 return TYPE_SSEMOV;
24524 }
24525 else
24526 {
24527 return TYPE_MMXMOV;
24528 }
24529
24530 case 82:
24531 extract_constrain_insn_cached (insn);
24532 if ((which_alternative == 0) || (which_alternative == 1))
24533 {
24534 return TYPE_OTHER;
24535 }
24536 else if ((which_alternative == 2) || (which_alternative == 3))
24537 {
24538 return TYPE_MMX;
24539 }
24540 else
24541 {
24542 return TYPE_SSEMOV;
24543 }
24544
24545 case 59:
24546 extract_constrain_insn_cached (insn);
24547 if ((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0))))
24548 {
24549 return TYPE_IMOV;
24550 }
24551 else if ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2))))
24552 {
24553 return TYPE_IMOVX;
24554 }
24555 else
24556 {
24557 return TYPE_IMOV;
24558 }
24559
24560 case 50:
24561 extract_constrain_insn_cached (insn);
24562 if (((which_alternative == 0) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_HIMODE_MATH) == (0)))) || (((which_alternative == 1) || (which_alternative == 2)) && (aligned_operand (operands[1], HImode))))
24563 {
24564 return TYPE_IMOV;
24565 }
24566 else if (((TARGET_MOVX) != (0)) && ((which_alternative == 0) || (which_alternative == 2)))
24567 {
24568 return TYPE_IMOVX;
24569 }
24570 else
24571 {
24572 return TYPE_IMOV;
24573 }
24574
24575 case 0:
24576 case 3:
24577 case 6:
24578 case 9:
24579 extract_constrain_insn_cached (insn);
24580 if (which_alternative == 0)
24581 {
24582 return TYPE_TEST;
24583 }
24584 else
24585 {
24586 return TYPE_ICMP;
24587 }
24588
24589 case 32:
24590 case 35:
24591 extract_constrain_insn_cached (insn);
24592 if (which_alternative == 0)
24593 {
24594 return TYPE_FCMP;
24595 }
24596 else
24597 {
24598 return TYPE_SSECMP;
24599 }
24600
24601 case 44:
24602 extract_constrain_insn_cached (insn);
24603 if ((which_alternative == 2) || ((which_alternative == 3) || (which_alternative == 4)))
24604 {
24605 return TYPE_MMXMOV;
24606 }
24607 else if ((which_alternative == 5) || ((which_alternative == 6) || (which_alternative == 7)))
24608 {
24609 return TYPE_SSEMOV;
24610 }
24611 else if (((flag_pic) != (0)) && (symbolic_operand (operands[1], SImode)))
24612 {
24613 return TYPE_LEA;
24614 }
24615 else
24616 {
24617 return TYPE_IMOV;
24618 }
24619
24620 case 65:
24621 extract_constrain_insn_cached (insn);
24622 if ((register_operand (operands[0], QImode)) && ((! (q_regs_operand (operands[0], QImode))) || ((TARGET_MOVX) != (0))))
24623 {
24624 return TYPE_IMOVX;
24625 }
24626 else
24627 {
24628 return TYPE_IMOV;
24629 }
24630
24631 case 66:
24632 extract_constrain_insn_cached (insn);
24633 if ((register_operand (operands[0], QImode)) && ((! (q_regs_operand (operands[0], QImode))) || ((TARGET_MOVX) != (0))))
24634 {
24635 return TYPE_IMOVX;
24636 }
24637 else
24638 {
24639 return TYPE_IMOV;
24640 }
24641
24642 case 70:
24643 extract_constrain_insn_cached (insn);
24644 if ((register_operand (operands[0], QImode)) && ((! (q_regs_operand (operands[0], QImode))) || ((TARGET_MOVX) != (0))))
24645 {
24646 return TYPE_IMOVX;
24647 }
24648 else
24649 {
24650 return TYPE_IMOV;
24651 }
24652
24653 case 71:
24654 extract_constrain_insn_cached (insn);
24655 if ((! (q_regs_operand (operands[0], QImode))) || ((TARGET_MOVX) != (0)))
24656 {
24657 return TYPE_IMOVX;
24658 }
24659 else
24660 {
24661 return TYPE_IMOV;
24662 }
24663
24664 case 76:
24665 extract_constrain_insn_cached (insn);
24666 if (which_alternative == 0)
24667 {
24668 return TYPE_PUSH;
24669 }
24670 else
24671 {
24672 return TYPE_MULTI;
24673 }
24674
24675 case 83:
24676 extract_constrain_insn_cached (insn);
24677 if ((which_alternative == 5) || (which_alternative == 6))
24678 {
24679 return TYPE_MMXMOV;
24680 }
24681 else if ((which_alternative == 7) || ((which_alternative == 8) || (which_alternative == 9)))
24682 {
24683 return TYPE_SSEMOV;
24684 }
24685 else if (which_alternative == 4)
24686 {
24687 return TYPE_MULTI;
24688 }
24689 else if (((flag_pic) != (0)) && (symbolic_operand (operands[1], DImode)))
24690 {
24691 return TYPE_LEA;
24692 }
24693 else
24694 {
24695 return TYPE_IMOV;
24696 }
24697
24698 case 87:
24699 case 88:
24700 extract_constrain_insn_cached (insn);
24701 if (which_alternative == 0)
24702 {
24703 return TYPE_MULTI;
24704 }
24705 else if (which_alternative == 1)
24706 {
24707 return TYPE_PUSH;
24708 }
24709 else
24710 {
24711 return TYPE_MULTI;
24712 }
24713
24714 case 109:
24715 case 112:
24716 extract_constrain_insn_cached (insn);
24717 if (which_alternative == 0)
24718 {
24719 return TYPE_IMOVX;
24720 }
24721 else
24722 {
24723 return TYPE_ALU1;
24724 }
24725
24726 case 115:
24727 extract_constrain_insn_cached (insn);
24728 if (which_alternative == 0)
24729 {
24730 return TYPE_IMOVX;
24731 }
24732 else
24733 {
24734 return TYPE_IMOV;
24735 }
24736
24737 case 135:
24738 extract_constrain_insn_cached (insn);
24739 if (which_alternative == 0)
24740 {
24741 return TYPE_SSECVT;
24742 }
24743 else
24744 {
24745 return TYPE_FMOV;
24746 }
24747
24748 case 162:
24749 case 165:
24750 case 168:
24751 case 171:
24752 extract_constrain_insn_cached (insn);
24753 if (which_alternative == 0)
24754 {
24755 return TYPE_FMOV;
24756 }
24757 else if (which_alternative == 1)
24758 {
24759 return TYPE_MULTI;
24760 }
24761 else
24762 {
24763 return TYPE_SSECVT;
24764 }
24765
24766 case 161:
24767 case 164:
24768 case 167:
24769 case 170:
24770 case 173:
24771 case 174:
24772 case 175:
24773 case 176:
24774 case 177:
24775 case 178:
24776 extract_constrain_insn_cached (insn);
24777 if (which_alternative == 0)
24778 {
24779 return TYPE_FMOV;
24780 }
24781 else
24782 {
24783 return TYPE_MULTI;
24784 }
24785
24786 case 197:
24787 case 198:
24788 case 199:
24789 case 200:
24790 extract_insn_cached (insn);
24791 if (incdec_operand (operands[2], DImode))
24792 {
24793 return TYPE_INCDEC;
24794 }
24795 else
24796 {
24797 return TYPE_ALU;
24798 }
24799
24800 case 203:
24801 case 204:
24802 case 205:
24803 case 206:
24804 case 207:
24805 case 208:
24806 extract_insn_cached (insn);
24807 if (incdec_operand (operands[2], SImode))
24808 {
24809 return TYPE_INCDEC;
24810 }
24811 else
24812 {
24813 return TYPE_ALU;
24814 }
24815
24816 case 209:
24817 extract_constrain_insn_cached (insn);
24818 if (which_alternative == 2)
24819 {
24820 return TYPE_LEA;
24821 }
24822 else
24823 {
24824 if (incdec_operand (operands[2], HImode))
24825 {
24826 return TYPE_INCDEC;
24827 }
24828 else
24829 {
24830 return TYPE_ALU;
24831 }
24832 }
24833
24834 case 215:
24835 extract_constrain_insn_cached (insn);
24836 if (which_alternative == 3)
24837 {
24838 return TYPE_LEA;
24839 }
24840 else
24841 {
24842 if (incdec_operand (operands[2], QImode))
24843 {
24844 return TYPE_INCDEC;
24845 }
24846 else
24847 {
24848 return TYPE_ALU;
24849 }
24850 }
24851
24852 case 217:
24853 extract_insn_cached (insn);
24854 if (incdec_operand (operands[2], QImode))
24855 {
24856 return TYPE_INCDEC;
24857 }
24858 else
24859 {
24860 return TYPE_ALU1;
24861 }
24862
24863 case 210:
24864 case 211:
24865 case 212:
24866 case 213:
24867 case 214:
24868 case 220:
24869 extract_insn_cached (insn);
24870 if (incdec_operand (operands[2], HImode))
24871 {
24872 return TYPE_INCDEC;
24873 }
24874 else
24875 {
24876 return TYPE_ALU;
24877 }
24878
24879 case 216:
24880 case 218:
24881 case 219:
24882 case 221:
24883 case 222:
24884 case 223:
24885 extract_insn_cached (insn);
24886 if (incdec_operand (operands[2], QImode))
24887 {
24888 return TYPE_INCDEC;
24889 }
24890 else
24891 {
24892 return TYPE_ALU;
24893 }
24894
24895 case 408:
24896 extract_constrain_insn_cached (insn);
24897 if (which_alternative == 1)
24898 {
24899 return TYPE_LEA;
24900 }
24901 else if ((((TARGET_DOUBLE_WITH_ADD) != (0)) && (register_operand (operands[0], VOIDmode))) && (const1_operand (operands[2], VOIDmode)))
24902 {
24903 return TYPE_ALU;
24904 }
24905 else
24906 {
24907 return TYPE_ISHIFT;
24908 }
24909
24910 case 409:
24911 extract_constrain_insn_cached (insn);
24912 if ((((TARGET_DOUBLE_WITH_ADD) != (0)) && (register_operand (operands[0], VOIDmode))) && (const1_operand (operands[2], VOIDmode)))
24913 {
24914 return TYPE_ALU;
24915 }
24916 else
24917 {
24918 return TYPE_ISHIFT;
24919 }
24920
24921 case 413:
24922 extract_constrain_insn_cached (insn);
24923 if (which_alternative == 1)
24924 {
24925 return TYPE_LEA;
24926 }
24927 else if ((((TARGET_DOUBLE_WITH_ADD) != (0)) && (register_operand (operands[0], VOIDmode))) && (const1_operand (operands[2], VOIDmode)))
24928 {
24929 return TYPE_ALU;
24930 }
24931 else
24932 {
24933 return TYPE_ISHIFT;
24934 }
24935
24936 case 414:
24937 extract_constrain_insn_cached (insn);
24938 if (which_alternative == 1)
24939 {
24940 return TYPE_LEA;
24941 }
24942 else if (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode)))
24943 {
24944 return TYPE_ALU;
24945 }
24946 else
24947 {
24948 return TYPE_ISHIFT;
24949 }
24950
24951 case 415:
24952 extract_constrain_insn_cached (insn);
24953 if ((((TARGET_DOUBLE_WITH_ADD) != (0)) && (register_operand (operands[0], VOIDmode))) && (const1_operand (operands[2], VOIDmode)))
24954 {
24955 return TYPE_ALU;
24956 }
24957 else
24958 {
24959 return TYPE_ISHIFT;
24960 }
24961
24962 case 416:
24963 extract_constrain_insn_cached (insn);
24964 if (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode)))
24965 {
24966 return TYPE_ALU;
24967 }
24968 else
24969 {
24970 return TYPE_ISHIFT;
24971 }
24972
24973 case 417:
24974 extract_constrain_insn_cached (insn);
24975 if (which_alternative == 1)
24976 {
24977 return TYPE_LEA;
24978 }
24979 else if ((((TARGET_DOUBLE_WITH_ADD) != (0)) && (register_operand (operands[0], VOIDmode))) && (const1_operand (operands[2], VOIDmode)))
24980 {
24981 return TYPE_ALU;
24982 }
24983 else
24984 {
24985 return TYPE_ISHIFT;
24986 }
24987
24988 case 418:
24989 extract_constrain_insn_cached (insn);
24990 if ((((TARGET_DOUBLE_WITH_ADD) != (0)) && (register_operand (operands[0], VOIDmode))) && (const1_operand (operands[2], VOIDmode)))
24991 {
24992 return TYPE_ALU;
24993 }
24994 else
24995 {
24996 return TYPE_ISHIFT;
24997 }
24998
24999 case 419:
25000 extract_constrain_insn_cached (insn);
25001 if ((((TARGET_DOUBLE_WITH_ADD) != (0)) && (register_operand (operands[0], VOIDmode))) && (const1_operand (operands[2], VOIDmode)))
25002 {
25003 return TYPE_ALU;
25004 }
25005 else
25006 {
25007 return TYPE_ISHIFT;
25008 }
25009
25010 case 420:
25011 extract_constrain_insn_cached (insn);
25012 if (which_alternative == 2)
25013 {
25014 return TYPE_LEA;
25015 }
25016 else if ((((TARGET_DOUBLE_WITH_ADD) != (0)) && (register_operand (operands[0], VOIDmode))) && (const1_operand (operands[2], VOIDmode)))
25017 {
25018 return TYPE_ALU;
25019 }
25020 else
25021 {
25022 return TYPE_ISHIFT;
25023 }
25024
25025 case 421:
25026 extract_constrain_insn_cached (insn);
25027 if ((((TARGET_DOUBLE_WITH_ADD) != (0)) && (register_operand (operands[0], VOIDmode))) && (const1_operand (operands[2], VOIDmode)))
25028 {
25029 return TYPE_ALU;
25030 }
25031 else
25032 {
25033 return TYPE_ISHIFT;
25034 }
25035
25036 case 422:
25037 extract_constrain_insn_cached (insn);
25038 if ((((TARGET_DOUBLE_WITH_ADD) != (0)) && (register_operand (operands[0], VOIDmode))) && (const1_operand (operands[2], VOIDmode)))
25039 {
25040 return TYPE_ALU;
25041 }
25042 else
25043 {
25044 return TYPE_ISHIFT;
25045 }
25046
25047 case 423:
25048 case 431:
25049 case 432:
25050 extract_constrain_insn_cached (insn);
25051 if (which_alternative == 0)
25052 {
25053 return TYPE_IMOVX;
25054 }
25055 else
25056 {
25057 return TYPE_ISHIFT;
25058 }
25059
25060 case 548:
25061 case 551:
25062 extract_insn_cached (insn);
25063 if (mult_operator (operands[3], SFmode))
25064 {
25065 return TYPE_FMUL;
25066 }
25067 else
25068 {
25069 return TYPE_FOP;
25070 }
25071
25072 case 549:
25073 case 552:
25074 extract_constrain_insn_cached (insn);
25075 if (which_alternative == 1)
25076 {
25077 if (mult_operator (operands[3], SFmode))
25078 {
25079 return TYPE_SSEMUL;
25080 }
25081 else
25082 {
25083 return TYPE_SSEADD;
25084 }
25085 }
25086 else
25087 {
25088 if (mult_operator (operands[3], SFmode))
25089 {
25090 return TYPE_FMUL;
25091 }
25092 else
25093 {
25094 return TYPE_FOP;
25095 }
25096 }
25097
25098 case 550:
25099 case 553:
25100 extract_insn_cached (insn);
25101 if (mult_operator (operands[3], SFmode))
25102 {
25103 return TYPE_SSEMUL;
25104 }
25105 else
25106 {
25107 return TYPE_SSEADD;
25108 }
25109
25110 case 554:
25111 extract_insn_cached (insn);
25112 if (mult_operator (operands[3], XFmode))
25113 {
25114 return TYPE_FMUL;
25115 }
25116 else
25117 {
25118 return TYPE_FOP;
25119 }
25120
25121 case 555:
25122 extract_insn_cached (insn);
25123 if (mult_operator (operands[3], TFmode))
25124 {
25125 return TYPE_FMUL;
25126 }
25127 else
25128 {
25129 return TYPE_FOP;
25130 }
25131
25132 case 557:
25133 extract_constrain_insn_cached (insn);
25134 if ((which_alternative == 2) && (mult_operator (operands[3], SFmode)))
25135 {
25136 return TYPE_SSEMUL;
25137 }
25138 else if ((which_alternative == 2) && (div_operator (operands[3], SFmode)))
25139 {
25140 return TYPE_SSEDIV;
25141 }
25142 else if (which_alternative == 2)
25143 {
25144 return TYPE_SSEADD;
25145 }
25146 else if (mult_operator (operands[3], SFmode))
25147 {
25148 return TYPE_FMUL;
25149 }
25150 else if (div_operator (operands[3], SFmode))
25151 {
25152 return TYPE_FDIV;
25153 }
25154 else
25155 {
25156 return TYPE_FOP;
25157 }
25158
25159 case 556:
25160 case 559:
25161 case 560:
25162 extract_insn_cached (insn);
25163 if (mult_operator (operands[3], SFmode))
25164 {
25165 return TYPE_FMUL;
25166 }
25167 else if (div_operator (operands[3], SFmode))
25168 {
25169 return TYPE_FDIV;
25170 }
25171 else
25172 {
25173 return TYPE_FOP;
25174 }
25175
25176 case 562:
25177 extract_constrain_insn_cached (insn);
25178 if ((which_alternative == 2) && (mult_operator (operands[3], SFmode)))
25179 {
25180 return TYPE_SSEMUL;
25181 }
25182 else if ((which_alternative == 2) && (div_operator (operands[3], SFmode)))
25183 {
25184 return TYPE_SSEDIV;
25185 }
25186 else if (which_alternative == 2)
25187 {
25188 return TYPE_SSEADD;
25189 }
25190 else if (mult_operator (operands[3], DFmode))
25191 {
25192 return TYPE_FMUL;
25193 }
25194 else if (div_operator (operands[3], DFmode))
25195 {
25196 return TYPE_FDIV;
25197 }
25198 else
25199 {
25200 return TYPE_FOP;
25201 }
25202
25203 case 558:
25204 case 563:
25205 extract_insn_cached (insn);
25206 if (mult_operator (operands[3], SFmode))
25207 {
25208 return TYPE_SSEMUL;
25209 }
25210 else if (div_operator (operands[3], SFmode))
25211 {
25212 return TYPE_SSEDIV;
25213 }
25214 else
25215 {
25216 return TYPE_SSEADD;
25217 }
25218
25219 case 561:
25220 case 564:
25221 case 565:
25222 case 566:
25223 case 567:
25224 extract_insn_cached (insn);
25225 if (mult_operator (operands[3], DFmode))
25226 {
25227 return TYPE_FMUL;
25228 }
25229 else if (div_operator (operands[3], DFmode))
25230 {
25231 return TYPE_FDIV;
25232 }
25233 else
25234 {
25235 return TYPE_FOP;
25236 }
25237
25238 case 568:
25239 case 570:
25240 case 572:
25241 case 574:
25242 case 576:
25243 case 578:
25244 case 580:
25245 extract_insn_cached (insn);
25246 if (mult_operator (operands[3], XFmode))
25247 {
25248 return TYPE_FMUL;
25249 }
25250 else if (div_operator (operands[3], XFmode))
25251 {
25252 return TYPE_FDIV;
25253 }
25254 else
25255 {
25256 return TYPE_FOP;
25257 }
25258
25259 case 569:
25260 case 571:
25261 case 573:
25262 case 575:
25263 case 577:
25264 case 579:
25265 case 581:
25266 extract_insn_cached (insn);
25267 if (mult_operator (operands[3], TFmode))
25268 {
25269 return TYPE_FMUL;
25270 }
25271 else if (div_operator (operands[3], TFmode))
25272 {
25273 return TYPE_FDIV;
25274 }
25275 else
25276 {
25277 return TYPE_FOP;
25278 }
25279
25280 case 582:
25281 case 585:
25282 extract_constrain_insn_cached (insn);
25283 if (which_alternative == 0)
25284 {
25285 return TYPE_FPSPC;
25286 }
25287 else
25288 {
25289 return TYPE_SSE;
25290 }
25291
25292 case 658:
25293 extract_constrain_insn_cached (insn);
25294 if (which_alternative == 0)
25295 {
25296 return TYPE_ALU;
25297 }
25298 else if (const0_operand (operands[2], SImode))
25299 {
25300 return TYPE_IMOV;
25301 }
25302 else
25303 {
25304 return TYPE_LEA;
25305 }
25306
25307 case 659:
25308 extract_constrain_insn_cached (insn);
25309 if (which_alternative == 0)
25310 {
25311 return TYPE_ALU;
25312 }
25313 else if (const0_operand (operands[2], DImode))
25314 {
25315 return TYPE_IMOV;
25316 }
25317 else
25318 {
25319 return TYPE_LEA;
25320 }
25321
25322 case 1009:
25323 extract_constrain_insn_cached (insn);
25324 if (which_alternative == 0)
25325 {
25326 return TYPE_SSECVT;
25327 }
25328 else
25329 {
25330 return TYPE_SSEMOV;
25331 }
25332
25333 case 1010:
25334 extract_constrain_insn_cached (insn);
25335 if (which_alternative == 0)
25336 {
25337 return TYPE_SSECVT;
25338 }
25339 else if (which_alternative == 1)
25340 {
25341 return TYPE_SSEMOV;
25342 }
25343 else
25344 {
25345 return TYPE_SSECVT;
25346 }
25347
25348 case 817:
25349 case 818:
25350 case 819:
25351 case 833:
25352 case 834:
25353 case 835:
25354 case 836:
25355 case 837:
25356 case 838:
25357 case 839:
25358 case 840:
25359 case 841:
25360 case 842:
25361 case 843:
25362 case 872:
25363 return TYPE_MMXSHFT;
25364
25365 case 687:
25366 case 688:
25367 case 719:
25368 case 720:
25369 case 820:
25370 case 821:
25371 case 822:
25372 case 844:
25373 case 845:
25374 case 846:
25375 case 847:
25376 case 848:
25377 case 849:
25378 case 865:
25379 case 866:
25380 case 870:
25381 case 871:
25382 case 879:
25383 case 880:
25384 return TYPE_MMXCVT;
25385
25386 case 823:
25387 case 824:
25388 case 825:
25389 case 826:
25390 case 827:
25391 case 828:
25392 case 858:
25393 case 859:
25394 case 860:
25395 return TYPE_MMXCMP;
25396
25397 case 808:
25398 case 809:
25399 case 810:
25400 case 811:
25401 case 863:
25402 case 878:
25403 return TYPE_MMXMUL;
25404
25405 case 792:
25406 case 793:
25407 case 794:
25408 case 795:
25409 case 796:
25410 case 797:
25411 case 798:
25412 case 799:
25413 case 800:
25414 case 801:
25415 case 802:
25416 case 803:
25417 case 804:
25418 case 805:
25419 case 806:
25420 case 807:
25421 case 812:
25422 case 813:
25423 case 814:
25424 case 815:
25425 case 816:
25426 case 829:
25427 case 830:
25428 case 831:
25429 case 832:
25430 case 855:
25431 case 856:
25432 case 857:
25433 case 861:
25434 case 862:
25435 case 867:
25436 case 868:
25437 case 869:
25438 return TYPE_MMXADD;
25439
25440 case 685:
25441 case 686:
25442 case 722:
25443 return TYPE_MMXMOV;
25444
25445 case 709:
25446 case 710:
25447 case 711:
25448 case 712:
25449 case 850:
25450 case 864:
25451 case 873:
25452 case 874:
25453 case 875:
25454 case 876:
25455 case 877:
25456 case 883:
25457 case 884:
25458 return TYPE_MMX;
25459
25460 case 737:
25461 case 738:
25462 case 891:
25463 case 892:
25464 return TYPE_SSEDIV;
25465
25466 case 128:
25467 case 137:
25468 case 149:
25469 case 150:
25470 case 154:
25471 case 155:
25472 case 163:
25473 case 166:
25474 case 169:
25475 case 172:
25476 case 716:
25477 case 717:
25478 case 718:
25479 case 723:
25480 case 724:
25481 case 725:
25482 case 726:
25483 case 730:
25484 case 777:
25485 case 778:
25486 case 783:
25487 case 784:
25488 case 785:
25489 case 786:
25490 case 787:
25491 case 788:
25492 case 789:
25493 case 790:
25494 case 791:
25495 case 905:
25496 case 906:
25497 case 907:
25498 case 908:
25499 case 909:
25500 case 910:
25501 case 911:
25502 case 912:
25503 case 913:
25504 case 914:
25505 case 915:
25506 case 916:
25507 case 917:
25508 case 918:
25509 case 919:
25510 case 920:
25511 case 921:
25512 case 922:
25513 case 923:
25514 case 924:
25515 case 925:
25516 case 926:
25517 case 927:
25518 case 928:
25519 case 929:
25520 case 930:
25521 case 957:
25522 case 958:
25523 case 959:
25524 case 960:
25525 case 961:
25526 case 990:
25527 case 991:
25528 case 992:
25529 case 993:
25530 case 994:
25531 case 995:
25532 case 996:
25533 case 997:
25534 case 998:
25535 case 999:
25536 case 1000:
25537 case 1001:
25538 case 1002:
25539 case 1004:
25540 case 1006:
25541 case 1007:
25542 case 1008:
25543 case 1014:
25544 case 1015:
25545 case 1016:
25546 case 1017:
25547 case 1018:
25548 case 1019:
25549 case 1033:
25550 case 1034:
25551 case 1035:
25552 return TYPE_SSECVT;
25553
25554 case 33:
25555 case 36:
25556 case 501:
25557 case 502:
25558 case 771:
25559 case 772:
25560 case 773:
25561 case 774:
25562 case 775:
25563 case 776:
25564 case 899:
25565 case 900:
25566 case 901:
25567 case 902:
25568 case 903:
25569 case 904:
25570 case 962:
25571 case 963:
25572 case 964:
25573 case 965:
25574 case 966:
25575 case 967:
25576 return TYPE_SSECMP;
25577
25578 case 735:
25579 case 736:
25580 case 889:
25581 case 890:
25582 return TYPE_SSEMUL;
25583
25584 case 731:
25585 case 732:
25586 case 733:
25587 case 734:
25588 case 885:
25589 case 886:
25590 case 887:
25591 case 888:
25592 case 893:
25593 case 894:
25594 case 895:
25595 case 896:
25596 case 1025:
25597 case 1026:
25598 case 1027:
25599 case 1028:
25600 case 1029:
25601 case 1030:
25602 return TYPE_SSEADD;
25603
25604 case 682:
25605 case 683:
25606 case 684:
25607 case 689:
25608 case 690:
25609 case 691:
25610 case 713:
25611 case 715:
25612 case 721:
25613 case 727:
25614 case 728:
25615 case 729:
25616 case 1003:
25617 case 1005:
25618 case 1011:
25619 case 1012:
25620 case 1013:
25621 return TYPE_SSEMOV;
25622
25623 case 583:
25624 case 586:
25625 case 648:
25626 case 651:
25627 case 654:
25628 case 657:
25629 case 739:
25630 case 740:
25631 case 741:
25632 case 742:
25633 case 743:
25634 case 744:
25635 case 779:
25636 case 780:
25637 case 781:
25638 case 782:
25639 case 851:
25640 case 852:
25641 case 853:
25642 case 881:
25643 case 882:
25644 case 897:
25645 case 898:
25646 case 1020:
25647 case 1021:
25648 case 1022:
25649 case 1031:
25650 case 1032:
25651 return TYPE_SSE;
25652
25653 case 947:
25654 case 948:
25655 case 949:
25656 case 950:
25657 case 951:
25658 return TYPE_SSEIMUL;
25659
25660 case 972:
25661 case 973:
25662 case 974:
25663 case 975:
25664 case 976:
25665 case 977:
25666 case 978:
25667 case 979:
25668 case 980:
25669 case 981:
25670 case 982:
25671 case 983:
25672 case 984:
25673 case 985:
25674 case 986:
25675 case 987:
25676 case 988:
25677 case 989:
25678 return TYPE_SSEISHFT;
25679
25680 case 931:
25681 case 932:
25682 case 933:
25683 case 934:
25684 case 935:
25685 case 936:
25686 case 937:
25687 case 938:
25688 case 939:
25689 case 940:
25690 case 941:
25691 case 942:
25692 case 943:
25693 case 944:
25694 case 945:
25695 case 946:
25696 case 952:
25697 case 953:
25698 case 954:
25699 case 955:
25700 case 956:
25701 case 968:
25702 case 969:
25703 case 970:
25704 case 971:
25705 return TYPE_SSEIADD;
25706
25707 case 745:
25708 case 746:
25709 case 747:
25710 case 748:
25711 case 749:
25712 case 750:
25713 case 751:
25714 case 752:
25715 case 753:
25716 case 754:
25717 case 755:
25718 case 756:
25719 case 757:
25720 case 758:
25721 case 759:
25722 case 760:
25723 case 761:
25724 case 762:
25725 case 763:
25726 case 764:
25727 case 765:
25728 case 766:
25729 case 767:
25730 case 768:
25731 case 769:
25732 case 770:
25733 return TYPE_SSELOG;
25734
25735 case 146:
25736 case 147:
25737 case 148:
25738 case 151:
25739 case 152:
25740 case 153:
25741 case 156:
25742 case 157:
25743 case 158:
25744 return TYPE_FISTP;
25745
25746 case 90:
25747 case 95:
25748 case 104:
25749 case 105:
25750 return TYPE_FXCH;
25751
25752 case 19:
25753 case 20:
25754 case 21:
25755 case 23:
25756 case 24:
25757 case 27:
25758 case 31:
25759 case 34:
25760 return TYPE_FCMP;
25761
25762 case 644:
25763 case 645:
25764 return TYPE_FCMOV;
25765
25766 case 584:
25767 case 587:
25768 case 588:
25769 case 589:
25770 case 590:
25771 case 591:
25772 case 592:
25773 case 593:
25774 case 594:
25775 case 595:
25776 case 596:
25777 case 597:
25778 case 598:
25779 case 599:
25780 case 600:
25781 case 601:
25782 case 602:
25783 case 603:
25784 case 604:
25785 return TYPE_FPSPC;
25786
25787 case 370:
25788 case 371:
25789 case 372:
25790 case 373:
25791 case 374:
25792 case 375:
25793 case 376:
25794 case 377:
25795 case 378:
25796 case 389:
25797 case 390:
25798 case 391:
25799 case 392:
25800 case 393:
25801 case 394:
25802 case 395:
25803 case 396:
25804 case 397:
25805 return TYPE_FSGN;
25806
25807 case 129:
25808 case 130:
25809 case 131:
25810 case 132:
25811 case 136:
25812 case 139:
25813 case 141:
25814 case 143:
25815 case 145:
25816 return TYPE_FMOV;
25817
25818 case 605:
25819 return TYPE_CLD;
25820
25821 case 606:
25822 case 607:
25823 case 608:
25824 case 609:
25825 case 610:
25826 case 611:
25827 case 612:
25828 case 613:
25829 case 614:
25830 case 615:
25831 case 616:
25832 case 617:
25833 case 618:
25834 case 619:
25835 case 620:
25836 case 621:
25837 case 622:
25838 case 623:
25839 case 624:
25840 case 625:
25841 case 626:
25842 case 627:
25843 case 628:
25844 case 629:
25845 case 630:
25846 case 631:
25847 case 632:
25848 case 633:
25849 case 634:
25850 case 635:
25851 return TYPE_STR;
25852
25853 case 674:
25854 case 675:
25855 case 676:
25856 case 677:
25857 case 678:
25858 case 679:
25859 return TYPE_CALLV;
25860
25861 case 521:
25862 case 522:
25863 case 523:
25864 case 524:
25865 case 525:
25866 return TYPE_CALL;
25867
25868 case 40:
25869 case 41:
25870 case 78:
25871 case 79:
25872 return TYPE_POP;
25873
25874 case 37:
25875 case 38:
25876 case 39:
25877 case 48:
25878 case 49:
25879 case 57:
25880 case 58:
25881 case 77:
25882 return TYPE_PUSH;
25883
25884 case 637:
25885 case 639:
25886 case 640:
25887 return TYPE_ICMOV;
25888
25889 case 499:
25890 case 500:
25891 return TYPE_SETCC;
25892
25893 case 503:
25894 case 504:
25895 case 515:
25896 case 516:
25897 case 517:
25898 case 518:
25899 case 519:
25900 case 520:
25901 case 529:
25902 return TYPE_IBR;
25903
25904 case 14:
25905 case 276:
25906 case 277:
25907 case 278:
25908 case 279:
25909 case 280:
25910 case 281:
25911 case 282:
25912 case 283:
25913 return TYPE_TEST;
25914
25915 case 1:
25916 case 2:
25917 case 4:
25918 case 5:
25919 case 7:
25920 case 8:
25921 case 10:
25922 case 11:
25923 case 12:
25924 case 13:
25925 case 15:
25926 case 16:
25927 case 17:
25928 return TYPE_ICMP;
25929
25930 case 262:
25931 case 263:
25932 case 266:
25933 case 269:
25934 case 272:
25935 case 274:
25936 case 275:
25937 return TYPE_IDIV;
25938
25939 case 245:
25940 case 246:
25941 case 247:
25942 case 248:
25943 case 249:
25944 case 250:
25945 case 251:
25946 case 252:
25947 case 253:
25948 case 254:
25949 case 255:
25950 case 256:
25951 case 257:
25952 case 258:
25953 case 259:
25954 case 260:
25955 case 261:
25956 return TYPE_IMUL;
25957
25958 case 483:
25959 case 485:
25960 case 496:
25961 case 498:
25962 return TYPE_ROTATE1;
25963
25964 case 475:
25965 case 476:
25966 case 477:
25967 case 478:
25968 case 479:
25969 case 480:
25970 case 481:
25971 case 482:
25972 case 484:
25973 case 486:
25974 case 487:
25975 case 488:
25976 case 489:
25977 case 490:
25978 case 491:
25979 case 492:
25980 case 493:
25981 case 494:
25982 case 495:
25983 case 497:
25984 return TYPE_ROTATE;
25985
25986 case 446:
25987 case 448:
25988 case 470:
25989 case 472:
25990 return TYPE_ISHIFT1;
25991
25992 case 412:
25993 case 424:
25994 case 425:
25995 case 426:
25996 case 427:
25997 case 430:
25998 case 433:
25999 case 434:
26000 case 435:
26001 case 436:
26002 case 437:
26003 case 438:
26004 case 439:
26005 case 440:
26006 case 441:
26007 case 442:
26008 case 443:
26009 case 444:
26010 case 445:
26011 case 447:
26012 case 449:
26013 case 450:
26014 case 451:
26015 case 452:
26016 case 453:
26017 case 454:
26018 case 457:
26019 case 458:
26020 case 459:
26021 case 460:
26022 case 461:
26023 case 462:
26024 case 463:
26025 case 464:
26026 case 465:
26027 case 466:
26028 case 467:
26029 case 468:
26030 case 469:
26031 case 471:
26032 case 473:
26033 case 474:
26034 return TYPE_ISHIFT;
26035
26036 case 186:
26037 case 187:
26038 case 188:
26039 case 189:
26040 case 190:
26041 case 191:
26042 case 192:
26043 case 193:
26044 case 194:
26045 case 195:
26046 return TYPE_LEA;
26047
26048 case 63:
26049 case 64:
26050 case 69:
26051 case 107:
26052 case 110:
26053 case 113:
26054 case 116:
26055 case 117:
26056 case 119:
26057 case 120:
26058 case 121:
26059 case 122:
26060 case 123:
26061 case 124:
26062 case 125:
26063 case 126:
26064 return TYPE_IMOVX;
26065
26066 case 45:
26067 case 46:
26068 case 47:
26069 case 51:
26070 case 52:
26071 case 53:
26072 case 54:
26073 case 55:
26074 case 60:
26075 case 61:
26076 case 67:
26077 case 68:
26078 case 72:
26079 case 73:
26080 case 74:
26081 case 84:
26082 case 85:
26083 case 86:
26084 case 544:
26085 case 545:
26086 return TYPE_IMOV;
26087
26088 case 350:
26089 case 351:
26090 case 352:
26091 case 353:
26092 case 354:
26093 case 355:
26094 case 356:
26095 case 357:
26096 case 358:
26097 case 359:
26098 case 398:
26099 case 400:
26100 case 401:
26101 case 404:
26102 case 406:
26103 return TYPE_NEGNOT;
26104
26105 case 42:
26106 case 43:
26107 case 56:
26108 case 62:
26109 case 80:
26110 case 81:
26111 case 106:
26112 case 108:
26113 case 111:
26114 case 242:
26115 case 295:
26116 case 297:
26117 case 317:
26118 case 319:
26119 case 339:
26120 case 345:
26121 case 399:
26122 case 402:
26123 case 403:
26124 case 405:
26125 case 407:
26126 return TYPE_ALU1;
26127
26128 case 180:
26129 case 181:
26130 case 182:
26131 case 183:
26132 case 184:
26133 case 185:
26134 case 224:
26135 case 226:
26136 case 227:
26137 case 228:
26138 case 229:
26139 case 230:
26140 case 231:
26141 case 232:
26142 case 233:
26143 case 234:
26144 case 235:
26145 case 236:
26146 case 237:
26147 case 238:
26148 case 239:
26149 case 240:
26150 case 241:
26151 case 243:
26152 case 244:
26153 case 287:
26154 case 289:
26155 case 290:
26156 case 291:
26157 case 293:
26158 case 294:
26159 case 296:
26160 case 298:
26161 case 299:
26162 case 300:
26163 case 301:
26164 case 302:
26165 case 303:
26166 case 304:
26167 case 305:
26168 case 306:
26169 case 307:
26170 case 308:
26171 case 309:
26172 case 310:
26173 case 311:
26174 case 312:
26175 case 313:
26176 case 314:
26177 case 315:
26178 case 316:
26179 case 318:
26180 case 320:
26181 case 321:
26182 case 322:
26183 case 323:
26184 case 324:
26185 case 325:
26186 case 326:
26187 case 327:
26188 case 328:
26189 case 329:
26190 case 330:
26191 case 331:
26192 case 332:
26193 case 333:
26194 case 334:
26195 case 335:
26196 case 336:
26197 case 337:
26198 case 338:
26199 case 340:
26200 case 341:
26201 case 342:
26202 case 343:
26203 case 344:
26204 case 346:
26205 case 347:
26206 case 348:
26207 case 546:
26208 case 547:
26209 case 636:
26210 case 638:
26211 return TYPE_ALU;
26212
26213 case -1:
26214 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
26215 && asm_noperands (PATTERN (insn)) < 0)
26216 fatal_insn_not_found (insn);
26217 case 18:
26218 case 22:
26219 case 25:
26220 case 26:
26221 case 28:
26222 case 91:
26223 case 92:
26224 case 96:
26225 case 97:
26226 case 98:
26227 case 99:
26228 case 264:
26229 case 265:
26230 case 267:
26231 case 268:
26232 case 270:
26233 case 271:
26234 case 273:
26235 case 410:
26236 case 411:
26237 case 428:
26238 case 429:
26239 case 455:
26240 case 456:
26241 case 531:
26242 case 537:
26243 case 538:
26244 case 539:
26245 case 540:
26246 case 541:
26247 case 542:
26248 case 672:
26249 case 673:
26250 case 702:
26251 case 703:
26252 case 704:
26253 case 705:
26254 case 706:
26255 case 707:
26256 case 708:
26257 return TYPE_MULTI;
26258
26259 default:
26260 return TYPE_OTHER;
26261
26262 }
26263 }
26264
26265 extern enum attr_unit get_attr_unit PARAMS ((rtx));
26266 enum attr_unit
26267 get_attr_unit (insn)
26268 rtx insn;
26269 {
26270 switch (recog_memoized (insn))
26271 {
26272 case 714:
26273 extract_constrain_insn_cached (insn);
26274 if ((which_alternative != 0) && (which_alternative != 1))
26275 {
26276 return UNIT_SSE;
26277 }
26278 else
26279 {
26280 return UNIT_UNKNOWN;
26281 }
26282
26283 case 643:
26284 case 642:
26285 case 641:
26286 extract_constrain_insn_cached (insn);
26287 if ((which_alternative == 0) || (which_alternative == 1))
26288 {
26289 return UNIT_I387;
26290 }
26291 else
26292 {
26293 return UNIT_INTEGER;
26294 }
26295
26296 case 581:
26297 case 579:
26298 case 577:
26299 case 575:
26300 case 573:
26301 case 571:
26302 case 569:
26303 extract_insn_cached (insn);
26304 if ((get_attr_type (insn) == TYPE_FOP) || ((mult_operator (operands[3], TFmode)) || (get_attr_type (insn) == TYPE_FDIV)))
26305 {
26306 return UNIT_I387;
26307 }
26308 else
26309 {
26310 return UNIT_INTEGER;
26311 }
26312
26313 case 580:
26314 case 578:
26315 case 576:
26316 case 574:
26317 case 572:
26318 case 570:
26319 case 568:
26320 extract_insn_cached (insn);
26321 if ((get_attr_type (insn) == TYPE_FOP) || ((mult_operator (operands[3], XFmode)) || (get_attr_type (insn) == TYPE_FDIV)))
26322 {
26323 return UNIT_I387;
26324 }
26325 else
26326 {
26327 return UNIT_INTEGER;
26328 }
26329
26330 case 562:
26331 extract_constrain_insn_cached (insn);
26332 if ((get_attr_type (insn) == TYPE_FOP) || (((which_alternative != 2) && (mult_operator (operands[3], DFmode))) || (get_attr_type (insn) == TYPE_FDIV)))
26333 {
26334 return UNIT_I387;
26335 }
26336 else if ((get_attr_type (insn) == TYPE_SSEADD) || (((which_alternative == 2) && (mult_operator (operands[3], SFmode))) || (get_attr_type (insn) == TYPE_SSEDIV)))
26337 {
26338 return UNIT_SSE;
26339 }
26340 else
26341 {
26342 return UNIT_INTEGER;
26343 }
26344
26345 case 567:
26346 case 566:
26347 case 565:
26348 case 564:
26349 case 561:
26350 extract_insn_cached (insn);
26351 if ((get_attr_type (insn) == TYPE_FOP) || ((mult_operator (operands[3], DFmode)) || (get_attr_type (insn) == TYPE_FDIV)))
26352 {
26353 return UNIT_I387;
26354 }
26355 else
26356 {
26357 return UNIT_INTEGER;
26358 }
26359
26360 case 563:
26361 case 558:
26362 extract_insn_cached (insn);
26363 if ((get_attr_type (insn) == TYPE_SSEADD) || ((mult_operator (operands[3], SFmode)) || (get_attr_type (insn) == TYPE_SSEDIV)))
26364 {
26365 return UNIT_SSE;
26366 }
26367 else
26368 {
26369 return UNIT_INTEGER;
26370 }
26371
26372 case 557:
26373 extract_constrain_insn_cached (insn);
26374 if ((get_attr_type (insn) == TYPE_FOP) || (((which_alternative != 2) && (mult_operator (operands[3], SFmode))) || (get_attr_type (insn) == TYPE_FDIV)))
26375 {
26376 return UNIT_I387;
26377 }
26378 else if ((get_attr_type (insn) == TYPE_SSEADD) || (((which_alternative == 2) && (mult_operator (operands[3], SFmode))) || (get_attr_type (insn) == TYPE_SSEDIV)))
26379 {
26380 return UNIT_SSE;
26381 }
26382 else
26383 {
26384 return UNIT_INTEGER;
26385 }
26386
26387 case 560:
26388 case 559:
26389 case 556:
26390 extract_insn_cached (insn);
26391 if ((get_attr_type (insn) == TYPE_FOP) || ((mult_operator (operands[3], SFmode)) || (get_attr_type (insn) == TYPE_FDIV)))
26392 {
26393 return UNIT_I387;
26394 }
26395 else
26396 {
26397 return UNIT_INTEGER;
26398 }
26399
26400 case 552:
26401 case 549:
26402 extract_constrain_insn_cached (insn);
26403 if (which_alternative == 0)
26404 {
26405 return UNIT_I387;
26406 }
26407 else
26408 {
26409 return UNIT_SSE;
26410 }
26411
26412 case 171:
26413 case 168:
26414 case 165:
26415 case 162:
26416 extract_constrain_insn_cached (insn);
26417 if (which_alternative == 0)
26418 {
26419 return UNIT_I387;
26420 }
26421 else if (which_alternative != 1)
26422 {
26423 return UNIT_SSE;
26424 }
26425 else
26426 {
26427 return UNIT_INTEGER;
26428 }
26429
26430 case 135:
26431 extract_constrain_insn_cached (insn);
26432 if (which_alternative != 0)
26433 {
26434 return UNIT_I387;
26435 }
26436 else
26437 {
26438 return UNIT_SSE;
26439 }
26440
26441 case 134:
26442 extract_constrain_insn_cached (insn);
26443 if (which_alternative == 0)
26444 {
26445 return UNIT_I387;
26446 }
26447 else if ((which_alternative != 1) && ((which_alternative != 2) && (which_alternative != 3)))
26448 {
26449 return UNIT_SSE;
26450 }
26451 else
26452 {
26453 return UNIT_INTEGER;
26454 }
26455
26456 case 178:
26457 case 177:
26458 case 176:
26459 case 175:
26460 case 174:
26461 case 173:
26462 case 170:
26463 case 167:
26464 case 164:
26465 case 161:
26466 case 144:
26467 case 142:
26468 case 140:
26469 case 138:
26470 case 133:
26471 extract_constrain_insn_cached (insn);
26472 if (which_alternative == 0)
26473 {
26474 return UNIT_I387;
26475 }
26476 else
26477 {
26478 return UNIT_INTEGER;
26479 }
26480
26481 case 127:
26482 extract_constrain_insn_cached (insn);
26483 if ((which_alternative == 0) || (which_alternative == 1))
26484 {
26485 return UNIT_I387;
26486 }
26487 else
26488 {
26489 return UNIT_SSE;
26490 }
26491
26492 case 103:
26493 case 102:
26494 case 101:
26495 case 100:
26496 extract_constrain_insn_cached (insn);
26497 if ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))
26498 {
26499 return UNIT_I387;
26500 }
26501 else
26502 {
26503 return UNIT_INTEGER;
26504 }
26505
26506 case 94:
26507 case 93:
26508 extract_constrain_insn_cached (insn);
26509 if ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))
26510 {
26511 return UNIT_I387;
26512 }
26513 else if ((which_alternative != 3) && (which_alternative != 4))
26514 {
26515 return UNIT_SSE;
26516 }
26517 else
26518 {
26519 return UNIT_INTEGER;
26520 }
26521
26522 case 89:
26523 extract_constrain_insn_cached (insn);
26524 if ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))
26525 {
26526 return UNIT_I387;
26527 }
26528 else if ((which_alternative == 5) || ((which_alternative == 6) || ((which_alternative == 7) || (which_alternative == 8))))
26529 {
26530 return UNIT_SSE;
26531 }
26532 else if ((which_alternative == 9) || ((which_alternative == 10) || (which_alternative == 11)))
26533 {
26534 return UNIT_MMX;
26535 }
26536 else
26537 {
26538 return UNIT_INTEGER;
26539 }
26540
26541 case 83:
26542 extract_constrain_insn_cached (insn);
26543 if (((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative == 7) || ((which_alternative == 8) || (which_alternative == 9))))
26544 {
26545 return UNIT_SSE;
26546 }
26547 else if ((which_alternative == 5) || (which_alternative == 6))
26548 {
26549 return UNIT_MMX;
26550 }
26551 else
26552 {
26553 return UNIT_INTEGER;
26554 }
26555
26556 case 82:
26557 extract_constrain_insn_cached (insn);
26558 if ((which_alternative != 0) && ((which_alternative != 1) && ((which_alternative != 2) && (which_alternative != 3))))
26559 {
26560 return UNIT_SSE;
26561 }
26562 else if ((which_alternative == 2) || (which_alternative == 3))
26563 {
26564 return UNIT_MMX;
26565 }
26566 else if ((which_alternative == 0) || (which_alternative == 1))
26567 {
26568 return UNIT_UNKNOWN;
26569 }
26570 else
26571 {
26572 return UNIT_INTEGER;
26573 }
26574
26575 case 44:
26576 extract_constrain_insn_cached (insn);
26577 if (((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))) && ((which_alternative == 5) || ((which_alternative == 6) || (which_alternative == 7))))
26578 {
26579 return UNIT_SSE;
26580 }
26581 else if ((which_alternative == 2) || ((which_alternative == 3) || (which_alternative == 4)))
26582 {
26583 return UNIT_MMX;
26584 }
26585 else
26586 {
26587 return UNIT_INTEGER;
26588 }
26589
26590 case 585:
26591 case 582:
26592 case 35:
26593 case 32:
26594 extract_constrain_insn_cached (insn);
26595 if (which_alternative == 0)
26596 {
26597 return UNIT_I387;
26598 }
26599 else
26600 {
26601 return UNIT_SSE;
26602 }
26603
26604 case 1024:
26605 case 1023:
26606 case 854:
26607 case 701:
26608 case 700:
26609 case 699:
26610 case 698:
26611 case 697:
26612 case 696:
26613 case 695:
26614 case 694:
26615 case 693:
26616 case 692:
26617 case 681:
26618 case 680:
26619 case 671:
26620 case 670:
26621 case 669:
26622 case 668:
26623 case 667:
26624 case 666:
26625 case 665:
26626 case 664:
26627 case 663:
26628 case 662:
26629 case 661:
26630 case 660:
26631 case 656:
26632 case 655:
26633 case 653:
26634 case 652:
26635 case 650:
26636 case 649:
26637 case 647:
26638 case 646:
26639 case 543:
26640 case 536:
26641 case 535:
26642 case 534:
26643 case 533:
26644 case 532:
26645 case 530:
26646 case 528:
26647 case 527:
26648 case 526:
26649 case 514:
26650 case 513:
26651 case 512:
26652 case 511:
26653 case 510:
26654 case 509:
26655 case 508:
26656 case 507:
26657 case 506:
26658 case 505:
26659 case 388:
26660 case 387:
26661 case 386:
26662 case 385:
26663 case 384:
26664 case 383:
26665 case 382:
26666 case 381:
26667 case 380:
26668 case 379:
26669 case 369:
26670 case 368:
26671 case 367:
26672 case 366:
26673 case 365:
26674 case 364:
26675 case 363:
26676 case 362:
26677 case 361:
26678 case 360:
26679 case 349:
26680 case 285:
26681 case 284:
26682 case 225:
26683 case 179:
26684 case 118:
26685 case 114:
26686 case 75:
26687 case 30:
26688 return UNIT_UNKNOWN;
26689
26690 case 884:
26691 case 883:
26692 case 880:
26693 case 879:
26694 case 878:
26695 case 877:
26696 case 876:
26697 case 875:
26698 case 874:
26699 case 873:
26700 case 872:
26701 case 871:
26702 case 870:
26703 case 869:
26704 case 868:
26705 case 867:
26706 case 866:
26707 case 865:
26708 case 864:
26709 case 863:
26710 case 862:
26711 case 861:
26712 case 860:
26713 case 859:
26714 case 858:
26715 case 857:
26716 case 856:
26717 case 855:
26718 case 850:
26719 case 849:
26720 case 848:
26721 case 847:
26722 case 846:
26723 case 845:
26724 case 844:
26725 case 843:
26726 case 842:
26727 case 841:
26728 case 840:
26729 case 839:
26730 case 838:
26731 case 837:
26732 case 836:
26733 case 835:
26734 case 834:
26735 case 833:
26736 case 832:
26737 case 831:
26738 case 830:
26739 case 829:
26740 case 828:
26741 case 827:
26742 case 826:
26743 case 825:
26744 case 824:
26745 case 823:
26746 case 822:
26747 case 821:
26748 case 820:
26749 case 819:
26750 case 818:
26751 case 817:
26752 case 816:
26753 case 815:
26754 case 814:
26755 case 813:
26756 case 812:
26757 case 811:
26758 case 810:
26759 case 809:
26760 case 808:
26761 case 807:
26762 case 806:
26763 case 805:
26764 case 804:
26765 case 803:
26766 case 802:
26767 case 801:
26768 case 800:
26769 case 799:
26770 case 798:
26771 case 797:
26772 case 796:
26773 case 795:
26774 case 794:
26775 case 793:
26776 case 792:
26777 case 722:
26778 case 720:
26779 case 719:
26780 case 712:
26781 case 711:
26782 case 710:
26783 case 709:
26784 case 688:
26785 case 687:
26786 case 686:
26787 case 685:
26788 return UNIT_MMX;
26789
26790 case 1035:
26791 case 1034:
26792 case 1033:
26793 case 1032:
26794 case 1031:
26795 case 1030:
26796 case 1029:
26797 case 1028:
26798 case 1027:
26799 case 1026:
26800 case 1025:
26801 case 1022:
26802 case 1021:
26803 case 1020:
26804 case 1019:
26805 case 1018:
26806 case 1017:
26807 case 1016:
26808 case 1015:
26809 case 1014:
26810 case 1013:
26811 case 1012:
26812 case 1011:
26813 case 1010:
26814 case 1009:
26815 case 1008:
26816 case 1007:
26817 case 1006:
26818 case 1005:
26819 case 1004:
26820 case 1003:
26821 case 1002:
26822 case 1001:
26823 case 1000:
26824 case 999:
26825 case 998:
26826 case 997:
26827 case 996:
26828 case 995:
26829 case 994:
26830 case 993:
26831 case 992:
26832 case 991:
26833 case 990:
26834 case 989:
26835 case 988:
26836 case 987:
26837 case 986:
26838 case 985:
26839 case 984:
26840 case 983:
26841 case 982:
26842 case 981:
26843 case 980:
26844 case 979:
26845 case 978:
26846 case 977:
26847 case 976:
26848 case 975:
26849 case 974:
26850 case 973:
26851 case 972:
26852 case 971:
26853 case 970:
26854 case 969:
26855 case 968:
26856 case 967:
26857 case 966:
26858 case 965:
26859 case 964:
26860 case 963:
26861 case 962:
26862 case 961:
26863 case 960:
26864 case 959:
26865 case 958:
26866 case 957:
26867 case 956:
26868 case 955:
26869 case 954:
26870 case 953:
26871 case 952:
26872 case 951:
26873 case 950:
26874 case 949:
26875 case 948:
26876 case 947:
26877 case 946:
26878 case 945:
26879 case 944:
26880 case 943:
26881 case 942:
26882 case 941:
26883 case 940:
26884 case 939:
26885 case 938:
26886 case 937:
26887 case 936:
26888 case 935:
26889 case 934:
26890 case 933:
26891 case 932:
26892 case 931:
26893 case 930:
26894 case 929:
26895 case 928:
26896 case 927:
26897 case 926:
26898 case 925:
26899 case 924:
26900 case 923:
26901 case 922:
26902 case 921:
26903 case 920:
26904 case 919:
26905 case 918:
26906 case 917:
26907 case 916:
26908 case 915:
26909 case 914:
26910 case 913:
26911 case 912:
26912 case 911:
26913 case 910:
26914 case 909:
26915 case 908:
26916 case 907:
26917 case 906:
26918 case 905:
26919 case 904:
26920 case 903:
26921 case 902:
26922 case 901:
26923 case 900:
26924 case 899:
26925 case 898:
26926 case 897:
26927 case 896:
26928 case 895:
26929 case 894:
26930 case 893:
26931 case 892:
26932 case 891:
26933 case 890:
26934 case 889:
26935 case 888:
26936 case 887:
26937 case 886:
26938 case 885:
26939 case 882:
26940 case 881:
26941 case 853:
26942 case 852:
26943 case 851:
26944 case 791:
26945 case 790:
26946 case 789:
26947 case 788:
26948 case 787:
26949 case 786:
26950 case 785:
26951 case 784:
26952 case 783:
26953 case 782:
26954 case 781:
26955 case 780:
26956 case 779:
26957 case 778:
26958 case 777:
26959 case 776:
26960 case 775:
26961 case 774:
26962 case 773:
26963 case 772:
26964 case 771:
26965 case 770:
26966 case 769:
26967 case 768:
26968 case 767:
26969 case 766:
26970 case 765:
26971 case 764:
26972 case 763:
26973 case 762:
26974 case 761:
26975 case 760:
26976 case 759:
26977 case 758:
26978 case 757:
26979 case 756:
26980 case 755:
26981 case 754:
26982 case 753:
26983 case 752:
26984 case 751:
26985 case 750:
26986 case 749:
26987 case 748:
26988 case 747:
26989 case 746:
26990 case 745:
26991 case 744:
26992 case 743:
26993 case 742:
26994 case 741:
26995 case 740:
26996 case 739:
26997 case 738:
26998 case 737:
26999 case 736:
27000 case 735:
27001 case 734:
27002 case 733:
27003 case 732:
27004 case 731:
27005 case 730:
27006 case 729:
27007 case 728:
27008 case 727:
27009 case 726:
27010 case 725:
27011 case 724:
27012 case 723:
27013 case 721:
27014 case 718:
27015 case 717:
27016 case 716:
27017 case 715:
27018 case 713:
27019 case 691:
27020 case 690:
27021 case 689:
27022 case 684:
27023 case 683:
27024 case 682:
27025 case 657:
27026 case 654:
27027 case 651:
27028 case 648:
27029 case 586:
27030 case 583:
27031 case 553:
27032 case 550:
27033 case 502:
27034 case 501:
27035 case 172:
27036 case 169:
27037 case 166:
27038 case 163:
27039 case 155:
27040 case 154:
27041 case 150:
27042 case 149:
27043 case 137:
27044 case 128:
27045 case 36:
27046 case 33:
27047 return UNIT_SSE;
27048
27049 case 645:
27050 case 644:
27051 case 604:
27052 case 603:
27053 case 602:
27054 case 601:
27055 case 600:
27056 case 599:
27057 case 598:
27058 case 597:
27059 case 596:
27060 case 595:
27061 case 594:
27062 case 593:
27063 case 592:
27064 case 591:
27065 case 590:
27066 case 589:
27067 case 588:
27068 case 587:
27069 case 584:
27070 case 555:
27071 case 554:
27072 case 551:
27073 case 548:
27074 case 397:
27075 case 396:
27076 case 395:
27077 case 394:
27078 case 393:
27079 case 392:
27080 case 391:
27081 case 390:
27082 case 389:
27083 case 378:
27084 case 377:
27085 case 376:
27086 case 375:
27087 case 374:
27088 case 373:
27089 case 372:
27090 case 371:
27091 case 370:
27092 case 158:
27093 case 157:
27094 case 156:
27095 case 153:
27096 case 152:
27097 case 151:
27098 case 148:
27099 case 147:
27100 case 146:
27101 case 145:
27102 case 143:
27103 case 141:
27104 case 139:
27105 case 136:
27106 case 132:
27107 case 131:
27108 case 130:
27109 case 129:
27110 case 105:
27111 case 104:
27112 case 95:
27113 case 90:
27114 case 34:
27115 case 31:
27116 case 27:
27117 case 24:
27118 case 23:
27119 case 21:
27120 case 20:
27121 case 19:
27122 case 29:
27123 case 159:
27124 case 160:
27125 return UNIT_I387;
27126
27127 case -1:
27128 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
27129 && asm_noperands (PATTERN (insn)) < 0)
27130 fatal_insn_not_found (insn);
27131 default:
27132 return UNIT_INTEGER;
27133
27134 }
27135 }
27136
27137 static int athlon_muldiv_unit_blockage PARAMS ((rtx, rtx));
27138 static int
27139 athlon_muldiv_unit_blockage (executing_insn, candidate_insn)
27140 rtx executing_insn;
27141 rtx candidate_insn;
27142 {
27143 rtx insn;
27144 int casenum;
27145
27146 insn = executing_insn;
27147 switch (recog_memoized (insn))
27148 {
27149 case 261:
27150 case 260:
27151 case 259:
27152 case 258:
27153 case 257:
27154 case 256:
27155 case 255:
27156 case 254:
27157 case 253:
27158 case 252:
27159 case 251:
27160 case 250:
27161 case 249:
27162 case 248:
27163 case 247:
27164 case 246:
27165 case 245:
27166 casenum = 0;
27167 break;
27168
27169 case -1:
27170 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
27171 && asm_noperands (PATTERN (insn)) < 0)
27172 fatal_insn_not_found (insn);
27173 default:
27174 casenum = 1;
27175 break;
27176
27177 }
27178
27179 insn = candidate_insn;
27180 switch (casenum)
27181 {
27182 case 0:
27183 return 1;
27184
27185 case 1:
27186 return 42 ;
27187
27188 default:
27189 abort ();
27190 }
27191 }
27192
27193 static int athlon_muldiv_unit_conflict_cost PARAMS ((rtx, rtx));
27194 static int
27195 athlon_muldiv_unit_conflict_cost (executing_insn, candidate_insn)
27196 rtx executing_insn;
27197 rtx candidate_insn;
27198 {
27199 rtx insn;
27200 int casenum;
27201
27202 insn = executing_insn;
27203 switch (recog_memoized (insn))
27204 {
27205 case 261:
27206 case 260:
27207 case 259:
27208 case 258:
27209 case 257:
27210 case 256:
27211 case 255:
27212 case 254:
27213 case 253:
27214 case 252:
27215 case 251:
27216 case 250:
27217 case 249:
27218 case 248:
27219 case 247:
27220 case 246:
27221 case 245:
27222 casenum = 0;
27223 break;
27224
27225 case -1:
27226 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
27227 && asm_noperands (PATTERN (insn)) < 0)
27228 fatal_insn_not_found (insn);
27229 default:
27230 casenum = 1;
27231 break;
27232
27233 }
27234
27235 insn = candidate_insn;
27236 switch (casenum)
27237 {
27238 case 0:
27239 return 1;
27240
27241 case 1:
27242 return 42 ;
27243
27244 default:
27245 abort ();
27246 }
27247 }
27248
27249 static int athlon_ieu_unit_blockage PARAMS ((rtx, rtx));
27250 static int
27251 athlon_ieu_unit_blockage (executing_insn, candidate_insn)
27252 rtx executing_insn;
27253 rtx candidate_insn;
27254 {
27255 rtx insn;
27256 int casenum;
27257
27258 insn = executing_insn;
27259 switch (recog_memoized (insn))
27260 {
27261 case 643:
27262 case 641:
27263 extract_constrain_insn_cached (insn);
27264 if ((which_alternative == 2) || (which_alternative == 3))
27265 {
27266 casenum = 0;
27267 }
27268 else
27269 {
27270 casenum = 3;
27271 }
27272 break;
27273
27274 case 635:
27275 case 634:
27276 case 633:
27277 case 632:
27278 case 631:
27279 case 630:
27280 case 629:
27281 case 628:
27282 case 627:
27283 case 626:
27284 case 625:
27285 case 624:
27286 case 623:
27287 case 622:
27288 case 621:
27289 case 620:
27290 case 619:
27291 case 618:
27292 case 617:
27293 case 616:
27294 case 615:
27295 case 614:
27296 case 613:
27297 case 612:
27298 case 611:
27299 case 610:
27300 case 609:
27301 case 608:
27302 case 607:
27303 case 606:
27304 casenum = 1;
27305 break;
27306
27307 case 420:
27308 extract_constrain_insn_cached (insn);
27309 if ((get_attr_type (insn) == TYPE_ALU) || ((which_alternative == 2) || (get_attr_type (insn) == TYPE_ISHIFT)))
27310 {
27311 casenum = 0;
27312 }
27313 else
27314 {
27315 casenum = 3;
27316 }
27317 break;
27318
27319 case 416:
27320 extract_constrain_insn_cached (insn);
27321 if ((((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode))) || ((! ((TARGET_DOUBLE_WITH_ADD) != (0))) || (! (const1_operand (operands[2], VOIDmode)))))
27322 {
27323 casenum = 0;
27324 }
27325 else
27326 {
27327 casenum = 3;
27328 }
27329 break;
27330
27331 case 414:
27332 extract_constrain_insn_cached (insn);
27333 if (((which_alternative == 0) && (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode)))) || ((which_alternative != 0) || ((! ((TARGET_DOUBLE_WITH_ADD) != (0))) || (! (const1_operand (operands[2], VOIDmode))))))
27334 {
27335 casenum = 0;
27336 }
27337 else
27338 {
27339 casenum = 3;
27340 }
27341 break;
27342
27343 case 422:
27344 case 421:
27345 case 419:
27346 case 418:
27347 case 415:
27348 case 409:
27349 if ((get_attr_type (insn) == TYPE_ALU) || (get_attr_type (insn) == TYPE_ISHIFT))
27350 {
27351 casenum = 0;
27352 }
27353 else
27354 {
27355 casenum = 3;
27356 }
27357 break;
27358
27359 case 417:
27360 case 413:
27361 case 408:
27362 extract_constrain_insn_cached (insn);
27363 if ((get_attr_type (insn) == TYPE_ALU) || ((which_alternative != 0) || (get_attr_type (insn) == TYPE_ISHIFT)))
27364 {
27365 casenum = 0;
27366 }
27367 else
27368 {
27369 casenum = 3;
27370 }
27371 break;
27372
27373 case 261:
27374 case 260:
27375 case 259:
27376 case 258:
27377 case 257:
27378 case 256:
27379 case 255:
27380 case 254:
27381 case 253:
27382 case 252:
27383 case 251:
27384 case 250:
27385 case 249:
27386 case 248:
27387 case 247:
27388 case 246:
27389 case 245:
27390 casenum = 2;
27391 break;
27392
27393 case 215:
27394 extract_constrain_insn_cached (insn);
27395 if (((which_alternative != 3) && (! (incdec_operand (operands[2], QImode)))) || ((which_alternative == 3) || (incdec_operand (operands[2], QImode))))
27396 {
27397 casenum = 0;
27398 }
27399 else
27400 {
27401 casenum = 3;
27402 }
27403 break;
27404
27405 case 209:
27406 extract_constrain_insn_cached (insn);
27407 if (((which_alternative != 2) && (! (incdec_operand (operands[2], HImode)))) || ((which_alternative == 2) || (incdec_operand (operands[2], HImode))))
27408 {
27409 casenum = 0;
27410 }
27411 else
27412 {
27413 casenum = 3;
27414 }
27415 break;
27416
27417 case 202:
27418 extract_constrain_insn_cached (insn);
27419 if ((get_attr_type (insn) == TYPE_ALU) || (((which_alternative != 0) || (pic_symbolic_operand (operands[2], SImode))) || (get_attr_type (insn) == TYPE_INCDEC)))
27420 {
27421 casenum = 0;
27422 }
27423 else
27424 {
27425 casenum = 3;
27426 }
27427 break;
27428
27429 case 201:
27430 extract_constrain_insn_cached (insn);
27431 if ((get_attr_type (insn) == TYPE_ALU) || (((which_alternative == 2) || (pic_symbolic_operand (operands[2], SImode))) || (get_attr_type (insn) == TYPE_INCDEC)))
27432 {
27433 casenum = 0;
27434 }
27435 else
27436 {
27437 casenum = 3;
27438 }
27439 break;
27440
27441 case 196:
27442 extract_constrain_insn_cached (insn);
27443 if ((get_attr_type (insn) == TYPE_ALU) || (((which_alternative == 2) || (pic_symbolic_operand (operands[2], DImode))) || (get_attr_type (insn) == TYPE_INCDEC)))
27444 {
27445 casenum = 0;
27446 }
27447 else
27448 {
27449 casenum = 3;
27450 }
27451 break;
27452
27453 case 89:
27454 extract_constrain_insn_cached (insn);
27455 if (((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 3) || (which_alternative == 4)))
27456 {
27457 casenum = 0;
27458 }
27459 else
27460 {
27461 casenum = 3;
27462 }
27463 break;
27464
27465 case 88:
27466 case 87:
27467 extract_constrain_insn_cached (insn);
27468 if (which_alternative == 1)
27469 {
27470 casenum = 0;
27471 }
27472 else
27473 {
27474 casenum = 3;
27475 }
27476 break;
27477
27478 case 83:
27479 extract_constrain_insn_cached (insn);
27480 if (((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative != 7) && ((which_alternative != 8) && ((which_alternative != 9) && ((which_alternative != 4) && (((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], DImode)))) || (((flag_pic) != (0)) && (symbolic_operand (operands[1], DImode)))))))))
27481 {
27482 casenum = 0;
27483 }
27484 else
27485 {
27486 casenum = 3;
27487 }
27488 break;
27489
27490 case 76:
27491 extract_constrain_insn_cached (insn);
27492 if (which_alternative == 0)
27493 {
27494 casenum = 0;
27495 }
27496 else
27497 {
27498 casenum = 3;
27499 }
27500 break;
27501
27502 case 71:
27503 extract_constrain_insn_cached (insn);
27504 if (((q_regs_operand (operands[0], QImode)) && (! ((TARGET_MOVX) != (0)))) || ((! (q_regs_operand (operands[0], QImode))) || ((TARGET_MOVX) != (0))))
27505 {
27506 casenum = 0;
27507 }
27508 else
27509 {
27510 casenum = 3;
27511 }
27512 break;
27513
27514 case 70:
27515 case 66:
27516 case 65:
27517 if ((get_attr_type (insn) == TYPE_IMOV) || (get_attr_type (insn) == TYPE_IMOVX))
27518 {
27519 casenum = 0;
27520 }
27521 else
27522 {
27523 casenum = 3;
27524 }
27525 break;
27526
27527 case 59:
27528 extract_constrain_insn_cached (insn);
27529 if ((((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2)))))) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2))))))
27530 {
27531 casenum = 0;
27532 }
27533 else
27534 {
27535 casenum = 3;
27536 }
27537 break;
27538
27539 case 50:
27540 extract_constrain_insn_cached (insn);
27541 if ((get_attr_type (insn) == TYPE_IMOV) || ((((which_alternative != 0) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_HIMODE_MATH) == (0))))) && (((which_alternative != 1) && (which_alternative != 2)) || (! (aligned_operand (operands[1], HImode))))) && (((TARGET_MOVX) != (0)) && ((which_alternative == 0) || (which_alternative == 2)))))
27542 {
27543 casenum = 0;
27544 }
27545 else
27546 {
27547 casenum = 3;
27548 }
27549 break;
27550
27551 case 44:
27552 extract_constrain_insn_cached (insn);
27553 if (((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], SImode)))) || (((flag_pic) != (0)) && (symbolic_operand (operands[1], SImode))))))))
27554 {
27555 casenum = 0;
27556 }
27557 else
27558 {
27559 casenum = 3;
27560 }
27561 break;
27562
27563 case 679:
27564 case 678:
27565 case 677:
27566 case 676:
27567 case 675:
27568 case 674:
27569 case 659:
27570 case 658:
27571 case 640:
27572 case 639:
27573 case 638:
27574 case 637:
27575 case 636:
27576 case 605:
27577 case 547:
27578 case 546:
27579 case 545:
27580 case 544:
27581 case 529:
27582 case 525:
27583 case 524:
27584 case 523:
27585 case 522:
27586 case 521:
27587 case 520:
27588 case 519:
27589 case 518:
27590 case 517:
27591 case 516:
27592 case 515:
27593 case 504:
27594 case 503:
27595 case 500:
27596 case 499:
27597 case 498:
27598 case 497:
27599 case 496:
27600 case 495:
27601 case 494:
27602 case 493:
27603 case 492:
27604 case 491:
27605 case 490:
27606 case 489:
27607 case 488:
27608 case 487:
27609 case 486:
27610 case 485:
27611 case 484:
27612 case 483:
27613 case 482:
27614 case 481:
27615 case 480:
27616 case 479:
27617 case 478:
27618 case 477:
27619 case 476:
27620 case 475:
27621 case 474:
27622 case 473:
27623 case 472:
27624 case 471:
27625 case 470:
27626 case 469:
27627 case 468:
27628 case 467:
27629 case 466:
27630 case 465:
27631 case 464:
27632 case 463:
27633 case 462:
27634 case 461:
27635 case 460:
27636 case 459:
27637 case 458:
27638 case 457:
27639 case 454:
27640 case 453:
27641 case 452:
27642 case 451:
27643 case 450:
27644 case 449:
27645 case 448:
27646 case 447:
27647 case 446:
27648 case 445:
27649 case 444:
27650 case 443:
27651 case 442:
27652 case 441:
27653 case 440:
27654 case 439:
27655 case 438:
27656 case 437:
27657 case 436:
27658 case 435:
27659 case 434:
27660 case 433:
27661 case 432:
27662 case 431:
27663 case 430:
27664 case 427:
27665 case 426:
27666 case 425:
27667 case 424:
27668 case 423:
27669 case 412:
27670 case 407:
27671 case 406:
27672 case 405:
27673 case 404:
27674 case 403:
27675 case 402:
27676 case 401:
27677 case 400:
27678 case 399:
27679 case 398:
27680 case 359:
27681 case 358:
27682 case 357:
27683 case 356:
27684 case 355:
27685 case 354:
27686 case 353:
27687 case 352:
27688 case 351:
27689 case 350:
27690 case 348:
27691 case 347:
27692 case 346:
27693 case 345:
27694 case 344:
27695 case 343:
27696 case 342:
27697 case 341:
27698 case 340:
27699 case 339:
27700 case 338:
27701 case 337:
27702 case 336:
27703 case 335:
27704 case 334:
27705 case 333:
27706 case 332:
27707 case 331:
27708 case 330:
27709 case 329:
27710 case 328:
27711 case 327:
27712 case 326:
27713 case 325:
27714 case 324:
27715 case 323:
27716 case 322:
27717 case 321:
27718 case 320:
27719 case 319:
27720 case 318:
27721 case 317:
27722 case 316:
27723 case 315:
27724 case 314:
27725 case 313:
27726 case 312:
27727 case 311:
27728 case 310:
27729 case 309:
27730 case 308:
27731 case 307:
27732 case 306:
27733 case 305:
27734 case 304:
27735 case 303:
27736 case 302:
27737 case 301:
27738 case 300:
27739 case 299:
27740 case 298:
27741 case 297:
27742 case 296:
27743 case 295:
27744 case 294:
27745 case 293:
27746 case 292:
27747 case 291:
27748 case 290:
27749 case 289:
27750 case 288:
27751 case 287:
27752 case 286:
27753 case 283:
27754 case 282:
27755 case 281:
27756 case 280:
27757 case 279:
27758 case 278:
27759 case 277:
27760 case 276:
27761 case 244:
27762 case 243:
27763 case 242:
27764 case 241:
27765 case 240:
27766 case 239:
27767 case 238:
27768 case 237:
27769 case 236:
27770 case 235:
27771 case 234:
27772 case 233:
27773 case 232:
27774 case 231:
27775 case 230:
27776 case 229:
27777 case 228:
27778 case 227:
27779 case 226:
27780 case 224:
27781 case 223:
27782 case 222:
27783 case 221:
27784 case 220:
27785 case 219:
27786 case 218:
27787 case 217:
27788 case 216:
27789 case 214:
27790 case 213:
27791 case 212:
27792 case 211:
27793 case 210:
27794 case 208:
27795 case 207:
27796 case 206:
27797 case 205:
27798 case 204:
27799 case 203:
27800 case 200:
27801 case 199:
27802 case 198:
27803 case 197:
27804 case 195:
27805 case 194:
27806 case 193:
27807 case 192:
27808 case 191:
27809 case 190:
27810 case 189:
27811 case 188:
27812 case 187:
27813 case 186:
27814 case 185:
27815 case 184:
27816 case 183:
27817 case 182:
27818 case 181:
27819 case 180:
27820 case 126:
27821 case 125:
27822 case 124:
27823 case 123:
27824 case 122:
27825 case 121:
27826 case 120:
27827 case 119:
27828 case 117:
27829 case 116:
27830 case 115:
27831 case 113:
27832 case 112:
27833 case 111:
27834 case 110:
27835 case 109:
27836 case 108:
27837 case 107:
27838 case 106:
27839 case 86:
27840 case 85:
27841 case 84:
27842 case 81:
27843 case 80:
27844 case 79:
27845 case 78:
27846 case 77:
27847 case 74:
27848 case 73:
27849 case 72:
27850 case 69:
27851 case 68:
27852 case 67:
27853 case 64:
27854 case 63:
27855 case 62:
27856 case 61:
27857 case 60:
27858 case 58:
27859 case 57:
27860 case 56:
27861 case 55:
27862 case 54:
27863 case 53:
27864 case 52:
27865 case 51:
27866 case 49:
27867 case 48:
27868 case 47:
27869 case 46:
27870 case 45:
27871 case 43:
27872 case 42:
27873 case 41:
27874 case 40:
27875 case 39:
27876 case 38:
27877 case 37:
27878 case 17:
27879 case 16:
27880 case 15:
27881 case 14:
27882 case 13:
27883 case 12:
27884 case 11:
27885 case 10:
27886 case 9:
27887 case 8:
27888 case 7:
27889 case 6:
27890 case 5:
27891 case 4:
27892 case 3:
27893 case 2:
27894 case 1:
27895 case 0:
27896 casenum = 0;
27897 break;
27898
27899 case -1:
27900 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
27901 && asm_noperands (PATTERN (insn)) < 0)
27902 fatal_insn_not_found (insn);
27903 default:
27904 casenum = 3;
27905 break;
27906
27907 }
27908
27909 insn = candidate_insn;
27910 switch (casenum)
27911 {
27912 case 0:
27913 return 1;
27914
27915 case 1:
27916 return 15 ;
27917
27918 case 2:
27919 return 1;
27920
27921 case 3:
27922 return 1;
27923
27924 default:
27925 abort ();
27926 }
27927 }
27928
27929 static int athlon_ieu_unit_conflict_cost PARAMS ((rtx, rtx));
27930 static int
27931 athlon_ieu_unit_conflict_cost (executing_insn, candidate_insn)
27932 rtx executing_insn;
27933 rtx candidate_insn;
27934 {
27935 rtx insn;
27936 int casenum;
27937
27938 insn = executing_insn;
27939 switch (recog_memoized (insn))
27940 {
27941 case 643:
27942 case 641:
27943 extract_constrain_insn_cached (insn);
27944 if ((which_alternative == 2) || (which_alternative == 3))
27945 {
27946 casenum = 0;
27947 }
27948 else
27949 {
27950 casenum = 3;
27951 }
27952 break;
27953
27954 case 635:
27955 case 634:
27956 case 633:
27957 case 632:
27958 case 631:
27959 case 630:
27960 case 629:
27961 case 628:
27962 case 627:
27963 case 626:
27964 case 625:
27965 case 624:
27966 case 623:
27967 case 622:
27968 case 621:
27969 case 620:
27970 case 619:
27971 case 618:
27972 case 617:
27973 case 616:
27974 case 615:
27975 case 614:
27976 case 613:
27977 case 612:
27978 case 611:
27979 case 610:
27980 case 609:
27981 case 608:
27982 case 607:
27983 case 606:
27984 casenum = 1;
27985 break;
27986
27987 case 420:
27988 extract_constrain_insn_cached (insn);
27989 if ((get_attr_type (insn) == TYPE_ALU) || ((which_alternative == 2) || (get_attr_type (insn) == TYPE_ISHIFT)))
27990 {
27991 casenum = 0;
27992 }
27993 else
27994 {
27995 casenum = 3;
27996 }
27997 break;
27998
27999 case 416:
28000 extract_constrain_insn_cached (insn);
28001 if ((((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode))) || ((! ((TARGET_DOUBLE_WITH_ADD) != (0))) || (! (const1_operand (operands[2], VOIDmode)))))
28002 {
28003 casenum = 0;
28004 }
28005 else
28006 {
28007 casenum = 3;
28008 }
28009 break;
28010
28011 case 414:
28012 extract_constrain_insn_cached (insn);
28013 if (((which_alternative == 0) && (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode)))) || ((which_alternative != 0) || ((! ((TARGET_DOUBLE_WITH_ADD) != (0))) || (! (const1_operand (operands[2], VOIDmode))))))
28014 {
28015 casenum = 0;
28016 }
28017 else
28018 {
28019 casenum = 3;
28020 }
28021 break;
28022
28023 case 422:
28024 case 421:
28025 case 419:
28026 case 418:
28027 case 415:
28028 case 409:
28029 if ((get_attr_type (insn) == TYPE_ALU) || (get_attr_type (insn) == TYPE_ISHIFT))
28030 {
28031 casenum = 0;
28032 }
28033 else
28034 {
28035 casenum = 3;
28036 }
28037 break;
28038
28039 case 417:
28040 case 413:
28041 case 408:
28042 extract_constrain_insn_cached (insn);
28043 if ((get_attr_type (insn) == TYPE_ALU) || ((which_alternative != 0) || (get_attr_type (insn) == TYPE_ISHIFT)))
28044 {
28045 casenum = 0;
28046 }
28047 else
28048 {
28049 casenum = 3;
28050 }
28051 break;
28052
28053 case 261:
28054 case 260:
28055 case 259:
28056 case 258:
28057 case 257:
28058 case 256:
28059 case 255:
28060 case 254:
28061 case 253:
28062 case 252:
28063 case 251:
28064 case 250:
28065 case 249:
28066 case 248:
28067 case 247:
28068 case 246:
28069 case 245:
28070 casenum = 2;
28071 break;
28072
28073 case 215:
28074 extract_constrain_insn_cached (insn);
28075 if (((which_alternative != 3) && (! (incdec_operand (operands[2], QImode)))) || ((which_alternative == 3) || (incdec_operand (operands[2], QImode))))
28076 {
28077 casenum = 0;
28078 }
28079 else
28080 {
28081 casenum = 3;
28082 }
28083 break;
28084
28085 case 209:
28086 extract_constrain_insn_cached (insn);
28087 if (((which_alternative != 2) && (! (incdec_operand (operands[2], HImode)))) || ((which_alternative == 2) || (incdec_operand (operands[2], HImode))))
28088 {
28089 casenum = 0;
28090 }
28091 else
28092 {
28093 casenum = 3;
28094 }
28095 break;
28096
28097 case 202:
28098 extract_constrain_insn_cached (insn);
28099 if ((get_attr_type (insn) == TYPE_ALU) || (((which_alternative != 0) || (pic_symbolic_operand (operands[2], SImode))) || (get_attr_type (insn) == TYPE_INCDEC)))
28100 {
28101 casenum = 0;
28102 }
28103 else
28104 {
28105 casenum = 3;
28106 }
28107 break;
28108
28109 case 201:
28110 extract_constrain_insn_cached (insn);
28111 if ((get_attr_type (insn) == TYPE_ALU) || (((which_alternative == 2) || (pic_symbolic_operand (operands[2], SImode))) || (get_attr_type (insn) == TYPE_INCDEC)))
28112 {
28113 casenum = 0;
28114 }
28115 else
28116 {
28117 casenum = 3;
28118 }
28119 break;
28120
28121 case 196:
28122 extract_constrain_insn_cached (insn);
28123 if ((get_attr_type (insn) == TYPE_ALU) || (((which_alternative == 2) || (pic_symbolic_operand (operands[2], DImode))) || (get_attr_type (insn) == TYPE_INCDEC)))
28124 {
28125 casenum = 0;
28126 }
28127 else
28128 {
28129 casenum = 3;
28130 }
28131 break;
28132
28133 case 89:
28134 extract_constrain_insn_cached (insn);
28135 if (((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 3) || (which_alternative == 4)))
28136 {
28137 casenum = 0;
28138 }
28139 else
28140 {
28141 casenum = 3;
28142 }
28143 break;
28144
28145 case 88:
28146 case 87:
28147 extract_constrain_insn_cached (insn);
28148 if (which_alternative == 1)
28149 {
28150 casenum = 0;
28151 }
28152 else
28153 {
28154 casenum = 3;
28155 }
28156 break;
28157
28158 case 83:
28159 extract_constrain_insn_cached (insn);
28160 if (((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative != 7) && ((which_alternative != 8) && ((which_alternative != 9) && ((which_alternative != 4) && (((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], DImode)))) || (((flag_pic) != (0)) && (symbolic_operand (operands[1], DImode)))))))))
28161 {
28162 casenum = 0;
28163 }
28164 else
28165 {
28166 casenum = 3;
28167 }
28168 break;
28169
28170 case 76:
28171 extract_constrain_insn_cached (insn);
28172 if (which_alternative == 0)
28173 {
28174 casenum = 0;
28175 }
28176 else
28177 {
28178 casenum = 3;
28179 }
28180 break;
28181
28182 case 71:
28183 extract_constrain_insn_cached (insn);
28184 if (((q_regs_operand (operands[0], QImode)) && (! ((TARGET_MOVX) != (0)))) || ((! (q_regs_operand (operands[0], QImode))) || ((TARGET_MOVX) != (0))))
28185 {
28186 casenum = 0;
28187 }
28188 else
28189 {
28190 casenum = 3;
28191 }
28192 break;
28193
28194 case 70:
28195 case 66:
28196 case 65:
28197 if ((get_attr_type (insn) == TYPE_IMOV) || (get_attr_type (insn) == TYPE_IMOVX))
28198 {
28199 casenum = 0;
28200 }
28201 else
28202 {
28203 casenum = 3;
28204 }
28205 break;
28206
28207 case 59:
28208 extract_constrain_insn_cached (insn);
28209 if ((((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2)))))) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2))))))
28210 {
28211 casenum = 0;
28212 }
28213 else
28214 {
28215 casenum = 3;
28216 }
28217 break;
28218
28219 case 50:
28220 extract_constrain_insn_cached (insn);
28221 if ((get_attr_type (insn) == TYPE_IMOV) || ((((which_alternative != 0) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_HIMODE_MATH) == (0))))) && (((which_alternative != 1) && (which_alternative != 2)) || (! (aligned_operand (operands[1], HImode))))) && (((TARGET_MOVX) != (0)) && ((which_alternative == 0) || (which_alternative == 2)))))
28222 {
28223 casenum = 0;
28224 }
28225 else
28226 {
28227 casenum = 3;
28228 }
28229 break;
28230
28231 case 44:
28232 extract_constrain_insn_cached (insn);
28233 if (((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], SImode)))) || (((flag_pic) != (0)) && (symbolic_operand (operands[1], SImode))))))))
28234 {
28235 casenum = 0;
28236 }
28237 else
28238 {
28239 casenum = 3;
28240 }
28241 break;
28242
28243 case 679:
28244 case 678:
28245 case 677:
28246 case 676:
28247 case 675:
28248 case 674:
28249 case 659:
28250 case 658:
28251 case 640:
28252 case 639:
28253 case 638:
28254 case 637:
28255 case 636:
28256 case 605:
28257 case 547:
28258 case 546:
28259 case 545:
28260 case 544:
28261 case 529:
28262 case 525:
28263 case 524:
28264 case 523:
28265 case 522:
28266 case 521:
28267 case 520:
28268 case 519:
28269 case 518:
28270 case 517:
28271 case 516:
28272 case 515:
28273 case 504:
28274 case 503:
28275 case 500:
28276 case 499:
28277 case 498:
28278 case 497:
28279 case 496:
28280 case 495:
28281 case 494:
28282 case 493:
28283 case 492:
28284 case 491:
28285 case 490:
28286 case 489:
28287 case 488:
28288 case 487:
28289 case 486:
28290 case 485:
28291 case 484:
28292 case 483:
28293 case 482:
28294 case 481:
28295 case 480:
28296 case 479:
28297 case 478:
28298 case 477:
28299 case 476:
28300 case 475:
28301 case 474:
28302 case 473:
28303 case 472:
28304 case 471:
28305 case 470:
28306 case 469:
28307 case 468:
28308 case 467:
28309 case 466:
28310 case 465:
28311 case 464:
28312 case 463:
28313 case 462:
28314 case 461:
28315 case 460:
28316 case 459:
28317 case 458:
28318 case 457:
28319 case 454:
28320 case 453:
28321 case 452:
28322 case 451:
28323 case 450:
28324 case 449:
28325 case 448:
28326 case 447:
28327 case 446:
28328 case 445:
28329 case 444:
28330 case 443:
28331 case 442:
28332 case 441:
28333 case 440:
28334 case 439:
28335 case 438:
28336 case 437:
28337 case 436:
28338 case 435:
28339 case 434:
28340 case 433:
28341 case 432:
28342 case 431:
28343 case 430:
28344 case 427:
28345 case 426:
28346 case 425:
28347 case 424:
28348 case 423:
28349 case 412:
28350 case 407:
28351 case 406:
28352 case 405:
28353 case 404:
28354 case 403:
28355 case 402:
28356 case 401:
28357 case 400:
28358 case 399:
28359 case 398:
28360 case 359:
28361 case 358:
28362 case 357:
28363 case 356:
28364 case 355:
28365 case 354:
28366 case 353:
28367 case 352:
28368 case 351:
28369 case 350:
28370 case 348:
28371 case 347:
28372 case 346:
28373 case 345:
28374 case 344:
28375 case 343:
28376 case 342:
28377 case 341:
28378 case 340:
28379 case 339:
28380 case 338:
28381 case 337:
28382 case 336:
28383 case 335:
28384 case 334:
28385 case 333:
28386 case 332:
28387 case 331:
28388 case 330:
28389 case 329:
28390 case 328:
28391 case 327:
28392 case 326:
28393 case 325:
28394 case 324:
28395 case 323:
28396 case 322:
28397 case 321:
28398 case 320:
28399 case 319:
28400 case 318:
28401 case 317:
28402 case 316:
28403 case 315:
28404 case 314:
28405 case 313:
28406 case 312:
28407 case 311:
28408 case 310:
28409 case 309:
28410 case 308:
28411 case 307:
28412 case 306:
28413 case 305:
28414 case 304:
28415 case 303:
28416 case 302:
28417 case 301:
28418 case 300:
28419 case 299:
28420 case 298:
28421 case 297:
28422 case 296:
28423 case 295:
28424 case 294:
28425 case 293:
28426 case 292:
28427 case 291:
28428 case 290:
28429 case 289:
28430 case 288:
28431 case 287:
28432 case 286:
28433 case 283:
28434 case 282:
28435 case 281:
28436 case 280:
28437 case 279:
28438 case 278:
28439 case 277:
28440 case 276:
28441 case 244:
28442 case 243:
28443 case 242:
28444 case 241:
28445 case 240:
28446 case 239:
28447 case 238:
28448 case 237:
28449 case 236:
28450 case 235:
28451 case 234:
28452 case 233:
28453 case 232:
28454 case 231:
28455 case 230:
28456 case 229:
28457 case 228:
28458 case 227:
28459 case 226:
28460 case 224:
28461 case 223:
28462 case 222:
28463 case 221:
28464 case 220:
28465 case 219:
28466 case 218:
28467 case 217:
28468 case 216:
28469 case 214:
28470 case 213:
28471 case 212:
28472 case 211:
28473 case 210:
28474 case 208:
28475 case 207:
28476 case 206:
28477 case 205:
28478 case 204:
28479 case 203:
28480 case 200:
28481 case 199:
28482 case 198:
28483 case 197:
28484 case 195:
28485 case 194:
28486 case 193:
28487 case 192:
28488 case 191:
28489 case 190:
28490 case 189:
28491 case 188:
28492 case 187:
28493 case 186:
28494 case 185:
28495 case 184:
28496 case 183:
28497 case 182:
28498 case 181:
28499 case 180:
28500 case 126:
28501 case 125:
28502 case 124:
28503 case 123:
28504 case 122:
28505 case 121:
28506 case 120:
28507 case 119:
28508 case 117:
28509 case 116:
28510 case 115:
28511 case 113:
28512 case 112:
28513 case 111:
28514 case 110:
28515 case 109:
28516 case 108:
28517 case 107:
28518 case 106:
28519 case 86:
28520 case 85:
28521 case 84:
28522 case 81:
28523 case 80:
28524 case 79:
28525 case 78:
28526 case 77:
28527 case 74:
28528 case 73:
28529 case 72:
28530 case 69:
28531 case 68:
28532 case 67:
28533 case 64:
28534 case 63:
28535 case 62:
28536 case 61:
28537 case 60:
28538 case 58:
28539 case 57:
28540 case 56:
28541 case 55:
28542 case 54:
28543 case 53:
28544 case 52:
28545 case 51:
28546 case 49:
28547 case 48:
28548 case 47:
28549 case 46:
28550 case 45:
28551 case 43:
28552 case 42:
28553 case 41:
28554 case 40:
28555 case 39:
28556 case 38:
28557 case 37:
28558 case 17:
28559 case 16:
28560 case 15:
28561 case 14:
28562 case 13:
28563 case 12:
28564 case 11:
28565 case 10:
28566 case 9:
28567 case 8:
28568 case 7:
28569 case 6:
28570 case 5:
28571 case 4:
28572 case 3:
28573 case 2:
28574 case 1:
28575 case 0:
28576 casenum = 0;
28577 break;
28578
28579 case -1:
28580 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
28581 && asm_noperands (PATTERN (insn)) < 0)
28582 fatal_insn_not_found (insn);
28583 default:
28584 casenum = 3;
28585 break;
28586
28587 }
28588
28589 insn = candidate_insn;
28590 switch (casenum)
28591 {
28592 case 0:
28593 return 1;
28594
28595 case 1:
28596 return 15 ;
28597
28598 case 2:
28599 return 1;
28600
28601 case 3:
28602 return 1;
28603
28604 default:
28605 abort ();
28606 }
28607 }
28608
28609 static int athlon_vectordec_unit_blockage PARAMS ((rtx, rtx));
28610 static int
28611 athlon_vectordec_unit_blockage (executing_insn, candidate_insn)
28612 rtx executing_insn;
28613 rtx candidate_insn;
28614 {
28615 rtx insn;
28616 int casenum;
28617
28618 insn = executing_insn;
28619 switch (recog_memoized (insn))
28620 {
28621 case 926:
28622 extract_constrain_insn_cached (insn);
28623 if (which_alternative == 0)
28624 {
28625 casenum = 0;
28626 }
28627 else
28628 {
28629 casenum = 1;
28630 }
28631 break;
28632
28633 case 178:
28634 case 177:
28635 case 176:
28636 case 175:
28637 case 174:
28638 case 173:
28639 extract_constrain_insn_cached (insn);
28640 if ((which_alternative != 0) || ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_STORE)))
28641 {
28642 casenum = 0;
28643 }
28644 else
28645 {
28646 casenum = 1;
28647 }
28648 break;
28649
28650 case 171:
28651 case 168:
28652 case 165:
28653 case 162:
28654 extract_constrain_insn_cached (insn);
28655 if (which_alternative == 1)
28656 {
28657 casenum = 0;
28658 }
28659 else
28660 {
28661 casenum = 1;
28662 }
28663 break;
28664
28665 case 134:
28666 extract_constrain_insn_cached (insn);
28667 if ((which_alternative == 1) || ((which_alternative == 2) || (which_alternative == 3)))
28668 {
28669 casenum = 0;
28670 }
28671 else
28672 {
28673 casenum = 1;
28674 }
28675 break;
28676
28677 case 170:
28678 case 167:
28679 case 164:
28680 case 161:
28681 case 144:
28682 case 142:
28683 case 140:
28684 case 138:
28685 case 133:
28686 extract_constrain_insn_cached (insn);
28687 if (which_alternative != 0)
28688 {
28689 casenum = 0;
28690 }
28691 else
28692 {
28693 casenum = 1;
28694 }
28695 break;
28696
28697 case 132:
28698 case 131:
28699 case 130:
28700 case 129:
28701 extract_constrain_insn_cached (insn);
28702 if ((which_alternative == 1) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_STORE)))
28703 {
28704 casenum = 0;
28705 }
28706 else
28707 {
28708 casenum = 1;
28709 }
28710 break;
28711
28712 case 127:
28713 extract_constrain_insn_cached (insn);
28714 if (((which_alternative == 0) || (which_alternative == 1)) && (((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_STORE)) && (which_alternative == 1)))
28715 {
28716 casenum = 0;
28717 }
28718 else
28719 {
28720 casenum = 1;
28721 }
28722 break;
28723
28724 case 103:
28725 case 102:
28726 case 101:
28727 case 100:
28728 extract_constrain_insn_cached (insn);
28729 if ((which_alternative == 3) || ((which_alternative == 4) || (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) && ((get_attr_memory (insn) == MEMORY_LOAD) || (get_attr_memory (insn) == MEMORY_STORE)))))
28730 {
28731 casenum = 0;
28732 }
28733 else
28734 {
28735 casenum = 1;
28736 }
28737 break;
28738
28739 case 94:
28740 case 93:
28741 extract_constrain_insn_cached (insn);
28742 if (((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 3) || (which_alternative == 4)))
28743 {
28744 casenum = 0;
28745 }
28746 else
28747 {
28748 casenum = 1;
28749 }
28750 break;
28751
28752 case 88:
28753 case 87:
28754 extract_constrain_insn_cached (insn);
28755 if ((which_alternative != 1) || (memory_operand (operands[1], VOIDmode)))
28756 {
28757 casenum = 0;
28758 }
28759 else
28760 {
28761 casenum = 1;
28762 }
28763 break;
28764
28765 case 83:
28766 extract_constrain_insn_cached (insn);
28767 if (which_alternative == 4)
28768 {
28769 casenum = 0;
28770 }
28771 else
28772 {
28773 casenum = 1;
28774 }
28775 break;
28776
28777 case 714:
28778 case 643:
28779 case 641:
28780 case 82:
28781 extract_constrain_insn_cached (insn);
28782 if ((which_alternative == 0) || (which_alternative == 1))
28783 {
28784 casenum = 0;
28785 }
28786 else
28787 {
28788 casenum = 1;
28789 }
28790 break;
28791
28792 case 76:
28793 extract_constrain_insn_cached (insn);
28794 if ((which_alternative != 0) || (memory_operand (operands[1], VOIDmode)))
28795 {
28796 casenum = 0;
28797 }
28798 else
28799 {
28800 casenum = 1;
28801 }
28802 break;
28803
28804 case 77:
28805 case 58:
28806 case 57:
28807 case 49:
28808 case 48:
28809 case 39:
28810 case 38:
28811 case 37:
28812 extract_insn_cached (insn);
28813 if (memory_operand (operands[1], VOIDmode))
28814 {
28815 casenum = 0;
28816 }
28817 else
28818 {
28819 casenum = 1;
28820 }
28821 break;
28822
28823 case -1:
28824 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
28825 && asm_noperands (PATTERN (insn)) < 0)
28826 fatal_insn_not_found (insn);
28827 case 1024:
28828 case 1023:
28829 case 924:
28830 case 854:
28831 case 791:
28832 case 789:
28833 case 787:
28834 case 708:
28835 case 707:
28836 case 706:
28837 case 705:
28838 case 704:
28839 case 703:
28840 case 702:
28841 case 701:
28842 case 700:
28843 case 699:
28844 case 698:
28845 case 697:
28846 case 696:
28847 case 695:
28848 case 694:
28849 case 693:
28850 case 692:
28851 case 681:
28852 case 680:
28853 case 673:
28854 case 672:
28855 case 671:
28856 case 670:
28857 case 669:
28858 case 668:
28859 case 667:
28860 case 666:
28861 case 665:
28862 case 664:
28863 case 663:
28864 case 662:
28865 case 661:
28866 case 660:
28867 case 656:
28868 case 655:
28869 case 653:
28870 case 652:
28871 case 650:
28872 case 649:
28873 case 647:
28874 case 646:
28875 case 645:
28876 case 644:
28877 case 642:
28878 case 635:
28879 case 634:
28880 case 633:
28881 case 632:
28882 case 631:
28883 case 630:
28884 case 629:
28885 case 628:
28886 case 627:
28887 case 626:
28888 case 625:
28889 case 624:
28890 case 623:
28891 case 622:
28892 case 621:
28893 case 620:
28894 case 619:
28895 case 618:
28896 case 617:
28897 case 616:
28898 case 615:
28899 case 614:
28900 case 613:
28901 case 612:
28902 case 611:
28903 case 610:
28904 case 609:
28905 case 608:
28906 case 607:
28907 case 606:
28908 case 605:
28909 case 604:
28910 case 603:
28911 case 602:
28912 case 601:
28913 case 600:
28914 case 599:
28915 case 598:
28916 case 597:
28917 case 596:
28918 case 595:
28919 case 543:
28920 case 542:
28921 case 541:
28922 case 540:
28923 case 539:
28924 case 538:
28925 case 537:
28926 case 536:
28927 case 535:
28928 case 534:
28929 case 533:
28930 case 532:
28931 case 531:
28932 case 530:
28933 case 528:
28934 case 527:
28935 case 526:
28936 case 525:
28937 case 524:
28938 case 523:
28939 case 522:
28940 case 521:
28941 case 514:
28942 case 513:
28943 case 512:
28944 case 511:
28945 case 510:
28946 case 509:
28947 case 508:
28948 case 507:
28949 case 506:
28950 case 505:
28951 case 456:
28952 case 455:
28953 case 429:
28954 case 428:
28955 case 412:
28956 case 411:
28957 case 410:
28958 case 388:
28959 case 387:
28960 case 386:
28961 case 385:
28962 case 384:
28963 case 383:
28964 case 382:
28965 case 381:
28966 case 380:
28967 case 379:
28968 case 369:
28969 case 368:
28970 case 367:
28971 case 366:
28972 case 365:
28973 case 364:
28974 case 363:
28975 case 362:
28976 case 361:
28977 case 360:
28978 case 349:
28979 case 285:
28980 case 284:
28981 case 275:
28982 case 274:
28983 case 273:
28984 case 272:
28985 case 271:
28986 case 270:
28987 case 269:
28988 case 268:
28989 case 267:
28990 case 266:
28991 case 265:
28992 case 264:
28993 case 263:
28994 case 262:
28995 case 261:
28996 case 260:
28997 case 259:
28998 case 258:
28999 case 257:
29000 case 256:
29001 case 255:
29002 case 254:
29003 case 253:
29004 case 252:
29005 case 251:
29006 case 250:
29007 case 249:
29008 case 248:
29009 case 247:
29010 case 246:
29011 case 245:
29012 case 225:
29013 case 179:
29014 case 160:
29015 case 159:
29016 case 118:
29017 case 114:
29018 case 99:
29019 case 98:
29020 case 97:
29021 case 96:
29022 case 92:
29023 case 91:
29024 case 86:
29025 case 79:
29026 case 78:
29027 case 75:
29028 case 47:
29029 case 41:
29030 case 40:
29031 case 36:
29032 case 35:
29033 case 34:
29034 case 33:
29035 case 32:
29036 case 31:
29037 case 30:
29038 case 29:
29039 case 28:
29040 case 26:
29041 case 25:
29042 case 22:
29043 case 18:
29044 casenum = 0;
29045 break;
29046
29047 default:
29048 casenum = 1;
29049 break;
29050
29051 }
29052
29053 insn = candidate_insn;
29054 switch (casenum)
29055 {
29056 case 0:
29057 return 1;
29058
29059 case 1:
29060 switch (recog_memoized (insn))
29061 {
29062 case 926:
29063 extract_constrain_insn_cached (insn);
29064 if (which_alternative == 1)
29065 {
29066 return 0;
29067 }
29068 else
29069 {
29070 return 1;
29071 }
29072
29073 case 178:
29074 case 177:
29075 case 176:
29076 case 175:
29077 case 174:
29078 case 173:
29079 extract_constrain_insn_cached (insn);
29080 if ((which_alternative == 0) && ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (! (get_attr_memory (insn) == MEMORY_STORE))))
29081 {
29082 return 0;
29083 }
29084 else
29085 {
29086 return 1;
29087 }
29088
29089 case 171:
29090 case 168:
29091 case 165:
29092 case 162:
29093 extract_constrain_insn_cached (insn);
29094 if (which_alternative != 1)
29095 {
29096 return 0;
29097 }
29098 else
29099 {
29100 return 1;
29101 }
29102
29103 case 134:
29104 extract_constrain_insn_cached (insn);
29105 if ((which_alternative != 1) && ((which_alternative != 2) && (which_alternative != 3)))
29106 {
29107 return 0;
29108 }
29109 else
29110 {
29111 return 1;
29112 }
29113
29114 case 170:
29115 case 167:
29116 case 164:
29117 case 161:
29118 case 144:
29119 case 142:
29120 case 140:
29121 case 138:
29122 case 133:
29123 extract_constrain_insn_cached (insn);
29124 if (which_alternative == 0)
29125 {
29126 return 0;
29127 }
29128 else
29129 {
29130 return 1;
29131 }
29132
29133 case 132:
29134 case 131:
29135 case 130:
29136 case 129:
29137 extract_constrain_insn_cached (insn);
29138 if ((which_alternative != 1) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (! (get_attr_memory (insn) == MEMORY_STORE))))
29139 {
29140 return 0;
29141 }
29142 else
29143 {
29144 return 1;
29145 }
29146
29147 case 127:
29148 extract_constrain_insn_cached (insn);
29149 if (((which_alternative != 0) && (which_alternative != 1)) || (((! (get_attr_memory (insn) == MEMORY_LOAD)) && (! (get_attr_memory (insn) == MEMORY_STORE))) || (which_alternative != 1)))
29150 {
29151 return 0;
29152 }
29153 else
29154 {
29155 return 1;
29156 }
29157
29158 case 103:
29159 case 102:
29160 case 101:
29161 case 100:
29162 extract_constrain_insn_cached (insn);
29163 if ((which_alternative != 3) && ((which_alternative != 4) && (((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) || ((! (get_attr_memory (insn) == MEMORY_LOAD)) && (! (get_attr_memory (insn) == MEMORY_STORE))))))
29164 {
29165 return 0;
29166 }
29167 else
29168 {
29169 return 1;
29170 }
29171
29172 case 94:
29173 case 93:
29174 extract_constrain_insn_cached (insn);
29175 if (((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2))) || ((which_alternative != 3) && (which_alternative != 4)))
29176 {
29177 return 0;
29178 }
29179 else
29180 {
29181 return 1;
29182 }
29183
29184 case 88:
29185 case 87:
29186 extract_constrain_insn_cached (insn);
29187 if ((which_alternative == 1) && (! (memory_operand (operands[1], VOIDmode))))
29188 {
29189 return 0;
29190 }
29191 else
29192 {
29193 return 1;
29194 }
29195
29196 case 83:
29197 extract_constrain_insn_cached (insn);
29198 if (which_alternative != 4)
29199 {
29200 return 0;
29201 }
29202 else
29203 {
29204 return 1;
29205 }
29206
29207 case 714:
29208 case 643:
29209 case 641:
29210 case 82:
29211 extract_constrain_insn_cached (insn);
29212 if ((which_alternative != 0) && (which_alternative != 1))
29213 {
29214 return 0;
29215 }
29216 else
29217 {
29218 return 1;
29219 }
29220
29221 case 76:
29222 extract_constrain_insn_cached (insn);
29223 if ((which_alternative == 0) && (! (memory_operand (operands[1], VOIDmode))))
29224 {
29225 return 0;
29226 }
29227 else
29228 {
29229 return 1;
29230 }
29231
29232 case 77:
29233 case 58:
29234 case 57:
29235 case 49:
29236 case 48:
29237 case 39:
29238 case 38:
29239 case 37:
29240 extract_insn_cached (insn);
29241 if (! (memory_operand (operands[1], VOIDmode)))
29242 {
29243 return 0;
29244 }
29245 else
29246 {
29247 return 1;
29248 }
29249
29250 case -1:
29251 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
29252 && asm_noperands (PATTERN (insn)) < 0)
29253 fatal_insn_not_found (insn);
29254 case 1024:
29255 case 1023:
29256 case 924:
29257 case 854:
29258 case 791:
29259 case 789:
29260 case 787:
29261 case 708:
29262 case 707:
29263 case 706:
29264 case 705:
29265 case 704:
29266 case 703:
29267 case 702:
29268 case 701:
29269 case 700:
29270 case 699:
29271 case 698:
29272 case 697:
29273 case 696:
29274 case 695:
29275 case 694:
29276 case 693:
29277 case 692:
29278 case 681:
29279 case 680:
29280 case 673:
29281 case 672:
29282 case 671:
29283 case 670:
29284 case 669:
29285 case 668:
29286 case 667:
29287 case 666:
29288 case 665:
29289 case 664:
29290 case 663:
29291 case 662:
29292 case 661:
29293 case 660:
29294 case 656:
29295 case 655:
29296 case 653:
29297 case 652:
29298 case 650:
29299 case 649:
29300 case 647:
29301 case 646:
29302 case 645:
29303 case 644:
29304 case 642:
29305 case 635:
29306 case 634:
29307 case 633:
29308 case 632:
29309 case 631:
29310 case 630:
29311 case 629:
29312 case 628:
29313 case 627:
29314 case 626:
29315 case 625:
29316 case 624:
29317 case 623:
29318 case 622:
29319 case 621:
29320 case 620:
29321 case 619:
29322 case 618:
29323 case 617:
29324 case 616:
29325 case 615:
29326 case 614:
29327 case 613:
29328 case 612:
29329 case 611:
29330 case 610:
29331 case 609:
29332 case 608:
29333 case 607:
29334 case 606:
29335 case 605:
29336 case 604:
29337 case 603:
29338 case 602:
29339 case 601:
29340 case 600:
29341 case 599:
29342 case 598:
29343 case 597:
29344 case 596:
29345 case 595:
29346 case 543:
29347 case 542:
29348 case 541:
29349 case 540:
29350 case 539:
29351 case 538:
29352 case 537:
29353 case 536:
29354 case 535:
29355 case 534:
29356 case 533:
29357 case 532:
29358 case 531:
29359 case 530:
29360 case 528:
29361 case 527:
29362 case 526:
29363 case 525:
29364 case 524:
29365 case 523:
29366 case 522:
29367 case 521:
29368 case 514:
29369 case 513:
29370 case 512:
29371 case 511:
29372 case 510:
29373 case 509:
29374 case 508:
29375 case 507:
29376 case 506:
29377 case 505:
29378 case 456:
29379 case 455:
29380 case 429:
29381 case 428:
29382 case 412:
29383 case 411:
29384 case 410:
29385 case 388:
29386 case 387:
29387 case 386:
29388 case 385:
29389 case 384:
29390 case 383:
29391 case 382:
29392 case 381:
29393 case 380:
29394 case 379:
29395 case 369:
29396 case 368:
29397 case 367:
29398 case 366:
29399 case 365:
29400 case 364:
29401 case 363:
29402 case 362:
29403 case 361:
29404 case 360:
29405 case 349:
29406 case 285:
29407 case 284:
29408 case 275:
29409 case 274:
29410 case 273:
29411 case 272:
29412 case 271:
29413 case 270:
29414 case 269:
29415 case 268:
29416 case 267:
29417 case 266:
29418 case 265:
29419 case 264:
29420 case 263:
29421 case 262:
29422 case 261:
29423 case 260:
29424 case 259:
29425 case 258:
29426 case 257:
29427 case 256:
29428 case 255:
29429 case 254:
29430 case 253:
29431 case 252:
29432 case 251:
29433 case 250:
29434 case 249:
29435 case 248:
29436 case 247:
29437 case 246:
29438 case 245:
29439 case 225:
29440 case 179:
29441 case 160:
29442 case 159:
29443 case 118:
29444 case 114:
29445 case 99:
29446 case 98:
29447 case 97:
29448 case 96:
29449 case 92:
29450 case 91:
29451 case 86:
29452 case 79:
29453 case 78:
29454 case 75:
29455 case 47:
29456 case 41:
29457 case 40:
29458 case 36:
29459 case 35:
29460 case 34:
29461 case 33:
29462 case 32:
29463 case 31:
29464 case 30:
29465 case 29:
29466 case 28:
29467 case 26:
29468 case 25:
29469 case 22:
29470 case 18:
29471 return 1;
29472
29473 default:
29474 return 0;
29475
29476 }
29477
29478 default:
29479 abort ();
29480 }
29481 }
29482
29483 static int k6_fpu_unit_blockage PARAMS ((rtx, rtx));
29484 static int
29485 k6_fpu_unit_blockage (executing_insn, candidate_insn)
29486 rtx executing_insn;
29487 rtx candidate_insn;
29488 {
29489 rtx insn;
29490 int casenum;
29491
29492 insn = executing_insn;
29493 switch (recog_memoized (insn))
29494 {
29495 case 581:
29496 case 579:
29497 case 577:
29498 case 575:
29499 case 573:
29500 case 571:
29501 case 569:
29502 extract_insn_cached (insn);
29503 if (get_attr_type (insn) == TYPE_FOP)
29504 {
29505 casenum = 0;
29506 }
29507 else if (mult_operator (operands[3], TFmode))
29508 {
29509 casenum = 1;
29510 }
29511 else
29512 {
29513 casenum = 2;
29514 }
29515 break;
29516
29517 case 580:
29518 case 578:
29519 case 576:
29520 case 574:
29521 case 572:
29522 case 570:
29523 case 568:
29524 extract_insn_cached (insn);
29525 if (get_attr_type (insn) == TYPE_FOP)
29526 {
29527 casenum = 0;
29528 }
29529 else if (mult_operator (operands[3], XFmode))
29530 {
29531 casenum = 1;
29532 }
29533 else
29534 {
29535 casenum = 2;
29536 }
29537 break;
29538
29539 case 562:
29540 extract_constrain_insn_cached (insn);
29541 if (get_attr_type (insn) == TYPE_FOP)
29542 {
29543 casenum = 0;
29544 }
29545 else if ((which_alternative != 2) && (mult_operator (operands[3], DFmode)))
29546 {
29547 casenum = 1;
29548 }
29549 else
29550 {
29551 casenum = 2;
29552 }
29553 break;
29554
29555 case 567:
29556 case 566:
29557 case 565:
29558 case 564:
29559 case 561:
29560 extract_insn_cached (insn);
29561 if (get_attr_type (insn) == TYPE_FOP)
29562 {
29563 casenum = 0;
29564 }
29565 else if (mult_operator (operands[3], DFmode))
29566 {
29567 casenum = 1;
29568 }
29569 else
29570 {
29571 casenum = 2;
29572 }
29573 break;
29574
29575 case 557:
29576 extract_constrain_insn_cached (insn);
29577 if (get_attr_type (insn) == TYPE_FOP)
29578 {
29579 casenum = 0;
29580 }
29581 else if ((which_alternative != 2) && (mult_operator (operands[3], SFmode)))
29582 {
29583 casenum = 1;
29584 }
29585 else
29586 {
29587 casenum = 2;
29588 }
29589 break;
29590
29591 case 560:
29592 case 559:
29593 case 556:
29594 extract_insn_cached (insn);
29595 if (get_attr_type (insn) == TYPE_FOP)
29596 {
29597 casenum = 0;
29598 }
29599 else if (mult_operator (operands[3], SFmode))
29600 {
29601 casenum = 1;
29602 }
29603 else
29604 {
29605 casenum = 2;
29606 }
29607 break;
29608
29609 case 555:
29610 extract_insn_cached (insn);
29611 if (! (mult_operator (operands[3], TFmode)))
29612 {
29613 casenum = 0;
29614 }
29615 else
29616 {
29617 casenum = 1;
29618 }
29619 break;
29620
29621 case 554:
29622 extract_insn_cached (insn);
29623 if (! (mult_operator (operands[3], XFmode)))
29624 {
29625 casenum = 0;
29626 }
29627 else
29628 {
29629 casenum = 1;
29630 }
29631 break;
29632
29633 case 552:
29634 case 549:
29635 extract_constrain_insn_cached (insn);
29636 if ((which_alternative == 0) && (! (mult_operator (operands[3], SFmode))))
29637 {
29638 casenum = 0;
29639 }
29640 else if ((which_alternative == 0) && (mult_operator (operands[3], SFmode)))
29641 {
29642 casenum = 1;
29643 }
29644 else
29645 {
29646 casenum = 2;
29647 }
29648 break;
29649
29650 case 551:
29651 case 548:
29652 extract_insn_cached (insn);
29653 if (! (mult_operator (operands[3], SFmode)))
29654 {
29655 casenum = 0;
29656 }
29657 else
29658 {
29659 casenum = 1;
29660 }
29661 break;
29662
29663 case 135:
29664 extract_constrain_insn_cached (insn);
29665 if (which_alternative == 1)
29666 {
29667 casenum = 0;
29668 }
29669 else
29670 {
29671 casenum = 2;
29672 }
29673 break;
29674
29675 case 127:
29676 extract_constrain_insn_cached (insn);
29677 if ((which_alternative == 0) || (which_alternative == 1))
29678 {
29679 casenum = 0;
29680 }
29681 else
29682 {
29683 casenum = 2;
29684 }
29685 break;
29686
29687 case 103:
29688 case 102:
29689 case 101:
29690 case 100:
29691 case 94:
29692 case 93:
29693 case 89:
29694 extract_constrain_insn_cached (insn);
29695 if ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))
29696 {
29697 casenum = 0;
29698 }
29699 else
29700 {
29701 casenum = 2;
29702 }
29703 break;
29704
29705 case 178:
29706 case 177:
29707 case 176:
29708 case 175:
29709 case 174:
29710 case 173:
29711 case 171:
29712 case 170:
29713 case 168:
29714 case 167:
29715 case 165:
29716 case 164:
29717 case 162:
29718 case 161:
29719 case 144:
29720 case 142:
29721 case 140:
29722 case 138:
29723 case 134:
29724 case 133:
29725 case 35:
29726 case 32:
29727 extract_constrain_insn_cached (insn);
29728 if (which_alternative == 0)
29729 {
29730 casenum = 0;
29731 }
29732 else
29733 {
29734 casenum = 2;
29735 }
29736 break;
29737
29738 case 158:
29739 case 157:
29740 case 156:
29741 case 153:
29742 case 152:
29743 case 151:
29744 case 148:
29745 case 147:
29746 case 146:
29747 case 145:
29748 case 143:
29749 case 141:
29750 case 139:
29751 case 136:
29752 case 132:
29753 case 131:
29754 case 130:
29755 case 129:
29756 case 34:
29757 case 31:
29758 case 27:
29759 case 24:
29760 case 23:
29761 case 21:
29762 case 20:
29763 case 19:
29764 casenum = 0;
29765 break;
29766
29767 case -1:
29768 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
29769 && asm_noperands (PATTERN (insn)) < 0)
29770 fatal_insn_not_found (insn);
29771 default:
29772 casenum = 2;
29773 break;
29774
29775 }
29776
29777 insn = candidate_insn;
29778 switch (casenum)
29779 {
29780 case 0:
29781 return 2;
29782
29783 case 1:
29784 return 2;
29785
29786 case 2:
29787 return 56 ;
29788
29789 default:
29790 abort ();
29791 }
29792 }
29793
29794 static int k6_fpu_unit_conflict_cost PARAMS ((rtx, rtx));
29795 static int
29796 k6_fpu_unit_conflict_cost (executing_insn, candidate_insn)
29797 rtx executing_insn;
29798 rtx candidate_insn;
29799 {
29800 rtx insn;
29801 int casenum;
29802
29803 insn = executing_insn;
29804 switch (recog_memoized (insn))
29805 {
29806 case 581:
29807 case 579:
29808 case 577:
29809 case 575:
29810 case 573:
29811 case 571:
29812 case 569:
29813 extract_insn_cached (insn);
29814 if (get_attr_type (insn) == TYPE_FOP)
29815 {
29816 casenum = 0;
29817 }
29818 else if (mult_operator (operands[3], TFmode))
29819 {
29820 casenum = 1;
29821 }
29822 else
29823 {
29824 casenum = 2;
29825 }
29826 break;
29827
29828 case 580:
29829 case 578:
29830 case 576:
29831 case 574:
29832 case 572:
29833 case 570:
29834 case 568:
29835 extract_insn_cached (insn);
29836 if (get_attr_type (insn) == TYPE_FOP)
29837 {
29838 casenum = 0;
29839 }
29840 else if (mult_operator (operands[3], XFmode))
29841 {
29842 casenum = 1;
29843 }
29844 else
29845 {
29846 casenum = 2;
29847 }
29848 break;
29849
29850 case 562:
29851 extract_constrain_insn_cached (insn);
29852 if (get_attr_type (insn) == TYPE_FOP)
29853 {
29854 casenum = 0;
29855 }
29856 else if ((which_alternative != 2) && (mult_operator (operands[3], DFmode)))
29857 {
29858 casenum = 1;
29859 }
29860 else
29861 {
29862 casenum = 2;
29863 }
29864 break;
29865
29866 case 567:
29867 case 566:
29868 case 565:
29869 case 564:
29870 case 561:
29871 extract_insn_cached (insn);
29872 if (get_attr_type (insn) == TYPE_FOP)
29873 {
29874 casenum = 0;
29875 }
29876 else if (mult_operator (operands[3], DFmode))
29877 {
29878 casenum = 1;
29879 }
29880 else
29881 {
29882 casenum = 2;
29883 }
29884 break;
29885
29886 case 557:
29887 extract_constrain_insn_cached (insn);
29888 if (get_attr_type (insn) == TYPE_FOP)
29889 {
29890 casenum = 0;
29891 }
29892 else if ((which_alternative != 2) && (mult_operator (operands[3], SFmode)))
29893 {
29894 casenum = 1;
29895 }
29896 else
29897 {
29898 casenum = 2;
29899 }
29900 break;
29901
29902 case 560:
29903 case 559:
29904 case 556:
29905 extract_insn_cached (insn);
29906 if (get_attr_type (insn) == TYPE_FOP)
29907 {
29908 casenum = 0;
29909 }
29910 else if (mult_operator (operands[3], SFmode))
29911 {
29912 casenum = 1;
29913 }
29914 else
29915 {
29916 casenum = 2;
29917 }
29918 break;
29919
29920 case 555:
29921 extract_insn_cached (insn);
29922 if (! (mult_operator (operands[3], TFmode)))
29923 {
29924 casenum = 0;
29925 }
29926 else
29927 {
29928 casenum = 1;
29929 }
29930 break;
29931
29932 case 554:
29933 extract_insn_cached (insn);
29934 if (! (mult_operator (operands[3], XFmode)))
29935 {
29936 casenum = 0;
29937 }
29938 else
29939 {
29940 casenum = 1;
29941 }
29942 break;
29943
29944 case 552:
29945 case 549:
29946 extract_constrain_insn_cached (insn);
29947 if ((which_alternative == 0) && (! (mult_operator (operands[3], SFmode))))
29948 {
29949 casenum = 0;
29950 }
29951 else if ((which_alternative == 0) && (mult_operator (operands[3], SFmode)))
29952 {
29953 casenum = 1;
29954 }
29955 else
29956 {
29957 casenum = 2;
29958 }
29959 break;
29960
29961 case 551:
29962 case 548:
29963 extract_insn_cached (insn);
29964 if (! (mult_operator (operands[3], SFmode)))
29965 {
29966 casenum = 0;
29967 }
29968 else
29969 {
29970 casenum = 1;
29971 }
29972 break;
29973
29974 case 135:
29975 extract_constrain_insn_cached (insn);
29976 if (which_alternative == 1)
29977 {
29978 casenum = 0;
29979 }
29980 else
29981 {
29982 casenum = 2;
29983 }
29984 break;
29985
29986 case 127:
29987 extract_constrain_insn_cached (insn);
29988 if ((which_alternative == 0) || (which_alternative == 1))
29989 {
29990 casenum = 0;
29991 }
29992 else
29993 {
29994 casenum = 2;
29995 }
29996 break;
29997
29998 case 103:
29999 case 102:
30000 case 101:
30001 case 100:
30002 case 94:
30003 case 93:
30004 case 89:
30005 extract_constrain_insn_cached (insn);
30006 if ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))
30007 {
30008 casenum = 0;
30009 }
30010 else
30011 {
30012 casenum = 2;
30013 }
30014 break;
30015
30016 case 178:
30017 case 177:
30018 case 176:
30019 case 175:
30020 case 174:
30021 case 173:
30022 case 171:
30023 case 170:
30024 case 168:
30025 case 167:
30026 case 165:
30027 case 164:
30028 case 162:
30029 case 161:
30030 case 144:
30031 case 142:
30032 case 140:
30033 case 138:
30034 case 134:
30035 case 133:
30036 case 35:
30037 case 32:
30038 extract_constrain_insn_cached (insn);
30039 if (which_alternative == 0)
30040 {
30041 casenum = 0;
30042 }
30043 else
30044 {
30045 casenum = 2;
30046 }
30047 break;
30048
30049 case 158:
30050 case 157:
30051 case 156:
30052 case 153:
30053 case 152:
30054 case 151:
30055 case 148:
30056 case 147:
30057 case 146:
30058 case 145:
30059 case 143:
30060 case 141:
30061 case 139:
30062 case 136:
30063 case 132:
30064 case 131:
30065 case 130:
30066 case 129:
30067 case 34:
30068 case 31:
30069 case 27:
30070 case 24:
30071 case 23:
30072 case 21:
30073 case 20:
30074 case 19:
30075 casenum = 0;
30076 break;
30077
30078 case -1:
30079 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
30080 && asm_noperands (PATTERN (insn)) < 0)
30081 fatal_insn_not_found (insn);
30082 default:
30083 casenum = 2;
30084 break;
30085
30086 }
30087
30088 insn = candidate_insn;
30089 switch (casenum)
30090 {
30091 case 0:
30092 return 2;
30093
30094 case 1:
30095 return 2;
30096
30097 case 2:
30098 return 56 ;
30099
30100 default:
30101 abort ();
30102 }
30103 }
30104
30105 static int k6_store_unit_blockage PARAMS ((rtx, rtx));
30106 static int
30107 k6_store_unit_blockage (executing_insn, candidate_insn)
30108 rtx executing_insn;
30109 rtx candidate_insn;
30110 {
30111 rtx insn;
30112 int casenum;
30113
30114 insn = executing_insn;
30115 switch (recog_memoized (insn))
30116 {
30117 case 659:
30118 extract_constrain_insn_cached (insn);
30119 if ((which_alternative == 1) && (! (const0_operand (operands[2], DImode))))
30120 {
30121 casenum = 0;
30122 }
30123 else
30124 {
30125 casenum = 2;
30126 }
30127 break;
30128
30129 case 658:
30130 extract_constrain_insn_cached (insn);
30131 if ((which_alternative == 1) && (! (const0_operand (operands[2], SImode))))
30132 {
30133 casenum = 0;
30134 }
30135 else
30136 {
30137 casenum = 2;
30138 }
30139 break;
30140
30141 case 635:
30142 case 634:
30143 case 633:
30144 case 632:
30145 case 631:
30146 case 630:
30147 case 629:
30148 case 628:
30149 case 627:
30150 case 626:
30151 case 625:
30152 case 624:
30153 case 623:
30154 case 622:
30155 case 621:
30156 case 620:
30157 case 619:
30158 case 618:
30159 case 617:
30160 case 616:
30161 case 615:
30162 case 614:
30163 case 613:
30164 case 612:
30165 case 611:
30166 case 610:
30167 case 609:
30168 case 608:
30169 case 607:
30170 case 606:
30171 casenum = 1;
30172 break;
30173
30174 case 417:
30175 case 414:
30176 case 413:
30177 case 408:
30178 extract_constrain_insn_cached (insn);
30179 if (which_alternative == 1)
30180 {
30181 casenum = 0;
30182 }
30183 else
30184 {
30185 casenum = 2;
30186 }
30187 break;
30188
30189 case 215:
30190 extract_constrain_insn_cached (insn);
30191 if (which_alternative == 3)
30192 {
30193 casenum = 0;
30194 }
30195 else
30196 {
30197 casenum = 2;
30198 }
30199 break;
30200
30201 case 420:
30202 case 209:
30203 extract_constrain_insn_cached (insn);
30204 if (which_alternative == 2)
30205 {
30206 casenum = 0;
30207 }
30208 else
30209 {
30210 casenum = 2;
30211 }
30212 break;
30213
30214 case 202:
30215 extract_constrain_insn_cached (insn);
30216 if ((which_alternative != 0) || (pic_symbolic_operand (operands[2], SImode)))
30217 {
30218 casenum = 0;
30219 }
30220 else
30221 {
30222 casenum = 2;
30223 }
30224 break;
30225
30226 case 201:
30227 extract_constrain_insn_cached (insn);
30228 if ((which_alternative == 2) || (pic_symbolic_operand (operands[2], SImode)))
30229 {
30230 casenum = 0;
30231 }
30232 else
30233 {
30234 casenum = 2;
30235 }
30236 break;
30237
30238 case 196:
30239 extract_constrain_insn_cached (insn);
30240 if ((which_alternative == 2) || (pic_symbolic_operand (operands[2], DImode)))
30241 {
30242 casenum = 0;
30243 }
30244 else
30245 {
30246 casenum = 2;
30247 }
30248 break;
30249
30250 case 195:
30251 case 194:
30252 case 193:
30253 case 192:
30254 case 191:
30255 case 190:
30256 case 189:
30257 case 188:
30258 case 187:
30259 case 186:
30260 casenum = 0;
30261 break;
30262
30263 case 83:
30264 extract_constrain_insn_cached (insn);
30265 if (((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative != 7) && ((which_alternative != 8) && ((which_alternative != 9) && ((which_alternative != 4) && (((flag_pic) != (0)) && (symbolic_operand (operands[1], DImode))))))))
30266 {
30267 casenum = 0;
30268 }
30269 else
30270 {
30271 casenum = 2;
30272 }
30273 break;
30274
30275 case 44:
30276 extract_constrain_insn_cached (insn);
30277 if (((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (((flag_pic) != (0)) && (symbolic_operand (operands[1], SImode)))))))
30278 {
30279 casenum = 0;
30280 }
30281 else
30282 {
30283 casenum = 2;
30284 }
30285 break;
30286
30287 case -1:
30288 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
30289 && asm_noperands (PATTERN (insn)) < 0)
30290 fatal_insn_not_found (insn);
30291 default:
30292 casenum = 2;
30293 break;
30294
30295 }
30296
30297 insn = candidate_insn;
30298 switch (casenum)
30299 {
30300 case 0:
30301 return 1;
30302
30303 case 1:
30304 return 10 ;
30305
30306 case 2:
30307 return 1;
30308
30309 default:
30310 abort ();
30311 }
30312 }
30313
30314 static int k6_store_unit_conflict_cost PARAMS ((rtx, rtx));
30315 static int
30316 k6_store_unit_conflict_cost (executing_insn, candidate_insn)
30317 rtx executing_insn;
30318 rtx candidate_insn;
30319 {
30320 rtx insn;
30321 int casenum;
30322
30323 insn = executing_insn;
30324 switch (recog_memoized (insn))
30325 {
30326 case 659:
30327 extract_constrain_insn_cached (insn);
30328 if ((which_alternative == 1) && (! (const0_operand (operands[2], DImode))))
30329 {
30330 casenum = 0;
30331 }
30332 else
30333 {
30334 casenum = 2;
30335 }
30336 break;
30337
30338 case 658:
30339 extract_constrain_insn_cached (insn);
30340 if ((which_alternative == 1) && (! (const0_operand (operands[2], SImode))))
30341 {
30342 casenum = 0;
30343 }
30344 else
30345 {
30346 casenum = 2;
30347 }
30348 break;
30349
30350 case 635:
30351 case 634:
30352 case 633:
30353 case 632:
30354 case 631:
30355 case 630:
30356 case 629:
30357 case 628:
30358 case 627:
30359 case 626:
30360 case 625:
30361 case 624:
30362 case 623:
30363 case 622:
30364 case 621:
30365 case 620:
30366 case 619:
30367 case 618:
30368 case 617:
30369 case 616:
30370 case 615:
30371 case 614:
30372 case 613:
30373 case 612:
30374 case 611:
30375 case 610:
30376 case 609:
30377 case 608:
30378 case 607:
30379 case 606:
30380 casenum = 1;
30381 break;
30382
30383 case 417:
30384 case 414:
30385 case 413:
30386 case 408:
30387 extract_constrain_insn_cached (insn);
30388 if (which_alternative == 1)
30389 {
30390 casenum = 0;
30391 }
30392 else
30393 {
30394 casenum = 2;
30395 }
30396 break;
30397
30398 case 215:
30399 extract_constrain_insn_cached (insn);
30400 if (which_alternative == 3)
30401 {
30402 casenum = 0;
30403 }
30404 else
30405 {
30406 casenum = 2;
30407 }
30408 break;
30409
30410 case 420:
30411 case 209:
30412 extract_constrain_insn_cached (insn);
30413 if (which_alternative == 2)
30414 {
30415 casenum = 0;
30416 }
30417 else
30418 {
30419 casenum = 2;
30420 }
30421 break;
30422
30423 case 202:
30424 extract_constrain_insn_cached (insn);
30425 if ((which_alternative != 0) || (pic_symbolic_operand (operands[2], SImode)))
30426 {
30427 casenum = 0;
30428 }
30429 else
30430 {
30431 casenum = 2;
30432 }
30433 break;
30434
30435 case 201:
30436 extract_constrain_insn_cached (insn);
30437 if ((which_alternative == 2) || (pic_symbolic_operand (operands[2], SImode)))
30438 {
30439 casenum = 0;
30440 }
30441 else
30442 {
30443 casenum = 2;
30444 }
30445 break;
30446
30447 case 196:
30448 extract_constrain_insn_cached (insn);
30449 if ((which_alternative == 2) || (pic_symbolic_operand (operands[2], DImode)))
30450 {
30451 casenum = 0;
30452 }
30453 else
30454 {
30455 casenum = 2;
30456 }
30457 break;
30458
30459 case 195:
30460 case 194:
30461 case 193:
30462 case 192:
30463 case 191:
30464 case 190:
30465 case 189:
30466 case 188:
30467 case 187:
30468 case 186:
30469 casenum = 0;
30470 break;
30471
30472 case 83:
30473 extract_constrain_insn_cached (insn);
30474 if (((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative != 7) && ((which_alternative != 8) && ((which_alternative != 9) && ((which_alternative != 4) && (((flag_pic) != (0)) && (symbolic_operand (operands[1], DImode))))))))
30475 {
30476 casenum = 0;
30477 }
30478 else
30479 {
30480 casenum = 2;
30481 }
30482 break;
30483
30484 case 44:
30485 extract_constrain_insn_cached (insn);
30486 if (((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (((flag_pic) != (0)) && (symbolic_operand (operands[1], SImode)))))))
30487 {
30488 casenum = 0;
30489 }
30490 else
30491 {
30492 casenum = 2;
30493 }
30494 break;
30495
30496 case -1:
30497 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
30498 && asm_noperands (PATTERN (insn)) < 0)
30499 fatal_insn_not_found (insn);
30500 default:
30501 casenum = 2;
30502 break;
30503
30504 }
30505
30506 insn = candidate_insn;
30507 switch (casenum)
30508 {
30509 case 0:
30510 return 1;
30511
30512 case 1:
30513 return 10 ;
30514
30515 case 2:
30516 return 1;
30517
30518 default:
30519 abort ();
30520 }
30521 }
30522
30523 static int k6_load_unit_blockage PARAMS ((rtx, rtx));
30524 static int
30525 k6_load_unit_blockage (executing_insn, candidate_insn)
30526 rtx executing_insn;
30527 rtx candidate_insn;
30528 {
30529 rtx insn;
30530 int casenum;
30531
30532 insn = executing_insn;
30533 switch (recog_memoized (insn))
30534 {
30535 case 679:
30536 case 678:
30537 case 677:
30538 case 676:
30539 case 675:
30540 case 674:
30541 extract_insn_cached (insn);
30542 if (! (constant_call_address_operand (operands[1], VOIDmode)))
30543 {
30544 casenum = 0;
30545 }
30546 else
30547 {
30548 casenum = 1;
30549 }
30550 break;
30551
30552 case 525:
30553 case 524:
30554 case 523:
30555 case 522:
30556 case 521:
30557 extract_insn_cached (insn);
30558 if (! (constant_call_address_operand (operands[0], VOIDmode)))
30559 {
30560 casenum = 0;
30561 }
30562 else
30563 {
30564 casenum = 1;
30565 }
30566 break;
30567
30568 case 529:
30569 case 520:
30570 case 519:
30571 case 518:
30572 case 517:
30573 case 516:
30574 case 515:
30575 case 504:
30576 case 503:
30577 extract_insn_cached (insn);
30578 if (memory_operand (operands[0], VOIDmode))
30579 {
30580 casenum = 0;
30581 }
30582 else
30583 {
30584 casenum = 1;
30585 }
30586 break;
30587
30588 case 88:
30589 case 87:
30590 extract_constrain_insn_cached (insn);
30591 if ((which_alternative == 1) && (memory_operand (operands[1], VOIDmode)))
30592 {
30593 casenum = 0;
30594 }
30595 else
30596 {
30597 casenum = 1;
30598 }
30599 break;
30600
30601 case 76:
30602 extract_constrain_insn_cached (insn);
30603 if ((which_alternative == 0) && (memory_operand (operands[1], VOIDmode)))
30604 {
30605 casenum = 0;
30606 }
30607 else
30608 {
30609 casenum = 1;
30610 }
30611 break;
30612
30613 case 851:
30614 case 617:
30615 case 616:
30616 case 615:
30617 case 614:
30618 case 613:
30619 case 612:
30620 case 611:
30621 case 610:
30622 case 609:
30623 case 608:
30624 case 607:
30625 case 606:
30626 case 547:
30627 case 546:
30628 case 545:
30629 case 544:
30630 case 500:
30631 case 499:
30632 case 158:
30633 case 157:
30634 case 156:
30635 case 153:
30636 case 152:
30637 case 151:
30638 case 148:
30639 case 147:
30640 case 146:
30641 case 85:
30642 case 79:
30643 case 78:
30644 case 68:
30645 case 52:
30646 case 46:
30647 case 41:
30648 case 40:
30649 casenum = 0;
30650 break;
30651
30652 case 407:
30653 case 406:
30654 case 405:
30655 case 404:
30656 case 403:
30657 case 402:
30658 case 401:
30659 case 400:
30660 case 399:
30661 case 398:
30662 case 359:
30663 case 358:
30664 case 357:
30665 case 356:
30666 case 355:
30667 case 354:
30668 case 353:
30669 case 352:
30670 case 351:
30671 case 350:
30672 case 345:
30673 case 339:
30674 case 319:
30675 case 317:
30676 case 297:
30677 case 295:
30678 case 242:
30679 case 111:
30680 case 108:
30681 case 106:
30682 case 81:
30683 case 80:
30684 case 77:
30685 case 62:
30686 case 58:
30687 case 57:
30688 case 56:
30689 case 49:
30690 case 48:
30691 case 43:
30692 case 42:
30693 case 39:
30694 case 38:
30695 case 37:
30696 extract_insn_cached (insn);
30697 if (memory_operand (operands[1], VOIDmode))
30698 {
30699 casenum = 0;
30700 }
30701 else
30702 {
30703 casenum = 1;
30704 }
30705 break;
30706
30707 case 967:
30708 case 966:
30709 case 965:
30710 case 964:
30711 case 963:
30712 case 962:
30713 case 904:
30714 case 903:
30715 case 902:
30716 case 901:
30717 case 900:
30718 case 899:
30719 case 860:
30720 case 859:
30721 case 858:
30722 case 828:
30723 case 827:
30724 case 826:
30725 case 825:
30726 case 824:
30727 case 823:
30728 case 776:
30729 case 775:
30730 case 774:
30731 case 773:
30732 case 772:
30733 case 771:
30734 case 502:
30735 case 501:
30736 case 283:
30737 case 282:
30738 case 281:
30739 case 280:
30740 case 279:
30741 case 278:
30742 case 277:
30743 case 276:
30744 case 36:
30745 case 35:
30746 case 34:
30747 case 33:
30748 case 32:
30749 case 31:
30750 case 27:
30751 case 24:
30752 case 23:
30753 case 21:
30754 case 20:
30755 case 19:
30756 case 17:
30757 case 16:
30758 case 15:
30759 case 14:
30760 case 13:
30761 case 12:
30762 case 11:
30763 case 10:
30764 case 9:
30765 case 8:
30766 case 7:
30767 case 6:
30768 case 5:
30769 case 4:
30770 case 3:
30771 case 2:
30772 case 1:
30773 case 0:
30774 if (get_attr_memory (insn) == MEMORY_LOAD)
30775 {
30776 casenum = 0;
30777 }
30778 else
30779 {
30780 casenum = 1;
30781 }
30782 break;
30783
30784 case -1:
30785 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
30786 && asm_noperands (PATTERN (insn)) < 0)
30787 fatal_insn_not_found (insn);
30788 case 1024:
30789 case 1023:
30790 case 1022:
30791 case 1021:
30792 case 1020:
30793 case 953:
30794 case 884:
30795 case 883:
30796 case 882:
30797 case 881:
30798 case 864:
30799 case 854:
30800 case 853:
30801 case 852:
30802 case 850:
30803 case 814:
30804 case 813:
30805 case 770:
30806 case 769:
30807 case 708:
30808 case 707:
30809 case 706:
30810 case 705:
30811 case 704:
30812 case 703:
30813 case 702:
30814 case 701:
30815 case 700:
30816 case 699:
30817 case 698:
30818 case 697:
30819 case 696:
30820 case 695:
30821 case 694:
30822 case 693:
30823 case 692:
30824 case 681:
30825 case 680:
30826 case 673:
30827 case 672:
30828 case 671:
30829 case 670:
30830 case 669:
30831 case 668:
30832 case 667:
30833 case 666:
30834 case 665:
30835 case 664:
30836 case 663:
30837 case 662:
30838 case 661:
30839 case 660:
30840 case 656:
30841 case 655:
30842 case 653:
30843 case 652:
30844 case 650:
30845 case 649:
30846 case 647:
30847 case 646:
30848 case 645:
30849 case 644:
30850 case 642:
30851 case 638:
30852 case 636:
30853 case 635:
30854 case 634:
30855 case 633:
30856 case 632:
30857 case 631:
30858 case 630:
30859 case 629:
30860 case 628:
30861 case 627:
30862 case 626:
30863 case 625:
30864 case 624:
30865 case 623:
30866 case 622:
30867 case 621:
30868 case 620:
30869 case 619:
30870 case 618:
30871 case 605:
30872 case 604:
30873 case 603:
30874 case 602:
30875 case 601:
30876 case 600:
30877 case 599:
30878 case 598:
30879 case 597:
30880 case 596:
30881 case 595:
30882 case 594:
30883 case 593:
30884 case 592:
30885 case 591:
30886 case 590:
30887 case 589:
30888 case 588:
30889 case 587:
30890 case 584:
30891 case 543:
30892 case 542:
30893 case 541:
30894 case 540:
30895 case 539:
30896 case 538:
30897 case 537:
30898 case 536:
30899 case 535:
30900 case 534:
30901 case 533:
30902 case 532:
30903 case 531:
30904 case 530:
30905 case 528:
30906 case 527:
30907 case 526:
30908 case 514:
30909 case 513:
30910 case 512:
30911 case 511:
30912 case 510:
30913 case 509:
30914 case 508:
30915 case 507:
30916 case 506:
30917 case 505:
30918 case 456:
30919 case 455:
30920 case 429:
30921 case 428:
30922 case 411:
30923 case 410:
30924 case 388:
30925 case 387:
30926 case 386:
30927 case 385:
30928 case 384:
30929 case 383:
30930 case 382:
30931 case 381:
30932 case 380:
30933 case 379:
30934 case 369:
30935 case 368:
30936 case 367:
30937 case 366:
30938 case 365:
30939 case 364:
30940 case 363:
30941 case 362:
30942 case 361:
30943 case 360:
30944 case 349:
30945 case 285:
30946 case 284:
30947 case 273:
30948 case 271:
30949 case 270:
30950 case 268:
30951 case 267:
30952 case 265:
30953 case 264:
30954 case 225:
30955 case 195:
30956 case 194:
30957 case 193:
30958 case 192:
30959 case 191:
30960 case 190:
30961 case 189:
30962 case 188:
30963 case 187:
30964 case 186:
30965 case 179:
30966 case 160:
30967 case 159:
30968 case 118:
30969 case 114:
30970 case 99:
30971 case 98:
30972 case 97:
30973 case 96:
30974 case 92:
30975 case 91:
30976 case 84:
30977 case 75:
30978 case 67:
30979 case 51:
30980 case 45:
30981 case 30:
30982 case 29:
30983 case 28:
30984 case 26:
30985 case 25:
30986 case 22:
30987 case 18:
30988 casenum = 1;
30989 break;
30990
30991 default:
30992 casenum = 0;
30993 break;
30994
30995 }
30996
30997 insn = candidate_insn;
30998 switch (casenum)
30999 {
31000 case 0:
31001 return 1;
31002
31003 case 1:
31004 return 10 ;
31005
31006 default:
31007 abort ();
31008 }
31009 }
31010
31011 static int k6_load_unit_conflict_cost PARAMS ((rtx, rtx));
31012 static int
31013 k6_load_unit_conflict_cost (executing_insn, candidate_insn)
31014 rtx executing_insn;
31015 rtx candidate_insn;
31016 {
31017 rtx insn;
31018 int casenum;
31019
31020 insn = executing_insn;
31021 switch (recog_memoized (insn))
31022 {
31023 case 679:
31024 case 678:
31025 case 677:
31026 case 676:
31027 case 675:
31028 case 674:
31029 extract_insn_cached (insn);
31030 if (! (constant_call_address_operand (operands[1], VOIDmode)))
31031 {
31032 casenum = 0;
31033 }
31034 else
31035 {
31036 casenum = 1;
31037 }
31038 break;
31039
31040 case 525:
31041 case 524:
31042 case 523:
31043 case 522:
31044 case 521:
31045 extract_insn_cached (insn);
31046 if (! (constant_call_address_operand (operands[0], VOIDmode)))
31047 {
31048 casenum = 0;
31049 }
31050 else
31051 {
31052 casenum = 1;
31053 }
31054 break;
31055
31056 case 529:
31057 case 520:
31058 case 519:
31059 case 518:
31060 case 517:
31061 case 516:
31062 case 515:
31063 case 504:
31064 case 503:
31065 extract_insn_cached (insn);
31066 if (memory_operand (operands[0], VOIDmode))
31067 {
31068 casenum = 0;
31069 }
31070 else
31071 {
31072 casenum = 1;
31073 }
31074 break;
31075
31076 case 88:
31077 case 87:
31078 extract_constrain_insn_cached (insn);
31079 if ((which_alternative == 1) && (memory_operand (operands[1], VOIDmode)))
31080 {
31081 casenum = 0;
31082 }
31083 else
31084 {
31085 casenum = 1;
31086 }
31087 break;
31088
31089 case 76:
31090 extract_constrain_insn_cached (insn);
31091 if ((which_alternative == 0) && (memory_operand (operands[1], VOIDmode)))
31092 {
31093 casenum = 0;
31094 }
31095 else
31096 {
31097 casenum = 1;
31098 }
31099 break;
31100
31101 case 851:
31102 case 617:
31103 case 616:
31104 case 615:
31105 case 614:
31106 case 613:
31107 case 612:
31108 case 611:
31109 case 610:
31110 case 609:
31111 case 608:
31112 case 607:
31113 case 606:
31114 case 547:
31115 case 546:
31116 case 545:
31117 case 544:
31118 case 500:
31119 case 499:
31120 case 158:
31121 case 157:
31122 case 156:
31123 case 153:
31124 case 152:
31125 case 151:
31126 case 148:
31127 case 147:
31128 case 146:
31129 case 85:
31130 case 79:
31131 case 78:
31132 case 68:
31133 case 52:
31134 case 46:
31135 case 41:
31136 case 40:
31137 casenum = 0;
31138 break;
31139
31140 case 407:
31141 case 406:
31142 case 405:
31143 case 404:
31144 case 403:
31145 case 402:
31146 case 401:
31147 case 400:
31148 case 399:
31149 case 398:
31150 case 359:
31151 case 358:
31152 case 357:
31153 case 356:
31154 case 355:
31155 case 354:
31156 case 353:
31157 case 352:
31158 case 351:
31159 case 350:
31160 case 345:
31161 case 339:
31162 case 319:
31163 case 317:
31164 case 297:
31165 case 295:
31166 case 242:
31167 case 111:
31168 case 108:
31169 case 106:
31170 case 81:
31171 case 80:
31172 case 77:
31173 case 62:
31174 case 58:
31175 case 57:
31176 case 56:
31177 case 49:
31178 case 48:
31179 case 43:
31180 case 42:
31181 case 39:
31182 case 38:
31183 case 37:
31184 extract_insn_cached (insn);
31185 if (memory_operand (operands[1], VOIDmode))
31186 {
31187 casenum = 0;
31188 }
31189 else
31190 {
31191 casenum = 1;
31192 }
31193 break;
31194
31195 case 967:
31196 case 966:
31197 case 965:
31198 case 964:
31199 case 963:
31200 case 962:
31201 case 904:
31202 case 903:
31203 case 902:
31204 case 901:
31205 case 900:
31206 case 899:
31207 case 860:
31208 case 859:
31209 case 858:
31210 case 828:
31211 case 827:
31212 case 826:
31213 case 825:
31214 case 824:
31215 case 823:
31216 case 776:
31217 case 775:
31218 case 774:
31219 case 773:
31220 case 772:
31221 case 771:
31222 case 502:
31223 case 501:
31224 case 283:
31225 case 282:
31226 case 281:
31227 case 280:
31228 case 279:
31229 case 278:
31230 case 277:
31231 case 276:
31232 case 36:
31233 case 35:
31234 case 34:
31235 case 33:
31236 case 32:
31237 case 31:
31238 case 27:
31239 case 24:
31240 case 23:
31241 case 21:
31242 case 20:
31243 case 19:
31244 case 17:
31245 case 16:
31246 case 15:
31247 case 14:
31248 case 13:
31249 case 12:
31250 case 11:
31251 case 10:
31252 case 9:
31253 case 8:
31254 case 7:
31255 case 6:
31256 case 5:
31257 case 4:
31258 case 3:
31259 case 2:
31260 case 1:
31261 case 0:
31262 if (get_attr_memory (insn) == MEMORY_LOAD)
31263 {
31264 casenum = 0;
31265 }
31266 else
31267 {
31268 casenum = 1;
31269 }
31270 break;
31271
31272 case -1:
31273 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
31274 && asm_noperands (PATTERN (insn)) < 0)
31275 fatal_insn_not_found (insn);
31276 case 1024:
31277 case 1023:
31278 case 1022:
31279 case 1021:
31280 case 1020:
31281 case 953:
31282 case 884:
31283 case 883:
31284 case 882:
31285 case 881:
31286 case 864:
31287 case 854:
31288 case 853:
31289 case 852:
31290 case 850:
31291 case 814:
31292 case 813:
31293 case 770:
31294 case 769:
31295 case 708:
31296 case 707:
31297 case 706:
31298 case 705:
31299 case 704:
31300 case 703:
31301 case 702:
31302 case 701:
31303 case 700:
31304 case 699:
31305 case 698:
31306 case 697:
31307 case 696:
31308 case 695:
31309 case 694:
31310 case 693:
31311 case 692:
31312 case 681:
31313 case 680:
31314 case 673:
31315 case 672:
31316 case 671:
31317 case 670:
31318 case 669:
31319 case 668:
31320 case 667:
31321 case 666:
31322 case 665:
31323 case 664:
31324 case 663:
31325 case 662:
31326 case 661:
31327 case 660:
31328 case 656:
31329 case 655:
31330 case 653:
31331 case 652:
31332 case 650:
31333 case 649:
31334 case 647:
31335 case 646:
31336 case 645:
31337 case 644:
31338 case 642:
31339 case 638:
31340 case 636:
31341 case 635:
31342 case 634:
31343 case 633:
31344 case 632:
31345 case 631:
31346 case 630:
31347 case 629:
31348 case 628:
31349 case 627:
31350 case 626:
31351 case 625:
31352 case 624:
31353 case 623:
31354 case 622:
31355 case 621:
31356 case 620:
31357 case 619:
31358 case 618:
31359 case 605:
31360 case 604:
31361 case 603:
31362 case 602:
31363 case 601:
31364 case 600:
31365 case 599:
31366 case 598:
31367 case 597:
31368 case 596:
31369 case 595:
31370 case 594:
31371 case 593:
31372 case 592:
31373 case 591:
31374 case 590:
31375 case 589:
31376 case 588:
31377 case 587:
31378 case 584:
31379 case 543:
31380 case 542:
31381 case 541:
31382 case 540:
31383 case 539:
31384 case 538:
31385 case 537:
31386 case 536:
31387 case 535:
31388 case 534:
31389 case 533:
31390 case 532:
31391 case 531:
31392 case 530:
31393 case 528:
31394 case 527:
31395 case 526:
31396 case 514:
31397 case 513:
31398 case 512:
31399 case 511:
31400 case 510:
31401 case 509:
31402 case 508:
31403 case 507:
31404 case 506:
31405 case 505:
31406 case 456:
31407 case 455:
31408 case 429:
31409 case 428:
31410 case 411:
31411 case 410:
31412 case 388:
31413 case 387:
31414 case 386:
31415 case 385:
31416 case 384:
31417 case 383:
31418 case 382:
31419 case 381:
31420 case 380:
31421 case 379:
31422 case 369:
31423 case 368:
31424 case 367:
31425 case 366:
31426 case 365:
31427 case 364:
31428 case 363:
31429 case 362:
31430 case 361:
31431 case 360:
31432 case 349:
31433 case 285:
31434 case 284:
31435 case 273:
31436 case 271:
31437 case 270:
31438 case 268:
31439 case 267:
31440 case 265:
31441 case 264:
31442 case 225:
31443 case 195:
31444 case 194:
31445 case 193:
31446 case 192:
31447 case 191:
31448 case 190:
31449 case 189:
31450 case 188:
31451 case 187:
31452 case 186:
31453 case 179:
31454 case 160:
31455 case 159:
31456 case 118:
31457 case 114:
31458 case 99:
31459 case 98:
31460 case 97:
31461 case 96:
31462 case 92:
31463 case 91:
31464 case 84:
31465 case 75:
31466 case 67:
31467 case 51:
31468 case 45:
31469 case 30:
31470 case 29:
31471 case 28:
31472 case 26:
31473 case 25:
31474 case 22:
31475 case 18:
31476 casenum = 1;
31477 break;
31478
31479 default:
31480 casenum = 0;
31481 break;
31482
31483 }
31484
31485 insn = candidate_insn;
31486 switch (casenum)
31487 {
31488 case 0:
31489 return 1;
31490
31491 case 1:
31492 return 10 ;
31493
31494 default:
31495 abort ();
31496 }
31497 }
31498
31499 static int k6_alu_unit_blockage PARAMS ((rtx, rtx));
31500 static int
31501 k6_alu_unit_blockage (executing_insn, candidate_insn)
31502 rtx executing_insn;
31503 rtx candidate_insn;
31504 {
31505 rtx insn;
31506 int casenum;
31507
31508 insn = executing_insn;
31509 switch (recog_memoized (insn))
31510 {
31511 case 659:
31512 extract_constrain_insn_cached (insn);
31513 if ((which_alternative != 1) || (! (const0_operand (operands[2], DImode))))
31514 {
31515 casenum = 0;
31516 }
31517 else if (get_attr_memory (insn) == MEMORY_NONE)
31518 {
31519 casenum = 1;
31520 }
31521 else
31522 {
31523 casenum = 3;
31524 }
31525 break;
31526
31527 case 658:
31528 extract_constrain_insn_cached (insn);
31529 if ((which_alternative != 1) || (! (const0_operand (operands[2], SImode))))
31530 {
31531 casenum = 0;
31532 }
31533 else if (get_attr_memory (insn) == MEMORY_NONE)
31534 {
31535 casenum = 1;
31536 }
31537 else
31538 {
31539 casenum = 3;
31540 }
31541 break;
31542
31543 case 420:
31544 extract_constrain_insn_cached (insn);
31545 if ((get_attr_type (insn) == TYPE_ISHIFT) || ((get_attr_type (insn) == TYPE_ALU) || (which_alternative == 2)))
31546 {
31547 casenum = 0;
31548 }
31549 else
31550 {
31551 casenum = 3;
31552 }
31553 break;
31554
31555 case 416:
31556 extract_constrain_insn_cached (insn);
31557 if (((! ((TARGET_DOUBLE_WITH_ADD) != (0))) || (! (const1_operand (operands[2], VOIDmode)))) || (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode))))
31558 {
31559 casenum = 0;
31560 }
31561 else
31562 {
31563 casenum = 3;
31564 }
31565 break;
31566
31567 case 414:
31568 extract_constrain_insn_cached (insn);
31569 if (((which_alternative == 0) && ((! ((TARGET_DOUBLE_WITH_ADD) != (0))) || (! (const1_operand (operands[2], VOIDmode))))) || ((which_alternative != 0) || (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode)))))
31570 {
31571 casenum = 0;
31572 }
31573 else
31574 {
31575 casenum = 3;
31576 }
31577 break;
31578
31579 case 422:
31580 case 421:
31581 case 419:
31582 case 418:
31583 case 415:
31584 case 409:
31585 if ((get_attr_type (insn) == TYPE_ISHIFT) || (get_attr_type (insn) == TYPE_ALU))
31586 {
31587 casenum = 0;
31588 }
31589 else
31590 {
31591 casenum = 3;
31592 }
31593 break;
31594
31595 case 417:
31596 case 413:
31597 case 408:
31598 extract_constrain_insn_cached (insn);
31599 if ((get_attr_type (insn) == TYPE_ISHIFT) || ((which_alternative != 0) || (get_attr_type (insn) == TYPE_ALU)))
31600 {
31601 casenum = 0;
31602 }
31603 else
31604 {
31605 casenum = 3;
31606 }
31607 break;
31608
31609 case 261:
31610 case 260:
31611 case 259:
31612 case 258:
31613 case 257:
31614 case 256:
31615 case 255:
31616 case 254:
31617 case 253:
31618 case 252:
31619 case 251:
31620 case 250:
31621 case 249:
31622 case 248:
31623 case 247:
31624 case 246:
31625 case 245:
31626 casenum = 2;
31627 break;
31628
31629 case 215:
31630 extract_constrain_insn_cached (insn);
31631 if (((which_alternative != 3) && (! (incdec_operand (operands[2], QImode)))) || ((incdec_operand (operands[2], QImode)) || (which_alternative == 3)))
31632 {
31633 casenum = 0;
31634 }
31635 else
31636 {
31637 casenum = 3;
31638 }
31639 break;
31640
31641 case 209:
31642 extract_constrain_insn_cached (insn);
31643 if (((which_alternative != 2) && (! (incdec_operand (operands[2], HImode)))) || ((incdec_operand (operands[2], HImode)) || (which_alternative == 2)))
31644 {
31645 casenum = 0;
31646 }
31647 else
31648 {
31649 casenum = 3;
31650 }
31651 break;
31652
31653 case 202:
31654 extract_constrain_insn_cached (insn);
31655 if ((get_attr_type (insn) == TYPE_ALU) || ((get_attr_type (insn) == TYPE_INCDEC) || ((which_alternative != 0) || (pic_symbolic_operand (operands[2], SImode)))))
31656 {
31657 casenum = 0;
31658 }
31659 else
31660 {
31661 casenum = 3;
31662 }
31663 break;
31664
31665 case 201:
31666 extract_constrain_insn_cached (insn);
31667 if ((get_attr_type (insn) == TYPE_ALU) || ((get_attr_type (insn) == TYPE_INCDEC) || ((which_alternative == 2) || (pic_symbolic_operand (operands[2], SImode)))))
31668 {
31669 casenum = 0;
31670 }
31671 else
31672 {
31673 casenum = 3;
31674 }
31675 break;
31676
31677 case 196:
31678 extract_constrain_insn_cached (insn);
31679 if ((get_attr_type (insn) == TYPE_ALU) || ((get_attr_type (insn) == TYPE_INCDEC) || ((which_alternative == 2) || (pic_symbolic_operand (operands[2], DImode)))))
31680 {
31681 casenum = 0;
31682 }
31683 else
31684 {
31685 casenum = 3;
31686 }
31687 break;
31688
31689 case 115:
31690 extract_constrain_insn_cached (insn);
31691 if (which_alternative == 0)
31692 {
31693 casenum = 0;
31694 }
31695 else if (get_attr_memory (insn) == MEMORY_NONE)
31696 {
31697 casenum = 1;
31698 }
31699 else
31700 {
31701 casenum = 3;
31702 }
31703 break;
31704
31705 case 89:
31706 extract_constrain_insn_cached (insn);
31707 if ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 3) || (which_alternative == 4))) && (get_attr_memory (insn) == MEMORY_NONE))
31708 {
31709 casenum = 1;
31710 }
31711 else
31712 {
31713 casenum = 3;
31714 }
31715 break;
31716
31717 case 83:
31718 extract_constrain_insn_cached (insn);
31719 if (((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative != 7) && ((which_alternative != 8) && ((which_alternative != 9) && ((which_alternative != 4) && (((flag_pic) != (0)) && (symbolic_operand (operands[1], DImode))))))))
31720 {
31721 casenum = 0;
31722 }
31723 else if ((((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative != 7) && ((which_alternative != 8) && ((which_alternative != 9) && ((which_alternative != 4) && ((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], DImode))))))))) && (get_attr_memory (insn) == MEMORY_NONE))
31724 {
31725 casenum = 1;
31726 }
31727 else
31728 {
31729 casenum = 3;
31730 }
31731 break;
31732
31733 case 71:
31734 extract_constrain_insn_cached (insn);
31735 if ((! (q_regs_operand (operands[0], QImode))) || ((TARGET_MOVX) != (0)))
31736 {
31737 casenum = 0;
31738 }
31739 else if (get_attr_memory (insn) == MEMORY_NONE)
31740 {
31741 casenum = 1;
31742 }
31743 else
31744 {
31745 casenum = 3;
31746 }
31747 break;
31748
31749 case 70:
31750 case 66:
31751 case 65:
31752 if (get_attr_type (insn) == TYPE_IMOVX)
31753 {
31754 casenum = 0;
31755 }
31756 else if ((get_attr_type (insn) == TYPE_IMOV) && (get_attr_memory (insn) == MEMORY_NONE))
31757 {
31758 casenum = 1;
31759 }
31760 else
31761 {
31762 casenum = 3;
31763 }
31764 break;
31765
31766 case 59:
31767 extract_constrain_insn_cached (insn);
31768 if (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2)))))
31769 {
31770 casenum = 0;
31771 }
31772 else if ((((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2)))))) && (get_attr_memory (insn) == MEMORY_NONE))
31773 {
31774 casenum = 1;
31775 }
31776 else
31777 {
31778 casenum = 3;
31779 }
31780 break;
31781
31782 case 50:
31783 extract_constrain_insn_cached (insn);
31784 if ((((which_alternative != 0) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_HIMODE_MATH) == (0))))) && (((which_alternative != 1) && (which_alternative != 2)) || (! (aligned_operand (operands[1], HImode))))) && (((TARGET_MOVX) != (0)) && ((which_alternative == 0) || (which_alternative == 2))))
31785 {
31786 casenum = 0;
31787 }
31788 else if ((get_attr_type (insn) == TYPE_IMOV) && (get_attr_memory (insn) == MEMORY_NONE))
31789 {
31790 casenum = 1;
31791 }
31792 else
31793 {
31794 casenum = 3;
31795 }
31796 break;
31797
31798 case 86:
31799 case 74:
31800 case 73:
31801 case 72:
31802 case 61:
31803 case 60:
31804 case 55:
31805 case 54:
31806 case 53:
31807 case 47:
31808 if (get_attr_memory (insn) == MEMORY_NONE)
31809 {
31810 casenum = 1;
31811 }
31812 else
31813 {
31814 casenum = 3;
31815 }
31816 break;
31817
31818 case 44:
31819 extract_constrain_insn_cached (insn);
31820 if (((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (((flag_pic) != (0)) && (symbolic_operand (operands[1], SImode)))))))
31821 {
31822 casenum = 0;
31823 }
31824 else if ((((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && ((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], SImode)))))))) && (get_attr_memory (insn) == MEMORY_NONE))
31825 {
31826 casenum = 1;
31827 }
31828 else
31829 {
31830 casenum = 3;
31831 }
31832 break;
31833
31834 case 638:
31835 case 636:
31836 case 547:
31837 case 546:
31838 case 500:
31839 case 499:
31840 case 498:
31841 case 497:
31842 case 496:
31843 case 495:
31844 case 494:
31845 case 493:
31846 case 492:
31847 case 491:
31848 case 490:
31849 case 489:
31850 case 488:
31851 case 487:
31852 case 486:
31853 case 485:
31854 case 484:
31855 case 483:
31856 case 482:
31857 case 481:
31858 case 480:
31859 case 479:
31860 case 478:
31861 case 477:
31862 case 476:
31863 case 475:
31864 case 474:
31865 case 473:
31866 case 472:
31867 case 471:
31868 case 470:
31869 case 469:
31870 case 468:
31871 case 467:
31872 case 466:
31873 case 465:
31874 case 464:
31875 case 463:
31876 case 462:
31877 case 461:
31878 case 460:
31879 case 459:
31880 case 458:
31881 case 457:
31882 case 454:
31883 case 453:
31884 case 452:
31885 case 451:
31886 case 450:
31887 case 449:
31888 case 448:
31889 case 447:
31890 case 446:
31891 case 445:
31892 case 444:
31893 case 443:
31894 case 442:
31895 case 441:
31896 case 440:
31897 case 439:
31898 case 438:
31899 case 437:
31900 case 436:
31901 case 435:
31902 case 434:
31903 case 433:
31904 case 432:
31905 case 431:
31906 case 430:
31907 case 427:
31908 case 426:
31909 case 425:
31910 case 424:
31911 case 423:
31912 case 412:
31913 case 407:
31914 case 406:
31915 case 405:
31916 case 404:
31917 case 403:
31918 case 402:
31919 case 401:
31920 case 400:
31921 case 399:
31922 case 398:
31923 case 359:
31924 case 358:
31925 case 357:
31926 case 356:
31927 case 355:
31928 case 354:
31929 case 353:
31930 case 352:
31931 case 351:
31932 case 350:
31933 case 348:
31934 case 347:
31935 case 346:
31936 case 345:
31937 case 344:
31938 case 343:
31939 case 342:
31940 case 341:
31941 case 340:
31942 case 339:
31943 case 338:
31944 case 337:
31945 case 336:
31946 case 335:
31947 case 334:
31948 case 333:
31949 case 332:
31950 case 331:
31951 case 330:
31952 case 329:
31953 case 328:
31954 case 327:
31955 case 326:
31956 case 325:
31957 case 324:
31958 case 323:
31959 case 322:
31960 case 321:
31961 case 320:
31962 case 319:
31963 case 318:
31964 case 317:
31965 case 316:
31966 case 315:
31967 case 314:
31968 case 313:
31969 case 312:
31970 case 311:
31971 case 310:
31972 case 309:
31973 case 308:
31974 case 307:
31975 case 306:
31976 case 305:
31977 case 304:
31978 case 303:
31979 case 302:
31980 case 301:
31981 case 300:
31982 case 299:
31983 case 298:
31984 case 297:
31985 case 296:
31986 case 295:
31987 case 294:
31988 case 293:
31989 case 292:
31990 case 291:
31991 case 290:
31992 case 289:
31993 case 288:
31994 case 287:
31995 case 286:
31996 case 283:
31997 case 282:
31998 case 281:
31999 case 280:
32000 case 279:
32001 case 278:
32002 case 277:
32003 case 276:
32004 case 244:
32005 case 243:
32006 case 242:
32007 case 241:
32008 case 240:
32009 case 239:
32010 case 238:
32011 case 237:
32012 case 236:
32013 case 235:
32014 case 234:
32015 case 233:
32016 case 232:
32017 case 231:
32018 case 230:
32019 case 229:
32020 case 228:
32021 case 227:
32022 case 226:
32023 case 224:
32024 case 223:
32025 case 222:
32026 case 221:
32027 case 220:
32028 case 219:
32029 case 218:
32030 case 217:
32031 case 216:
32032 case 214:
32033 case 213:
32034 case 212:
32035 case 211:
32036 case 210:
32037 case 208:
32038 case 207:
32039 case 206:
32040 case 205:
32041 case 204:
32042 case 203:
32043 case 200:
32044 case 199:
32045 case 198:
32046 case 197:
32047 case 195:
32048 case 194:
32049 case 193:
32050 case 192:
32051 case 191:
32052 case 190:
32053 case 189:
32054 case 188:
32055 case 187:
32056 case 186:
32057 case 185:
32058 case 184:
32059 case 183:
32060 case 182:
32061 case 181:
32062 case 180:
32063 case 126:
32064 case 125:
32065 case 124:
32066 case 123:
32067 case 122:
32068 case 121:
32069 case 120:
32070 case 119:
32071 case 117:
32072 case 116:
32073 case 113:
32074 case 112:
32075 case 111:
32076 case 110:
32077 case 109:
32078 case 108:
32079 case 107:
32080 case 106:
32081 case 81:
32082 case 80:
32083 case 69:
32084 case 64:
32085 case 63:
32086 case 62:
32087 case 56:
32088 case 43:
32089 case 42:
32090 case 17:
32091 case 16:
32092 case 15:
32093 case 14:
32094 case 13:
32095 case 12:
32096 case 11:
32097 case 10:
32098 case 9:
32099 case 8:
32100 case 7:
32101 case 6:
32102 case 5:
32103 case 4:
32104 case 3:
32105 case 2:
32106 case 1:
32107 case 0:
32108 casenum = 0;
32109 break;
32110
32111 case -1:
32112 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
32113 && asm_noperands (PATTERN (insn)) < 0)
32114 fatal_insn_not_found (insn);
32115 default:
32116 casenum = 3;
32117 break;
32118
32119 }
32120
32121 insn = candidate_insn;
32122 switch (casenum)
32123 {
32124 case 0:
32125 return 1;
32126
32127 case 1:
32128 return 1;
32129
32130 case 2:
32131 return 2;
32132
32133 case 3:
32134 return 17 ;
32135
32136 default:
32137 abort ();
32138 }
32139 }
32140
32141 static int k6_alu_unit_conflict_cost PARAMS ((rtx, rtx));
32142 static int
32143 k6_alu_unit_conflict_cost (executing_insn, candidate_insn)
32144 rtx executing_insn;
32145 rtx candidate_insn;
32146 {
32147 rtx insn;
32148 int casenum;
32149
32150 insn = executing_insn;
32151 switch (recog_memoized (insn))
32152 {
32153 case 659:
32154 extract_constrain_insn_cached (insn);
32155 if ((which_alternative != 1) || (! (const0_operand (operands[2], DImode))))
32156 {
32157 casenum = 0;
32158 }
32159 else if (get_attr_memory (insn) == MEMORY_NONE)
32160 {
32161 casenum = 1;
32162 }
32163 else
32164 {
32165 casenum = 3;
32166 }
32167 break;
32168
32169 case 658:
32170 extract_constrain_insn_cached (insn);
32171 if ((which_alternative != 1) || (! (const0_operand (operands[2], SImode))))
32172 {
32173 casenum = 0;
32174 }
32175 else if (get_attr_memory (insn) == MEMORY_NONE)
32176 {
32177 casenum = 1;
32178 }
32179 else
32180 {
32181 casenum = 3;
32182 }
32183 break;
32184
32185 case 420:
32186 extract_constrain_insn_cached (insn);
32187 if ((get_attr_type (insn) == TYPE_ISHIFT) || ((get_attr_type (insn) == TYPE_ALU) || (which_alternative == 2)))
32188 {
32189 casenum = 0;
32190 }
32191 else
32192 {
32193 casenum = 3;
32194 }
32195 break;
32196
32197 case 416:
32198 extract_constrain_insn_cached (insn);
32199 if (((! ((TARGET_DOUBLE_WITH_ADD) != (0))) || (! (const1_operand (operands[2], VOIDmode)))) || (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode))))
32200 {
32201 casenum = 0;
32202 }
32203 else
32204 {
32205 casenum = 3;
32206 }
32207 break;
32208
32209 case 414:
32210 extract_constrain_insn_cached (insn);
32211 if (((which_alternative == 0) && ((! ((TARGET_DOUBLE_WITH_ADD) != (0))) || (! (const1_operand (operands[2], VOIDmode))))) || ((which_alternative != 0) || (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode)))))
32212 {
32213 casenum = 0;
32214 }
32215 else
32216 {
32217 casenum = 3;
32218 }
32219 break;
32220
32221 case 422:
32222 case 421:
32223 case 419:
32224 case 418:
32225 case 415:
32226 case 409:
32227 if ((get_attr_type (insn) == TYPE_ISHIFT) || (get_attr_type (insn) == TYPE_ALU))
32228 {
32229 casenum = 0;
32230 }
32231 else
32232 {
32233 casenum = 3;
32234 }
32235 break;
32236
32237 case 417:
32238 case 413:
32239 case 408:
32240 extract_constrain_insn_cached (insn);
32241 if ((get_attr_type (insn) == TYPE_ISHIFT) || ((which_alternative != 0) || (get_attr_type (insn) == TYPE_ALU)))
32242 {
32243 casenum = 0;
32244 }
32245 else
32246 {
32247 casenum = 3;
32248 }
32249 break;
32250
32251 case 261:
32252 case 260:
32253 case 259:
32254 case 258:
32255 case 257:
32256 case 256:
32257 case 255:
32258 case 254:
32259 case 253:
32260 case 252:
32261 case 251:
32262 case 250:
32263 case 249:
32264 case 248:
32265 case 247:
32266 case 246:
32267 case 245:
32268 casenum = 2;
32269 break;
32270
32271 case 215:
32272 extract_constrain_insn_cached (insn);
32273 if (((which_alternative != 3) && (! (incdec_operand (operands[2], QImode)))) || ((incdec_operand (operands[2], QImode)) || (which_alternative == 3)))
32274 {
32275 casenum = 0;
32276 }
32277 else
32278 {
32279 casenum = 3;
32280 }
32281 break;
32282
32283 case 209:
32284 extract_constrain_insn_cached (insn);
32285 if (((which_alternative != 2) && (! (incdec_operand (operands[2], HImode)))) || ((incdec_operand (operands[2], HImode)) || (which_alternative == 2)))
32286 {
32287 casenum = 0;
32288 }
32289 else
32290 {
32291 casenum = 3;
32292 }
32293 break;
32294
32295 case 202:
32296 extract_constrain_insn_cached (insn);
32297 if ((get_attr_type (insn) == TYPE_ALU) || ((get_attr_type (insn) == TYPE_INCDEC) || ((which_alternative != 0) || (pic_symbolic_operand (operands[2], SImode)))))
32298 {
32299 casenum = 0;
32300 }
32301 else
32302 {
32303 casenum = 3;
32304 }
32305 break;
32306
32307 case 201:
32308 extract_constrain_insn_cached (insn);
32309 if ((get_attr_type (insn) == TYPE_ALU) || ((get_attr_type (insn) == TYPE_INCDEC) || ((which_alternative == 2) || (pic_symbolic_operand (operands[2], SImode)))))
32310 {
32311 casenum = 0;
32312 }
32313 else
32314 {
32315 casenum = 3;
32316 }
32317 break;
32318
32319 case 196:
32320 extract_constrain_insn_cached (insn);
32321 if ((get_attr_type (insn) == TYPE_ALU) || ((get_attr_type (insn) == TYPE_INCDEC) || ((which_alternative == 2) || (pic_symbolic_operand (operands[2], DImode)))))
32322 {
32323 casenum = 0;
32324 }
32325 else
32326 {
32327 casenum = 3;
32328 }
32329 break;
32330
32331 case 115:
32332 extract_constrain_insn_cached (insn);
32333 if (which_alternative == 0)
32334 {
32335 casenum = 0;
32336 }
32337 else if (get_attr_memory (insn) == MEMORY_NONE)
32338 {
32339 casenum = 1;
32340 }
32341 else
32342 {
32343 casenum = 3;
32344 }
32345 break;
32346
32347 case 89:
32348 extract_constrain_insn_cached (insn);
32349 if ((((which_alternative != 0) && ((which_alternative != 1) && (which_alternative != 2))) && ((which_alternative == 3) || (which_alternative == 4))) && (get_attr_memory (insn) == MEMORY_NONE))
32350 {
32351 casenum = 1;
32352 }
32353 else
32354 {
32355 casenum = 3;
32356 }
32357 break;
32358
32359 case 83:
32360 extract_constrain_insn_cached (insn);
32361 if (((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative != 7) && ((which_alternative != 8) && ((which_alternative != 9) && ((which_alternative != 4) && (((flag_pic) != (0)) && (symbolic_operand (operands[1], DImode))))))))
32362 {
32363 casenum = 0;
32364 }
32365 else if ((((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative != 7) && ((which_alternative != 8) && ((which_alternative != 9) && ((which_alternative != 4) && ((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], DImode))))))))) && (get_attr_memory (insn) == MEMORY_NONE))
32366 {
32367 casenum = 1;
32368 }
32369 else
32370 {
32371 casenum = 3;
32372 }
32373 break;
32374
32375 case 71:
32376 extract_constrain_insn_cached (insn);
32377 if ((! (q_regs_operand (operands[0], QImode))) || ((TARGET_MOVX) != (0)))
32378 {
32379 casenum = 0;
32380 }
32381 else if (get_attr_memory (insn) == MEMORY_NONE)
32382 {
32383 casenum = 1;
32384 }
32385 else
32386 {
32387 casenum = 3;
32388 }
32389 break;
32390
32391 case 70:
32392 case 66:
32393 case 65:
32394 if (get_attr_type (insn) == TYPE_IMOVX)
32395 {
32396 casenum = 0;
32397 }
32398 else if ((get_attr_type (insn) == TYPE_IMOV) && (get_attr_memory (insn) == MEMORY_NONE))
32399 {
32400 casenum = 1;
32401 }
32402 else
32403 {
32404 casenum = 3;
32405 }
32406 break;
32407
32408 case 59:
32409 extract_constrain_insn_cached (insn);
32410 if (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2)))))
32411 {
32412 casenum = 0;
32413 }
32414 else if ((((which_alternative == 3) && (((TARGET_PARTIAL_REG_STALL) == (0)) || ((TARGET_QIMODE_MATH) == (0)))) || (((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative != 3) && ((which_alternative != 5) && ((! ((TARGET_MOVX) != (0))) || (which_alternative != 2)))))) && (get_attr_memory (insn) == MEMORY_NONE))
32415 {
32416 casenum = 1;
32417 }
32418 else
32419 {
32420 casenum = 3;
32421 }
32422 break;
32423
32424 case 50:
32425 extract_constrain_insn_cached (insn);
32426 if ((((which_alternative != 0) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_HIMODE_MATH) == (0))))) && (((which_alternative != 1) && (which_alternative != 2)) || (! (aligned_operand (operands[1], HImode))))) && (((TARGET_MOVX) != (0)) && ((which_alternative == 0) || (which_alternative == 2))))
32427 {
32428 casenum = 0;
32429 }
32430 else if ((get_attr_type (insn) == TYPE_IMOV) && (get_attr_memory (insn) == MEMORY_NONE))
32431 {
32432 casenum = 1;
32433 }
32434 else
32435 {
32436 casenum = 3;
32437 }
32438 break;
32439
32440 case 86:
32441 case 74:
32442 case 73:
32443 case 72:
32444 case 61:
32445 case 60:
32446 case 55:
32447 case 54:
32448 case 53:
32449 case 47:
32450 if (get_attr_memory (insn) == MEMORY_NONE)
32451 {
32452 casenum = 1;
32453 }
32454 else
32455 {
32456 casenum = 3;
32457 }
32458 break;
32459
32460 case 44:
32461 extract_constrain_insn_cached (insn);
32462 if (((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (((flag_pic) != (0)) && (symbolic_operand (operands[1], SImode)))))))
32463 {
32464 casenum = 0;
32465 }
32466 else if ((((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && ((! ((flag_pic) != (0))) || (! (symbolic_operand (operands[1], SImode)))))))) && (get_attr_memory (insn) == MEMORY_NONE))
32467 {
32468 casenum = 1;
32469 }
32470 else
32471 {
32472 casenum = 3;
32473 }
32474 break;
32475
32476 case 638:
32477 case 636:
32478 case 547:
32479 case 546:
32480 case 500:
32481 case 499:
32482 case 498:
32483 case 497:
32484 case 496:
32485 case 495:
32486 case 494:
32487 case 493:
32488 case 492:
32489 case 491:
32490 case 490:
32491 case 489:
32492 case 488:
32493 case 487:
32494 case 486:
32495 case 485:
32496 case 484:
32497 case 483:
32498 case 482:
32499 case 481:
32500 case 480:
32501 case 479:
32502 case 478:
32503 case 477:
32504 case 476:
32505 case 475:
32506 case 474:
32507 case 473:
32508 case 472:
32509 case 471:
32510 case 470:
32511 case 469:
32512 case 468:
32513 case 467:
32514 case 466:
32515 case 465:
32516 case 464:
32517 case 463:
32518 case 462:
32519 case 461:
32520 case 460:
32521 case 459:
32522 case 458:
32523 case 457:
32524 case 454:
32525 case 453:
32526 case 452:
32527 case 451:
32528 case 450:
32529 case 449:
32530 case 448:
32531 case 447:
32532 case 446:
32533 case 445:
32534 case 444:
32535 case 443:
32536 case 442:
32537 case 441:
32538 case 440:
32539 case 439:
32540 case 438:
32541 case 437:
32542 case 436:
32543 case 435:
32544 case 434:
32545 case 433:
32546 case 432:
32547 case 431:
32548 case 430:
32549 case 427:
32550 case 426:
32551 case 425:
32552 case 424:
32553 case 423:
32554 case 412:
32555 case 407:
32556 case 406:
32557 case 405:
32558 case 404:
32559 case 403:
32560 case 402:
32561 case 401:
32562 case 400:
32563 case 399:
32564 case 398:
32565 case 359:
32566 case 358:
32567 case 357:
32568 case 356:
32569 case 355:
32570 case 354:
32571 case 353:
32572 case 352:
32573 case 351:
32574 case 350:
32575 case 348:
32576 case 347:
32577 case 346:
32578 case 345:
32579 case 344:
32580 case 343:
32581 case 342:
32582 case 341:
32583 case 340:
32584 case 339:
32585 case 338:
32586 case 337:
32587 case 336:
32588 case 335:
32589 case 334:
32590 case 333:
32591 case 332:
32592 case 331:
32593 case 330:
32594 case 329:
32595 case 328:
32596 case 327:
32597 case 326:
32598 case 325:
32599 case 324:
32600 case 323:
32601 case 322:
32602 case 321:
32603 case 320:
32604 case 319:
32605 case 318:
32606 case 317:
32607 case 316:
32608 case 315:
32609 case 314:
32610 case 313:
32611 case 312:
32612 case 311:
32613 case 310:
32614 case 309:
32615 case 308:
32616 case 307:
32617 case 306:
32618 case 305:
32619 case 304:
32620 case 303:
32621 case 302:
32622 case 301:
32623 case 300:
32624 case 299:
32625 case 298:
32626 case 297:
32627 case 296:
32628 case 295:
32629 case 294:
32630 case 293:
32631 case 292:
32632 case 291:
32633 case 290:
32634 case 289:
32635 case 288:
32636 case 287:
32637 case 286:
32638 case 283:
32639 case 282:
32640 case 281:
32641 case 280:
32642 case 279:
32643 case 278:
32644 case 277:
32645 case 276:
32646 case 244:
32647 case 243:
32648 case 242:
32649 case 241:
32650 case 240:
32651 case 239:
32652 case 238:
32653 case 237:
32654 case 236:
32655 case 235:
32656 case 234:
32657 case 233:
32658 case 232:
32659 case 231:
32660 case 230:
32661 case 229:
32662 case 228:
32663 case 227:
32664 case 226:
32665 case 224:
32666 case 223:
32667 case 222:
32668 case 221:
32669 case 220:
32670 case 219:
32671 case 218:
32672 case 217:
32673 case 216:
32674 case 214:
32675 case 213:
32676 case 212:
32677 case 211:
32678 case 210:
32679 case 208:
32680 case 207:
32681 case 206:
32682 case 205:
32683 case 204:
32684 case 203:
32685 case 200:
32686 case 199:
32687 case 198:
32688 case 197:
32689 case 195:
32690 case 194:
32691 case 193:
32692 case 192:
32693 case 191:
32694 case 190:
32695 case 189:
32696 case 188:
32697 case 187:
32698 case 186:
32699 case 185:
32700 case 184:
32701 case 183:
32702 case 182:
32703 case 181:
32704 case 180:
32705 case 126:
32706 case 125:
32707 case 124:
32708 case 123:
32709 case 122:
32710 case 121:
32711 case 120:
32712 case 119:
32713 case 117:
32714 case 116:
32715 case 113:
32716 case 112:
32717 case 111:
32718 case 110:
32719 case 109:
32720 case 108:
32721 case 107:
32722 case 106:
32723 case 81:
32724 case 80:
32725 case 69:
32726 case 64:
32727 case 63:
32728 case 62:
32729 case 56:
32730 case 43:
32731 case 42:
32732 case 17:
32733 case 16:
32734 case 15:
32735 case 14:
32736 case 13:
32737 case 12:
32738 case 11:
32739 case 10:
32740 case 9:
32741 case 8:
32742 case 7:
32743 case 6:
32744 case 5:
32745 case 4:
32746 case 3:
32747 case 2:
32748 case 1:
32749 case 0:
32750 casenum = 0;
32751 break;
32752
32753 case -1:
32754 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
32755 && asm_noperands (PATTERN (insn)) < 0)
32756 fatal_insn_not_found (insn);
32757 default:
32758 casenum = 3;
32759 break;
32760
32761 }
32762
32763 insn = candidate_insn;
32764 switch (casenum)
32765 {
32766 case 0:
32767 return 1;
32768
32769 case 1:
32770 return 1;
32771
32772 case 2:
32773 return 2;
32774
32775 case 3:
32776 return 17 ;
32777
32778 default:
32779 abort ();
32780 }
32781 }
32782
32783 static int k6_alux_unit_blockage PARAMS ((rtx, rtx));
32784 static int
32785 k6_alux_unit_blockage (executing_insn, candidate_insn)
32786 rtx executing_insn;
32787 rtx candidate_insn;
32788 {
32789 rtx insn;
32790 int casenum;
32791
32792 insn = executing_insn;
32793 switch (recog_memoized (insn))
32794 {
32795 case 432:
32796 case 431:
32797 case 423:
32798 extract_constrain_insn_cached (insn);
32799 if (which_alternative == 1)
32800 {
32801 casenum = 0;
32802 }
32803 else if (general_operand (operands[0], QImode))
32804 {
32805 casenum = 1;
32806 }
32807 else
32808 {
32809 casenum = 3;
32810 }
32811 break;
32812
32813 case 416:
32814 extract_constrain_insn_cached (insn);
32815 if ((! ((TARGET_DOUBLE_WITH_ADD) != (0))) || (! (const1_operand (operands[2], VOIDmode))))
32816 {
32817 casenum = 0;
32818 }
32819 else if (general_operand (operands[0], QImode))
32820 {
32821 casenum = 1;
32822 }
32823 else
32824 {
32825 casenum = 3;
32826 }
32827 break;
32828
32829 case 414:
32830 extract_constrain_insn_cached (insn);
32831 if ((which_alternative == 0) && ((! ((TARGET_DOUBLE_WITH_ADD) != (0))) || (! (const1_operand (operands[2], VOIDmode)))))
32832 {
32833 casenum = 0;
32834 }
32835 else if (((which_alternative == 0) && (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode)))) && (general_operand (operands[0], QImode)))
32836 {
32837 casenum = 1;
32838 }
32839 else
32840 {
32841 casenum = 3;
32842 }
32843 break;
32844
32845 case 605:
32846 case 498:
32847 case 497:
32848 case 496:
32849 case 495:
32850 case 494:
32851 case 493:
32852 case 492:
32853 case 491:
32854 case 490:
32855 case 489:
32856 case 488:
32857 case 487:
32858 case 486:
32859 case 485:
32860 case 484:
32861 case 483:
32862 case 482:
32863 case 481:
32864 case 480:
32865 case 479:
32866 case 478:
32867 case 477:
32868 case 476:
32869 case 475:
32870 case 474:
32871 case 473:
32872 case 472:
32873 case 471:
32874 case 470:
32875 case 469:
32876 case 468:
32877 case 467:
32878 case 466:
32879 case 465:
32880 case 464:
32881 case 463:
32882 case 462:
32883 case 461:
32884 case 460:
32885 case 459:
32886 case 458:
32887 case 457:
32888 case 454:
32889 case 453:
32890 case 452:
32891 case 451:
32892 case 450:
32893 case 449:
32894 case 448:
32895 case 447:
32896 case 446:
32897 case 445:
32898 case 444:
32899 case 443:
32900 case 442:
32901 case 441:
32902 case 440:
32903 case 439:
32904 case 438:
32905 case 437:
32906 case 436:
32907 case 435:
32908 case 434:
32909 case 433:
32910 case 430:
32911 case 427:
32912 case 426:
32913 case 425:
32914 case 424:
32915 case 412:
32916 casenum = 0;
32917 break;
32918
32919 case 422:
32920 case 421:
32921 case 420:
32922 case 419:
32923 case 418:
32924 case 417:
32925 case 415:
32926 case 413:
32927 case 409:
32928 case 408:
32929 extract_insn_cached (insn);
32930 if (get_attr_type (insn) == TYPE_ISHIFT)
32931 {
32932 casenum = 0;
32933 }
32934 else if (get_attr_type (insn) == TYPE_ALU)
32935 {
32936 casenum = 1;
32937 }
32938 else
32939 {
32940 casenum = 3;
32941 }
32942 break;
32943
32944 case 261:
32945 case 260:
32946 case 259:
32947 case 258:
32948 case 257:
32949 case 256:
32950 case 255:
32951 case 254:
32952 case 253:
32953 case 252:
32954 case 251:
32955 case 250:
32956 case 249:
32957 case 248:
32958 case 247:
32959 case 246:
32960 case 245:
32961 casenum = 2;
32962 break;
32963
32964 case 217:
32965 extract_insn_cached (insn);
32966 if (! (incdec_operand (operands[2], QImode)))
32967 {
32968 casenum = 0;
32969 }
32970 else if (general_operand (operands[0], QImode))
32971 {
32972 casenum = 1;
32973 }
32974 else
32975 {
32976 casenum = 3;
32977 }
32978 break;
32979
32980 case 215:
32981 extract_constrain_insn_cached (insn);
32982 if ((which_alternative != 3) && (general_operand (operands[0], QImode)))
32983 {
32984 casenum = 1;
32985 }
32986 else
32987 {
32988 casenum = 3;
32989 }
32990 break;
32991
32992 case 209:
32993 extract_constrain_insn_cached (insn);
32994 if ((which_alternative != 2) && (general_operand (operands[0], QImode)))
32995 {
32996 casenum = 1;
32997 }
32998 else
32999 {
33000 casenum = 3;
33001 }
33002 break;
33003
33004 case 202:
33005 case 201:
33006 case 196:
33007 extract_insn_cached (insn);
33008 if (((get_attr_type (insn) == TYPE_ALU) || (get_attr_type (insn) == TYPE_INCDEC)) && (general_operand (operands[0], QImode)))
33009 {
33010 casenum = 1;
33011 }
33012 else
33013 {
33014 casenum = 3;
33015 }
33016 break;
33017
33018 case 659:
33019 case 658:
33020 case 115:
33021 extract_constrain_insn_cached (insn);
33022 if ((which_alternative == 0) && (general_operand (operands[0], QImode)))
33023 {
33024 casenum = 1;
33025 }
33026 else
33027 {
33028 casenum = 3;
33029 }
33030 break;
33031
33032 case 112:
33033 case 109:
33034 extract_constrain_insn_cached (insn);
33035 if (which_alternative == 1)
33036 {
33037 casenum = 0;
33038 }
33039 else if (general_operand (operands[0], QImode))
33040 {
33041 casenum = 1;
33042 }
33043 else
33044 {
33045 casenum = 3;
33046 }
33047 break;
33048
33049 case 71:
33050 extract_constrain_insn_cached (insn);
33051 if (((! (q_regs_operand (operands[0], QImode))) || ((TARGET_MOVX) != (0))) && (general_operand (operands[0], QImode)))
33052 {
33053 casenum = 1;
33054 }
33055 else
33056 {
33057 casenum = 3;
33058 }
33059 break;
33060
33061 case 70:
33062 case 66:
33063 case 65:
33064 extract_insn_cached (insn);
33065 if ((get_attr_type (insn) == TYPE_IMOVX) && (general_operand (operands[0], QImode)))
33066 {
33067 casenum = 1;
33068 }
33069 else
33070 {
33071 casenum = 3;
33072 }
33073 break;
33074
33075 case 59:
33076 extract_constrain_insn_cached (insn);
33077 if ((((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2))))) && (general_operand (operands[0], QImode)))
33078 {
33079 casenum = 1;
33080 }
33081 else
33082 {
33083 casenum = 3;
33084 }
33085 break;
33086
33087 case 50:
33088 extract_constrain_insn_cached (insn);
33089 if (((((which_alternative != 0) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_HIMODE_MATH) == (0))))) && (((which_alternative != 1) && (which_alternative != 2)) || (! (aligned_operand (operands[1], HImode))))) && (((TARGET_MOVX) != (0)) && ((which_alternative == 0) || (which_alternative == 2)))) && (general_operand (operands[0], QImode)))
33090 {
33091 casenum = 1;
33092 }
33093 else
33094 {
33095 casenum = 3;
33096 }
33097 break;
33098
33099 case 407:
33100 case 406:
33101 case 405:
33102 case 404:
33103 case 403:
33104 case 402:
33105 case 401:
33106 case 400:
33107 case 399:
33108 case 398:
33109 case 359:
33110 case 358:
33111 case 357:
33112 case 356:
33113 case 355:
33114 case 354:
33115 case 353:
33116 case 352:
33117 case 351:
33118 case 350:
33119 case 345:
33120 case 339:
33121 case 319:
33122 case 317:
33123 case 297:
33124 case 295:
33125 case 242:
33126 case 111:
33127 case 108:
33128 case 106:
33129 case 81:
33130 case 80:
33131 case 62:
33132 case 56:
33133 case 43:
33134 case 42:
33135 extract_insn_cached (insn);
33136 casenum = 0;
33137 break;
33138
33139 case 638:
33140 case 636:
33141 case 547:
33142 case 546:
33143 case 348:
33144 case 347:
33145 case 346:
33146 case 344:
33147 case 343:
33148 case 342:
33149 case 341:
33150 case 340:
33151 case 338:
33152 case 337:
33153 case 336:
33154 case 335:
33155 case 334:
33156 case 333:
33157 case 332:
33158 case 331:
33159 case 330:
33160 case 329:
33161 case 328:
33162 case 327:
33163 case 326:
33164 case 325:
33165 case 324:
33166 case 323:
33167 case 322:
33168 case 321:
33169 case 320:
33170 case 318:
33171 case 316:
33172 case 315:
33173 case 314:
33174 case 313:
33175 case 312:
33176 case 311:
33177 case 310:
33178 case 309:
33179 case 308:
33180 case 307:
33181 case 306:
33182 case 305:
33183 case 304:
33184 case 303:
33185 case 302:
33186 case 301:
33187 case 300:
33188 case 299:
33189 case 298:
33190 case 296:
33191 case 294:
33192 case 293:
33193 case 292:
33194 case 291:
33195 case 290:
33196 case 289:
33197 case 288:
33198 case 287:
33199 case 286:
33200 case 283:
33201 case 282:
33202 case 281:
33203 case 280:
33204 case 279:
33205 case 278:
33206 case 277:
33207 case 276:
33208 case 244:
33209 case 243:
33210 case 241:
33211 case 240:
33212 case 239:
33213 case 238:
33214 case 237:
33215 case 236:
33216 case 235:
33217 case 234:
33218 case 233:
33219 case 232:
33220 case 231:
33221 case 230:
33222 case 229:
33223 case 228:
33224 case 227:
33225 case 226:
33226 case 224:
33227 case 223:
33228 case 222:
33229 case 221:
33230 case 220:
33231 case 219:
33232 case 218:
33233 case 216:
33234 case 214:
33235 case 213:
33236 case 212:
33237 case 211:
33238 case 210:
33239 case 208:
33240 case 207:
33241 case 206:
33242 case 205:
33243 case 204:
33244 case 203:
33245 case 200:
33246 case 199:
33247 case 198:
33248 case 197:
33249 case 185:
33250 case 184:
33251 case 183:
33252 case 182:
33253 case 181:
33254 case 180:
33255 case 126:
33256 case 125:
33257 case 124:
33258 case 123:
33259 case 122:
33260 case 121:
33261 case 120:
33262 case 119:
33263 case 117:
33264 case 116:
33265 case 113:
33266 case 110:
33267 case 107:
33268 case 69:
33269 case 64:
33270 case 63:
33271 case 17:
33272 case 16:
33273 case 15:
33274 case 14:
33275 case 13:
33276 case 12:
33277 case 11:
33278 case 10:
33279 case 9:
33280 case 8:
33281 case 7:
33282 case 6:
33283 case 5:
33284 case 4:
33285 case 3:
33286 case 2:
33287 case 1:
33288 case 0:
33289 extract_insn_cached (insn);
33290 if (general_operand (operands[0], QImode))
33291 {
33292 casenum = 1;
33293 }
33294 else
33295 {
33296 casenum = 3;
33297 }
33298 break;
33299
33300 case -1:
33301 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
33302 && asm_noperands (PATTERN (insn)) < 0)
33303 fatal_insn_not_found (insn);
33304 default:
33305 casenum = 3;
33306 break;
33307
33308 }
33309
33310 insn = candidate_insn;
33311 switch (casenum)
33312 {
33313 case 0:
33314 return 1;
33315
33316 case 1:
33317 return 1;
33318
33319 case 2:
33320 return 2;
33321
33322 case 3:
33323 return 17 ;
33324
33325 default:
33326 abort ();
33327 }
33328 }
33329
33330 static int k6_alux_unit_conflict_cost PARAMS ((rtx, rtx));
33331 static int
33332 k6_alux_unit_conflict_cost (executing_insn, candidate_insn)
33333 rtx executing_insn;
33334 rtx candidate_insn;
33335 {
33336 rtx insn;
33337 int casenum;
33338
33339 insn = executing_insn;
33340 switch (recog_memoized (insn))
33341 {
33342 case 432:
33343 case 431:
33344 case 423:
33345 extract_constrain_insn_cached (insn);
33346 if (which_alternative == 1)
33347 {
33348 casenum = 0;
33349 }
33350 else if (general_operand (operands[0], QImode))
33351 {
33352 casenum = 1;
33353 }
33354 else
33355 {
33356 casenum = 3;
33357 }
33358 break;
33359
33360 case 416:
33361 extract_constrain_insn_cached (insn);
33362 if ((! ((TARGET_DOUBLE_WITH_ADD) != (0))) || (! (const1_operand (operands[2], VOIDmode))))
33363 {
33364 casenum = 0;
33365 }
33366 else if (general_operand (operands[0], QImode))
33367 {
33368 casenum = 1;
33369 }
33370 else
33371 {
33372 casenum = 3;
33373 }
33374 break;
33375
33376 case 414:
33377 extract_constrain_insn_cached (insn);
33378 if ((which_alternative == 0) && ((! ((TARGET_DOUBLE_WITH_ADD) != (0))) || (! (const1_operand (operands[2], VOIDmode)))))
33379 {
33380 casenum = 0;
33381 }
33382 else if (((which_alternative == 0) && (((TARGET_DOUBLE_WITH_ADD) != (0)) && (const1_operand (operands[2], VOIDmode)))) && (general_operand (operands[0], QImode)))
33383 {
33384 casenum = 1;
33385 }
33386 else
33387 {
33388 casenum = 3;
33389 }
33390 break;
33391
33392 case 605:
33393 case 498:
33394 case 497:
33395 case 496:
33396 case 495:
33397 case 494:
33398 case 493:
33399 case 492:
33400 case 491:
33401 case 490:
33402 case 489:
33403 case 488:
33404 case 487:
33405 case 486:
33406 case 485:
33407 case 484:
33408 case 483:
33409 case 482:
33410 case 481:
33411 case 480:
33412 case 479:
33413 case 478:
33414 case 477:
33415 case 476:
33416 case 475:
33417 case 474:
33418 case 473:
33419 case 472:
33420 case 471:
33421 case 470:
33422 case 469:
33423 case 468:
33424 case 467:
33425 case 466:
33426 case 465:
33427 case 464:
33428 case 463:
33429 case 462:
33430 case 461:
33431 case 460:
33432 case 459:
33433 case 458:
33434 case 457:
33435 case 454:
33436 case 453:
33437 case 452:
33438 case 451:
33439 case 450:
33440 case 449:
33441 case 448:
33442 case 447:
33443 case 446:
33444 case 445:
33445 case 444:
33446 case 443:
33447 case 442:
33448 case 441:
33449 case 440:
33450 case 439:
33451 case 438:
33452 case 437:
33453 case 436:
33454 case 435:
33455 case 434:
33456 case 433:
33457 case 430:
33458 case 427:
33459 case 426:
33460 case 425:
33461 case 424:
33462 case 412:
33463 casenum = 0;
33464 break;
33465
33466 case 422:
33467 case 421:
33468 case 420:
33469 case 419:
33470 case 418:
33471 case 417:
33472 case 415:
33473 case 413:
33474 case 409:
33475 case 408:
33476 extract_insn_cached (insn);
33477 if (get_attr_type (insn) == TYPE_ISHIFT)
33478 {
33479 casenum = 0;
33480 }
33481 else if (get_attr_type (insn) == TYPE_ALU)
33482 {
33483 casenum = 1;
33484 }
33485 else
33486 {
33487 casenum = 3;
33488 }
33489 break;
33490
33491 case 261:
33492 case 260:
33493 case 259:
33494 case 258:
33495 case 257:
33496 case 256:
33497 case 255:
33498 case 254:
33499 case 253:
33500 case 252:
33501 case 251:
33502 case 250:
33503 case 249:
33504 case 248:
33505 case 247:
33506 case 246:
33507 case 245:
33508 casenum = 2;
33509 break;
33510
33511 case 217:
33512 extract_insn_cached (insn);
33513 if (! (incdec_operand (operands[2], QImode)))
33514 {
33515 casenum = 0;
33516 }
33517 else if (general_operand (operands[0], QImode))
33518 {
33519 casenum = 1;
33520 }
33521 else
33522 {
33523 casenum = 3;
33524 }
33525 break;
33526
33527 case 215:
33528 extract_constrain_insn_cached (insn);
33529 if ((which_alternative != 3) && (general_operand (operands[0], QImode)))
33530 {
33531 casenum = 1;
33532 }
33533 else
33534 {
33535 casenum = 3;
33536 }
33537 break;
33538
33539 case 209:
33540 extract_constrain_insn_cached (insn);
33541 if ((which_alternative != 2) && (general_operand (operands[0], QImode)))
33542 {
33543 casenum = 1;
33544 }
33545 else
33546 {
33547 casenum = 3;
33548 }
33549 break;
33550
33551 case 202:
33552 case 201:
33553 case 196:
33554 extract_insn_cached (insn);
33555 if (((get_attr_type (insn) == TYPE_ALU) || (get_attr_type (insn) == TYPE_INCDEC)) && (general_operand (operands[0], QImode)))
33556 {
33557 casenum = 1;
33558 }
33559 else
33560 {
33561 casenum = 3;
33562 }
33563 break;
33564
33565 case 659:
33566 case 658:
33567 case 115:
33568 extract_constrain_insn_cached (insn);
33569 if ((which_alternative == 0) && (general_operand (operands[0], QImode)))
33570 {
33571 casenum = 1;
33572 }
33573 else
33574 {
33575 casenum = 3;
33576 }
33577 break;
33578
33579 case 112:
33580 case 109:
33581 extract_constrain_insn_cached (insn);
33582 if (which_alternative == 1)
33583 {
33584 casenum = 0;
33585 }
33586 else if (general_operand (operands[0], QImode))
33587 {
33588 casenum = 1;
33589 }
33590 else
33591 {
33592 casenum = 3;
33593 }
33594 break;
33595
33596 case 71:
33597 extract_constrain_insn_cached (insn);
33598 if (((! (q_regs_operand (operands[0], QImode))) || ((TARGET_MOVX) != (0))) && (general_operand (operands[0], QImode)))
33599 {
33600 casenum = 1;
33601 }
33602 else
33603 {
33604 casenum = 3;
33605 }
33606 break;
33607
33608 case 70:
33609 case 66:
33610 case 65:
33611 extract_insn_cached (insn);
33612 if ((get_attr_type (insn) == TYPE_IMOVX) && (general_operand (operands[0], QImode)))
33613 {
33614 casenum = 1;
33615 }
33616 else
33617 {
33618 casenum = 3;
33619 }
33620 break;
33621
33622 case 59:
33623 extract_constrain_insn_cached (insn);
33624 if ((((which_alternative != 3) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_QIMODE_MATH) == (0))))) && ((which_alternative == 3) || ((which_alternative == 5) || (((TARGET_MOVX) != (0)) && (which_alternative == 2))))) && (general_operand (operands[0], QImode)))
33625 {
33626 casenum = 1;
33627 }
33628 else
33629 {
33630 casenum = 3;
33631 }
33632 break;
33633
33634 case 50:
33635 extract_constrain_insn_cached (insn);
33636 if (((((which_alternative != 0) || ((! ((TARGET_PARTIAL_REG_STALL) == (0))) && (! ((TARGET_HIMODE_MATH) == (0))))) && (((which_alternative != 1) && (which_alternative != 2)) || (! (aligned_operand (operands[1], HImode))))) && (((TARGET_MOVX) != (0)) && ((which_alternative == 0) || (which_alternative == 2)))) && (general_operand (operands[0], QImode)))
33637 {
33638 casenum = 1;
33639 }
33640 else
33641 {
33642 casenum = 3;
33643 }
33644 break;
33645
33646 case 407:
33647 case 406:
33648 case 405:
33649 case 404:
33650 case 403:
33651 case 402:
33652 case 401:
33653 case 400:
33654 case 399:
33655 case 398:
33656 case 359:
33657 case 358:
33658 case 357:
33659 case 356:
33660 case 355:
33661 case 354:
33662 case 353:
33663 case 352:
33664 case 351:
33665 case 350:
33666 case 345:
33667 case 339:
33668 case 319:
33669 case 317:
33670 case 297:
33671 case 295:
33672 case 242:
33673 case 111:
33674 case 108:
33675 case 106:
33676 case 81:
33677 case 80:
33678 case 62:
33679 case 56:
33680 case 43:
33681 case 42:
33682 extract_insn_cached (insn);
33683 casenum = 0;
33684 break;
33685
33686 case 638:
33687 case 636:
33688 case 547:
33689 case 546:
33690 case 348:
33691 case 347:
33692 case 346:
33693 case 344:
33694 case 343:
33695 case 342:
33696 case 341:
33697 case 340:
33698 case 338:
33699 case 337:
33700 case 336:
33701 case 335:
33702 case 334:
33703 case 333:
33704 case 332:
33705 case 331:
33706 case 330:
33707 case 329:
33708 case 328:
33709 case 327:
33710 case 326:
33711 case 325:
33712 case 324:
33713 case 323:
33714 case 322:
33715 case 321:
33716 case 320:
33717 case 318:
33718 case 316:
33719 case 315:
33720 case 314:
33721 case 313:
33722 case 312:
33723 case 311:
33724 case 310:
33725 case 309:
33726 case 308:
33727 case 307:
33728 case 306:
33729 case 305:
33730 case 304:
33731 case 303:
33732 case 302:
33733 case 301:
33734 case 300:
33735 case 299:
33736 case 298:
33737 case 296:
33738 case 294:
33739 case 293:
33740 case 292:
33741 case 291:
33742 case 290:
33743 case 289:
33744 case 288:
33745 case 287:
33746 case 286:
33747 case 283:
33748 case 282:
33749 case 281:
33750 case 280:
33751 case 279:
33752 case 278:
33753 case 277:
33754 case 276:
33755 case 244:
33756 case 243:
33757 case 241:
33758 case 240:
33759 case 239:
33760 case 238:
33761 case 237:
33762 case 236:
33763 case 235:
33764 case 234:
33765 case 233:
33766 case 232:
33767 case 231:
33768 case 230:
33769 case 229:
33770 case 228:
33771 case 227:
33772 case 226:
33773 case 224:
33774 case 223:
33775 case 222:
33776 case 221:
33777 case 220:
33778 case 219:
33779 case 218:
33780 case 216:
33781 case 214:
33782 case 213:
33783 case 212:
33784 case 211:
33785 case 210:
33786 case 208:
33787 case 207:
33788 case 206:
33789 case 205:
33790 case 204:
33791 case 203:
33792 case 200:
33793 case 199:
33794 case 198:
33795 case 197:
33796 case 185:
33797 case 184:
33798 case 183:
33799 case 182:
33800 case 181:
33801 case 180:
33802 case 126:
33803 case 125:
33804 case 124:
33805 case 123:
33806 case 122:
33807 case 121:
33808 case 120:
33809 case 119:
33810 case 117:
33811 case 116:
33812 case 113:
33813 case 110:
33814 case 107:
33815 case 69:
33816 case 64:
33817 case 63:
33818 case 17:
33819 case 16:
33820 case 15:
33821 case 14:
33822 case 13:
33823 case 12:
33824 case 11:
33825 case 10:
33826 case 9:
33827 case 8:
33828 case 7:
33829 case 6:
33830 case 5:
33831 case 4:
33832 case 3:
33833 case 2:
33834 case 1:
33835 case 0:
33836 extract_insn_cached (insn);
33837 if (general_operand (operands[0], QImode))
33838 {
33839 casenum = 1;
33840 }
33841 else
33842 {
33843 casenum = 3;
33844 }
33845 break;
33846
33847 case -1:
33848 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
33849 && asm_noperands (PATTERN (insn)) < 0)
33850 fatal_insn_not_found (insn);
33851 default:
33852 casenum = 3;
33853 break;
33854
33855 }
33856
33857 insn = candidate_insn;
33858 switch (casenum)
33859 {
33860 case 0:
33861 return 1;
33862
33863 case 1:
33864 return 1;
33865
33866 case 2:
33867 return 2;
33868
33869 case 3:
33870 return 17 ;
33871
33872 default:
33873 abort ();
33874 }
33875 }
33876
33877 static int fpu_unit_blockage PARAMS ((rtx, rtx));
33878 static int
33879 fpu_unit_blockage (executing_insn, candidate_insn)
33880 rtx executing_insn;
33881 rtx candidate_insn;
33882 {
33883 rtx insn;
33884 int casenum;
33885
33886 insn = executing_insn;
33887 switch (recog_memoized (insn))
33888 {
33889 case 604:
33890 case 603:
33891 case 602:
33892 case 601:
33893 case 600:
33894 case 599:
33895 case 598:
33896 case 597:
33897 case 596:
33898 case 595:
33899 case 594:
33900 case 593:
33901 case 592:
33902 case 591:
33903 case 590:
33904 case 589:
33905 case 588:
33906 case 587:
33907 case 584:
33908 casenum = 2;
33909 break;
33910
33911 case 585:
33912 case 582:
33913 extract_constrain_insn_cached (insn);
33914 if (which_alternative == 0)
33915 {
33916 casenum = 2;
33917 }
33918 else
33919 {
33920 casenum = 3;
33921 }
33922 break;
33923
33924 case 581:
33925 case 579:
33926 case 577:
33927 case 575:
33928 case 573:
33929 case 571:
33930 case 569:
33931 extract_insn_cached (insn);
33932 if (get_attr_type (insn) == TYPE_FOP)
33933 {
33934 casenum = 0;
33935 }
33936 else if (mult_operator (operands[3], TFmode))
33937 {
33938 casenum = 1;
33939 }
33940 else if (get_attr_type (insn) == TYPE_FDIV)
33941 {
33942 casenum = 2;
33943 }
33944 else
33945 {
33946 casenum = 3;
33947 }
33948 break;
33949
33950 case 580:
33951 case 578:
33952 case 576:
33953 case 574:
33954 case 572:
33955 case 570:
33956 case 568:
33957 extract_insn_cached (insn);
33958 if (get_attr_type (insn) == TYPE_FOP)
33959 {
33960 casenum = 0;
33961 }
33962 else if (mult_operator (operands[3], XFmode))
33963 {
33964 casenum = 1;
33965 }
33966 else if (get_attr_type (insn) == TYPE_FDIV)
33967 {
33968 casenum = 2;
33969 }
33970 else
33971 {
33972 casenum = 3;
33973 }
33974 break;
33975
33976 case 562:
33977 extract_constrain_insn_cached (insn);
33978 if (get_attr_type (insn) == TYPE_FOP)
33979 {
33980 casenum = 0;
33981 }
33982 else if ((which_alternative != 2) && (mult_operator (operands[3], DFmode)))
33983 {
33984 casenum = 1;
33985 }
33986 else if (get_attr_type (insn) == TYPE_FDIV)
33987 {
33988 casenum = 2;
33989 }
33990 else
33991 {
33992 casenum = 3;
33993 }
33994 break;
33995
33996 case 567:
33997 case 566:
33998 case 565:
33999 case 564:
34000 case 561:
34001 extract_insn_cached (insn);
34002 if (get_attr_type (insn) == TYPE_FOP)
34003 {
34004 casenum = 0;
34005 }
34006 else if (mult_operator (operands[3], DFmode))
34007 {
34008 casenum = 1;
34009 }
34010 else if (get_attr_type (insn) == TYPE_FDIV)
34011 {
34012 casenum = 2;
34013 }
34014 else
34015 {
34016 casenum = 3;
34017 }
34018 break;
34019
34020 case 557:
34021 extract_constrain_insn_cached (insn);
34022 if (get_attr_type (insn) == TYPE_FOP)
34023 {
34024 casenum = 0;
34025 }
34026 else if ((which_alternative != 2) && (mult_operator (operands[3], SFmode)))
34027 {
34028 casenum = 1;
34029 }
34030 else if (get_attr_type (insn) == TYPE_FDIV)
34031 {
34032 casenum = 2;
34033 }
34034 else
34035 {
34036 casenum = 3;
34037 }
34038 break;
34039
34040 case 560:
34041 case 559:
34042 case 556:
34043 extract_insn_cached (insn);
34044 if (get_attr_type (insn) == TYPE_FOP)
34045 {
34046 casenum = 0;
34047 }
34048 else if (mult_operator (operands[3], SFmode))
34049 {
34050 casenum = 1;
34051 }
34052 else if (get_attr_type (insn) == TYPE_FDIV)
34053 {
34054 casenum = 2;
34055 }
34056 else
34057 {
34058 casenum = 3;
34059 }
34060 break;
34061
34062 case 555:
34063 extract_insn_cached (insn);
34064 if (! (mult_operator (operands[3], TFmode)))
34065 {
34066 casenum = 0;
34067 }
34068 else
34069 {
34070 casenum = 1;
34071 }
34072 break;
34073
34074 case 554:
34075 extract_insn_cached (insn);
34076 if (! (mult_operator (operands[3], XFmode)))
34077 {
34078 casenum = 0;
34079 }
34080 else
34081 {
34082 casenum = 1;
34083 }
34084 break;
34085
34086 case 552:
34087 case 549:
34088 extract_constrain_insn_cached (insn);
34089 if ((which_alternative == 0) && (! (mult_operator (operands[3], SFmode))))
34090 {
34091 casenum = 0;
34092 }
34093 else if ((which_alternative == 0) && (mult_operator (operands[3], SFmode)))
34094 {
34095 casenum = 1;
34096 }
34097 else
34098 {
34099 casenum = 3;
34100 }
34101 break;
34102
34103 case 551:
34104 case 548:
34105 extract_insn_cached (insn);
34106 if (! (mult_operator (operands[3], SFmode)))
34107 {
34108 casenum = 0;
34109 }
34110 else
34111 {
34112 casenum = 1;
34113 }
34114 break;
34115
34116 case 135:
34117 extract_constrain_insn_cached (insn);
34118 if (which_alternative == 1)
34119 {
34120 casenum = 0;
34121 }
34122 else
34123 {
34124 casenum = 3;
34125 }
34126 break;
34127
34128 case 643:
34129 case 642:
34130 case 641:
34131 case 127:
34132 extract_constrain_insn_cached (insn);
34133 if ((which_alternative == 0) || (which_alternative == 1))
34134 {
34135 casenum = 0;
34136 }
34137 else
34138 {
34139 casenum = 3;
34140 }
34141 break;
34142
34143 case 103:
34144 case 102:
34145 case 101:
34146 case 100:
34147 case 94:
34148 case 93:
34149 case 89:
34150 extract_constrain_insn_cached (insn);
34151 if ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))
34152 {
34153 casenum = 0;
34154 }
34155 else
34156 {
34157 casenum = 3;
34158 }
34159 break;
34160
34161 case 178:
34162 case 177:
34163 case 176:
34164 case 175:
34165 case 174:
34166 case 173:
34167 case 171:
34168 case 170:
34169 case 168:
34170 case 167:
34171 case 165:
34172 case 164:
34173 case 162:
34174 case 161:
34175 case 144:
34176 case 142:
34177 case 140:
34178 case 138:
34179 case 134:
34180 case 133:
34181 case 35:
34182 case 32:
34183 extract_constrain_insn_cached (insn);
34184 if (which_alternative == 0)
34185 {
34186 casenum = 0;
34187 }
34188 else
34189 {
34190 casenum = 3;
34191 }
34192 break;
34193
34194 case 645:
34195 case 644:
34196 case 397:
34197 case 396:
34198 case 395:
34199 case 394:
34200 case 393:
34201 case 392:
34202 case 391:
34203 case 390:
34204 case 389:
34205 case 378:
34206 case 377:
34207 case 376:
34208 case 375:
34209 case 374:
34210 case 373:
34211 case 372:
34212 case 371:
34213 case 370:
34214 case 158:
34215 case 157:
34216 case 156:
34217 case 153:
34218 case 152:
34219 case 151:
34220 case 148:
34221 case 147:
34222 case 146:
34223 case 145:
34224 case 143:
34225 case 141:
34226 case 139:
34227 case 136:
34228 case 132:
34229 case 131:
34230 case 130:
34231 case 129:
34232 case 34:
34233 case 31:
34234 case 27:
34235 case 24:
34236 case 23:
34237 case 21:
34238 case 20:
34239 case 19:
34240 casenum = 0;
34241 break;
34242
34243 case -1:
34244 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
34245 && asm_noperands (PATTERN (insn)) < 0)
34246 fatal_insn_not_found (insn);
34247 default:
34248 casenum = 3;
34249 break;
34250
34251 }
34252
34253 insn = candidate_insn;
34254 switch (casenum)
34255 {
34256 case 0:
34257 return 1;
34258
34259 case 1:
34260 return 2;
34261
34262 case 2:
34263 return 56 ;
34264
34265 case 3:
34266 return 1;
34267
34268 default:
34269 abort ();
34270 }
34271 }
34272
34273 static int fpu_unit_conflict_cost PARAMS ((rtx, rtx));
34274 static int
34275 fpu_unit_conflict_cost (executing_insn, candidate_insn)
34276 rtx executing_insn;
34277 rtx candidate_insn;
34278 {
34279 rtx insn;
34280 int casenum;
34281
34282 insn = executing_insn;
34283 switch (recog_memoized (insn))
34284 {
34285 case 604:
34286 case 603:
34287 case 602:
34288 case 601:
34289 case 600:
34290 case 599:
34291 case 598:
34292 case 597:
34293 case 596:
34294 case 595:
34295 case 594:
34296 case 593:
34297 case 592:
34298 case 591:
34299 case 590:
34300 case 589:
34301 case 588:
34302 case 587:
34303 case 584:
34304 casenum = 2;
34305 break;
34306
34307 case 585:
34308 case 582:
34309 extract_constrain_insn_cached (insn);
34310 if (which_alternative == 0)
34311 {
34312 casenum = 2;
34313 }
34314 else
34315 {
34316 casenum = 3;
34317 }
34318 break;
34319
34320 case 581:
34321 case 579:
34322 case 577:
34323 case 575:
34324 case 573:
34325 case 571:
34326 case 569:
34327 extract_insn_cached (insn);
34328 if (get_attr_type (insn) == TYPE_FOP)
34329 {
34330 casenum = 0;
34331 }
34332 else if (mult_operator (operands[3], TFmode))
34333 {
34334 casenum = 1;
34335 }
34336 else if (get_attr_type (insn) == TYPE_FDIV)
34337 {
34338 casenum = 2;
34339 }
34340 else
34341 {
34342 casenum = 3;
34343 }
34344 break;
34345
34346 case 580:
34347 case 578:
34348 case 576:
34349 case 574:
34350 case 572:
34351 case 570:
34352 case 568:
34353 extract_insn_cached (insn);
34354 if (get_attr_type (insn) == TYPE_FOP)
34355 {
34356 casenum = 0;
34357 }
34358 else if (mult_operator (operands[3], XFmode))
34359 {
34360 casenum = 1;
34361 }
34362 else if (get_attr_type (insn) == TYPE_FDIV)
34363 {
34364 casenum = 2;
34365 }
34366 else
34367 {
34368 casenum = 3;
34369 }
34370 break;
34371
34372 case 562:
34373 extract_constrain_insn_cached (insn);
34374 if (get_attr_type (insn) == TYPE_FOP)
34375 {
34376 casenum = 0;
34377 }
34378 else if ((which_alternative != 2) && (mult_operator (operands[3], DFmode)))
34379 {
34380 casenum = 1;
34381 }
34382 else if (get_attr_type (insn) == TYPE_FDIV)
34383 {
34384 casenum = 2;
34385 }
34386 else
34387 {
34388 casenum = 3;
34389 }
34390 break;
34391
34392 case 567:
34393 case 566:
34394 case 565:
34395 case 564:
34396 case 561:
34397 extract_insn_cached (insn);
34398 if (get_attr_type (insn) == TYPE_FOP)
34399 {
34400 casenum = 0;
34401 }
34402 else if (mult_operator (operands[3], DFmode))
34403 {
34404 casenum = 1;
34405 }
34406 else if (get_attr_type (insn) == TYPE_FDIV)
34407 {
34408 casenum = 2;
34409 }
34410 else
34411 {
34412 casenum = 3;
34413 }
34414 break;
34415
34416 case 557:
34417 extract_constrain_insn_cached (insn);
34418 if (get_attr_type (insn) == TYPE_FOP)
34419 {
34420 casenum = 0;
34421 }
34422 else if ((which_alternative != 2) && (mult_operator (operands[3], SFmode)))
34423 {
34424 casenum = 1;
34425 }
34426 else if (get_attr_type (insn) == TYPE_FDIV)
34427 {
34428 casenum = 2;
34429 }
34430 else
34431 {
34432 casenum = 3;
34433 }
34434 break;
34435
34436 case 560:
34437 case 559:
34438 case 556:
34439 extract_insn_cached (insn);
34440 if (get_attr_type (insn) == TYPE_FOP)
34441 {
34442 casenum = 0;
34443 }
34444 else if (mult_operator (operands[3], SFmode))
34445 {
34446 casenum = 1;
34447 }
34448 else if (get_attr_type (insn) == TYPE_FDIV)
34449 {
34450 casenum = 2;
34451 }
34452 else
34453 {
34454 casenum = 3;
34455 }
34456 break;
34457
34458 case 555:
34459 extract_insn_cached (insn);
34460 if (! (mult_operator (operands[3], TFmode)))
34461 {
34462 casenum = 0;
34463 }
34464 else
34465 {
34466 casenum = 1;
34467 }
34468 break;
34469
34470 case 554:
34471 extract_insn_cached (insn);
34472 if (! (mult_operator (operands[3], XFmode)))
34473 {
34474 casenum = 0;
34475 }
34476 else
34477 {
34478 casenum = 1;
34479 }
34480 break;
34481
34482 case 552:
34483 case 549:
34484 extract_constrain_insn_cached (insn);
34485 if ((which_alternative == 0) && (! (mult_operator (operands[3], SFmode))))
34486 {
34487 casenum = 0;
34488 }
34489 else if ((which_alternative == 0) && (mult_operator (operands[3], SFmode)))
34490 {
34491 casenum = 1;
34492 }
34493 else
34494 {
34495 casenum = 3;
34496 }
34497 break;
34498
34499 case 551:
34500 case 548:
34501 extract_insn_cached (insn);
34502 if (! (mult_operator (operands[3], SFmode)))
34503 {
34504 casenum = 0;
34505 }
34506 else
34507 {
34508 casenum = 1;
34509 }
34510 break;
34511
34512 case 135:
34513 extract_constrain_insn_cached (insn);
34514 if (which_alternative == 1)
34515 {
34516 casenum = 0;
34517 }
34518 else
34519 {
34520 casenum = 3;
34521 }
34522 break;
34523
34524 case 643:
34525 case 642:
34526 case 641:
34527 case 127:
34528 extract_constrain_insn_cached (insn);
34529 if ((which_alternative == 0) || (which_alternative == 1))
34530 {
34531 casenum = 0;
34532 }
34533 else
34534 {
34535 casenum = 3;
34536 }
34537 break;
34538
34539 case 103:
34540 case 102:
34541 case 101:
34542 case 100:
34543 case 94:
34544 case 93:
34545 case 89:
34546 extract_constrain_insn_cached (insn);
34547 if ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))
34548 {
34549 casenum = 0;
34550 }
34551 else
34552 {
34553 casenum = 3;
34554 }
34555 break;
34556
34557 case 178:
34558 case 177:
34559 case 176:
34560 case 175:
34561 case 174:
34562 case 173:
34563 case 171:
34564 case 170:
34565 case 168:
34566 case 167:
34567 case 165:
34568 case 164:
34569 case 162:
34570 case 161:
34571 case 144:
34572 case 142:
34573 case 140:
34574 case 138:
34575 case 134:
34576 case 133:
34577 case 35:
34578 case 32:
34579 extract_constrain_insn_cached (insn);
34580 if (which_alternative == 0)
34581 {
34582 casenum = 0;
34583 }
34584 else
34585 {
34586 casenum = 3;
34587 }
34588 break;
34589
34590 case 645:
34591 case 644:
34592 case 397:
34593 case 396:
34594 case 395:
34595 case 394:
34596 case 393:
34597 case 392:
34598 case 391:
34599 case 390:
34600 case 389:
34601 case 378:
34602 case 377:
34603 case 376:
34604 case 375:
34605 case 374:
34606 case 373:
34607 case 372:
34608 case 371:
34609 case 370:
34610 case 158:
34611 case 157:
34612 case 156:
34613 case 153:
34614 case 152:
34615 case 151:
34616 case 148:
34617 case 147:
34618 case 146:
34619 case 145:
34620 case 143:
34621 case 141:
34622 case 139:
34623 case 136:
34624 case 132:
34625 case 131:
34626 case 130:
34627 case 129:
34628 case 34:
34629 case 31:
34630 case 27:
34631 case 24:
34632 case 23:
34633 case 21:
34634 case 20:
34635 case 19:
34636 casenum = 0;
34637 break;
34638
34639 case -1:
34640 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
34641 && asm_noperands (PATTERN (insn)) < 0)
34642 fatal_insn_not_found (insn);
34643 default:
34644 casenum = 3;
34645 break;
34646
34647 }
34648
34649 insn = candidate_insn;
34650 switch (casenum)
34651 {
34652 case 0:
34653 return 1;
34654
34655 case 1:
34656 return 2;
34657
34658 case 2:
34659 return 56 ;
34660
34661 case 3:
34662 return 1;
34663
34664 default:
34665 abort ();
34666 }
34667 }
34668
34669 static int ppro_p0_unit_blockage PARAMS ((rtx, rtx));
34670 static int
34671 ppro_p0_unit_blockage (executing_insn, candidate_insn)
34672 rtx executing_insn;
34673 rtx candidate_insn;
34674 {
34675 rtx insn;
34676 int casenum;
34677
34678 insn = executing_insn;
34679 switch (recog_memoized (insn))
34680 {
34681 case 659:
34682 extract_constrain_insn_cached (insn);
34683 if ((which_alternative == 1) && (! (const0_operand (operands[2], DImode))))
34684 {
34685 casenum = 0;
34686 }
34687 else
34688 {
34689 casenum = 8;
34690 }
34691 break;
34692
34693 case 658:
34694 extract_constrain_insn_cached (insn);
34695 if ((which_alternative == 1) && (! (const0_operand (operands[2], SImode))))
34696 {
34697 casenum = 0;
34698 }
34699 else
34700 {
34701 casenum = 8;
34702 }
34703 break;
34704
34705 case 645:
34706 case 644:
34707 casenum = 4;
34708 break;
34709
34710 case 643:
34711 case 642:
34712 case 641:
34713 extract_constrain_insn_cached (insn);
34714 if ((which_alternative == 0) || (which_alternative == 1))
34715 {
34716 casenum = 4;
34717 }
34718 else
34719 {
34720 casenum = 8;
34721 }
34722 break;
34723
34724 case 581:
34725 case 579:
34726 case 577:
34727 case 575:
34728 case 573:
34729 case 571:
34730 case 569:
34731 extract_insn_cached (insn);
34732 if (get_attr_type (insn) == TYPE_FOP)
34733 {
34734 casenum = 3;
34735 }
34736 else if (mult_operator (operands[3], TFmode))
34737 {
34738 casenum = 7;
34739 }
34740 else
34741 {
34742 casenum = 8;
34743 }
34744 break;
34745
34746 case 580:
34747 case 578:
34748 case 576:
34749 case 574:
34750 case 572:
34751 case 570:
34752 case 568:
34753 extract_insn_cached (insn);
34754 if (get_attr_type (insn) == TYPE_FOP)
34755 {
34756 casenum = 3;
34757 }
34758 else if (mult_operator (operands[3], XFmode))
34759 {
34760 casenum = 7;
34761 }
34762 else
34763 {
34764 casenum = 8;
34765 }
34766 break;
34767
34768 case 562:
34769 extract_constrain_insn_cached (insn);
34770 if (get_attr_type (insn) == TYPE_FOP)
34771 {
34772 casenum = 3;
34773 }
34774 else if ((which_alternative != 2) && (mult_operator (operands[3], DFmode)))
34775 {
34776 casenum = 7;
34777 }
34778 else
34779 {
34780 casenum = 8;
34781 }
34782 break;
34783
34784 case 567:
34785 case 566:
34786 case 565:
34787 case 564:
34788 case 561:
34789 extract_insn_cached (insn);
34790 if (get_attr_type (insn) == TYPE_FOP)
34791 {
34792 casenum = 3;
34793 }
34794 else if (mult_operator (operands[3], DFmode))
34795 {
34796 casenum = 7;
34797 }
34798 else
34799 {
34800 casenum = 8;
34801 }
34802 break;
34803
34804 case 557:
34805 extract_constrain_insn_cached (insn);
34806 if (get_attr_type (insn) == TYPE_FOP)
34807 {
34808 casenum = 3;
34809 }
34810 else if ((which_alternative != 2) && (mult_operator (operands[3], SFmode)))
34811 {
34812 casenum = 7;
34813 }
34814 else
34815 {
34816 casenum = 8;
34817 }
34818 break;
34819
34820 case 560:
34821 case 559:
34822 case 556:
34823 extract_insn_cached (insn);
34824 if (get_attr_type (insn) == TYPE_FOP)
34825 {
34826 casenum = 3;
34827 }
34828 else if (mult_operator (operands[3], SFmode))
34829 {
34830 casenum = 7;
34831 }
34832 else
34833 {
34834 casenum = 8;
34835 }
34836 break;
34837
34838 case 555:
34839 extract_insn_cached (insn);
34840 if (! (mult_operator (operands[3], TFmode)))
34841 {
34842 casenum = 3;
34843 }
34844 else
34845 {
34846 casenum = 7;
34847 }
34848 break;
34849
34850 case 554:
34851 extract_insn_cached (insn);
34852 if (! (mult_operator (operands[3], XFmode)))
34853 {
34854 casenum = 3;
34855 }
34856 else
34857 {
34858 casenum = 7;
34859 }
34860 break;
34861
34862 case 552:
34863 case 549:
34864 extract_constrain_insn_cached (insn);
34865 if ((which_alternative == 0) && (! (mult_operator (operands[3], SFmode))))
34866 {
34867 casenum = 3;
34868 }
34869 else if ((which_alternative == 0) && (mult_operator (operands[3], SFmode)))
34870 {
34871 casenum = 7;
34872 }
34873 else
34874 {
34875 casenum = 8;
34876 }
34877 break;
34878
34879 case 551:
34880 case 548:
34881 extract_insn_cached (insn);
34882 if (! (mult_operator (operands[3], SFmode)))
34883 {
34884 casenum = 3;
34885 }
34886 else
34887 {
34888 casenum = 7;
34889 }
34890 break;
34891
34892 case 432:
34893 case 431:
34894 case 423:
34895 extract_constrain_insn_cached (insn);
34896 if (which_alternative == 1)
34897 {
34898 casenum = 0;
34899 }
34900 else
34901 {
34902 casenum = 8;
34903 }
34904 break;
34905
34906 case 420:
34907 extract_constrain_insn_cached (insn);
34908 if ((get_attr_type (insn) == TYPE_ISHIFT) || (which_alternative == 2))
34909 {
34910 casenum = 0;
34911 }
34912 else
34913 {
34914 casenum = 8;
34915 }
34916 break;
34917
34918 case 416:
34919 extract_constrain_insn_cached (insn);
34920 if ((! ((TARGET_DOUBLE_WITH_ADD) != (0))) || (! (const1_operand (operands[2], VOIDmode))))
34921 {
34922 casenum = 0;
34923 }
34924 else
34925 {
34926 casenum = 8;
34927 }
34928 break;
34929
34930 case 414:
34931 extract_constrain_insn_cached (insn);
34932 if ((which_alternative != 0) || ((! ((TARGET_DOUBLE_WITH_ADD) != (0))) || (! (const1_operand (operands[2], VOIDmode)))))
34933 {
34934 casenum = 0;
34935 }
34936 else
34937 {
34938 casenum = 8;
34939 }
34940 break;
34941
34942 case 422:
34943 case 421:
34944 case 419:
34945 case 418:
34946 case 415:
34947 case 409:
34948 if (get_attr_type (insn) == TYPE_ISHIFT)
34949 {
34950 casenum = 0;
34951 }
34952 else
34953 {
34954 casenum = 8;
34955 }
34956 break;
34957
34958 case 417:
34959 case 413:
34960 case 408:
34961 extract_constrain_insn_cached (insn);
34962 if ((which_alternative != 0) || (get_attr_type (insn) == TYPE_ISHIFT))
34963 {
34964 casenum = 0;
34965 }
34966 else
34967 {
34968 casenum = 8;
34969 }
34970 break;
34971
34972 case 275:
34973 case 274:
34974 case 272:
34975 case 269:
34976 case 266:
34977 case 263:
34978 case 262:
34979 casenum = 2;
34980 break;
34981
34982 case 261:
34983 case 260:
34984 case 259:
34985 case 258:
34986 case 257:
34987 case 256:
34988 case 255:
34989 case 254:
34990 case 253:
34991 case 252:
34992 case 251:
34993 case 250:
34994 case 249:
34995 case 248:
34996 case 247:
34997 case 246:
34998 case 245:
34999 casenum = 1;
35000 break;
35001
35002 case 215:
35003 extract_constrain_insn_cached (insn);
35004 if (which_alternative == 3)
35005 {
35006 casenum = 0;
35007 }
35008 else
35009 {
35010 casenum = 8;
35011 }
35012 break;
35013
35014 case 209:
35015 extract_constrain_insn_cached (insn);
35016 if (which_alternative == 2)
35017 {
35018 casenum = 0;
35019 }
35020 else
35021 {
35022 casenum = 8;
35023 }
35024 break;
35025
35026 case 202:
35027 extract_constrain_insn_cached (insn);
35028 if ((which_alternative != 0) || (pic_symbolic_operand (operands[2], SImode)))
35029 {
35030 casenum = 0;
35031 }
35032 else
35033 {
35034 casenum = 8;
35035 }
35036 break;
35037
35038 case 201:
35039 extract_constrain_insn_cached (insn);
35040 if ((which_alternative == 2) || (pic_symbolic_operand (operands[2], SImode)))
35041 {
35042 casenum = 0;
35043 }
35044 else
35045 {
35046 casenum = 8;
35047 }
35048 break;
35049
35050 case 196:
35051 extract_constrain_insn_cached (insn);
35052 if ((which_alternative == 2) || (pic_symbolic_operand (operands[2], DImode)))
35053 {
35054 casenum = 0;
35055 }
35056 else
35057 {
35058 casenum = 8;
35059 }
35060 break;
35061
35062 case 605:
35063 case 529:
35064 case 520:
35065 case 519:
35066 case 518:
35067 case 517:
35068 case 516:
35069 case 515:
35070 case 504:
35071 case 503:
35072 case 498:
35073 case 497:
35074 case 496:
35075 case 495:
35076 case 494:
35077 case 493:
35078 case 492:
35079 case 491:
35080 case 490:
35081 case 489:
35082 case 488:
35083 case 487:
35084 case 486:
35085 case 485:
35086 case 484:
35087 case 483:
35088 case 482:
35089 case 481:
35090 case 480:
35091 case 479:
35092 case 478:
35093 case 477:
35094 case 476:
35095 case 475:
35096 case 474:
35097 case 473:
35098 case 472:
35099 case 471:
35100 case 470:
35101 case 469:
35102 case 468:
35103 case 467:
35104 case 466:
35105 case 465:
35106 case 464:
35107 case 463:
35108 case 462:
35109 case 461:
35110 case 460:
35111 case 459:
35112 case 458:
35113 case 457:
35114 case 454:
35115 case 453:
35116 case 452:
35117 case 451:
35118 case 450:
35119 case 449:
35120 case 448:
35121 case 447:
35122 case 446:
35123 case 445:
35124 case 444:
35125 case 443:
35126 case 442:
35127 case 441:
35128 case 440:
35129 case 439:
35130 case 438:
35131 case 437:
35132 case 436:
35133 case 435:
35134 case 434:
35135 case 433:
35136 case 430:
35137 case 427:
35138 case 426:
35139 case 425:
35140 case 424:
35141 case 412:
35142 case 195:
35143 case 194:
35144 case 193:
35145 case 192:
35146 case 191:
35147 case 190:
35148 case 189:
35149 case 188:
35150 case 187:
35151 case 186:
35152 casenum = 0;
35153 break;
35154
35155 case 397:
35156 case 396:
35157 case 395:
35158 case 394:
35159 case 393:
35160 case 392:
35161 case 391:
35162 case 390:
35163 case 389:
35164 case 378:
35165 case 377:
35166 case 376:
35167 case 375:
35168 case 374:
35169 case 373:
35170 case 372:
35171 case 371:
35172 case 370:
35173 case 158:
35174 case 157:
35175 case 156:
35176 case 153:
35177 case 152:
35178 case 151:
35179 case 148:
35180 case 147:
35181 case 146:
35182 casenum = 3;
35183 break;
35184
35185 case 135:
35186 extract_constrain_insn_cached (insn);
35187 if (which_alternative == 1)
35188 {
35189 casenum = 6;
35190 }
35191 else
35192 {
35193 casenum = 8;
35194 }
35195 break;
35196
35197 case 178:
35198 case 177:
35199 case 176:
35200 case 175:
35201 case 174:
35202 case 173:
35203 case 171:
35204 case 170:
35205 case 168:
35206 case 167:
35207 case 165:
35208 case 164:
35209 case 162:
35210 case 161:
35211 case 144:
35212 case 142:
35213 case 140:
35214 case 138:
35215 case 134:
35216 case 133:
35217 extract_constrain_insn_cached (insn);
35218 if (which_alternative == 0)
35219 {
35220 casenum = 6;
35221 }
35222 else
35223 {
35224 casenum = 8;
35225 }
35226 break;
35227
35228 case 145:
35229 case 143:
35230 case 141:
35231 case 139:
35232 case 136:
35233 case 132:
35234 case 131:
35235 case 130:
35236 case 129:
35237 casenum = 6;
35238 break;
35239
35240 case 127:
35241 extract_constrain_insn_cached (insn);
35242 if ((which_alternative == 0) || (which_alternative == 1))
35243 {
35244 casenum = 6;
35245 }
35246 else
35247 {
35248 casenum = 8;
35249 }
35250 break;
35251
35252 case 103:
35253 case 102:
35254 case 101:
35255 case 100:
35256 case 94:
35257 case 93:
35258 case 89:
35259 extract_constrain_insn_cached (insn);
35260 if ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))
35261 {
35262 casenum = 6;
35263 }
35264 else
35265 {
35266 casenum = 8;
35267 }
35268 break;
35269
35270 case 83:
35271 extract_constrain_insn_cached (insn);
35272 if (((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative != 7) && ((which_alternative != 8) && ((which_alternative != 9) && ((which_alternative != 4) && (((flag_pic) != (0)) && (symbolic_operand (operands[1], DImode))))))))
35273 {
35274 casenum = 0;
35275 }
35276 else
35277 {
35278 casenum = 8;
35279 }
35280 break;
35281
35282 case 44:
35283 extract_constrain_insn_cached (insn);
35284 if (((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (((flag_pic) != (0)) && (symbolic_operand (operands[1], SImode)))))))
35285 {
35286 casenum = 0;
35287 }
35288 else
35289 {
35290 casenum = 8;
35291 }
35292 break;
35293
35294 case 35:
35295 case 32:
35296 extract_constrain_insn_cached (insn);
35297 if (which_alternative == 0)
35298 {
35299 casenum = 5;
35300 }
35301 else
35302 {
35303 casenum = 8;
35304 }
35305 break;
35306
35307 case 34:
35308 case 31:
35309 case 27:
35310 case 24:
35311 case 23:
35312 case 21:
35313 case 20:
35314 case 19:
35315 casenum = 5;
35316 break;
35317
35318 case -1:
35319 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
35320 && asm_noperands (PATTERN (insn)) < 0)
35321 fatal_insn_not_found (insn);
35322 default:
35323 casenum = 8;
35324 break;
35325
35326 }
35327
35328 insn = candidate_insn;
35329 switch (casenum)
35330 {
35331 case 0:
35332 return 1;
35333
35334 case 1:
35335 return 1;
35336
35337 case 2:
35338 return 17 ;
35339
35340 case 3:
35341 return 1;
35342
35343 case 4:
35344 return 1;
35345
35346 case 5:
35347 return 1;
35348
35349 case 6:
35350 return 1;
35351
35352 case 7:
35353 return 1;
35354
35355 case 8:
35356 return 1;
35357
35358 default:
35359 abort ();
35360 }
35361 }
35362
35363 static int ppro_p0_unit_conflict_cost PARAMS ((rtx, rtx));
35364 static int
35365 ppro_p0_unit_conflict_cost (executing_insn, candidate_insn)
35366 rtx executing_insn;
35367 rtx candidate_insn;
35368 {
35369 rtx insn;
35370 int casenum;
35371
35372 insn = executing_insn;
35373 switch (recog_memoized (insn))
35374 {
35375 case 659:
35376 extract_constrain_insn_cached (insn);
35377 if ((which_alternative == 1) && (! (const0_operand (operands[2], DImode))))
35378 {
35379 casenum = 0;
35380 }
35381 else
35382 {
35383 casenum = 8;
35384 }
35385 break;
35386
35387 case 658:
35388 extract_constrain_insn_cached (insn);
35389 if ((which_alternative == 1) && (! (const0_operand (operands[2], SImode))))
35390 {
35391 casenum = 0;
35392 }
35393 else
35394 {
35395 casenum = 8;
35396 }
35397 break;
35398
35399 case 645:
35400 case 644:
35401 casenum = 4;
35402 break;
35403
35404 case 643:
35405 case 642:
35406 case 641:
35407 extract_constrain_insn_cached (insn);
35408 if ((which_alternative == 0) || (which_alternative == 1))
35409 {
35410 casenum = 4;
35411 }
35412 else
35413 {
35414 casenum = 8;
35415 }
35416 break;
35417
35418 case 581:
35419 case 579:
35420 case 577:
35421 case 575:
35422 case 573:
35423 case 571:
35424 case 569:
35425 extract_insn_cached (insn);
35426 if (get_attr_type (insn) == TYPE_FOP)
35427 {
35428 casenum = 3;
35429 }
35430 else if (mult_operator (operands[3], TFmode))
35431 {
35432 casenum = 7;
35433 }
35434 else
35435 {
35436 casenum = 8;
35437 }
35438 break;
35439
35440 case 580:
35441 case 578:
35442 case 576:
35443 case 574:
35444 case 572:
35445 case 570:
35446 case 568:
35447 extract_insn_cached (insn);
35448 if (get_attr_type (insn) == TYPE_FOP)
35449 {
35450 casenum = 3;
35451 }
35452 else if (mult_operator (operands[3], XFmode))
35453 {
35454 casenum = 7;
35455 }
35456 else
35457 {
35458 casenum = 8;
35459 }
35460 break;
35461
35462 case 562:
35463 extract_constrain_insn_cached (insn);
35464 if (get_attr_type (insn) == TYPE_FOP)
35465 {
35466 casenum = 3;
35467 }
35468 else if ((which_alternative != 2) && (mult_operator (operands[3], DFmode)))
35469 {
35470 casenum = 7;
35471 }
35472 else
35473 {
35474 casenum = 8;
35475 }
35476 break;
35477
35478 case 567:
35479 case 566:
35480 case 565:
35481 case 564:
35482 case 561:
35483 extract_insn_cached (insn);
35484 if (get_attr_type (insn) == TYPE_FOP)
35485 {
35486 casenum = 3;
35487 }
35488 else if (mult_operator (operands[3], DFmode))
35489 {
35490 casenum = 7;
35491 }
35492 else
35493 {
35494 casenum = 8;
35495 }
35496 break;
35497
35498 case 557:
35499 extract_constrain_insn_cached (insn);
35500 if (get_attr_type (insn) == TYPE_FOP)
35501 {
35502 casenum = 3;
35503 }
35504 else if ((which_alternative != 2) && (mult_operator (operands[3], SFmode)))
35505 {
35506 casenum = 7;
35507 }
35508 else
35509 {
35510 casenum = 8;
35511 }
35512 break;
35513
35514 case 560:
35515 case 559:
35516 case 556:
35517 extract_insn_cached (insn);
35518 if (get_attr_type (insn) == TYPE_FOP)
35519 {
35520 casenum = 3;
35521 }
35522 else if (mult_operator (operands[3], SFmode))
35523 {
35524 casenum = 7;
35525 }
35526 else
35527 {
35528 casenum = 8;
35529 }
35530 break;
35531
35532 case 555:
35533 extract_insn_cached (insn);
35534 if (! (mult_operator (operands[3], TFmode)))
35535 {
35536 casenum = 3;
35537 }
35538 else
35539 {
35540 casenum = 7;
35541 }
35542 break;
35543
35544 case 554:
35545 extract_insn_cached (insn);
35546 if (! (mult_operator (operands[3], XFmode)))
35547 {
35548 casenum = 3;
35549 }
35550 else
35551 {
35552 casenum = 7;
35553 }
35554 break;
35555
35556 case 552:
35557 case 549:
35558 extract_constrain_insn_cached (insn);
35559 if ((which_alternative == 0) && (! (mult_operator (operands[3], SFmode))))
35560 {
35561 casenum = 3;
35562 }
35563 else if ((which_alternative == 0) && (mult_operator (operands[3], SFmode)))
35564 {
35565 casenum = 7;
35566 }
35567 else
35568 {
35569 casenum = 8;
35570 }
35571 break;
35572
35573 case 551:
35574 case 548:
35575 extract_insn_cached (insn);
35576 if (! (mult_operator (operands[3], SFmode)))
35577 {
35578 casenum = 3;
35579 }
35580 else
35581 {
35582 casenum = 7;
35583 }
35584 break;
35585
35586 case 432:
35587 case 431:
35588 case 423:
35589 extract_constrain_insn_cached (insn);
35590 if (which_alternative == 1)
35591 {
35592 casenum = 0;
35593 }
35594 else
35595 {
35596 casenum = 8;
35597 }
35598 break;
35599
35600 case 420:
35601 extract_constrain_insn_cached (insn);
35602 if ((get_attr_type (insn) == TYPE_ISHIFT) || (which_alternative == 2))
35603 {
35604 casenum = 0;
35605 }
35606 else
35607 {
35608 casenum = 8;
35609 }
35610 break;
35611
35612 case 416:
35613 extract_constrain_insn_cached (insn);
35614 if ((! ((TARGET_DOUBLE_WITH_ADD) != (0))) || (! (const1_operand (operands[2], VOIDmode))))
35615 {
35616 casenum = 0;
35617 }
35618 else
35619 {
35620 casenum = 8;
35621 }
35622 break;
35623
35624 case 414:
35625 extract_constrain_insn_cached (insn);
35626 if ((which_alternative != 0) || ((! ((TARGET_DOUBLE_WITH_ADD) != (0))) || (! (const1_operand (operands[2], VOIDmode)))))
35627 {
35628 casenum = 0;
35629 }
35630 else
35631 {
35632 casenum = 8;
35633 }
35634 break;
35635
35636 case 422:
35637 case 421:
35638 case 419:
35639 case 418:
35640 case 415:
35641 case 409:
35642 if (get_attr_type (insn) == TYPE_ISHIFT)
35643 {
35644 casenum = 0;
35645 }
35646 else
35647 {
35648 casenum = 8;
35649 }
35650 break;
35651
35652 case 417:
35653 case 413:
35654 case 408:
35655 extract_constrain_insn_cached (insn);
35656 if ((which_alternative != 0) || (get_attr_type (insn) == TYPE_ISHIFT))
35657 {
35658 casenum = 0;
35659 }
35660 else
35661 {
35662 casenum = 8;
35663 }
35664 break;
35665
35666 case 275:
35667 case 274:
35668 case 272:
35669 case 269:
35670 case 266:
35671 case 263:
35672 case 262:
35673 casenum = 2;
35674 break;
35675
35676 case 261:
35677 case 260:
35678 case 259:
35679 case 258:
35680 case 257:
35681 case 256:
35682 case 255:
35683 case 254:
35684 case 253:
35685 case 252:
35686 case 251:
35687 case 250:
35688 case 249:
35689 case 248:
35690 case 247:
35691 case 246:
35692 case 245:
35693 casenum = 1;
35694 break;
35695
35696 case 215:
35697 extract_constrain_insn_cached (insn);
35698 if (which_alternative == 3)
35699 {
35700 casenum = 0;
35701 }
35702 else
35703 {
35704 casenum = 8;
35705 }
35706 break;
35707
35708 case 209:
35709 extract_constrain_insn_cached (insn);
35710 if (which_alternative == 2)
35711 {
35712 casenum = 0;
35713 }
35714 else
35715 {
35716 casenum = 8;
35717 }
35718 break;
35719
35720 case 202:
35721 extract_constrain_insn_cached (insn);
35722 if ((which_alternative != 0) || (pic_symbolic_operand (operands[2], SImode)))
35723 {
35724 casenum = 0;
35725 }
35726 else
35727 {
35728 casenum = 8;
35729 }
35730 break;
35731
35732 case 201:
35733 extract_constrain_insn_cached (insn);
35734 if ((which_alternative == 2) || (pic_symbolic_operand (operands[2], SImode)))
35735 {
35736 casenum = 0;
35737 }
35738 else
35739 {
35740 casenum = 8;
35741 }
35742 break;
35743
35744 case 196:
35745 extract_constrain_insn_cached (insn);
35746 if ((which_alternative == 2) || (pic_symbolic_operand (operands[2], DImode)))
35747 {
35748 casenum = 0;
35749 }
35750 else
35751 {
35752 casenum = 8;
35753 }
35754 break;
35755
35756 case 605:
35757 case 529:
35758 case 520:
35759 case 519:
35760 case 518:
35761 case 517:
35762 case 516:
35763 case 515:
35764 case 504:
35765 case 503:
35766 case 498:
35767 case 497:
35768 case 496:
35769 case 495:
35770 case 494:
35771 case 493:
35772 case 492:
35773 case 491:
35774 case 490:
35775 case 489:
35776 case 488:
35777 case 487:
35778 case 486:
35779 case 485:
35780 case 484:
35781 case 483:
35782 case 482:
35783 case 481:
35784 case 480:
35785 case 479:
35786 case 478:
35787 case 477:
35788 case 476:
35789 case 475:
35790 case 474:
35791 case 473:
35792 case 472:
35793 case 471:
35794 case 470:
35795 case 469:
35796 case 468:
35797 case 467:
35798 case 466:
35799 case 465:
35800 case 464:
35801 case 463:
35802 case 462:
35803 case 461:
35804 case 460:
35805 case 459:
35806 case 458:
35807 case 457:
35808 case 454:
35809 case 453:
35810 case 452:
35811 case 451:
35812 case 450:
35813 case 449:
35814 case 448:
35815 case 447:
35816 case 446:
35817 case 445:
35818 case 444:
35819 case 443:
35820 case 442:
35821 case 441:
35822 case 440:
35823 case 439:
35824 case 438:
35825 case 437:
35826 case 436:
35827 case 435:
35828 case 434:
35829 case 433:
35830 case 430:
35831 case 427:
35832 case 426:
35833 case 425:
35834 case 424:
35835 case 412:
35836 case 195:
35837 case 194:
35838 case 193:
35839 case 192:
35840 case 191:
35841 case 190:
35842 case 189:
35843 case 188:
35844 case 187:
35845 case 186:
35846 casenum = 0;
35847 break;
35848
35849 case 397:
35850 case 396:
35851 case 395:
35852 case 394:
35853 case 393:
35854 case 392:
35855 case 391:
35856 case 390:
35857 case 389:
35858 case 378:
35859 case 377:
35860 case 376:
35861 case 375:
35862 case 374:
35863 case 373:
35864 case 372:
35865 case 371:
35866 case 370:
35867 case 158:
35868 case 157:
35869 case 156:
35870 case 153:
35871 case 152:
35872 case 151:
35873 case 148:
35874 case 147:
35875 case 146:
35876 casenum = 3;
35877 break;
35878
35879 case 135:
35880 extract_constrain_insn_cached (insn);
35881 if (which_alternative == 1)
35882 {
35883 casenum = 6;
35884 }
35885 else
35886 {
35887 casenum = 8;
35888 }
35889 break;
35890
35891 case 178:
35892 case 177:
35893 case 176:
35894 case 175:
35895 case 174:
35896 case 173:
35897 case 171:
35898 case 170:
35899 case 168:
35900 case 167:
35901 case 165:
35902 case 164:
35903 case 162:
35904 case 161:
35905 case 144:
35906 case 142:
35907 case 140:
35908 case 138:
35909 case 134:
35910 case 133:
35911 extract_constrain_insn_cached (insn);
35912 if (which_alternative == 0)
35913 {
35914 casenum = 6;
35915 }
35916 else
35917 {
35918 casenum = 8;
35919 }
35920 break;
35921
35922 case 145:
35923 case 143:
35924 case 141:
35925 case 139:
35926 case 136:
35927 case 132:
35928 case 131:
35929 case 130:
35930 case 129:
35931 casenum = 6;
35932 break;
35933
35934 case 127:
35935 extract_constrain_insn_cached (insn);
35936 if ((which_alternative == 0) || (which_alternative == 1))
35937 {
35938 casenum = 6;
35939 }
35940 else
35941 {
35942 casenum = 8;
35943 }
35944 break;
35945
35946 case 103:
35947 case 102:
35948 case 101:
35949 case 100:
35950 case 94:
35951 case 93:
35952 case 89:
35953 extract_constrain_insn_cached (insn);
35954 if ((which_alternative == 0) || ((which_alternative == 1) || (which_alternative == 2)))
35955 {
35956 casenum = 6;
35957 }
35958 else
35959 {
35960 casenum = 8;
35961 }
35962 break;
35963
35964 case 83:
35965 extract_constrain_insn_cached (insn);
35966 if (((which_alternative != 5) && (which_alternative != 6)) && ((which_alternative != 7) && ((which_alternative != 8) && ((which_alternative != 9) && ((which_alternative != 4) && (((flag_pic) != (0)) && (symbolic_operand (operands[1], DImode))))))))
35967 {
35968 casenum = 0;
35969 }
35970 else
35971 {
35972 casenum = 8;
35973 }
35974 break;
35975
35976 case 44:
35977 extract_constrain_insn_cached (insn);
35978 if (((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))) && ((which_alternative != 5) && ((which_alternative != 6) && ((which_alternative != 7) && (((flag_pic) != (0)) && (symbolic_operand (operands[1], SImode)))))))
35979 {
35980 casenum = 0;
35981 }
35982 else
35983 {
35984 casenum = 8;
35985 }
35986 break;
35987
35988 case 35:
35989 case 32:
35990 extract_constrain_insn_cached (insn);
35991 if (which_alternative == 0)
35992 {
35993 casenum = 5;
35994 }
35995 else
35996 {
35997 casenum = 8;
35998 }
35999 break;
36000
36001 case 34:
36002 case 31:
36003 case 27:
36004 case 24:
36005 case 23:
36006 case 21:
36007 case 20:
36008 case 19:
36009 casenum = 5;
36010 break;
36011
36012 case -1:
36013 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
36014 && asm_noperands (PATTERN (insn)) < 0)
36015 fatal_insn_not_found (insn);
36016 default:
36017 casenum = 8;
36018 break;
36019
36020 }
36021
36022 insn = candidate_insn;
36023 switch (casenum)
36024 {
36025 case 0:
36026 return 1;
36027
36028 case 1:
36029 return 1;
36030
36031 case 2:
36032 return 17 ;
36033
36034 case 3:
36035 return 1;
36036
36037 case 4:
36038 return 1;
36039
36040 case 5:
36041 return 1;
36042
36043 case 6:
36044 return 1;
36045
36046 case 7:
36047 return 1;
36048
36049 case 8:
36050 return 1;
36051
36052 default:
36053 abort ();
36054 }
36055 }
36056
36057 const struct function_unit_desc function_units[] = {
36058 {"ppro_p0", 1, 1, 0, 0, 17, ppro_p0_unit_ready_cost, ppro_p0_unit_conflict_cost, 17, ppro_p0_unit_blockage_range, ppro_p0_unit_blockage},
36059 {"ppro_p01", 2, 2, 0, 1, 1, ppro_p01_unit_ready_cost, 0, 1, 0, 0},
36060 {"ppro_p2", 4, 1, 0, 1, 1, ppro_p2_unit_ready_cost, 0, 1, 0, 0},
36061 {"ppro_p34", 8, 1, 0, 1, 1, ppro_p34_unit_ready_cost, 0, 1, 0, 0},
36062 {"fpu", 16, 1, 0, 0, 56, fpu_unit_ready_cost, fpu_unit_conflict_cost, 56, fpu_unit_blockage_range, fpu_unit_blockage},
36063 {"k6_alux", 32, 1, 0, 0, 17, k6_alux_unit_ready_cost, k6_alux_unit_conflict_cost, 17, k6_alux_unit_blockage_range, k6_alux_unit_blockage},
36064 {"k6_alu", 64, 2, 0, 0, 17, k6_alu_unit_ready_cost, k6_alu_unit_conflict_cost, 17, k6_alu_unit_blockage_range, k6_alu_unit_blockage},
36065 {"k6_branch", 128, 1, 0, 1, 1, k6_branch_unit_ready_cost, 0, 1, 0, 0},
36066 {"k6_load", 256, 1, 0, 0, 10, k6_load_unit_ready_cost, k6_load_unit_conflict_cost, 10, k6_load_unit_blockage_range, k6_load_unit_blockage},
36067 {"k6_store", 512, 1, 0, 0, 10, k6_store_unit_ready_cost, k6_store_unit_conflict_cost, 10, k6_store_unit_blockage_range, k6_store_unit_blockage},
36068 {"k6_fpu", 1024, 1, 1, 0, 56, k6_fpu_unit_ready_cost, k6_fpu_unit_conflict_cost, 56, k6_fpu_unit_blockage_range, k6_fpu_unit_blockage},
36069 {"athlon_vectordec", 2048, 1, 0, 1, 1, athlon_vectordec_unit_ready_cost, 0, 1, athlon_vectordec_unit_blockage_range, athlon_vectordec_unit_blockage},
36070 {"athlon_directdec", 4096, 3, 0, 1, 1, athlon_directdec_unit_ready_cost, 0, 1, 0, 0},
36071 {"athlon_ieu", 8192, 3, 0, 0, 15, athlon_ieu_unit_ready_cost, athlon_ieu_unit_conflict_cost, 15, athlon_ieu_unit_blockage_range, athlon_ieu_unit_blockage},
36072 {"athlon_muldiv", 16384, 1, 0, 0, 42, athlon_muldiv_unit_ready_cost, athlon_muldiv_unit_conflict_cost, 42, athlon_muldiv_unit_blockage_range, athlon_muldiv_unit_blockage},
36073 {"athlon_fp", 32768, 3, 0, 1, 1, athlon_fp_unit_ready_cost, 0, 1, 0, 0},
36074 {"athlon_fp_mul", 65536, 1, 0, 1, 1, athlon_fp_mul_unit_ready_cost, 0, 1, 0, 0},
36075 {"athlon_fp_add", 131072, 1, 0, 1, 1, athlon_fp_add_unit_ready_cost, 0, 1, 0, 0},
36076 {"athlon_fp_muladd", 262144, 2, 0, 1, 1, athlon_fp_muladd_unit_ready_cost, 0, 1, 0, 0},
36077 {"athlon_fp_store", 524288, 1, 0, 1, 1, athlon_fp_store_unit_ready_cost, 0, 1, 0, 0},
36078 {"athlon_load", 1048576, 2, 0, 1, 1, athlon_load_unit_ready_cost, 0, 1, 0, 0},
36079 };
36080
36081
36082 int max_dfa_issue_rate = 2;
36083
36084 static const unsigned char pentium_translate[] ATTRIBUTE_UNUSED = {
36085 0, 1, 2, 3, 2, 4, 3, 5, 5, 5,
36086 6, 7, 8, 5, 2, 2, 9, 10, 11, 4,
36087 12, 13, 14, 3, 5, 8, 7, 2, 15};
36088
36089
36090 static const unsigned char pentium_transitions[] ATTRIBUTE_UNUSED = {
36091 19, 18, 2, 3, 4, 15, 17, 16, 15, 14,
36092 14, 13, 5, 5, 1, 0, 3, 6, 3, 0,
36093 4, 2, 4, 3, 3, 3, 2, 2, 6, 2,
36094 4, 4, 7, 4, 3, 3, 3, 0, 8, 4,
36095 3, 9, 3, 10, 11, 2, 4, 6, 4, 12,
36096 2, 6, 4, 19, 4, 6, 3, 3, 6, 6,
36097 0, 7};
36098
36099
36100 static const unsigned char pentium_check[] = {
36101 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
36102 0, 0, 0, 0, 0, 0, 5, 5, 5, 2,
36103 5, 3, 5, 5, 4, 5, 5, 15, 15, 15,
36104 13, 15, 6, 15, 15, 1, 15, 15, 7, 1,
36105 13, 8, 1, 9, 10, 1, 14, 14, 14, 11,
36106 16, 17, 12, 18, 16, 17, 14, 16, 17, 19,
36107 16, 17};
36108
36109
36110 static const unsigned char pentium_base[] = {
36111 0, 30, 4, 6, 9, 11, 17, 23, 26, 28,
36112 29, 34, 37, 25, 41, 22, 45, 46, 38, 44,
36113 };
36114
36115
36116 #if AUTOMATON_STATE_ALTS
36117
36118 static const unsigned char pentium_state_alts[] ATTRIBUTE_UNUSED = {
36119 1, 1, 1, 1, 1, 2, 1, 1, 1, 24,
36120 2, 2, 12, 2, 2, 1, 1, 1, 1, 1,
36121 10, 1, 1, 5, 1, 1, 1, 1, 1, 1,
36122 1, 16, 1, 2, 8, 1, 2, 1, 1, 2,
36123 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
36124 1, 1, 1, 1, 8, 2, 1, 4, 2, 1,
36125 1, 1};
36126
36127
36128 static const unsigned char pentium_check_state_alts[] = {
36129 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
36130 0, 0, 0, 0, 0, 0, 5, 5, 5, 2,
36131 5, 3, 5, 5, 4, 5, 5, 15, 15, 15,
36132 13, 15, 6, 15, 15, 1, 15, 15, 7, 1,
36133 13, 8, 1, 9, 10, 1, 14, 14, 14, 11,
36134 16, 17, 12, 18, 16, 17, 14, 16, 17, 19,
36135 16, 17};
36136
36137
36138 static const unsigned char pentium_base_state_alts[] = {
36139 0, 30, 4, 6, 9, 11, 17, 23, 26, 28,
36140 29, 34, 37, 25, 41, 22, 45, 46, 38, 44,
36141 };
36142
36143
36144 #endif
36145
36146
36147 static const unsigned char pentium_min_issue_delay[] ATTRIBUTE_UNUSED = {
36148 0, 0, 0, 0, 0, 0, 0, 0, 34, 34,
36149 32, 34, 32, 34, 2, 32, 17, 17, 17, 17,
36150 17, 17, 17, 16, 34, 34, 34, 34, 34, 34,
36151 34, 32, 51, 51, 51, 51, 51, 51, 51, 48,
36152 34, 34, 32, 0, 32, 32, 2, 0, 170, 170,
36153 170, 170, 170, 170, 170, 160, 153, 153, 153, 153,
36154 153, 153, 153, 144, 136, 136, 136, 136, 136, 136,
36155 136, 128, 119, 119, 119, 119, 119, 119, 119, 112,
36156 102, 102, 102, 102, 102, 102, 102, 96, 85, 85,
36157 85, 85, 85, 85, 85, 80, 68, 68, 68, 68,
36158 68, 68, 68, 64, 51, 51, 48, 51, 51, 51,
36159 51, 48, 51, 51, 48, 0, 51, 51, 51, 48,
36160 17, 17, 16, 0, 16, 16, 1, 0, 17, 17,
36161 16, 17, 16, 17, 1, 16, 170, 170, 160, 170,
36162 160, 170, 10, 160, 204, 204, 204, 204, 204, 204,
36163 204, 192, 187, 187, 187, 187, 187, 187, 187, 176,
36164 };
36165
36166
36167 static const unsigned char pentium_dead_lock[] = {
36168 0, 0, 1, 1, 1, 0, 1, 1, 1, 1,
36169 1, 1, 1, 0, 0, 0, 0, 0, 1, 1,
36170 };
36171
36172
36173 static const unsigned char pentium_fpu_translate[] ATTRIBUTE_UNUSED = {
36174 0, 0, 1, 0, 1, 2, 3, 0, 0, 0,
36175 0, 0, 1, 4, 5, 6, 0, 0, 0, 0,
36176 0, 0, 0, 0, 0, 0, 0, 0, 7};
36177
36178
36179 static const unsigned char pentium_fpu_transitions[] ATTRIBUTE_UNUSED = {
36180 0, 72, 73, 71, 74, 32, 1, 0, 69, 74,
36181 73, 71, 75, 1, 2, 70, 70, 72, 73, 71,
36182 2, 3, 3, 0, 4, 5, 6, 7, 8, 4,
36183 9, 5, 6, 7, 8, 9, 10, 10, 11, 12,
36184 13, 14, 15, 11, 16, 12, 13, 14, 15, 16,
36185 17, 17, 18, 19, 20, 21, 22, 18, 23, 19,
36186 20, 21, 22, 23, 24, 24, 25, 26, 27, 28,
36187 29, 25, 30, 26, 27, 28, 29, 30, 31, 31,
36188 32, 33, 34, 35, 36, 32, 37, 33, 34, 35,
36189 36, 37, 38, 38, 39, 40, 41, 42, 43, 39,
36190 44, 40, 41, 42, 43, 44, 45, 45, 46, 47,
36191 48, 49, 50, 46, 51, 47, 48, 49, 50, 51,
36192 52, 52, 53, 54, 55, 56, 57, 53, 58, 54,
36193 55, 56, 57, 58, 59, 59, 60, 61, 62, 63,
36194 64, 60, 65, 61, 62, 63, 64, 65, 66, 66,
36195 67, 68, 71, 72, 73, 67, 74, 68, 69, 72,
36196 0, 71, 75, 70};
36197
36198
36199 static const unsigned char pentium_fpu_check[] = {
36200 0, 0, 0, 0, 0, 0, 0, 0, 69, 69,
36201 69, 69, 75, 1, 2, 69, 70, 70, 70, 70,
36202 1, 2, 3, 70, 4, 5, 6, 7, 8, 3,
36203 9, 4, 5, 6, 7, 8, 10, 9, 11, 12,
36204 13, 14, 15, 10, 16, 11, 12, 13, 14, 15,
36205 17, 16, 18, 19, 20, 21, 22, 17, 23, 18,
36206 19, 20, 21, 22, 24, 23, 25, 26, 27, 28,
36207 29, 24, 30, 25, 26, 27, 28, 29, 31, 30,
36208 32, 33, 34, 35, 36, 31, 37, 32, 33, 34,
36209 35, 36, 38, 37, 39, 40, 41, 42, 43, 38,
36210 44, 39, 40, 41, 42, 43, 45, 44, 46, 47,
36211 48, 49, 50, 45, 51, 46, 47, 48, 49, 50,
36212 52, 51, 53, 54, 55, 56, 57, 52, 58, 53,
36213 54, 55, 56, 57, 59, 58, 60, 61, 62, 63,
36214 64, 59, 65, 60, 61, 62, 63, 64, 66, 65,
36215 67, 68, 71, 72, 73, 66, 74, 67, 68, 71,
36216 72, 73, 75, 74};
36217
36218
36219 static const unsigned char pentium_fpu_base[] = {
36220 0, 13, 14, 22, 24, 25, 26, 27, 28, 30,
36221 36, 38, 39, 40, 41, 42, 44, 50, 52, 53,
36222 54, 55, 56, 58, 64, 66, 67, 68, 69, 70,
36223 72, 78, 80, 81, 82, 83, 84, 86, 92, 94,
36224 95, 96, 97, 98, 100, 106, 108, 109, 110, 111,
36225 112, 114, 120, 122, 123, 124, 125, 126, 128, 134,
36226 136, 137, 138, 139, 140, 142, 148, 150, 151, 8,
36227 16, 152, 153, 154, 156};
36228
36229
36230 #if AUTOMATON_STATE_ALTS
36231
36232 static const unsigned char pentium_fpu_state_alts[] ATTRIBUTE_UNUSED = {
36233 1, 1, 1, 1, 4, 1, 1, 1, 1, 1,
36234 1, 1, 0, 1, 1, 1, 1, 1, 1, 1,
36235 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
36236 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
36237 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
36238 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
36239 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
36240 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
36241 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
36242 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
36243 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
36244 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
36245 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
36246 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
36247 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
36248 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
36249 1, 1, 0, 1};
36250
36251
36252 static const unsigned char pentium_fpu_check_state_alts[] = {
36253 0, 0, 0, 0, 0, 0, 0, 0, 69, 69,
36254 69, 69, 75, 1, 2, 69, 70, 70, 70, 70,
36255 1, 2, 3, 70, 4, 5, 6, 7, 8, 3,
36256 9, 4, 5, 6, 7, 8, 10, 9, 11, 12,
36257 13, 14, 15, 10, 16, 11, 12, 13, 14, 15,
36258 17, 16, 18, 19, 20, 21, 22, 17, 23, 18,
36259 19, 20, 21, 22, 24, 23, 25, 26, 27, 28,
36260 29, 24, 30, 25, 26, 27, 28, 29, 31, 30,
36261 32, 33, 34, 35, 36, 31, 37, 32, 33, 34,
36262 35, 36, 38, 37, 39, 40, 41, 42, 43, 38,
36263 44, 39, 40, 41, 42, 43, 45, 44, 46, 47,
36264 48, 49, 50, 45, 51, 46, 47, 48, 49, 50,
36265 52, 51, 53, 54, 55, 56, 57, 52, 58, 53,
36266 54, 55, 56, 57, 59, 58, 60, 61, 62, 63,
36267 64, 59, 65, 60, 61, 62, 63, 64, 66, 65,
36268 67, 68, 71, 72, 73, 66, 74, 67, 68, 71,
36269 72, 73, 75, 74};
36270
36271
36272 static const unsigned char pentium_fpu_base_state_alts[] = {
36273 0, 13, 14, 22, 24, 25, 26, 27, 28, 30,
36274 36, 38, 39, 40, 41, 42, 44, 50, 52, 53,
36275 54, 55, 56, 58, 64, 66, 67, 68, 69, 70,
36276 72, 78, 80, 81, 82, 83, 84, 86, 92, 94,
36277 95, 96, 97, 98, 100, 106, 108, 109, 110, 111,
36278 112, 114, 120, 122, 123, 124, 125, 126, 128, 134,
36279 136, 137, 138, 139, 140, 142, 148, 150, 151, 8,
36280 16, 152, 153, 154, 156};
36281
36282
36283 #endif
36284
36285
36286 static const unsigned char pentium_fpu_min_issue_delay[] ATTRIBUTE_UNUSED = {
36287 0, 0, 0, 0, 0, 0, 0, 0, 0, 68,
36288 68, 68, 70, 70, 70, 0, 0, 67, 67, 67,
36289 69, 69, 69, 0, 0, 66, 66, 66, 68, 68,
36290 68, 0, 0, 65, 65, 65, 67, 67, 67, 0,
36291 0, 64, 64, 64, 66, 66, 66, 0, 0, 63,
36292 63, 63, 65, 65, 65, 0, 0, 62, 62, 62,
36293 64, 64, 64, 0, 0, 61, 61, 61, 63, 63,
36294 63, 0, 0, 60, 60, 60, 62, 62, 62, 0,
36295 0, 59, 59, 59, 61, 61, 61, 0, 0, 58,
36296 58, 58, 60, 60, 60, 0, 0, 57, 57, 57,
36297 59, 59, 59, 0, 0, 56, 56, 56, 58, 58,
36298 58, 0, 0, 55, 55, 55, 57, 57, 57, 0,
36299 0, 54, 54, 54, 56, 56, 56, 0, 0, 53,
36300 53, 53, 55, 55, 55, 0, 0, 52, 52, 52,
36301 54, 54, 54, 0, 0, 51, 51, 51, 53, 53,
36302 53, 0, 0, 50, 50, 50, 52, 52, 52, 0,
36303 0, 49, 49, 49, 51, 51, 51, 0, 0, 48,
36304 48, 48, 50, 50, 50, 0, 0, 47, 47, 47,
36305 49, 49, 49, 0, 0, 46, 46, 46, 48, 48,
36306 48, 0, 0, 45, 45, 45, 47, 47, 47, 0,
36307 0, 44, 44, 44, 46, 46, 46, 0, 0, 43,
36308 43, 43, 45, 45, 45, 0, 0, 42, 42, 42,
36309 44, 44, 44, 0, 0, 41, 41, 41, 43, 43,
36310 43, 0, 0, 40, 40, 40, 42, 42, 42, 0,
36311 0, 39, 39, 39, 41, 41, 41, 0, 0, 38,
36312 38, 38, 40, 40, 40, 0, 0, 37, 37, 37,
36313 39, 39, 39, 0, 0, 36, 36, 36, 38, 38,
36314 38, 0, 0, 35, 35, 35, 37, 37, 37, 0,
36315 0, 34, 34, 34, 36, 36, 36, 0, 0, 33,
36316 33, 33, 35, 35, 35, 0, 0, 32, 32, 32,
36317 34, 34, 34, 0, 0, 31, 31, 31, 33, 33,
36318 33, 0, 0, 30, 30, 30, 32, 32, 32, 0,
36319 0, 29, 29, 29, 31, 31, 31, 0, 0, 28,
36320 28, 28, 30, 30, 30, 0, 0, 27, 27, 27,
36321 29, 29, 29, 0, 0, 26, 26, 26, 28, 28,
36322 28, 0, 0, 25, 25, 25, 27, 27, 27, 0,
36323 0, 24, 24, 24, 26, 26, 26, 0, 0, 23,
36324 23, 23, 25, 25, 25, 0, 0, 22, 22, 22,
36325 24, 24, 24, 0, 0, 21, 21, 21, 23, 23,
36326 23, 0, 0, 20, 20, 20, 22, 22, 22, 0,
36327 0, 19, 19, 19, 21, 21, 21, 0, 0, 18,
36328 18, 18, 20, 20, 20, 0, 0, 17, 17, 17,
36329 19, 19, 19, 0, 0, 16, 16, 16, 18, 18,
36330 18, 0, 0, 15, 15, 15, 17, 17, 17, 0,
36331 0, 14, 14, 14, 16, 16, 16, 0, 0, 13,
36332 13, 13, 15, 15, 15, 0, 0, 12, 12, 12,
36333 14, 14, 14, 0, 0, 11, 11, 11, 13, 13,
36334 13, 0, 0, 10, 10, 10, 12, 12, 12, 0,
36335 0, 9, 9, 9, 11, 11, 11, 0, 0, 8,
36336 8, 8, 10, 10, 10, 0, 0, 7, 7, 7,
36337 9, 9, 9, 0, 0, 6, 6, 6, 8, 8,
36338 8, 0, 0, 5, 5, 5, 7, 7, 7, 0,
36339 0, 4, 4, 4, 6, 6, 6, 0, 0, 3,
36340 3, 3, 5, 5, 5, 0, 0, 2, 2, 2,
36341 4, 4, 4, 0, 0, 1, 1, 1, 3, 3,
36342 3, 0, 0, 0, 0, 0, 2, 2, 2, 0,
36343 0, 0, 0, 0, 1, 1, 1, 0, 0, 2,
36344 2, 2, 2, 2, 2, 0, 0, 1, 1, 1,
36345 1, 1, 1, 0, 0, 3, 3, 3, 3, 3,
36346 3, 0, 0, 1, 1, 1, 2, 2, 2, 0,
36347 };
36348
36349
36350 static const unsigned char pentium_fpu_dead_lock[] = {
36351 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
36352 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
36353 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
36354 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
36355 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
36356 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
36357 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
36358 0, 0, 0, 0, 0};
36359
36360
36361 #define DFA__ADVANCE_CYCLE 28
36362
36363 struct DFA_chip
36364 {
36365 unsigned char pentium_automaton_state;
36366 unsigned char pentium_fpu_automaton_state;
36367 };
36368
36369
36370 int max_insn_queue_index = 127;
36371
36372 static int internal_min_issue_delay PARAMS ((int, struct DFA_chip *));
36373 static int
36374 internal_min_issue_delay (insn_code, chip)
36375 int insn_code;
36376 struct DFA_chip *chip ATTRIBUTE_UNUSED;
36377 {
36378 int temp ATTRIBUTE_UNUSED;
36379 int res = -1;
36380
36381 switch (insn_code)
36382 {
36383 case 0:
36384 case 1:
36385 case 3:
36386 case 7:
36387 case 8:
36388 case 9:
36389 case 10:
36390 case 11:
36391 case 16:
36392 case 17:
36393 case 18:
36394 case 19:
36395 case 20:
36396 case 21:
36397 case 22:
36398 case 23:
36399 case 24:
36400 case 25:
36401 case 26:
36402 case 27:
36403
36404 temp = pentium_min_issue_delay [(pentium_translate [insn_code] + chip->pentium_automaton_state * 16) / 2];
36405 temp = (temp >> (8 - (pentium_translate [insn_code] % 2 + 1) * 4)) & 15;
36406 res = temp;
36407 break;
36408
36409 case 2:
36410 case 4:
36411 case 5:
36412 case 6:
36413 case 12:
36414 case 13:
36415 case 14:
36416 case 15:
36417 case 28:
36418
36419 temp = pentium_fpu_min_issue_delay [pentium_fpu_translate [insn_code] + chip->pentium_fpu_automaton_state * 8];
36420 res = temp;
36421
36422 temp = pentium_min_issue_delay [(pentium_translate [insn_code] + chip->pentium_automaton_state * 16) / 2];
36423 temp = (temp >> (8 - (pentium_translate [insn_code] % 2 + 1) * 4)) & 15;
36424 if (temp > res)
36425 res = temp;
36426 break;
36427
36428
36429 default:
36430 res = -1;
36431 break;
36432 }
36433 return res;
36434 }
36435
36436 static int internal_state_transition PARAMS ((int, struct DFA_chip *));
36437 static int
36438 internal_state_transition (insn_code, chip)
36439 int insn_code;
36440 struct DFA_chip *chip ATTRIBUTE_UNUSED;
36441 {
36442 int temp ATTRIBUTE_UNUSED;
36443
36444 switch (insn_code)
36445 {
36446 case 0:
36447 case 1:
36448 case 3:
36449 case 7:
36450 case 8:
36451 case 9:
36452 case 10:
36453 case 11:
36454 case 16:
36455 case 17:
36456 case 18:
36457 case 19:
36458 case 20:
36459 case 21:
36460 case 22:
36461 case 23:
36462 case 24:
36463 case 25:
36464 case 26:
36465 case 27:
36466 {
36467
36468 temp = pentium_base [chip->pentium_automaton_state] + pentium_translate [insn_code];
36469 if (pentium_check [temp] != chip->pentium_automaton_state)
36470 return internal_min_issue_delay (insn_code, chip);
36471 else
36472 chip->pentium_automaton_state = pentium_transitions [temp];
36473 return -1;
36474 }
36475 case 2:
36476 case 4:
36477 case 5:
36478 case 6:
36479 case 12:
36480 case 13:
36481 case 14:
36482 case 15:
36483 case 28:
36484 {
36485 unsigned char _pentium_fpu_automaton_state;
36486
36487 temp = pentium_fpu_base [chip->pentium_fpu_automaton_state] + pentium_fpu_translate [insn_code];
36488 if (pentium_fpu_check [temp] != chip->pentium_fpu_automaton_state)
36489 return internal_min_issue_delay (insn_code, chip);
36490 else
36491 _pentium_fpu_automaton_state = pentium_fpu_transitions [temp];
36492
36493 temp = pentium_base [chip->pentium_automaton_state] + pentium_translate [insn_code];
36494 if (pentium_check [temp] != chip->pentium_automaton_state)
36495 return internal_min_issue_delay (insn_code, chip);
36496 else
36497 chip->pentium_automaton_state = pentium_transitions [temp];
36498 chip->pentium_fpu_automaton_state = _pentium_fpu_automaton_state;
36499 return -1;
36500 }
36501
36502 default:
36503 return -1;
36504 }
36505 }
36506
36507
36508 static int *dfa_insn_codes;
36509
36510 static int dfa_insn_codes_length;
36511
36512 #ifdef __GNUC__
36513 __inline__
36514 #endif
36515 static int dfa_insn_code PARAMS ((rtx));
36516 static int
36517 dfa_insn_code (insn)
36518 rtx insn;
36519 {
36520 int insn_code;
36521 int temp;
36522
36523 if (INSN_UID (insn) >= dfa_insn_codes_length)
36524 {
36525 temp = dfa_insn_codes_length;
36526 dfa_insn_codes_length = 2 * INSN_UID (insn);
36527 dfa_insn_codes = xrealloc (dfa_insn_codes, dfa_insn_codes_length * sizeof (int));
36528 for (; temp < dfa_insn_codes_length; temp++)
36529 dfa_insn_codes [temp] = -1;
36530 }
36531 if ((insn_code = dfa_insn_codes [INSN_UID (insn)]) < 0)
36532 {
36533 insn_code = internal_dfa_insn_code (insn);
36534 dfa_insn_codes [INSN_UID (insn)] = insn_code;
36535 }
36536 return insn_code;
36537 }
36538
36539 int
36540 state_transition (state, insn)
36541 state_t state;
36542 rtx insn;
36543 {
36544 int insn_code;
36545
36546 if (insn != 0)
36547 {
36548 insn_code = dfa_insn_code (insn);
36549 if (insn_code > DFA__ADVANCE_CYCLE)
36550 return -1;
36551 }
36552 else
36553 insn_code = DFA__ADVANCE_CYCLE;
36554
36555 return internal_state_transition (insn_code, state);
36556 }
36557
36558
36559 #if AUTOMATON_STATE_ALTS
36560
36561 static int internal_state_alts PARAMS ((int, struct DFA_chip *));
36562 static int
36563 internal_state_alts (insn_code, chip)
36564 int insn_code;
36565 struct DFA_chip *chip;
36566 {
36567 int res;
36568
36569 switch (insn_code)
36570 {
36571 case 0:
36572 case 1:
36573 case 3:
36574 case 7:
36575 case 8:
36576 case 9:
36577 case 10:
36578 case 11:
36579 case 16:
36580 case 17:
36581 case 18:
36582 case 19:
36583 case 20:
36584 case 21:
36585 case 22:
36586 case 23:
36587 case 24:
36588 case 25:
36589 case 26:
36590 case 27:
36591 {
36592 int temp;
36593
36594 temp = pentium_base_state_alts [chip->pentium_automaton_state] + pentium_translate [insn_code];
36595 if (pentium_check_state_alts [temp] != chip->pentium_automaton_state)
36596 return 0;
36597 else
36598 res = pentium_state_alts [temp];
36599 break;
36600 }
36601
36602 case 2:
36603 case 4:
36604 case 5:
36605 case 6:
36606 case 12:
36607 case 13:
36608 case 14:
36609 case 15:
36610 case 28:
36611 {
36612 int temp;
36613
36614 temp = pentium_fpu_base_state_alts [chip->pentium_fpu_automaton_state] + pentium_fpu_translate [insn_code];
36615 if (pentium_fpu_check_state_alts [temp] != chip->pentium_fpu_automaton_state)
36616 return 0;
36617 else
36618 res = pentium_fpu_state_alts [temp];
36619
36620 temp = pentium_base_state_alts [chip->pentium_automaton_state] + pentium_translate [insn_code];
36621 if (pentium_check_state_alts [temp] != chip->pentium_automaton_state)
36622 return 0;
36623 else
36624 res += pentium_state_alts [temp];
36625 break;
36626 }
36627
36628
36629 default:
36630 res = 0;
36631 break;
36632 }
36633 return res;
36634 }
36635
36636 int
36637 state_alts (state, insn)
36638 state_t state;
36639 rtx insn;
36640 {
36641 int insn_code;
36642
36643 if (insn != 0)
36644 {
36645 insn_code = dfa_insn_code (insn);
36646 if (insn_code > DFA__ADVANCE_CYCLE)
36647 return 0;
36648 }
36649 else
36650 insn_code = DFA__ADVANCE_CYCLE;
36651
36652 return internal_state_alts (insn_code, state);
36653 }
36654
36655
36656 #endif
36657
36658 int
36659 min_issue_delay (state, insn)
36660 state_t state;
36661 rtx insn;
36662 {
36663 int insn_code;
36664
36665 if (insn != 0)
36666 {
36667 insn_code = dfa_insn_code (insn);
36668 if (insn_code > DFA__ADVANCE_CYCLE)
36669 return 0;
36670 }
36671 else
36672 insn_code = DFA__ADVANCE_CYCLE;
36673
36674 return internal_min_issue_delay (insn_code, state);
36675 }
36676
36677 static int internal_state_dead_lock_p PARAMS ((struct DFA_chip *));
36678 static int
36679 internal_state_dead_lock_p (chip)
36680 struct DFA_chip *chip;
36681 {
36682 if (pentium_dead_lock [chip->pentium_automaton_state])
36683 return 1;
36684 if (pentium_fpu_dead_lock [chip->pentium_fpu_automaton_state])
36685 return 1;
36686 return 0;
36687 }
36688
36689 int
36690 state_dead_lock_p (state)
36691 state_t state;
36692 {
36693 return internal_state_dead_lock_p (state);
36694 }
36695
36696 int
36697 state_size ()
36698 {
36699 return sizeof (struct DFA_chip);
36700 }
36701
36702 static void internal_reset PARAMS ((struct DFA_chip *));
36703 static void
36704 internal_reset (chip)
36705 struct DFA_chip *chip;
36706 {
36707 memset (chip, 0, sizeof (struct DFA_chip));
36708 }
36709
36710 void
36711 state_reset (state)
36712 state_t state;
36713 {
36714 internal_reset (state);
36715 }
36716
36717 int
36718 min_insn_conflict_delay (state, insn, insn2)
36719 state_t state;
36720 rtx insn;
36721 rtx insn2;
36722 {
36723 struct DFA_chip DFA_chip;
36724 int insn_code, insn2_code;
36725
36726 if (insn != 0)
36727 {
36728 insn_code = dfa_insn_code (insn);
36729 if (insn_code > DFA__ADVANCE_CYCLE)
36730 return 0;
36731 }
36732 else
36733 insn_code = DFA__ADVANCE_CYCLE;
36734
36735
36736 if (insn2 != 0)
36737 {
36738 insn2_code = dfa_insn_code (insn2);
36739 if (insn2_code > DFA__ADVANCE_CYCLE)
36740 return 0;
36741 }
36742 else
36743 insn2_code = DFA__ADVANCE_CYCLE;
36744
36745 memcpy (&DFA_chip, state, sizeof (DFA_chip));
36746 internal_reset (&DFA_chip);
36747 if (internal_state_transition (insn_code, &DFA_chip) > 0)
36748 abort ();
36749 return internal_min_issue_delay (insn2_code, &DFA_chip);
36750 }
36751
36752 static int internal_insn_latency PARAMS ((int, int, rtx, rtx));
36753 static int
36754 internal_insn_latency (insn_code, insn2_code, insn, insn2)
36755 int insn_code;
36756 int insn2_code;
36757 rtx insn ATTRIBUTE_UNUSED;
36758 rtx insn2 ATTRIBUTE_UNUSED;
36759 {
36760 switch (insn_code)
36761 {
36762 case 0:
36763 return (insn2_code != DFA__ADVANCE_CYCLE ? 11 : 0);
36764 case 1:
36765 return (insn2_code != DFA__ADVANCE_CYCLE ? 12 : 0);
36766 case 2:
36767 return (insn2_code != DFA__ADVANCE_CYCLE ? 1 : 0);
36768 case 3:
36769 return (insn2_code != DFA__ADVANCE_CYCLE ? 2 : 0);
36770 case 4:
36771 return (insn2_code != DFA__ADVANCE_CYCLE ? 1 : 0);
36772 case 5:
36773 return (insn2_code != DFA__ADVANCE_CYCLE ? 3 : 0);
36774 case 6:
36775 return (insn2_code != DFA__ADVANCE_CYCLE ? 2 : 0);
36776 case 7:
36777 return (insn2_code != DFA__ADVANCE_CYCLE ? 1 : 0);
36778 case 8:
36779 switch (insn2_code)
36780 {
36781 case 10:
36782 return 0;
36783 case 9:
36784 return 0;
36785 case 8:
36786 return 0;
36787 default:
36788 return (insn2_code != DFA__ADVANCE_CYCLE ? 1 : 0);
36789 }
36790 case 9:
36791 switch (insn2_code)
36792 {
36793 case 10:
36794 return 0;
36795 case 9:
36796 return 0;
36797 case 8:
36798 return 0;
36799 default:
36800 return (insn2_code != DFA__ADVANCE_CYCLE ? 1 : 0);
36801 }
36802 case 10:
36803 return (insn2_code != DFA__ADVANCE_CYCLE ? 10 : 0);
36804 case 11:
36805 return (insn2_code != DFA__ADVANCE_CYCLE ? 1 : 0);
36806 case 12:
36807 return (insn2_code != DFA__ADVANCE_CYCLE ? 3 : 0);
36808 case 13:
36809 return (insn2_code != DFA__ADVANCE_CYCLE ? 3 : 0);
36810 case 14:
36811 return (insn2_code != DFA__ADVANCE_CYCLE ? 39 : 0);
36812 case 15:
36813 return (insn2_code != DFA__ADVANCE_CYCLE ? 70 : 0);
36814 case 16:
36815 return (insn2_code != DFA__ADVANCE_CYCLE ? 3 : 0);
36816 case 17:
36817 return (insn2_code != DFA__ADVANCE_CYCLE ? 3 : 0);
36818 case 18:
36819 return (insn2_code != DFA__ADVANCE_CYCLE ? 3 : 0);
36820 case 19:
36821 return (insn2_code != DFA__ADVANCE_CYCLE ? 3 : 0);
36822 case 20:
36823 return (insn2_code != DFA__ADVANCE_CYCLE ? 2 : 0);
36824 case 21:
36825 return (insn2_code != DFA__ADVANCE_CYCLE ? 2 : 0);
36826 case 22:
36827 return (insn2_code != DFA__ADVANCE_CYCLE ? 2 : 0);
36828 case 23:
36829 return (insn2_code != DFA__ADVANCE_CYCLE ? 2 : 0);
36830 case 24:
36831 return (insn2_code != DFA__ADVANCE_CYCLE ? 1 : 0);
36832 case 25:
36833 return (insn2_code != DFA__ADVANCE_CYCLE ? 1 : 0);
36834 case 26:
36835 return (insn2_code != DFA__ADVANCE_CYCLE ? 1 : 0);
36836 case 27:
36837 return (insn2_code != DFA__ADVANCE_CYCLE ? 1 : 0);
36838 case 28:
36839 return (insn2_code != DFA__ADVANCE_CYCLE ? 0 : 0);
36840 default:
36841 return 0;
36842 }
36843 }
36844
36845 int
36846 insn_latency (insn, insn2)
36847 rtx insn;
36848 rtx insn2;
36849 {
36850 int insn_code, insn2_code;
36851
36852 if (insn != 0)
36853 {
36854 insn_code = dfa_insn_code (insn);
36855 if (insn_code > DFA__ADVANCE_CYCLE)
36856 return 0;
36857 }
36858 else
36859 insn_code = DFA__ADVANCE_CYCLE;
36860
36861
36862 if (insn2 != 0)
36863 {
36864 insn2_code = dfa_insn_code (insn2);
36865 if (insn2_code > DFA__ADVANCE_CYCLE)
36866 return 0;
36867 }
36868 else
36869 insn2_code = DFA__ADVANCE_CYCLE;
36870
36871 return internal_insn_latency (insn_code, insn2_code, insn, insn2);
36872 }
36873
36874 void
36875 print_reservation (f, insn)
36876 FILE *f;
36877 rtx insn;
36878 {
36879 int insn_code;
36880
36881 if (insn != 0)
36882 {
36883 insn_code = dfa_insn_code (insn);
36884 if (insn_code > DFA__ADVANCE_CYCLE)
36885 {
36886 fprintf (f, "nothing");
36887 return;
36888 }
36889 }
36890 else
36891 {
36892 fprintf (f, "nothing");
36893 return;
36894 }
36895 switch (insn_code)
36896 {
36897 case 0:
36898 fprintf (f, "pentium-np*11");
36899 break;
36900 case 1:
36901 fprintf (f, "pentium-np*12");
36902 break;
36903 case 2:
36904 fprintf (f, "(pentium-np+pentium-fp)");
36905 break;
36906 case 3:
36907 fprintf (f, "pentium-np*2");
36908 break;
36909 case 4:
36910 fprintf (f, "(pentium-fp+pentium-np)");
36911 break;
36912 case 5:
36913 fprintf (f, "((pentium-fp+pentium-np))*3");
36914 break;
36915 case 6:
36916 fprintf (f, "((pentium-fp+pentium-np))*2");
36917 break;
36918 case 7:
36919 fprintf (f, "pentium-firstuv");
36920 break;
36921 case 8:
36922 fprintf (f, "pentium-firstuv");
36923 break;
36924 case 9:
36925 fprintf (f, "pentium-firstuv");
36926 break;
36927 case 10:
36928 fprintf (f, "pentium-firstv,pentium-v*9");
36929 break;
36930 case 11:
36931 fprintf (f, "pentium-firstv");
36932 break;
36933 case 12:
36934 fprintf (f, "(pentium-firstu+pentium-fp),nothing,nothing");
36935 break;
36936 case 13:
36937 fprintf (f, "(pentium-firstuv+pentium-fp+pentium-fmul),pentium-fmul,nothing");
36938 break;
36939 case 14:
36940 fprintf (f, "(pentium-np+pentium-fp+pentium-fmul),((pentium-fp+pentium-fmul))*36,pentium-fmul*2");
36941 break;
36942 case 15:
36943 fprintf (f, "(pentium-np+pentium-fp+pentium-fmul),((pentium-fp+pentium-fmul))*67,pentium-fmul*2");
36944 break;
36945 case 16:
36946 fprintf (f, "pentium-firstuvboth,(pentium-uv+pentium-memory),pentium-uv");
36947 break;
36948 case 17:
36949 fprintf (f, "pentium-firstuboth,(pentium-u+pentium-memory),pentium-u");
36950 break;
36951 case 18:
36952 fprintf (f, "pentium-firstvboth,(pentium-v+pentium-memory),pentium-v");
36953 break;
36954 case 19:
36955 fprintf (f, "pentium-np,pentium-np,pentium-np");
36956 break;
36957 case 20:
36958 fprintf (f, "pentium-firstuvload,pentium-uv");
36959 break;
36960 case 21:
36961 fprintf (f, "pentium-firstuload,pentium-u");
36962 break;
36963 case 22:
36964 fprintf (f, "pentium-firstvload,pentium-v");
36965 break;
36966 case 23:
36967 fprintf (f, "pentium-np,pentium-np");
36968 break;
36969 case 24:
36970 fprintf (f, "pentium-firstuv");
36971 break;
36972 case 25:
36973 fprintf (f, "pentium-firstu");
36974 break;
36975 case 26:
36976 fprintf (f, "pentium-firstv");
36977 break;
36978 case 27:
36979 fprintf (f, "pentium-np");
36980 break;
36981 default:
36982 fprintf (f, "nothing");
36983 }
36984 }
36985
36986 void
36987 dfa_start ()
36988 {
36989 int i;
36990
36991 dfa_insn_codes_length = get_max_uid ();
36992 dfa_insn_codes = (int *) xmalloc (dfa_insn_codes_length * sizeof (int));
36993 for (i = 0; i < dfa_insn_codes_length; i++)
36994 dfa_insn_codes [i] = -1;
36995 }
36996
36997 void
36998 dfa_finish ()
36999 {
37000 free (dfa_insn_codes);
37001 }
37002
37003 int length_unit_log = 0;