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00063 #define __STDC_LIMIT_MACROS
00064 #include <stdint.h>
00065
00066 #include <errno.h>
00067 #include <elf_stuff.h>
00068 #if ! defined(BUILD_OS_DARWIN)
00069 #include <elf.h>
00070 #endif
00071 #include <sys/elf_whirl.h>
00072 #include <ctype.h>
00073 #include "defs.h"
00074 #include "config.h"
00075 #include "config_debug.h"
00076 #include "config_list.h"
00077 #include "config_targ_opt.h"
00078 #include "config_opt.h"
00079 #include "cg_flags.h"
00080 #include "controls.h"
00081 #include "flags.h"
00082 #include "erglob.h"
00083 #include "erlib.h"
00084 #include "errors.h"
00085 #if !defined(TARG_NVISA)
00086 #include "erauxdesc.h"
00087 #endif
00088 #include "ercg.h"
00089 #include "file_util.h"
00090 #include "glob.h"
00091 #include "timing.h"
00092 #include "tracing.h"
00093 #include "util.h"
00094 #include "mempool.h"
00095
00096 #include "wn.h"
00097 #include "opt_alias_interface.h"
00098 #include "dwarf_DST_mem.h"
00099
00100 #include "bb.h"
00101 #include "cg.h"
00102 #include "cgemit.h"
00103 #include "cg_swp_options.h"
00104 #include "gra.h"
00105 #include "ebo.h"
00106 #include "cgprep.h"
00107 #include "cg_dep_graph.h"
00108 #include "cg_dep_graph_update.h"
00109 #include "cio.h"
00110 #include "cg_loop.h"
00111 #include "cg_loop_recur.h"
00112 #include "cgtarget.h"
00113 #include "gcm.h"
00114 #include "cg_sched_est.h"
00115 #include "targ_proc_properties.h"
00116 #include "cgdriver_arch.h"
00117 #include "cgdriver.h"
00118 #include "register.h"
00119 #include "pqs_cg.h"
00120 #ifdef TARG_IA64
00121 #include "ipfec_options.h"
00122 #endif
00123 #ifdef KEY
00124 #include "cg_gcov.h"
00125 #include "flags.h"
00126 #endif
00127 #include "cg_swp.h"
00128
00129 extern void Set_File_In_Printsrc(char *);
00130
00131 extern char *WHIRL_File_Name;
00132
00133
00134
00135
00136
00137
00138
00139
00140
00141 BOOL Assembly = FALSE;
00142 BOOL Object_Code = FALSE;
00143
00144
00145 BOOL Regcopies_Translated = FALSE;
00146
00147
00148
00149
00150
00151
00152
00153
00154 static char *Argv0;
00155
00156
00157 #define ASM_FILE_EXTENSION ".s"
00158 #define OBJ_FILE_EXTENSION ".o"
00159 #define DSTDUMP_FILE_EXTENSION ".be.dst"
00160
00161
00162 static BOOL cg_opt_level_overridden = FALSE;
00163
00164 static BOOL CG_tail_call_overridden = FALSE;
00165 static BOOL CG_enable_prefetch_overridden = FALSE;
00166 static BOOL CG_enable_z_conf_prefetch_overridden = FALSE;
00167 static BOOL CG_enable_nz_conf_prefetch_overridden = FALSE;
00168 static BOOL CG_enable_pf_L1_ld_overridden = FALSE;
00169 static BOOL CG_enable_pf_L1_st_overridden = FALSE;
00170 static BOOL CG_enable_pf_L2_ld_overridden = FALSE;
00171 static BOOL CG_enable_pf_L2_st_overridden = FALSE;
00172 static BOOL CG_L1_ld_latency_overridden;
00173 static BOOL CG_L2_ld_latency_overridden;
00174 static BOOL CG_L1_pf_latency_overridden;
00175 static BOOL CG_L2_pf_latency_overridden;
00176 static BOOL CG_maxinss_overridden = FALSE;
00177 static BOOL Enable_CG_Peephole_overridden = FALSE;
00178 static BOOL EBO_Opt_Level_overridden = FALSE;
00179 static BOOL Integer_Divide_By_Constant_overridden = FALSE;
00180 static BOOL Integer_Divide_Use_Float_overridden = FALSE;
00181 #ifdef TARG_IA64
00182 static BOOL CGPREP_fold_expanded_daddiu_overridden = FALSE;
00183 static BOOL CG_LOOP_create_loop_prologs_overridden = FALSE;
00184 #endif
00185 #ifdef KEY
00186 static BOOL Integer_Multiply_By_Constant_overridden = FALSE;
00187 #endif
00188 static BOOL CG_DEP_Mem_Arc_Pruning_overridden = FALSE;
00189 static BOOL clone_incr_overridden = FALSE;
00190 static BOOL clone_min_incr_overridden = FALSE;
00191 static BOOL clone_max_incr_overridden = FALSE;
00192 static BOOL CFLOW_Enable_Clone_overridden = FALSE;
00193 #ifdef TARG_X8664
00194 BOOL cg_load_execute_overridden = FALSE;
00195 #endif
00196 #ifdef TARG_NVISA
00197 static BOOL CG_use_16bit_ops_overridden = FALSE;
00198 static BOOL CG_rematerialize_grf_overridden= FALSE;
00199 #endif
00200
00201
00202 static char *option_string;
00203
00204 #ifdef TARG_IA64
00205 extern BOOL SWP_KNOB_fatpoint;
00206 #endif
00207
00208 #if !defined(TARG_NVISA)
00209
00210 static OPTION_DESC Options_CG_SWP[] = {
00211
00212
00213
00214 { OVK_BOOL, OV_INTERNAL, TRUE, "", NULL,
00215 0, 0, 0, &Enable_SWP, &Enable_SWP_overridden },
00216
00217 { OVK_INT32, OV_INTERNAL, TRUE, "sched_direction", "sched_dir",
00218 0, 0, INT32_MAX, &SWP_Options.Sched_Direction, NULL },
00219 { OVK_INT32, OV_INTERNAL, TRUE, "heuristics", "heur",
00220 0, 0, INT32_MAX, &SWP_Options.Heuristics, NULL },
00221 { OVK_INT32, OV_INTERNAL, TRUE, "opt", "opt",
00222 0, 0, INT32_MAX, &SWP_Options.Opt_Level, NULL },
00223 #ifdef TARG_IA64
00224 { OVK_BOOL, OV_INTERNAL, TRUE, "do_loop", NULL,
00225 0, 0, 0, &SWP_Options.Enable_Do_Loop, NULL },
00226 #endif
00227 { OVK_BOOL, OV_INTERNAL, TRUE, "while_loop", NULL,
00228 0, 0, 0, &SWP_Options.Enable_While_Loop, NULL },
00229 #ifdef TARG_IA64
00230 { OVK_INT32, OV_INTERNAL, TRUE, "miss_ratio", "miss_r",
00231 0, 0, INT32_MAX, &SWP_Options.Load_Cache_Miss_Ratio, NULL },
00232 { OVK_INT32, OV_INTERNAL, TRUE, "miss_latency", "miss_l",
00233 0, 0, INT32_MAX, &SWP_Options.Load_Cache_Miss_Latency, NULL },
00234 #endif
00235 { OVK_INT32, OV_INTERNAL, TRUE, "min_unroll_times", "min_unr",
00236 0, 0, INT32_MAX, &SWP_Options.Min_Unroll_Times, &SWP_Options.Max_Unroll_Times_Set },
00237 { OVK_INT32, OV_INTERNAL, TRUE, "max_unroll_times", "max_unr",
00238 0, 0, INT32_MAX, &SWP_Options.Max_Unroll_Times, &SWP_Options.Max_Unroll_Times_Set },
00239 { OVK_BOOL, OV_INTERNAL, TRUE, "bundle", NULL,
00240 TRUE, 0, 0, &SWP_Options.Enable_Bundling, NULL },
00241 { OVK_BOOL, OV_INTERNAL, TRUE, "postincr", "posti",
00242 0, 0, 0, &SWP_Options.Enable_Post_Incr, NULL },
00243 { OVK_INT32, OV_INTERNAL, TRUE, "start_ii", "start",
00244 0, 0, INT32_MAX, &SWP_Options.Starting_II, NULL },
00245 { OVK_BOOL, OV_INTERNAL, TRUE, "workaround", "work",
00246 0, 0, 0, &SWP_Options.Enable_Workaround, NULL },
00247 { OVK_INT32, OV_INTERNAL, TRUE, "critical_threshold", "critical",
00248 0, 0, INT32_MAX, &SWP_Options.Critical_Threshold, NULL },
00249 { OVK_BOOL, OV_INTERNAL, TRUE, "prep_only", "",
00250 0, 0, 0, &SWP_Options.Prep_Only, NULL },
00251 { OVK_BOOL, OV_INTERNAL, TRUE, "min_retry", "",
00252 0, 0, 0, &SWP_Options.Min_Retry, NULL },
00253 { OVK_BOOL, OV_INTERNAL, TRUE, "implicit_prefetch", "",
00254 0, 0, 0, &SWP_Options.Implicit_Prefetch, &SWP_Options.Implicit_Prefetch_Set },
00255 { OVK_BOOL, OV_INTERNAL, TRUE, "predicate_promotion", "",
00256 0, 0, 0, &SWP_Options.Predicate_Promotion, NULL },
00257 { OVK_BOOL, OV_INTERNAL, TRUE, "enable_brp", "",
00258 0, 0, 0, &SWP_Options.Enable_BRP, NULL },
00259 #ifdef TARG_IA64
00260 { OVK_INT32, OV_INTERNAL, TRUE, "fb_prob1", "",
00261 0, 0, INT32_MAX, &SWP_Options.FB_Prob1, NULL },
00262 { OVK_INT32, OV_INTERNAL, TRUE, "fb_prob2", "",
00263 0, 0, INT32_MAX, &SWP_Options.FB_Prob2, NULL },
00264 { OVK_INT32, OV_INTERNAL, TRUE, "fb_freq", "",
00265 0, 0, INT32_MAX, &SWP_Options.FB_Freq, NULL },
00266 #endif
00267 #ifdef SWP_USE_STL
00268 { OVK_INT32, OV_INTERNAL, TRUE, "ops_limit", NULL,
00269 SWP_OPS_LIMIT, 0, INT32_MAX, &SWP_Options.OPS_Limit, NULL },
00270 #else
00271 { OVK_INT32, OV_INTERNAL, TRUE, "ops_limit", NULL,
00272 SWP_OPS_LIMIT, 0, SWP_OPS_LIMIT, &SWP_Options.OPS_Limit, NULL },
00273 #endif
00274 { OVK_COUNT }
00275 };
00276
00277
00278 static OPTION_DESC Options_GRA[] = {
00279 { OVK_BOOL, OV_INTERNAL, TRUE, "optimize_placement", "",
00280 0,0,0, &GRA_optimize_placement, NULL,
00281 "Enable/disable movement of spills and restores created during splitting [Default TRUE]."
00282 },
00283 #ifdef TARG_X8664
00284 { OVK_INT32, OV_INTERNAL, TRUE, "local_forced_max", "local_forced_max",
00285 4, 0, 16, &GRA_local_forced_max, &GRA_local_forced_max_set,
00286 "How many locals to force allocate (out of the number requested by LRA) [Default 4]"
00287 },
00288 #else
00289 { OVK_INT32, OV_INTERNAL, TRUE, "local_forced_max", "",
00290 4, 0, 32, &GRA_local_forced_max, NULL,
00291 "How many locals to force allocate (out of the number requested by LRA) [Default 4]"
00292 },
00293 #endif // TARG_X8664
00294 { OVK_BOOL, OV_INTERNAL, TRUE, "avoid_glue_references_for_locals", "",
00295 0,0,0, &GRA_avoid_glue_references_for_locals,NULL,
00296 "If possible grant the forced locals from the set of registers not referenced for glue copies in the same block. [Default TRUE]"
00297 },
00298 { OVK_BOOL, OV_INTERNAL, TRUE, "split_entry_exit_blocks", "",
00299 0,0,0, &GRA_split_entry_exit_blocks,NULL,
00300 "Enable/Disable splitting of entry/exit blocks for callee saved preferencing [Default TRUE]"
00301 },
00302 { OVK_BOOL, OV_INTERNAL, TRUE, "split_lranges", "",
00303 0,0,0, &GRA_split_lranges, NULL,
00304 "Turn on/off splitting of live ranges [Default TRUE]"
00305 },
00306 { OVK_INT32, OV_INTERNAL, TRUE, "non_split_tn", "",
00307 4, 0, INT32_MAX, &GRA_non_split_tn_id, NULL,
00308 "Turn off live range splitting for a given TN specified by its tn number (n). [Default -1]"
00309 },
00310 { OVK_INT32, OV_INTERNAL, TRUE, "non_preference_tn", "",
00311 4, 0, INT32_MAX, &GRA_non_preference_tn_id, NULL,
00312 "Turn off preferencing for a given TN specified by its tn number (n). [Default -1]"
00313 },
00314 { OVK_BOOL, OV_INTERNAL, TRUE, "use_old_conflict", "",
00315 0,0,0, &GRA_use_old_conflict, NULL,
00316 "Use old conflict graph algorithm ... not functioning at present."
00317 },
00318 { OVK_BOOL, OV_INTERNAL, TRUE, "shrink_wrap", "",
00319 0,0,0, &GRA_shrink_wrap, NULL,
00320 "Turn on/off shrink wrapping (currently, only for callee saved regs) [Default TRUE]"
00321 },
00322 { OVK_BOOL, OV_INTERNAL, TRUE, "loop_splitting", "",
00323 0,0,0, &GRA_loop_splitting, NULL,
00324 "Turn on/off loop directed live range splitting [Default TRUE]",
00325 },
00326 { OVK_BOOL, OV_INTERNAL, TRUE, "home", "",
00327 0,0,0, &GRA_home, NULL,
00328 "Turn on/off gra homing [Default FALSE]"
00329 },
00330 { OVK_BOOL, OV_INTERNAL, TRUE, "remove_spills", "",
00331 0,0,0, &GRA_remove_spills, NULL,
00332 "Turn on/off gra removal of spill instructions in Optimize_Placment [Default TRUE]"
00333 },
00334 { OVK_BOOL, OV_INTERNAL, TRUE, "ensure_spill_proximity", "",
00335 0,0,0, &GRA_ensure_spill_proximity, NULL,
00336 "Turn on/off gra placing spills close to use/def in block [Default TRUE]"
00337 },
00338 { OVK_BOOL, OV_INTERNAL, TRUE, "choose_best_split", "",
00339 0,0,0, &GRA_choose_best_split, NULL,
00340 "Turn on/off gra choosing best/smallest interim split found [Default TRUE]"
00341 },
00342 { OVK_BOOL, OV_INTERNAL, TRUE, "use_stacked_regs", "",
00343 0,0,0, &GRA_use_stacked_regs, NULL,
00344 "Turn on/off gra using stacked registers [Default TRUE]"
00345 },
00346 { OVK_BOOL, OV_INTERNAL, TRUE, "redo_liveness", "",
00347 0,0,0, &GRA_redo_liveness, NULL,
00348 "Turn on/off recalculation of liveness [Default FALSE]"
00349 },
00350 { OVK_BOOL, OV_INTERNAL, TRUE, "preference_globals", "",
00351 0,0,0, &GRA_preference_globals, NULL,
00352 "Turn on/off gra preferencing of global TNs (other than glue code) [Default TRUE]"
00353 },
00354 { OVK_BOOL, OV_INTERNAL, TRUE, "preference_dedicated", "",
00355 0,0,0, &GRA_preference_dedicated, NULL,
00356 "Turn on/off gra preferencing with dedicated TNs [Default TRUE]"
00357 },
00358 { OVK_BOOL, OV_INTERNAL, TRUE, "preference_glue", "",
00359 0,0,0, &GRA_preference_glue, NULL,
00360 "Turn on/off gra preferencing in glue code [Default TRUE]"
00361 },
00362 { OVK_BOOL, OV_INTERNAL, TRUE, "preference_all", "",
00363 0,0,0, &GRA_preference_all, NULL,
00364 "Turn on/off all gra preferencing [Default TRUE]"
00365 },
00366 { OVK_INT32, OV_INTERNAL, TRUE, "non_home_low", "",
00367 4, 0, INT32_MAX, &GRA_non_home_lo, NULL,
00368 "Turn off homing for a TN range specified by its tn numbers. [Default INT32_MAX]"
00369 },
00370 { OVK_INT32, OV_INTERNAL, TRUE, "non_home_hi", "",
00371 4, 0, INT32_MAX, &GRA_non_home_hi, NULL,
00372 "Turn off homing for a TN range specified by its tn numbers. [Default -1]"
00373 },
00374 { OVK_BOOL, OV_INTERNAL, TRUE, "recalc_liveness", "",
00375 0,0,0, &GRA_recalc_liveness, NULL,
00376 "Turn on/off recomputation of global liveness info [Default FALSE]"
00377 },
00378 { OVK_NAME, OV_INTERNAL, TRUE,"call_split_freq", "",
00379 0, 0, 0, &GRA_call_split_freq_string, NULL,
00380 "Threshold frequency of block containing a call below which a caller saved register will be preferred and live ranges spanning it will be split [Default .1]"
00381 },
00382 { OVK_NAME, OV_INTERNAL, TRUE,"spill_count_factor", "",
00383 0, 0, 0, &GRA_spill_count_factor_string, NULL,
00384 "Factor by which count of spills affects the priority of a split. Only valid under OPT:space [Default 0.5]"
00385 },
00386 #ifdef KEY
00387 { OVK_BOOL, OV_INTERNAL, TRUE,"exclude_saved_regs", "",
00388 0, 0, 0, &GRA_exclude_callee_saved_regs, NULL,
00389 "If true, callee-saved registers are never used to allocate to variables by GRA"
00390 },
00391 { OVK_BOOL, OV_INTERNAL, TRUE,"eh_exclude_saved_regs", "",
00392 0, 0, 0, &GRA_eh_exclude_callee_saved_regs, NULL,
00393 "If true, callee-saved registers are never used to allocate to variables in functions with exception handlers"
00394 },
00395 { OVK_BOOL, OV_INTERNAL, TRUE,"fp_exclude_saved_regs", "",
00396 0, 0, 0, &GRA_fp_exclude_callee_saved_regs, NULL,
00397 "If true, floating-point callee-saved registers are never used to allocate to variables by GRA"
00398 },
00399 { OVK_BOOL, OV_INTERNAL, TRUE, "optimize_boundary", "",
00400 0,0,0, &GRA_optimize_boundary, &GRA_optimize_boundary_set,
00401 "Enable/disable reuse of registers in live range boundary basic blocks [Default FALSE]."
00402 },
00403 { OVK_BOOL, OV_INTERNAL, TRUE, "prioritize_by_density", "",
00404 0,0,0, &GRA_prioritize_by_density, &GRA_prioritize_by_density_set,
00405 "Enable/disable prioritizing live ranges by reference density [Default FALSE]."
00406 },
00407 { OVK_BOOL, OV_INTERNAL, TRUE, "reclaim", "",
00408 0,0,0, &GRA_reclaim_register, &GRA_reclaim_register_set,
00409 "Enable/disable reclaiming of registers after they have been allocated [Default FALSE]."
00410 },
00411 #endif // KEY
00412 #ifdef TARG_X8664
00413 { OVK_BOOL, OV_INTERNAL, TRUE, "grant_special_regs", "",
00414 0,0,0, &GRA_grant_special_regs, NULL,
00415 "Force GRA to always grant rax/rcx/rdx, whether LRA needs them or not."
00416 },
00417 #endif
00418 { OVK_COUNT }
00419 };
00420 #endif // ! TARG_NVISA
00421
00422 static OPTION_DESC Options_CG[] = {
00423
00424
00425
00426 { OVK_BOOL, OV_INTERNAL, TRUE, "warn_bad_freqs", "",
00427 0, 0, 0, &CG_warn_bad_freqs, NULL },
00428 #ifdef TARG_IA64
00429 { OVK_BOOL, OV_INTERNAL, TRUE, "loop_opt", "loop_opt",
00430 0, 0, 0, &CG_enable_loop_optimizations, NULL },
00431 { OVK_BOOL, OV_INTERNAL, TRUE, "tune_do_loop", "tune_do_loop",
00432 0, 0, 0, &CG_tune_do_loop, NULL },
00433 #endif
00434 { OVK_INT32, OV_INTERNAL, TRUE, "skip_before", "skip_b",
00435 0, 0, INT32_MAX, &CG_skip_before, NULL },
00436 { OVK_INT32, OV_INTERNAL, TRUE, "skip_after", "skip_a",
00437 0, 0, INT32_MAX, &CG_skip_after, NULL },
00438 { OVK_INT32, OV_INTERNAL, TRUE, "skip_equal", "skip_e",
00439 0, 0, INT32_MAX, &CG_skip_equal, NULL },
00440 { OVK_INT32, OV_INTERNAL, TRUE, "local_skip_before", "local_skip_b",
00441 0, 0, INT32_MAX, &CG_local_skip_before, NULL },
00442 { OVK_INT32, OV_INTERNAL, TRUE, "local_skip_after", "local_skip_a",
00443 0, 0, INT32_MAX, &CG_local_skip_after, NULL },
00444 { OVK_INT32, OV_INTERNAL, TRUE, "local_skip_equal", "local_skip_e",
00445 0, 0, INT32_MAX, &CG_local_skip_equal, NULL },
00446 #ifdef TARG_NVISA
00447 { OVK_BOOL, OV_INTERNAL, TRUE, "skip_local_16bit", "",
00448 0, 0, 0, &CG_skip_local_16bit, NULL },
00449 #else
00450 { OVK_BOOL, OV_INTERNAL, TRUE, "skip_local_hbf", "",
00451 0, 0, 0, &CG_skip_local_hbf, NULL },
00452 { OVK_BOOL, OV_INTERNAL, TRUE, "skip_local_loop", "",
00453 0, 0, 0, &CG_skip_local_loop, NULL },
00454 { OVK_BOOL, OV_INTERNAL, TRUE, "skip_local_swp", "",
00455 0, 0, 0, &CG_skip_local_swp, NULL },
00456 { OVK_BOOL, OV_INTERNAL, TRUE, "skip_local_ebo", "",
00457 0, 0, 0, &CG_skip_local_ebo, NULL },
00458 { OVK_BOOL, OV_INTERNAL, TRUE, "skip_local_sched", "",
00459 0, 0, 0, &CG_skip_local_sched, NULL },
00460 #endif //TARG_NVISA
00461 { OVK_INT32, OV_INTERNAL, TRUE, "optimization_level", "opt",
00462 0, 0, MAX_OPT_LEVEL,
00463 &CG_opt_level, &cg_opt_level_overridden },
00464
00465 #ifdef TARG_NVISA
00466 { OVK_BOOL, OV_INTERNAL, TRUE, "optimize_copies", "",
00467 0, 0, 0, &CG_optimize_copies, NULL },
00468 { OVK_BOOL, OV_INTERNAL, TRUE, "remove_typeconv", "",
00469 0, 0, 0, &CG_remove_typeconv, NULL },
00470 { OVK_BOOL, OV_INTERNAL, TRUE, "rematerialize_grf", "",
00471 0, 0, 0, &CG_rematerialize_grf, &CG_rematerialize_grf_overridden},
00472 { OVK_BOOL, OV_INTERNAL, TRUE, "use_16bit_ops", "",
00473 0, 0, 0, &CG_use_16bit_ops, &CG_use_16bit_ops_overridden},
00474 { OVK_BOOL, OV_INTERNAL, TRUE, "vector_loadstore", "",
00475 0, 0, 0, &CG_vector_loadstore, NULL },
00476 { OVK_BOOL, OV_INTERNAL, TRUE,"cflow", NULL,
00477 0, 0, 0, &CFLOW_Enable, NULL },
00478 #endif
00479
00480 #if !defined(TARG_NVISA)
00481
00482 { OVK_BOOL, OV_INTERNAL, TRUE, "peephole_optimize", "",
00483 0, 0, 0, &Enable_CG_Peephole, &Enable_CG_Peephole_overridden },
00484 #ifdef TARG_IA64
00485 { OVK_BOOL, OV_INTERNAL, TRUE, "ebo_post_proc_rgn", "",
00486 0, 0, 0, &Enable_EBO_Post_Proc_Rgn , NULL},
00487 #endif
00488 { OVK_BOOL, OV_INTERNAL, TRUE, "create_madds", "create_madd",
00489 0, 0, 0, &CG_create_madds, NULL },
00490 #ifdef TARG_IA64
00491 { OVK_BOOL, OV_INTERNAL, TRUE, "enable_ipfec_phases", "enable_ipfec",
00492 0,0,0, &CG_Enable_Ipfec_Phases, NULL },
00493 { OVK_BOOL, OV_INTERNAL, TRUE, "enable_cycle_counting", "enable_cycle",
00494 0,0,0, &CG_Enable_Cycle_Count, NULL },
00495 #endif
00496 #ifdef KEY
00497 { OVK_BOOL, OV_INTERNAL, TRUE, "test_coverage", "",
00498 0, 0, 0, &flag_test_coverage, NULL},
00499 { OVK_LIST, OV_INTERNAL, FALSE, "profile_proc", "",
00500 0, 0, 0, &Arc_Profile_Region, NULL},
00501 { OVK_LIST, OV_INTERNAL, FALSE, "profile_id1", "",
00502 0, 0, 0, &Arc_Profile_Region, NULL},
00503 { OVK_LIST, OV_INTERNAL, FALSE, "profile_id2", "",
00504 0, 0, 0, &Arc_Profile_Region, NULL},
00505 { OVK_INT32, OV_INTERNAL, FALSE, "cse_regs", "",
00506 0, INT32_MIN, INT32_MAX, &CG_cse_regs, NULL},
00507 { OVK_INT32, OV_INTERNAL, FALSE, "sse_cse_regs", "",
00508 0, INT32_MIN, INT32_MAX, &CG_sse_cse_regs, NULL},
00509 #endif
00510 #ifdef TARG_X8664
00511 { OVK_INT32, OV_INTERNAL, TRUE, "sse_load_execute", "sse_load_exe",
00512 0, 0, INT32_MAX, &CG_sse_load_execute, NULL},
00513 { OVK_INT32, OV_INTERNAL, TRUE, "load_execute", "load_exe",
00514 0, 0, INT32_MAX, &CG_load_execute, &cg_load_execute_overridden },
00515 { OVK_BOOL, OV_INTERNAL, TRUE, "loadbw_execute", "loadbw_exe",
00516 0, 0, 0, &CG_loadbw_execute, NULL },
00517 { OVK_BOOL, OV_INTERNAL, TRUE, "valgrind_friendly", "valgrind",
00518 0, 0, 0, &CG_valgrind_friendly, NULL },
00519 #endif
00520
00521
00522
00523 { OVK_BOOL, OV_INTERNAL, TRUE, "ignore_lno", "",
00524 0, 0, 0, &CG_DEP_Ignore_LNO, NULL },
00525 { OVK_BOOL, OV_INTERNAL, TRUE, "ignore_wopt", "",
00526 0, 0, 0, &CG_DEP_Ignore_WOPT, NULL },
00527 { OVK_BOOL, OV_INTERNAL, TRUE, "addr_analysis", "",
00528 0, 0, 0, &CG_DEP_Addr_Analysis, NULL },
00529 { OVK_BOOL, OV_INTERNAL, TRUE, "verify_mem_deps", "",
00530 0, 0, 0, &CG_DEP_Verify_Mem_Deps, NULL },
00531 { OVK_BOOL, OV_INTERNAL, TRUE, "add_alloca_arcs", "",
00532 0, 0, 0, &CG_DEP_Add_Alloca_Arcs, NULL },
00533 { OVK_BOOL, OV_INTERNAL, TRUE, "relax_xfer_depndnce", "",
00534 0, 0, 0, &CG_DEP_Relax_Xfer_Dependence, NULL },
00535 { OVK_BOOL, OV_INTERNAL, TRUE, "adjust_ooo_latency", "adjust_ooo_latency",
00536 0, 0, 0, &CG_DEP_Adjust_OOO_Latency, NULL },
00537 { OVK_INT32, OV_INTERNAL, TRUE, "prune_mem", "",
00538 0, 0, INT32_MAX, &CG_DEP_Mem_Arc_Pruning,
00539 &CG_DEP_Mem_Arc_Pruning_overridden },
00540 { OVK_BOOL, OV_INTERNAL, TRUE, "prune_depndnce", "",
00541 0, 0, 0, &CG_DEP_Prune_Dependence, NULL },
00542
00543
00544
00545 #ifdef TARG_IA64
00546 { OVK_BOOL, OV_INTERNAL, FALSE,"prefetch", "",
00547 #else
00548 { OVK_BOOL, OV_INTERNAL, TRUE,"prefetch", "",
00549 #endif
00550 0, 0, 0, &CG_enable_prefetch, &CG_enable_prefetch_overridden },
00551 { OVK_BOOL, OV_INTERNAL, TRUE,"z_conf_prefetch", "",
00552 0, 0, 0, &CG_enable_z_conf_prefetch,
00553 &CG_enable_z_conf_prefetch_overridden },
00554 { OVK_BOOL, OV_INTERNAL, TRUE,"nz_conf_prefetch", "",
00555 0, 0, 0, &CG_enable_nz_conf_prefetch,
00556 &CG_enable_nz_conf_prefetch_overridden },
00557 { OVK_BOOL, OV_INTERNAL, TRUE,"pf_L1_ld", "",
00558 0, 0, 0, &CG_enable_pf_L1_ld, &CG_enable_pf_L1_ld_overridden },
00559 { OVK_BOOL, OV_INTERNAL, TRUE,"pf_L1_st", "",
00560 0, 0, 0, &CG_enable_pf_L1_st, &CG_enable_pf_L1_st_overridden },
00561 { OVK_BOOL, OV_INTERNAL, TRUE,"pf_L2_ld", "",
00562 0, 0, 0, &CG_enable_pf_L2_ld, &CG_enable_pf_L2_ld_overridden },
00563 { OVK_BOOL, OV_INTERNAL, TRUE,"pf_L2_st", "",
00564 0, 0, 0, &CG_enable_pf_L2_st, &CG_enable_pf_L2_st_overridden },
00565 { OVK_BOOL, OV_INTERNAL, TRUE, "exclusive_prefetch", "",
00566 0, 0, 0, &CG_exclusive_prefetch, NULL },
00567 { OVK_INT32, OV_INTERNAL, TRUE, "L1_pf_latency", "",
00568 0, 0, INT32_MAX, &CG_L1_pf_latency, &CG_L1_pf_latency_overridden },
00569 { OVK_INT32, OV_INTERNAL, TRUE, "L2_pf_latency", "",
00570 0, 0, INT32_MAX, &CG_L2_pf_latency, &CG_L2_pf_latency_overridden },
00571 { OVK_INT32, OV_INTERNAL, TRUE, "L1_ld_latency", "",
00572 0, 0, INT32_MAX, &CG_L1_ld_latency, &CG_L1_ld_latency_overridden },
00573 { OVK_INT32, OV_INTERNAL, TRUE, "L2_ld_latency", "",
00574 0, 0, INT32_MAX, &CG_L2_ld_latency, &CG_L2_ld_latency_overridden },
00575 { OVK_INT32, OV_INTERNAL, TRUE, "z_conf_L1_ld_latency", "",
00576 0, 0, INT32_MAX, &CG_z_conf_L1_ld_latency, NULL },
00577 { OVK_INT32, OV_INTERNAL, TRUE, "z_conf_L2_ld_latency", "",
00578 0, 0, INT32_MAX, &CG_z_conf_L2_ld_latency, NULL },
00579 { OVK_INT32, OV_INTERNAL, TRUE, "ld_latency", "",
00580 0, 0, INT32_MAX, &CG_ld_latency, NULL },
00581
00582
00583
00584 { OVK_BOOL, OV_INTERNAL, TRUE, "loop_opt", "loop_opt",
00585 0, 0, 0, &CG_enable_loop_optimizations, NULL },
00586 { OVK_BOOL, OV_INTERNAL, TRUE, "opt_non_trip_countable", "opt_non_trip",
00587 0, 0, 0, &CG_LOOP_optimize_non_trip_countable, NULL },
00588 { OVK_BOOL, OV_INTERNAL, TRUE, "opt_lno_winddown_cache", NULL,
00589 0, 0, 0, &CG_LOOP_optimize_lno_winddown_cache, NULL },
00590 { OVK_BOOL, OV_INTERNAL, TRUE, "opt_lno_winddown_reg", NULL,
00591 0, 0, 0, &CG_LOOP_optimize_lno_winddown_reg, NULL },
00592 { OVK_BOOL, OV_INTERNAL, TRUE, "opt_non_innermost", "opt_non_inner",
00593 0, 0, 0, &CG_LOOP_optimize_non_innermost, NULL },
00594
00595 { OVK_BOOL, OV_INTERNAL, TRUE, "fix_recurrences", "",
00596 0, 0, 0, &CG_LOOP_fix_recurrences,
00597 &CG_LOOP_fix_recurrences_specified },
00598 { OVK_BOOL, OV_INTERNAL, TRUE, "back_substitution", "",
00599 0, 0, 0, &CG_LOOP_back_substitution,
00600 &CG_LOOP_back_substitution_specified },
00601 { OVK_BOOL, OV_INTERNAL, TRUE, "back_substitution_variant", "",
00602 0, 0, 0, &CG_LOOP_back_substitution_variant,
00603 &CG_LOOP_back_substitution_variant_specified },
00604 { OVK_BOOL, OV_INTERNAL, TRUE, "interleave_reductions", "",
00605 0, 0, 0, &CG_LOOP_interleave_reductions,
00606 &CG_LOOP_interleave_reductions_specified },
00607 { OVK_BOOL, OV_INTERNAL, TRUE, "interleave_posti", "",
00608 0, 0, 0, &CG_LOOP_interleave_posti,
00609 &CG_LOOP_interleave_posti_specified },
00610 { OVK_BOOL, OV_INTERNAL, TRUE, "reassociate", "reassoc",
00611 0, 0, 0, &CG_LOOP_reassociate,
00612 &CG_LOOP_reassociate_specified },
00613 { OVK_INT32, OV_INTERNAL, TRUE, "recurrence_min_omega", "",
00614 0, 0, INT32_MAX, &CG_LOOP_recurrence_min_omega, NULL },
00615 #ifdef KEY
00616 { OVK_INT32, OV_INTERNAL, TRUE, "recurrence_max_omega", "",
00617 0, 0, 16, &CG_LOOP_recurrence_max_omega, NULL },
00618 { OVK_INT32, OV_INTERNAL, TRUE, "loop_limit", "",
00619 INT32_MAX, 0, INT32_MAX, &CG_Enable_Loop_Opt_Limit, NULL },
00620 #endif
00621 #ifdef TARG_X8664
00622 { OVK_BOOL, OV_INTERNAL, TRUE, "cloop", "",
00623 0, 0, 0, &CG_LOOP_cloop, NULL },
00624 #endif
00625 #if defined(TARG_SL)
00626 { OVK_BOOL, OV_INTERNAL, FALSE, "zero_delay_loop", "zero_delay_loop",
00627 0, 0, 0, &CG_enable_zero_delay_loop, NULL },
00628 { OVK_INT32, OV_INTERNAL, TRUE, "zdl_enabled_level", "",
00629 INT32_MAX, 0, INT32_MAX, &CG_zdl_enabled_level, NULL },
00630 { OVK_INT32, OV_INTERNAL, TRUE, "zdl_skip_e", "",
00631 INT32_MAX, 0, INT32_MAX, &CG_zdl_skip_e, NULL },
00632 { OVK_INT32, OV_INTERNAL, TRUE, "zdl_skip_a", "",
00633 INT32_MAX, 0, INT32_MAX, &CG_zdl_skip_a, NULL },
00634 { OVK_INT32, OV_INTERNAL, TRUE, "zdl_skip_b", "",
00635 INT32_MAX, 0, INT32_MAX, &CG_zdl_skip_b, NULL },
00636 { OVK_BOOL, OV_INTERNAL, TRUE, "opt_condmv", "",
00637 0, 0, 0, &CG_enable_opt_condmv, NULL},
00638
00639
00640
00641 { OVK_NAME, OV_INTERNAL, TRUE,"app_name", "",
00642 0, 0, 0, &App_Name, NULL },
00643
00644 { OVK_NAME, OV_INTERNAL, TRUE,"cand_pattern", "",
00645 0, 0, 0, &Cand_List_Pattern, NULL },
00646
00647 #endif
00648
00649
00650 { OVK_BOOL, OV_INTERNAL, TRUE,"unroll_non_trip_countable", "unroll_non_trip",
00651 0, 0, 0, &CG_LOOP_unroll_non_trip_countable, NULL },
00652 { OVK_BOOL, OV_INTERNAL, TRUE,"unroll_fully", "unroll_full",
00653 0, 0, 0, &CG_LOOP_unroll_fully, NULL },
00654 { OVK_BOOL, OV_INTERNAL, TRUE,"unroll_remainder_fully", "unroll_remainder_full",
00655 0, 0, 0, &CG_LOOP_unroll_remainder_fully, NULL },
00656
00657
00658
00659 { OVK_BOOL, OV_INTERNAL, TRUE, "cio_copy_removal", "",
00660 0, 0, 0, &CIO_enable_copy_removal, NULL },
00661 { OVK_BOOL, OV_INTERNAL, TRUE, "cio_read_removal", "",
00662 0, 0, 0, &CIO_enable_read_removal, NULL },
00663 { OVK_BOOL, OV_INTERNAL, TRUE, "cio_write_removal", "",
00664 0, 0, 0, &CIO_enable_write_removal, NULL },
00665 { OVK_BOOL, OV_INTERNAL, TRUE, "cio_cse_removal", "",
00666 0, 0, 0, &CIO_enable_cse_removal, NULL },
00667 { OVK_INT32, OV_INTERNAL, TRUE, "cio_rw_max_omega", "",
00668 8, 0, INT32_MAX, &CIO_rw_max_omega, NULL },
00669
00670
00671
00672 { OVK_BOOL, OV_INTERNAL, TRUE, "unique_exit", "",
00673 0, 0, 0, &CG_unique_exit, NULL },
00674 { OVK_BOOL, OV_INTERNAL, TRUE, "tail_call", "",
00675 0, 0, 0, &CG_tail_call, &CG_tail_call_overridden },
00676 { OVK_BOOL, OV_INTERNAL, TRUE,"cflow_before_cgprep", NULL,
00677 0, 0, 0, &CFLOW_opt_before_cgprep, NULL },
00678 { OVK_BOOL, OV_INTERNAL, TRUE,"cflow_after_cgprep", "cflow_after_cgprep",
00679 0, 0, 0, &CFLOW_opt_after_cgprep, NULL },
00680 { OVK_INT32, OV_INTERNAL, TRUE,"ebo_level", "ebo",
00681 0, INT32_MIN, INT32_MAX, &EBO_Opt_Level, &EBO_Opt_Level_overridden },
00682 #ifdef KEY
00683 { OVK_INT32, OV_INTERNAL, TRUE,"ebo_opt_mask", "",
00684 0, INT32_MIN, INT32_MAX, &EBO_Opt_Mask, NULL },
00685 #endif
00686 { OVK_BOOL, OV_INTERNAL, TRUE,"cflow", NULL,
00687 0, 0, 0, &CFLOW_Enable, NULL },
00688 { OVK_BOOL, OV_INTERNAL, TRUE,"cflow_unreachable", "",
00689 0, 0, 0, &CFLOW_Enable_Unreachable, NULL },
00690 { OVK_BOOL, OV_INTERNAL, TRUE,"cflow_branch", "",
00691 0, 0, 0, &CFLOW_Enable_Branch, NULL },
00692 { OVK_BOOL, OV_INTERNAL, TRUE,"cflow_merge", "",
00693 0, 0, 0, &CFLOW_Enable_Merge, NULL },
00694 { OVK_BOOL, OV_INTERNAL, TRUE,"cflow_reorder", "",
00695 0, 0, 0, &CFLOW_Enable_Reorder, NULL },
00696 { OVK_BOOL, OV_INTERNAL, TRUE,"cflow_clone", "",
00697 0, 0, 0, &CFLOW_Enable_Clone, &CFLOW_Enable_Clone_overridden },
00698 #ifdef KEY
00699 { OVK_BOOL, OV_INTERNAL, TRUE,"cflow_freq_order", "cflow_freq_order",
00700 0, 0, 0, &CFLOW_Enable_Freq_Order, NULL },
00701 { OVK_BOOL, OV_INTERNAL, TRUE,"cflow_freq_order_on_heu", "cflow_freq_order_on_heu",
00702 0, 0, 0, &CFLOW_Enable_Freq_Order_On_Heuristics, NULL },
00703 #else
00704 { OVK_BOOL, OV_INTERNAL, TRUE,"cflow_freq_order", "",
00705 0, 0, 0, &CFLOW_Enable_Freq_Order, NULL },
00706 { OVK_BOOL, OV_INTERNAL, TRUE,"cflow_freq_order_on_heu", "",
00707 0, 0, 0, &CFLOW_Enable_Freq_Order_On_Heuristics, NULL },
00708 #endif // KEY
00709 { OVK_BOOL, OV_INTERNAL, TRUE,"cflow_opt_all_br_to_bcond", "",
00710 0, 0, 0, &CFLOW_opt_all_br_to_bcond, NULL },
00711 { OVK_NAME, OV_INTERNAL, TRUE,"cflow_heuristic_tolerance", "",
00712 0, 0, 0, &CFLOW_heuristic_tolerance, NULL },
00713 { OVK_NAME, OV_INTERNAL, TRUE,"cflow_feedback_tolerance", "",
00714 0, 0, 0, &CFLOW_feedback_tolerance, NULL },
00715 { OVK_INT32, OV_INTERNAL, TRUE,"cflow_clone_incr", "cflow_clone_i",
00716 0, 0, 100, &CFLOW_clone_incr, &clone_incr_overridden },
00717 { OVK_INT32, OV_INTERNAL, TRUE,"cflow_clone_min_incr", "cflow_clone_mi",
00718 0, 0, INT32_MAX, &CFLOW_clone_min_incr, &clone_min_incr_overridden },
00719 { OVK_INT32, OV_INTERNAL, TRUE,"cflow_clone_max_incr", "cflow_clone_ma",
00720 0, 0, INT32_MAX, &CFLOW_clone_max_incr, &clone_max_incr_overridden },
00721 { OVK_NAME, OV_INTERNAL, TRUE,"cflow_cold_threshold", "",
00722 0, 0, 0, &CFLOW_cold_threshold, NULL },
00723
00724
00725
00726 { OVK_BOOL, OV_INTERNAL, TRUE,"enable_frequency", "",
00727 0, 0, 0, &FREQ_enable, NULL },
00728 { OVK_NAME, OV_INTERNAL, TRUE,"eh_freq", "",
00729 0, 0, 0, &FREQ_eh_freq, NULL },
00730 #ifdef KEY
00731 { OVK_NAME, OV_INTERNAL, TRUE,"non_local_targ_freq", "",
00732 0, 0, 0, &FREQ_non_local_targ_freq, NULL },
00733 #endif
00734 { OVK_NAME, OV_INTERNAL, TRUE,"freq_frequent_never_ratio", "",
00735 0, 0, 0, &FREQ_frequent_never_ratio, NULL },
00736 { OVK_BOOL, OV_INTERNAL, TRUE, "freq_view_cfg", "",
00737 0, 0, 0, &FREQ_view_cfg, NULL },
00738 #endif // ! TARG_NVISA
00739
00740
00741
00742 { OVK_NAME, OV_INTERNAL, TRUE,"fdiv_algorithm", "fdiv",
00743 0, 0, 0, &CGEXP_fdiv_algorithm, NULL },
00744 { OVK_NAME, OV_INTERNAL, TRUE,"sqrt_algorithm", "sqrt",
00745 0, 0, 0, &CGEXP_sqrt_algorithm, NULL },
00746 { OVK_BOOL, OV_INTERNAL, TRUE,"use_copyfcc", "",
00747 0, 0, 0, &CGEXP_use_copyfcc, NULL },
00748 { OVK_INT32, OV_INTERNAL, TRUE,"expconst", "",
00749 DEFAULT_CGEXP_CONSTANT, 0, INT32_MAX, &CGEXP_expandconstant, NULL },
00750 { OVK_BOOL, OV_INTERNAL, TRUE,"normalize_logical", "normalize",
00751 0, 0, 0, &CGEXP_normalize_logical, NULL },
00752 { OVK_BOOL, OV_INTERNAL, TRUE,"gp_prolog_call_shared", "gp_prolog",
00753 0, 0, 0, &CGEXP_gp_prolog_call_shared, NULL },
00754 #ifdef KEY
00755 { OVK_BOOL, OV_INTERNAL, TRUE,"integer_multiply_by_constant", "integer_multiply_by_constant",
00756 0, 0, 0, &CGEXP_cvrt_int_mult_to_add_shift, &Integer_Multiply_By_Constant_overridden },
00757 #endif
00758 { OVK_BOOL, OV_INTERNAL, TRUE,"integer_divide_by_constant", "integer_divide_by_constant",
00759 0, 0, 0, &CGEXP_cvrt_int_div_to_mult, &Integer_Divide_By_Constant_overridden },
00760 { OVK_BOOL, OV_INTERNAL, TRUE,"integer_divide_use_float", "integer_divide_use_float",
00761 0, 0, 0, &CGEXP_cvrt_int_div_to_fdiv, &Integer_Divide_Use_Float_overridden },
00762 { OVK_BOOL, OV_INTERNAL, TRUE,"fast_imul", "",
00763 0, 0, 0, &CGEXP_fast_imul, NULL },
00764 { OVK_BOOL, OV_INTERNAL, TRUE,"float_consts_from_ints", "",
00765 0, 0, 0, &CGEXP_float_consts_from_ints, NULL },
00766 { OVK_BOOL, OV_INTERNAL, TRUE,"float_div_by_const", "",
00767 0, 0, 0, &CGEXP_opt_float_div_by_const, NULL },
00768
00769 { OVK_NAME, OV_INTERNAL, TRUE,"lfhint_L1", "",
00770 0, 0, 0, &CGEXP_lfhint_L1, NULL },
00771 { OVK_NAME, OV_INTERNAL, TRUE,"lfhint_L2", "",
00772 0, 0, 0, &CGEXP_lfhint_L2, NULL },
00773 { OVK_NAME, OV_INTERNAL, TRUE,"ldhint_L1", "",
00774 0, 0, 0, &CGEXP_ldhint_L1, NULL },
00775 { OVK_NAME, OV_INTERNAL, TRUE,"ldhint_L2", "",
00776 0, 0, 0, &CGEXP_ldhint_L2, NULL },
00777 { OVK_NAME, OV_INTERNAL, TRUE,"sthint_L1", "",
00778 0, 0, 0, &CGEXP_sthint_L1, NULL },
00779 { OVK_NAME, OV_INTERNAL, TRUE,"sthint_L2", "",
00780 0, 0, 0, &CGEXP_sthint_L2, NULL },
00781 #ifdef TARG_NVISA
00782 { OVK_BOOL, OV_INTERNAL, TRUE,"auto_as_static", "",
00783 0, 0, 0, &CGEXP_auto_as_static, NULL },
00784 { OVK_BOOL, OV_INTERNAL, TRUE,"gen_ccodes", "",
00785 0, 0, 0, &CGEXP_gen_ccodes, NULL },
00786 #endif
00787
00788 { OVK_BOOL, OV_INTERNAL, TRUE, "localize", "localize",
00789 0, 0, 0, &CG_localize_tns, &CG_localize_tns_Set},
00790 #ifdef TARG_X8664
00791 { OVK_BOOL, OV_INTERNAL, TRUE, "localize_x87", "localize_x87",
00792 0, 0, 0, &CG_localize_x87_tns, &CG_localize_x87_tns_Set,
00793 "Localize x87 floating point variables. Has no effect on integer variables. Default off."
00794 },
00795 #endif
00796 #ifdef TARG_IA64
00797 { OVK_BOOL, OV_INTERNAL, TRUE, "ldxmov", "",
00798 0,0,0, &CG_Enable_Ldxmov_Support, NULL },
00799 #endif
00800 { OVK_BOOL, OV_INTERNAL, TRUE, "localize_using_stacked_regs", "localize_using_stack",
00801 0, 0, 0, &LOCALIZE_using_stacked_regs, NULL },
00802
00803 #if !defined(TARG_NVISA)
00804
00805
00806 { OVK_BOOL, OV_INTERNAL, TRUE,"rematerialize", "remat",
00807 0, 0, 0, &CGSPILL_Rematerialize_Constants, NULL },
00808 { OVK_BOOL, OV_INTERNAL, TRUE,"force_rematerialization", "force_remat",
00809 0, 0, 0, &CGSPILL_Enable_Force_Rematerialization, NULL },
00810 { OVK_BOOL, OV_INTERNAL, TRUE,"lra_reorder", "",
00811 0, 0, 0, &LRA_do_reorder, NULL },
00812 #if defined(TARG_SL)
00813 { OVK_BOOL, OV_INTERNAL, TRUE,"check_reg_alloc", "",
00814 0, 0, 0, &Enable_Checking_Register_Allocation, NULL },
00815 #endif
00816 #ifdef TARG_X8664
00817 { OVK_BOOL, OV_INTERNAL, FALSE, "prefer_legacy_regs", "",
00818 0, 0, 0, &LRA_prefer_legacy_regs, NULL },
00819 #endif
00820 #ifdef KEY
00821 { OVK_INT32, OV_INTERNAL, TRUE, "inflate_reg_request", "inflate_reg",
00822 0, 0, 100, &LRA_inflate_reg_request, &LRA_inflate_reg_request_Set,
00823 "Inflate LRA register request by this percentage for innermost loops [Default 0]"},
00824 { OVK_BOOL, OV_INTERNAL, FALSE, "prefer_lru_reg", "",
00825 1, 0, 0, &LRA_prefer_lru_reg, &LRA_prefer_lru_reg_Set },
00826 { OVK_BOOL, OV_INTERNAL, TRUE, "min_spill_loc_size", "",
00827 0,0,0, &CG_min_spill_loc_size, NULL,
00828 "Turn on/off minimize spill location size [Default FALSE]"
00829 },
00830 { OVK_BOOL, OV_INTERNAL, TRUE, "min_stack_size", "",
00831 0,0,0, &CG_min_stack_size, NULL,
00832 "Turn on/off minimize stack size [Default TRUE]"
00833 },
00834 #endif
00835
00836
00837
00838 {OVK_BOOL, OV_INTERNAL, TRUE, "gcm", "gcm",
00839 0, 0, 0, &GCM_Enable_Scheduling, NULL },
00840 {OVK_BOOL, OV_INTERNAL, TRUE, "pre_gcm", "pre_gcm",
00841 0, 0, 0, &GCM_PRE_Enable_Scheduling, NULL },
00842 {OVK_BOOL, OV_INTERNAL, TRUE, "post_gcm", "post_gcm",
00843 0, 0, 0, &GCM_POST_Enable_Scheduling, NULL },
00844 {OVK_BOOL, OV_INTERNAL, TRUE, "force_post_gcm", "force_post_gcm",
00845 0, 0, 0, &GCM_POST_Force_Scheduling, NULL },
00846 {OVK_BOOL, OV_INTERNAL, TRUE, "cflow_after_gcm", "cflow_after_gcm",
00847 0, 0, 0, &GCM_Enable_Cflow, NULL},
00848 {OVK_BOOL, OV_INTERNAL, TRUE, "cross_call_motion", "",
00849 0, 0, 0, &GCM_Motion_Across_Calls, NULL},
00850 {OVK_BOOL, OV_INTERNAL, TRUE, "use_sched_est", "use_sched_est",
00851 0, 0, 0, &GCM_Use_Sched_Est, NULL},
00852 {OVK_BOOL, OV_INTERNAL, TRUE, "pre_spec_loads", "",
00853 0, 0, 0, &GCM_PRE_Spec_Loads, NULL},
00854 {OVK_BOOL, OV_INTERNAL, TRUE, "post_spec_loads", "",
00855 0, 0, 0, &GCM_POST_Spec_Loads, NULL},
00856 {OVK_BOOL, OV_INTERNAL, TRUE, "pointer_speculation", "",
00857 0, 0, 0, &GCM_Pointer_Spec, NULL},
00858 {OVK_BOOL, OV_INTERNAL, TRUE, "speculative_ptr_deref", "",
00859 0, 0, 0, &GCM_Eager_Ptr_Deref, NULL},
00860 {OVK_BOOL, OV_INTERNAL, TRUE, "speculative_loads", "",
00861 0, 0, 0, &GCM_Speculative_Loads, NULL},
00862 {OVK_BOOL, OV_INTERNAL, TRUE, "predicated_loads", "",
00863 0, 0, 0, &GCM_Predicated_Loads, NULL},
00864 {OVK_BOOL, OV_INTERNAL, TRUE, "forw_circ_motion", "",
00865 0, 0, 0, &GCM_Forw_Circ_Motion, NULL},
00866 {OVK_BOOL, OV_INTERNAL, TRUE, "gcm_minimize_reg_usage", "",
00867 0, 0, 0, &GCM_Min_Reg_Usage, NULL},
00868 {OVK_BOOL, OV_INTERNAL, TRUE, "gcm_test", "",
00869 0, 0, 0, &GCM_Test, NULL},
00870 {OVK_BOOL, OV_INTERNAL, TRUE, "skip_gcm", "",
00871 0, 0, 0, &CG_Skip_GCM, NULL},
00872 { OVK_INT32, OV_INTERNAL, TRUE,"gcm_from_bb", "",
00873 0, 0, INT32_MAX, &GCM_From_BB, NULL },
00874 { OVK_INT32, OV_INTERNAL, TRUE,"gcm_to_bb", "",
00875 0, 0, INT32_MAX, &GCM_To_BB, NULL },
00876 { OVK_INT32, OV_INTERNAL, TRUE,"gcm_result_tn", "",
00877 0, 0, INT32_MAX, &GCM_Result_TN, NULL },
00878 #ifdef KEY
00879
00880 { OVK_INT32, OV_INTERNAL, TRUE,"gcm_bb_limit", "",
00881 0, 0, INT32_MAX, &GCM_BB_Limit, NULL },
00882 #endif
00883
00884
00885
00886 { OVK_BOOL, OV_INTERNAL, TRUE,"local_scheduler", "local_sched",
00887 0, 0, 0, &LOCS_Enable_Scheduling, NULL },
00888 { OVK_BOOL, OV_INTERNAL, TRUE,"pre_local_scheduler", "pre_local_sched",
00889 0, 0, 0, &LOCS_PRE_Enable_Scheduling, NULL },
00890 { OVK_BOOL, OV_INTERNAL, TRUE,"post_local_scheduler", "post_local_sched",
00891 0, 0, 0, &LOCS_POST_Enable_Scheduling, NULL },
00892 { OVK_BOOL, OV_INTERNAL, TRUE,"branch_likely", "branch_l",
00893 0, 0, 0, &CGTARG_Enable_Brlikely, NULL },
00894 { OVK_BOOL, OV_INTERNAL, TRUE,"fill_delay_slots", "fill_delay",
00895 0, 0, 0, &Enable_Fill_Delay_Slots, NULL },
00896 { OVK_NAME, OV_INTERNAL, TRUE,"branch_taken_prob", "",
00897 0, 0, 0, &CGTARG_Branch_Taken_Prob,
00898 &CGTARG_Branch_Taken_Prob_overridden},
00899 { OVK_BOOL, OV_INTERNAL, TRUE,"locs_form_bundles", "locs_form_bundles",
00900 0, 0, 0, &LOCS_Enable_Bundle_Formation, NULL },
00901 {OVK_BOOL, OV_INTERNAL, TRUE, "pre_hb_scheduler", "pre_hb_sched",
00902 0, 0, 0, &IGLS_Enable_PRE_HB_Scheduling, NULL },
00903 {OVK_BOOL, OV_INTERNAL, TRUE, "post_hb_scheduler", "post_hb_sched",
00904 0, 0, 0, &IGLS_Enable_POST_HB_Scheduling, NULL },
00905 { OVK_BOOL, OV_INTERNAL, TRUE,"hb_scheduler", "hb_sched",
00906 0, 0, 0, &IGLS_Enable_HB_Scheduling, NULL },
00907 #if defined(TARG_SL)
00908 { OVK_INT32, OV_INTERNAL, TRUE, "local_sched_pu_skip_before", "local_sched_pu_skip_b",
00909 -1, 0, INT32_MAX, &CG_local_sched_pu_skip_before, NULL },
00910 { OVK_INT32, OV_INTERNAL, TRUE, "local_sched_pu_skip_after", "local_sched_pu_skip_a",
00911 -1, 0, INT32_MAX, &CG_local_sched_pu_skip_after, NULL },
00912 { OVK_INT32, OV_INTERNAL, TRUE, "local_sched_pu_skip_equal", "local_sched_pu_skip_e",
00913 -1, 0, INT32_MAX, &CG_local_sched_pu_skip_equal, NULL },
00914 { OVK_INT32, OV_INTERNAL, TRUE, "local_sched_bb_skip_before", "local_sched_bb_skip_b",
00915 -1, 0, INT32_MAX, &CG_local_sched_bb_skip_before, NULL },
00916 { OVK_INT32, OV_INTERNAL, TRUE, "local_sched_bb_skip_after", "local_sched_bb_skip_a",
00917 -1, 0, INT32_MAX, &CG_local_sched_bb_skip_after, NULL },
00918 { OVK_INT32, OV_INTERNAL, TRUE, "local_sched_bb_skip_equal", "local_sched_bb_skip_e",
00919 -1, 0, INT32_MAX, &CG_local_sched_bb_skip_equal, NULL },
00920 { OVK_INT32, OV_INTERNAL, TRUE, "local_sched_op_skip_after", "local_sched_op_skip_a",
00921 -1, 0, INT32_MAX, &CG_local_sched_op_skip_after, NULL },
00922 { OVK_INT32, OV_INTERNAL, TRUE, "bb_sched_op_max", "bb_sched_op_max",
00923 0, 0, INT32_MAX, &CG_bb_sched_op_num_max, NULL },
00924
00925 { OVK_INT32, OV_INTERNAL, TRUE, "gcm_skip_before", "gcm_skip_b",
00926 -1, 0, INT32_MAX, &CG_GCM_skip_before, NULL },
00927 { OVK_INT32, OV_INTERNAL, TRUE, "gcm_skip_after", "gcm_skip_a",
00928 -1, 0, INT32_MAX, &CG_GCM_skip_after, NULL },
00929 { OVK_INT32, OV_INTERNAL, TRUE, "gcm_skip_equal", "gcm_skip_e",
00930 -1, 0, INT32_MAX, &CG_GCM_skip_equal, NULL },
00931 { OVK_INT32, OV_INTERNAL, TRUE, "gcm_loop_skip_before", "gcm_loop_skip_b",
00932 -1, 0, INT32_MAX, &CG_GCM_loop_skip_before, NULL },
00933 { OVK_INT32, OV_INTERNAL, TRUE, "gcm_loop_skip_after", "gcm_loop_skip_a",
00934 -1, 0, INT32_MAX, &CG_GCM_loop_skip_after, NULL },
00935 { OVK_INT32, OV_INTERNAL, TRUE, "gcm_loop_skip_equal", "gcm_loop_skip_e",
00936 -1, 0, INT32_MAX, &CG_GCM_loop_skip_equal, NULL },
00937 { OVK_INT32, OV_INTERNAL, TRUE, "gcm_op_skip_before", "gcm_op_skip_b",
00938 -1, 0, INT32_MAX, &CG_GCM_op_skip_before, NULL },
00939 { OVK_INT32, OV_INTERNAL, TRUE, "gcm_op_skip_after", "gcm_op_skip_a",
00940 -1, 0, INT32_MAX, &CG_GCM_op_skip_after, NULL },
00941 { OVK_INT32, OV_INTERNAL, TRUE, "gcm_op_skip_equal", "gcm_op_skip_e",
00942 -1, 0, INT32_MAX, &CG_GCM_op_skip_equal, NULL },
00943
00944
00945 { OVK_INT32, OV_INTERNAL, TRUE, "gcm_licm_loop_skip_before", "gcm_licm_loop_skip_b",
00946 -1, 0, INT32_MAX, &CG_GCM_LICM_loop_skip_before, NULL },
00947 { OVK_INT32, OV_INTERNAL, TRUE, "gcm_licm_loop_skip_after", "gcm_licm_loop_skip_a",
00948 -1, 0, INT32_MAX, &CG_GCM_LICM_loop_skip_after, NULL },
00949 { OVK_INT32, OV_INTERNAL, TRUE, "gcm_licm_loop_skip_equal", "gcm_licm_loop_skip_e",
00950 -1, 0, INT32_MAX, &CG_GCM_LICM_loop_skip_equal, NULL },
00951 { OVK_INT32, OV_INTERNAL, TRUE, "gcm_licm_op_skip_before", "gcm_licm_op_skip_b",
00952 -1, 0, INT32_MAX, &CG_GCM_LICM_op_skip_before, NULL },
00953 { OVK_INT32, OV_INTERNAL, TRUE, "gcm_licm_op_skip_after", "gcm_licm_op_skip_a",
00954 -1, 0, INT32_MAX, &CG_GCM_LICM_op_skip_after, NULL },
00955 { OVK_INT32, OV_INTERNAL, TRUE, "gcm_licm_op_skip_equal", "gcm_licm_op_skip_e",
00956 -1, 0, INT32_MAX, &CG_GCM_LICM_op_skip_equal, NULL },
00957
00958
00959 { OVK_INT32, OV_INTERNAL, TRUE, "loop_dce_loop_skip_before", "loop_dce_loop_skip_b",
00960 -1, 0, INT32_MAX, &CG_LOOP_DCE_loop_skip_before, NULL },
00961 { OVK_INT32, OV_INTERNAL, TRUE, "loop_dce_loop_skip_after", "loop_dce_loop_skip_a",
00962 -1, 0, INT32_MAX, &CG_LOOP_DCE_loop_skip_after, NULL },
00963 { OVK_INT32, OV_INTERNAL, TRUE, "loop_dce_loop_skip_equal", "loop_dce_loop_skip_e",
00964 -1, 0, INT32_MAX, &CG_LOOP_DCE_loop_skip_equal, NULL },
00965 { OVK_INT32, OV_INTERNAL, TRUE, "loop_dce_op_skip_before", "loop_dce_op_skip_b",
00966 -1, 0, INT32_MAX, &CG_LOOP_DCE_op_skip_before, NULL },
00967 { OVK_INT32, OV_INTERNAL, TRUE, "loop_dce_op_skip_after", "loop_dce_op_skip_a",
00968 -1, 0, INT32_MAX, &CG_LOOP_DCE_op_skip_after, NULL },
00969 { OVK_INT32, OV_INTERNAL, TRUE, "loop_dce_op_skip_equal", "loop_dce_op_skip_e",
00970 -1, 0, INT32_MAX, &CG_LOOP_DCE_op_skip_equal, NULL },
00971
00972
00973 { OVK_BOOL, OV_INTERNAL, TRUE, "gcm_enable_critical_edge_motion", "gcm_enable_critical_edge_motion",
00974 1, 0, 0, &CG_GCM_enable_critical_edge_motion, NULL },
00975 { OVK_BOOL, OV_INTERNAL, TRUE, "gcm_enable_mvtc_optimization", "gcm_enable_mvtc_opt",
00976 1, 0, 0, &CG_GCM_enable_mvtc_optimization, NULL },
00977 { OVK_BOOL, OV_INTERNAL, TRUE, "gcm_enable_reduce_loop_count", "gcm_enable_reduce_loop_count",
00978 1, 0, 0, &CG_GCM_enable_reduce_loop_count, NULL },
00979 { OVK_BOOL, OV_INTERNAL, TRUE, "gcm_enable_break_dependence", "gcm_enable_break_dep",
00980 0, 0, 0, &CG_GCM_enable_break_dependence, NULL },
00981 { OVK_BOOL, OV_INTERNAL, TRUE, "gcm_licm", "",
00982 1, 0, 0, &CG_GCM_enable_licm, NULL},
00983 { OVK_BOOL, OV_INTERNAL, TRUE, "gcm_dce", "",
00984 1, 0, 0, &CG_GCM_enable_dce, NULL},
00985 { OVK_BOOL, OV_INTERNAL, TRUE, "gcm_rce", "",
00986 1, 0, 0, &CG_GCM_enable_rce, NULL},
00987
00988
00989 { OVK_BOOL, OV_INTERNAL, TRUE,"all_rgn_scheduler", "all_rgn_sched",
00990 0, 0, 0, &RGN_Enable_All_Scheduling, NULL },
00991 { OVK_BOOL, OV_INTERNAL, TRUE,"rgn_schedule", "rgn_sched",
00992 0, 0, 0, &CG_Enable_Regional_Global_Sched , NULL },
00993 { OVK_BOOL, OV_INTERNAL, TRUE,"rgn_local_schedule", "rgn_local_sched",
00994 0, 0, 0, &CG_Enable_Regional_Local_Sched , NULL },
00995 #endif
00996 #ifdef KEY
00997 { OVK_BOOL, OV_INTERNAL, TRUE, "local_fwd_scheduler", "local_fwd_sched",
00998 0, 0, 0, &LOCS_Fwd_Scheduling, &LOCS_Fwd_Scheduling_set },
00999 { OVK_UINT32, OV_INTERNAL, TRUE,"local_sched_algorithm", "local_sched_alg",
01000 0, 0, 2, &LOCS_Scheduling_Algorithm, &LOCS_Scheduling_Algorithm_set,
01001 "Select basic block instruction scheduling algorithm" },
01002 { OVK_BOOL, OV_INTERNAL, TRUE,"locs_best", "",
01003 0, 0, 0, &LOCS_Best, &LOCS_Best_set,
01004 "Select best schedule produced by different scheduling heuristics" },
01005 { OVK_BOOL, OV_INTERNAL, TRUE, "locs_shallow_depth", "",
01006 0, 0, 0, &LOCS_Shallow_Depth, &LOCS_Shallow_Depth_set },
01007 { OVK_BOOL, OV_INTERNAL, TRUE, "locs_balance_ready_types", "",
01008 0, 0, 0, &LOCS_Balance_Ready_Types, &LOCS_Balance_Ready_Types_set,
01009 "Enable heuristic to balance the number of int and fp OPs in the ready vector" },
01010 { OVK_UINT32, OV_INTERNAL, TRUE,"locs_balance_ready_int", "",
01011 0, 0, 100, &LOCS_Balance_Ready_Int, &LOCS_Balance_Ready_Int_set,
01012 "The ready vector should contain no more than this percentage of int OPs" },
01013 { OVK_UINT32, OV_INTERNAL, TRUE,"locs_balance_ready_fp", "",
01014 0, 0, 100, &LOCS_Balance_Ready_Fp, &LOCS_Balance_Ready_Fp_set,
01015 "The ready vector should contain no more than this percentage of fp OPs" },
01016 { OVK_BOOL, OV_INTERNAL, TRUE, "locs_balance_unsched_types", "",
01017 0, 0, 0, &LOCS_Balance_Unsched_Types, &LOCS_Balance_Unsched_Types_set,
01018 "Enable heuristic to balance the number of unscheduled int and fp OPs" },
01019 { OVK_UINT32, OV_INTERNAL, TRUE,"locs_balance_unsched_int", "",
01020 0, 0, 100, &LOCS_Balance_Unsched_Int, &LOCS_Balance_Unsched_Int_set,
01021 "The unsched OPs should contain no more than this percentage of int OPs" },
01022 { OVK_UINT32, OV_INTERNAL, TRUE,"locs_balance_unsched_fp", "",
01023 0, 0, 100, &LOCS_Balance_Unsched_Fp, &LOCS_Balance_Unsched_Fp_set,
01024 "The unsched OPs should contain no more than this percentage of fp OPs" },
01025 { OVK_BOOL, OV_INTERNAL, TRUE, "locs_reduce_prefetch", "",
01026 0, 0, 0, &LOCS_Reduce_Prefetch, &LOCS_Reduce_Prefetch_set,
01027 "Delete prefetches that cannot be scheduled in an unused issue slot" },
01028 #endif
01029
01030
01031 { OVK_BOOL, OV_INTERNAL, TRUE,"all_scheduler", "all_sched",
01032 0, 0, 0, &IGLS_Enable_All_Scheduling, NULL },
01033
01034
01035
01036 { OVK_BOOL, OV_INTERNAL, TRUE, "hb_formation", "",
01037 0,0,0, &HB_formation, NULL,
01038 "Turn on/off hyperblock formation [Default ON]"
01039 },
01040 #ifdef KEY
01041 { OVK_INT32, OV_INTERNAL, TRUE, "ifc_cutoff", "",
01042 4,0,100, &HB_if_conversion_cut_off, NULL,
01043 "What is the cut-off for doing If-conversion"
01044 },
01045 #endif
01046 { OVK_BOOL, OV_INTERNAL, TRUE, "hb_static_freq_heuristics", "",
01047 0,0,0, &HB_static_freq_heuristics, NULL,
01048 "Turn on/off hyperblock formation's use of different heuristics in the presence of static frequency analysis [Default ON]"
01049 },
01050 { OVK_INT32, OV_INTERNAL, TRUE, "hb_max_blocks", "",
01051 4, 0, 100, &HB_max_blocks, NULL,
01052 "How many blocks allowed in a hyperblock [Default architecturally dependent]"
01053 },
01054 { OVK_INT32, OV_INTERNAL, TRUE, "hb_min_blocks", "",
01055 4, 0, 32, &HB_min_blocks, NULL,
01056 "Minimum blocks allowed in a hyperblock [Default 2]"
01057 },
01058 { OVK_BOOL, OV_INTERNAL, TRUE, "hb_tail_duplication", "",
01059 0,0,0, &HB_allow_tail_duplication, NULL,
01060 "Flag to control tail-duplication when forming hyperblocks"
01061 },
01062 { OVK_NAME, OV_INTERNAL, TRUE, "hb_max_sched_growth", "",
01063 0, 0, 0, &HB_max_sched_growth, NULL,
01064 "Multiplier for max increase in HB sched height [Default:3.0]"
01065 },
01066 { OVK_NAME, OV_INTERNAL, TRUE,"hb_min_path_priority_ratio", "",
01067 0, 0, 0, &HB_min_path_priority_ratio, NULL,
01068 "Ratio to control relative size of paths included in hyperblock [Default: .1]"
01069 },
01070 { OVK_NAME, OV_INTERNAL, TRUE,"hb_min_priority", "",
01071 0, 0, 0, &HB_min_priority, NULL,
01072 "Minimum priority allowed for a hyperblock [Default: .1]"
01073 },
01074 { OVK_NAME, OV_INTERNAL, TRUE,"hb_call_hazard_multiplier", "",
01075 0, 0, 0, &HB_call_hazard_multiplier, NULL,
01076 "Factor by which to reduce path priority in presence of calls [Default: .25]"
01077 },
01078 { OVK_NAME, OV_INTERNAL, TRUE,"hb_memory_hazard_multiplier", "",
01079 0, 0, 0, &HB_memory_hazard_multiplier, NULL,
01080 "Factor by which to reduce path priority in presence of unresolvable memory stores [Default: 1.0]"
01081 },
01082 { OVK_NAME, OV_INTERNAL, TRUE,"hb_base_probability_contribution", "",
01083 0, 0, 0, &HB_base_probability_contribution, NULL,
01084 "Factor to ensure base contribution of path probability to priority [Default: 0.1]"
01085 },
01086 { OVK_BOOL, OV_INTERNAL, TRUE, "hb_require_alias", "",
01087 0,0,0, &HB_require_alias, NULL,
01088 "Turn on/off requirement that alias information be present for complex hyperblock formation [Default ON]"
01089 },
01090 { OVK_BOOL, OV_INTERNAL, TRUE, "hb_complex_non_loop", "",
01091 0,0,0, &HB_complex_non_loop, NULL,
01092 "Turn on/off complex hyperblock formation for non-loop regions [Default ON]"
01093 },
01094 { OVK_BOOL, OV_INTERNAL, TRUE, "hb_simple_ifc", "",
01095 0,0,0, &HB_simple_ifc, &HB_simple_ifc_set,
01096 "Turn on/off simple, always profitable hyperblock formation for non-loop regions [Default ON]"
01097 },
01098 { OVK_BOOL, OV_INTERNAL, TRUE, "hb_general_use_pq", "",
01099 0,0,0, &HB_general_use_pq, NULL,
01100 "Turn on/off using priority queue when following side paths in general region id for hyperblocks [Default OFF]"
01101 },
01102 { OVK_BOOL, OV_INTERNAL, TRUE, "hb_general_from_top", "",
01103 0,0,0, &HB_general_from_top, NULL,
01104 "Turn on/off following side paths from top of main path in general region id for hyperblocks [Default OFF]"
01105 },
01106 { OVK_BOOL, OV_INTERNAL, TRUE, "hb_exclude_calls", "",
01107 0,0,0, &HB_exclude_calls, NULL,
01108 "Disallow blocks with calls during hyperblock formation, temporary workaround before full support for predicate callee-register spilling is included [Default ON]"
01109 },
01110 { OVK_BOOL, OV_INTERNAL, TRUE, "hb_exclude_pgtns", "",
01111 0,0,0, &HB_exclude_pgtns, NULL,
01112 "Disallow forming hyperblocks if it consists of any global predicate TNs (PGTNS) [Default ON]"
01113 },
01114 { OVK_BOOL, OV_INTERNAL, TRUE, "hb_skip_hammocks", "",
01115 0,0,0, &HB_skip_hammocks, NULL,
01116 "Skip forming hyperblocks on hammocks, cause later pass will do them [Default ON]"
01117 },
01118 { OVK_INT32, OV_INTERNAL, TRUE, "loop_force_ifc", "",
01119 0, 0, 2, &CG_LOOP_force_ifc, NULL },
01120 #endif // ! TARG_NVISA
01121
01122
01123 { OVK_INT32, OV_INTERNAL, TRUE,"longbranch_limit", "",
01124 DEFAULT_LONG_BRANCH_LIMIT, 0, INT32_MAX, &EMIT_Long_Branch_Limit, NULL },
01125 { OVK_BOOL, OV_INTERNAL, TRUE,"pjump_all", "pjump_all",
01126 0, 0, 0, &EMIT_pjump_all, NULL },
01127 { OVK_BOOL, OV_INTERNAL, TRUE,"use_cold_section", "use_cold_section",
01128 0, 0, 0, &EMIT_use_cold_section, NULL },
01129 { OVK_BOOL, OV_INTERNAL, TRUE, "emit_asm_dwarf", "",
01130 0,0,0, &CG_emit_asm_dwarf, NULL,
01131 "Turn on/off emission of dwarf data into .s file [Default OFF]"
01132 },
01133 { OVK_BOOL, OV_INTERNAL, TRUE, "emit_unwind_directives", "",
01134 0,0,0, &CG_emit_unwind_directives, NULL,
01135 "Turn on/off emission of unwind directives into .s file [Default OFF]"
01136 },
01137 { OVK_BOOL, OV_INTERNAL, TRUE, "emit_unwind_info", "",
01138 #ifdef TARG_X8664
01139 0,0,0, &CG_emit_unwind_info, &CG_emit_unwind_info_Set,
01140 #else
01141 0,0,0, &CG_emit_unwind_info, NULL,
01142 #endif
01143 "Turn on/off emission of unwind into .s/.o file [Default OFF]"
01144 },
01145 { OVK_BOOL, OV_INTERNAL, TRUE,"volatile_asm_stop", "",
01146 0, 0, 0, &EMIT_stop_bits_for_volatile_asm, NULL },
01147 { OVK_BOOL, OV_INTERNAL, TRUE,"emit_stop_bits_for_asm", "",
01148 0, 0, 0, &EMIT_stop_bits_for_asm, NULL },
01149 { OVK_BOOL, OV_INTERNAL, TRUE,"emit_explicit_bundles", "",
01150 0, 0, 0, &EMIT_explicit_bundles, NULL },
01151 #ifdef TARG_IA64
01152 { OVK_BOOL, OV_INTERNAL, TRUE,"count_cycles_on_ski", "count_cycle",
01153 0, 0, 0, &EMIT_count_cycles, NULL,
01154 "Add stop bit to divide oversubscripted op groups. [Default off]"
01155 },
01156 #endif
01157 { OVK_BOOL, OV_INTERNAL, TRUE, "enable_feedback", "",
01158 0, 0, 0, &CG_enable_feedback, NULL },
01159 { OVK_BOOL, OV_INTERNAL, TRUE,"non_gas_syntax", "non_gas",
01160 0, 0, 0, &CG_emit_non_gas_syntax, NULL },
01161 { OVK_BOOL, OV_INTERNAL, TRUE,"inhibit_size_directive", "inhibit_size",
01162 0, 0, 0, &CG_inhibit_size_directive, NULL },
01163 #ifdef TARG_X8664
01164 { OVK_BOOL, OV_INTERNAL, TRUE,"use_movlpd", "",
01165 0, 0, 0, &CG_use_movlpd, NULL },
01166 { OVK_BOOL, OV_INTERNAL, TRUE,"use_setcc", "",
01167 0, 0, 0, &CG_use_setcc, NULL },
01168 { OVK_BOOL, OV_INTERNAL, TRUE,"short_form", "",
01169 0, 0, 0, &CG_use_short_form, NULL },
01170 { OVK_BOOL, OV_INTERNAL, TRUE, "p2align", "p2align",
01171 0, 0, 0, &CG_p2align, NULL },
01172 { OVK_UINT64, OV_INTERNAL, TRUE, "p2align_freq", "",
01173 0, 0, UINT64_MAX>>1, &CG_p2align_freq, NULL, "freq threshold for .p2align" },
01174 { OVK_UINT32, OV_INTERNAL, TRUE,"p2align_max_skip_bytes", "",
01175 3, 0, 64, &CG_p2align_max_skip_bytes, NULL, "max skip bytes for .p2align" },
01176 { OVK_BOOL, OV_INTERNAL, TRUE, "use_xortozero", "",
01177 0, 0, 0, &CG_use_xortozero, &CG_use_xortozero_Set },
01178 { OVK_BOOL, OV_INTERNAL, TRUE, "use_test", "",
01179 0, 0, 0, &CG_use_test, NULL },
01180 { OVK_BOOL, OV_INTERNAL, TRUE, "fold_constimul", "",
01181 0, 0, 0, &CG_fold_constimul, NULL },
01182 { OVK_BOOL, OV_INTERNAL, TRUE, "use_incdec", "",
01183 0, 0, 0, &CG_use_incdec, NULL },
01184 { OVK_BOOL, OV_INTERNAL, TRUE, "fold_shiftadd", "",
01185 0, 0, 0, &CG_fold_shiftadd, NULL },
01186 { OVK_BOOL, OV_INTERNAL, TRUE, "use_prefetchnta", "",
01187 0, 0, 0, &CG_use_prefetchnta, NULL },
01188 { OVK_BOOL, OV_INTERNAL, TRUE, "idivbyconst_opt", "",
01189 0, 0, 0, &CG_idivbyconst_opt, NULL },
01190 { OVK_UINT32, OV_INTERNAL, TRUE, "movnti", "",
01191 120, 0, UINT32_MAX>>1, &CG_movnti, NULL,
01192 "Use x86-64's movnti instead of mov when writing memory blocks of this size or larger (in KB)" },
01193 { OVK_BOOL, OV_INTERNAL, TRUE, "cloop", "",
01194 0, 0, 0, &CG_LOOP_cloop, NULL },
01195 { OVK_BOOL, OV_INTERNAL, TRUE,"use_lddqu", "",
01196 0, 0, 0, &CG_use_lddqu, NULL },
01197 { OVK_BOOL, OV_INTERNAL, TRUE, "push_pop_int_saved_regs", "",
01198 0, 0, 0, &CG_push_pop_int_saved_regs, &CG_push_pop_int_saved_regs_Set },
01199 { OVK_UINT32, OV_INTERNAL, TRUE,"ptr_load_use", "",
01200 4, 0, 64, &CG_ptr_load_use_latency, NULL,
01201 "extra latency between loading a pointer and its use"},
01202 #endif
01203
01204 #ifdef TARG_X8664
01205
01206 { OVK_BOOL, OV_INTERNAL, TRUE, "x87_store", "",
01207 0, 0, 0, &CG_x87_store, NULL,
01208 "Store x87 floating point variables to memory after each computation, in order to reduce the variable's precision from 80 bits to 32/64 bits. Default off."
01209 },
01210 #endif
01211 #if defined(TARG_SL)
01212 { OVK_BOOL , OV_INTERNAL, TRUE, "instr16","",
01213 0, 0, 0, &CG_Gen_16bit, NULL},
01214 { OVK_BOOL , OV_INTERNAL, TRUE, "br16","",
01215 0, 0, 0, &CG_Enable_br16, NULL},
01216 { OVK_INT32, OV_INTERNAL, TRUE, "pre_size", "",
01217 0, 0, 100, &CG_localsch_pre_size, NULL },
01218 { OVK_BOOL, OV_INTERNAL, TRUE, "dsp_thread", "",
01219 0, 0, 0, &CG_dsp_thread, NULL },
01220 { OVK_BOOL, OV_INTERNAL, TRUE, "qw_aligned", "",
01221 0, 0, 0, &CG_check_quadword, NULL},
01222 { OVK_BOOL , OV_INTERNAL, TRUE, "rep_unpair16","",
01223 0, 0, 0, &CG_rep_unpaired16, NULL},
01224 { OVK_BOOL , OV_INTERNAL, TRUE, "ignore_mem_alias", "",
01225 0, 0, 0, &CG_ignore_mem_alias, NULL},
01226 {OVK_BOOL , OV_INTERNAL, TRUE, "stack_layout","",
01227 0, 0, 0, &CG_stack_layout, NULL},
01228 { OVK_INT32, OV_INTERNAL, TRUE, "isr", "",
01229 0, 0, 3, &CG_ISR, NULL},
01230 { OVK_INT32, OV_INTERNAL, TRUE, "max_accreg", "",
01231 0, 0, 4, &CG_Max_Accreg, NULL},
01232 { OVK_INT32, OV_INTERNAL, TRUE, "max_addreg", "",
01233 0, 0, 8, &CG_Max_Addreg, NULL},
01234 { OVK_INT32, OV_INTERNAL, TRUE, "max_loopreg", "",
01235 0, 0, 4, &CG_zdl_enabled_level, NULL},
01236 { OVK_BOOL, OV_INTERNAL, TRUE, "round_spreg", "",
01237 0, 0, 0, &CG_round_spreg, NULL},
01238 { OVK_BOOL, OV_INTERNAL, TRUE, "check_packed", "",
01239 0, 0, 0, &CG_check_packed, NULL},
01240 { OVK_BOOL, OV_INTERNAL, TRUE, "sl2", "",
01241 0, 0, 0, &CG_sl2, NULL },
01242
01243 { OVK_BOOL, OV_INTERNAL, TRUE,"combine_condmv", "combine_condmv",
01244 0, 0, 0, &CG_SL2_enable_combine_condmv, NULL },
01245 { OVK_BOOL, OV_INTERNAL, TRUE,"sl2peephole", "sl2peep",
01246 0, 0, 0, &CG_SL2_enable_peephole, NULL },
01247 { OVK_BOOL, OV_INTERNAL, TRUE,"sl2_macro", "sl2_macro",
01248 0, 0, 0, &CG_Enable_Macro_Instr_Combine, NULL },
01249 { OVK_BOOL, OV_INTERNAL, TRUE,"exp_v1buf", "exp_v1buf",
01250 0, 0, 0, &CG_SL2_enable_v1buf_expansion, NULL },
01251 #endif
01252
01253 { OVK_BOOL, OV_INTERNAL, TRUE, "gra_live_predicate_aware", "",
01254 0,0,0, &GRA_LIVE_Predicate_Aware, NULL,
01255 "Allow GRA_LIVE to be predicate-aware [Default ON]"
01256 },
01257 { OVK_BOOL, OV_INTERNAL, TRUE, "pqs_disable", "",
01258 0,0,0, &PQS_disabled, NULL,
01259 "Force PQS to be disabled [Default OFF]"
01260 },
01261 { OVK_INT32, OV_INTERNAL, TRUE,"branch_taken_penalty", "",
01262 0, 0, INT32_MAX, &CGTARG_branch_taken_penalty,
01263 &CGTARG_branch_taken_penalty_overridden },
01264 #if !defined(TARG_NVISA)
01265 { OVK_BOOL, OV_INTERNAL, TRUE, "sched_est_calc_dep_graph", "",
01266 0, 0, 0, &CG_SCHED_EST_calc_dep_graph, NULL },
01267 { OVK_BOOL, OV_INTERNAL, TRUE, "sched_est_use_locs", "",
01268 0, 0, 0, &CG_SCHED_EST_use_locs, NULL },
01269 { OVK_INT32, OV_INTERNAL, TRUE, "sched_est_call_cost", "",
01270 0, 0, INT32_MAX, &CG_SCHED_EST_call_cost, NULL },
01271 #ifndef KEY
01272 { OVK_BOOL, OV_INTERNAL, TRUE, "enable_feedback", "",
01273 0, 0, 0, &CG_enable_feedback, NULL },
01274 #endif
01275 { OVK_INT32, OV_INTERNAL, TRUE, "mispredict_branch", "mispredict",
01276 0, 0, INT32_MAX, &CG_branch_mispredict_penalty, NULL },
01277 { OVK_INT32, OV_INTERNAL, TRUE, "mispredict_factor", "",
01278 0, 0, INT32_MAX, &CG_branch_mispredict_factor, NULL },
01279 { OVK_BOOL, OV_INTERNAL, TRUE,"enable_thr", "",
01280 0, 0, 0, &CG_enable_thr, NULL },
01281 { OVK_BOOL, OV_INTERNAL, TRUE,"reverse_if_conversion", "",
01282 0, 0, 0, &CG_enable_reverse_if_conversion,
01283 &CG_enable_reverse_if_conversion_overridden },
01284 #endif // ! TARG_NVISA
01285 { OVK_INT32, OV_INTERNAL, TRUE,"body_ins_count_max", "",
01286 0, 0, INT32_MAX, &CG_maxinss, &CG_maxinss_overridden },
01287 { OVK_INT32, OV_INTERNAL, TRUE,"body_blocks_count_max", "",
01288 0, 0, INT32_MAX, &CG_maxblocks, NULL },
01289 { OVK_BOOL, OV_INTERNAL, TRUE,"spec_imul_idiv", "",
01290 0, 0, 0, &CG_enable_spec_imul,
01291 &CG_enable_spec_imul_overridden },
01292 { OVK_BOOL, OV_INTERNAL, TRUE,"spec_idiv", "",
01293 0, 0, 0, &CG_enable_spec_idiv,
01294 &CG_enable_spec_idiv_overridden },
01295 { OVK_BOOL, OV_INTERNAL, TRUE,"spec_fdiv", "",
01296 0, 0, 0, &CG_enable_spec_fdiv,
01297 &CG_enable_spec_fdiv_overridden },
01298 { OVK_BOOL, OV_INTERNAL, TRUE, "spec_fsqrt", "",
01299 0, 0, 0, &CG_enable_spec_fsqrt,
01300 &CG_enable_spec_fsqrt_overridden },
01301 { OVK_BOOL, OV_INTERNAL, TRUE,"cond_defs", "cond_defs",
01302 0, 0, 0, &CG_cond_defs_allowed, NULL },
01303
01304 { OVK_BOOL, OV_INTERNAL, TRUE,"rename", "",
01305 0, 0, 0, &CG_enable_rename, NULL },
01306
01307 { OVK_COUNT }
01308 };
01309
01310 #ifdef TARG_IA64
01311
01312
01313 static OPTION_DESC Options_IPFEC[] = {
01314 { OVK_BOOL, OV_VISIBLE, TRUE, "rgn_form", "",
01315 0, 0, 0, &ORC_Enable_Region_Formation, NULL,
01316 "Use Ipfec region formation instead of original hyperblock formation"},
01317 { OVK_BOOL, OV_VISIBLE, TRUE, "rgn_deco", "",
01318 0, 0, 0, &ORC_Enable_Region_Decomposition, NULL,
01319 "Use Aurora region decomposition"},
01320 { OVK_INT32, OV_VISIBLE, TRUE, "cut_num", "",
01321 0, 0, 92, &ORC_Stacked_Cut_Num, NULL,
01322 "Use cut the number of available stacked registers"},
01323 { OVK_INT32, OV_VISIBLE, TRUE, "spill_num", "",
01324 0, 0, 30, &ORC_Stacked_Spill_Num, NULL,
01325 "Use tune stacked register usage"},
01326 { OVK_INT32, OV_VISIBLE, TRUE, "rgn_dup", "",
01327 0, 0, 0, &ORC_Enable_Tail_Duplication, NULL,
01328 "Use Aurora region tail duplication"},
01329 { OVK_INT32, OV_VISIBLE, TRUE, "rgn_exit", "",
01330 0, 0, 0, &ORC_Enable_Exit_Probability, NULL,
01331 "Use Aurora region exit probability requirement"},
01332 { OVK_BOOL, OV_VISIBLE, TRUE, "if_conv", "",
01333 0, 0, 0, &ORC_Enable_If_Conversion, NULL,
01334 "Use Ipfec if-convertor instead of original hyperblock formation" },
01335 { OVK_BOOL, OV_VISIBLE, TRUE, "force_if_conv", "",
01336 0, 0, 0, &ORC_Force_If_Conv, NULL,
01337 "Use Ipfec if-convertor without profitablity consideration" },
01338 { OVK_BOOL, OV_VISIBLE, TRUE, "relaxed_if_conv", "",
01339 0, 0, 0, &ORC_Relaxed_If_Conv, NULL,
01340 "Use Ipfec if-convertor with relaxed profability consideration" },
01341 { OVK_BOOL, OV_VISIBLE, TRUE, "combine_exit", "",
01342 0, 0, 0, &ORC_Combine_Exit, NULL,
01343 "Enable the combine exits with identical targets" },
01344 { OVK_BOOL, OV_VISIBLE, TRUE, "force_para_comp_gen", "",
01345 0, 0, 0, &ORC_Force_Para_Comp_Gen, NULL,
01346 "Generate parallel compare without profitablity consideration" },
01347 { OVK_BOOL, OV_VISIBLE, TRUE, "para_comp_gen", "",
01348 0, 0, 0, &ORC_Para_Comp_Gen, NULL,
01349 "generate parallel compare" },
01350 { OVK_BOOL, OV_VISIBLE, TRUE, "disable_merge_bb", "",
01351 0, 0, 0, &ORC_Disable_Merge_BB, NULL,
01352 "Use if-convertor without merge basic blocks" },
01353 { OVK_BOOL, OV_VISIBLE, TRUE, "prdb", "",
01354 0, 0, 0, &ORC_Enable_PRDB, NULL,
01355 "Use Ipfec PRDB instead of original one" },
01356 { OVK_BOOL, OV_VISIBLE, TRUE, "bb_verify", "",
01357 0, 0, 0, &ORC_Enable_BB_Verify, NULL,
01358 "Use Ipfec BB_Verify to check bb attributes" },
01359 { OVK_BOOL, OV_VISIBLE, TRUE, "cflow_after_schedule", "",
01360 0, 0, 0, &ORC_Enable_Opt_after_schedule, NULL,
01361 "Use Ipfec cflow_after_schedule to delete empty BBs" },
01362 { OVK_BOOL, OV_VISIBLE, TRUE, "LICM", "",
01363 1, 0, 0, &ORC_Enable_LICM, NULL,
01364 "Loop Invariant Code Motion" },
01365 { OVK_BOOL, OV_VISIBLE, TRUE, "pre_glos", "",
01366 0, 0, 0, &ORC_Enable_Prepass_GLOS, NULL,
01367 "Use Ipfec pre-pass global scheduler" },
01368 { OVK_BOOL, OV_VISIBLE, TRUE, "post_glos", "",
01369 0, 0, 0, &ORC_Enable_Postpass_GLOS, NULL,
01370 "Use Ipfec post-pass global scheduler" },
01371 { OVK_BOOL, OV_VISIBLE, TRUE, "pre_locs", "",
01372 0, 0, 0, &ORC_Enable_Prepass_LOCS, NULL,
01373 "Use Ipfec pre-pass local scheduler" },
01374 { OVK_BOOL, OV_VISIBLE, TRUE, "post_locs", "",
01375 0, 0, 0, &ORC_Enable_Postpass_LOCS, NULL,
01376 "Use Ipfec post-pass local scheduler" },
01377 { OVK_BOOL, OV_VISIBLE, TRUE, "spec", "",
01378 0, 0, 0, &ORC_Enable_Speculation, NULL,
01379 "Enable speculation" },
01380 { OVK_BOOL, OV_VISIBLE, TRUE, "fpld_spec", "",
01381 0, 0, 0, &ORC_Enable_FP_Ld_Speculation, NULL,
01382 "Enable floating-point load speculation" },
01383 { OVK_BOOL, OV_VISIBLE, TRUE, "dsra", "",
01384 0, 0, 0, &ORC_Enable_Data_Spec_Res_Aware, NULL,
01385 "Enable data speculation resource awareness" },
01386 { OVK_BOOL, OV_VISIBLE, TRUE, "data_spec", "",
01387 0, 0, 0, &ORC_Enable_Data_Speculation, NULL,
01388 "Enable data speculation" },
01389 { OVK_BOOL, OV_VISIBLE, TRUE, "cntl_spec", "",
01390 0, 0, 0, &ORC_Enable_Cntl_Speculation, NULL,
01391 "Enable control speculation" },
01392 { OVK_BOOL, OV_VISIBLE, TRUE, "cmpsd_tmplt", "",
01393 0, 0, 0, &ORC_Enable_Compressed_Template, NULL,
01394 "Turn on using of Compressed Template" },
01395 { OVK_BOOL, OV_VISIBLE, TRUE, "stress_spec", "",
01396 0, 0, 0, &ORC_Stress_Spec, NULL,
01397 "Stress speculation, for debugging purpose" },
01398 { OVK_BOOL, OV_VISIBLE, TRUE, "glos_reg_pressure_aware", "",
01399 1, 0, 0, &ORC_Glos_Reg_Pressure_Aware, NULL,
01400 "Global code motion reg pressure awareness" },
01401 { OVK_BOOL, OV_VISIBLE, TRUE, "glos_split_entry_bb", "",
01402 1, 0, 0, &ORC_Glos_Split_Entry_BB, NULL,
01403 "global code motion split entry block for larger schedule scope" },
01404 { OVK_BOOL, OV_VISIBLE, TRUE, "glos_split_exit_bb", "",
01405 1, 0, 0, &ORC_Glos_Split_Exit_BB, NULL,
01406 "global code motion split exit block for larger schedule scope" },
01407 { OVK_BOOL, OV_VISIBLE, TRUE, "glos_enable_p_ready_code_motion", "",
01408 1, 0, 0, &ORC_Glos_Enable_P_Ready_Code_Motion, NULL,
01409 "Enable P-ready code motion" },
01410 { OVK_BOOL, OV_VISIBLE, TRUE, "glos_code_motion_across_nested_rgn", "",
01411 1, 0, 0, &ORC_Glos_Code_Motion_Across_Nested_Rgn, NULL,
01412 "Enable code motion across nested region" },
01413 {OVK_BOOL, OV_VISIBLE, TRUE, "glos_enable_cntl_spec_if_converted_code", "",
01414 1, 0, 0, &ORC_Glos_Enable_Cntl_Spec_If_Converted_Code, NULL,
01415 "Enable control speculation of if-converted code"},
01416 {OVK_BOOL, OV_VISIBLE, TRUE, "glos_enable_renaming", "",
01417 1, 0, 0, &ORC_Glos_Enable_Renaming, NULL,
01418 "glos_enable_renaming"},
01419 { OVK_BOOL, OV_VISIBLE, TRUE, "adjust_variable_latency", "",
01420 1, 0, 0, &ORC_Adjust_Variable_Latency, NULL,
01421 "Adjust Variable Latency During Code motion" },
01422 { OVK_BOOL, OV_VISIBLE, TRUE, "glos_motion_across_calls", "",
01423 0, 0, 0, &ORC_Glos_Motion_Across_Calls, NULL,
01424 "Enable global code motion across calls" },
01425 { OVK_BOOL, OV_VISIBLE, TRUE, "pre_bundling", "",
01426 0, 0, 0, &ORC_Enable_Pre_Bundling, NULL,
01427 "Turn on bundling on pre-global scheduling" },
01428 { OVK_INT32, OV_VISIBLE, TRUE, "stride_prefetch", "",
01429 3, 0, 3, &ORC_Enable_Stride_Prefetch, NULL,
01430 "Turn on stride prefetching" },
01431 { OVK_NAME, OV_VISIBLE, TRUE, "edge_profile_instr", "",
01432 0, 0, 0, &Instru_File_Name, &ORC_Enable_Edge_Profile,
01433 "Enable edge profile" },
01434 { OVK_NAME, OV_VISIBLE, TRUE, "value_profile_instr", "",
01435 0, 0, 0, &Value_Instru_File_Name,&ORC_Enable_Value_Profile,
01436 "Enable value profile" },
01437 { OVK_NAME, OV_VISIBLE, TRUE, "stride_profile_instr", "",
01438 0, 0, 0, &Stride_Instru_File_Name,&ORC_Enable_Stride_Profile,
01439 "Enable value profile" },
01440 { OVK_NAME, OV_VISIBLE, TRUE, "edge_profile_annot", "",
01441 0, 0, 0, &Fb_File_Name, &ORC_Enable_Edge_Profile_Annot,
01442 "Enable edge profile" },
01443 { OVK_NAME, OV_VISIBLE, TRUE, "value_profile_annot", "",
01444 0, 0, 0, &Value_Fb_File_Name,&ORC_Enable_Value_Profile_Annot,
01445 "Enable value profile" },
01446 { OVK_NAME, OV_VISIBLE, TRUE, "stride_profile_annot", "",
01447 0, 0, 0, &Stride_Fb_File_Name,&ORC_Enable_Stride_Profile_Annot,
01448 "Enable value profile" },
01449 { OVK_NAME, OV_VISIBLE, TRUE, "safe_cntl_spec_prob", "",
01450 0, 0, 0, &ORC_safe_cntl_spec_prob, &ORC_Enable_Cntl_Speculation,
01451 "Enable control speculation"},
01452 { OVK_NAME, OV_VISIBLE, TRUE, "unsafe_cntl_spec_prob", "",
01453 0, 0, 0, &ORC_unsafe_cntl_spec_prob, &ORC_Enable_Cntl_Speculation,
01454 "Enable control speculation"},
01455 { OVK_INT32, OV_INTERNAL, TRUE, "value_instr_range", "",
01456 0, 0, INT32_MAX, &Value_Instr_Range, NULL },
01457 { OVK_INT32, OV_INTERNAL, TRUE, "value_instr_pu_id", "",
01458 0, 0, INT32_MAX, &Value_Instr_Pu_Id, NULL },
01459 { OVK_BOOL, OV_VISIBLE, TRUE, "use_random_prob", "",
01460 0, 0, 0, &ORC_Enable_Random_Prob, NULL,
01461 "Enable value profile" },
01462 { OVK_BOOL, OV_VISIBLE, TRUE, "chk_fail", "",
01463 0, 0, 0, &ORC_Force_CHK_Fail, NULL,
01464 "Force every chk fail" },
01465 { OVK_BOOL, OV_VISIBLE, TRUE, "cascade", "",
01466 0, 0, 0, &ORC_Enable_Cascade, NULL,
01467 "Enable cascaded speculation" },
01468 { OVK_BOOL, OV_VISIBLE, TRUE, "hold_uses", "",
01469 0, 0, 0, &ORC_Hold_Uses, NULL,
01470 "Hold the uses of speculative load" },
01471 { OVK_BOOL, OV_VISIBLE, TRUE, "profitability", "",
01472 0, 0, 0, &ORC_Profitability, NULL,
01473 "Adjust all ipfec flags considering profitability" },
01474 { OVK_BOOL, OV_VISIBLE, TRUE, "chk_compact", "",
01475 0, 0, 0, &ORC_Chk_Compact, NULL,
01476 "Whether combine chk split BB" },
01477 { OVK_BOOL, OV_VISIBLE, TRUE, "load_safety", "",
01478 0, 0, 0, &ORC_Enable_Safety_Load, NULL,
01479 "Identify safety load" },
01480 { OVK_BOOL, OV_VISIBLE, TRUE, "multi_branch", "",
01481 0, 0, 0, &ORC_Enable_Multi_Branch, NULL,
01482 "Enable Multiple branch" },
01483 { OVK_BOOL, OV_VISIBLE, TRUE, "pre_multi_branch", "",
01484 0, 0, 0, &ORC_Enable_Pre_Multi_Branch, NULL,
01485 "Enable Previous Multiple branch" },
01486 { OVK_BOOL, OV_VISIBLE, TRUE, "post_multi_branch", "",
01487 0, 0, 0, &ORC_Enable_Post_Multi_Branch, NULL,
01488 "Enable Post Multiple branch" },
01489 { OVK_BOOL, OV_VISIBLE, TRUE, "cache_ana", "",
01490 0, 0, 0, &ORC_Enable_Cache_Analysis, NULL,
01491 "Enable Cache conflict Analysis" },
01492
01493
01494
01495
01496
01497
01498
01499 { OVK_INT32, OV_INTERNAL, TRUE, "care_machine_level", "care_m",
01500 0, 0, INT32_MAX, &ORC_sched_care_machine, NULL },
01501
01502
01503 { OVK_COUNT }
01504 };
01505
01506 static OPTION_DESC Options_CYCLE[] = {
01507 { OVK_BOOL, OV_VISIBLE, TRUE, "cpe", "",
01508 0, 0, 0, &Cycle_PU_Enable, NULL,
01509 "Cycle count enable" },
01510 { OVK_NAME, OV_VISIBLE, TRUE, "cbe", "",
01511 0, 0, 0, &Cycle_String, &Cycle_BB_Enable,
01512 "Cycle count enable" },
01513 { OVK_COUNT }
01514 };
01515
01516
01517 static OPTION_DESC Options_VT[] = {
01518 { OVK_BOOL, OV_VISIBLE, TRUE, "bb_op", "",
01519 0, 0, 0, &VT_Enable_BB_OP, NULL,
01520 "Enable a bb's op visualization"},
01521 { OVK_BOOL, OV_VISIBLE, TRUE, "glbl_cfg", "",
01522 0, 0, 0, &VT_Enable_Global_CFG, NULL,
01523 "Enable global control flow graph visualization"},
01524 { OVK_BOOL, OV_VISIBLE, TRUE, "rgnl_cfg", "",
01525 0, 0, 0, &VT_Enable_Regional_CFG, NULL,
01526 "Enable regional control flow graph visualization"},
01527 { OVK_BOOL, OV_VISIBLE, TRUE, "rgn_tree", "",
01528 0, 0, 0, &VT_Enable_Region_Tree, NULL,
01529 "Enable region tree visualization"},
01530 { OVK_BOOL, OV_VISIBLE, TRUE, "bb_dag", "",
01531 0, 0, 0, &VT_Enable_BB_DAG, NULL,
01532 "Enable bb dependence graph visualization"},
01533 { OVK_BOOL, OV_VISIBLE, TRUE, "rgnl_dag", "",
01534 0, 0, 0, &VT_Enable_Regional_DAG, NULL,
01535 "Enable regional dependence graph visualization"},
01536 { OVK_BOOL, OV_VISIBLE, TRUE, "ptn_gph", "",
01537 0, 0, 0, &VT_Enable_Partition_Graph, NULL,
01538 "Enable partition graph visualization"},
01539
01540
01541 { OVK_BOOL, OV_VISIBLE, TRUE, "cfg_label", "",
01542 0, 0, 0, &VT_Enable_CFG_Label, NULL,
01543 "Enable edge label when visualizing control flow graph"},
01544 { OVK_BOOL, OV_VISIBLE, TRUE, "dag_br", "",
01545 0, 0, 0, &VT_Enable_DAG_BR, NULL,
01546 "Enable PREBR and POSTBR dependencies when visualizing dependence graph"},
01547
01548 { OVK_COUNT }
01549 };
01550
01551
01552 static OPTION_DESC Options_SKIP[] = {
01553 { OVK_LIST, OV_SHY, FALSE, "locs_skip_bb_before", "locs_skip_bb_b",
01554 0, 0, 4096, &raw_locs_skip_bb, NULL,
01555 "" },
01556 { OVK_LIST, OV_SHY, FALSE, "locs_skip_bb_after", "locs_skip_bb_a",
01557 0, 0, 4096, &raw_locs_skip_bb, NULL,
01558 "" },
01559 { OVK_LIST, OV_SHY, FALSE, "locs_skip_bb_equal", "locs_skip_bb_e",
01560 0, 0, 4096, &raw_locs_skip_bb, NULL,
01561 "" },
01562 { OVK_LIST, OV_SHY, FALSE, "glos_skip_bb_before", "glos_skip_bb_b",
01563 0, 0, 4096, &raw_glos_skip_bb, NULL,
01564 "" },
01565 { OVK_LIST, OV_SHY, FALSE, "glos_skip_bb_after", "glos_skip_bb_a",
01566 0, 0, 4096, &raw_glos_skip_bb, NULL,
01567 "" },
01568 { OVK_LIST, OV_SHY, FALSE, "glos_skip_bb_equal", "glos_skip_bb_e",
01569 0, 0, 4096, &raw_glos_skip_bb, NULL,
01570 "" },
01571 { OVK_LIST, OV_SHY, FALSE, "if_conv_skip_rgn_before", "if_conv_skip_rgn_b",
01572 0, 0, 4096, &raw_if_conv_skip_rgn, NULL,
01573 "" },
01574 { OVK_LIST, OV_SHY, FALSE, "if_conv_skip_rgn_after", "if_conv_skip_rgn_a",
01575 0, 0, 4096, &raw_if_conv_skip_rgn, NULL,
01576 "" },
01577 { OVK_LIST, OV_SHY, FALSE, "if_conv_skip_rgn_equal", "if_conv_skip_rgn_e",
01578 0, 0, 4096, &raw_if_conv_skip_rgn, NULL,
01579 "" },
01580 { OVK_LIST, OV_SHY, FALSE, "if_conv_skip_area_after", "if_conv_skip_area_a",
01581 0, 0, 4096, &raw_if_conv_skip_area, NULL,
01582 "" },
01583 { OVK_LIST, OV_SHY, FALSE, "if_conv_skip_area_before", "if_conv_skip_area_b",
01584 0, 0, 4096, &raw_if_conv_skip_area, NULL,
01585 "" },
01586 {OVK_LIST, OV_SHY, FALSE, "if_conv_skip_area_equal", "if_conv_skip_area_e",
01587 0, 0, 4096, &raw_if_conv_skip_area, NULL,
01588 "" },
01589 { OVK_LIST, OV_SHY, FALSE, "glos_skip_rgn_before", "glos_skip_rgn_b",
01590 0, 0, 4096, &raw_glos_skip_rgn, NULL,
01591 "" },
01592 { OVK_LIST, OV_SHY, FALSE, "glos_skip_rgn_after", "glos_skip_rgn_a",
01593 0, 0, 4096, &raw_glos_skip_rgn, NULL,
01594 "" },
01595 { OVK_LIST, OV_SHY, FALSE, "glos_skip_rgn_equal", "glos_skip_rgn_e",
01596 0, 0, 4096, &raw_glos_skip_rgn, NULL,
01597 "" },
01598 { OVK_LIST, OV_SHY, FALSE, "spec_skip_rgn_before", "spec_skip_rgn_b",
01599 0, 0, 4096, &raw_spec_skip_rgn, NULL,
01600 "" },
01601 { OVK_LIST, OV_SHY, FALSE, "spec_skip_rgn_after", "spec_skip_rgn_a",
01602 0, 0, 4096, &raw_spec_skip_rgn, NULL,
01603 "" },
01604 { OVK_LIST, OV_SHY, FALSE, "spec_skip_rgn_equal", "spec_skip_rgn_e",
01605 0, 0, 4096, &raw_spec_skip_rgn, NULL,
01606 "" },
01607 { OVK_LIST, OV_SHY, FALSE, "spec_skip_bb_before", "spec_skip_bb_b",
01608 0, 0, 4096, &raw_spec_skip_bb, NULL,
01609 "" },
01610 { OVK_LIST, OV_SHY, FALSE, "spec_skip_bb_after", "spec_skip_bb_a",
01611 0, 0, 4096, &raw_spec_skip_bb, NULL,
01612 "" },
01613 { OVK_LIST, OV_SHY, FALSE, "spec_skip_bb_equal", "spec_skip_bb_e",
01614 0, 0, 4096, &raw_spec_skip_bb, NULL,
01615 "" },
01616 { OVK_LIST, OV_SHY, FALSE, "msched_skip_bb_before", "msched_skip_bb_b",
01617 0, 0, 4096, &raw_msched_skip_bb, NULL,
01618 "" },
01619 { OVK_LIST, OV_SHY, FALSE, "msched_skip_bb_after", "msched_skip_bb_a",
01620 0, 0, 4096, &raw_msched_skip_bb, NULL,
01621 "" },
01622 { OVK_LIST, OV_SHY, FALSE, "msched_skip_bb_equal", "msched_skip_bb_e",
01623 0, 0, 4096, &raw_msched_skip_bb, NULL,
01624 "" },
01625 { OVK_LIST, OV_SHY, FALSE, "msched_skip_rgn_before", "msched_skip_rgn_b",
01626 0, 0, 4096, &raw_msched_skip_rgn, NULL,
01627 "" },
01628 { OVK_LIST, OV_SHY, FALSE, "msched_skip_rgn_after", "msched_skip_rgn_a",
01629 0, 0, 4096, &raw_msched_skip_rgn, NULL,
01630 "" },
01631 { OVK_LIST, OV_SHY, FALSE, "msched_skip_rgn_equal", "msched_skip_rgn_e",
01632 0, 0, 4096, &raw_msched_skip_rgn, NULL,
01633 "" },
01634 { OVK_LIST, OV_SHY, FALSE, "spec_skip_PU_before", "spec_skip_PU_b",
01635 0, 0, 4096, &raw_spec_skip_PU, NULL,
01636 "" },
01637 { OVK_LIST, OV_SHY, FALSE, "spec_skip_PU_after", "spec_skip_PU_a",
01638 0, 0, 4096, &raw_spec_skip_PU, NULL,
01639 "" },
01640 { OVK_LIST, OV_SHY, FALSE, "spec_skip_PU_equal", "spec_skip_PU_e",
01641 0, 0, 4096, &raw_spec_skip_PU, NULL,
01642 "" },
01643 { OVK_LIST, OV_SHY, FALSE, "if_conv_skip_PU_before", "if_conv_skip_PU_b",
01644 0, 0, 4096, &raw_if_conv_skip_PU, NULL,
01645 "" },
01646 { OVK_LIST, OV_SHY, FALSE, "if_conv_skip_PU_after", "if_conv_skip_PU_a",
01647 0, 0, 4096, &raw_if_conv_skip_PU, NULL,
01648 "" },
01649 { OVK_LIST, OV_SHY, FALSE, "if_conv_skip_PU_equal", "if_conv_skip_PU_e",
01650 0, 0, 4096, &raw_if_conv_skip_PU, NULL,
01651 "" },
01652 { OVK_LIST, OV_SHY, FALSE, "PRDB_skip_PU_before", "PRDB_skip_PU_b",
01653 0, 0, 4096, &raw_PRDB_skip_PU, NULL,
01654 "" },
01655 { OVK_LIST, OV_SHY, FALSE, "PRDB_skip_PU_after", "PRDB_skip_PU_a",
01656 0, 0, 4096, &raw_PRDB_skip_PU, NULL,
01657 "" },
01658 { OVK_LIST, OV_SHY, FALSE, "PRDB_skip_PU_equal", "PRDB_skip_PU_e",
01659 0, 0, 4096, &raw_PRDB_skip_PU, NULL,
01660 "" },
01661 { OVK_LIST, OV_SHY, FALSE, "pre_glos_skip_PU_before", "pre_glos_skip_PU_b",
01662 0, 0, 4096, &raw_pre_glos_skip_PU, NULL,
01663 "" },
01664 { OVK_LIST, OV_SHY, FALSE, "pre_glos_skip_PU_after", "pre_glos_skip_PU_a",
01665 0, 0, 4096, &raw_pre_glos_skip_PU, NULL,
01666 "" },
01667 { OVK_LIST, OV_SHY, FALSE, "pre_glos_skip_PU_equal", "pre_glos_skip_PU_e",
01668 0, 0, 4096, &raw_pre_glos_skip_PU, NULL,
01669 "" },
01670 { OVK_LIST, OV_SHY, FALSE, "post_locs_skip_PU_before", "post_locs_skip_PU_b",
01671 0, 0, 4096, &raw_post_locs_skip_PU, NULL,
01672 "" },
01673 { OVK_LIST, OV_SHY, FALSE, "post_locs_skip_PU_after", "post_locs_skip_PU_a",
01674 0, 0, 4096, &raw_post_locs_skip_PU, NULL,
01675 "" },
01676 { OVK_LIST, OV_SHY, FALSE, "post_locs_skip_PU_equal", "post_locs_skip_PU_e",
01677 0, 0, 4096, &raw_post_locs_skip_PU, NULL,
01678 "" },
01679 { OVK_LIST, OV_SHY, FALSE, "spec_skip_op_before", "spec_skip_op_b",
01680 0, 0, 4096, &raw_spec_skip_op, NULL,
01681 "" },
01682 { OVK_LIST, OV_SHY, FALSE, "spec_skip_op_after", "spec_skip_op_a",
01683 0, 0, 4096, &raw_spec_skip_op, NULL,
01684 "" },
01685 { OVK_LIST, OV_SHY, FALSE, "spec_skip_op_equal", "spec_skip_op_e",
01686 0, 0, 4096, &raw_spec_skip_op, NULL,
01687 "" },
01688 { OVK_LIST, OV_SHY, FALSE, "mlbr_skip_bb_before", "mlbr_skip_bb_b",
01689 0, 0, 4096, &raw_mlbr_skip_bb, NULL,
01690 "" },
01691 { OVK_LIST, OV_SHY, FALSE, "mlbr_skip_bb_after", "mlbr_skip_bb_a",
01692 0, 0, 4096, &raw_mlbr_skip_bb, NULL,
01693 "" },
01694 { OVK_LIST, OV_SHY, FALSE, "mlbr_skip_bb_equal", "mlbr_skip_bb_e",
01695 0, 0, 4096, &raw_mlbr_skip_bb, NULL,
01696 "" },
01697 { OVK_LIST, OV_SHY, FALSE, "glos_rename_skip_bb_before", "glos_rename_skip_bb_b",
01698 0, 0, 4096, &raw_glos_rename_skip_bb, NULL,
01699 "" },
01700 { OVK_LIST, OV_SHY, FALSE, "glos_rename_skip_bb_after", "glos_rename_skip_bb_a",
01701 0, 0, 4096, &raw_glos_rename_skip_bb, NULL,
01702 "" },
01703 { OVK_LIST, OV_SHY, FALSE, "glos_rename_skip_bb_equal", "glos_rename_skip_bb_e",
01704 0, 0, 4096, &raw_glos_rename_skip_bb, NULL,
01705 "" },
01706 { OVK_LIST, OV_SHY, FALSE, "glos_rename_skip_op_before", "glos_rename_skip_op_b",
01707 0, 0, 4096, &raw_glos_rename_skip_op, NULL,
01708 "" },
01709 { OVK_LIST, OV_SHY, FALSE, "glos_rename_skip_op_after", "glos_rename_skip_op_a",
01710 0, 0, 4096, &raw_glos_rename_skip_op, NULL,
01711 "" },
01712 { OVK_LIST, OV_SHY, FALSE, "glos_rename_skip_op_equal", "glos_rename_skip_op_e",
01713 0, 0, 4096, &raw_glos_rename_skip_op, NULL,
01714 "" },
01715 { OVK_LIST, OV_SHY, FALSE, "latency2_before", "latency2_b",
01716 0, 0, 4096, &raw_latency2, NULL,
01717 "" },
01718 { OVK_LIST, OV_SHY, FALSE, "latency2_after", "latency2_a",
01719 0, 0, 4096, &raw_latency2, NULL,
01720 "" },
01721 { OVK_LIST, OV_SHY, FALSE, "latency2_equal", "latency2_e",
01722 0, 0, 4096, &raw_latency2, NULL,
01723 "" },
01724
01725 { OVK_COUNT }
01726 };
01727 #endif
01728
01729 OPTION_GROUP Cg_Option_Groups[] = {
01730 { "CG", ':', '=', Options_CG },
01731 #if !defined(TARG_NVISA)
01732 { "SWP", ':', '=', Options_CG_SWP },
01733 { "GRA", ':', '=', Options_GRA },
01734 #endif
01735 #ifdef TARG_IA64
01736 { "IPFEC", ':', '=', Options_IPFEC },
01737 { "CYCLE", ':', '=', Options_CYCLE },
01738 { "VT", ':', '=', Options_VT },
01739 { "SKIP", ':', '=', Options_SKIP },
01740 #endif
01741 { NULL }
01742 };
01743
01744
01745 extern INT prefetch_ahead;
01746 INT _prefetch_ahead = 2;
01747 #if defined(BUILD_OS_DARWIN) || !defined(SHARED_BUILD)
01748
01749 #define prefetch_ahead (_prefetch_ahead)
01750 #else
01751 #pragma weak prefetch_ahead = _prefetch_ahead
01752 #endif
01753
01754
01755
01756
01757
01758
01759
01760
01761
01762
01763 static void
01764 Configure_prefetch_ahead(void)
01765 {
01766 static INT32 save_L1_pf_latency = -1;
01767 static INT32 save_L2_pf_latency = -1;
01768 if ( save_L1_pf_latency < 0 ) {
01769 save_L1_pf_latency = CG_L1_pf_latency;
01770 save_L2_pf_latency = CG_L2_pf_latency;
01771 }
01772 if (Enable_Prefetch_Ahead_For_Target()) {
01773 if ( ! CG_L2_pf_latency_overridden )
01774 if ( prefetch_ahead )
01775 CG_L2_pf_latency = 0;
01776 else
01777 CG_L2_pf_latency = save_L2_pf_latency;
01778 if ( ! CG_L1_pf_latency_overridden )
01779 if (prefetch_ahead)
01780 CG_L1_pf_latency = 0;
01781 else
01782 CG_L1_pf_latency = save_L1_pf_latency;
01783 }
01784 }
01785
01786
01787
01788
01789
01790
01791
01792
01793
01794
01795 static void
01796 Configure_Prefetch(void)
01797 {
01798 if ( ! OPT_shared_memory) {
01799 CG_exclusive_prefetch = TRUE;
01800 }
01801
01802
01803
01804
01805
01806
01807 if ( ! Target_Has_Prefetch()
01808 || (CG_enable_prefetch_overridden && ! CG_enable_prefetch)
01809 || ( CG_enable_z_conf_prefetch_overridden
01810 && ! CG_enable_z_conf_prefetch
01811 && CG_enable_nz_conf_prefetch_overridden
01812 && ! CG_enable_nz_conf_prefetch)
01813 ) {
01814 disable_prefetch:
01815 CG_enable_prefetch = FALSE;
01816 CG_enable_z_conf_prefetch = FALSE;
01817 CG_enable_nz_conf_prefetch = FALSE;
01818 CG_enable_pf_L1_ld = FALSE;
01819 CG_enable_pf_L1_st = FALSE;
01820 CG_enable_pf_L2_ld = FALSE;
01821 CG_enable_pf_L2_st = FALSE;
01822 return;
01823 }
01824
01825
01826
01827
01828 if ( ! CG_enable_prefetch_overridden ) {
01829 CG_enable_prefetch = FALSE;
01830
01831
01832
01833
01834 if ( ( CG_enable_z_conf_prefetch_overridden
01835 && CG_enable_z_conf_prefetch)
01836 || ( CG_enable_nz_conf_prefetch_overridden
01837 && CG_enable_nz_conf_prefetch)
01838 ) {
01839 CG_enable_prefetch = TRUE;
01840 }
01841
01842
01843
01844 else if (Enable_Prefetch_For_Target()) {
01845 CG_enable_prefetch = TRUE;
01846 }
01847
01848
01849
01850 else goto disable_prefetch;
01851 }
01852
01853
01854
01855
01856 if ( ! CG_enable_z_conf_prefetch_overridden )
01857 CG_enable_z_conf_prefetch = FALSE;
01858 if ( ! CG_enable_nz_conf_prefetch_overridden )
01859 CG_enable_nz_conf_prefetch = TRUE;
01860
01861 if (Enable_Prefetch_For_Target()) {
01862 if ( ! CG_L1_ld_latency_overridden ) CG_L1_ld_latency = 8;
01863 #ifndef TARG_IA64
01864 if ( ! CG_enable_pf_L1_ld_overridden ) CG_enable_pf_L1_ld = TRUE;
01865 if ( ! CG_enable_pf_L1_st_overridden ) CG_enable_pf_L1_st = TRUE;
01866 #else
01867 if ( ! CG_enable_pf_L1_ld_overridden ) CG_enable_pf_L1_ld = FALSE;
01868 if ( ! CG_enable_pf_L1_st_overridden ) CG_enable_pf_L1_st = FALSE;
01869 #endif
01870 if ( ! CG_enable_pf_L2_ld_overridden ) CG_enable_pf_L2_ld = TRUE;
01871 if ( ! CG_enable_pf_L2_st_overridden ) CG_enable_pf_L2_st = TRUE;
01872 } else {
01873 if ( ! CG_enable_pf_L1_ld_overridden ) CG_enable_pf_L1_ld = TRUE;
01874 if ( ! CG_enable_pf_L1_st_overridden ) CG_enable_pf_L1_st = TRUE;
01875 if ( ! CG_enable_pf_L2_ld_overridden ) CG_enable_pf_L2_ld = TRUE;
01876 if ( ! CG_enable_pf_L2_st_overridden ) CG_enable_pf_L2_st = TRUE;
01877 }
01878
01879
01880
01881
01882 if ( ! CG_enable_pf_L1_ld
01883 && ! CG_enable_pf_L1_st
01884 && ! CG_enable_pf_L2_ld
01885 && ! CG_enable_pf_L2_st ) goto disable_prefetch;
01886 }
01887
01888
01889
01890
01891
01892
01893
01894
01895
01896
01897
01898
01899 static void
01900 Configure_CG_Options(void)
01901 {
01902
01903
01904 if ( ! CG_localize_tns_Set)
01905 CG_localize_tns = (CG_opt_level <= 1);
01906
01907 if ( ! Enable_SWP_overridden )
01908 {
01909
01910 #ifdef TARG_IA64
01911 Enable_SWP = CG_opt_level >= 2;
01912 #else
01913 Enable_SWP = FALSE;
01914 #endif
01915 }
01916
01917 if (CG_opt_level > 2 && !OPT_unroll_size_overridden )
01918 #if defined(KEY) && defined(TARG_X8664) //adjust unroll_size default for em64t and core
01919 if (Is_Target_EM64T() || Is_Target_Core())
01920 OPT_unroll_size = 256;
01921 else
01922 OPT_unroll_size = 128;
01923 #elif !defined(TARG_NVISA)
01924 OPT_unroll_size = 128;
01925 #endif
01926
01927 if ( OPT_Unroll_Analysis_Set )
01928 {
01929 CG_LOOP_unroll_analysis = OPT_Unroll_Analysis;
01930 }
01931 CG_LOOP_unroll_times_max = OPT_unroll_times;
01932 CG_LOOP_unrolled_size_max = OPT_unroll_size;
01933
01934 CG_LOOP_ooo_unroll_heuristics = PROC_is_out_of_order();
01935
01936 if (OPT_Space)
01937 {
01938 CGEXP_expandconstant = 2;
01939 }
01940
01941 if (!Integer_Divide_By_Constant_overridden
01942 #ifdef KEY
01943 && CGEXP_cvrt_int_div_to_mult
01944 #endif
01945 ) {
01946 CGEXP_cvrt_int_div_to_mult = (!OPT_Space) && (CG_opt_level > 0);
01947 }
01948
01949 if (!Integer_Divide_Use_Float_overridden
01950 #ifdef KEY
01951 && CGEXP_cvrt_int_div_to_fdiv
01952 #endif
01953 ) {
01954 CGEXP_cvrt_int_div_to_fdiv = !Kernel_Code
01955 && Enable_Idiv_In_FPU_For_Target()
01956 && !OPT_Space
01957 && CG_opt_level > 0;
01958 }
01959
01960 #ifdef KEY
01961 if (!Integer_Multiply_By_Constant_overridden &&
01962 CGEXP_cvrt_int_mult_to_add_shift) {
01963 CGEXP_cvrt_int_mult_to_add_shift = (!OPT_Space) && (CG_opt_level > 0);
01964 }
01965 #endif
01966
01967 if (Kernel_Code && !CG_tail_call_overridden) CG_tail_call = FALSE;
01968
01969 if (Kernel_Code && !GCM_Speculative_Ptr_Deref_Set)
01970 GCM_Eager_Ptr_Deref = FALSE;
01971
01972 if (!CGTARG_Branch_Taken_Prob_overridden)
01973 CGTARG_Branch_Taken_Prob = "0.95";
01974 CGTARG_Branch_Taken_Probability = atof(CGTARG_Branch_Taken_Prob);
01975
01976 if ( !CG_enable_spec_idiv_overridden && Enable_Spec_Idiv_For_Target() )
01977 CG_enable_spec_idiv = FALSE;
01978
01979 if ( ! CG_LOOP_fix_recurrences_specified
01980 && ( CG_LOOP_back_substitution
01981 && CG_LOOP_back_substitution_specified
01982 || CG_LOOP_interleave_reductions
01983 && CG_LOOP_interleave_reductions_specified
01984 || CG_LOOP_interleave_posti
01985 && CG_LOOP_interleave_posti_specified
01986 || CG_LOOP_reassociate
01987 && CG_LOOP_reassociate_specified)) {
01988 CG_LOOP_fix_recurrences = TRUE;
01989 }
01990
01991 if ( Enable_SWP && ! Enable_LOH_overridden )
01992 Enable_LOH = Enable_LOH_For_Target();
01993
01994 if (!EBO_Opt_Level_overridden) {
01995 EBO_Opt_Level = (CG_opt_level > 0) ? EBO_Opt_Level_Default : 0;
01996 }
01997 Enable_CG_Peephole = (CG_opt_level > 0) ? TRUE : FALSE;
01998 #ifdef TARG_IA64
01999
02000 if ( IPFEC_Profitability ) {
02001
02002 IPFEC_Enable_Region_Formation = FALSE;
02003
02004
02005 IPFEC_Enable_If_Conversion = TRUE;
02006 IPFEC_Force_If_Conv = FALSE;
02007 IPFEC_Force_Para_Comp_Gen = FALSE;
02008 IPFEC_Para_Comp_Gen = TRUE;
02009 IPFEC_Disable_Merge_BB = FALSE;
02010
02011
02012 IPFEC_Enable_PRDB= TRUE;
02013
02014
02015 IPFEC_Enable_Opt_after_schedule=TRUE;
02016
02017
02018 IPFEC_Enable_Prepass_GLOS = TRUE;
02019 IPFEC_Enable_Postpass_LOCS = TRUE;
02020
02021
02022 IPFEC_Enable_Data_Speculation = TRUE;
02023 IPFEC_Force_CHK_Fail = FALSE;
02024 IPFEC_Enable_Cascade = TRUE;
02025 IPFEC_Hold_Uses = FALSE;
02026 IPFEC_Chk_Compact = TRUE;
02027 IPFEC_Enable_Safety_Load = TRUE;
02028
02029
02030 IPFEC_Enable_Compressed_Template = TRUE;
02031 IPFEC_Enable_Pre_Bundling = TRUE;
02032 }
02033 #endif
02034
02035
02036
02037 if (!Enable_Fill_Delay_Slots_For_Target() || !Enable_Fill_Delay_Slots)
02038 GCM_Enable_Fill_Delay_Slots = FALSE;
02039
02040
02041
02042 if (CG_maxinss_overridden) {
02043 if (CG_maxinss > Split_BB_Length) {
02044 Split_BB_Length = CG_maxinss;
02045 }
02046 } else {
02047 CG_maxinss = CG_maxinss_default * CG_opt_level;
02048 if (CG_maxinss == 0 || CG_maxinss > Split_BB_Length) {
02049 CG_maxinss = Split_BB_Length;
02050 }
02051 }
02052
02053
02054
02055
02056 if ( Kernel_Code && ! CFLOW_Enable_Clone_overridden ) {
02057
02058
02059 CFLOW_Enable_Clone = FALSE;
02060 } else if (OPT_Space) {
02061 if (!clone_incr_overridden) CFLOW_clone_incr = 1;
02062 if (!clone_min_incr_overridden) CFLOW_clone_min_incr = 1;
02063 if (!clone_max_incr_overridden) CFLOW_clone_max_incr = 3;
02064 }
02065
02066 #ifdef TARG_NVISA
02067 CG_localize_tns = TRUE;
02068 Enable_SWP = FALSE;
02069 #ifdef FUTURE_SUPPORT
02070 if (!CG_use_16bit_ops_overridden)
02071 CG_use_16bit_ops = (Target_ISA < TARGET_ISA_compute_20);
02072 if (!CG_rematerialize_grf_overridden)
02073 CG_rematerialize_grf = (Target_ISA < TARGET_ISA_compute_20);
02074 #endif
02075 #endif
02076
02077 Configure_Prefetch();
02078 #ifdef TARG_X8664
02079 if ((Target == TARGET_em64t ||
02080 Target == TARGET_core ||
02081 Target == TARGET_wolfdale) &&
02082 ! CG_use_xortozero_Set) {
02083 CG_use_xortozero = TRUE;
02084 }
02085
02086 if (OPT_Space && !CG_use_xortozero_Set)
02087 CG_use_xortozero = TRUE;
02088
02089 if (Target == TARGET_barcelona && ! CG_push_pop_int_saved_regs_Set)
02090 CG_push_pop_int_saved_regs = TRUE;
02091 #endif
02092 }
02093
02094
02095
02096
02097
02098
02099
02100
02101
02102 void
02103 CG_Configure_Opt_Level( INT opt_level )
02104 {
02105 static BOOL opt_level_configured = FALSE;
02106
02107 if ( opt_level_configured && opt_level == CG_opt_level )
02108 return;
02109
02110 if ( opt_level_configured && cg_opt_level_overridden ) {
02111
02112 DevWarn("Attempt to override CG:opt_level=%d flag. Ignored.",CG_opt_level);
02113 return;
02114 }
02115
02116 opt_level_configured = TRUE;
02117
02118 if ( ! cg_opt_level_overridden )
02119 CG_opt_level = opt_level;
02120
02121 Configure_CG_Options();
02122 }
02123
02124
02125
02126
02127
02128
02129
02130
02131
02132
02133
02134
02135
02136 static void
02137 Build_Option_String (INT argc, char **argv)
02138 {
02139 INT16 i;
02140 INT16 arg_size = 0;
02141
02142 Argv0 = argv[0];
02143
02144 for (i=1; i<argc; ++i)
02145 if ( argv[i][0] == '-' && argv[i][1] != 'f')
02146 arg_size += ( strlen(argv[i]) + 1 );
02147
02148 if ( arg_size > 0 ) {
02149 register char *p;
02150
02151 p = option_string = (char *) malloc(arg_size+1);
02152
02153 if ( option_string == NULL ) {
02154 ErrMsg ( EC_No_Mem, "Build_Option_String" );
02155 exit ( 1 );
02156 }
02157
02158 p[0] = '\0';
02159 for (i=1; i<argc; ++i)
02160 if ( argv[i][0] == '-' && argv[i][1] != 'f') {
02161 register INT len = strlen (argv[i]) + 1;
02162 if (p != option_string)
02163 *p++ = ' ';
02164 bcopy (argv[i], p, len);
02165 p += len - 1;
02166 }
02167
02168 } else {
02169 option_string = const_cast<char*>("none");
02170 }
02171 }
02172
02173
02174
02175
02176
02177
02178
02179
02180
02181
02182 static void
02183 Process_Command_Line (INT argc, char **argv)
02184 {
02185 INT16 i;
02186 char *cp;
02187
02188
02189 for ( i=0; i<argc; i++ ) {
02190 if ( argv[i] != NULL && *(argv[i]) == '-' ) {
02191 cp = argv[i]+1;
02192
02193
02194 if (Process_Command_Line_Group(cp, Cg_Option_Groups))
02195 continue;
02196
02197 switch ( *cp++ ) {
02198
02199 case 'f':
02200
02201 switch (*cp) {
02202 case 'a':
02203 case 's':
02204 Assembly = TRUE;
02205 Asm_File_Name = cp + 2;
02206 break;
02207
02208 case 'o':
02209 Object_Code = TRUE;
02210 Obj_File_Name = cp + 2;
02211 break;
02212
02213 }
02214 break;
02215
02216 case 's':
02217 case 'S':
02218 Assembly = TRUE;
02219 break;
02220
02221 case 't':
02222
02223 if ( strncmp ( cp-1, "tfprev10", 8 ) == 0 ) {
02224 No_Quad_Aligned_Branch = TRUE;
02225 }
02226
02227 break;
02228 #ifdef TARG_IA64
02229 case 'O':
02230 if (!strncasecmp (cp-1, "orc:=",5)) {
02231 cp += 4 ;
02232 if (!strcasecmp (cp, "on") || !strcasecmp(cp, "true")) {
02233 CG_Enable_Ipfec_Phases = TRUE;
02234 } else if (!strcasecmp (cp, "off") || !strcasecmp(cp, "false")) {
02235 CG_Enable_Ipfec_Phases = FALSE;
02236 }
02237 }
02238 break;
02239 #endif
02240 }
02241 }
02242 }
02243 }
02244
02245
02246
02247
02248
02249
02250
02251
02252
02253
02254 static void
02255 Prepare_Source (void)
02256 {
02257 char *fname;
02258
02259
02260
02261
02262
02263 #if defined(TARG_SL)
02264
02265
02266
02267
02268
02269
02270 if( Irb_File_Name )
02271 fname = Last_Pathname_Component ( Irb_File_Name );
02272 else
02273 #endif
02274 fname = Last_Pathname_Component ( Src_File_Name );
02275
02276
02277
02278
02279 if ( List_Cite ) {
02280 Assembly = TRUE;
02281 }
02282
02283 if ( Assembly ) {
02284 if ( Asm_File_Name == NULL ) {
02285
02286 Asm_File_Name = New_Extension (fname, ASM_FILE_EXTENSION );
02287 }
02288
02289
02290 if ( ( Asm_File = fopen ( Asm_File_Name, "w" ) ) == NULL ) {
02291 ErrMsg ( EC_Asm_Open, Asm_File_Name, errno );
02292 Terminate (1);
02293 }
02294 #ifdef TARG_IA64
02295 if (Create_Cycle_Output) {
02296 if ( ( Output_h_File = fopen( Output_h_File_Name, "w" ) ) == NULL ) { ErrMsg ( EC_Asm_Open, Output_h_File_Name, errno );
02297 Terminate (1);
02298 }
02299 }
02300 #endif
02301 }
02302
02303
02304 if ( Obj_File_Name == NULL ) {
02305 #if defined(KEY) && !defined(TARG_NVISA)
02306
02307
02308
02309
02310
02311 char* tmp_fname = tempnam( NULL, NULL );
02312 Obj_File_Name = New_Extension( tmp_fname, OBJ_FILE_EXTENSION );
02313 #else
02314
02315 Obj_File_Name = New_Extension (fname, OBJ_FILE_EXTENSION);
02316 #endif
02317 }
02318
02319 #if 0
02320
02321
02322 Configure_Source ( NULL );
02323 #endif
02324 }
02325
02326 static void
02327 Increment_Register_Name (char **name)
02328 {
02329 INT i = atoi(*name);
02330 ++i;
02331 sprintf(*name, "%d", i);
02332 }
02333
02334 static void
02335 Set_Register_Range_Not_Allocatable (char *regname1, char *regname2)
02336 {
02337 char regname[8];
02338 char *p;
02339 INT count = 0;
02340 strcpy(regname,regname1);
02341
02342 for (p = regname; *p && !isdigit(*p); ++p) ;
02343 FmtAssert( strncmp(regname1, regname2, p - regname) == 0,
02344 ("register range %s-%s doesn't have matching prefixes",
02345 regname1, regname2));
02346
02347
02348 while (strcmp(regname, regname2) != 0) {
02349 Set_Register_Never_Allocatable (regname);
02350 Increment_Register_Name (&p);
02351 ++count; if (count > 200) break;
02352 }
02353 Set_Register_Never_Allocatable (regname);
02354 }
02355
02356 struct Set_DREG_Not_Allocatable
02357 {
02358 inline void operator() (UINT32, ST_ATTR *st_attr) const {
02359 if (ST_ATTR_kind (*st_attr) != ST_ATTR_DEDICATED_REGISTER)
02360 return;
02361 PREG_NUM p = ST_ATTR_reg_id(*st_attr);
02362 Set_Register_Never_Allocatable(p);
02363 }
02364 };
02365
02366
02367
02368
02369 static void
02370 Mark_Specified_Registers_As_Not_Allocatable (void)
02371 {
02372 OPTION_LIST *ol = Registers_Not_Allocatable;
02373 char *start;
02374 char *p;
02375 char regname[8];
02376 char regname2[8];
02377
02378
02379 if ( ST_ATTR_Table_Size (GLOBAL_SYMTAB)) {
02380 For_all (St_Attr_Table, GLOBAL_SYMTAB,
02381 Set_DREG_Not_Allocatable());
02382 }
02383
02384
02385 if ( ol == NULL ) return;
02386 for ( ; ol != NULL; ol = OLIST_next(ol) ) {
02387
02388
02389 p = OLIST_val(ol);
02390 start = p;
02391 while ( *p != ':' && *p != 0 ) {
02392 if ( *p == ',') {
02393 strncpy (regname, start, p-start+1);
02394 regname[p-start] = '\0';
02395 Set_Register_Never_Allocatable (regname);
02396 ++p;
02397 start = p;
02398 }
02399 else if (*p == '-' ) {
02400 strncpy (regname, start, p-start+1);
02401 regname[p-start] = '\0';
02402 ++p;
02403 start = p;
02404 while (*p != ',' && *p != '\0') {
02405 ++p;
02406 }
02407 strncpy (regname2, start, p-start+1);
02408 regname2[p-start] = '\0';
02409 Set_Register_Range_Not_Allocatable (regname, regname2);
02410 if (*p == 0) return;
02411 ++p;
02412 start = p;
02413 }
02414 else {
02415 ++p;
02416 }
02417 }
02418 strncpy (regname, start, p-start+1);
02419 Set_Register_Never_Allocatable (regname);
02420 }
02421 }
02422
02423 #ifdef KEY
02424 char ** be_command_line_args = NULL;
02425 INT be_command_line_argc = 0;
02426 #endif // KEY
02427
02428
02429
02430
02431
02432
02433
02434
02435
02436
02437 void
02438 CG_Process_Command_Line (INT cg_argc, char **cg_argv, INT be_argc, char **be_argv)
02439 {
02440 extern char *Whirl_Revision;
02441
02442 if (strcmp (Whirl_Revision, WHIRL_REVISION) != 0)
02443 FmtAssert (!DEBUG_Ir_Version_Check,
02444 ("WHIRL revision mismatch between be.so (%s) and cg.so (%s)",
02445 Whirl_Revision, WHIRL_REVISION));
02446
02447 #if !defined(TARG_NVISA) // also set by bedriver, so redundant?
02448 Set_Error_Descriptor (EP_BE, EDESC_BE);
02449 Set_Error_Descriptor (EP_CG, EDESC_CG);
02450 #endif
02451
02452 #ifdef KEY
02453 be_command_line_args = be_argv;
02454 be_command_line_argc = be_argc;
02455 #endif // KEY
02456
02457
02458 Build_Option_String ( be_argc, be_argv );
02459 Process_Command_Line ( cg_argc, cg_argv );
02460
02461 CG_Configure_Opt_Level(Opt_Level);
02462
02463 #ifdef TARG_IA64
02464
02465 locs_skip_bb = IPFEC_Build_Skiplist(raw_locs_skip_bb);
02466 glos_skip_bb = IPFEC_Build_Skiplist(raw_glos_skip_bb);
02467 mlbr_skip_bb = IPFEC_Build_Skiplist(raw_mlbr_skip_bb);
02468
02469 if_conv_skip_rgn = IPFEC_Build_Skiplist(raw_if_conv_skip_rgn);
02470 if_conv_skip_area = IPFEC_Build_Skiplist(raw_if_conv_skip_area);
02471
02472 glos_skip_rgn = IPFEC_Build_Skiplist(raw_glos_skip_rgn);
02473
02474 spec_skip_bb = IPFEC_Build_Skiplist(raw_spec_skip_bb);
02475 spec_skip_rgn = IPFEC_Build_Skiplist(raw_spec_skip_rgn);
02476 spec_skip_op = IPFEC_Build_Skiplist(raw_spec_skip_op);
02477 msched_skip_bb = IPFEC_Build_Skiplist(raw_msched_skip_bb);
02478 msched_skip_rgn = IPFEC_Build_Skiplist(raw_msched_skip_rgn);
02479
02480 spec_skip_PU = IPFEC_Build_Skiplist(raw_spec_skip_PU);
02481 if_conv_skip_PU = IPFEC_Build_Skiplist(raw_if_conv_skip_PU);
02482 PRDB_skip_PU = IPFEC_Build_Skiplist(raw_PRDB_skip_PU);
02483 pre_glos_skip_PU = IPFEC_Build_Skiplist(raw_pre_glos_skip_PU);
02484 post_locs_skip_PU = IPFEC_Build_Skiplist(raw_post_locs_skip_PU);
02485 glos_rename_skip_bb = IPFEC_Build_Skiplist(raw_glos_rename_skip_bb);
02486 glos_rename_skip_op = IPFEC_Build_Skiplist(raw_glos_rename_skip_op);
02487 latency2 = IPFEC_Build_Skiplist(raw_latency2);
02488 #endif
02489 Prepare_Source ();
02490 }
02491
02492
02493
02494 void
02495 CG_Init (void)
02496 {
02497 Set_Error_Phase ( "Codegen Initialization" );
02498 MEM_POOL_Initialize (&MEM_local_region_pool, "local_region_pool", TRUE );
02499 MEM_POOL_Initialize (&MEM_local_region_nz_pool, "local_region_nz_pool", FALSE );
02500
02501 REGISTER_Begin();
02502 Init_Dedicated_TNs ();
02503
02504 Mark_Specified_Registers_As_Not_Allocatable ();
02505
02506 EMT_Begin_File ( Argv0, option_string );
02507
02508
02509
02510 Configure_prefetch_ahead();
02511 #if defined(KEY) && !defined(TARG_SL) && !defined(TARG_NVISA)
02512 if (flag_test_coverage || profile_arcs)
02513 CG_Init_Gcov();
02514
02515 if (LOCS_Fwd_Scheduling_set) {
02516 fprintf(stderr, "warning: -CG:local_fwd_sched is deprecated,"
02517 " use -CG:local_sched_alg\n");
02518 if (!LOCS_Scheduling_Algorithm_set) {
02519 LOCS_Scheduling_Algorithm = LOCS_Fwd_Scheduling ? 1 : 0;
02520 LOCS_Scheduling_Algorithm_set = TRUE;
02521 } else {
02522 fprintf(stderr, "warning: -CG:local_fwd_sched ignored,"
02523 " conflicts with -CG:local_sched_alg\n");
02524 }
02525 }
02526 #endif // KEY
02527 }
02528
02529 #ifdef KEY
02530 extern void CG_End_Final();
02531 #endif
02532
02533 void
02534 CG_Fini (void)
02535 {
02536 #if defined(KEY) && !defined(TARG_NVISA)
02537 extern BOOL profile_arcs;
02538 if (profile_arcs)
02539 CG_End_Final();
02540 if (flag_test_coverage || profile_arcs)
02541 CG_End_Gcov();
02542 #endif
02543
02544 if ( List_Symbols ) {
02545 Print_global_symtab (Lst_File);
02546 }
02547
02548 Set_Error_Phase ( "Codegen Emit" );
02549
02550 EMT_End_File();
02551 MEM_POOL_Delete (&MEM_local_region_pool);
02552 MEM_POOL_Delete (&MEM_local_region_nz_pool);
02553
02554 #ifdef KEY
02555
02556
02557 if (Assembly) {
02558 int n = fprintf(Asm_File, "\n");
02559 if (n != 1) {
02560 ErrMsg(EC_Asm_Write, Asm_File_Name);
02561 Terminate(1);
02562 }
02563 }
02564 #endif
02565 }
02566
