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osprey/kg++fe/gnu/i386/insn-emit.c

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00001 /*
00002  * Copyright 2003, 2004 PathScale, Inc.  All Rights Reserved.
00003  */
00004 
00005 /* Generated automatically by the program `genemit'
00006 from the machine description file `md'.  */
00007 
00008 #include "config.h"
00009 #include "system.h"
00010 #include "rtl.h"
00011 #include "tm_p.h"
00012 #include "function.h"
00013 #include "expr.h"
00014 #include "optabs.h"
00015 #include "real.h"
00016 #include "flags.h"
00017 #include "output.h"
00018 #include "insn-config.h"
00019 #include "hard-reg-set.h"
00020 #include "recog.h"
00021 #include "resource.h"
00022 #include "reload.h"
00023 #include "toplev.h"
00024 #include "ggc.h"
00025 
00026 #define FAIL return (end_sequence (), _val)
00027 #define DONE return (_val = get_insns (), end_sequence (), _val)
00028 
00029 /* ../../gcc/gcc/config/i386/i386.md:444 */
00030 rtx
00031 gen_cmpdi_ccno_1_rex64 (operand0, operand1)
00032      rtx operand0;
00033      rtx operand1;
00034 {
00035   return gen_rtx_SET (VOIDmode,
00036   gen_rtx_REG (VOIDmode,
00037   17),
00038   gen_rtx_COMPARE (VOIDmode,
00039   operand0,
00040   operand1));
00041 }
00042 
00043 /* ../../gcc/gcc/config/i386/i386.md:473 */
00044 rtx
00045 gen_cmpdi_1_insn_rex64 (operand0, operand1)
00046      rtx operand0;
00047      rtx operand1;
00048 {
00049   return gen_rtx_SET (VOIDmode,
00050   gen_rtx_REG (VOIDmode,
00051   17),
00052   gen_rtx_COMPARE (VOIDmode,
00053   operand0,
00054   operand1));
00055 }
00056 
00057 /* ../../gcc/gcc/config/i386/i386.md:641 */
00058 rtx
00059 gen_cmpqi_ext_3_insn (operand0, operand1)
00060      rtx operand0;
00061      rtx operand1;
00062 {
00063   return gen_rtx_SET (VOIDmode,
00064   gen_rtx_REG (VOIDmode,
00065   17),
00066   gen_rtx_COMPARE (VOIDmode,
00067   gen_rtx_SUBREG (QImode,
00068   gen_rtx_ZERO_EXTRACT (SImode,
00069   operand0,
00070   GEN_INT (8LL),
00071   GEN_INT (8LL)),
00072   0),
00073   operand1));
00074 }
00075 
00076 /* ../../gcc/gcc/config/i386/i386.md:655 */
00077 rtx
00078 gen_cmpqi_ext_3_insn_rex64 (operand0, operand1)
00079      rtx operand0;
00080      rtx operand1;
00081 {
00082   return gen_rtx_SET (VOIDmode,
00083   gen_rtx_REG (VOIDmode,
00084   17),
00085   gen_rtx_COMPARE (VOIDmode,
00086   gen_rtx_SUBREG (QImode,
00087   gen_rtx_ZERO_EXTRACT (SImode,
00088   operand0,
00089   GEN_INT (8LL),
00090   GEN_INT (8LL)),
00091   0),
00092   operand1));
00093 }
00094 
00095 /* ../../gcc/gcc/config/i386/i386.md:927 */
00096 rtx
00097 gen_x86_fnstsw_1 (operand0)
00098      rtx operand0;
00099 {
00100   return gen_rtx_SET (VOIDmode,
00101   operand0,
00102   gen_rtx_UNSPEC (HImode,
00103   gen_rtvec (1,
00104     gen_rtx_REG (VOIDmode,
00105   18)),
00106   24));
00107 }
00108 
00109 /* ../../gcc/gcc/config/i386/i386.md:940 */
00110 rtx
00111 gen_x86_sahf_1 (operand0)
00112      rtx operand0;
00113 {
00114   return gen_rtx_SET (VOIDmode,
00115   gen_rtx_REG (CCmode,
00116   17),
00117   gen_rtx_UNSPEC (CCmode,
00118   gen_rtvec (1,
00119     operand0),
00120   25));
00121 }
00122 
00123 /* ../../gcc/gcc/config/i386/i386.md:1080 */
00124 rtx
00125 gen_popsi1 (operand0)
00126      rtx operand0;
00127 {
00128   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
00129     gen_rtx_SET (VOIDmode,
00130   operand0,
00131   gen_rtx_MEM (SImode,
00132   gen_rtx_REG (SImode,
00133   7))),
00134     gen_rtx_SET (VOIDmode,
00135   gen_rtx_REG (SImode,
00136   7),
00137   gen_rtx_PLUS (SImode,
00138   gen_rtx_REG (SImode,
00139   7),
00140   GEN_INT (4LL)))));
00141 }
00142 
00143 /* ../../gcc/gcc/config/i386/i386.md:1684 */
00144 rtx
00145 gen_movsi_insv_1 (operand0, operand1)
00146      rtx operand0;
00147      rtx operand1;
00148 {
00149   return gen_rtx_SET (VOIDmode,
00150   gen_rtx_ZERO_EXTRACT (SImode,
00151   operand0,
00152   GEN_INT (8LL),
00153   GEN_INT (8LL)),
00154   operand1);
00155 }
00156 
00157 /* ../../gcc/gcc/config/i386/i386.md:1728 */
00158 rtx
00159 gen_pushdi2_rex64 (operand0, operand1)
00160      rtx operand0;
00161      rtx operand1;
00162 {
00163   return gen_rtx_SET (VOIDmode,
00164   operand0,
00165   operand1);
00166 }
00167 
00168 /* ../../gcc/gcc/config/i386/i386.md:1801 */
00169 rtx
00170 gen_popdi1 (operand0)
00171      rtx operand0;
00172 {
00173   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
00174     gen_rtx_SET (VOIDmode,
00175   operand0,
00176   gen_rtx_MEM (DImode,
00177   gen_rtx_REG (DImode,
00178   7))),
00179     gen_rtx_SET (VOIDmode,
00180   gen_rtx_REG (DImode,
00181   7),
00182   gen_rtx_PLUS (DImode,
00183   gen_rtx_REG (DImode,
00184   7),
00185   GEN_INT (8LL)))));
00186 }
00187 
00188 /* ../../gcc/gcc/config/i386/i386.md:2819 */
00189 rtx
00190 gen_swapxf (operand0, operand1)
00191      rtx operand0;
00192      rtx operand1;
00193 {
00194   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
00195     gen_rtx_SET (VOIDmode,
00196   operand0,
00197   operand1),
00198     gen_rtx_SET (VOIDmode,
00199   operand1,
00200   operand0)));
00201 }
00202 
00203 /* ../../gcc/gcc/config/i386/i386.md:2834 */
00204 rtx
00205 gen_swaptf (operand0, operand1)
00206      rtx operand0;
00207      rtx operand1;
00208 {
00209   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
00210     gen_rtx_SET (VOIDmode,
00211   operand0,
00212   operand1),
00213     gen_rtx_SET (VOIDmode,
00214   operand1,
00215   operand0)));
00216 }
00217 
00218 /* ../../gcc/gcc/config/i386/i386.md:2864 */
00219 rtx
00220 gen_zero_extendhisi2_and (operand0, operand1)
00221      rtx operand0;
00222      rtx operand1;
00223 {
00224   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
00225     gen_rtx_SET (VOIDmode,
00226   operand0,
00227   gen_rtx_ZERO_EXTEND (SImode,
00228   operand1)),
00229     gen_rtx_CLOBBER (VOIDmode,
00230   gen_rtx_REG (CCmode,
00231   17))));
00232 }
00233 
00234 /* ../../gcc/gcc/config/i386/i386.md:3043 */
00235 rtx
00236 gen_zero_extendsidi2_32 (operand0, operand1)
00237      rtx operand0;
00238      rtx operand1;
00239 {
00240   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
00241     gen_rtx_SET (VOIDmode,
00242   operand0,
00243   gen_rtx_ZERO_EXTEND (DImode,
00244   operand1)),
00245     gen_rtx_CLOBBER (VOIDmode,
00246   gen_rtx_REG (CCmode,
00247   17))));
00248 }
00249 
00250 /* ../../gcc/gcc/config/i386/i386.md:3051 */
00251 rtx
00252 gen_zero_extendsidi2_rex64 (operand0, operand1)
00253      rtx operand0;
00254      rtx operand1;
00255 {
00256   return gen_rtx_SET (VOIDmode,
00257   operand0,
00258   gen_rtx_ZERO_EXTEND (DImode,
00259   operand1));
00260 }
00261 
00262 /* ../../gcc/gcc/config/i386/i386.md:3086 */
00263 rtx
00264 gen_zero_extendhidi2 (operand0, operand1)
00265      rtx operand0;
00266      rtx operand1;
00267 {
00268   return gen_rtx_SET (VOIDmode,
00269   operand0,
00270   gen_rtx_ZERO_EXTEND (DImode,
00271   operand1));
00272 }
00273 
00274 /* ../../gcc/gcc/config/i386/i386.md:3096 */
00275 rtx
00276 gen_zero_extendqidi2 (operand0, operand1)
00277      rtx operand0;
00278      rtx operand1;
00279 {
00280   return gen_rtx_SET (VOIDmode,
00281   operand0,
00282   gen_rtx_ZERO_EXTEND (DImode,
00283   operand1));
00284 }
00285 
00286 /* ../../gcc/gcc/config/i386/i386.md:3130 */
00287 rtx
00288 gen_extendsidi2_rex64 (operand0, operand1)
00289      rtx operand0;
00290      rtx operand1;
00291 {
00292   return gen_rtx_SET (VOIDmode,
00293   operand0,
00294   gen_rtx_SIGN_EXTEND (DImode,
00295   operand1));
00296 }
00297 
00298 /* ../../gcc/gcc/config/i386/i386.md:3142 */
00299 rtx
00300 gen_extendhidi2 (operand0, operand1)
00301      rtx operand0;
00302      rtx operand1;
00303 {
00304   return gen_rtx_SET (VOIDmode,
00305   operand0,
00306   gen_rtx_SIGN_EXTEND (DImode,
00307   operand1));
00308 }
00309 
00310 /* ../../gcc/gcc/config/i386/i386.md:3150 */
00311 rtx
00312 gen_extendqidi2 (operand0, operand1)
00313      rtx operand0;
00314      rtx operand1;
00315 {
00316   return gen_rtx_SET (VOIDmode,
00317   operand0,
00318   gen_rtx_SIGN_EXTEND (DImode,
00319   operand1));
00320 }
00321 
00322 /* ../../gcc/gcc/config/i386/i386.md:3232 */
00323 rtx
00324 gen_extendhisi2 (operand0, operand1)
00325      rtx operand0;
00326      rtx operand1;
00327 {
00328   return gen_rtx_SET (VOIDmode,
00329   operand0,
00330   gen_rtx_SIGN_EXTEND (SImode,
00331   operand1));
00332 }
00333 
00334 /* ../../gcc/gcc/config/i386/i386.md:3285 */
00335 rtx
00336 gen_extendqihi2 (operand0, operand1)
00337      rtx operand0;
00338      rtx operand1;
00339 {
00340   return gen_rtx_SET (VOIDmode,
00341   operand0,
00342   gen_rtx_SIGN_EXTEND (HImode,
00343   operand1));
00344 }
00345 
00346 /* ../../gcc/gcc/config/i386/i386.md:3311 */
00347 rtx
00348 gen_extendqisi2 (operand0, operand1)
00349      rtx operand0;
00350      rtx operand1;
00351 {
00352   return gen_rtx_SET (VOIDmode,
00353   operand0,
00354   gen_rtx_SIGN_EXTEND (SImode,
00355   operand1));
00356 }
00357 
00358 /* ../../gcc/gcc/config/i386/i386.md:3744 */
00359 rtx
00360 gen_truncdfsf2_3 (operand0, operand1)
00361      rtx operand0;
00362      rtx operand1;
00363 {
00364   return gen_rtx_SET (VOIDmode,
00365   operand0,
00366   gen_rtx_FLOAT_TRUNCATE (SFmode,
00367   operand1));
00368 }
00369 
00370 /* ../../gcc/gcc/config/i386/i386.md:3758 */
00371 rtx
00372 gen_truncdfsf2_sse_only (operand0, operand1)
00373      rtx operand0;
00374      rtx operand1;
00375 {
00376   return gen_rtx_SET (VOIDmode,
00377   operand0,
00378   gen_rtx_FLOAT_TRUNCATE (SFmode,
00379   operand1));
00380 }
00381 
00382 /* ../../gcc/gcc/config/i386/i386.md:4122 */
00383 rtx
00384 gen_fix_truncdi_nomemory (operand0, operand1, operand2, operand3, operand4)
00385      rtx operand0;
00386      rtx operand1;
00387      rtx operand2;
00388      rtx operand3;
00389      rtx operand4;
00390 {
00391   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (5,
00392     gen_rtx_SET (VOIDmode,
00393   operand0,
00394   gen_rtx_FIX (DImode,
00395   operand1)),
00396     gen_rtx_USE (VOIDmode,
00397   operand2),
00398     gen_rtx_USE (VOIDmode,
00399   operand3),
00400     gen_rtx_CLOBBER (VOIDmode,
00401   operand4),
00402     gen_rtx_CLOBBER (VOIDmode,
00403   gen_rtx_SCRATCH (DFmode))));
00404 }
00405 
00406 /* ../../gcc/gcc/config/i386/i386.md:4134 */
00407 rtx
00408 gen_fix_truncdi_memory (operand0, operand1, operand2, operand3)
00409      rtx operand0;
00410      rtx operand1;
00411      rtx operand2;
00412      rtx operand3;
00413 {
00414   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (4,
00415     gen_rtx_SET (VOIDmode,
00416   operand0,
00417   gen_rtx_FIX (DImode,
00418   operand1)),
00419     gen_rtx_USE (VOIDmode,
00420   operand2),
00421     gen_rtx_USE (VOIDmode,
00422   operand3),
00423     gen_rtx_CLOBBER (VOIDmode,
00424   gen_rtx_SCRATCH (DFmode))));
00425 }
00426 
00427 /* ../../gcc/gcc/config/i386/i386.md:4175 */
00428 rtx
00429 gen_fix_truncsfdi_sse (operand0, operand1)
00430      rtx operand0;
00431      rtx operand1;
00432 {
00433   return gen_rtx_SET (VOIDmode,
00434   operand0,
00435   gen_rtx_FIX (DImode,
00436   operand1));
00437 }
00438 
00439 /* ../../gcc/gcc/config/i386/i386.md:4182 */
00440 rtx
00441 gen_fix_truncdfdi_sse (operand0, operand1)
00442      rtx operand0;
00443      rtx operand1;
00444 {
00445   return gen_rtx_SET (VOIDmode,
00446   operand0,
00447   gen_rtx_FIX (DImode,
00448   operand1));
00449 }
00450 
00451 /* ../../gcc/gcc/config/i386/i386.md:4261 */
00452 rtx
00453 gen_fix_truncsi_nomemory (operand0, operand1, operand2, operand3, operand4)
00454      rtx operand0;
00455      rtx operand1;
00456      rtx operand2;
00457      rtx operand3;
00458      rtx operand4;
00459 {
00460   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (4,
00461     gen_rtx_SET (VOIDmode,
00462   operand0,
00463   gen_rtx_FIX (SImode,
00464   operand1)),
00465     gen_rtx_USE (VOIDmode,
00466   operand2),
00467     gen_rtx_USE (VOIDmode,
00468   operand3),
00469     gen_rtx_CLOBBER (VOIDmode,
00470   operand4)));
00471 }
00472 
00473 /* ../../gcc/gcc/config/i386/i386.md:4272 */
00474 rtx
00475 gen_fix_truncsi_memory (operand0, operand1, operand2, operand3)
00476      rtx operand0;
00477      rtx operand1;
00478      rtx operand2;
00479      rtx operand3;
00480 {
00481   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
00482     gen_rtx_SET (VOIDmode,
00483   operand0,
00484   gen_rtx_FIX (SImode,
00485   operand1)),
00486     gen_rtx_USE (VOIDmode,
00487   operand2),
00488     gen_rtx_USE (VOIDmode,
00489   operand3)));
00490 }
00491 
00492 /* ../../gcc/gcc/config/i386/i386.md:4283 */
00493 rtx
00494 gen_fix_truncsfsi_sse (operand0, operand1)
00495      rtx operand0;
00496      rtx operand1;
00497 {
00498   return gen_rtx_SET (VOIDmode,
00499   operand0,
00500   gen_rtx_FIX (SImode,
00501   operand1));
00502 }
00503 
00504 /* ../../gcc/gcc/config/i386/i386.md:4290 */
00505 rtx
00506 gen_fix_truncdfsi_sse (operand0, operand1)
00507      rtx operand0;
00508      rtx operand1;
00509 {
00510   return gen_rtx_SET (VOIDmode,
00511   operand0,
00512   gen_rtx_FIX (SImode,
00513   operand1));
00514 }
00515 
00516 /* ../../gcc/gcc/config/i386/i386.md:4376 */
00517 rtx
00518 gen_fix_trunchi_nomemory (operand0, operand1, operand2, operand3, operand4)
00519      rtx operand0;
00520      rtx operand1;
00521      rtx operand2;
00522      rtx operand3;
00523      rtx operand4;
00524 {
00525   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (4,
00526     gen_rtx_SET (VOIDmode,
00527   operand0,
00528   gen_rtx_FIX (HImode,
00529   operand1)),
00530     gen_rtx_USE (VOIDmode,
00531   operand2),
00532     gen_rtx_USE (VOIDmode,
00533   operand3),
00534     gen_rtx_CLOBBER (VOIDmode,
00535   operand4)));
00536 }
00537 
00538 /* ../../gcc/gcc/config/i386/i386.md:4387 */
00539 rtx
00540 gen_fix_trunchi_memory (operand0, operand1, operand2, operand3)
00541      rtx operand0;
00542      rtx operand1;
00543      rtx operand2;
00544      rtx operand3;
00545 {
00546   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
00547     gen_rtx_SET (VOIDmode,
00548   operand0,
00549   gen_rtx_FIX (HImode,
00550   operand1)),
00551     gen_rtx_USE (VOIDmode,
00552   operand2),
00553     gen_rtx_USE (VOIDmode,
00554   operand3)));
00555 }
00556 
00557 /* ../../gcc/gcc/config/i386/i386.md:4424 */
00558 rtx
00559 gen_x86_fnstcw_1 (operand0)
00560      rtx operand0;
00561 {
00562   return gen_rtx_SET (VOIDmode,
00563   operand0,
00564   gen_rtx_UNSPEC (HImode,
00565   gen_rtvec (1,
00566     gen_rtx_REG (HImode,
00567   18)),
00568   26));
00569 }
00570 
00571 /* ../../gcc/gcc/config/i386/i386.md:4434 */
00572 rtx
00573 gen_x86_fldcw_1 (operand0)
00574      rtx operand0;
00575 {
00576   return gen_rtx_SET (VOIDmode,
00577   gen_rtx_REG (HImode,
00578   18),
00579   gen_rtx_UNSPEC (HImode,
00580   gen_rtvec (1,
00581     operand0),
00582   28));
00583 }
00584 
00585 /* ../../gcc/gcc/config/i386/i386.md:4450 */
00586 rtx
00587 gen_floathisf2 (operand0, operand1)
00588      rtx operand0;
00589      rtx operand1;
00590 {
00591   return gen_rtx_SET (VOIDmode,
00592   operand0,
00593   gen_rtx_FLOAT (SFmode,
00594   operand1));
00595 }
00596 
00597 /* ../../gcc/gcc/config/i386/i386.md:4526 */
00598 rtx
00599 gen_floathidf2 (operand0, operand1)
00600      rtx operand0;
00601      rtx operand1;
00602 {
00603   return gen_rtx_SET (VOIDmode,
00604   operand0,
00605   gen_rtx_FLOAT (DFmode,
00606   operand1));
00607 }
00608 
00609 /* ../../gcc/gcc/config/i386/i386.md:4602 */
00610 rtx
00611 gen_floathixf2 (operand0, operand1)
00612      rtx operand0;
00613      rtx operand1;
00614 {
00615   return gen_rtx_SET (VOIDmode,
00616   operand0,
00617   gen_rtx_FLOAT (XFmode,
00618   operand1));
00619 }
00620 
00621 /* ../../gcc/gcc/config/i386/i386.md:4613 */
00622 rtx
00623 gen_floathitf2 (operand0, operand1)
00624      rtx operand0;
00625      rtx operand1;
00626 {
00627   return gen_rtx_SET (VOIDmode,
00628   operand0,
00629   gen_rtx_FLOAT (TFmode,
00630   operand1));
00631 }
00632 
00633 /* ../../gcc/gcc/config/i386/i386.md:4624 */
00634 rtx
00635 gen_floatsixf2 (operand0, operand1)
00636      rtx operand0;
00637      rtx operand1;
00638 {
00639   return gen_rtx_SET (VOIDmode,
00640   operand0,
00641   gen_rtx_FLOAT (XFmode,
00642   operand1));
00643 }
00644 
00645 /* ../../gcc/gcc/config/i386/i386.md:4635 */
00646 rtx
00647 gen_floatsitf2 (operand0, operand1)
00648      rtx operand0;
00649      rtx operand1;
00650 {
00651   return gen_rtx_SET (VOIDmode,
00652   operand0,
00653   gen_rtx_FLOAT (TFmode,
00654   operand1));
00655 }
00656 
00657 /* ../../gcc/gcc/config/i386/i386.md:4646 */
00658 rtx
00659 gen_floatdixf2 (operand0, operand1)
00660      rtx operand0;
00661      rtx operand1;
00662 {
00663   return gen_rtx_SET (VOIDmode,
00664   operand0,
00665   gen_rtx_FLOAT (XFmode,
00666   operand1));
00667 }
00668 
00669 /* ../../gcc/gcc/config/i386/i386.md:4657 */
00670 rtx
00671 gen_floatditf2 (operand0, operand1)
00672      rtx operand0;
00673      rtx operand1;
00674 {
00675   return gen_rtx_SET (VOIDmode,
00676   operand0,
00677   gen_rtx_FLOAT (TFmode,
00678   operand1));
00679 }
00680 
00681 /* ../../gcc/gcc/config/i386/i386.md:4787 */
00682 rtx
00683 gen_addqi3_cc (operand0, operand1, operand2)
00684      rtx operand0;
00685      rtx operand1;
00686      rtx operand2;
00687 {
00688   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
00689     gen_rtx_SET (VOIDmode,
00690   gen_rtx_REG (CCmode,
00691   17),
00692   gen_rtx_UNSPEC (CCmode,
00693   gen_rtvec (2,
00694     operand1,
00695     operand2),
00696   27)),
00697     gen_rtx_SET (VOIDmode,
00698   operand0,
00699   gen_rtx_PLUS (QImode,
00700   operand1,
00701   operand2))));
00702 }
00703 
00704 /* ../../gcc/gcc/config/i386/i386.md:5352 */
00705 rtx
00706 gen_addsi_1_zext (operand0, operand1, operand2)
00707      rtx operand0;
00708      rtx operand1;
00709      rtx operand2;
00710 {
00711   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
00712     gen_rtx_SET (VOIDmode,
00713   operand0,
00714   gen_rtx_ZERO_EXTEND (DImode,
00715   gen_rtx_PLUS (SImode,
00716   operand1,
00717   operand2))),
00718     gen_rtx_CLOBBER (VOIDmode,
00719   gen_rtx_REG (CCmode,
00720   17))));
00721 }
00722 
00723 /* ../../gcc/gcc/config/i386/i386.md:6223 */
00724 rtx
00725 gen_addqi_ext_1 (operand0, operand1, operand2)
00726      rtx operand0;
00727      rtx operand1;
00728      rtx operand2;
00729 {
00730   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
00731     gen_rtx_SET (VOIDmode,
00732   gen_rtx_ZERO_EXTRACT (SImode,
00733   operand0,
00734   GEN_INT (8LL),
00735   GEN_INT (8LL)),
00736   gen_rtx_PLUS (SImode,
00737   gen_rtx_ZERO_EXTRACT (SImode,
00738   operand1,
00739   GEN_INT (8LL),
00740   GEN_INT (8LL)),
00741   operand2)),
00742     gen_rtx_CLOBBER (VOIDmode,
00743   gen_rtx_REG (CCmode,
00744   17))));
00745 }
00746 
00747 /* ../../gcc/gcc/config/i386/i386.md:6377 */
00748 rtx
00749 gen_subdi3_carry_rex64 (operand0, operand1, operand2)
00750      rtx operand0;
00751      rtx operand1;
00752      rtx operand2;
00753 {
00754   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
00755     gen_rtx_SET (VOIDmode,
00756   operand0,
00757   gen_rtx_MINUS (DImode,
00758   operand1,
00759   gen_rtx_PLUS (DImode,
00760   gen_rtx_LTU (DImode,
00761   gen_rtx_REG (CCmode,
00762   17),
00763   const0_rtx),
00764   operand2))),
00765     gen_rtx_CLOBBER (VOIDmode,
00766   gen_rtx_REG (CCmode,
00767   17))));
00768 }
00769 
00770 /* ../../gcc/gcc/config/i386/i386.md:6427 */
00771 rtx
00772 gen_subsi3_carry (operand0, operand1, operand2)
00773      rtx operand0;
00774      rtx operand1;
00775      rtx operand2;
00776 {
00777   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
00778     gen_rtx_SET (VOIDmode,
00779   operand0,
00780   gen_rtx_MINUS (SImode,
00781   operand1,
00782   gen_rtx_PLUS (SImode,
00783   gen_rtx_LTU (SImode,
00784   gen_rtx_REG (CCmode,
00785   17),
00786   const0_rtx),
00787   operand2))),
00788     gen_rtx_CLOBBER (VOIDmode,
00789   gen_rtx_REG (CCmode,
00790   17))));
00791 }
00792 
00793 /* ../../gcc/gcc/config/i386/i386.md:6440 */
00794 rtx
00795 gen_subsi3_carry_zext (operand0, operand1, operand2)
00796      rtx operand0;
00797      rtx operand1;
00798      rtx operand2;
00799 {
00800   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
00801     gen_rtx_SET (VOIDmode,
00802   operand0,
00803   gen_rtx_ZERO_EXTEND (DImode,
00804   gen_rtx_MINUS (SImode,
00805   operand1,
00806   gen_rtx_PLUS (SImode,
00807   gen_rtx_LTU (SImode,
00808   gen_rtx_REG (CCmode,
00809   17),
00810   const0_rtx),
00811   operand2)))),
00812     gen_rtx_CLOBBER (VOIDmode,
00813   gen_rtx_REG (CCmode,
00814   17))));
00815 }
00816 
00817 /* ../../gcc/gcc/config/i386/i386.md:7129 */
00818 rtx
00819 gen_divqi3 (operand0, operand1, operand2)
00820      rtx operand0;
00821      rtx operand1;
00822      rtx operand2;
00823 {
00824   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
00825     gen_rtx_SET (VOIDmode,
00826   operand0,
00827   gen_rtx_DIV (QImode,
00828   operand1,
00829   operand2)),
00830     gen_rtx_CLOBBER (VOIDmode,
00831   gen_rtx_REG (CCmode,
00832   17))));
00833 }
00834 
00835 /* ../../gcc/gcc/config/i386/i386.md:7140 */
00836 rtx
00837 gen_udivqi3 (operand0, operand1, operand2)
00838      rtx operand0;
00839      rtx operand1;
00840      rtx operand2;
00841 {
00842   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
00843     gen_rtx_SET (VOIDmode,
00844   operand0,
00845   gen_rtx_UDIV (QImode,
00846   operand1,
00847   operand2)),
00848     gen_rtx_CLOBBER (VOIDmode,
00849   gen_rtx_REG (CCmode,
00850   17))));
00851 }
00852 
00853 /* ../../gcc/gcc/config/i386/i386.md:7352 */
00854 rtx
00855 gen_divmodhi4 (operand0, operand1, operand2, operand3)
00856      rtx operand0;
00857      rtx operand1;
00858      rtx operand2;
00859      rtx operand3;
00860 {
00861   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
00862     gen_rtx_SET (VOIDmode,
00863   operand0,
00864   gen_rtx_DIV (HImode,
00865   operand1,
00866   operand2)),
00867     gen_rtx_SET (VOIDmode,
00868   operand3,
00869   gen_rtx_MOD (HImode,
00870   operand1,
00871   operand2)),
00872     gen_rtx_CLOBBER (VOIDmode,
00873   gen_rtx_REG (CCmode,
00874   17))));
00875 }
00876 
00877 /* ../../gcc/gcc/config/i386/i386.md:7365 */
00878 rtx
00879 gen_udivmoddi4 (operand0, operand1, operand2, operand3)
00880      rtx operand0;
00881      rtx operand1;
00882      rtx operand2;
00883      rtx operand3;
00884 {
00885   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
00886     gen_rtx_SET (VOIDmode,
00887   operand0,
00888   gen_rtx_UDIV (DImode,
00889   operand1,
00890   operand2)),
00891     gen_rtx_SET (VOIDmode,
00892   operand3,
00893   gen_rtx_UMOD (DImode,
00894   operand1,
00895   operand2)),
00896     gen_rtx_CLOBBER (VOIDmode,
00897   gen_rtx_REG (CCmode,
00898   17))));
00899 }
00900 
00901 /* ../../gcc/gcc/config/i386/i386.md:7409 */
00902 rtx
00903 gen_udivmodsi4 (operand0, operand1, operand2, operand3)
00904      rtx operand0;
00905      rtx operand1;
00906      rtx operand2;
00907      rtx operand3;
00908 {
00909   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
00910     gen_rtx_SET (VOIDmode,
00911   operand0,
00912   gen_rtx_UDIV (SImode,
00913   operand1,
00914   operand2)),
00915     gen_rtx_SET (VOIDmode,
00916   operand3,
00917   gen_rtx_UMOD (SImode,
00918   operand1,
00919   operand2)),
00920     gen_rtx_CLOBBER (VOIDmode,
00921   gen_rtx_REG (CCmode,
00922   17))));
00923 }
00924 
00925 /* ../../gcc/gcc/config/i386/i386.md:7522 */
00926 rtx
00927 gen_testsi_1 (operand0, operand1)
00928      rtx operand0;
00929      rtx operand1;
00930 {
00931   return gen_rtx_SET (VOIDmode,
00932   gen_rtx_REG (VOIDmode,
00933   17),
00934   gen_rtx_COMPARE (VOIDmode,
00935   gen_rtx_AND (SImode,
00936   operand0,
00937   operand1),
00938   const0_rtx));
00939 }
00940 
00941 /* ../../gcc/gcc/config/i386/i386.md:8113 */
00942 rtx
00943 gen_andqi_ext_0 (operand0, operand1, operand2)
00944      rtx operand0;
00945      rtx operand1;
00946      rtx operand2;
00947 {
00948   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
00949     gen_rtx_SET (VOIDmode,
00950   gen_rtx_ZERO_EXTRACT (SImode,
00951   operand0,
00952   GEN_INT (8LL),
00953   GEN_INT (8LL)),
00954   gen_rtx_AND (SImode,
00955   gen_rtx_ZERO_EXTRACT (SImode,
00956   operand1,
00957   GEN_INT (8LL),
00958   GEN_INT (8LL)),
00959   operand2)),
00960     gen_rtx_CLOBBER (VOIDmode,
00961   gen_rtx_REG (CCmode,
00962   17))));
00963 }
00964 
00965 /* ../../gcc/gcc/config/i386/i386.md:8519 */
00966 rtx
00967 gen_iorqi_ext_0 (operand0, operand1, operand2)
00968      rtx operand0;
00969      rtx operand1;
00970      rtx operand2;
00971 {
00972   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
00973     gen_rtx_SET (VOIDmode,
00974   gen_rtx_ZERO_EXTRACT (SImode,
00975   operand0,
00976   GEN_INT (8LL),
00977   GEN_INT (8LL)),
00978   gen_rtx_IOR (SImode,
00979   gen_rtx_ZERO_EXTRACT (SImode,
00980   operand1,
00981   GEN_INT (8LL),
00982   GEN_INT (8LL)),
00983   operand2)),
00984     gen_rtx_CLOBBER (VOIDmode,
00985   gen_rtx_REG (CCmode,
00986   17))));
00987 }
00988 
00989 /* ../../gcc/gcc/config/i386/i386.md:8857 */
00990 rtx
00991 gen_xorqi_ext_0 (operand0, operand1, operand2)
00992      rtx operand0;
00993      rtx operand1;
00994      rtx operand2;
00995 {
00996   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
00997     gen_rtx_SET (VOIDmode,
00998   gen_rtx_ZERO_EXTRACT (SImode,
00999   operand0,
01000   GEN_INT (8LL),
01001   GEN_INT (8LL)),
01002   gen_rtx_XOR (SImode,
01003   gen_rtx_ZERO_EXTRACT (SImode,
01004   operand1,
01005   GEN_INT (8LL),
01006   GEN_INT (8LL)),
01007   operand2)),
01008     gen_rtx_CLOBBER (VOIDmode,
01009   gen_rtx_REG (CCmode,
01010   17))));
01011 }
01012 
01013 /* ../../gcc/gcc/config/i386/i386.md:9284 */
01014 rtx
01015 gen_negsf2_memory (operand0, operand1)
01016      rtx operand0;
01017      rtx operand1;
01018 {
01019   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
01020     gen_rtx_SET (VOIDmode,
01021   operand0,
01022   gen_rtx_NEG (SFmode,
01023   operand1)),
01024     gen_rtx_CLOBBER (VOIDmode,
01025   gen_rtx_REG (CCmode,
01026   17))));
01027 }
01028 
01029 /* ../../gcc/gcc/config/i386/i386.md:9291 */
01030 rtx
01031 gen_negsf2_ifs (operand0, operand1, operand2)
01032      rtx operand0;
01033      rtx operand1;
01034      rtx operand2;
01035 {
01036   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
01037     gen_rtx_SET (VOIDmode,
01038   operand0,
01039   gen_rtx_NEG (SFmode,
01040   operand1)),
01041     gen_rtx_USE (VOIDmode,
01042   operand2),
01043     gen_rtx_CLOBBER (VOIDmode,
01044   gen_rtx_REG (CCmode,
01045   17))));
01046 }
01047 
01048 /* ../../gcc/gcc/config/i386/i386.md:9423 */
01049 rtx
01050 gen_negdf2_memory (operand0, operand1)
01051      rtx operand0;
01052      rtx operand1;
01053 {
01054   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
01055     gen_rtx_SET (VOIDmode,
01056   operand0,
01057   gen_rtx_NEG (DFmode,
01058   operand1)),
01059     gen_rtx_CLOBBER (VOIDmode,
01060   gen_rtx_REG (CCmode,
01061   17))));
01062 }
01063 
01064 /* ../../gcc/gcc/config/i386/i386.md:9430 */
01065 rtx
01066 gen_negdf2_ifs (operand0, operand1, operand2)
01067      rtx operand0;
01068      rtx operand1;
01069      rtx operand2;
01070 {
01071   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
01072     gen_rtx_SET (VOIDmode,
01073   operand0,
01074   gen_rtx_NEG (DFmode,
01075   operand1)),
01076     gen_rtx_USE (VOIDmode,
01077   operand2),
01078     gen_rtx_CLOBBER (VOIDmode,
01079   gen_rtx_REG (CCmode,
01080   17))));
01081 }
01082 
01083 /* ../../gcc/gcc/config/i386/i386.md:9744 */
01084 rtx
01085 gen_abssf2_memory (operand0, operand1)
01086      rtx operand0;
01087      rtx operand1;
01088 {
01089   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
01090     gen_rtx_SET (VOIDmode,
01091   operand0,
01092   gen_rtx_ABS (SFmode,
01093   operand1)),
01094     gen_rtx_CLOBBER (VOIDmode,
01095   gen_rtx_REG (CCmode,
01096   17))));
01097 }
01098 
01099 /* ../../gcc/gcc/config/i386/i386.md:9751 */
01100 rtx
01101 gen_abssf2_ifs (operand0, operand1, operand2)
01102      rtx operand0;
01103      rtx operand1;
01104      rtx operand2;
01105 {
01106   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
01107     gen_rtx_SET (VOIDmode,
01108   operand0,
01109   gen_rtx_ABS (SFmode,
01110   operand1)),
01111     gen_rtx_USE (VOIDmode,
01112   operand2),
01113     gen_rtx_CLOBBER (VOIDmode,
01114   gen_rtx_REG (CCmode,
01115   17))));
01116 }
01117 
01118 /* ../../gcc/gcc/config/i386/i386.md:9872 */
01119 rtx
01120 gen_absdf2_memory (operand0, operand1)
01121      rtx operand0;
01122      rtx operand1;
01123 {
01124   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
01125     gen_rtx_SET (VOIDmode,
01126   operand0,
01127   gen_rtx_ABS (DFmode,
01128   operand1)),
01129     gen_rtx_CLOBBER (VOIDmode,
01130   gen_rtx_REG (CCmode,
01131   17))));
01132 }
01133 
01134 /* ../../gcc/gcc/config/i386/i386.md:9879 */
01135 rtx
01136 gen_absdf2_ifs (operand0, operand1, operand2)
01137      rtx operand0;
01138      rtx operand1;
01139      rtx operand2;
01140 {
01141   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
01142     gen_rtx_SET (VOIDmode,
01143   operand0,
01144   gen_rtx_ABS (DFmode,
01145   operand1)),
01146     gen_rtx_USE (VOIDmode,
01147   operand2),
01148     gen_rtx_CLOBBER (VOIDmode,
01149   gen_rtx_REG (CCmode,
01150   17))));
01151 }
01152 
01153 /* ../../gcc/gcc/config/i386/i386.md:10466 */
01154 rtx
01155 gen_ashldi3_1 (operand0, operand1, operand2)
01156      rtx operand0;
01157      rtx operand1;
01158      rtx operand2;
01159 {
01160   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
01161     gen_rtx_SET (VOIDmode,
01162   operand0,
01163   gen_rtx_ASHIFT (DImode,
01164   operand1,
01165   operand2)),
01166     gen_rtx_CLOBBER (VOIDmode,
01167   gen_rtx_SCRATCH (SImode)),
01168     gen_rtx_CLOBBER (VOIDmode,
01169   gen_rtx_REG (CCmode,
01170   17))));
01171 }
01172 
01173 /* ../../gcc/gcc/config/i386/i386.md:10504 */
01174 rtx
01175 gen_x86_shld_1 (operand0, operand1, operand2)
01176      rtx operand0;
01177      rtx operand1;
01178      rtx operand2;
01179 {
01180   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
01181     gen_rtx_SET (VOIDmode,
01182   operand0,
01183   gen_rtx_IOR (SImode,
01184   gen_rtx_ASHIFT (SImode,
01185   operand0,
01186   operand2),
01187   gen_rtx_LSHIFTRT (SImode,
01188   operand1,
01189   gen_rtx_MINUS (QImode,
01190   GEN_INT (32LL),
01191   operand2)))),
01192     gen_rtx_CLOBBER (VOIDmode,
01193   gen_rtx_REG (CCmode,
01194   17))));
01195 }
01196 
01197 /* ../../gcc/gcc/config/i386/i386.md:11098 */
01198 rtx
01199 gen_ashrdi3_63_rex64 (operand0, operand1, operand2)
01200      rtx operand0;
01201      rtx operand1;
01202      rtx operand2;
01203 {
01204   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
01205     gen_rtx_SET (VOIDmode,
01206   operand0,
01207   gen_rtx_ASHIFTRT (DImode,
01208   operand1,
01209   operand2)),
01210     gen_rtx_CLOBBER (VOIDmode,
01211   gen_rtx_REG (CCmode,
01212   17))));
01213 }
01214 
01215 /* ../../gcc/gcc/config/i386/i386.md:11179 */
01216 rtx
01217 gen_ashrdi3_1 (operand0, operand1, operand2)
01218      rtx operand0;
01219      rtx operand1;
01220      rtx operand2;
01221 {
01222   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
01223     gen_rtx_SET (VOIDmode,
01224   operand0,
01225   gen_rtx_ASHIFTRT (DImode,
01226   operand1,
01227   operand2)),
01228     gen_rtx_CLOBBER (VOIDmode,
01229   gen_rtx_SCRATCH (SImode)),
01230     gen_rtx_CLOBBER (VOIDmode,
01231   gen_rtx_REG (CCmode,
01232   17))));
01233 }
01234 
01235 /* ../../gcc/gcc/config/i386/i386.md:11217 */
01236 rtx
01237 gen_x86_shrd_1 (operand0, operand1, operand2)
01238      rtx operand0;
01239      rtx operand1;
01240      rtx operand2;
01241 {
01242   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
01243     gen_rtx_SET (VOIDmode,
01244   operand0,
01245   gen_rtx_IOR (SImode,
01246   gen_rtx_ASHIFTRT (SImode,
01247   operand0,
01248   operand2),
01249   gen_rtx_ASHIFT (SImode,
01250   operand1,
01251   gen_rtx_MINUS (QImode,
01252   GEN_INT (32LL),
01253   operand2)))),
01254     gen_rtx_CLOBBER (VOIDmode,
01255   gen_rtx_REG (CCmode,
01256   17))));
01257 }
01258 
01259 /* ../../gcc/gcc/config/i386/i386.md:11262 */
01260 rtx
01261 gen_ashrsi3_31 (operand0, operand1, operand2)
01262      rtx operand0;
01263      rtx operand1;
01264      rtx operand2;
01265 {
01266   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
01267     gen_rtx_SET (VOIDmode,
01268   operand0,
01269   gen_rtx_ASHIFTRT (SImode,
01270   operand1,
01271   operand2)),
01272     gen_rtx_CLOBBER (VOIDmode,
01273   gen_rtx_REG (CCmode,
01274   17))));
01275 }
01276 
01277 /* ../../gcc/gcc/config/i386/i386.md:11675 */
01278 rtx
01279 gen_lshrdi3_1 (operand0, operand1, operand2)
01280      rtx operand0;
01281      rtx operand1;
01282      rtx operand2;
01283 {
01284   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
01285     gen_rtx_SET (VOIDmode,
01286   operand0,
01287   gen_rtx_LSHIFTRT (DImode,
01288   operand1,
01289   operand2)),
01290     gen_rtx_CLOBBER (VOIDmode,
01291   gen_rtx_SCRATCH (SImode)),
01292     gen_rtx_CLOBBER (VOIDmode,
01293   gen_rtx_REG (CCmode,
01294   17))));
01295 }
01296 
01297 /* ../../gcc/gcc/config/i386/i386.md:12571 */
01298 rtx
01299 gen_setcc_2 (operand0, operand1)
01300      rtx operand0;
01301      rtx operand1;
01302 {
01303   return gen_rtx_SET (VOIDmode,
01304   gen_rtx_STRICT_LOW_PART (VOIDmode,
01305   operand0),
01306   gen_rtx (GET_CODE (operand1), QImode,
01307     gen_rtx_REG (VOIDmode,
01308   17),
01309     const0_rtx));
01310 }
01311 
01312 /* ../../gcc/gcc/config/i386/i386.md:13117 */
01313 rtx
01314 gen_jump (operand0)
01315      rtx operand0;
01316 {
01317   return gen_rtx_SET (VOIDmode,
01318   pc_rtx,
01319   gen_rtx_LABEL_REF (VOIDmode,
01320   operand0));
01321 }
01322 
01323 /* ../../gcc/gcc/config/i386/i386.md:13227 */
01324 rtx
01325 gen_doloop_end_internal (operand0, operand1, operand2)
01326      rtx operand0;
01327      rtx operand1;
01328      rtx operand2;
01329 {
01330   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (4,
01331     gen_rtx_SET (VOIDmode,
01332   pc_rtx,
01333   gen_rtx_IF_THEN_ELSE (VOIDmode,
01334   gen_rtx_NE (VOIDmode,
01335   operand1,
01336   const1_rtx),
01337   gen_rtx_LABEL_REF (VOIDmode,
01338   operand0),
01339   pc_rtx)),
01340     gen_rtx_SET (VOIDmode,
01341   operand2,
01342   gen_rtx_PLUS (SImode,
01343   operand1,
01344   constm1_rtx)),
01345     gen_rtx_CLOBBER (VOIDmode,
01346   gen_rtx_SCRATCH (SImode)),
01347     gen_rtx_CLOBBER (VOIDmode,
01348   gen_rtx_REG (CCmode,
01349   17))));
01350 }
01351 
01352 /* ../../gcc/gcc/config/i386/i386.md:13536 */
01353 rtx
01354 gen_blockage (operand0)
01355      rtx operand0;
01356 {
01357   return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
01358   gen_rtvec (1,
01359     operand0),
01360   0);
01361 }
01362 
01363 /* ../../gcc/gcc/config/i386/i386.md:13558 */
01364 rtx
01365 gen_return_internal ()
01366 {
01367   return gen_rtx_RETURN (VOIDmode);
01368 }
01369 
01370 /* ../../gcc/gcc/config/i386/i386.md:13566 */
01371 rtx
01372 gen_return_pop_internal (operand0)
01373      rtx operand0;
01374 {
01375   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
01376     gen_rtx_RETURN (VOIDmode),
01377     gen_rtx_USE (VOIDmode,
01378   operand0)));
01379 }
01380 
01381 /* ../../gcc/gcc/config/i386/i386.md:13575 */
01382 rtx
01383 gen_return_indirect_internal (operand0)
01384      rtx operand0;
01385 {
01386   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
01387     gen_rtx_RETURN (VOIDmode),
01388     gen_rtx_USE (VOIDmode,
01389   operand0)));
01390 }
01391 
01392 /* ../../gcc/gcc/config/i386/i386.md:13583 */
01393 rtx
01394 gen_nop ()
01395 {
01396   return const0_rtx;
01397 }
01398 
01399 /* ../../gcc/gcc/config/i386/i386.md:13597 */
01400 rtx
01401 gen_set_got (operand0)
01402      rtx operand0;
01403 {
01404   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
01405     gen_rtx_SET (VOIDmode,
01406   operand0,
01407   gen_rtx_UNSPEC (SImode,
01408   gen_rtvec (1,
01409     const0_rtx),
01410   12)),
01411     gen_rtx_CLOBBER (VOIDmode,
01412   gen_rtx_REG (CCmode,
01413   17))));
01414 }
01415 
01416 /* ../../gcc/gcc/config/i386/i386.md:13638 */
01417 rtx
01418 gen_eh_return_si (operand0)
01419      rtx operand0;
01420 {
01421   return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
01422   gen_rtvec (1,
01423     operand0),
01424   13);
01425 }
01426 
01427 /* ../../gcc/gcc/config/i386/i386.md:13647 */
01428 rtx
01429 gen_eh_return_di (operand0)
01430      rtx operand0;
01431 {
01432   return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
01433   gen_rtvec (1,
01434     operand0),
01435   13);
01436 }
01437 
01438 /* ../../gcc/gcc/config/i386/i386.md:13656 */
01439 rtx
01440 gen_leave ()
01441 {
01442   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
01443     gen_rtx_SET (VOIDmode,
01444   gen_rtx_REG (SImode,
01445   7),
01446   gen_rtx_PLUS (SImode,
01447   gen_rtx_REG (SImode,
01448   6),
01449   GEN_INT (4LL))),
01450     gen_rtx_SET (VOIDmode,
01451   gen_rtx_REG (SImode,
01452   6),
01453   gen_rtx_MEM (SImode,
01454   gen_rtx_REG (SImode,
01455   6))),
01456     gen_rtx_CLOBBER (VOIDmode,
01457   gen_rtx_MEM (BLKmode,
01458   gen_rtx_SCRATCH (VOIDmode)))));
01459 }
01460 
01461 /* ../../gcc/gcc/config/i386/i386.md:13668 */
01462 rtx
01463 gen_leave_rex64 ()
01464 {
01465   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
01466     gen_rtx_SET (VOIDmode,
01467   gen_rtx_REG (DImode,
01468   7),
01469   gen_rtx_PLUS (DImode,
01470   gen_rtx_REG (DImode,
01471   6),
01472   GEN_INT (8LL))),
01473     gen_rtx_SET (VOIDmode,
01474   gen_rtx_REG (DImode,
01475   6),
01476   gen_rtx_MEM (DImode,
01477   gen_rtx_REG (DImode,
01478   6))),
01479     gen_rtx_CLOBBER (VOIDmode,
01480   gen_rtx_MEM (BLKmode,
01481   gen_rtx_SCRATCH (VOIDmode)))));
01482 }
01483 
01484 /* ../../gcc/gcc/config/i386/i386.md:13766 */
01485 rtx
01486 gen_ffssi_1 (operand0, operand1)
01487      rtx operand0;
01488      rtx operand1;
01489 {
01490   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
01491     gen_rtx_SET (VOIDmode,
01492   gen_rtx_REG (CCZmode,
01493   17),
01494   gen_rtx_COMPARE (CCZmode,
01495   operand1,
01496   const0_rtx)),
01497     gen_rtx_SET (VOIDmode,
01498   operand0,
01499   gen_rtx_UNSPEC (SImode,
01500   gen_rtvec (1,
01501     operand1),
01502   23))));
01503 }
01504 
01505 /* ../../gcc/gcc/config/i386/i386.md:14678 */
01506 rtx
01507 gen_sqrtsf2_1 (operand0, operand1)
01508      rtx operand0;
01509      rtx operand1;
01510 {
01511   return gen_rtx_SET (VOIDmode,
01512   operand0,
01513   gen_rtx_SQRT (SFmode,
01514   operand1));
01515 }
01516 
01517 /* ../../gcc/gcc/config/i386/i386.md:14690 */
01518 rtx
01519 gen_sqrtsf2_1_sse_only (operand0, operand1)
01520      rtx operand0;
01521      rtx operand1;
01522 {
01523   return gen_rtx_SET (VOIDmode,
01524   operand0,
01525   gen_rtx_SQRT (SFmode,
01526   operand1));
01527 }
01528 
01529 /* ../../gcc/gcc/config/i386/i386.md:14699 */
01530 rtx
01531 gen_sqrtsf2_i387 (operand0, operand1)
01532      rtx operand0;
01533      rtx operand1;
01534 {
01535   return gen_rtx_SET (VOIDmode,
01536   operand0,
01537   gen_rtx_SQRT (SFmode,
01538   operand1));
01539 }
01540 
01541 /* ../../gcc/gcc/config/i386/i386.md:14719 */
01542 rtx
01543 gen_sqrtdf2_1 (operand0, operand1)
01544      rtx operand0;
01545      rtx operand1;
01546 {
01547   return gen_rtx_SET (VOIDmode,
01548   operand0,
01549   gen_rtx_SQRT (DFmode,
01550   operand1));
01551 }
01552 
01553 /* ../../gcc/gcc/config/i386/i386.md:14731 */
01554 rtx
01555 gen_sqrtdf2_1_sse_only (operand0, operand1)
01556      rtx operand0;
01557      rtx operand1;
01558 {
01559   return gen_rtx_SET (VOIDmode,
01560   operand0,
01561   gen_rtx_SQRT (DFmode,
01562   operand1));
01563 }
01564 
01565 /* ../../gcc/gcc/config/i386/i386.md:14740 */
01566 rtx
01567 gen_sqrtdf2_i387 (operand0, operand1)
01568      rtx operand0;
01569      rtx operand1;
01570 {
01571   return gen_rtx_SET (VOIDmode,
01572   operand0,
01573   gen_rtx_SQRT (DFmode,
01574   operand1));
01575 }
01576 
01577 /* ../../gcc/gcc/config/i386/i386.md:14761 */
01578 rtx
01579 gen_sqrtxf2 (operand0, operand1)
01580      rtx operand0;
01581      rtx operand1;
01582 {
01583   return gen_rtx_SET (VOIDmode,
01584   operand0,
01585   gen_rtx_SQRT (XFmode,
01586   operand1));
01587 }
01588 
01589 /* ../../gcc/gcc/config/i386/i386.md:14771 */
01590 rtx
01591 gen_sqrttf2 (operand0, operand1)
01592      rtx operand0;
01593      rtx operand1;
01594 {
01595   return gen_rtx_SET (VOIDmode,
01596   operand0,
01597   gen_rtx_SQRT (TFmode,
01598   operand1));
01599 }
01600 
01601 /* ../../gcc/gcc/config/i386/i386.md:14821 */
01602 rtx
01603 gen_sindf2 (operand0, operand1)
01604      rtx operand0;
01605      rtx operand1;
01606 {
01607   return gen_rtx_SET (VOIDmode,
01608   operand0,
01609   gen_rtx_UNSPEC (DFmode,
01610   gen_rtvec (1,
01611     operand1),
01612   21));
01613 }
01614 
01615 /* ../../gcc/gcc/config/i386/i386.md:14830 */
01616 rtx
01617 gen_sinsf2 (operand0, operand1)
01618      rtx operand0;
01619      rtx operand1;
01620 {
01621   return gen_rtx_SET (VOIDmode,
01622   operand0,
01623   gen_rtx_UNSPEC (SFmode,
01624   gen_rtvec (1,
01625     operand1),
01626   21));
01627 }
01628 
01629 /* ../../gcc/gcc/config/i386/i386.md:14850 */
01630 rtx
01631 gen_sinxf2 (operand0, operand1)
01632      rtx operand0;
01633      rtx operand1;
01634 {
01635   return gen_rtx_SET (VOIDmode,
01636   operand0,
01637   gen_rtx_UNSPEC (XFmode,
01638   gen_rtvec (1,
01639     operand1),
01640   21));
01641 }
01642 
01643 /* ../../gcc/gcc/config/i386/i386.md:14859 */
01644 rtx
01645 gen_sintf2 (operand0, operand1)
01646      rtx operand0;
01647      rtx operand1;
01648 {
01649   return gen_rtx_SET (VOIDmode,
01650   operand0,
01651   gen_rtx_UNSPEC (TFmode,
01652   gen_rtvec (1,
01653     operand1),
01654   21));
01655 }
01656 
01657 /* ../../gcc/gcc/config/i386/i386.md:14868 */
01658 rtx
01659 gen_cosdf2 (operand0, operand1)
01660      rtx operand0;
01661      rtx operand1;
01662 {
01663   return gen_rtx_SET (VOIDmode,
01664   operand0,
01665   gen_rtx_UNSPEC (DFmode,
01666   gen_rtvec (1,
01667     operand1),
01668   22));
01669 }
01670 
01671 /* ../../gcc/gcc/config/i386/i386.md:14877 */
01672 rtx
01673 gen_cossf2 (operand0, operand1)
01674      rtx operand0;
01675      rtx operand1;
01676 {
01677   return gen_rtx_SET (VOIDmode,
01678   operand0,
01679   gen_rtx_UNSPEC (SFmode,
01680   gen_rtvec (1,
01681     operand1),
01682   22));
01683 }
01684 
01685 /* ../../gcc/gcc/config/i386/i386.md:14897 */
01686 rtx
01687 gen_cosxf2 (operand0, operand1)
01688      rtx operand0;
01689      rtx operand1;
01690 {
01691   return gen_rtx_SET (VOIDmode,
01692   operand0,
01693   gen_rtx_UNSPEC (XFmode,
01694   gen_rtvec (1,
01695     operand1),
01696   22));
01697 }
01698 
01699 /* ../../gcc/gcc/config/i386/i386.md:14906 */
01700 rtx
01701 gen_costf2 (operand0, operand1)
01702      rtx operand0;
01703      rtx operand1;
01704 {
01705   return gen_rtx_SET (VOIDmode,
01706   operand0,
01707   gen_rtx_UNSPEC (TFmode,
01708   gen_rtvec (1,
01709     operand1),
01710   22));
01711 }
01712 
01713 /* ../../gcc/gcc/config/i386/i386.md:14917 */
01714 rtx
01715 gen_cld ()
01716 {
01717   return gen_rtx_SET (VOIDmode,
01718   gen_rtx_REG (SImode,
01719   19),
01720   const0_rtx);
01721 }
01722 
01723 /* ../../gcc/gcc/config/i386/i386.md:15115 */
01724 rtx
01725 gen_strmovdi_rex_1 (operand0, operand1, operand2, operand3)
01726      rtx operand0;
01727      rtx operand1;
01728      rtx operand2;
01729      rtx operand3;
01730 {
01731   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (4,
01732     gen_rtx_SET (VOIDmode,
01733   gen_rtx_MEM (DImode,
01734   operand2),
01735   gen_rtx_MEM (DImode,
01736   operand3)),
01737     gen_rtx_SET (VOIDmode,
01738   operand0,
01739   gen_rtx_PLUS (DImode,
01740   operand2,
01741   GEN_INT (8LL))),
01742     gen_rtx_SET (VOIDmode,
01743   operand1,
01744   gen_rtx_PLUS (DImode,
01745   operand3,
01746   GEN_INT (8LL))),
01747     gen_rtx_USE (VOIDmode,
01748   gen_rtx_REG (SImode,
01749   19))));
01750 }
01751 
01752 /* ../../gcc/gcc/config/i386/i386.md:15131 */
01753 rtx
01754 gen_strmovsi_1 (operand0, operand1, operand2, operand3)
01755      rtx operand0;
01756      rtx operand1;
01757      rtx operand2;
01758      rtx operand3;
01759 {
01760   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (4,
01761     gen_rtx_SET (VOIDmode,
01762   gen_rtx_MEM (SImode,
01763   operand2),
01764   gen_rtx_MEM (SImode,
01765   operand3)),
01766     gen_rtx_SET (VOIDmode,
01767   operand0,
01768   gen_rtx_PLUS (SImode,
01769   operand2,
01770   GEN_INT (4LL))),
01771     gen_rtx_SET (VOIDmode,
01772   operand1,
01773   gen_rtx_PLUS (SImode,
01774   operand3,
01775   GEN_INT (4LL))),
01776     gen_rtx_USE (VOIDmode,
01777   gen_rtx_REG (SImode,
01778   19))));
01779 }
01780 
01781 /* ../../gcc/gcc/config/i386/i386.md:15147 */
01782 rtx
01783 gen_strmovsi_rex_1 (operand0, operand1, operand2, operand3)
01784      rtx operand0;
01785      rtx operand1;
01786      rtx operand2;
01787      rtx operand3;
01788 {
01789   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (4,
01790     gen_rtx_SET (VOIDmode,
01791   gen_rtx_MEM (SImode,
01792   operand2),
01793   gen_rtx_MEM (SImode,
01794   operand3)),
01795     gen_rtx_SET (VOIDmode,
01796   operand0,
01797   gen_rtx_PLUS (DImode,
01798   operand2,
01799   GEN_INT (4LL))),
01800     gen_rtx_SET (VOIDmode,
01801   operand1,
01802   gen_rtx_PLUS (DImode,
01803   operand3,
01804   GEN_INT (4LL))),
01805     gen_rtx_USE (VOIDmode,
01806   gen_rtx_REG (SImode,
01807   19))));
01808 }
01809 
01810 /* ../../gcc/gcc/config/i386/i386.md:15163 */
01811 rtx
01812 gen_strmovhi_1 (operand0, operand1, operand2, operand3)
01813      rtx operand0;
01814      rtx operand1;
01815      rtx operand2;
01816      rtx operand3;
01817 {
01818   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (4,
01819     gen_rtx_SET (VOIDmode,
01820   gen_rtx_MEM (HImode,
01821   operand2),
01822   gen_rtx_MEM (HImode,
01823   operand3)),
01824     gen_rtx_SET (VOIDmode,
01825   operand0,
01826   gen_rtx_PLUS (SImode,
01827   operand2,
01828   GEN_INT (2LL))),
01829     gen_rtx_SET (VOIDmode,
01830   operand1,
01831   gen_rtx_PLUS (SImode,
01832   operand3,
01833   GEN_INT (2LL))),
01834     gen_rtx_USE (VOIDmode,
01835   gen_rtx_REG (SImode,
01836   19))));
01837 }
01838 
01839 /* ../../gcc/gcc/config/i386/i386.md:15179 */
01840 rtx
01841 gen_strmovhi_rex_1 (operand0, operand1, operand2, operand3)
01842      rtx operand0;
01843      rtx operand1;
01844      rtx operand2;
01845      rtx operand3;
01846 {
01847   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (4,
01848     gen_rtx_SET (VOIDmode,
01849   gen_rtx_MEM (HImode,
01850   operand2),
01851   gen_rtx_MEM (HImode,
01852   operand3)),
01853     gen_rtx_SET (VOIDmode,
01854   operand0,
01855   gen_rtx_PLUS (DImode,
01856   operand2,
01857   GEN_INT (2LL))),
01858     gen_rtx_SET (VOIDmode,
01859   operand1,
01860   gen_rtx_PLUS (DImode,
01861   operand3,
01862   GEN_INT (2LL))),
01863     gen_rtx_USE (VOIDmode,
01864   gen_rtx_REG (SImode,
01865   19))));
01866 }
01867 
01868 /* ../../gcc/gcc/config/i386/i386.md:15195 */
01869 rtx
01870 gen_strmovqi_1 (operand0, operand1, operand2, operand3)
01871      rtx operand0;
01872      rtx operand1;
01873      rtx operand2;
01874      rtx operand3;
01875 {
01876   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (4,
01877     gen_rtx_SET (VOIDmode,
01878   gen_rtx_MEM (QImode,
01879   operand2),
01880   gen_rtx_MEM (QImode,
01881   operand3)),
01882     gen_rtx_SET (VOIDmode,
01883   operand0,
01884   gen_rtx_PLUS (SImode,
01885   operand2,
01886   const1_rtx)),
01887     gen_rtx_SET (VOIDmode,
01888   operand1,
01889   gen_rtx_PLUS (SImode,
01890   operand3,
01891   const1_rtx)),
01892     gen_rtx_USE (VOIDmode,
01893   gen_rtx_REG (SImode,
01894   19))));
01895 }
01896 
01897 /* ../../gcc/gcc/config/i386/i386.md:15211 */
01898 rtx
01899 gen_strmovqi_rex_1 (operand0, operand1, operand2, operand3)
01900      rtx operand0;
01901      rtx operand1;
01902      rtx operand2;
01903      rtx operand3;
01904 {
01905   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (4,
01906     gen_rtx_SET (VOIDmode,
01907   gen_rtx_MEM (QImode,
01908   operand2),
01909   gen_rtx_MEM (QImode,
01910   operand3)),
01911     gen_rtx_SET (VOIDmode,
01912   operand0,
01913   gen_rtx_PLUS (DImode,
01914   operand2,
01915   const1_rtx)),
01916     gen_rtx_SET (VOIDmode,
01917   operand1,
01918   gen_rtx_PLUS (DImode,
01919   operand3,
01920   const1_rtx)),
01921     gen_rtx_USE (VOIDmode,
01922   gen_rtx_REG (SImode,
01923   19))));
01924 }
01925 
01926 /* ../../gcc/gcc/config/i386/i386.md:15227 */
01927 rtx
01928 gen_rep_movdi_rex64 (operand0, operand1, operand2, operand3, operand4, operand5)
01929      rtx operand0;
01930      rtx operand1;
01931      rtx operand2;
01932      rtx operand3;
01933      rtx operand4;
01934      rtx operand5;
01935 {
01936   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (6,
01937     gen_rtx_SET (VOIDmode,
01938   operand2,
01939   const0_rtx),
01940     gen_rtx_SET (VOIDmode,
01941   operand0,
01942   gen_rtx_PLUS (DImode,
01943   gen_rtx_ASHIFT (DImode,
01944   operand5,
01945   GEN_INT (3LL)),
01946   operand3)),
01947     gen_rtx_SET (VOIDmode,
01948   operand1,
01949   gen_rtx_PLUS (DImode,
01950   gen_rtx_ASHIFT (DImode,
01951   operand5,
01952   GEN_INT (3LL)),
01953   operand4)),
01954     gen_rtx_SET (VOIDmode,
01955   gen_rtx_MEM (BLKmode,
01956   operand3),
01957   gen_rtx_MEM (BLKmode,
01958   operand4)),
01959     gen_rtx_USE (VOIDmode,
01960   operand5),
01961     gen_rtx_USE (VOIDmode,
01962   gen_rtx_REG (SImode,
01963   19))));
01964 }
01965 
01966 /* ../../gcc/gcc/config/i386/i386.md:15247 */
01967 rtx
01968 gen_rep_movsi (operand0, operand1, operand2, operand3, operand4, operand5)
01969      rtx operand0;
01970      rtx operand1;
01971      rtx operand2;
01972      rtx operand3;
01973      rtx operand4;
01974      rtx operand5;
01975 {
01976   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (6,
01977     gen_rtx_SET (VOIDmode,
01978   operand2,
01979   const0_rtx),
01980     gen_rtx_SET (VOIDmode,
01981   operand0,
01982   gen_rtx_PLUS (SImode,
01983   gen_rtx_ASHIFT (SImode,
01984   operand5,
01985   GEN_INT (2LL)),
01986   operand3)),
01987     gen_rtx_SET (VOIDmode,
01988   operand1,
01989   gen_rtx_PLUS (SImode,
01990   gen_rtx_ASHIFT (SImode,
01991   operand5,
01992   GEN_INT (2LL)),
01993   operand4)),
01994     gen_rtx_SET (VOIDmode,
01995   gen_rtx_MEM (BLKmode,
01996   operand3),
01997   gen_rtx_MEM (BLKmode,
01998   operand4)),
01999     gen_rtx_USE (VOIDmode,
02000   operand5),
02001     gen_rtx_USE (VOIDmode,
02002   gen_rtx_REG (SImode,
02003   19))));
02004 }
02005 
02006 /* ../../gcc/gcc/config/i386/i386.md:15267 */
02007 rtx
02008 gen_rep_movsi_rex64 (operand0, operand1, operand2, operand3, operand4, operand5)
02009      rtx operand0;
02010      rtx operand1;
02011      rtx operand2;
02012      rtx operand3;
02013      rtx operand4;
02014      rtx operand5;
02015 {
02016   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (6,
02017     gen_rtx_SET (VOIDmode,
02018   operand2,
02019   const0_rtx),
02020     gen_rtx_SET (VOIDmode,
02021   operand0,
02022   gen_rtx_PLUS (DImode,
02023   gen_rtx_ASHIFT (DImode,
02024   operand5,
02025   GEN_INT (2LL)),
02026   operand3)),
02027     gen_rtx_SET (VOIDmode,
02028   operand1,
02029   gen_rtx_PLUS (DImode,
02030   gen_rtx_ASHIFT (DImode,
02031   operand5,
02032   GEN_INT (2LL)),
02033   operand4)),
02034     gen_rtx_SET (VOIDmode,
02035   gen_rtx_MEM (BLKmode,
02036   operand3),
02037   gen_rtx_MEM (BLKmode,
02038   operand4)),
02039     gen_rtx_USE (VOIDmode,
02040   operand5),
02041     gen_rtx_USE (VOIDmode,
02042   gen_rtx_REG (SImode,
02043   19))));
02044 }
02045 
02046 /* ../../gcc/gcc/config/i386/i386.md:15287 */
02047 rtx
02048 gen_rep_movqi (operand0, operand1, operand2, operand3, operand4, operand5)
02049      rtx operand0;
02050      rtx operand1;
02051      rtx operand2;
02052      rtx operand3;
02053      rtx operand4;
02054      rtx operand5;
02055 {
02056   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (6,
02057     gen_rtx_SET (VOIDmode,
02058   operand2,
02059   const0_rtx),
02060     gen_rtx_SET (VOIDmode,
02061   operand0,
02062   gen_rtx_PLUS (SImode,
02063   operand3,
02064   operand5)),
02065     gen_rtx_SET (VOIDmode,
02066   operand1,
02067   gen_rtx_PLUS (SImode,
02068   operand4,
02069   operand5)),
02070     gen_rtx_SET (VOIDmode,
02071   gen_rtx_MEM (BLKmode,
02072   operand3),
02073   gen_rtx_MEM (BLKmode,
02074   operand4)),
02075     gen_rtx_USE (VOIDmode,
02076   operand5),
02077     gen_rtx_USE (VOIDmode,
02078   gen_rtx_REG (SImode,
02079   19))));
02080 }
02081 
02082 /* ../../gcc/gcc/config/i386/i386.md:15305 */
02083 rtx
02084 gen_rep_movqi_rex64 (operand0, operand1, operand2, operand3, operand4, operand5)
02085      rtx operand0;
02086      rtx operand1;
02087      rtx operand2;
02088      rtx operand3;
02089      rtx operand4;
02090      rtx operand5;
02091 {
02092   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (6,
02093     gen_rtx_SET (VOIDmode,
02094   operand2,
02095   const0_rtx),
02096     gen_rtx_SET (VOIDmode,
02097   operand0,
02098   gen_rtx_PLUS (DImode,
02099   operand3,
02100   operand5)),
02101     gen_rtx_SET (VOIDmode,
02102   operand1,
02103   gen_rtx_PLUS (DImode,
02104   operand4,
02105   operand5)),
02106     gen_rtx_SET (VOIDmode,
02107   gen_rtx_MEM (BLKmode,
02108   operand3),
02109   gen_rtx_MEM (BLKmode,
02110   operand4)),
02111     gen_rtx_USE (VOIDmode,
02112   operand5),
02113     gen_rtx_USE (VOIDmode,
02114   gen_rtx_REG (SImode,
02115   19))));
02116 }
02117 
02118 /* ../../gcc/gcc/config/i386/i386.md:15463 */
02119 rtx
02120 gen_strsetdi_rex_1 (operand0, operand1, operand2)
02121      rtx operand0;
02122      rtx operand1;
02123      rtx operand2;
02124 {
02125   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
02126     gen_rtx_SET (VOIDmode,
02127   gen_rtx_MEM (SImode,
02128   operand1),
02129   operand2),
02130     gen_rtx_SET (VOIDmode,
02131   operand0,
02132   gen_rtx_PLUS (DImode,
02133   operand1,
02134   GEN_INT (8LL))),
02135     gen_rtx_USE (VOIDmode,
02136   gen_rtx_REG (SImode,
02137   19))));
02138 }
02139 
02140 /* ../../gcc/gcc/config/i386/i386.md:15476 */
02141 rtx
02142 gen_strsetsi_1 (operand0, operand1, operand2)
02143      rtx operand0;
02144      rtx operand1;
02145      rtx operand2;
02146 {
02147   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
02148     gen_rtx_SET (VOIDmode,
02149   gen_rtx_MEM (SImode,
02150   operand1),
02151   operand2),
02152     gen_rtx_SET (VOIDmode,
02153   operand0,
02154   gen_rtx_PLUS (SImode,
02155   operand1,
02156   GEN_INT (4LL))),
02157     gen_rtx_USE (VOIDmode,
02158   gen_rtx_REG (SImode,
02159   19))));
02160 }
02161 
02162 /* ../../gcc/gcc/config/i386/i386.md:15489 */
02163 rtx
02164 gen_strsetsi_rex_1 (operand0, operand1, operand2)
02165      rtx operand0;
02166      rtx operand1;
02167      rtx operand2;
02168 {
02169   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
02170     gen_rtx_SET (VOIDmode,
02171   gen_rtx_MEM (SImode,
02172   operand1),
02173   operand2),
02174     gen_rtx_SET (VOIDmode,
02175   operand0,
02176   gen_rtx_PLUS (DImode,
02177   operand1,
02178   GEN_INT (4LL))),
02179     gen_rtx_USE (VOIDmode,
02180   gen_rtx_REG (SImode,
02181   19))));
02182 }
02183 
02184 /* ../../gcc/gcc/config/i386/i386.md:15502 */
02185 rtx
02186 gen_strsethi_1 (operand0, operand1, operand2)
02187      rtx operand0;
02188      rtx operand1;
02189      rtx operand2;
02190 {
02191   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
02192     gen_rtx_SET (VOIDmode,
02193   gen_rtx_MEM (HImode,
02194   operand1),
02195   operand2),
02196     gen_rtx_SET (VOIDmode,
02197   operand0,
02198   gen_rtx_PLUS (SImode,
02199   operand1,
02200   GEN_INT (2LL))),
02201     gen_rtx_USE (VOIDmode,
02202   gen_rtx_REG (SImode,
02203   19))));
02204 }
02205 
02206 /* ../../gcc/gcc/config/i386/i386.md:15515 */
02207 rtx
02208 gen_strsethi_rex_1 (operand0, operand1, operand2)
02209      rtx operand0;
02210      rtx operand1;
02211      rtx operand2;
02212 {
02213   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
02214     gen_rtx_SET (VOIDmode,
02215   gen_rtx_MEM (HImode,
02216   operand1),
02217   operand2),
02218     gen_rtx_SET (VOIDmode,
02219   operand0,
02220   gen_rtx_PLUS (DImode,
02221   operand1,
02222   GEN_INT (2LL))),
02223     gen_rtx_USE (VOIDmode,
02224   gen_rtx_REG (SImode,
02225   19))));
02226 }
02227 
02228 /* ../../gcc/gcc/config/i386/i386.md:15528 */
02229 rtx
02230 gen_strsetqi_1 (operand0, operand1, operand2)
02231      rtx operand0;
02232      rtx operand1;
02233      rtx operand2;
02234 {
02235   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
02236     gen_rtx_SET (VOIDmode,
02237   gen_rtx_MEM (QImode,
02238   operand1),
02239   operand2),
02240     gen_rtx_SET (VOIDmode,
02241   operand0,
02242   gen_rtx_PLUS (SImode,
02243   operand1,
02244   const1_rtx)),
02245     gen_rtx_USE (VOIDmode,
02246   gen_rtx_REG (SImode,
02247   19))));
02248 }
02249 
02250 /* ../../gcc/gcc/config/i386/i386.md:15541 */
02251 rtx
02252 gen_strsetqi_rex_1 (operand0, operand1, operand2)
02253      rtx operand0;
02254      rtx operand1;
02255      rtx operand2;
02256 {
02257   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
02258     gen_rtx_SET (VOIDmode,
02259   gen_rtx_MEM (QImode,
02260   operand1),
02261   operand2),
02262     gen_rtx_SET (VOIDmode,
02263   operand0,
02264   gen_rtx_PLUS (DImode,
02265   operand1,
02266   const1_rtx)),
02267     gen_rtx_USE (VOIDmode,
02268   gen_rtx_REG (SImode,
02269   19))));
02270 }
02271 
02272 /* ../../gcc/gcc/config/i386/i386.md:15554 */
02273 rtx
02274 gen_rep_stosdi_rex64 (operand0, operand1, operand2, operand3, operand4)
02275      rtx operand0;
02276      rtx operand1;
02277      rtx operand2;
02278      rtx operand3;
02279      rtx operand4;
02280 {
02281   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (6,
02282     gen_rtx_SET (VOIDmode,
02283   operand1,
02284   const0_rtx),
02285     gen_rtx_SET (VOIDmode,
02286   operand0,
02287   gen_rtx_PLUS (DImode,
02288   gen_rtx_ASHIFT (DImode,
02289   operand4,
02290   GEN_INT (3LL)),
02291   operand3)),
02292     gen_rtx_SET (VOIDmode,
02293   gen_rtx_MEM (BLKmode,
02294   operand3),
02295   const0_rtx),
02296     gen_rtx_USE (VOIDmode,
02297   operand2),
02298     gen_rtx_USE (VOIDmode,
02299   operand4),
02300     gen_rtx_USE (VOIDmode,
02301   gen_rtx_REG (SImode,
02302   19))));
02303 }
02304 
02305 /* ../../gcc/gcc/config/i386/i386.md:15572 */
02306 rtx
02307 gen_rep_stossi (operand0, operand1, operand2, operand3, operand4)
02308      rtx operand0;
02309      rtx operand1;
02310      rtx operand2;
02311      rtx operand3;
02312      rtx operand4;
02313 {
02314   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (6,
02315     gen_rtx_SET (VOIDmode,
02316   operand1,
02317   const0_rtx),
02318     gen_rtx_SET (VOIDmode,
02319   operand0,
02320   gen_rtx_PLUS (SImode,
02321   gen_rtx_ASHIFT (SImode,
02322   operand4,
02323   GEN_INT (2LL)),
02324   operand3)),
02325     gen_rtx_SET (VOIDmode,
02326   gen_rtx_MEM (BLKmode,
02327   operand3),
02328   const0_rtx),
02329     gen_rtx_USE (VOIDmode,
02330   operand2),
02331     gen_rtx_USE (VOIDmode,
02332   operand4),
02333     gen_rtx_USE (VOIDmode,
02334   gen_rtx_REG (SImode,
02335   19))));
02336 }
02337 
02338 /* ../../gcc/gcc/config/i386/i386.md:15590 */
02339 rtx
02340 gen_rep_stossi_rex64 (operand0, operand1, operand2, operand3, operand4)
02341      rtx operand0;
02342      rtx operand1;
02343      rtx operand2;
02344      rtx operand3;
02345      rtx operand4;
02346 {
02347   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (6,
02348     gen_rtx_SET (VOIDmode,
02349   operand1,
02350   const0_rtx),
02351     gen_rtx_SET (VOIDmode,
02352   operand0,
02353   gen_rtx_PLUS (DImode,
02354   gen_rtx_ASHIFT (DImode,
02355   operand4,
02356   GEN_INT (2LL)),
02357   operand3)),
02358     gen_rtx_SET (VOIDmode,
02359   gen_rtx_MEM (BLKmode,
02360   operand3),
02361   const0_rtx),
02362     gen_rtx_USE (VOIDmode,
02363   operand2),
02364     gen_rtx_USE (VOIDmode,
02365   operand4),
02366     gen_rtx_USE (VOIDmode,
02367   gen_rtx_REG (SImode,
02368   19))));
02369 }
02370 
02371 /* ../../gcc/gcc/config/i386/i386.md:15608 */
02372 rtx
02373 gen_rep_stosqi (operand0, operand1, operand2, operand3, operand4)
02374      rtx operand0;
02375      rtx operand1;
02376      rtx operand2;
02377      rtx operand3;
02378      rtx operand4;
02379 {
02380   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (6,
02381     gen_rtx_SET (VOIDmode,
02382   operand1,
02383   const0_rtx),
02384     gen_rtx_SET (VOIDmode,
02385   operand0,
02386   gen_rtx_PLUS (SImode,
02387   operand3,
02388   operand4)),
02389     gen_rtx_SET (VOIDmode,
02390   gen_rtx_MEM (BLKmode,
02391   operand3),
02392   const0_rtx),
02393     gen_rtx_USE (VOIDmode,
02394   operand2),
02395     gen_rtx_USE (VOIDmode,
02396   operand4),
02397     gen_rtx_USE (VOIDmode,
02398   gen_rtx_REG (SImode,
02399   19))));
02400 }
02401 
02402 /* ../../gcc/gcc/config/i386/i386.md:15625 */
02403 rtx
02404 gen_rep_stosqi_rex64 (operand0, operand1, operand2, operand3, operand4)
02405      rtx operand0;
02406      rtx operand1;
02407      rtx operand2;
02408      rtx operand3;
02409      rtx operand4;
02410 {
02411   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (6,
02412     gen_rtx_SET (VOIDmode,
02413   operand1,
02414   const0_rtx),
02415     gen_rtx_SET (VOIDmode,
02416   operand0,
02417   gen_rtx_PLUS (DImode,
02418   operand3,
02419   operand4)),
02420     gen_rtx_SET (VOIDmode,
02421   gen_rtx_MEM (BLKmode,
02422   operand3),
02423   const0_rtx),
02424     gen_rtx_USE (VOIDmode,
02425   operand2),
02426     gen_rtx_USE (VOIDmode,
02427   operand4),
02428     gen_rtx_USE (VOIDmode,
02429   gen_rtx_REG (DImode,
02430   19))));
02431 }
02432 
02433 /* ../../gcc/gcc/config/i386/i386.md:15726 */
02434 rtx
02435 gen_cmpstrqi_nz_1 (operand0, operand1, operand2, operand3, operand4, operand5, operand6)
02436      rtx operand0;
02437      rtx operand1;
02438      rtx operand2;
02439      rtx operand3;
02440      rtx operand4;
02441      rtx operand5;
02442      rtx operand6;
02443 {
02444   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (7,
02445     gen_rtx_SET (VOIDmode,
02446   gen_rtx_REG (CCmode,
02447   17),
02448   gen_rtx_COMPARE (CCmode,
02449   gen_rtx_MEM (BLKmode,
02450   operand4),
02451   gen_rtx_MEM (BLKmode,
02452   operand5))),
02453     gen_rtx_USE (VOIDmode,
02454   operand6),
02455     gen_rtx_USE (VOIDmode,
02456   operand3),
02457     gen_rtx_USE (VOIDmode,
02458   gen_rtx_REG (SImode,
02459   19)),
02460     gen_rtx_CLOBBER (VOIDmode,
02461   operand0),
02462     gen_rtx_CLOBBER (VOIDmode,
02463   operand1),
02464     gen_rtx_CLOBBER (VOIDmode,
02465   operand2)));
02466 }
02467 
02468 /* ../../gcc/gcc/config/i386/i386.md:15742 */
02469 rtx
02470 gen_cmpstrqi_nz_rex_1 (operand0, operand1, operand2, operand3, operand4, operand5, operand6)
02471      rtx operand0;
02472      rtx operand1;
02473      rtx operand2;
02474      rtx operand3;
02475      rtx operand4;
02476      rtx operand5;
02477      rtx operand6;
02478 {
02479   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (7,
02480     gen_rtx_SET (VOIDmode,
02481   gen_rtx_REG (CCmode,
02482   17),
02483   gen_rtx_COMPARE (CCmode,
02484   gen_rtx_MEM (BLKmode,
02485   operand4),
02486   gen_rtx_MEM (BLKmode,
02487   operand5))),
02488     gen_rtx_USE (VOIDmode,
02489   operand6),
02490     gen_rtx_USE (VOIDmode,
02491   operand3),
02492     gen_rtx_USE (VOIDmode,
02493   gen_rtx_REG (SImode,
02494   19)),
02495     gen_rtx_CLOBBER (VOIDmode,
02496   operand0),
02497     gen_rtx_CLOBBER (VOIDmode,
02498   operand1),
02499     gen_rtx_CLOBBER (VOIDmode,
02500   operand2)));
02501 }
02502 
02503 /* ../../gcc/gcc/config/i386/i386.md:15760 */
02504 rtx
02505 gen_cmpstrqi_1 (operand0, operand1, operand2, operand3, operand4, operand5, operand6)
02506      rtx operand0;
02507      rtx operand1;
02508      rtx operand2;
02509      rtx operand3;
02510      rtx operand4;
02511      rtx operand5;
02512      rtx operand6;
02513 {
02514   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (7,
02515     gen_rtx_SET (VOIDmode,
02516   gen_rtx_REG (CCmode,
02517   17),
02518   gen_rtx_IF_THEN_ELSE (CCmode,
02519   gen_rtx_NE (VOIDmode,
02520   operand6,
02521   const0_rtx),
02522   gen_rtx_COMPARE (CCmode,
02523   gen_rtx_MEM (BLKmode,
02524   operand4),
02525   gen_rtx_MEM (BLKmode,
02526   operand5)),
02527   const0_rtx)),
02528     gen_rtx_USE (VOIDmode,
02529   operand3),
02530     gen_rtx_USE (VOIDmode,
02531   gen_rtx_REG (CCmode,
02532   17)),
02533     gen_rtx_USE (VOIDmode,
02534   gen_rtx_REG (SImode,
02535   19)),
02536     gen_rtx_CLOBBER (VOIDmode,
02537   operand0),
02538     gen_rtx_CLOBBER (VOIDmode,
02539   operand1),
02540     gen_rtx_CLOBBER (VOIDmode,
02541   operand2)));
02542 }
02543 
02544 /* ../../gcc/gcc/config/i386/i386.md:15779 */
02545 rtx
02546 gen_cmpstrqi_rex_1 (operand0, operand1, operand2, operand3, operand4, operand5, operand6)
02547      rtx operand0;
02548      rtx operand1;
02549      rtx operand2;
02550      rtx operand3;
02551      rtx operand4;
02552      rtx operand5;
02553      rtx operand6;
02554 {
02555   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (7,
02556     gen_rtx_SET (VOIDmode,
02557   gen_rtx_REG (CCmode,
02558   17),
02559   gen_rtx_IF_THEN_ELSE (CCmode,
02560   gen_rtx_NE (VOIDmode,
02561   operand6,
02562   const0_rtx),
02563   gen_rtx_COMPARE (CCmode,
02564   gen_rtx_MEM (BLKmode,
02565   operand4),
02566   gen_rtx_MEM (BLKmode,
02567   operand5)),
02568   const0_rtx)),
02569     gen_rtx_USE (VOIDmode,
02570   operand3),
02571     gen_rtx_USE (VOIDmode,
02572   gen_rtx_REG (CCmode,
02573   17)),
02574     gen_rtx_USE (VOIDmode,
02575   gen_rtx_REG (SImode,
02576   19)),
02577     gen_rtx_CLOBBER (VOIDmode,
02578   operand0),
02579     gen_rtx_CLOBBER (VOIDmode,
02580   operand1),
02581     gen_rtx_CLOBBER (VOIDmode,
02582   operand2)));
02583 }
02584 
02585 /* ../../gcc/gcc/config/i386/i386.md:15824 */
02586 rtx
02587 gen_strlenqi_1 (operand0, operand1, operand2, operand3, operand4, operand5)
02588      rtx operand0;
02589      rtx operand1;
02590      rtx operand2;
02591      rtx operand3;
02592      rtx operand4;
02593      rtx operand5;
02594 {
02595   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (4,
02596     gen_rtx_SET (VOIDmode,
02597   operand0,
02598   gen_rtx_UNSPEC (SImode,
02599   gen_rtvec (4,
02600     gen_rtx_MEM (BLKmode,
02601   operand5),
02602     operand2,
02603     operand3,
02604     operand4),
02605   20)),
02606     gen_rtx_USE (VOIDmode,
02607   gen_rtx_REG (SImode,
02608   19)),
02609     gen_rtx_CLOBBER (VOIDmode,
02610   operand1),
02611     gen_rtx_CLOBBER (VOIDmode,
02612   gen_rtx_REG (CCmode,
02613   17))));
02614 }
02615 
02616 /* ../../gcc/gcc/config/i386/i386.md:15839 */
02617 rtx
02618 gen_strlenqi_rex_1 (operand0, operand1, operand2, operand3, operand4, operand5)
02619      rtx operand0;
02620      rtx operand1;
02621      rtx operand2;
02622      rtx operand3;
02623      rtx operand4;
02624      rtx operand5;
02625 {
02626   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (4,
02627     gen_rtx_SET (VOIDmode,
02628   operand0,
02629   gen_rtx_UNSPEC (DImode,
02630   gen_rtvec (4,
02631     gen_rtx_MEM (BLKmode,
02632   operand5),
02633     operand2,
02634     operand3,
02635     operand4),
02636   20)),
02637     gen_rtx_USE (VOIDmode,
02638   gen_rtx_REG (SImode,
02639   19)),
02640     gen_rtx_CLOBBER (VOIDmode,
02641   operand1),
02642     gen_rtx_CLOBBER (VOIDmode,
02643   gen_rtx_REG (CCmode,
02644   17))));
02645 }
02646 
02647 /* ../../gcc/gcc/config/i386/i386.md:15949 */
02648 rtx
02649 gen_x86_movdicc_0_m1_rex64 (operand0)
02650      rtx operand0;
02651 {
02652   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
02653     gen_rtx_SET (VOIDmode,
02654   operand0,
02655   gen_rtx_IF_THEN_ELSE (DImode,
02656   gen_rtx_LTU (VOIDmode,
02657   gen_rtx_REG (CCmode,
02658   17),
02659   const0_rtx),
02660   constm1_rtx,
02661   const0_rtx)),
02662     gen_rtx_CLOBBER (VOIDmode,
02663   gen_rtx_REG (CCmode,
02664   17))));
02665 }
02666 
02667 /* ../../gcc/gcc/config/i386/i386.md:15992 */
02668 rtx
02669 gen_x86_movsicc_0_m1 (operand0)
02670      rtx operand0;
02671 {
02672   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
02673     gen_rtx_SET (VOIDmode,
02674   operand0,
02675   gen_rtx_IF_THEN_ELSE (SImode,
02676   gen_rtx_LTU (VOIDmode,
02677   gen_rtx_REG (CCmode,
02678   17),
02679   const0_rtx),
02680   constm1_rtx,
02681   const0_rtx)),
02682     gen_rtx_CLOBBER (VOIDmode,
02683   gen_rtx_REG (CCmode,
02684   17))));
02685 }
02686 
02687 /* ../../gcc/gcc/config/i386/i386.md:16565 */
02688 rtx
02689 gen_pro_epilogue_adjust_stack_rex64 (operand0, operand1, operand2)
02690      rtx operand0;
02691      rtx operand1;
02692      rtx operand2;
02693 {
02694   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
02695     gen_rtx_SET (VOIDmode,
02696   operand0,
02697   gen_rtx_PLUS (DImode,
02698   operand1,
02699   operand2)),
02700     gen_rtx_CLOBBER (VOIDmode,
02701   gen_rtx_REG (CCmode,
02702   17)),
02703     gen_rtx_CLOBBER (VOIDmode,
02704   gen_rtx_MEM (BLKmode,
02705   gen_rtx_SCRATCH (VOIDmode)))));
02706 }
02707 
02708 /* ../../gcc/gcc/config/i386/i386.md:16615 */
02709 rtx
02710 gen_sse_movsfcc (operand0, operand1, operand2, operand3, operand4, operand5)
02711      rtx operand0;
02712      rtx operand1;
02713      rtx operand2;
02714      rtx operand3;
02715      rtx operand4;
02716      rtx operand5;
02717 {
02718   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
02719     gen_rtx_SET (VOIDmode,
02720   operand0,
02721   gen_rtx_IF_THEN_ELSE (SFmode,
02722   gen_rtx (GET_CODE (operand1), VOIDmode,
02723     operand4,
02724     operand5),
02725   operand2,
02726   operand3)),
02727     gen_rtx_CLOBBER (VOIDmode,
02728   gen_rtx_SCRATCH (SFmode)),
02729     gen_rtx_CLOBBER (VOIDmode,
02730   gen_rtx_REG (CCmode,
02731   17))));
02732 }
02733 
02734 /* ../../gcc/gcc/config/i386/i386.md:16630 */
02735 rtx
02736 gen_sse_movsfcc_eq (operand0, operand1, operand2, operand3, operand4)
02737      rtx operand0;
02738      rtx operand1;
02739      rtx operand2;
02740      rtx operand3;
02741      rtx operand4;
02742 {
02743   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
02744     gen_rtx_SET (VOIDmode,
02745   operand0,
02746   gen_rtx_IF_THEN_ELSE (SFmode,
02747   gen_rtx_EQ (VOIDmode,
02748   operand3,
02749   operand4),
02750   operand1,
02751   operand2)),
02752     gen_rtx_CLOBBER (VOIDmode,
02753   gen_rtx_SCRATCH (SFmode)),
02754     gen_rtx_CLOBBER (VOIDmode,
02755   gen_rtx_REG (CCmode,
02756   17))));
02757 }
02758 
02759 /* ../../gcc/gcc/config/i386/i386.md:16642 */
02760 rtx
02761 gen_sse_movdfcc (operand0, operand1, operand2, operand3, operand4, operand5)
02762      rtx operand0;
02763      rtx operand1;
02764      rtx operand2;
02765      rtx operand3;
02766      rtx operand4;
02767      rtx operand5;
02768 {
02769   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
02770     gen_rtx_SET (VOIDmode,
02771   operand0,
02772   gen_rtx_IF_THEN_ELSE (DFmode,
02773   gen_rtx (GET_CODE (operand1), VOIDmode,
02774     operand4,
02775     operand5),
02776   operand2,
02777   operand3)),
02778     gen_rtx_CLOBBER (VOIDmode,
02779   gen_rtx_SCRATCH (DFmode)),
02780     gen_rtx_CLOBBER (VOIDmode,
02781   gen_rtx_REG (CCmode,
02782   17))));
02783 }
02784 
02785 /* ../../gcc/gcc/config/i386/i386.md:16657 */
02786 rtx
02787 gen_sse_movdfcc_eq (operand0, operand1, operand2, operand3, operand4)
02788      rtx operand0;
02789      rtx operand1;
02790      rtx operand2;
02791      rtx operand3;
02792      rtx operand4;
02793 {
02794   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
02795     gen_rtx_SET (VOIDmode,
02796   operand0,
02797   gen_rtx_IF_THEN_ELSE (DFmode,
02798   gen_rtx_EQ (VOIDmode,
02799   operand3,
02800   operand4),
02801   operand1,
02802   operand2)),
02803     gen_rtx_CLOBBER (VOIDmode,
02804   gen_rtx_SCRATCH (DFmode)),
02805     gen_rtx_CLOBBER (VOIDmode,
02806   gen_rtx_REG (CCmode,
02807   17))));
02808 }
02809 
02810 /* ../../gcc/gcc/config/i386/i386.md:16859 */
02811 rtx
02812 gen_allocate_stack_worker_1 (operand0)
02813      rtx operand0;
02814 {
02815   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (4,
02816     gen_rtx_UNSPEC (SImode,
02817   gen_rtvec (1,
02818     operand0),
02819   10),
02820     gen_rtx_SET (VOIDmode,
02821   gen_rtx_REG (SImode,
02822   7),
02823   gen_rtx_MINUS (SImode,
02824   gen_rtx_REG (SImode,
02825   7),
02826   operand0)),
02827     gen_rtx_CLOBBER (VOIDmode,
02828   operand0),
02829     gen_rtx_CLOBBER (VOIDmode,
02830   gen_rtx_REG (CCmode,
02831   17))));
02832 }
02833 
02834 /* ../../gcc/gcc/config/i386/i386.md:16869 */
02835 rtx
02836 gen_allocate_stack_worker_rex64 (operand0)
02837      rtx operand0;
02838 {
02839   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (4,
02840     gen_rtx_UNSPEC (DImode,
02841   gen_rtvec (1,
02842     operand0),
02843   10),
02844     gen_rtx_SET (VOIDmode,
02845   gen_rtx_REG (DImode,
02846   7),
02847   gen_rtx_MINUS (DImode,
02848   gen_rtx_REG (DImode,
02849   7),
02850   operand0)),
02851     gen_rtx_CLOBBER (VOIDmode,
02852   operand0),
02853     gen_rtx_CLOBBER (VOIDmode,
02854   gen_rtx_REG (CCmode,
02855   17))));
02856 }
02857 
02858 /* ../../gcc/gcc/config/i386/i386.md:17883 */
02859 rtx
02860 gen_trap ()
02861 {
02862   return gen_rtx_TRAP_IF (VOIDmode,
02863   const1_rtx,
02864   GEN_INT (5LL));
02865 }
02866 
02867 /* ../../gcc/gcc/config/i386/i386.md:17935 */
02868 rtx
02869 gen_movv4sf_internal (operand0, operand1)
02870      rtx operand0;
02871      rtx operand1;
02872 {
02873   return gen_rtx_SET (VOIDmode,
02874   operand0,
02875   operand1);
02876 }
02877 
02878 /* ../../gcc/gcc/config/i386/i386.md:17947 */
02879 rtx
02880 gen_movv4si_internal (operand0, operand1)
02881      rtx operand0;
02882      rtx operand1;
02883 {
02884   return gen_rtx_SET (VOIDmode,
02885   operand0,
02886   operand1);
02887 }
02888 
02889 /* ../../gcc/gcc/config/i386/i386.md:17959 */
02890 rtx
02891 gen_movv2di_internal (operand0, operand1)
02892      rtx operand0;
02893      rtx operand1;
02894 {
02895   return gen_rtx_SET (VOIDmode,
02896   operand0,
02897   operand1);
02898 }
02899 
02900 /* ../../gcc/gcc/config/i386/i386.md:17971 */
02901 rtx
02902 gen_movv8qi_internal (operand0, operand1)
02903      rtx operand0;
02904      rtx operand1;
02905 {
02906   return gen_rtx_SET (VOIDmode,
02907   operand0,
02908   operand1);
02909 }
02910 
02911 /* ../../gcc/gcc/config/i386/i386.md:17983 */
02912 rtx
02913 gen_movv4hi_internal (operand0, operand1)
02914      rtx operand0;
02915      rtx operand1;
02916 {
02917   return gen_rtx_SET (VOIDmode,
02918   operand0,
02919   operand1);
02920 }
02921 
02922 /* ../../gcc/gcc/config/i386/i386.md:17995 */
02923 rtx
02924 gen_movv2si_internal (operand0, operand1)
02925      rtx operand0;
02926      rtx operand1;
02927 {
02928   return gen_rtx_SET (VOIDmode,
02929   operand0,
02930   operand1);
02931 }
02932 
02933 /* ../../gcc/gcc/config/i386/i386.md:18007 */
02934 rtx
02935 gen_movv2sf_internal (operand0, operand1)
02936      rtx operand0;
02937      rtx operand1;
02938 {
02939   return gen_rtx_SET (VOIDmode,
02940   operand0,
02941   operand1);
02942 }
02943 
02944 /* ../../gcc/gcc/config/i386/i386.md:18031 */
02945 rtx
02946 gen_movv2df_internal (operand0, operand1)
02947      rtx operand0;
02948      rtx operand1;
02949 {
02950   return gen_rtx_SET (VOIDmode,
02951   operand0,
02952   operand1);
02953 }
02954 
02955 /* ../../gcc/gcc/config/i386/i386.md:18043 */
02956 rtx
02957 gen_movv8hi_internal (operand0, operand1)
02958      rtx operand0;
02959      rtx operand1;
02960 {
02961   return gen_rtx_SET (VOIDmode,
02962   operand0,
02963   operand1);
02964 }
02965 
02966 /* ../../gcc/gcc/config/i386/i386.md:18055 */
02967 rtx
02968 gen_movv16qi_internal (operand0, operand1)
02969      rtx operand0;
02970      rtx operand1;
02971 {
02972   return gen_rtx_SET (VOIDmode,
02973   operand0,
02974   operand1);
02975 }
02976 
02977 /* ../../gcc/gcc/config/i386/i386.md:18361 */
02978 rtx
02979 gen_movti_internal (operand0, operand1)
02980      rtx operand0;
02981      rtx operand1;
02982 {
02983   return gen_rtx_SET (VOIDmode,
02984   operand0,
02985   operand1);
02986 }
02987 
02988 /* ../../gcc/gcc/config/i386/i386.md:18449 */
02989 rtx
02990 gen_sse_movmskps (operand0, operand1)
02991      rtx operand0;
02992      rtx operand1;
02993 {
02994   return gen_rtx_SET (VOIDmode,
02995   operand0,
02996   gen_rtx_UNSPEC (SImode,
02997   gen_rtvec (1,
02998     operand1),
02999   33));
03000 }
03001 
03002 /* ../../gcc/gcc/config/i386/i386.md:18458 */
03003 rtx
03004 gen_mmx_pmovmskb (operand0, operand1)
03005      rtx operand0;
03006      rtx operand1;
03007 {
03008   return gen_rtx_SET (VOIDmode,
03009   operand0,
03010   gen_rtx_UNSPEC (SImode,
03011   gen_rtvec (1,
03012     operand1),
03013   33));
03014 }
03015 
03016 /* ../../gcc/gcc/config/i386/i386.md:18468 */
03017 rtx
03018 gen_mmx_maskmovq (operand0, operand1, operand2)
03019      rtx operand0;
03020      rtx operand1;
03021      rtx operand2;
03022 {
03023   return gen_rtx_SET (VOIDmode,
03024   gen_rtx_MEM (V8QImode,
03025   operand0),
03026   gen_rtx_UNSPEC (V8QImode,
03027   gen_rtvec (2,
03028     operand1,
03029     operand2),
03030   32));
03031 }
03032 
03033 /* ../../gcc/gcc/config/i386/i386.md:18479 */
03034 rtx
03035 gen_mmx_maskmovq_rex (operand0, operand1, operand2)
03036      rtx operand0;
03037      rtx operand1;
03038      rtx operand2;
03039 {
03040   return gen_rtx_SET (VOIDmode,
03041   gen_rtx_MEM (V8QImode,
03042   operand0),
03043   gen_rtx_UNSPEC (V8QImode,
03044   gen_rtvec (2,
03045     operand1,
03046     operand2),
03047   32));
03048 }
03049 
03050 /* ../../gcc/gcc/config/i386/i386.md:18490 */
03051 rtx
03052 gen_sse_movntv4sf (operand0, operand1)
03053      rtx operand0;
03054      rtx operand1;
03055 {
03056   return gen_rtx_SET (VOIDmode,
03057   operand0,
03058   gen_rtx_UNSPEC (V4SFmode,
03059   gen_rtvec (1,
03060     operand1),
03061   34));
03062 }
03063 
03064 /* ../../gcc/gcc/config/i386/i386.md:18499 */
03065 rtx
03066 gen_sse_movntdi (operand0, operand1)
03067      rtx operand0;
03068      rtx operand1;
03069 {
03070   return gen_rtx_SET (VOIDmode,
03071   operand0,
03072   gen_rtx_UNSPEC (DImode,
03073   gen_rtvec (1,
03074     operand1),
03075   34));
03076 }
03077 
03078 /* ../../gcc/gcc/config/i386/i386.md:18508 */
03079 rtx
03080 gen_sse_movhlps (operand0, operand1, operand2)
03081      rtx operand0;
03082      rtx operand1;
03083      rtx operand2;
03084 {
03085   return gen_rtx_SET (VOIDmode,
03086   operand0,
03087   gen_rtx_VEC_MERGE (V4SFmode,
03088   operand1,
03089   gen_rtx_VEC_SELECT (V4SFmode,
03090   operand2,
03091   gen_rtx_PARALLEL (VOIDmode,
03092   gen_rtvec (4,
03093     GEN_INT (2LL),
03094     GEN_INT (3LL),
03095     const0_rtx,
03096     const1_rtx))),
03097   GEN_INT (3LL)));
03098 }
03099 
03100 /* ../../gcc/gcc/config/i386/i386.md:18523 */
03101 rtx
03102 gen_sse_movlhps (operand0, operand1, operand2)
03103      rtx operand0;
03104      rtx operand1;
03105      rtx operand2;
03106 {
03107   return gen_rtx_SET (VOIDmode,
03108   operand0,
03109   gen_rtx_VEC_MERGE (V4SFmode,
03110   operand1,
03111   gen_rtx_VEC_SELECT (V4SFmode,
03112   operand2,
03113   gen_rtx_PARALLEL (VOIDmode,
03114   gen_rtvec (4,
03115     GEN_INT (2LL),
03116     GEN_INT (3LL),
03117     const0_rtx,
03118     const1_rtx))),
03119   GEN_INT (12LL)));
03120 }
03121 
03122 /* ../../gcc/gcc/config/i386/i386.md:18538 */
03123 rtx
03124 gen_sse_movhps (operand0, operand1, operand2)
03125      rtx operand0;
03126      rtx operand1;
03127      rtx operand2;
03128 {
03129   return gen_rtx_SET (VOIDmode,
03130   operand0,
03131   gen_rtx_VEC_MERGE (V4SFmode,
03132   operand1,
03133   operand2,
03134   GEN_INT (12LL)));
03135 }
03136 
03137 /* ../../gcc/gcc/config/i386/i386.md:18550 */
03138 rtx
03139 gen_sse_movlps (operand0, operand1, operand2)
03140      rtx operand0;
03141      rtx operand1;
03142      rtx operand2;
03143 {
03144   return gen_rtx_SET (VOIDmode,
03145   operand0,
03146   gen_rtx_VEC_MERGE (V4SFmode,
03147   operand1,
03148   operand2,
03149   GEN_INT (3LL)));
03150 }
03151 
03152 /* ../../gcc/gcc/config/i386/i386.md:18572 */
03153 rtx
03154 gen_sse_loadss_1 (operand0, operand1, operand2)
03155      rtx operand0;
03156      rtx operand1;
03157      rtx operand2;
03158 {
03159   return gen_rtx_SET (VOIDmode,
03160   operand0,
03161   gen_rtx_VEC_MERGE (V4SFmode,
03162   gen_rtx_VEC_DUPLICATE (V4SFmode,
03163   operand1),
03164   operand2,
03165   const1_rtx));
03166 }
03167 
03168 /* ../../gcc/gcc/config/i386/i386.md:18583 */
03169 rtx
03170 gen_sse_movss (operand0, operand1, operand2)
03171      rtx operand0;
03172      rtx operand1;
03173      rtx operand2;
03174 {
03175   return gen_rtx_SET (VOIDmode,
03176   operand0,
03177   gen_rtx_VEC_MERGE (V4SFmode,
03178   operand1,
03179   operand2,
03180   const1_rtx));
03181 }
03182 
03183 /* ../../gcc/gcc/config/i386/i386.md:18594 */
03184 rtx
03185 gen_sse_storess (operand0, operand1)
03186      rtx operand0;
03187      rtx operand1;
03188 {
03189   return gen_rtx_SET (VOIDmode,
03190   operand0,
03191   gen_rtx_VEC_SELECT (SFmode,
03192   operand1,
03193   gen_rtx_PARALLEL (VOIDmode,
03194   gen_rtvec (1,
03195     const0_rtx))));
03196 }
03197 
03198 /* ../../gcc/gcc/config/i386/i386.md:18604 */
03199 rtx
03200 gen_sse_shufps (operand0, operand1, operand2, operand3)
03201      rtx operand0;
03202      rtx operand1;
03203      rtx operand2;
03204      rtx operand3;
03205 {
03206   return gen_rtx_SET (VOIDmode,
03207   operand0,
03208   gen_rtx_UNSPEC (V4SFmode,
03209   gen_rtvec (3,
03210     operand1,
03211     operand2,
03212     operand3),
03213   41));
03214 }
03215 
03216 /* ../../gcc/gcc/config/i386/i386.md:18619 */
03217 rtx
03218 gen_addv4sf3 (operand0, operand1, operand2)
03219      rtx operand0;
03220      rtx operand1;
03221      rtx operand2;
03222 {
03223   return gen_rtx_SET (VOIDmode,
03224   operand0,
03225   gen_rtx_PLUS (V4SFmode,
03226   operand1,
03227   operand2));
03228 }
03229 
03230 /* ../../gcc/gcc/config/i386/i386.md:18628 */
03231 rtx
03232 gen_vmaddv4sf3 (operand0, operand1, operand2)
03233      rtx operand0;
03234      rtx operand1;
03235      rtx operand2;
03236 {
03237   return gen_rtx_SET (VOIDmode,
03238   operand0,
03239   gen_rtx_VEC_MERGE (V4SFmode,
03240   gen_rtx_PLUS (V4SFmode,
03241   operand1,
03242   operand2),
03243   operand1,
03244   const1_rtx));
03245 }
03246 
03247 /* ../../gcc/gcc/config/i386/i386.md:18640 */
03248 rtx
03249 gen_subv4sf3 (operand0, operand1, operand2)
03250      rtx operand0;
03251      rtx operand1;
03252      rtx operand2;
03253 {
03254   return gen_rtx_SET (VOIDmode,
03255   operand0,
03256   gen_rtx_MINUS (V4SFmode,
03257   operand1,
03258   operand2));
03259 }
03260 
03261 /* ../../gcc/gcc/config/i386/i386.md:18649 */
03262 rtx
03263 gen_vmsubv4sf3 (operand0, operand1, operand2)
03264      rtx operand0;
03265      rtx operand1;
03266      rtx operand2;
03267 {
03268   return gen_rtx_SET (VOIDmode,
03269   operand0,
03270   gen_rtx_VEC_MERGE (V4SFmode,
03271   gen_rtx_MINUS (V4SFmode,
03272   operand1,
03273   operand2),
03274   operand1,
03275   const1_rtx));
03276 }
03277 
03278 /* ../../gcc/gcc/config/i386/i386.md:18661 */
03279 rtx
03280 gen_mulv4sf3 (operand0, operand1, operand2)
03281      rtx operand0;
03282      rtx operand1;
03283      rtx operand2;
03284 {
03285   return gen_rtx_SET (VOIDmode,
03286   operand0,
03287   gen_rtx_MULT (V4SFmode,
03288   operand1,
03289   operand2));
03290 }
03291 
03292 /* ../../gcc/gcc/config/i386/i386.md:18670 */
03293 rtx
03294 gen_vmmulv4sf3 (operand0, operand1, operand2)
03295      rtx operand0;
03296      rtx operand1;
03297      rtx operand2;
03298 {
03299   return gen_rtx_SET (VOIDmode,
03300   operand0,
03301   gen_rtx_VEC_MERGE (V4SFmode,
03302   gen_rtx_MULT (V4SFmode,
03303   operand1,
03304   operand2),
03305   operand1,
03306   const1_rtx));
03307 }
03308 
03309 /* ../../gcc/gcc/config/i386/i386.md:18682 */
03310 rtx
03311 gen_divv4sf3 (operand0, operand1, operand2)
03312      rtx operand0;
03313      rtx operand1;
03314      rtx operand2;
03315 {
03316   return gen_rtx_SET (VOIDmode,
03317   operand0,
03318   gen_rtx_DIV (V4SFmode,
03319   operand1,
03320   operand2));
03321 }
03322 
03323 /* ../../gcc/gcc/config/i386/i386.md:18691 */
03324 rtx
03325 gen_vmdivv4sf3 (operand0, operand1, operand2)
03326      rtx operand0;
03327      rtx operand1;
03328      rtx operand2;
03329 {
03330   return gen_rtx_SET (VOIDmode,
03331   operand0,
03332   gen_rtx_VEC_MERGE (V4SFmode,
03333   gen_rtx_DIV (V4SFmode,
03334   operand1,
03335   operand2),
03336   operand1,
03337   const1_rtx));
03338 }
03339 
03340 /* ../../gcc/gcc/config/i386/i386.md:18706 */
03341 rtx
03342 gen_rcpv4sf2 (operand0, operand1)
03343      rtx operand0;
03344      rtx operand1;
03345 {
03346   return gen_rtx_SET (VOIDmode,
03347   operand0,
03348   gen_rtx_UNSPEC (V4SFmode,
03349   gen_rtvec (1,
03350     operand1),
03351   42));
03352 }
03353 
03354 /* ../../gcc/gcc/config/i386/i386.md:18715 */
03355 rtx
03356 gen_vmrcpv4sf2 (operand0, operand1, operand2)
03357      rtx operand0;
03358      rtx operand1;
03359      rtx operand2;
03360 {
03361   return gen_rtx_SET (VOIDmode,
03362   operand0,
03363   gen_rtx_VEC_MERGE (V4SFmode,
03364   gen_rtx_UNSPEC (V4SFmode,
03365   gen_rtvec (1,
03366     operand1),
03367   42),
03368   operand2,
03369   const1_rtx));
03370 }
03371 
03372 /* ../../gcc/gcc/config/i386/i386.md:18727 */
03373 rtx
03374 gen_rsqrtv4sf2 (operand0, operand1)
03375      rtx operand0;
03376      rtx operand1;
03377 {
03378   return gen_rtx_SET (VOIDmode,
03379   operand0,
03380   gen_rtx_UNSPEC (V4SFmode,
03381   gen_rtvec (1,
03382     operand1),
03383   43));
03384 }
03385 
03386 /* ../../gcc/gcc/config/i386/i386.md:18736 */
03387 rtx
03388 gen_vmrsqrtv4sf2 (operand0, operand1, operand2)
03389      rtx operand0;
03390      rtx operand1;
03391      rtx operand2;
03392 {
03393   return gen_rtx_SET (VOIDmode,
03394   operand0,
03395   gen_rtx_VEC_MERGE (V4SFmode,
03396   gen_rtx_UNSPEC (V4SFmode,
03397   gen_rtvec (1,
03398     operand1),
03399   43),
03400   operand2,
03401   const1_rtx));
03402 }
03403 
03404 /* ../../gcc/gcc/config/i386/i386.md:18748 */
03405 rtx
03406 gen_sqrtv4sf2 (operand0, operand1)
03407      rtx operand0;
03408      rtx operand1;
03409 {
03410   return gen_rtx_SET (VOIDmode,
03411   operand0,
03412   gen_rtx_SQRT (V4SFmode,
03413   operand1));
03414 }
03415 
03416 /* ../../gcc/gcc/config/i386/i386.md:18756 */
03417 rtx
03418 gen_vmsqrtv4sf2 (operand0, operand1, operand2)
03419      rtx operand0;
03420      rtx operand1;
03421      rtx operand2;
03422 {
03423   return gen_rtx_SET (VOIDmode,
03424   operand0,
03425   gen_rtx_VEC_MERGE (V4SFmode,
03426   gen_rtx_SQRT (V4SFmode,
03427   operand1),
03428   operand2,
03429   const1_rtx));
03430 }
03431 
03432 /* ../../gcc/gcc/config/i386/i386.md:19026 */
03433 rtx
03434 gen_sse2_andv2di3 (operand0, operand1, operand2)
03435      rtx operand0;
03436      rtx operand1;
03437      rtx operand2;
03438 {
03439   return gen_rtx_SET (VOIDmode,
03440   operand0,
03441   gen_rtx_AND (V2DImode,
03442   operand1,
03443   operand2));
03444 }
03445 
03446 /* ../../gcc/gcc/config/i386/i386.md:19045 */
03447 rtx
03448 gen_sse2_nandv2di3 (operand0, operand1, operand2)
03449      rtx operand0;
03450      rtx operand1;
03451      rtx operand2;
03452 {
03453   return gen_rtx_SET (VOIDmode,
03454   operand0,
03455   gen_rtx_AND (V2DImode,
03456   gen_rtx_NOT (V2DImode,
03457   operand1),
03458   operand2));
03459 }
03460 
03461 /* ../../gcc/gcc/config/i386/i386.md:19065 */
03462 rtx
03463 gen_sse2_iorv2di3 (operand0, operand1, operand2)
03464      rtx operand0;
03465      rtx operand1;
03466      rtx operand2;
03467 {
03468   return gen_rtx_SET (VOIDmode,
03469   operand0,
03470   gen_rtx_IOR (V2DImode,
03471   operand1,
03472   operand2));
03473 }
03474 
03475 /* ../../gcc/gcc/config/i386/i386.md:19085 */
03476 rtx
03477 gen_sse2_xorv2di3 (operand0, operand1, operand2)
03478      rtx operand0;
03479      rtx operand1;
03480      rtx operand2;
03481 {
03482   return gen_rtx_SET (VOIDmode,
03483   operand0,
03484   gen_rtx_XOR (V2DImode,
03485   operand1,
03486   operand2));
03487 }
03488 
03489 /* ../../gcc/gcc/config/i386/i386.md:19097 */
03490 rtx
03491 gen_sse_clrv4sf (operand0)
03492      rtx operand0;
03493 {
03494   return gen_rtx_SET (VOIDmode,
03495   operand0,
03496   gen_rtx_UNSPEC (V4SFmode,
03497   gen_rtvec (1,
03498     const0_rtx),
03499   45));
03500 }
03501 
03502 /* ../../gcc/gcc/config/i386/i386.md:19108 */
03503 rtx
03504 gen_sse_clrv2df (operand0)
03505      rtx operand0;
03506 {
03507   return gen_rtx_SET (VOIDmode,
03508   operand0,
03509   gen_rtx_UNSPEC (V2DFmode,
03510   gen_rtvec (1,
03511     const0_rtx),
03512   45));
03513 }
03514 
03515 /* ../../gcc/gcc/config/i386/i386.md:19119 */
03516 rtx
03517 gen_maskcmpv4sf3 (operand0, operand1, operand2, operand3)
03518      rtx operand0;
03519      rtx operand1;
03520      rtx operand2;
03521      rtx operand3;
03522 {
03523   return gen_rtx_SET (VOIDmode,
03524   operand0,
03525   gen_rtx (GET_CODE (operand3), V4SImode,
03526     operand1,
03527     operand2));
03528 }
03529 
03530 /* ../../gcc/gcc/config/i386/i386.md:19129 */
03531 rtx
03532 gen_maskncmpv4sf3 (operand0, operand1, operand2, operand3)
03533      rtx operand0;
03534      rtx operand1;
03535      rtx operand2;
03536      rtx operand3;
03537 {
03538   return gen_rtx_SET (VOIDmode,
03539   operand0,
03540   gen_rtx_NOT (V4SImode,
03541   gen_rtx (GET_CODE (operand3), V4SImode,
03542     operand1,
03543     operand2)));
03544 }
03545 
03546 /* ../../gcc/gcc/config/i386/i386.md:19145 */
03547 rtx
03548 gen_vmmaskcmpv4sf3 (operand0, operand1, operand2, operand3)
03549      rtx operand0;
03550      rtx operand1;
03551      rtx operand2;
03552      rtx operand3;
03553 {
03554   return gen_rtx_SET (VOIDmode,
03555   operand0,
03556   gen_rtx_VEC_MERGE (V4SImode,
03557   gen_rtx (GET_CODE (operand3), V4SImode,
03558     operand1,
03559     operand2),
03560   gen_rtx_SUBREG (V4SImode,
03561   operand1,
03562   0),
03563   const1_rtx));
03564 }
03565 
03566 /* ../../gcc/gcc/config/i386/i386.md:19158 */
03567 rtx
03568 gen_vmmaskncmpv4sf3 (operand0, operand1, operand2, operand3)
03569      rtx operand0;
03570      rtx operand1;
03571      rtx operand2;
03572      rtx operand3;
03573 {
03574   return gen_rtx_SET (VOIDmode,
03575   operand0,
03576   gen_rtx_VEC_MERGE (V4SImode,
03577   gen_rtx_NOT (V4SImode,
03578   gen_rtx (GET_CODE (operand3), V4SImode,
03579     operand1,
03580     operand2)),
03581   gen_rtx_SUBREG (V4SImode,
03582   operand1,
03583   0),
03584   const1_rtx));
03585 }
03586 
03587 /* ../../gcc/gcc/config/i386/i386.md:19177 */
03588 rtx
03589 gen_sse_comi (operand0, operand1)
03590      rtx operand0;
03591      rtx operand1;
03592 {
03593   return gen_rtx_SET (VOIDmode,
03594   gen_rtx_REG (CCFPmode,
03595   17),
03596   gen_rtx_COMPARE (CCFPmode,
03597   gen_rtx_VEC_SELECT (SFmode,
03598   operand0,
03599   gen_rtx_PARALLEL (VOIDmode,
03600   gen_rtvec (1,
03601     const0_rtx))),
03602   gen_rtx_VEC_SELECT (SFmode,
03603   operand1,
03604   gen_rtx_PARALLEL (VOIDmode,
03605   gen_rtvec (1,
03606     const0_rtx)))));
03607 }
03608 
03609 /* ../../gcc/gcc/config/i386/i386.md:19190 */
03610 rtx
03611 gen_sse_ucomi (operand0, operand1)
03612      rtx operand0;
03613      rtx operand1;
03614 {
03615   return gen_rtx_SET (VOIDmode,
03616   gen_rtx_REG (CCFPUmode,
03617   17),
03618   gen_rtx_COMPARE (CCFPUmode,
03619   gen_rtx_VEC_SELECT (SFmode,
03620   operand0,
03621   gen_rtx_PARALLEL (VOIDmode,
03622   gen_rtvec (1,
03623     const0_rtx))),
03624   gen_rtx_VEC_SELECT (SFmode,
03625   operand1,
03626   gen_rtx_PARALLEL (VOIDmode,
03627   gen_rtvec (1,
03628     const0_rtx)))));
03629 }
03630 
03631 /* ../../gcc/gcc/config/i386/i386.md:19206 */
03632 rtx
03633 gen_sse_unpckhps (operand0, operand1, operand2)
03634      rtx operand0;
03635      rtx operand1;
03636      rtx operand2;
03637 {
03638   return gen_rtx_SET (VOIDmode,
03639   operand0,
03640   gen_rtx_VEC_MERGE (V4SFmode,
03641   gen_rtx_VEC_SELECT (V4SFmode,
03642   operand1,
03643   gen_rtx_PARALLEL (VOIDmode,
03644   gen_rtvec (4,
03645     GEN_INT (2LL),
03646     const0_rtx,
03647     GEN_INT (3LL),
03648     const1_rtx))),
03649   gen_rtx_VEC_SELECT (V4SFmode,
03650   operand2,
03651   gen_rtx_PARALLEL (VOIDmode,
03652   gen_rtvec (4,
03653     const0_rtx,
03654     GEN_INT (2LL),
03655     const1_rtx,
03656     GEN_INT (3LL)))),
03657   GEN_INT (5LL)));
03658 }
03659 
03660 /* ../../gcc/gcc/config/i386/i386.md:19225 */
03661 rtx
03662 gen_sse_unpcklps (operand0, operand1, operand2)
03663      rtx operand0;
03664      rtx operand1;
03665      rtx operand2;
03666 {
03667   return gen_rtx_SET (VOIDmode,
03668   operand0,
03669   gen_rtx_VEC_MERGE (V4SFmode,
03670   gen_rtx_VEC_SELECT (V4SFmode,
03671   operand1,
03672   gen_rtx_PARALLEL (VOIDmode,
03673   gen_rtvec (4,
03674     const0_rtx,
03675     GEN_INT (2LL),
03676     const1_rtx,
03677     GEN_INT (3LL)))),
03678   gen_rtx_VEC_SELECT (V4SFmode,
03679   operand2,
03680   gen_rtx_PARALLEL (VOIDmode,
03681   gen_rtvec (4,
03682     GEN_INT (2LL),
03683     const0_rtx,
03684     GEN_INT (3LL),
03685     const1_rtx))),
03686   GEN_INT (5LL)));
03687 }
03688 
03689 /* ../../gcc/gcc/config/i386/i386.md:19247 */
03690 rtx
03691 gen_smaxv4sf3 (operand0, operand1, operand2)
03692      rtx operand0;
03693      rtx operand1;
03694      rtx operand2;
03695 {
03696   return gen_rtx_SET (VOIDmode,
03697   operand0,
03698   gen_rtx_SMAX (V4SFmode,
03699   operand1,
03700   operand2));
03701 }
03702 
03703 /* ../../gcc/gcc/config/i386/i386.md:19256 */
03704 rtx
03705 gen_vmsmaxv4sf3 (operand0, operand1, operand2)
03706      rtx operand0;
03707      rtx operand1;
03708      rtx operand2;
03709 {
03710   return gen_rtx_SET (VOIDmode,
03711   operand0,
03712   gen_rtx_VEC_MERGE (V4SFmode,
03713   gen_rtx_SMAX (V4SFmode,
03714   operand1,
03715   operand2),
03716   operand1,
03717   const1_rtx));
03718 }
03719 
03720 /* ../../gcc/gcc/config/i386/i386.md:19268 */
03721 rtx
03722 gen_sminv4sf3 (operand0, operand1, operand2)
03723      rtx operand0;
03724      rtx operand1;
03725      rtx operand2;
03726 {
03727   return gen_rtx_SET (VOIDmode,
03728   operand0,
03729   gen_rtx_SMIN (V4SFmode,
03730   operand1,
03731   operand2));
03732 }
03733 
03734 /* ../../gcc/gcc/config/i386/i386.md:19277 */
03735 rtx
03736 gen_vmsminv4sf3 (operand0, operand1, operand2)
03737      rtx operand0;
03738      rtx operand1;
03739      rtx operand2;
03740 {
03741   return gen_rtx_SET (VOIDmode,
03742   operand0,
03743   gen_rtx_VEC_MERGE (V4SFmode,
03744   gen_rtx_SMIN (V4SFmode,
03745   operand1,
03746   operand2),
03747   operand1,
03748   const1_rtx));
03749 }
03750 
03751 /* ../../gcc/gcc/config/i386/i386.md:19291 */
03752 rtx
03753 gen_cvtpi2ps (operand0, operand1, operand2)
03754      rtx operand0;
03755      rtx operand1;
03756      rtx operand2;
03757 {
03758   return gen_rtx_SET (VOIDmode,
03759   operand0,
03760   gen_rtx_VEC_MERGE (V4SFmode,
03761   operand1,
03762   gen_rtx_VEC_DUPLICATE (V4SFmode,
03763   gen_rtx_FLOAT (V2SFmode,
03764   operand2)),
03765   GEN_INT (12LL)));
03766 }
03767 
03768 /* ../../gcc/gcc/config/i386/i386.md:19303 */
03769 rtx
03770 gen_cvtps2pi (operand0, operand1)
03771      rtx operand0;
03772      rtx operand1;
03773 {
03774   return gen_rtx_SET (VOIDmode,
03775   operand0,
03776   gen_rtx_VEC_SELECT (V2SImode,
03777   gen_rtx_FIX (V4SImode,
03778   operand1),
03779   gen_rtx_PARALLEL (VOIDmode,
03780   gen_rtvec (2,
03781     const0_rtx,
03782     const1_rtx))));
03783 }
03784 
03785 /* ../../gcc/gcc/config/i386/i386.md:19313 */
03786 rtx
03787 gen_cvttps2pi (operand0, operand1)
03788      rtx operand0;
03789      rtx operand1;
03790 {
03791   return gen_rtx_SET (VOIDmode,
03792   operand0,
03793   gen_rtx_VEC_SELECT (V2SImode,
03794   gen_rtx_UNSPEC (V4SImode,
03795   gen_rtvec (1,
03796     operand1),
03797   30),
03798   gen_rtx_PARALLEL (VOIDmode,
03799   gen_rtvec (2,
03800     const0_rtx,
03801     const1_rtx))));
03802 }
03803 
03804 /* ../../gcc/gcc/config/i386/i386.md:19324 */
03805 rtx
03806 gen_cvtsi2ss (operand0, operand1, operand2)
03807      rtx operand0;
03808      rtx operand1;
03809      rtx operand2;
03810 {
03811   return gen_rtx_SET (VOIDmode,
03812   operand0,
03813   gen_rtx_VEC_MERGE (V4SFmode,
03814   operand1,
03815   gen_rtx_VEC_DUPLICATE (V4SFmode,
03816   gen_rtx_FLOAT (SFmode,
03817   operand2)),
03818   GEN_INT (14LL)));
03819 }
03820 
03821 /* ../../gcc/gcc/config/i386/i386.md:19336 */
03822 rtx
03823 gen_cvtsi2ssq (operand0, operand1, operand2)
03824      rtx operand0;
03825      rtx operand1;
03826      rtx operand2;
03827 {
03828   return gen_rtx_SET (VOIDmode,
03829   operand0,
03830   gen_rtx_VEC_MERGE (V4SFmode,
03831   operand1,
03832   gen_rtx_VEC_DUPLICATE (V4SFmode,
03833   gen_rtx_FLOAT (SFmode,
03834   operand2)),
03835   GEN_INT (14LL)));
03836 }
03837 
03838 /* ../../gcc/gcc/config/i386/i386.md:19349 */
03839 rtx
03840 gen_cvtss2si (operand0, operand1)
03841      rtx operand0;
03842      rtx operand1;
03843 {
03844   return gen_rtx_SET (VOIDmode,
03845   operand0,
03846   gen_rtx_VEC_SELECT (SImode,
03847   gen_rtx_FIX (V4SImode,
03848   operand1),
03849   gen_rtx_PARALLEL (VOIDmode,
03850   gen_rtvec (1,
03851     const0_rtx))));
03852 }
03853 
03854 /* ../../gcc/gcc/config/i386/i386.md:19359 */
03855 rtx
03856 gen_cvtss2siq (operand0, operand1)
03857      rtx operand0;
03858      rtx operand1;
03859 {
03860   return gen_rtx_SET (VOIDmode,
03861   operand0,
03862   gen_rtx_VEC_SELECT (DImode,
03863   gen_rtx_FIX (V4DImode,
03864   operand1),
03865   gen_rtx_PARALLEL (VOIDmode,
03866   gen_rtvec (1,
03867     const0_rtx))));
03868 }
03869 
03870 /* ../../gcc/gcc/config/i386/i386.md:19370 */
03871 rtx
03872 gen_cvttss2si (operand0, operand1)
03873      rtx operand0;
03874      rtx operand1;
03875 {
03876   return gen_rtx_SET (VOIDmode,
03877   operand0,
03878   gen_rtx_VEC_SELECT (SImode,
03879   gen_rtx_UNSPEC (V4SImode,
03880   gen_rtvec (1,
03881     operand1),
03882   30),
03883   gen_rtx_PARALLEL (VOIDmode,
03884   gen_rtvec (1,
03885     const0_rtx))));
03886 }
03887 
03888 /* ../../gcc/gcc/config/i386/i386.md:19381 */
03889 rtx
03890 gen_cvttss2siq (operand0, operand1)
03891      rtx operand0;
03892      rtx operand1;
03893 {
03894   return gen_rtx_SET (VOIDmode,
03895   operand0,
03896   gen_rtx_VEC_SELECT (DImode,
03897   gen_rtx_UNSPEC (V4DImode,
03898   gen_rtvec (1,
03899     operand1),
03900   30),
03901   gen_rtx_PARALLEL (VOIDmode,
03902   gen_rtvec (1,
03903     const0_rtx))));
03904 }
03905 
03906 /* ../../gcc/gcc/config/i386/i386.md:19398 */
03907 rtx
03908 gen_addv8qi3 (operand0, operand1, operand2)
03909      rtx operand0;
03910      rtx operand1;
03911      rtx operand2;
03912 {
03913   return gen_rtx_SET (VOIDmode,
03914   operand0,
03915   gen_rtx_PLUS (V8QImode,
03916   operand1,
03917   operand2));
03918 }
03919 
03920 /* ../../gcc/gcc/config/i386/i386.md:19407 */
03921 rtx
03922 gen_addv4hi3 (operand0, operand1, operand2)
03923      rtx operand0;
03924      rtx operand1;
03925      rtx operand2;
03926 {
03927   return gen_rtx_SET (VOIDmode,
03928   operand0,
03929   gen_rtx_PLUS (V4HImode,
03930   operand1,
03931   operand2));
03932 }
03933 
03934 /* ../../gcc/gcc/config/i386/i386.md:19416 */
03935 rtx
03936 gen_addv2si3 (operand0, operand1, operand2)
03937      rtx operand0;
03938      rtx operand1;
03939      rtx operand2;
03940 {
03941   return gen_rtx_SET (VOIDmode,
03942   operand0,
03943   gen_rtx_PLUS (V2SImode,
03944   operand1,
03945   operand2));
03946 }
03947 
03948 /* ../../gcc/gcc/config/i386/i386.md:19425 */
03949 rtx
03950 gen_mmx_adddi3 (operand0, operand1, operand2)
03951      rtx operand0;
03952      rtx operand1;
03953      rtx operand2;
03954 {
03955   return gen_rtx_SET (VOIDmode,
03956   operand0,
03957   gen_rtx_UNSPEC (DImode,
03958   gen_rtvec (1,
03959     gen_rtx_PLUS (DImode,
03960   operand1,
03961   operand2)),
03962   45));
03963 }
03964 
03965 /* ../../gcc/gcc/config/i386/i386.md:19436 */
03966 rtx
03967 gen_ssaddv8qi3 (operand0, operand1, operand2)
03968      rtx operand0;
03969      rtx operand1;
03970      rtx operand2;
03971 {
03972   return gen_rtx_SET (VOIDmode,
03973   operand0,
03974   gen_rtx_SS_PLUS (V8QImode,
03975   operand1,
03976   operand2));
03977 }
03978 
03979 /* ../../gcc/gcc/config/i386/i386.md:19445 */
03980 rtx
03981 gen_ssaddv4hi3 (operand0, operand1, operand2)
03982      rtx operand0;
03983      rtx operand1;
03984      rtx operand2;
03985 {
03986   return gen_rtx_SET (VOIDmode,
03987   operand0,
03988   gen_rtx_SS_PLUS (V4HImode,
03989   operand1,
03990   operand2));
03991 }
03992 
03993 /* ../../gcc/gcc/config/i386/i386.md:19454 */
03994 rtx
03995 gen_usaddv8qi3 (operand0, operand1, operand2)
03996      rtx operand0;
03997      rtx operand1;
03998      rtx operand2;
03999 {
04000   return gen_rtx_SET (VOIDmode,
04001   operand0,
04002   gen_rtx_US_PLUS (V8QImode,
04003   operand1,
04004   operand2));
04005 }
04006 
04007 /* ../../gcc/gcc/config/i386/i386.md:19463 */
04008 rtx
04009 gen_usaddv4hi3 (operand0, operand1, operand2)
04010      rtx operand0;
04011      rtx operand1;
04012      rtx operand2;
04013 {
04014   return gen_rtx_SET (VOIDmode,
04015   operand0,
04016   gen_rtx_US_PLUS (V4HImode,
04017   operand1,
04018   operand2));
04019 }
04020 
04021 /* ../../gcc/gcc/config/i386/i386.md:19472 */
04022 rtx
04023 gen_subv8qi3 (operand0, operand1, operand2)
04024      rtx operand0;
04025      rtx operand1;
04026      rtx operand2;
04027 {
04028   return gen_rtx_SET (VOIDmode,
04029   operand0,
04030   gen_rtx_MINUS (V8QImode,
04031   operand1,
04032   operand2));
04033 }
04034 
04035 /* ../../gcc/gcc/config/i386/i386.md:19481 */
04036 rtx
04037 gen_subv4hi3 (operand0, operand1, operand2)
04038      rtx operand0;
04039      rtx operand1;
04040      rtx operand2;
04041 {
04042   return gen_rtx_SET (VOIDmode,
04043   operand0,
04044   gen_rtx_MINUS (V4HImode,
04045   operand1,
04046   operand2));
04047 }
04048 
04049 /* ../../gcc/gcc/config/i386/i386.md:19490 */
04050 rtx
04051 gen_subv2si3 (operand0, operand1, operand2)
04052      rtx operand0;
04053      rtx operand1;
04054      rtx operand2;
04055 {
04056   return gen_rtx_SET (VOIDmode,
04057   operand0,
04058   gen_rtx_MINUS (V2SImode,
04059   operand1,
04060   operand2));
04061 }
04062 
04063 /* ../../gcc/gcc/config/i386/i386.md:19499 */
04064 rtx
04065 gen_mmx_subdi3 (operand0, operand1, operand2)
04066      rtx operand0;
04067      rtx operand1;
04068      rtx operand2;
04069 {
04070   return gen_rtx_SET (VOIDmode,
04071   operand0,
04072   gen_rtx_UNSPEC (DImode,
04073   gen_rtvec (1,
04074     gen_rtx_MINUS (DImode,
04075   operand1,
04076   operand2)),
04077   45));
04078 }
04079 
04080 /* ../../gcc/gcc/config/i386/i386.md:19510 */
04081 rtx
04082 gen_sssubv8qi3 (operand0, operand1, operand2)
04083      rtx operand0;
04084      rtx operand1;
04085      rtx operand2;
04086 {
04087   return gen_rtx_SET (VOIDmode,
04088   operand0,
04089   gen_rtx_SS_MINUS (V8QImode,
04090   operand1,
04091   operand2));
04092 }
04093 
04094 /* ../../gcc/gcc/config/i386/i386.md:19519 */
04095 rtx
04096 gen_sssubv4hi3 (operand0, operand1, operand2)
04097      rtx operand0;
04098      rtx operand1;
04099      rtx operand2;
04100 {
04101   return gen_rtx_SET (VOIDmode,
04102   operand0,
04103   gen_rtx_SS_MINUS (V4HImode,
04104   operand1,
04105   operand2));
04106 }
04107 
04108 /* ../../gcc/gcc/config/i386/i386.md:19528 */
04109 rtx
04110 gen_ussubv8qi3 (operand0, operand1, operand2)
04111      rtx operand0;
04112      rtx operand1;
04113      rtx operand2;
04114 {
04115   return gen_rtx_SET (VOIDmode,
04116   operand0,
04117   gen_rtx_US_MINUS (V8QImode,
04118   operand1,
04119   operand2));
04120 }
04121 
04122 /* ../../gcc/gcc/config/i386/i386.md:19537 */
04123 rtx
04124 gen_ussubv4hi3 (operand0, operand1, operand2)
04125      rtx operand0;
04126      rtx operand1;
04127      rtx operand2;
04128 {
04129   return gen_rtx_SET (VOIDmode,
04130   operand0,
04131   gen_rtx_US_MINUS (V4HImode,
04132   operand1,
04133   operand2));
04134 }
04135 
04136 /* ../../gcc/gcc/config/i386/i386.md:19546 */
04137 rtx
04138 gen_mulv4hi3 (operand0, operand1, operand2)
04139      rtx operand0;
04140      rtx operand1;
04141      rtx operand2;
04142 {
04143   return gen_rtx_SET (VOIDmode,
04144   operand0,
04145   gen_rtx_MULT (V4HImode,
04146   operand1,
04147   operand2));
04148 }
04149 
04150 /* ../../gcc/gcc/config/i386/i386.md:19555 */
04151 rtx
04152 gen_smulv4hi3_highpart (operand0, operand1, operand2)
04153      rtx operand0;
04154      rtx operand1;
04155      rtx operand2;
04156 {
04157   return gen_rtx_SET (VOIDmode,
04158   operand0,
04159   gen_rtx_TRUNCATE (V4HImode,
04160   gen_rtx_LSHIFTRT (V4SImode,
04161   gen_rtx_MULT (V4SImode,
04162   gen_rtx_SIGN_EXTEND (V4SImode,
04163   operand1),
04164   gen_rtx_SIGN_EXTEND (V4SImode,
04165   operand2)),
04166   GEN_INT (16LL))));
04167 }
04168 
04169 /* ../../gcc/gcc/config/i386/i386.md:19569 */
04170 rtx
04171 gen_umulv4hi3_highpart (operand0, operand1, operand2)
04172      rtx operand0;
04173      rtx operand1;
04174      rtx operand2;
04175 {
04176   return gen_rtx_SET (VOIDmode,
04177   operand0,
04178   gen_rtx_TRUNCATE (V4HImode,
04179   gen_rtx_LSHIFTRT (V4SImode,
04180   gen_rtx_MULT (V4SImode,
04181   gen_rtx_ZERO_EXTEND (V4SImode,
04182   operand1),
04183   gen_rtx_ZERO_EXTEND (V4SImode,
04184   operand2)),
04185   GEN_INT (16LL))));
04186 }
04187 
04188 /* ../../gcc/gcc/config/i386/i386.md:19583 */
04189 rtx
04190 gen_mmx_pmaddwd (operand0, operand1, operand2)
04191      rtx operand0;
04192      rtx operand1;
04193      rtx operand2;
04194 {
04195   return gen_rtx_SET (VOIDmode,
04196   operand0,
04197   gen_rtx_PLUS (V2SImode,
04198   gen_rtx_MULT (V2SImode,
04199   gen_rtx_SIGN_EXTEND (V2SImode,
04200   gen_rtx_VEC_SELECT (V2HImode,
04201   operand1,
04202   gen_rtx_PARALLEL (VOIDmode,
04203   gen_rtvec (2,
04204     const0_rtx,
04205     GEN_INT (2LL))))),
04206   gen_rtx_SIGN_EXTEND (V2SImode,
04207   gen_rtx_VEC_SELECT (V2HImode,
04208   operand2,
04209   gen_rtx_PARALLEL (VOIDmode,
04210   gen_rtvec (2,
04211     const0_rtx,
04212     GEN_INT (2LL)))))),
04213   gen_rtx_MULT (V2SImode,
04214   gen_rtx_SIGN_EXTEND (V2SImode,
04215   gen_rtx_VEC_SELECT (V2HImode,
04216   operand1,
04217   gen_rtx_PARALLEL (VOIDmode,
04218   gen_rtvec (2,
04219     const1_rtx,
04220     GEN_INT (3LL))))),
04221   gen_rtx_SIGN_EXTEND (V2SImode,
04222   gen_rtx_VEC_SELECT (V2HImode,
04223   operand2,
04224   gen_rtx_PARALLEL (VOIDmode,
04225   gen_rtvec (2,
04226     const1_rtx,
04227     GEN_INT (3LL))))))));
04228 }
04229 
04230 /* ../../gcc/gcc/config/i386/i386.md:19610 */
04231 rtx
04232 gen_mmx_iordi3 (operand0, operand1, operand2)
04233      rtx operand0;
04234      rtx operand1;
04235      rtx operand2;
04236 {
04237   return gen_rtx_SET (VOIDmode,
04238   operand0,
04239   gen_rtx_UNSPEC (DImode,
04240   gen_rtvec (1,
04241     gen_rtx_IOR (DImode,
04242   operand1,
04243   operand2)),
04244   45));
04245 }
04246 
04247 /* ../../gcc/gcc/config/i386/i386.md:19621 */
04248 rtx
04249 gen_mmx_xordi3 (operand0, operand1, operand2)
04250      rtx operand0;
04251      rtx operand1;
04252      rtx operand2;
04253 {
04254   return gen_rtx_SET (VOIDmode,
04255   operand0,
04256   gen_rtx_UNSPEC (DImode,
04257   gen_rtvec (1,
04258     gen_rtx_XOR (DImode,
04259   operand1,
04260   operand2)),
04261   45));
04262 }
04263 
04264 /* ../../gcc/gcc/config/i386/i386.md:19635 */
04265 rtx
04266 gen_mmx_clrdi (operand0)
04267      rtx operand0;
04268 {
04269   return gen_rtx_SET (VOIDmode,
04270   operand0,
04271   gen_rtx_UNSPEC (DImode,
04272   gen_rtvec (1,
04273     const0_rtx),
04274   45));
04275 }
04276 
04277 /* ../../gcc/gcc/config/i386/i386.md:19644 */
04278 rtx
04279 gen_mmx_anddi3 (operand0, operand1, operand2)
04280      rtx operand0;
04281      rtx operand1;
04282      rtx operand2;
04283 {
04284   return gen_rtx_SET (VOIDmode,
04285   operand0,
04286   gen_rtx_UNSPEC (DImode,
04287   gen_rtvec (1,
04288     gen_rtx_AND (DImode,
04289   operand1,
04290   operand2)),
04291   45));
04292 }
04293 
04294 /* ../../gcc/gcc/config/i386/i386.md:19655 */
04295 rtx
04296 gen_mmx_nanddi3 (operand0, operand1, operand2)
04297      rtx operand0;
04298      rtx operand1;
04299      rtx operand2;
04300 {
04301   return gen_rtx_SET (VOIDmode,
04302   operand0,
04303   gen_rtx_UNSPEC (DImode,
04304   gen_rtvec (1,
04305     gen_rtx_AND (DImode,
04306   gen_rtx_NOT (DImode,
04307   operand1),
04308   operand2)),
04309   45));
04310 }
04311 
04312 /* ../../gcc/gcc/config/i386/i386.md:19669 */
04313 rtx
04314 gen_mmx_uavgv8qi3 (operand0, operand1, operand2)
04315      rtx operand0;
04316      rtx operand1;
04317      rtx operand2;
04318 {
04319   return gen_rtx_SET (VOIDmode,
04320   operand0,
04321   gen_rtx_ASHIFTRT (V8QImode,
04322   gen_rtx_PLUS (V8QImode,
04323   gen_rtx_PLUS (V8QImode,
04324   operand1,
04325   operand2),
04326   gen_rtx_CONST_VECTOR (V8QImode,
04327   gen_rtvec (8,
04328     const1_rtx,
04329     const1_rtx,
04330     const1_rtx,
04331     const1_rtx,
04332     const1_rtx,
04333     const1_rtx,
04334     const1_rtx,
04335     const1_rtx))),
04336   const1_rtx));
04337 }
04338 
04339 /* ../../gcc/gcc/config/i386/i386.md:19689 */
04340 rtx
04341 gen_mmx_uavgv4hi3 (operand0, operand1, operand2)
04342      rtx operand0;
04343      rtx operand1;
04344      rtx operand2;
04345 {
04346   return gen_rtx_SET (VOIDmode,
04347   operand0,
04348   gen_rtx_ASHIFTRT (V4HImode,
04349   gen_rtx_PLUS (V4HImode,
04350   gen_rtx_PLUS (V4HImode,
04351   operand1,
04352   operand2),
04353   gen_rtx_CONST_VECTOR (V4HImode,
04354   gen_rtvec (4,
04355     const1_rtx,
04356     const1_rtx,
04357     const1_rtx,
04358     const1_rtx))),
04359   const1_rtx));
04360 }
04361 
04362 /* ../../gcc/gcc/config/i386/i386.md:19705 */
04363 rtx
04364 gen_mmx_psadbw (operand0, operand1, operand2)
04365      rtx operand0;
04366      rtx operand1;
04367      rtx operand2;
04368 {
04369   return gen_rtx_SET (VOIDmode,
04370   operand0,
04371   gen_rtx_UNSPEC (DImode,
04372   gen_rtvec (2,
04373     operand1,
04374     operand2),
04375   61));
04376 }
04377 
04378 /* ../../gcc/gcc/config/i386/i386.md:19718 */
04379 rtx
04380 gen_mmx_pinsrw (operand0, operand1, operand2, operand3)
04381      rtx operand0;
04382      rtx operand1;
04383      rtx operand2;
04384      rtx operand3;
04385 {
04386   return gen_rtx_SET (VOIDmode,
04387   operand0,
04388   gen_rtx_VEC_MERGE (V4HImode,
04389   operand1,
04390   gen_rtx_VEC_DUPLICATE (V4HImode,
04391   gen_rtx_TRUNCATE (HImode,
04392   operand2)),
04393   operand3));
04394 }
04395 
04396 /* ../../gcc/gcc/config/i386/i386.md:19729 */
04397 rtx
04398 gen_mmx_pextrw (operand0, operand1, operand2)
04399      rtx operand0;
04400      rtx operand1;
04401      rtx operand2;
04402 {
04403   return gen_rtx_SET (VOIDmode,
04404   operand0,
04405   gen_rtx_ZERO_EXTEND (SImode,
04406   gen_rtx_VEC_SELECT (HImode,
04407   operand1,
04408   gen_rtx_PARALLEL (VOIDmode,
04409   gen_rtvec (1,
04410     operand2)))));
04411 }
04412 
04413 /* ../../gcc/gcc/config/i386/i386.md:19739 */
04414 rtx
04415 gen_mmx_pshufw (operand0, operand1, operand2)
04416      rtx operand0;
04417      rtx operand1;
04418      rtx operand2;
04419 {
04420   return gen_rtx_SET (VOIDmode,
04421   operand0,
04422   gen_rtx_UNSPEC (V4HImode,
04423   gen_rtvec (2,
04424     operand1,
04425     operand2),
04426   41));
04427 }
04428 
04429 /* ../../gcc/gcc/config/i386/i386.md:19752 */
04430 rtx
04431 gen_eqv8qi3 (operand0, operand1, operand2)
04432      rtx operand0;
04433      rtx operand1;
04434      rtx operand2;
04435 {
04436   return gen_rtx_SET (VOIDmode,
04437   operand0,
04438   gen_rtx_EQ (V8QImode,
04439   operand1,
04440   operand2));
04441 }
04442 
04443 /* ../../gcc/gcc/config/i386/i386.md:19761 */
04444 rtx
04445 gen_eqv4hi3 (operand0, operand1, operand2)
04446      rtx operand0;
04447      rtx operand1;
04448      rtx operand2;
04449 {
04450   return gen_rtx_SET (VOIDmode,
04451   operand0,
04452   gen_rtx_EQ (V4HImode,
04453   operand1,
04454   operand2));
04455 }
04456 
04457 /* ../../gcc/gcc/config/i386/i386.md:19770 */
04458 rtx
04459 gen_eqv2si3 (operand0, operand1, operand2)
04460      rtx operand0;
04461      rtx operand1;
04462      rtx operand2;
04463 {
04464   return gen_rtx_SET (VOIDmode,
04465   operand0,
04466   gen_rtx_EQ (V2SImode,
04467   operand1,
04468   operand2));
04469 }
04470 
04471 /* ../../gcc/gcc/config/i386/i386.md:19779 */
04472 rtx
04473 gen_gtv8qi3 (operand0, operand1, operand2)
04474      rtx operand0;
04475      rtx operand1;
04476      rtx operand2;
04477 {
04478   return gen_rtx_SET (VOIDmode,
04479   operand0,
04480   gen_rtx_GT (V8QImode,
04481   operand1,
04482   operand2));
04483 }
04484 
04485 /* ../../gcc/gcc/config/i386/i386.md:19788 */
04486 rtx
04487 gen_gtv4hi3 (operand0, operand1, operand2)
04488      rtx operand0;
04489      rtx operand1;
04490      rtx operand2;
04491 {
04492   return gen_rtx_SET (VOIDmode,
04493   operand0,
04494   gen_rtx_GT (V4HImode,
04495   operand1,
04496   operand2));
04497 }
04498 
04499 /* ../../gcc/gcc/config/i386/i386.md:19797 */
04500 rtx
04501 gen_gtv2si3 (operand0, operand1, operand2)
04502      rtx operand0;
04503      rtx operand1;
04504      rtx operand2;
04505 {
04506   return gen_rtx_SET (VOIDmode,
04507   operand0,
04508   gen_rtx_GT (V2SImode,
04509   operand1,
04510   operand2));
04511 }
04512 
04513 /* ../../gcc/gcc/config/i386/i386.md:19809 */
04514 rtx
04515 gen_umaxv8qi3 (operand0, operand1, operand2)
04516      rtx operand0;
04517      rtx operand1;
04518      rtx operand2;
04519 {
04520   return gen_rtx_SET (VOIDmode,
04521   operand0,
04522   gen_rtx_UMAX (V8QImode,
04523   operand1,
04524   operand2));
04525 }
04526 
04527 /* ../../gcc/gcc/config/i386/i386.md:19818 */
04528 rtx
04529 gen_smaxv4hi3 (operand0, operand1, operand2)
04530      rtx operand0;
04531      rtx operand1;
04532      rtx operand2;
04533 {
04534   return gen_rtx_SET (VOIDmode,
04535   operand0,
04536   gen_rtx_SMAX (V4HImode,
04537   operand1,
04538   operand2));
04539 }
04540 
04541 /* ../../gcc/gcc/config/i386/i386.md:19827 */
04542 rtx
04543 gen_uminv8qi3 (operand0, operand1, operand2)
04544      rtx operand0;
04545      rtx operand1;
04546      rtx operand2;
04547 {
04548   return gen_rtx_SET (VOIDmode,
04549   operand0,
04550   gen_rtx_UMIN (V8QImode,
04551   operand1,
04552   operand2));
04553 }
04554 
04555 /* ../../gcc/gcc/config/i386/i386.md:19836 */
04556 rtx
04557 gen_sminv4hi3 (operand0, operand1, operand2)
04558      rtx operand0;
04559      rtx operand1;
04560      rtx operand2;
04561 {
04562   return gen_rtx_SET (VOIDmode,
04563   operand0,
04564   gen_rtx_SMIN (V4HImode,
04565   operand1,
04566   operand2));
04567 }
04568 
04569 /* ../../gcc/gcc/config/i386/i386.md:19848 */
04570 rtx
04571 gen_ashrv4hi3 (operand0, operand1, operand2)
04572      rtx operand0;
04573      rtx operand1;
04574      rtx operand2;
04575 {
04576   return gen_rtx_SET (VOIDmode,
04577   operand0,
04578   gen_rtx_ASHIFTRT (V4HImode,
04579   operand1,
04580   operand2));
04581 }
04582 
04583 /* ../../gcc/gcc/config/i386/i386.md:19857 */
04584 rtx
04585 gen_ashrv2si3 (operand0, operand1, operand2)
04586      rtx operand0;
04587      rtx operand1;
04588      rtx operand2;
04589 {
04590   return gen_rtx_SET (VOIDmode,
04591   operand0,
04592   gen_rtx_ASHIFTRT (V2SImode,
04593   operand1,
04594   operand2));
04595 }
04596 
04597 /* ../../gcc/gcc/config/i386/i386.md:19866 */
04598 rtx
04599 gen_lshrv4hi3 (operand0, operand1, operand2)
04600      rtx operand0;
04601      rtx operand1;
04602      rtx operand2;
04603 {
04604   return gen_rtx_SET (VOIDmode,
04605   operand0,
04606   gen_rtx_LSHIFTRT (V4HImode,
04607   operand1,
04608   operand2));
04609 }
04610 
04611 /* ../../gcc/gcc/config/i386/i386.md:19875 */
04612 rtx
04613 gen_lshrv2si3 (operand0, operand1, operand2)
04614      rtx operand0;
04615      rtx operand1;
04616      rtx operand2;
04617 {
04618   return gen_rtx_SET (VOIDmode,
04619   operand0,
04620   gen_rtx_LSHIFTRT (V2SImode,
04621   operand1,
04622   operand2));
04623 }
04624 
04625 /* ../../gcc/gcc/config/i386/i386.md:19885 */
04626 rtx
04627 gen_mmx_lshrdi3 (operand0, operand1, operand2)
04628      rtx operand0;
04629      rtx operand1;
04630      rtx operand2;
04631 {
04632   return gen_rtx_SET (VOIDmode,
04633   operand0,
04634   gen_rtx_UNSPEC (DImode,
04635   gen_rtvec (1,
04636     gen_rtx_LSHIFTRT (DImode,
04637   operand1,
04638   operand2)),
04639   45));
04640 }
04641 
04642 /* ../../gcc/gcc/config/i386/i386.md:19896 */
04643 rtx
04644 gen_ashlv4hi3 (operand0, operand1, operand2)
04645      rtx operand0;
04646      rtx operand1;
04647      rtx operand2;
04648 {
04649   return gen_rtx_SET (VOIDmode,
04650   operand0,
04651   gen_rtx_ASHIFT (V4HImode,
04652   operand1,
04653   operand2));
04654 }
04655 
04656 /* ../../gcc/gcc/config/i386/i386.md:19905 */
04657 rtx
04658 gen_ashlv2si3 (operand0, operand1, operand2)
04659      rtx operand0;
04660      rtx operand1;
04661      rtx operand2;
04662 {
04663   return gen_rtx_SET (VOIDmode,
04664   operand0,
04665   gen_rtx_ASHIFT (V2SImode,
04666   operand1,
04667   operand2));
04668 }
04669 
04670 /* ../../gcc/gcc/config/i386/i386.md:19915 */
04671 rtx
04672 gen_mmx_ashldi3 (operand0, operand1, operand2)
04673      rtx operand0;
04674      rtx operand1;
04675      rtx operand2;
04676 {
04677   return gen_rtx_SET (VOIDmode,
04678   operand0,
04679   gen_rtx_UNSPEC (DImode,
04680   gen_rtvec (1,
04681     gen_rtx_ASHIFT (DImode,
04682   operand1,
04683   operand2)),
04684   45));
04685 }
04686 
04687 /* ../../gcc/gcc/config/i386/i386.md:19929 */
04688 rtx
04689 gen_mmx_packsswb (operand0, operand1, operand2)
04690      rtx operand0;
04691      rtx operand1;
04692      rtx operand2;
04693 {
04694   return gen_rtx_SET (VOIDmode,
04695   operand0,
04696   gen_rtx_VEC_CONCAT (V8QImode,
04697   gen_rtx_SS_TRUNCATE (V4QImode,
04698   operand1),
04699   gen_rtx_SS_TRUNCATE (V4QImode,
04700   operand2)));
04701 }
04702 
04703 /* ../../gcc/gcc/config/i386/i386.md:19939 */
04704 rtx
04705 gen_mmx_packssdw (operand0, operand1, operand2)
04706      rtx operand0;
04707      rtx operand1;
04708      rtx operand2;
04709 {
04710   return gen_rtx_SET (VOIDmode,
04711   operand0,
04712   gen_rtx_VEC_CONCAT (V4HImode,
04713   gen_rtx_SS_TRUNCATE (V2HImode,
04714   operand1),
04715   gen_rtx_SS_TRUNCATE (V2HImode,
04716   operand2)));
04717 }
04718 
04719 /* ../../gcc/gcc/config/i386/i386.md:19949 */
04720 rtx
04721 gen_mmx_packuswb (operand0, operand1, operand2)
04722      rtx operand0;
04723      rtx operand1;
04724      rtx operand2;
04725 {
04726   return gen_rtx_SET (VOIDmode,
04727   operand0,
04728   gen_rtx_VEC_CONCAT (V8QImode,
04729   gen_rtx_US_TRUNCATE (V4QImode,
04730   operand1),
04731   gen_rtx_US_TRUNCATE (V4QImode,
04732   operand2)));
04733 }
04734 
04735 /* ../../gcc/gcc/config/i386/i386.md:19959 */
04736 rtx
04737 gen_mmx_punpckhbw (operand0, operand1, operand2)
04738      rtx operand0;
04739      rtx operand1;
04740      rtx operand2;
04741 {
04742   return gen_rtx_SET (VOIDmode,
04743   operand0,
04744   gen_rtx_VEC_MERGE (V8QImode,
04745   gen_rtx_VEC_SELECT (V8QImode,
04746   operand1,
04747   gen_rtx_PARALLEL (VOIDmode,
04748   gen_rtvec (8,
04749     GEN_INT (4LL),
04750     const0_rtx,
04751     GEN_INT (5LL),
04752     const1_rtx,
04753     GEN_INT (6LL),
04754     GEN_INT (2LL),
04755     GEN_INT (7LL),
04756     GEN_INT (3LL)))),
04757   gen_rtx_VEC_SELECT (V8QImode,
04758   operand2,
04759   gen_rtx_PARALLEL (VOIDmode,
04760   gen_rtvec (8,
04761     const0_rtx,
04762     GEN_INT (4LL),
04763     const1_rtx,
04764     GEN_INT (5LL),
04765     GEN_INT (2LL),
04766     GEN_INT (6LL),
04767     GEN_INT (3LL),
04768     GEN_INT (7LL)))),
04769   GEN_INT (85LL)));
04770 }
04771 
04772 /* ../../gcc/gcc/config/i386/i386.md:19986 */
04773 rtx
04774 gen_mmx_punpckhwd (operand0, operand1, operand2)
04775      rtx operand0;
04776      rtx operand1;
04777      rtx operand2;
04778 {
04779   return gen_rtx_SET (VOIDmode,
04780   operand0,
04781   gen_rtx_VEC_MERGE (V4HImode,
04782   gen_rtx_VEC_SELECT (V4HImode,
04783   operand1,
04784   gen_rtx_PARALLEL (VOIDmode,
04785   gen_rtvec (4,
04786     const0_rtx,
04787     GEN_INT (2LL),
04788     const1_rtx,
04789     GEN_INT (3LL)))),
04790   gen_rtx_VEC_SELECT (V4HImode,
04791   operand2,
04792   gen_rtx_PARALLEL (VOIDmode,
04793   gen_rtvec (4,
04794     GEN_INT (2LL),
04795     const0_rtx,
04796     GEN_INT (3LL),
04797     const1_rtx))),
04798   GEN_INT (5LL)));
04799 }
04800 
04801 /* ../../gcc/gcc/config/i386/i386.md:20005 */
04802 rtx
04803 gen_mmx_punpckhdq (operand0, operand1, operand2)
04804      rtx operand0;
04805      rtx operand1;
04806      rtx operand2;
04807 {
04808   return gen_rtx_SET (VOIDmode,
04809   operand0,
04810   gen_rtx_VEC_MERGE (V2SImode,
04811   operand1,
04812   gen_rtx_VEC_SELECT (V2SImode,
04813   operand2,
04814   gen_rtx_PARALLEL (VOIDmode,
04815   gen_rtvec (2,
04816     const1_rtx,
04817     const0_rtx))),
04818   const1_rtx));
04819 }
04820 
04821 /* ../../gcc/gcc/config/i386/i386.md:20018 */
04822 rtx
04823 gen_mmx_punpcklbw (operand0, operand1, operand2)
04824      rtx operand0;
04825      rtx operand1;
04826      rtx operand2;
04827 {
04828   return gen_rtx_SET (VOIDmode,
04829   operand0,
04830   gen_rtx_VEC_MERGE (V8QImode,
04831   gen_rtx_VEC_SELECT (V8QImode,
04832   operand1,
04833   gen_rtx_PARALLEL (VOIDmode,
04834   gen_rtvec (8,
04835     const0_rtx,
04836     GEN_INT (4LL),
04837     const1_rtx,
04838     GEN_INT (5LL),
04839     GEN_INT (2LL),
04840     GEN_INT (6LL),
04841     GEN_INT (3LL),
04842     GEN_INT (7LL)))),
04843   gen_rtx_VEC_SELECT (V8QImode,
04844   operand2,
04845   gen_rtx_PARALLEL (VOIDmode,
04846   gen_rtvec (8,
04847     GEN_INT (4LL),
04848     const0_rtx,
04849     GEN_INT (5LL),
04850     const1_rtx,
04851     GEN_INT (6LL),
04852     GEN_INT (2LL),
04853     GEN_INT (7LL),
04854     GEN_INT (3LL)))),
04855   GEN_INT (85LL)));
04856 }
04857 
04858 /* ../../gcc/gcc/config/i386/i386.md:20045 */
04859 rtx
04860 gen_mmx_punpcklwd (operand0, operand1, operand2)
04861      rtx operand0;
04862      rtx operand1;
04863      rtx operand2;
04864 {
04865   return gen_rtx_SET (VOIDmode,
04866   operand0,
04867   gen_rtx_VEC_MERGE (V4HImode,
04868   gen_rtx_VEC_SELECT (V4HImode,
04869   operand1,
04870   gen_rtx_PARALLEL (VOIDmode,
04871   gen_rtvec (4,
04872     GEN_INT (2LL),
04873     const0_rtx,
04874     GEN_INT (3LL),
04875     const1_rtx))),
04876   gen_rtx_VEC_SELECT (V4HImode,
04877   operand2,
04878   gen_rtx_PARALLEL (VOIDmode,
04879   gen_rtvec (4,
04880     const0_rtx,
04881     GEN_INT (2LL),
04882     const1_rtx,
04883     GEN_INT (3LL)))),
04884   GEN_INT (5LL)));
04885 }
04886 
04887 /* ../../gcc/gcc/config/i386/i386.md:20064 */
04888 rtx
04889 gen_mmx_punpckldq (operand0, operand1, operand2)
04890      rtx operand0;
04891      rtx operand1;
04892      rtx operand2;
04893 {
04894   return gen_rtx_SET (VOIDmode,
04895   operand0,
04896   gen_rtx_VEC_MERGE (V2SImode,
04897   gen_rtx_VEC_SELECT (V2SImode,
04898   operand1,
04899   gen_rtx_PARALLEL (VOIDmode,
04900   gen_rtvec (2,
04901     const1_rtx,
04902     const0_rtx))),
04903   operand2,
04904   const1_rtx));
04905 }
04906 
04907 /* ../../gcc/gcc/config/i386/i386.md:20080 */
04908 rtx
04909 gen_emms ()
04910 {
04911   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (17,
04912     gen_rtx_UNSPEC_VOLATILE (VOIDmode,
04913   gen_rtvec (1,
04914     const0_rtx),
04915   31),
04916     gen_rtx_CLOBBER (VOIDmode,
04917   gen_rtx_REG (XFmode,
04918   8)),
04919     gen_rtx_CLOBBER (VOIDmode,
04920   gen_rtx_REG (XFmode,
04921   9)),
04922     gen_rtx_CLOBBER (VOIDmode,
04923   gen_rtx_REG (XFmode,
04924   10)),
04925     gen_rtx_CLOBBER (VOIDmode,
04926   gen_rtx_REG (XFmode,
04927   11)),
04928     gen_rtx_CLOBBER (VOIDmode,
04929   gen_rtx_REG (XFmode,
04930   12)),
04931     gen_rtx_CLOBBER (VOIDmode,
04932   gen_rtx_REG (XFmode,
04933   13)),
04934     gen_rtx_CLOBBER (VOIDmode,
04935   gen_rtx_REG (XFmode,
04936   14)),
04937     gen_rtx_CLOBBER (VOIDmode,
04938   gen_rtx_REG (XFmode,
04939   15)),
04940     gen_rtx_CLOBBER (VOIDmode,
04941   gen_rtx_REG (DImode,
04942   29)),
04943     gen_rtx_CLOBBER (VOIDmode,
04944   gen_rtx_REG (DImode,
04945   30)),
04946     gen_rtx_CLOBBER (VOIDmode,
04947   gen_rtx_REG (DImode,
04948   31)),
04949     gen_rtx_CLOBBER (VOIDmode,
04950   gen_rtx_REG (DImode,
04951   32)),
04952     gen_rtx_CLOBBER (VOIDmode,
04953   gen_rtx_REG (DImode,
04954   33)),
04955     gen_rtx_CLOBBER (VOIDmode,
04956   gen_rtx_REG (DImode,
04957   34)),
04958     gen_rtx_CLOBBER (VOIDmode,
04959   gen_rtx_REG (DImode,
04960   35)),
04961     gen_rtx_CLOBBER (VOIDmode,
04962   gen_rtx_REG (DImode,
04963   36))));
04964 }
04965 
04966 /* ../../gcc/gcc/config/i386/i386.md:20103 */
04967 rtx
04968 gen_ldmxcsr (operand0)
04969      rtx operand0;
04970 {
04971   return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
04972   gen_rtvec (1,
04973     operand0),
04974   37);
04975 }
04976 
04977 /* ../../gcc/gcc/config/i386/i386.md:20111 */
04978 rtx
04979 gen_stmxcsr (operand0)
04980      rtx operand0;
04981 {
04982   return gen_rtx_SET (VOIDmode,
04983   operand0,
04984   gen_rtx_UNSPEC_VOLATILE (SImode,
04985   gen_rtvec (1,
04986     const0_rtx),
04987   40));
04988 }
04989 
04990 /* ../../gcc/gcc/config/i386/i386.md:20199 */
04991 rtx
04992 gen_addv2sf3 (operand0, operand1, operand2)
04993      rtx operand0;
04994      rtx operand1;
04995      rtx operand2;
04996 {
04997   return gen_rtx_SET (VOIDmode,
04998   operand0,
04999   gen_rtx_PLUS (V2SFmode,
05000   operand1,
05001   operand2));
05002 }
05003 
05004 /* ../../gcc/gcc/config/i386/i386.md:20208 */
05005 rtx
05006 gen_subv2sf3 (operand0, operand1, operand2)
05007      rtx operand0;
05008      rtx operand1;
05009      rtx operand2;
05010 {
05011   return gen_rtx_SET (VOIDmode,
05012   operand0,
05013   gen_rtx_MINUS (V2SFmode,
05014   operand1,
05015   operand2));
05016 }
05017 
05018 /* ../../gcc/gcc/config/i386/i386.md:20217 */
05019 rtx
05020 gen_subrv2sf3 (operand0, operand1, operand2)
05021      rtx operand0;
05022      rtx operand1;
05023      rtx operand2;
05024 {
05025   return gen_rtx_SET (VOIDmode,
05026   operand0,
05027   gen_rtx_MINUS (V2SFmode,
05028   operand2,
05029   operand1));
05030 }
05031 
05032 /* ../../gcc/gcc/config/i386/i386.md:20226 */
05033 rtx
05034 gen_gtv2sf3 (operand0, operand1, operand2)
05035      rtx operand0;
05036      rtx operand1;
05037      rtx operand2;
05038 {
05039   return gen_rtx_SET (VOIDmode,
05040   operand0,
05041   gen_rtx_GT (V2SImode,
05042   operand1,
05043   operand2));
05044 }
05045 
05046 /* ../../gcc/gcc/config/i386/i386.md:20235 */
05047 rtx
05048 gen_gev2sf3 (operand0, operand1, operand2)
05049      rtx operand0;
05050      rtx operand1;
05051      rtx operand2;
05052 {
05053   return gen_rtx_SET (VOIDmode,
05054   operand0,
05055   gen_rtx_GE (V2SImode,
05056   operand1,
05057   operand2));
05058 }
05059 
05060 /* ../../gcc/gcc/config/i386/i386.md:20244 */
05061 rtx
05062 gen_eqv2sf3 (operand0, operand1, operand2)
05063      rtx operand0;
05064      rtx operand1;
05065      rtx operand2;
05066 {
05067   return gen_rtx_SET (VOIDmode,
05068   operand0,
05069   gen_rtx_EQ (V2SImode,
05070   operand1,
05071   operand2));
05072 }
05073 
05074 /* ../../gcc/gcc/config/i386/i386.md:20253 */
05075 rtx
05076 gen_pfmaxv2sf3 (operand0, operand1, operand2)
05077      rtx operand0;
05078      rtx operand1;
05079      rtx operand2;
05080 {
05081   return gen_rtx_SET (VOIDmode,
05082   operand0,
05083   gen_rtx_SMAX (V2SFmode,
05084   operand1,
05085   operand2));
05086 }
05087 
05088 /* ../../gcc/gcc/config/i386/i386.md:20262 */
05089 rtx
05090 gen_pfminv2sf3 (operand0, operand1, operand2)
05091      rtx operand0;
05092      rtx operand1;
05093      rtx operand2;
05094 {
05095   return gen_rtx_SET (VOIDmode,
05096   operand0,
05097   gen_rtx_SMIN (V2SFmode,
05098   operand1,
05099   operand2));
05100 }
05101 
05102 /* ../../gcc/gcc/config/i386/i386.md:20271 */
05103 rtx
05104 gen_mulv2sf3 (operand0, operand1, operand2)
05105      rtx operand0;
05106      rtx operand1;
05107      rtx operand2;
05108 {
05109   return gen_rtx_SET (VOIDmode,
05110   operand0,
05111   gen_rtx_MULT (V2SFmode,
05112   operand1,
05113   operand2));
05114 }
05115 
05116 /* ../../gcc/gcc/config/i386/i386.md:20280 */
05117 rtx
05118 gen_femms ()
05119 {
05120   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (17,
05121     gen_rtx_UNSPEC_VOLATILE (VOIDmode,
05122   gen_rtvec (1,
05123     const0_rtx),
05124   46),
05125     gen_rtx_CLOBBER (VOIDmode,
05126   gen_rtx_REG (XFmode,
05127   8)),
05128     gen_rtx_CLOBBER (VOIDmode,
05129   gen_rtx_REG (XFmode,
05130   9)),
05131     gen_rtx_CLOBBER (VOIDmode,
05132   gen_rtx_REG (XFmode,
05133   10)),
05134     gen_rtx_CLOBBER (VOIDmode,
05135   gen_rtx_REG (XFmode,
05136   11)),
05137     gen_rtx_CLOBBER (VOIDmode,
05138   gen_rtx_REG (XFmode,
05139   12)),
05140     gen_rtx_CLOBBER (VOIDmode,
05141   gen_rtx_REG (XFmode,
05142   13)),
05143     gen_rtx_CLOBBER (VOIDmode,
05144   gen_rtx_REG (XFmode,
05145   14)),
05146     gen_rtx_CLOBBER (VOIDmode,
05147   gen_rtx_REG (XFmode,
05148   15)),
05149     gen_rtx_CLOBBER (VOIDmode,
05150   gen_rtx_REG (DImode,
05151   29)),
05152     gen_rtx_CLOBBER (VOIDmode,
05153   gen_rtx_REG (DImode,
05154   30)),
05155     gen_rtx_CLOBBER (VOIDmode,
05156   gen_rtx_REG (DImode,
05157   31)),
05158     gen_rtx_CLOBBER (VOIDmode,
05159   gen_rtx_REG (DImode,
05160   32)),
05161     gen_rtx_CLOBBER (VOIDmode,
05162   gen_rtx_REG (DImode,
05163   33)),
05164     gen_rtx_CLOBBER (VOIDmode,
05165   gen_rtx_REG (DImode,
05166   34)),
05167     gen_rtx_CLOBBER (VOIDmode,
05168   gen_rtx_REG (DImode,
05169   35)),
05170     gen_rtx_CLOBBER (VOIDmode,
05171   gen_rtx_REG (DImode,
05172   36))));
05173 }
05174 
05175 /* ../../gcc/gcc/config/i386/i386.md:20303 */
05176 rtx
05177 gen_pf2id (operand0, operand1)
05178      rtx operand0;
05179      rtx operand1;
05180 {
05181   return gen_rtx_SET (VOIDmode,
05182   operand0,
05183   gen_rtx_FIX (V2SImode,
05184   operand1));
05185 }
05186 
05187 /* ../../gcc/gcc/config/i386/i386.md:20311 */
05188 rtx
05189 gen_pf2iw (operand0, operand1)
05190      rtx operand0;
05191      rtx operand1;
05192 {
05193   return gen_rtx_SET (VOIDmode,
05194   operand0,
05195   gen_rtx_SIGN_EXTEND (V2SImode,
05196   gen_rtx_SS_TRUNCATE (V2HImode,
05197   gen_rtx_FIX (V2SImode,
05198   operand1))));
05199 }
05200 
05201 /* ../../gcc/gcc/config/i386/i386.md:20321 */
05202 rtx
05203 gen_pfacc (operand0, operand1, operand2)
05204      rtx operand0;
05205      rtx operand1;
05206      rtx operand2;
05207 {
05208   return gen_rtx_SET (VOIDmode,
05209   operand0,
05210   gen_rtx_VEC_CONCAT (V2SFmode,
05211   gen_rtx_PLUS (SFmode,
05212   gen_rtx_VEC_SELECT (SFmode,
05213   operand1,
05214   gen_rtx_PARALLEL (VOIDmode,
05215   gen_rtvec (1,
05216     const0_rtx))),
05217   gen_rtx_VEC_SELECT (SFmode,
05218   operand1,
05219   gen_rtx_PARALLEL (VOIDmode,
05220   gen_rtvec (1,
05221     const1_rtx)))),
05222   gen_rtx_PLUS (SFmode,
05223   gen_rtx_VEC_SELECT (SFmode,
05224   operand2,
05225   gen_rtx_PARALLEL (VOIDmode,
05226   gen_rtvec (1,
05227     const0_rtx))),
05228   gen_rtx_VEC_SELECT (SFmode,
05229   operand2,
05230   gen_rtx_PARALLEL (VOIDmode,
05231   gen_rtvec (1,
05232     const1_rtx))))));
05233 }
05234 
05235 /* ../../gcc/gcc/config/i386/i386.md:20339 */
05236 rtx
05237 gen_pfnacc (operand0, operand1, operand2)
05238      rtx operand0;
05239      rtx operand1;
05240      rtx operand2;
05241 {
05242   return gen_rtx_SET (VOIDmode,
05243   operand0,
05244   gen_rtx_VEC_CONCAT (V2SFmode,
05245   gen_rtx_MINUS (SFmode,
05246   gen_rtx_VEC_SELECT (SFmode,
05247   operand1,
05248   gen_rtx_PARALLEL (VOIDmode,
05249   gen_rtvec (1,
05250     const0_rtx))),
05251   gen_rtx_VEC_SELECT (SFmode,
05252   operand1,
05253   gen_rtx_PARALLEL (VOIDmode,
05254   gen_rtvec (1,
05255     const1_rtx)))),
05256   gen_rtx_MINUS (SFmode,
05257   gen_rtx_VEC_SELECT (SFmode,
05258   operand2,
05259   gen_rtx_PARALLEL (VOIDmode,
05260   gen_rtvec (1,
05261     const0_rtx))),
05262   gen_rtx_VEC_SELECT (SFmode,
05263   operand2,
05264   gen_rtx_PARALLEL (VOIDmode,
05265   gen_rtvec (1,
05266     const1_rtx))))));
05267 }
05268 
05269 /* ../../gcc/gcc/config/i386/i386.md:20357 */
05270 rtx
05271 gen_pfpnacc (operand0, operand1, operand2)
05272      rtx operand0;
05273      rtx operand1;
05274      rtx operand2;
05275 {
05276   return gen_rtx_SET (VOIDmode,
05277   operand0,
05278   gen_rtx_VEC_CONCAT (V2SFmode,
05279   gen_rtx_MINUS (SFmode,
05280   gen_rtx_VEC_SELECT (SFmode,
05281   operand1,
05282   gen_rtx_PARALLEL (VOIDmode,
05283   gen_rtvec (1,
05284     const0_rtx))),
05285   gen_rtx_VEC_SELECT (SFmode,
05286   operand1,
05287   gen_rtx_PARALLEL (VOIDmode,
05288   gen_rtvec (1,
05289     const1_rtx)))),
05290   gen_rtx_PLUS (SFmode,
05291   gen_rtx_VEC_SELECT (SFmode,
05292   operand2,
05293   gen_rtx_PARALLEL (VOIDmode,
05294   gen_rtvec (1,
05295     const0_rtx))),
05296   gen_rtx_VEC_SELECT (SFmode,
05297   operand2,
05298   gen_rtx_PARALLEL (VOIDmode,
05299   gen_rtvec (1,
05300     const1_rtx))))));
05301 }
05302 
05303 /* ../../gcc/gcc/config/i386/i386.md:20375 */
05304 rtx
05305 gen_pi2fw (operand0, operand1)
05306      rtx operand0;
05307      rtx operand1;
05308 {
05309   return gen_rtx_SET (VOIDmode,
05310   operand0,
05311   gen_rtx_FLOAT (V2SFmode,
05312   gen_rtx_VEC_CONCAT (V2SImode,
05313   gen_rtx_SIGN_EXTEND (SImode,
05314   gen_rtx_TRUNCATE (HImode,
05315   gen_rtx_VEC_SELECT (SImode,
05316   operand1,
05317   gen_rtx_PARALLEL (VOIDmode,
05318   gen_rtvec (1,
05319     const0_rtx))))),
05320   gen_rtx_SIGN_EXTEND (SImode,
05321   gen_rtx_TRUNCATE (HImode,
05322   gen_rtx_VEC_SELECT (SImode,
05323   operand1,
05324   gen_rtx_PARALLEL (VOIDmode,
05325   gen_rtvec (1,
05326     const1_rtx))))))));
05327 }
05328 
05329 /* ../../gcc/gcc/config/i386/i386.md:20392 */
05330 rtx
05331 gen_floatv2si2 (operand0, operand1)
05332      rtx operand0;
05333      rtx operand1;
05334 {
05335   return gen_rtx_SET (VOIDmode,
05336   operand0,
05337   gen_rtx_FLOAT (V2SFmode,
05338   operand1));
05339 }
05340 
05341 /* ../../gcc/gcc/config/i386/i386.md:20403 */
05342 rtx
05343 gen_pavgusb (operand0, operand1, operand2)
05344      rtx operand0;
05345      rtx operand1;
05346      rtx operand2;
05347 {
05348   return gen_rtx_SET (VOIDmode,
05349   operand0,
05350   gen_rtx_UNSPEC (V8QImode,
05351   gen_rtvec (2,
05352     operand1,
05353     operand2),
05354   49));
05355 }
05356 
05357 /* ../../gcc/gcc/config/i386/i386.md:20416 */
05358 rtx
05359 gen_pfrcpv2sf2 (operand0, operand1)
05360      rtx operand0;
05361      rtx operand1;
05362 {
05363   return gen_rtx_SET (VOIDmode,
05364   operand0,
05365   gen_rtx_UNSPEC (V2SFmode,
05366   gen_rtvec (1,
05367     operand1),
05368   50));
05369 }
05370 
05371 /* ../../gcc/gcc/config/i386/i386.md:20425 */
05372 rtx
05373 gen_pfrcpit1v2sf3 (operand0, operand1, operand2)
05374      rtx operand0;
05375      rtx operand1;
05376      rtx operand2;
05377 {
05378   return gen_rtx_SET (VOIDmode,
05379   operand0,
05380   gen_rtx_UNSPEC (V2SFmode,
05381   gen_rtvec (2,
05382     operand1,
05383     operand2),
05384   51));
05385 }
05386 
05387 /* ../../gcc/gcc/config/i386/i386.md:20435 */
05388 rtx
05389 gen_pfrcpit2v2sf3 (operand0, operand1, operand2)
05390      rtx operand0;
05391      rtx operand1;
05392      rtx operand2;
05393 {
05394   return gen_rtx_SET (VOIDmode,
05395   operand0,
05396   gen_rtx_UNSPEC (V2SFmode,
05397   gen_rtvec (2,
05398     operand1,
05399     operand2),
05400   52));
05401 }
05402 
05403 /* ../../gcc/gcc/config/i386/i386.md:20445 */
05404 rtx
05405 gen_pfrsqrtv2sf2 (operand0, operand1)
05406      rtx operand0;
05407      rtx operand1;
05408 {
05409   return gen_rtx_SET (VOIDmode,
05410   operand0,
05411   gen_rtx_UNSPEC (V2SFmode,
05412   gen_rtvec (1,
05413     operand1),
05414   53));
05415 }
05416 
05417 /* ../../gcc/gcc/config/i386/i386.md:20454 */
05418 rtx
05419 gen_pfrsqit1v2sf3 (operand0, operand1, operand2)
05420      rtx operand0;
05421      rtx operand1;
05422      rtx operand2;
05423 {
05424   return gen_rtx_SET (VOIDmode,
05425   operand0,
05426   gen_rtx_UNSPEC (V2SFmode,
05427   gen_rtvec (2,
05428     operand1,
05429     operand2),
05430   54));
05431 }
05432 
05433 /* ../../gcc/gcc/config/i386/i386.md:20464 */
05434 rtx
05435 gen_pmulhrwv4hi3 (operand0, operand1, operand2)
05436      rtx operand0;
05437      rtx operand1;
05438      rtx operand2;
05439 {
05440   return gen_rtx_SET (VOIDmode,
05441   operand0,
05442   gen_rtx_TRUNCATE (V4HImode,
05443   gen_rtx_LSHIFTRT (V4SImode,
05444   gen_rtx_PLUS (V4SImode,
05445   gen_rtx_MULT (V4SImode,
05446   gen_rtx_SIGN_EXTEND (V4SImode,
05447   operand1),
05448   gen_rtx_SIGN_EXTEND (V4SImode,
05449   operand2)),
05450   gen_rtx_CONST_VECTOR (V4SImode,
05451   gen_rtvec (4,
05452     GEN_INT (32768LL),
05453     GEN_INT (32768LL),
05454     GEN_INT (32768LL),
05455     GEN_INT (32768LL)))),
05456   GEN_INT (16LL))));
05457 }
05458 
05459 /* ../../gcc/gcc/config/i386/i386.md:20484 */
05460 rtx
05461 gen_pswapdv2si2 (operand0, operand1)
05462      rtx operand0;
05463      rtx operand1;
05464 {
05465   return gen_rtx_SET (VOIDmode,
05466   operand0,
05467   gen_rtx_VEC_SELECT (V2SImode,
05468   operand1,
05469   gen_rtx_PARALLEL (VOIDmode,
05470   gen_rtvec (2,
05471     const1_rtx,
05472     const0_rtx))));
05473 }
05474 
05475 /* ../../gcc/gcc/config/i386/i386.md:20493 */
05476 rtx
05477 gen_pswapdv2sf2 (operand0, operand1)
05478      rtx operand0;
05479      rtx operand1;
05480 {
05481   return gen_rtx_SET (VOIDmode,
05482   operand0,
05483   gen_rtx_VEC_SELECT (V2SFmode,
05484   operand1,
05485   gen_rtx_PARALLEL (VOIDmode,
05486   gen_rtvec (2,
05487     const1_rtx,
05488     const0_rtx))));
05489 }
05490 
05491 /* ../../gcc/gcc/config/i386/i386.md:20596 */
05492 rtx
05493 gen_addv2df3 (operand0, operand1, operand2)
05494      rtx operand0;
05495      rtx operand1;
05496      rtx operand2;
05497 {
05498   return gen_rtx_SET (VOIDmode,
05499   operand0,
05500   gen_rtx_PLUS (V2DFmode,
05501   operand1,
05502   operand2));
05503 }
05504 
05505 /* ../../gcc/gcc/config/i386/i386.md:20605 */
05506 rtx
05507 gen_vmaddv2df3 (operand0, operand1, operand2)
05508      rtx operand0;
05509      rtx operand1;
05510      rtx operand2;
05511 {
05512   return gen_rtx_SET (VOIDmode,
05513   operand0,
05514   gen_rtx_VEC_MERGE (V2DFmode,
05515   gen_rtx_PLUS (V2DFmode,
05516   operand1,
05517   operand2),
05518   operand1,
05519   const1_rtx));
05520 }
05521 
05522 /* ../../gcc/gcc/config/i386/i386.md:20616 */
05523 rtx
05524 gen_subv2df3 (operand0, operand1, operand2)
05525      rtx operand0;
05526      rtx operand1;
05527      rtx operand2;
05528 {
05529   return gen_rtx_SET (VOIDmode,
05530   operand0,
05531   gen_rtx_MINUS (V2DFmode,
05532   operand1,
05533   operand2));
05534 }
05535 
05536 /* ../../gcc/gcc/config/i386/i386.md:20625 */
05537 rtx
05538 gen_vmsubv2df3 (operand0, operand1, operand2)
05539      rtx operand0;
05540      rtx operand1;
05541      rtx operand2;
05542 {
05543   return gen_rtx_SET (VOIDmode,
05544   operand0,
05545   gen_rtx_VEC_MERGE (V2DFmode,
05546   gen_rtx_MINUS (V2DFmode,
05547   operand1,
05548   operand2),
05549   operand1,
05550   const1_rtx));
05551 }
05552 
05553 /* ../../gcc/gcc/config/i386/i386.md:20636 */
05554 rtx
05555 gen_mulv2df3 (operand0, operand1, operand2)
05556      rtx operand0;
05557      rtx operand1;
05558      rtx operand2;
05559 {
05560   return gen_rtx_SET (VOIDmode,
05561   operand0,
05562   gen_rtx_MULT (V2DFmode,
05563   operand1,
05564   operand2));
05565 }
05566 
05567 /* ../../gcc/gcc/config/i386/i386.md:20645 */
05568 rtx
05569 gen_vmmulv2df3 (operand0, operand1, operand2)
05570      rtx operand0;
05571      rtx operand1;
05572      rtx operand2;
05573 {
05574   return gen_rtx_SET (VOIDmode,
05575   operand0,
05576   gen_rtx_VEC_MERGE (V2DFmode,
05577   gen_rtx_MULT (V2DFmode,
05578   operand1,
05579   operand2),
05580   operand1,
05581   const1_rtx));
05582 }
05583 
05584 /* ../../gcc/gcc/config/i386/i386.md:20656 */
05585 rtx
05586 gen_divv2df3 (operand0, operand1, operand2)
05587      rtx operand0;
05588      rtx operand1;
05589      rtx operand2;
05590 {
05591   return gen_rtx_SET (VOIDmode,
05592   operand0,
05593   gen_rtx_DIV (V2DFmode,
05594   operand1,
05595   operand2));
05596 }
05597 
05598 /* ../../gcc/gcc/config/i386/i386.md:20665 */
05599 rtx
05600 gen_vmdivv2df3 (operand0, operand1, operand2)
05601      rtx operand0;
05602      rtx operand1;
05603      rtx operand2;
05604 {
05605   return gen_rtx_SET (VOIDmode,
05606   operand0,
05607   gen_rtx_VEC_MERGE (V2DFmode,
05608   gen_rtx_DIV (V2DFmode,
05609   operand1,
05610   operand2),
05611   operand1,
05612   const1_rtx));
05613 }
05614 
05615 /* ../../gcc/gcc/config/i386/i386.md:20678 */
05616 rtx
05617 gen_smaxv2df3 (operand0, operand1, operand2)
05618      rtx operand0;
05619      rtx operand1;
05620      rtx operand2;
05621 {
05622   return gen_rtx_SET (VOIDmode,
05623   operand0,
05624   gen_rtx_SMAX (V2DFmode,
05625   operand1,
05626   operand2));
05627 }
05628 
05629 /* ../../gcc/gcc/config/i386/i386.md:20687 */
05630 rtx
05631 gen_vmsmaxv2df3 (operand0, operand1, operand2)
05632      rtx operand0;
05633      rtx operand1;
05634      rtx operand2;
05635 {
05636   return gen_rtx_SET (VOIDmode,
05637   operand0,
05638   gen_rtx_VEC_MERGE (V2DFmode,
05639   gen_rtx_SMAX (V2DFmode,
05640   operand1,
05641   operand2),
05642   operand1,
05643   const1_rtx));
05644 }
05645 
05646 /* ../../gcc/gcc/config/i386/i386.md:20698 */
05647 rtx
05648 gen_sminv2df3 (operand0, operand1, operand2)
05649      rtx operand0;
05650      rtx operand1;
05651      rtx operand2;
05652 {
05653   return gen_rtx_SET (VOIDmode,
05654   operand0,
05655   gen_rtx_SMIN (V2DFmode,
05656   operand1,
05657   operand2));
05658 }
05659 
05660 /* ../../gcc/gcc/config/i386/i386.md:20707 */
05661 rtx
05662 gen_vmsminv2df3 (operand0, operand1, operand2)
05663      rtx operand0;
05664      rtx operand1;
05665      rtx operand2;
05666 {
05667   return gen_rtx_SET (VOIDmode,
05668   operand0,
05669   gen_rtx_VEC_MERGE (V2DFmode,
05670   gen_rtx_SMIN (V2DFmode,
05671   operand1,
05672   operand2),
05673   operand1,
05674   const1_rtx));
05675 }
05676 
05677 /* ../../gcc/gcc/config/i386/i386.md:20720 */
05678 rtx
05679 gen_sqrtv2df2 (operand0, operand1)
05680      rtx operand0;
05681      rtx operand1;
05682 {
05683   return gen_rtx_SET (VOIDmode,
05684   operand0,
05685   gen_rtx_SQRT (V2DFmode,
05686   operand1));
05687 }
05688 
05689 /* ../../gcc/gcc/config/i386/i386.md:20728 */
05690 rtx
05691 gen_vmsqrtv2df2 (operand0, operand1, operand2)
05692      rtx operand0;
05693      rtx operand1;
05694      rtx operand2;
05695 {
05696   return gen_rtx_SET (VOIDmode,
05697   operand0,
05698   gen_rtx_VEC_MERGE (V2DFmode,
05699   gen_rtx_SQRT (V2DFmode,
05700   operand1),
05701   operand2,
05702   const1_rtx));
05703 }
05704 
05705 /* ../../gcc/gcc/config/i386/i386.md:20740 */
05706 rtx
05707 gen_maskcmpv2df3 (operand0, operand1, operand2, operand3)
05708      rtx operand0;
05709      rtx operand1;
05710      rtx operand2;
05711      rtx operand3;
05712 {
05713   return gen_rtx_SET (VOIDmode,
05714   operand0,
05715   gen_rtx (GET_CODE (operand3), V2DImode,
05716     operand1,
05717     operand2));
05718 }
05719 
05720 /* ../../gcc/gcc/config/i386/i386.md:20750 */
05721 rtx
05722 gen_maskncmpv2df3 (operand0, operand1, operand2, operand3)
05723      rtx operand0;
05724      rtx operand1;
05725      rtx operand2;
05726      rtx operand3;
05727 {
05728   return gen_rtx_SET (VOIDmode,
05729   operand0,
05730   gen_rtx_NOT (V2DImode,
05731   gen_rtx (GET_CODE (operand3), V2DImode,
05732     operand1,
05733     operand2)));
05734 }
05735 
05736 /* ../../gcc/gcc/config/i386/i386.md:20766 */
05737 rtx
05738 gen_vmmaskcmpv2df3 (operand0, operand1, operand2, operand3)
05739      rtx operand0;
05740      rtx operand1;
05741      rtx operand2;
05742      rtx operand3;
05743 {
05744   return gen_rtx_SET (VOIDmode,
05745   operand0,
05746   gen_rtx_VEC_MERGE (V2DImode,
05747   gen_rtx (GET_CODE (operand3), V2DImode,
05748     operand1,
05749     operand2),
05750   gen_rtx_SUBREG (V2DImode,
05751   operand1,
05752   0),
05753   const1_rtx));
05754 }
05755 
05756 /* ../../gcc/gcc/config/i386/i386.md:20779 */
05757 rtx
05758 gen_vmmaskncmpv2df3 (operand0, operand1, operand2, operand3)
05759      rtx operand0;
05760      rtx operand1;
05761      rtx operand2;
05762      rtx operand3;
05763 {
05764   return gen_rtx_SET (VOIDmode,
05765   operand0,
05766   gen_rtx_VEC_MERGE (V2DImode,
05767   gen_rtx_NOT (V2DImode,
05768   gen_rtx (GET_CODE (operand3), V2DImode,
05769     operand1,
05770     operand2)),
05771   gen_rtx_SUBREG (V2DImode,
05772   operand1,
05773   0),
05774   const1_rtx));
05775 }
05776 
05777 /* ../../gcc/gcc/config/i386/i386.md:20798 */
05778 rtx
05779 gen_sse2_comi (operand0, operand1)
05780      rtx operand0;
05781      rtx operand1;
05782 {
05783   return gen_rtx_SET (VOIDmode,
05784   gen_rtx_REG (CCFPmode,
05785   17),
05786   gen_rtx_COMPARE (CCFPmode,
05787   gen_rtx_VEC_SELECT (DFmode,
05788   operand0,
05789   gen_rtx_PARALLEL (VOIDmode,
05790   gen_rtvec (1,
05791     const0_rtx))),
05792   gen_rtx_VEC_SELECT (DFmode,
05793   operand1,
05794   gen_rtx_PARALLEL (VOIDmode,
05795   gen_rtvec (1,
05796     const0_rtx)))));
05797 }
05798 
05799 /* ../../gcc/gcc/config/i386/i386.md:20811 */
05800 rtx
05801 gen_sse2_ucomi (operand0, operand1)
05802      rtx operand0;
05803      rtx operand1;
05804 {
05805   return gen_rtx_SET (VOIDmode,
05806   gen_rtx_REG (CCFPUmode,
05807   17),
05808   gen_rtx_COMPARE (CCFPUmode,
05809   gen_rtx_VEC_SELECT (DFmode,
05810   operand0,
05811   gen_rtx_PARALLEL (VOIDmode,
05812   gen_rtvec (1,
05813     const0_rtx))),
05814   gen_rtx_VEC_SELECT (DFmode,
05815   operand1,
05816   gen_rtx_PARALLEL (VOIDmode,
05817   gen_rtvec (1,
05818     const0_rtx)))));
05819 }
05820 
05821 /* ../../gcc/gcc/config/i386/i386.md:20826 */
05822 rtx
05823 gen_sse2_movmskpd (operand0, operand1)
05824      rtx operand0;
05825      rtx operand1;
05826 {
05827   return gen_rtx_SET (VOIDmode,
05828   operand0,
05829   gen_rtx_UNSPEC (SImode,
05830   gen_rtvec (1,
05831     operand1),
05832   33));
05833 }
05834 
05835 /* ../../gcc/gcc/config/i386/i386.md:20835 */
05836 rtx
05837 gen_sse2_pmovmskb (operand0, operand1)
05838      rtx operand0;
05839      rtx operand1;
05840 {
05841   return gen_rtx_SET (VOIDmode,
05842   operand0,
05843   gen_rtx_UNSPEC (SImode,
05844   gen_rtvec (1,
05845     operand1),
05846   33));
05847 }
05848 
05849 /* ../../gcc/gcc/config/i386/i386.md:20844 */
05850 rtx
05851 gen_sse2_maskmovdqu (operand0, operand1, operand2)
05852      rtx operand0;
05853      rtx operand1;
05854      rtx operand2;
05855 {
05856   return gen_rtx_SET (VOIDmode,
05857   gen_rtx_MEM (V16QImode,
05858   operand0),
05859   gen_rtx_UNSPEC (V16QImode,
05860   gen_rtvec (2,
05861     operand1,
05862     operand2),
05863   32));
05864 }
05865 
05866 /* ../../gcc/gcc/config/i386/i386.md:20855 */
05867 rtx
05868 gen_sse2_maskmovdqu_rex64 (operand0, operand1, operand2)
05869      rtx operand0;
05870      rtx operand1;
05871      rtx operand2;
05872 {
05873   return gen_rtx_SET (VOIDmode,
05874   gen_rtx_MEM (V16QImode,
05875   operand0),
05876   gen_rtx_UNSPEC (V16QImode,
05877   gen_rtvec (2,
05878     operand1,
05879     operand2),
05880   32));
05881 }
05882 
05883 /* ../../gcc/gcc/config/i386/i386.md:20866 */
05884 rtx
05885 gen_sse2_movntv2df (operand0, operand1)
05886      rtx operand0;
05887      rtx operand1;
05888 {
05889   return gen_rtx_SET (VOIDmode,
05890   operand0,
05891   gen_rtx_UNSPEC (V2DFmode,
05892   gen_rtvec (1,
05893     operand1),
05894   34));
05895 }
05896 
05897 /* ../../gcc/gcc/config/i386/i386.md:20875 */
05898 rtx
05899 gen_sse2_movntv2di (operand0, operand1)
05900      rtx operand0;
05901      rtx operand1;
05902 {
05903   return gen_rtx_SET (VOIDmode,
05904   operand0,
05905   gen_rtx_UNSPEC (V2DImode,
05906   gen_rtvec (1,
05907     operand1),
05908   34));
05909 }
05910 
05911 /* ../../gcc/gcc/config/i386/i386.md:20884 */
05912 rtx
05913 gen_sse2_movntsi (operand0, operand1)
05914      rtx operand0;
05915      rtx operand1;
05916 {
05917   return gen_rtx_SET (VOIDmode,
05918   operand0,
05919   gen_rtx_UNSPEC (SImode,
05920   gen_rtvec (1,
05921     operand1),
05922   34));
05923 }
05924 
05925 /* ../../gcc/gcc/config/i386/i386.md:20897 */
05926 rtx
05927 gen_cvtdq2ps (operand0, operand1)
05928      rtx operand0;
05929      rtx operand1;
05930 {
05931   return gen_rtx_SET (VOIDmode,
05932   operand0,
05933   gen_rtx_FLOAT (V4SFmode,
05934   operand1));
05935 }
05936 
05937 /* ../../gcc/gcc/config/i386/i386.md:20905 */
05938 rtx
05939 gen_cvtps2dq (operand0, operand1)
05940      rtx operand0;
05941      rtx operand1;
05942 {
05943   return gen_rtx_SET (VOIDmode,
05944   operand0,
05945   gen_rtx_FIX (V4SImode,
05946   operand1));
05947 }
05948 
05949 /* ../../gcc/gcc/config/i386/i386.md:20913 */
05950 rtx
05951 gen_cvttps2dq (operand0, operand1)
05952      rtx operand0;
05953      rtx operand1;
05954 {
05955   return gen_rtx_SET (VOIDmode,
05956   operand0,
05957   gen_rtx_UNSPEC (V4SImode,
05958   gen_rtvec (1,
05959     operand1),
05960   30));
05961 }
05962 
05963 /* ../../gcc/gcc/config/i386/i386.md:20924 */
05964 rtx
05965 gen_cvtdq2pd (operand0, operand1)
05966      rtx operand0;
05967      rtx operand1;
05968 {
05969   return gen_rtx_SET (VOIDmode,
05970   operand0,
05971   gen_rtx_FLOAT (V2DFmode,
05972   gen_rtx_VEC_SELECT (V2SImode,
05973   operand1,
05974   gen_rtx_PARALLEL (VOIDmode,
05975   gen_rtvec (2,
05976     const0_rtx,
05977     const1_rtx)))));
05978 }
05979 
05980 /* ../../gcc/gcc/config/i386/i386.md:20936 */
05981 rtx
05982 gen_cvtpd2dq (operand0, operand1)
05983      rtx operand0;
05984      rtx operand1;
05985 {
05986   return gen_rtx_SET (VOIDmode,
05987   operand0,
05988   gen_rtx_VEC_CONCAT (V4SImode,
05989   gen_rtx_FIX (V2SImode,
05990   operand1),
05991   gen_rtx_CONST_VECTOR (V2SImode,
05992   gen_rtvec (2,
05993     const0_rtx,
05994     const0_rtx))));
05995 }
05996 
05997 /* ../../gcc/gcc/config/i386/i386.md:20946 */
05998 rtx
05999 gen_cvttpd2dq (operand0, operand1)
06000      rtx operand0;
06001      rtx operand1;
06002 {
06003   return gen_rtx_SET (VOIDmode,
06004   operand0,
06005   gen_rtx_VEC_CONCAT (V4SImode,
06006   gen_rtx_UNSPEC (V2SImode,
06007   gen_rtvec (1,
06008     operand1),
06009   30),
06010   gen_rtx_CONST_VECTOR (V2SImode,
06011   gen_rtvec (2,
06012     const0_rtx,
06013     const0_rtx))));
06014 }
06015 
06016 /* ../../gcc/gcc/config/i386/i386.md:20957 */
06017 rtx
06018 gen_cvtpd2pi (operand0, operand1)
06019      rtx operand0;
06020      rtx operand1;
06021 {
06022   return gen_rtx_SET (VOIDmode,
06023   operand0,
06024   gen_rtx_FIX (V2SImode,
06025   operand1));
06026 }
06027 
06028 /* ../../gcc/gcc/config/i386/i386.md:20965 */
06029 rtx
06030 gen_cvttpd2pi (operand0, operand1)
06031      rtx operand0;
06032      rtx operand1;
06033 {
06034   return gen_rtx_SET (VOIDmode,
06035   operand0,
06036   gen_rtx_UNSPEC (V2SImode,
06037   gen_rtvec (1,
06038     operand1),
06039   30));
06040 }
06041 
06042 /* ../../gcc/gcc/config/i386/i386.md:20974 */
06043 rtx
06044 gen_cvtpi2pd (operand0, operand1)
06045      rtx operand0;
06046      rtx operand1;
06047 {
06048   return gen_rtx_SET (VOIDmode,
06049   operand0,
06050   gen_rtx_FLOAT (V2DFmode,
06051   operand1));
06052 }
06053 
06054 /* ../../gcc/gcc/config/i386/i386.md:20984 */
06055 rtx
06056 gen_cvtsd2si (operand0, operand1)
06057      rtx operand0;
06058      rtx operand1;
06059 {
06060   return gen_rtx_SET (VOIDmode,
06061   operand0,
06062   gen_rtx_FIX (SImode,
06063   gen_rtx_VEC_SELECT (DFmode,
06064   operand1,
06065   gen_rtx_PARALLEL (VOIDmode,
06066   gen_rtvec (1,
06067     const0_rtx)))));
06068 }
06069 
06070 /* ../../gcc/gcc/config/i386/i386.md:20993 */
06071 rtx
06072 gen_cvtsd2siq (operand0, operand1)
06073      rtx operand0;
06074      rtx operand1;
06075 {
06076   return gen_rtx_SET (VOIDmode,
06077   operand0,
06078   gen_rtx_FIX (DImode,
06079   gen_rtx_VEC_SELECT (DFmode,
06080   operand1,
06081   gen_rtx_PARALLEL (VOIDmode,
06082   gen_rtvec (1,
06083     const0_rtx)))));
06084 }
06085 
06086 /* ../../gcc/gcc/config/i386/i386.md:21002 */
06087 rtx
06088 gen_cvttsd2si (operand0, operand1)
06089      rtx operand0;
06090      rtx operand1;
06091 {
06092   return gen_rtx_SET (VOIDmode,
06093   operand0,
06094   gen_rtx_UNSPEC (SImode,
06095   gen_rtvec (1,
06096     gen_rtx_VEC_SELECT (DFmode,
06097   operand1,
06098   gen_rtx_PARALLEL (VOIDmode,
06099   gen_rtvec (1,
06100     const0_rtx)))),
06101   30));
06102 }
06103 
06104 /* ../../gcc/gcc/config/i386/i386.md:21011 */
06105 rtx
06106 gen_cvttsd2siq (operand0, operand1)
06107      rtx operand0;
06108      rtx operand1;
06109 {
06110   return gen_rtx_SET (VOIDmode,
06111   operand0,
06112   gen_rtx_UNSPEC (DImode,
06113   gen_rtvec (1,
06114     gen_rtx_VEC_SELECT (DFmode,
06115   operand1,
06116   gen_rtx_PARALLEL (VOIDmode,
06117   gen_rtvec (1,
06118     const0_rtx)))),
06119   30));
06120 }
06121 
06122 /* ../../gcc/gcc/config/i386/i386.md:21021 */
06123 rtx
06124 gen_cvtsi2sd (operand0, operand1, operand2)
06125      rtx operand0;
06126      rtx operand1;
06127      rtx operand2;
06128 {
06129   return gen_rtx_SET (VOIDmode,
06130   operand0,
06131   gen_rtx_VEC_MERGE (V2DFmode,
06132   operand1,
06133   gen_rtx_VEC_DUPLICATE (V2DFmode,
06134   gen_rtx_FLOAT (DFmode,
06135   operand2)),
06136   GEN_INT (2LL)));
06137 }
06138 
06139 /* ../../gcc/gcc/config/i386/i386.md:21033 */
06140 rtx
06141 gen_cvtsi2sdq (operand0, operand1, operand2)
06142      rtx operand0;
06143      rtx operand1;
06144      rtx operand2;
06145 {
06146   return gen_rtx_SET (VOIDmode,
06147   operand0,
06148   gen_rtx_VEC_MERGE (V2DFmode,
06149   operand1,
06150   gen_rtx_VEC_DUPLICATE (V2DFmode,
06151   gen_rtx_FLOAT (DFmode,
06152   operand2)),
06153   GEN_INT (2LL)));
06154 }
06155 
06156 /* ../../gcc/gcc/config/i386/i386.md:21048 */
06157 rtx
06158 gen_cvtsd2ss (operand0, operand1, operand2)
06159      rtx operand0;
06160      rtx operand1;
06161      rtx operand2;
06162 {
06163   return gen_rtx_SET (VOIDmode,
06164   operand0,
06165   gen_rtx_VEC_MERGE (V4SFmode,
06166   operand1,
06167   gen_rtx_VEC_DUPLICATE (V4SFmode,
06168   gen_rtx_FLOAT_TRUNCATE (V2SFmode,
06169   operand2)),
06170   GEN_INT (14LL)));
06171 }
06172 
06173 /* ../../gcc/gcc/config/i386/i386.md:21060 */
06174 rtx
06175 gen_cvtss2sd (operand0, operand1, operand2)
06176      rtx operand0;
06177      rtx operand1;
06178      rtx operand2;
06179 {
06180   return gen_rtx_SET (VOIDmode,
06181   operand0,
06182   gen_rtx_VEC_MERGE (V2DFmode,
06183   operand1,
06184   gen_rtx_FLOAT_EXTEND (V2DFmode,
06185   gen_rtx_VEC_SELECT (V2SFmode,
06186   operand2,
06187   gen_rtx_PARALLEL (VOIDmode,
06188   gen_rtvec (2,
06189     const0_rtx,
06190     const1_rtx)))),
06191   GEN_INT (2LL)));
06192 }
06193 
06194 /* ../../gcc/gcc/config/i386/i386.md:21074 */
06195 rtx
06196 gen_cvtpd2ps (operand0, operand1)
06197      rtx operand0;
06198      rtx operand1;
06199 {
06200   return gen_rtx_SET (VOIDmode,
06201   operand0,
06202   gen_rtx_SUBREG (V4SFmode,
06203   gen_rtx_VEC_CONCAT (V4SImode,
06204   gen_rtx_SUBREG (V2SImode,
06205   gen_rtx_FLOAT_TRUNCATE (V2SFmode,
06206   operand1),
06207   0),
06208   gen_rtx_CONST_VECTOR (V2SImode,
06209   gen_rtvec (2,
06210     const0_rtx,
06211     const0_rtx))),
06212   0));
06213 }
06214 
06215 /* ../../gcc/gcc/config/i386/i386.md:21086 */
06216 rtx
06217 gen_cvtps2pd (operand0, operand1)
06218      rtx operand0;
06219      rtx operand1;
06220 {
06221   return gen_rtx_SET (VOIDmode,
06222   operand0,
06223   gen_rtx_FLOAT_EXTEND (V2DFmode,
06224   gen_rtx_VEC_SELECT (V2SFmode,
06225   operand1,
06226   gen_rtx_PARALLEL (VOIDmode,
06227   gen_rtvec (2,
06228     const0_rtx,
06229     const1_rtx)))));
06230 }
06231 
06232 /* ../../gcc/gcc/config/i386/i386.md:21101 */
06233 rtx
06234 gen_addv16qi3 (operand0, operand1, operand2)
06235      rtx operand0;
06236      rtx operand1;
06237      rtx operand2;
06238 {
06239   return gen_rtx_SET (VOIDmode,
06240   operand0,
06241   gen_rtx_PLUS (V16QImode,
06242   operand1,
06243   operand2));
06244 }
06245 
06246 /* ../../gcc/gcc/config/i386/i386.md:21110 */
06247 rtx
06248 gen_addv8hi3 (operand0, operand1, operand2)
06249      rtx operand0;
06250      rtx operand1;
06251      rtx operand2;
06252 {
06253   return gen_rtx_SET (VOIDmode,
06254   operand0,
06255   gen_rtx_PLUS (V8HImode,
06256   operand1,
06257   operand2));
06258 }
06259 
06260 /* ../../gcc/gcc/config/i386/i386.md:21119 */
06261 rtx
06262 gen_addv4si3 (operand0, operand1, operand2)
06263      rtx operand0;
06264      rtx operand1;
06265      rtx operand2;
06266 {
06267   return gen_rtx_SET (VOIDmode,
06268   operand0,
06269   gen_rtx_PLUS (V4SImode,
06270   operand1,
06271   operand2));
06272 }
06273 
06274 /* ../../gcc/gcc/config/i386/i386.md:21128 */
06275 rtx
06276 gen_addv2di3 (operand0, operand1, operand2)
06277      rtx operand0;
06278      rtx operand1;
06279      rtx operand2;
06280 {
06281   return gen_rtx_SET (VOIDmode,
06282   operand0,
06283   gen_rtx_PLUS (V2DImode,
06284   operand1,
06285   operand2));
06286 }
06287 
06288 /* ../../gcc/gcc/config/i386/i386.md:21137 */
06289 rtx
06290 gen_ssaddv16qi3 (operand0, operand1, operand2)
06291      rtx operand0;
06292      rtx operand1;
06293      rtx operand2;
06294 {
06295   return gen_rtx_SET (VOIDmode,
06296   operand0,
06297   gen_rtx_SS_PLUS (V16QImode,
06298   operand1,
06299   operand2));
06300 }
06301 
06302 /* ../../gcc/gcc/config/i386/i386.md:21146 */
06303 rtx
06304 gen_ssaddv8hi3 (operand0, operand1, operand2)
06305      rtx operand0;
06306      rtx operand1;
06307      rtx operand2;
06308 {
06309   return gen_rtx_SET (VOIDmode,
06310   operand0,
06311   gen_rtx_SS_PLUS (V8HImode,
06312   operand1,
06313   operand2));
06314 }
06315 
06316 /* ../../gcc/gcc/config/i386/i386.md:21155 */
06317 rtx
06318 gen_usaddv16qi3 (operand0, operand1, operand2)
06319      rtx operand0;
06320      rtx operand1;
06321      rtx operand2;
06322 {
06323   return gen_rtx_SET (VOIDmode,
06324   operand0,
06325   gen_rtx_US_PLUS (V16QImode,
06326   operand1,
06327   operand2));
06328 }
06329 
06330 /* ../../gcc/gcc/config/i386/i386.md:21164 */
06331 rtx
06332 gen_usaddv8hi3 (operand0, operand1, operand2)
06333      rtx operand0;
06334      rtx operand1;
06335      rtx operand2;
06336 {
06337   return gen_rtx_SET (VOIDmode,
06338   operand0,
06339   gen_rtx_US_PLUS (V8HImode,
06340   operand1,
06341   operand2));
06342 }
06343 
06344 /* ../../gcc/gcc/config/i386/i386.md:21173 */
06345 rtx
06346 gen_subv16qi3 (operand0, operand1, operand2)
06347      rtx operand0;
06348      rtx operand1;
06349      rtx operand2;
06350 {
06351   return gen_rtx_SET (VOIDmode,
06352   operand0,
06353   gen_rtx_MINUS (V16QImode,
06354   operand1,
06355   operand2));
06356 }
06357 
06358 /* ../../gcc/gcc/config/i386/i386.md:21182 */
06359 rtx
06360 gen_subv8hi3 (operand0, operand1, operand2)
06361      rtx operand0;
06362      rtx operand1;
06363      rtx operand2;
06364 {
06365   return gen_rtx_SET (VOIDmode,
06366   operand0,
06367   gen_rtx_MINUS (V8HImode,
06368   operand1,
06369   operand2));
06370 }
06371 
06372 /* ../../gcc/gcc/config/i386/i386.md:21191 */
06373 rtx
06374 gen_subv4si3 (operand0, operand1, operand2)
06375      rtx operand0;
06376      rtx operand1;
06377      rtx operand2;
06378 {
06379   return gen_rtx_SET (VOIDmode,
06380   operand0,
06381   gen_rtx_MINUS (V4SImode,
06382   operand1,
06383   operand2));
06384 }
06385 
06386 /* ../../gcc/gcc/config/i386/i386.md:21200 */
06387 rtx
06388 gen_subv2di3 (operand0, operand1, operand2)
06389      rtx operand0;
06390      rtx operand1;
06391      rtx operand2;
06392 {
06393   return gen_rtx_SET (VOIDmode,
06394   operand0,
06395   gen_rtx_MINUS (V2DImode,
06396   operand1,
06397   operand2));
06398 }
06399 
06400 /* ../../gcc/gcc/config/i386/i386.md:21209 */
06401 rtx
06402 gen_sssubv16qi3 (operand0, operand1, operand2)
06403      rtx operand0;
06404      rtx operand1;
06405      rtx operand2;
06406 {
06407   return gen_rtx_SET (VOIDmode,
06408   operand0,
06409   gen_rtx_SS_MINUS (V16QImode,
06410   operand1,
06411   operand2));
06412 }
06413 
06414 /* ../../gcc/gcc/config/i386/i386.md:21218 */
06415 rtx
06416 gen_sssubv8hi3 (operand0, operand1, operand2)
06417      rtx operand0;
06418      rtx operand1;
06419      rtx operand2;
06420 {
06421   return gen_rtx_SET (VOIDmode,
06422   operand0,
06423   gen_rtx_SS_MINUS (V8HImode,
06424   operand1,
06425   operand2));
06426 }
06427 
06428 /* ../../gcc/gcc/config/i386/i386.md:21227 */
06429 rtx
06430 gen_ussubv16qi3 (operand0, operand1, operand2)
06431      rtx operand0;
06432      rtx operand1;
06433      rtx operand2;
06434 {
06435   return gen_rtx_SET (VOIDmode,
06436   operand0,
06437   gen_rtx_US_MINUS (V16QImode,
06438   operand1,
06439   operand2));
06440 }
06441 
06442 /* ../../gcc/gcc/config/i386/i386.md:21236 */
06443 rtx
06444 gen_ussubv8hi3 (operand0, operand1, operand2)
06445      rtx operand0;
06446      rtx operand1;
06447      rtx operand2;
06448 {
06449   return gen_rtx_SET (VOIDmode,
06450   operand0,
06451   gen_rtx_US_MINUS (V8HImode,
06452   operand1,
06453   operand2));
06454 }
06455 
06456 /* ../../gcc/gcc/config/i386/i386.md:21245 */
06457 rtx
06458 gen_mulv8hi3 (operand0, operand1, operand2)
06459      rtx operand0;
06460      rtx operand1;
06461      rtx operand2;
06462 {
06463   return gen_rtx_SET (VOIDmode,
06464   operand0,
06465   gen_rtx_MULT (V8HImode,
06466   operand1,
06467   operand2));
06468 }
06469 
06470 /* ../../gcc/gcc/config/i386/i386.md:21254 */
06471 rtx
06472 gen_smulv8hi3_highpart (operand0, operand1, operand2)
06473      rtx operand0;
06474      rtx operand1;
06475      rtx operand2;
06476 {
06477   return gen_rtx_SET (VOIDmode,
06478   operand0,
06479   gen_rtx_TRUNCATE (V8HImode,
06480   gen_rtx_LSHIFTRT (V8SImode,
06481   gen_rtx_MULT (V8SImode,
06482   gen_rtx_SIGN_EXTEND (V8SImode,
06483   operand1),
06484   gen_rtx_SIGN_EXTEND (V8SImode,
06485   operand2)),
06486   GEN_INT (16LL))));
06487 }
06488 
06489 /* ../../gcc/gcc/config/i386/i386.md:21266 */
06490 rtx
06491 gen_umulv8hi3_highpart (operand0, operand1, operand2)
06492      rtx operand0;
06493      rtx operand1;
06494      rtx operand2;
06495 {
06496   return gen_rtx_SET (VOIDmode,
06497   operand0,
06498   gen_rtx_TRUNCATE (V8HImode,
06499   gen_rtx_LSHIFTRT (V8SImode,
06500   gen_rtx_MULT (V8SImode,
06501   gen_rtx_ZERO_EXTEND (V8SImode,
06502   operand1),
06503   gen_rtx_ZERO_EXTEND (V8SImode,
06504   operand2)),
06505   GEN_INT (16LL))));
06506 }
06507 
06508 /* ../../gcc/gcc/config/i386/i386.md:21278 */
06509 rtx
06510 gen_sse2_umulsidi3 (operand0, operand1, operand2)
06511      rtx operand0;
06512      rtx operand1;
06513      rtx operand2;
06514 {
06515   return gen_rtx_SET (VOIDmode,
06516   operand0,
06517   gen_rtx_MULT (DImode,
06518   gen_rtx_ZERO_EXTEND (DImode,
06519   gen_rtx_VEC_SELECT (SImode,
06520   operand1,
06521   gen_rtx_PARALLEL (VOIDmode,
06522   gen_rtvec (1,
06523     const0_rtx)))),
06524   gen_rtx_ZERO_EXTEND (DImode,
06525   gen_rtx_VEC_SELECT (SImode,
06526   operand2,
06527   gen_rtx_PARALLEL (VOIDmode,
06528   gen_rtvec (1,
06529     const0_rtx))))));
06530 }
06531 
06532 /* ../../gcc/gcc/config/i386/i386.md:21291 */
06533 rtx
06534 gen_sse2_umulv2siv2di3 (operand0, operand1, operand2)
06535      rtx operand0;
06536      rtx operand1;
06537      rtx operand2;
06538 {
06539   return gen_rtx_SET (VOIDmode,
06540   operand0,
06541   gen_rtx_MULT (V2DImode,
06542   gen_rtx_ZERO_EXTEND (V2DImode,
06543   gen_rtx_VEC_SELECT (V2SImode,
06544   operand1,
06545   gen_rtx_PARALLEL (VOIDmode,
06546   gen_rtvec (2,
06547     const0_rtx,
06548     GEN_INT (2LL))))),
06549   gen_rtx_ZERO_EXTEND (V2DImode,
06550   gen_rtx_VEC_SELECT (V2SImode,
06551   operand2,
06552   gen_rtx_PARALLEL (VOIDmode,
06553   gen_rtvec (2,
06554     const0_rtx,
06555     GEN_INT (2LL)))))));
06556 }
06557 
06558 /* ../../gcc/gcc/config/i386/i386.md:21306 */
06559 rtx
06560 gen_sse2_pmaddwd (operand0, operand1, operand2)
06561      rtx operand0;
06562      rtx operand1;
06563      rtx operand2;
06564 {
06565   return gen_rtx_SET (VOIDmode,
06566   operand0,
06567   gen_rtx_PLUS (V4SImode,
06568   gen_rtx_MULT (V4SImode,
06569   gen_rtx_SIGN_EXTEND (V4SImode,
06570   gen_rtx_VEC_SELECT (V4HImode,
06571   operand1,
06572   gen_rtx_PARALLEL (VOIDmode,
06573   gen_rtvec (4,
06574     const0_rtx,
06575     GEN_INT (2LL),
06576     GEN_INT (4LL),
06577     GEN_INT (6LL))))),
06578   gen_rtx_SIGN_EXTEND (V4SImode,
06579   gen_rtx_VEC_SELECT (V4HImode,
06580   operand2,
06581   gen_rtx_PARALLEL (VOIDmode,
06582   gen_rtvec (4,
06583     const0_rtx,
06584     GEN_INT (2LL),
06585     GEN_INT (4LL),
06586     GEN_INT (6LL)))))),
06587   gen_rtx_MULT (V4SImode,
06588   gen_rtx_SIGN_EXTEND (V4SImode,
06589   gen_rtx_VEC_SELECT (V4HImode,
06590   operand1,
06591   gen_rtx_PARALLEL (VOIDmode,
06592   gen_rtvec (4,
06593     const1_rtx,
06594     GEN_INT (3LL),
06595     GEN_INT (5LL),
06596     GEN_INT (7LL))))),
06597   gen_rtx_SIGN_EXTEND (V4SImode,
06598   gen_rtx_VEC_SELECT (V4HImode,
06599   operand2,
06600   gen_rtx_PARALLEL (VOIDmode,
06601   gen_rtvec (4,
06602     const1_rtx,
06603     GEN_INT (3LL),
06604     GEN_INT (5LL),
06605     GEN_INT (7LL))))))));
06606 }
06607 
06608 /* ../../gcc/gcc/config/i386/i386.md:21338 */
06609 rtx
06610 gen_sse2_clrti (operand0)
06611      rtx operand0;
06612 {
06613   return gen_rtx_SET (VOIDmode,
06614   operand0,
06615   const0_rtx);
06616 }
06617 
06618 /* ../../gcc/gcc/config/i386/i386.md:21348 */
06619 rtx
06620 gen_sse2_uavgv16qi3 (operand0, operand1, operand2)
06621      rtx operand0;
06622      rtx operand1;
06623      rtx operand2;
06624 {
06625   return gen_rtx_SET (VOIDmode,
06626   operand0,
06627   gen_rtx_ASHIFTRT (V16QImode,
06628   gen_rtx_PLUS (V16QImode,
06629   gen_rtx_PLUS (V16QImode,
06630   operand1,
06631   operand2),
06632   gen_rtx_CONST_VECTOR (V16QImode,
06633   gen_rtvec (16,
06634     const1_rtx,
06635     const1_rtx,
06636     const1_rtx,
06637     const1_rtx,
06638     const1_rtx,
06639     const1_rtx,
06640     const1_rtx,
06641     const1_rtx,
06642     const1_rtx,
06643     const1_rtx,
06644     const1_rtx,
06645     const1_rtx,
06646     const1_rtx,
06647     const1_rtx,
06648     const1_rtx,
06649     const1_rtx))),
06650   const1_rtx));
06651 }
06652 
06653 /* ../../gcc/gcc/config/i386/i386.md:21368 */
06654 rtx
06655 gen_sse2_uavgv8hi3 (operand0, operand1, operand2)
06656      rtx operand0;
06657      rtx operand1;
06658      rtx operand2;
06659 {
06660   return gen_rtx_SET (VOIDmode,
06661   operand0,
06662   gen_rtx_ASHIFTRT (V8HImode,
06663   gen_rtx_PLUS (V8HImode,
06664   gen_rtx_PLUS (V8HImode,
06665   operand1,
06666   operand2),
06667   gen_rtx_CONST_VECTOR (V8HImode,
06668   gen_rtvec (8,
06669     const1_rtx,
06670     const1_rtx,
06671     const1_rtx,
06672     const1_rtx,
06673     const1_rtx,
06674     const1_rtx,
06675     const1_rtx,
06676     const1_rtx))),
06677   const1_rtx));
06678 }
06679 
06680 /* ../../gcc/gcc/config/i386/i386.md:21385 */
06681 rtx
06682 gen_sse2_psadbw (operand0, operand1, operand2)
06683      rtx operand0;
06684      rtx operand1;
06685      rtx operand2;
06686 {
06687   return gen_rtx_SET (VOIDmode,
06688   operand0,
06689   gen_rtx_UNSPEC (V2DImode,
06690   gen_rtvec (2,
06691     operand1,
06692     operand2),
06693   61));
06694 }
06695 
06696 /* ../../gcc/gcc/config/i386/i386.md:21398 */
06697 rtx
06698 gen_sse2_pinsrw (operand0, operand1, operand2, operand3)
06699      rtx operand0;
06700      rtx operand1;
06701      rtx operand2;
06702      rtx operand3;
06703 {
06704   return gen_rtx_SET (VOIDmode,
06705   operand0,
06706   gen_rtx_VEC_MERGE (V8HImode,
06707   operand1,
06708   gen_rtx_VEC_DUPLICATE (V8HImode,
06709   gen_rtx_TRUNCATE (HImode,
06710   operand2)),
06711   operand3));
06712 }
06713 
06714 /* ../../gcc/gcc/config/i386/i386.md:21410 */
06715 rtx
06716 gen_sse2_pextrw (operand0, operand1, operand2)
06717      rtx operand0;
06718      rtx operand1;
06719      rtx operand2;
06720 {
06721   return gen_rtx_SET (VOIDmode,
06722   operand0,
06723   gen_rtx_ZERO_EXTEND (SImode,
06724   gen_rtx_VEC_SELECT (HImode,
06725   operand1,
06726   gen_rtx_PARALLEL (VOIDmode,
06727   gen_rtvec (1,
06728     operand2)))));
06729 }
06730 
06731 /* ../../gcc/gcc/config/i386/i386.md:21421 */
06732 rtx
06733 gen_sse2_pshufd (operand0, operand1, operand2)
06734      rtx operand0;
06735      rtx operand1;
06736      rtx operand2;
06737 {
06738   return gen_rtx_SET (VOIDmode,
06739   operand0,
06740   gen_rtx_UNSPEC (V4SImode,
06741   gen_rtvec (2,
06742     operand1,
06743     operand2),
06744   41));
06745 }
06746 
06747 /* ../../gcc/gcc/config/i386/i386.md:21431 */
06748 rtx
06749 gen_sse2_pshuflw (operand0, operand1, operand2)
06750      rtx operand0;
06751      rtx operand1;
06752      rtx operand2;
06753 {
06754   return gen_rtx_SET (VOIDmode,
06755   operand0,
06756   gen_rtx_UNSPEC (V8HImode,
06757   gen_rtvec (2,
06758     operand1,
06759     operand2),
06760   55));
06761 }
06762 
06763 /* ../../gcc/gcc/config/i386/i386.md:21441 */
06764 rtx
06765 gen_sse2_pshufhw (operand0, operand1, operand2)
06766      rtx operand0;
06767      rtx operand1;
06768      rtx operand2;
06769 {
06770   return gen_rtx_SET (VOIDmode,
06771   operand0,
06772   gen_rtx_UNSPEC (V8HImode,
06773   gen_rtvec (2,
06774     operand1,
06775     operand2),
06776   56));
06777 }
06778 
06779 /* ../../gcc/gcc/config/i386/i386.md:21453 */
06780 rtx
06781 gen_eqv16qi3 (operand0, operand1, operand2)
06782      rtx operand0;
06783      rtx operand1;
06784      rtx operand2;
06785 {
06786   return gen_rtx_SET (VOIDmode,
06787   operand0,
06788   gen_rtx_EQ (V16QImode,
06789   operand1,
06790   operand2));
06791 }
06792 
06793 /* ../../gcc/gcc/config/i386/i386.md:21462 */
06794 rtx
06795 gen_eqv8hi3 (operand0, operand1, operand2)
06796      rtx operand0;
06797      rtx operand1;
06798      rtx operand2;
06799 {
06800   return gen_rtx_SET (VOIDmode,
06801   operand0,
06802   gen_rtx_EQ (V8HImode,
06803   operand1,
06804   operand2));
06805 }
06806 
06807 /* ../../gcc/gcc/config/i386/i386.md:21471 */
06808 rtx
06809 gen_eqv4si3 (operand0, operand1, operand2)
06810      rtx operand0;
06811      rtx operand1;
06812      rtx operand2;
06813 {
06814   return gen_rtx_SET (VOIDmode,
06815   operand0,
06816   gen_rtx_EQ (V4SImode,
06817   operand1,
06818   operand2));
06819 }
06820 
06821 /* ../../gcc/gcc/config/i386/i386.md:21480 */
06822 rtx
06823 gen_gtv16qi3 (operand0, operand1, operand2)
06824      rtx operand0;
06825      rtx operand1;
06826      rtx operand2;
06827 {
06828   return gen_rtx_SET (VOIDmode,
06829   operand0,
06830   gen_rtx_GT (V16QImode,
06831   operand1,
06832   operand2));
06833 }
06834 
06835 /* ../../gcc/gcc/config/i386/i386.md:21489 */
06836 rtx
06837 gen_gtv8hi3 (operand0, operand1, operand2)
06838      rtx operand0;
06839      rtx operand1;
06840      rtx operand2;
06841 {
06842   return gen_rtx_SET (VOIDmode,
06843   operand0,
06844   gen_rtx_GT (V8HImode,
06845   operand1,
06846   operand2));
06847 }
06848 
06849 /* ../../gcc/gcc/config/i386/i386.md:21498 */
06850 rtx
06851 gen_gtv4si3 (operand0, operand1, operand2)
06852      rtx operand0;
06853      rtx operand1;
06854      rtx operand2;
06855 {
06856   return gen_rtx_SET (VOIDmode,
06857   operand0,
06858   gen_rtx_GT (V4SImode,
06859   operand1,
06860   operand2));
06861 }
06862 
06863 /* ../../gcc/gcc/config/i386/i386.md:21510 */
06864 rtx
06865 gen_umaxv16qi3 (operand0, operand1, operand2)
06866      rtx operand0;
06867      rtx operand1;
06868      rtx operand2;
06869 {
06870   return gen_rtx_SET (VOIDmode,
06871   operand0,
06872   gen_rtx_UMAX (V16QImode,
06873   operand1,
06874   operand2));
06875 }
06876 
06877 /* ../../gcc/gcc/config/i386/i386.md:21519 */
06878 rtx
06879 gen_smaxv8hi3 (operand0, operand1, operand2)
06880      rtx operand0;
06881      rtx operand1;
06882      rtx operand2;
06883 {
06884   return gen_rtx_SET (VOIDmode,
06885   operand0,
06886   gen_rtx_SMAX (V8HImode,
06887   operand1,
06888   operand2));
06889 }
06890 
06891 /* ../../gcc/gcc/config/i386/i386.md:21528 */
06892 rtx
06893 gen_uminv16qi3 (operand0, operand1, operand2)
06894      rtx operand0;
06895      rtx operand1;
06896      rtx operand2;
06897 {
06898   return gen_rtx_SET (VOIDmode,
06899   operand0,
06900   gen_rtx_UMIN (V16QImode,
06901   operand1,
06902   operand2));
06903 }
06904 
06905 /* ../../gcc/gcc/config/i386/i386.md:21537 */
06906 rtx
06907 gen_sminv8hi3 (operand0, operand1, operand2)
06908      rtx operand0;
06909      rtx operand1;
06910      rtx operand2;
06911 {
06912   return gen_rtx_SET (VOIDmode,
06913   operand0,
06914   gen_rtx_SMIN (V8HImode,
06915   operand1,
06916   operand2));
06917 }
06918 
06919 /* ../../gcc/gcc/config/i386/i386.md:21549 */
06920 rtx
06921 gen_ashrv8hi3 (operand0, operand1, operand2)
06922      rtx operand0;
06923      rtx operand1;
06924      rtx operand2;
06925 {
06926   return gen_rtx_SET (VOIDmode,
06927   operand0,
06928   gen_rtx_ASHIFTRT (V8HImode,
06929   operand1,
06930   operand2));
06931 }
06932 
06933 /* ../../gcc/gcc/config/i386/i386.md:21558 */
06934 rtx
06935 gen_ashrv4si3 (operand0, operand1, operand2)
06936      rtx operand0;
06937      rtx operand1;
06938      rtx operand2;
06939 {
06940   return gen_rtx_SET (VOIDmode,
06941   operand0,
06942   gen_rtx_ASHIFTRT (V4SImode,
06943   operand1,
06944   operand2));
06945 }
06946 
06947 /* ../../gcc/gcc/config/i386/i386.md:21567 */
06948 rtx
06949 gen_lshrv8hi3 (operand0, operand1, operand2)
06950      rtx operand0;
06951      rtx operand1;
06952      rtx operand2;
06953 {
06954   return gen_rtx_SET (VOIDmode,
06955   operand0,
06956   gen_rtx_LSHIFTRT (V8HImode,
06957   operand1,
06958   operand2));
06959 }
06960 
06961 /* ../../gcc/gcc/config/i386/i386.md:21576 */
06962 rtx
06963 gen_lshrv4si3 (operand0, operand1, operand2)
06964      rtx operand0;
06965      rtx operand1;
06966      rtx operand2;
06967 {
06968   return gen_rtx_SET (VOIDmode,
06969   operand0,
06970   gen_rtx_LSHIFTRT (V4SImode,
06971   operand1,
06972   operand2));
06973 }
06974 
06975 /* ../../gcc/gcc/config/i386/i386.md:21585 */
06976 rtx
06977 gen_lshrv2di3 (operand0, operand1, operand2)
06978      rtx operand0;
06979      rtx operand1;
06980      rtx operand2;
06981 {
06982   return gen_rtx_SET (VOIDmode,
06983   operand0,
06984   gen_rtx_LSHIFTRT (V2DImode,
06985   operand1,
06986   operand2));
06987 }
06988 
06989 /* ../../gcc/gcc/config/i386/i386.md:21594 */
06990 rtx
06991 gen_ashlv8hi3 (operand0, operand1, operand2)
06992      rtx operand0;
06993      rtx operand1;
06994      rtx operand2;
06995 {
06996   return gen_rtx_SET (VOIDmode,
06997   operand0,
06998   gen_rtx_ASHIFT (V8HImode,
06999   operand1,
07000   operand2));
07001 }
07002 
07003 /* ../../gcc/gcc/config/i386/i386.md:21603 */
07004 rtx
07005 gen_ashlv4si3 (operand0, operand1, operand2)
07006      rtx operand0;
07007      rtx operand1;
07008      rtx operand2;
07009 {
07010   return gen_rtx_SET (VOIDmode,
07011   operand0,
07012   gen_rtx_ASHIFT (V4SImode,
07013   operand1,
07014   operand2));
07015 }
07016 
07017 /* ../../gcc/gcc/config/i386/i386.md:21612 */
07018 rtx
07019 gen_ashlv2di3 (operand0, operand1, operand2)
07020      rtx operand0;
07021      rtx operand1;
07022      rtx operand2;
07023 {
07024   return gen_rtx_SET (VOIDmode,
07025   operand0,
07026   gen_rtx_ASHIFT (V2DImode,
07027   operand1,
07028   operand2));
07029 }
07030 
07031 /* ../../gcc/gcc/config/i386/i386.md:21621 */
07032 rtx
07033 gen_ashrv8hi3_ti (operand0, operand1, operand2)
07034      rtx operand0;
07035      rtx operand1;
07036      rtx operand2;
07037 {
07038   return gen_rtx_SET (VOIDmode,
07039   operand0,
07040   gen_rtx_ASHIFTRT (V8HImode,
07041   operand1,
07042   gen_rtx_SUBREG (TImode,
07043   operand2,
07044   0)));
07045 }
07046 
07047 /* ../../gcc/gcc/config/i386/i386.md:21630 */
07048 rtx
07049 gen_ashrv4si3_ti (operand0, operand1, operand2)
07050      rtx operand0;
07051      rtx operand1;
07052      rtx operand2;
07053 {
07054   return gen_rtx_SET (VOIDmode,
07055   operand0,
07056   gen_rtx_ASHIFTRT (V4SImode,
07057   operand1,
07058   gen_rtx_SUBREG (TImode,
07059   operand2,
07060   0)));
07061 }
07062 
07063 /* ../../gcc/gcc/config/i386/i386.md:21639 */
07064 rtx
07065 gen_lshrv8hi3_ti (operand0, operand1, operand2)
07066      rtx operand0;
07067      rtx operand1;
07068      rtx operand2;
07069 {
07070   return gen_rtx_SET (VOIDmode,
07071   operand0,
07072   gen_rtx_LSHIFTRT (V8HImode,
07073   operand1,
07074   gen_rtx_SUBREG (TImode,
07075   operand2,
07076   0)));
07077 }
07078 
07079 /* ../../gcc/gcc/config/i386/i386.md:21648 */
07080 rtx
07081 gen_lshrv4si3_ti (operand0, operand1, operand2)
07082      rtx operand0;
07083      rtx operand1;
07084      rtx operand2;
07085 {
07086   return gen_rtx_SET (VOIDmode,
07087   operand0,
07088   gen_rtx_LSHIFTRT (V4SImode,
07089   operand1,
07090   gen_rtx_SUBREG (TImode,
07091   operand2,
07092   0)));
07093 }
07094 
07095 /* ../../gcc/gcc/config/i386/i386.md:21657 */
07096 rtx
07097 gen_lshrv2di3_ti (operand0, operand1, operand2)
07098      rtx operand0;
07099      rtx operand1;
07100      rtx operand2;
07101 {
07102   return gen_rtx_SET (VOIDmode,
07103   operand0,
07104   gen_rtx_LSHIFTRT (V2DImode,
07105   operand1,
07106   gen_rtx_SUBREG (TImode,
07107   operand2,
07108   0)));
07109 }
07110 
07111 /* ../../gcc/gcc/config/i386/i386.md:21666 */
07112 rtx
07113 gen_ashlv8hi3_ti (operand0, operand1, operand2)
07114      rtx operand0;
07115      rtx operand1;
07116      rtx operand2;
07117 {
07118   return gen_rtx_SET (VOIDmode,
07119   operand0,
07120   gen_rtx_ASHIFT (V8HImode,
07121   operand1,
07122   gen_rtx_SUBREG (TImode,
07123   operand2,
07124   0)));
07125 }
07126 
07127 /* ../../gcc/gcc/config/i386/i386.md:21675 */
07128 rtx
07129 gen_ashlv4si3_ti (operand0, operand1, operand2)
07130      rtx operand0;
07131      rtx operand1;
07132      rtx operand2;
07133 {
07134   return gen_rtx_SET (VOIDmode,
07135   operand0,
07136   gen_rtx_ASHIFT (V4SImode,
07137   operand1,
07138   gen_rtx_SUBREG (TImode,
07139   operand2,
07140   0)));
07141 }
07142 
07143 /* ../../gcc/gcc/config/i386/i386.md:21684 */
07144 rtx
07145 gen_ashlv2di3_ti (operand0, operand1, operand2)
07146      rtx operand0;
07147      rtx operand1;
07148      rtx operand2;
07149 {
07150   return gen_rtx_SET (VOIDmode,
07151   operand0,
07152   gen_rtx_ASHIFT (V2DImode,
07153   operand1,
07154   gen_rtx_SUBREG (TImode,
07155   operand2,
07156   0)));
07157 }
07158 
07159 /* ../../gcc/gcc/config/i386/i386.md:21697 */
07160 rtx
07161 gen_sse2_ashlti3 (operand0, operand1, operand2)
07162      rtx operand0;
07163      rtx operand1;
07164      rtx operand2;
07165 {
07166   return gen_rtx_SET (VOIDmode,
07167   operand0,
07168   gen_rtx_UNSPEC (TImode,
07169   gen_rtvec (1,
07170     gen_rtx_ASHIFT (TImode,
07171   operand1,
07172   gen_rtx_MULT (SImode,
07173   operand2,
07174   GEN_INT (8LL)))),
07175   45));
07176 }
07177 
07178 /* ../../gcc/gcc/config/i386/i386.md:21708 */
07179 rtx
07180 gen_sse2_lshrti3 (operand0, operand1, operand2)
07181      rtx operand0;
07182      rtx operand1;
07183      rtx operand2;
07184 {
07185   return gen_rtx_SET (VOIDmode,
07186   operand0,
07187   gen_rtx_UNSPEC (TImode,
07188   gen_rtvec (1,
07189     gen_rtx_LSHIFTRT (TImode,
07190   operand1,
07191   gen_rtx_MULT (SImode,
07192   operand2,
07193   GEN_INT (8LL)))),
07194   45));
07195 }
07196 
07197 /* ../../gcc/gcc/config/i386/i386.md:21721 */
07198 rtx
07199 gen_sse2_unpckhpd (operand0, operand1, operand2)
07200      rtx operand0;
07201      rtx operand1;
07202      rtx operand2;
07203 {
07204   return gen_rtx_SET (VOIDmode,
07205   operand0,
07206   gen_rtx_VEC_CONCAT (V2DFmode,
07207   gen_rtx_VEC_SELECT (V2DFmode,
07208   operand1,
07209   gen_rtx_PARALLEL (VOIDmode,
07210   gen_rtvec (1,
07211     const1_rtx))),
07212   gen_rtx_VEC_SELECT (V2DFmode,
07213   operand2,
07214   gen_rtx_PARALLEL (VOIDmode,
07215   gen_rtvec (1,
07216     const0_rtx)))));
07217 }
07218 
07219 /* ../../gcc/gcc/config/i386/i386.md:21733 */
07220 rtx
07221 gen_sse2_unpcklpd (operand0, operand1, operand2)
07222      rtx operand0;
07223      rtx operand1;
07224      rtx operand2;
07225 {
07226   return gen_rtx_SET (VOIDmode,
07227   operand0,
07228   gen_rtx_VEC_CONCAT (V2DFmode,
07229   gen_rtx_VEC_SELECT (V2DFmode,
07230   operand1,
07231   gen_rtx_PARALLEL (VOIDmode,
07232   gen_rtvec (1,
07233     const0_rtx))),
07234   gen_rtx_VEC_SELECT (V2DFmode,
07235   operand2,
07236   gen_rtx_PARALLEL (VOIDmode,
07237   gen_rtvec (1,
07238     const1_rtx)))));
07239 }
07240 
07241 /* ../../gcc/gcc/config/i386/i386.md:21747 */
07242 rtx
07243 gen_sse2_packsswb (operand0, operand1, operand2)
07244      rtx operand0;
07245      rtx operand1;
07246      rtx operand2;
07247 {
07248   return gen_rtx_SET (VOIDmode,
07249   operand0,
07250   gen_rtx_VEC_CONCAT (V16QImode,
07251   gen_rtx_SS_TRUNCATE (V8QImode,
07252   operand1),
07253   gen_rtx_SS_TRUNCATE (V8QImode,
07254   operand2)));
07255 }
07256 
07257 /* ../../gcc/gcc/config/i386/i386.md:21757 */
07258 rtx
07259 gen_sse2_packssdw (operand0, operand1, operand2)
07260      rtx operand0;
07261      rtx operand1;
07262      rtx operand2;
07263 {
07264   return gen_rtx_SET (VOIDmode,
07265   operand0,
07266   gen_rtx_VEC_CONCAT (V8HImode,
07267   gen_rtx_SS_TRUNCATE (V4HImode,
07268   operand1),
07269   gen_rtx_SS_TRUNCATE (V4HImode,
07270   operand2)));
07271 }
07272 
07273 /* ../../gcc/gcc/config/i386/i386.md:21767 */
07274 rtx
07275 gen_sse2_packuswb (operand0, operand1, operand2)
07276      rtx operand0;
07277      rtx operand1;
07278      rtx operand2;
07279 {
07280   return gen_rtx_SET (VOIDmode,
07281   operand0,
07282   gen_rtx_VEC_CONCAT (V16QImode,
07283   gen_rtx_US_TRUNCATE (V8QImode,
07284   operand1),
07285   gen_rtx_US_TRUNCATE (V8QImode,
07286   operand2)));
07287 }
07288 
07289 /* ../../gcc/gcc/config/i386/i386.md:21777 */
07290 rtx
07291 gen_sse2_punpckhbw (operand0, operand1, operand2)
07292      rtx operand0;
07293      rtx operand1;
07294      rtx operand2;
07295 {
07296   return gen_rtx_SET (VOIDmode,
07297   operand0,
07298   gen_rtx_VEC_MERGE (V16QImode,
07299   gen_rtx_VEC_SELECT (V16QImode,
07300   operand1,
07301   gen_rtx_PARALLEL (VOIDmode,
07302   gen_rtvec (16,
07303     GEN_INT (8LL),
07304     const0_rtx,
07305     GEN_INT (9LL),
07306     const1_rtx,
07307     GEN_INT (10LL),
07308     GEN_INT (2LL),
07309     GEN_INT (11LL),
07310     GEN_INT (3LL),
07311     GEN_INT (12LL),
07312     GEN_INT (4LL),
07313     GEN_INT (13LL),
07314     GEN_INT (5LL),
07315     GEN_INT (14LL),
07316     GEN_INT (6LL),
07317     GEN_INT (15LL),
07318     GEN_INT (7LL)))),
07319   gen_rtx_VEC_SELECT (V16QImode,
07320   operand2,
07321   gen_rtx_PARALLEL (VOIDmode,
07322   gen_rtvec (16,
07323     const0_rtx,
07324     GEN_INT (8LL),
07325     const1_rtx,
07326     GEN_INT (9LL),
07327     GEN_INT (2LL),
07328     GEN_INT (10LL),
07329     GEN_INT (3LL),
07330     GEN_INT (11LL),
07331     GEN_INT (4LL),
07332     GEN_INT (12LL),
07333     GEN_INT (5LL),
07334     GEN_INT (13LL),
07335     GEN_INT (6LL),
07336     GEN_INT (14LL),
07337     GEN_INT (7LL),
07338     GEN_INT (15LL)))),
07339   GEN_INT (21845LL)));
07340 }
07341 
07342 /* ../../gcc/gcc/config/i386/i386.md:21804 */
07343 rtx
07344 gen_sse2_punpckhwd (operand0, operand1, operand2)
07345      rtx operand0;
07346      rtx operand1;
07347      rtx operand2;
07348 {
07349   return gen_rtx_SET (VOIDmode,
07350   operand0,
07351   gen_rtx_VEC_MERGE (V8HImode,
07352   gen_rtx_VEC_SELECT (V8HImode,
07353   operand1,
07354   gen_rtx_PARALLEL (VOIDmode,
07355   gen_rtvec (8,
07356     GEN_INT (4LL),
07357     const0_rtx,
07358     GEN_INT (5LL),
07359     const1_rtx,
07360     GEN_INT (6LL),
07361     GEN_INT (2LL),
07362     GEN_INT (7LL),
07363     GEN_INT (3LL)))),
07364   gen_rtx_VEC_SELECT (V8HImode,
07365   operand2,
07366   gen_rtx_PARALLEL (VOIDmode,
07367   gen_rtvec (8,
07368     const0_rtx,
07369     GEN_INT (4LL),
07370     const1_rtx,
07371     GEN_INT (5LL),
07372     GEN_INT (2LL),
07373     GEN_INT (6LL),
07374     GEN_INT (3LL),
07375     GEN_INT (7LL)))),
07376   GEN_INT (85LL)));
07377 }
07378 
07379 /* ../../gcc/gcc/config/i386/i386.md:21823 */
07380 rtx
07381 gen_sse2_punpckhdq (operand0, operand1, operand2)
07382      rtx operand0;
07383      rtx operand1;
07384      rtx operand2;
07385 {
07386   return gen_rtx_SET (VOIDmode,
07387   operand0,
07388   gen_rtx_VEC_MERGE (V4SImode,
07389   gen_rtx_VEC_SELECT (V4SImode,
07390   operand1,
07391   gen_rtx_PARALLEL (VOIDmode,
07392   gen_rtvec (4,
07393     GEN_INT (2LL),
07394     const0_rtx,
07395     GEN_INT (3LL),
07396     const1_rtx))),
07397   gen_rtx_VEC_SELECT (V4SImode,
07398   operand2,
07399   gen_rtx_PARALLEL (VOIDmode,
07400   gen_rtvec (4,
07401     const0_rtx,
07402     GEN_INT (2LL),
07403     const1_rtx,
07404     GEN_INT (3LL)))),
07405   GEN_INT (5LL)));
07406 }
07407 
07408 /* ../../gcc/gcc/config/i386/i386.md:21838 */
07409 rtx
07410 gen_sse2_punpcklbw (operand0, operand1, operand2)
07411      rtx operand0;
07412      rtx operand1;
07413      rtx operand2;
07414 {
07415   return gen_rtx_SET (VOIDmode,
07416   operand0,
07417   gen_rtx_VEC_MERGE (V16QImode,
07418   gen_rtx_VEC_SELECT (V16QImode,
07419   operand1,
07420   gen_rtx_PARALLEL (VOIDmode,
07421   gen_rtvec (16,
07422     const0_rtx,
07423     GEN_INT (8LL),
07424     const1_rtx,
07425     GEN_INT (9LL),
07426     GEN_INT (2LL),
07427     GEN_INT (10LL),
07428     GEN_INT (3LL),
07429     GEN_INT (11LL),
07430     GEN_INT (4LL),
07431     GEN_INT (12LL),
07432     GEN_INT (5LL),
07433     GEN_INT (13LL),
07434     GEN_INT (6LL),
07435     GEN_INT (14LL),
07436     GEN_INT (7LL),
07437     GEN_INT (15LL)))),
07438   gen_rtx_VEC_SELECT (V16QImode,
07439   operand2,
07440   gen_rtx_PARALLEL (VOIDmode,
07441   gen_rtvec (16,
07442     GEN_INT (8LL),
07443     const0_rtx,
07444     GEN_INT (9LL),
07445     const1_rtx,
07446     GEN_INT (10LL),
07447     GEN_INT (2LL),
07448     GEN_INT (11LL),
07449     GEN_INT (3LL),
07450     GEN_INT (12LL),
07451     GEN_INT (4LL),
07452     GEN_INT (13LL),
07453     GEN_INT (5LL),
07454     GEN_INT (14LL),
07455     GEN_INT (6LL),
07456     GEN_INT (15LL),
07457     GEN_INT (7LL)))),
07458   GEN_INT (21845LL)));
07459 }
07460 
07461 /* ../../gcc/gcc/config/i386/i386.md:21865 */
07462 rtx
07463 gen_sse2_punpcklwd (operand0, operand1, operand2)
07464      rtx operand0;
07465      rtx operand1;
07466      rtx operand2;
07467 {
07468   return gen_rtx_SET (VOIDmode,
07469   operand0,
07470   gen_rtx_VEC_MERGE (V8HImode,
07471   gen_rtx_VEC_SELECT (V8HImode,
07472   operand1,
07473   gen_rtx_PARALLEL (VOIDmode,
07474   gen_rtvec (8,
07475     const0_rtx,
07476     GEN_INT (4LL),
07477     const1_rtx,
07478     GEN_INT (5LL),
07479     GEN_INT (2LL),
07480     GEN_INT (6LL),
07481     GEN_INT (3LL),
07482     GEN_INT (7LL)))),
07483   gen_rtx_VEC_SELECT (V8HImode,
07484   operand2,
07485   gen_rtx_PARALLEL (VOIDmode,
07486   gen_rtvec (8,
07487     GEN_INT (4LL),
07488     const0_rtx,
07489     GEN_INT (5LL),
07490     const1_rtx,
07491     GEN_INT (6LL),
07492     GEN_INT (2LL),
07493     GEN_INT (7LL),
07494     GEN_INT (3LL)))),
07495   GEN_INT (85LL)));
07496 }
07497 
07498 /* ../../gcc/gcc/config/i386/i386.md:21884 */
07499 rtx
07500 gen_sse2_punpckldq (operand0, operand1, operand2)
07501      rtx operand0;
07502      rtx operand1;
07503      rtx operand2;
07504 {
07505   return gen_rtx_SET (VOIDmode,
07506   operand0,
07507   gen_rtx_VEC_MERGE (V4SImode,
07508   gen_rtx_VEC_SELECT (V4SImode,
07509   operand1,
07510   gen_rtx_PARALLEL (VOIDmode,
07511   gen_rtvec (4,
07512     const0_rtx,
07513     GEN_INT (2LL),
07514     const1_rtx,
07515     GEN_INT (3LL)))),
07516   gen_rtx_VEC_SELECT (V4SImode,
07517   operand2,
07518   gen_rtx_PARALLEL (VOIDmode,
07519   gen_rtvec (4,
07520     GEN_INT (2LL),
07521     const0_rtx,
07522     GEN_INT (3LL),
07523     const1_rtx))),
07524   GEN_INT (5LL)));
07525 }
07526 
07527 /* ../../gcc/gcc/config/i386/i386.md:21899 */
07528 rtx
07529 gen_sse2_punpcklqdq (operand0, operand1, operand2)
07530      rtx operand0;
07531      rtx operand1;
07532      rtx operand2;
07533 {
07534   return gen_rtx_SET (VOIDmode,
07535   operand0,
07536   gen_rtx_VEC_MERGE (V2DImode,
07537   gen_rtx_VEC_SELECT (V2DImode,
07538   operand2,
07539   gen_rtx_PARALLEL (VOIDmode,
07540   gen_rtvec (2,
07541     const1_rtx,
07542     const0_rtx))),
07543   operand1,
07544   const1_rtx));
07545 }
07546 
07547 /* ../../gcc/gcc/config/i386/i386.md:21912 */
07548 rtx
07549 gen_sse2_punpckhqdq (operand0, operand1, operand2)
07550      rtx operand0;
07551      rtx operand1;
07552      rtx operand2;
07553 {
07554   return gen_rtx_SET (VOIDmode,
07555   operand0,
07556   gen_rtx_VEC_MERGE (V2DImode,
07557   operand1,
07558   gen_rtx_VEC_SELECT (V2DImode,
07559   operand2,
07560   gen_rtx_PARALLEL (VOIDmode,
07561   gen_rtvec (2,
07562     const1_rtx,
07563     const0_rtx))),
07564   const1_rtx));
07565 }
07566 
07567 /* ../../gcc/gcc/config/i386/i386.md:21927 */
07568 rtx
07569 gen_sse2_movapd (operand0, operand1)
07570      rtx operand0;
07571      rtx operand1;
07572 {
07573   return gen_rtx_SET (VOIDmode,
07574   operand0,
07575   gen_rtx_UNSPEC (V2DFmode,
07576   gen_rtvec (1,
07577     operand1),
07578   38));
07579 }
07580 
07581 /* ../../gcc/gcc/config/i386/i386.md:21937 */
07582 rtx
07583 gen_sse2_movupd (operand0, operand1)
07584      rtx operand0;
07585      rtx operand1;
07586 {
07587   return gen_rtx_SET (VOIDmode,
07588   operand0,
07589   gen_rtx_UNSPEC (V2DFmode,
07590   gen_rtvec (1,
07591     operand1),
07592   39));
07593 }
07594 
07595 /* ../../gcc/gcc/config/i386/i386.md:21947 */
07596 rtx
07597 gen_sse2_movdqa (operand0, operand1)
07598      rtx operand0;
07599      rtx operand1;
07600 {
07601   return gen_rtx_SET (VOIDmode,
07602   operand0,
07603   gen_rtx_UNSPEC (V16QImode,
07604   gen_rtvec (1,
07605     operand1),
07606   38));
07607 }
07608 
07609 /* ../../gcc/gcc/config/i386/i386.md:21957 */
07610 rtx
07611 gen_sse2_movdqu (operand0, operand1)
07612      rtx operand0;
07613      rtx operand1;
07614 {
07615   return gen_rtx_SET (VOIDmode,
07616   operand0,
07617   gen_rtx_UNSPEC (V16QImode,
07618   gen_rtvec (1,
07619     operand1),
07620   39));
07621 }
07622 
07623 /* ../../gcc/gcc/config/i386/i386.md:21967 */
07624 rtx
07625 gen_sse2_movdq2q (operand0, operand1)
07626      rtx operand0;
07627      rtx operand1;
07628 {
07629   return gen_rtx_SET (VOIDmode,
07630   operand0,
07631   gen_rtx_VEC_SELECT (DImode,
07632   operand1,
07633   gen_rtx_PARALLEL (VOIDmode,
07634   gen_rtvec (1,
07635     const0_rtx))));
07636 }
07637 
07638 /* ../../gcc/gcc/config/i386/i386.md:21978 */
07639 rtx
07640 gen_sse2_movdq2q_rex64 (operand0, operand1)
07641      rtx operand0;
07642      rtx operand1;
07643 {
07644   return gen_rtx_SET (VOIDmode,
07645   operand0,
07646   gen_rtx_VEC_SELECT (DImode,
07647   operand1,
07648   gen_rtx_PARALLEL (VOIDmode,
07649   gen_rtvec (1,
07650     const0_rtx))));
07651 }
07652 
07653 /* ../../gcc/gcc/config/i386/i386.md:21990 */
07654 rtx
07655 gen_sse2_movq2dq (operand0, operand1)
07656      rtx operand0;
07657      rtx operand1;
07658 {
07659   return gen_rtx_SET (VOIDmode,
07660   operand0,
07661   gen_rtx_VEC_CONCAT (V2DImode,
07662   operand1,
07663   const0_rtx));
07664 }
07665 
07666 /* ../../gcc/gcc/config/i386/i386.md:22001 */
07667 rtx
07668 gen_sse2_movq2dq_rex64 (operand0, operand1)
07669      rtx operand0;
07670      rtx operand1;
07671 {
07672   return gen_rtx_SET (VOIDmode,
07673   operand0,
07674   gen_rtx_VEC_CONCAT (V2DImode,
07675   operand1,
07676   const0_rtx));
07677 }
07678 
07679 /* ../../gcc/gcc/config/i386/i386.md:22013 */
07680 rtx
07681 gen_sse2_movq (operand0, operand1)
07682      rtx operand0;
07683      rtx operand1;
07684 {
07685   return gen_rtx_SET (VOIDmode,
07686   operand0,
07687   gen_rtx_VEC_CONCAT (V2DImode,
07688   gen_rtx_VEC_SELECT (DImode,
07689   operand1,
07690   gen_rtx_PARALLEL (VOIDmode,
07691   gen_rtvec (1,
07692     const0_rtx))),
07693   const0_rtx));
07694 }
07695 
07696 /* ../../gcc/gcc/config/i386/i386.md:22024 */
07697 rtx
07698 gen_sse2_loadd (operand0, operand1)
07699      rtx operand0;
07700      rtx operand1;
07701 {
07702   return gen_rtx_SET (VOIDmode,
07703   operand0,
07704   gen_rtx_VEC_MERGE (V4SImode,
07705   gen_rtx_VEC_DUPLICATE (V4SImode,
07706   operand1),
07707   gen_rtx_CONST_VECTOR (V4SImode,
07708   gen_rtvec (4,
07709     const0_rtx,
07710     const0_rtx,
07711     const0_rtx,
07712     const0_rtx)),
07713   const1_rtx));
07714 }
07715 
07716 /* ../../gcc/gcc/config/i386/i386.md:22038 */
07717 rtx
07718 gen_sse2_stored (operand0, operand1)
07719      rtx operand0;
07720      rtx operand1;
07721 {
07722   return gen_rtx_SET (VOIDmode,
07723   operand0,
07724   gen_rtx_VEC_SELECT (SImode,
07725   operand1,
07726   gen_rtx_PARALLEL (VOIDmode,
07727   gen_rtvec (1,
07728     const0_rtx))));
07729 }
07730 
07731 /* ../../gcc/gcc/config/i386/i386.md:22048 */
07732 rtx
07733 gen_sse2_movhpd (operand0, operand1, operand2)
07734      rtx operand0;
07735      rtx operand1;
07736      rtx operand2;
07737 {
07738   return gen_rtx_SET (VOIDmode,
07739   operand0,
07740   gen_rtx_VEC_MERGE (V2DFmode,
07741   operand1,
07742   operand2,
07743   GEN_INT (2LL)));
07744 }
07745 
07746 /* ../../gcc/gcc/config/i386/i386.md:22059 */
07747 rtx
07748 gen_sse2_movlpd (operand0, operand1, operand2)
07749      rtx operand0;
07750      rtx operand1;
07751      rtx operand2;
07752 {
07753   return gen_rtx_SET (VOIDmode,
07754   operand0,
07755   gen_rtx_VEC_MERGE (V2DFmode,
07756   operand1,
07757   operand2,
07758   const1_rtx));
07759 }
07760 
07761 /* ../../gcc/gcc/config/i386/i386.md:22080 */
07762 rtx
07763 gen_sse2_loadsd_1 (operand0, operand1, operand2)
07764      rtx operand0;
07765      rtx operand1;
07766      rtx operand2;
07767 {
07768   return gen_rtx_SET (VOIDmode,
07769   operand0,
07770   gen_rtx_VEC_MERGE (V2DFmode,
07771   gen_rtx_VEC_DUPLICATE (V2DFmode,
07772   operand1),
07773   operand2,
07774   const1_rtx));
07775 }
07776 
07777 /* ../../gcc/gcc/config/i386/i386.md:22091 */
07778 rtx
07779 gen_sse2_movsd (operand0, operand1, operand2)
07780      rtx operand0;
07781      rtx operand1;
07782      rtx operand2;
07783 {
07784   return gen_rtx_SET (VOIDmode,
07785   operand0,
07786   gen_rtx_VEC_MERGE (V2DFmode,
07787   operand1,
07788   operand2,
07789   const1_rtx));
07790 }
07791 
07792 /* ../../gcc/gcc/config/i386/i386.md:22102 */
07793 rtx
07794 gen_sse2_storesd (operand0, operand1)
07795      rtx operand0;
07796      rtx operand1;
07797 {
07798   return gen_rtx_SET (VOIDmode,
07799   operand0,
07800   gen_rtx_VEC_SELECT (DFmode,
07801   operand1,
07802   gen_rtx_PARALLEL (VOIDmode,
07803   gen_rtvec (1,
07804     const0_rtx))));
07805 }
07806 
07807 /* ../../gcc/gcc/config/i386/i386.md:22112 */
07808 rtx
07809 gen_sse2_shufpd (operand0, operand1, operand2, operand3)
07810      rtx operand0;
07811      rtx operand1;
07812      rtx operand2;
07813      rtx operand3;
07814 {
07815   return gen_rtx_SET (VOIDmode,
07816   operand0,
07817   gen_rtx_UNSPEC (V2DFmode,
07818   gen_rtvec (3,
07819     operand1,
07820     operand2,
07821     operand3),
07822   41));
07823 }
07824 
07825 /* ../../gcc/gcc/config/i386/i386.md:22124 */
07826 rtx
07827 gen_sse2_clflush (operand0)
07828      rtx operand0;
07829 {
07830   return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
07831   gen_rtvec (1,
07832     operand0),
07833   57);
07834 }
07835 
07836 /* ../../gcc/gcc/config/i386/i386.md:22168 */
07837 rtx
07838 gen_mwait (operand0, operand1)
07839      rtx operand0;
07840      rtx operand1;
07841 {
07842   return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
07843   gen_rtvec (2,
07844     operand0,
07845     operand1),
07846   70);
07847 }
07848 
07849 /* ../../gcc/gcc/config/i386/i386.md:22176 */
07850 rtx
07851 gen_monitor (operand0, operand1, operand2)
07852      rtx operand0;
07853      rtx operand1;
07854      rtx operand2;
07855 {
07856   return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
07857   gen_rtvec (3,
07858     operand0,
07859     operand1,
07860     operand2),
07861   69);
07862 }
07863 
07864 /* ../../gcc/gcc/config/i386/i386.md:22187 */
07865 rtx
07866 gen_addsubv4sf3 (operand0, operand1, operand2)
07867      rtx operand0;
07868      rtx operand1;
07869      rtx operand2;
07870 {
07871   return gen_rtx_SET (VOIDmode,
07872   operand0,
07873   gen_rtx_UNSPEC (V4SFmode,
07874   gen_rtvec (2,
07875     operand1,
07876     operand2),
07877   71));
07878 }
07879 
07880 /* ../../gcc/gcc/config/i386/i386.md:22197 */
07881 rtx
07882 gen_addsubv2df3 (operand0, operand1, operand2)
07883      rtx operand0;
07884      rtx operand1;
07885      rtx operand2;
07886 {
07887   return gen_rtx_SET (VOIDmode,
07888   operand0,
07889   gen_rtx_UNSPEC (V2DFmode,
07890   gen_rtvec (2,
07891     operand1,
07892     operand2),
07893   71));
07894 }
07895 
07896 /* ../../gcc/gcc/config/i386/i386.md:22207 */
07897 rtx
07898 gen_haddv4sf3 (operand0, operand1, operand2)
07899      rtx operand0;
07900      rtx operand1;
07901      rtx operand2;
07902 {
07903   return gen_rtx_SET (VOIDmode,
07904   operand0,
07905   gen_rtx_UNSPEC (V4SFmode,
07906   gen_rtvec (2,
07907     operand1,
07908     operand2),
07909   72));
07910 }
07911 
07912 /* ../../gcc/gcc/config/i386/i386.md:22217 */
07913 rtx
07914 gen_haddv2df3 (operand0, operand1, operand2)
07915      rtx operand0;
07916      rtx operand1;
07917      rtx operand2;
07918 {
07919   return gen_rtx_SET (VOIDmode,
07920   operand0,
07921   gen_rtx_UNSPEC (V2DFmode,
07922   gen_rtvec (2,
07923     operand1,
07924     operand2),
07925   72));
07926 }
07927 
07928 /* ../../gcc/gcc/config/i386/i386.md:22227 */
07929 rtx
07930 gen_hsubv4sf3 (operand0, operand1, operand2)
07931      rtx operand0;
07932      rtx operand1;
07933      rtx operand2;
07934 {
07935   return gen_rtx_SET (VOIDmode,
07936   operand0,
07937   gen_rtx_UNSPEC (V4SFmode,
07938   gen_rtvec (2,
07939     operand1,
07940     operand2),
07941   73));
07942 }
07943 
07944 /* ../../gcc/gcc/config/i386/i386.md:22237 */
07945 rtx
07946 gen_hsubv2df3 (operand0, operand1, operand2)
07947      rtx operand0;
07948      rtx operand1;
07949      rtx operand2;
07950 {
07951   return gen_rtx_SET (VOIDmode,
07952   operand0,
07953   gen_rtx_UNSPEC (V2DFmode,
07954   gen_rtvec (2,
07955     operand1,
07956     operand2),
07957   73));
07958 }
07959 
07960 /* ../../gcc/gcc/config/i386/i386.md:22247 */
07961 rtx
07962 gen_movshdup (operand0, operand1)
07963      rtx operand0;
07964      rtx operand1;
07965 {
07966   return gen_rtx_SET (VOIDmode,
07967   operand0,
07968   gen_rtx_UNSPEC (V4SFmode,
07969   gen_rtvec (1,
07970     operand1),
07971   74));
07972 }
07973 
07974 /* ../../gcc/gcc/config/i386/i386.md:22256 */
07975 rtx
07976 gen_movsldup (operand0, operand1)
07977      rtx operand0;
07978      rtx operand1;
07979 {
07980   return gen_rtx_SET (VOIDmode,
07981   operand0,
07982   gen_rtx_UNSPEC (V4SFmode,
07983   gen_rtvec (1,
07984     operand1),
07985   75));
07986 }
07987 
07988 /* ../../gcc/gcc/config/i386/i386.md:22265 */
07989 rtx
07990 gen_lddqu (operand0, operand1)
07991      rtx operand0;
07992      rtx operand1;
07993 {
07994   return gen_rtx_SET (VOIDmode,
07995   operand0,
07996   gen_rtx_UNSPEC (V16QImode,
07997   gen_rtvec (1,
07998     operand1),
07999   76));
08000 }
08001 
08002 /* ../../gcc/gcc/config/i386/i386.md:22274 */
08003 rtx
08004 gen_loadddup (operand0, operand1)
08005      rtx operand0;
08006      rtx operand1;
08007 {
08008   return gen_rtx_SET (VOIDmode,
08009   operand0,
08010   gen_rtx_VEC_DUPLICATE (V2DFmode,
08011   operand1));
08012 }
08013 
08014 /* ../../gcc/gcc/config/i386/i386.md:22282 */
08015 rtx
08016 gen_movddup (operand0, operand1)
08017      rtx operand0;
08018      rtx operand1;
08019 {
08020   return gen_rtx_SET (VOIDmode,
08021   operand0,
08022   gen_rtx_VEC_DUPLICATE (V2DFmode,
08023   gen_rtx_VEC_SELECT (DFmode,
08024   operand1,
08025   gen_rtx_PARALLEL (VOIDmode,
08026   gen_rtvec (1,
08027     const0_rtx)))));
08028 }
08029 
08030 /* ../../gcc/gcc/config/i386/i386.md:392 */
08031 rtx
08032 gen_cmpdi (operand0, operand1)
08033      rtx operand0;
08034      rtx operand1;
08035 {
08036   rtx _val = 0;
08037   start_sequence ();
08038   {
08039     rtx operands[2];
08040     operands[0] = operand0;
08041     operands[1] = operand1;
08042 {
08043   if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
08044     operands[0] = force_reg (DImode, operands[0]);
08045   ix86_compare_op0 = operands[0];
08046   ix86_compare_op1 = operands[1];
08047   DONE;
08048 }
08049     operand0 = operands[0];
08050     operand1 = operands[1];
08051   }
08052   emit_insn (gen_rtx_SET (VOIDmode,
08053   gen_rtx_REG (CCmode,
08054   17),
08055   gen_rtx_COMPARE (CCmode,
08056   operand0,
08057   operand1)));
08058   _val = get_insns ();
08059   end_sequence ();
08060   return _val;
08061 }
08062 
08063 /* ../../gcc/gcc/config/i386/i386.md:405 */
08064 rtx
08065 gen_cmpsi (operand0, operand1)
08066      rtx operand0;
08067      rtx operand1;
08068 {
08069   rtx _val = 0;
08070   start_sequence ();
08071   {
08072     rtx operands[2];
08073     operands[0] = operand0;
08074     operands[1] = operand1;
08075 {
08076   if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
08077     operands[0] = force_reg (SImode, operands[0]);
08078   ix86_compare_op0 = operands[0];
08079   ix86_compare_op1 = operands[1];
08080   DONE;
08081 }
08082     operand0 = operands[0];
08083     operand1 = operands[1];
08084   }
08085   emit_insn (gen_rtx_SET (VOIDmode,
08086   gen_rtx_REG (CCmode,
08087   17),
08088   gen_rtx_COMPARE (CCmode,
08089   operand0,
08090   operand1)));
08091   _val = get_insns ();
08092   end_sequence ();
08093   return _val;
08094 }
08095 
08096 /* ../../gcc/gcc/config/i386/i386.md:418 */
08097 rtx
08098 gen_cmphi (operand0, operand1)
08099      rtx operand0;
08100      rtx operand1;
08101 {
08102   rtx _val = 0;
08103   start_sequence ();
08104   {
08105     rtx operands[2];
08106     operands[0] = operand0;
08107     operands[1] = operand1;
08108 {
08109   if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
08110     operands[0] = force_reg (HImode, operands[0]);
08111   ix86_compare_op0 = operands[0];
08112   ix86_compare_op1 = operands[1];
08113   DONE;
08114 }
08115     operand0 = operands[0];
08116     operand1 = operands[1];
08117   }
08118   emit_insn (gen_rtx_SET (VOIDmode,
08119   gen_rtx_REG (CCmode,
08120   17),
08121   gen_rtx_COMPARE (CCmode,
08122   operand0,
08123   operand1)));
08124   _val = get_insns ();
08125   end_sequence ();
08126   return _val;
08127 }
08128 
08129 /* ../../gcc/gcc/config/i386/i386.md:431 */
08130 rtx
08131 gen_cmpqi (operand0, operand1)
08132      rtx operand0;
08133      rtx operand1;
08134 {
08135   rtx _val = 0;
08136   start_sequence ();
08137   {
08138     rtx operands[2];
08139     operands[0] = operand0;
08140     operands[1] = operand1;
08141 {
08142   if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
08143     operands[0] = force_reg (QImode, operands[0]);
08144   ix86_compare_op0 = operands[0];
08145   ix86_compare_op1 = operands[1];
08146   DONE;
08147 }
08148     operand0 = operands[0];
08149     operand1 = operands[1];
08150   }
08151   emit_insn (gen_rtx_SET (VOIDmode,
08152   gen_rtx_REG (CCmode,
08153   17),
08154   gen_rtx_COMPARE (CCmode,
08155   operand0,
08156   operand1)));
08157   _val = get_insns ();
08158   end_sequence ();
08159   return _val;
08160 }
08161 
08162 /* ../../gcc/gcc/config/i386/i386.md:466 */
08163 rtx
08164 gen_cmpdi_1_rex64 (operand0, operand1)
08165      rtx operand0;
08166      rtx operand1;
08167 {
08168   return gen_rtx_SET (VOIDmode,
08169   gen_rtx_REG (CCmode,
08170   17),
08171   gen_rtx_COMPARE (CCmode,
08172   operand0,
08173   operand1));
08174 }
08175 
08176 /* ../../gcc/gcc/config/i386/i386.md:505 */
08177 rtx
08178 gen_cmpsi_1 (operand0, operand1)
08179      rtx operand0;
08180      rtx operand1;
08181 {
08182   return gen_rtx_SET (VOIDmode,
08183   gen_rtx_REG (CCmode,
08184   17),
08185   gen_rtx_COMPARE (CCmode,
08186   operand0,
08187   operand1));
08188 }
08189 
08190 /* ../../gcc/gcc/config/i386/i386.md:629 */
08191 rtx
08192 gen_cmpqi_ext_3 (operand0, operand1)
08193      rtx operand0;
08194      rtx operand1;
08195 {
08196   return gen_rtx_SET (VOIDmode,
08197   gen_rtx_REG (CCmode,
08198   17),
08199   gen_rtx_COMPARE (CCmode,
08200   gen_rtx_SUBREG (QImode,
08201   gen_rtx_ZERO_EXTRACT (SImode,
08202   operand0,
08203   GEN_INT (8LL),
08204   GEN_INT (8LL)),
08205   0),
08206   operand1));
08207 }
08208 
08209 /* ../../gcc/gcc/config/i386/i386.md:692 */
08210 rtx
08211 gen_cmpxf (operand0, operand1)
08212      rtx operand0;
08213      rtx operand1;
08214 {
08215   rtx _val = 0;
08216   start_sequence ();
08217   {
08218     rtx operands[2];
08219     operands[0] = operand0;
08220     operands[1] = operand1;
08221 {
08222   ix86_compare_op0 = operands[0];
08223   ix86_compare_op1 = operands[1];
08224   DONE;
08225 }
08226     operand0 = operands[0];
08227     operand1 = operands[1];
08228   }
08229   emit_insn (gen_rtx_SET (VOIDmode,
08230   gen_rtx_REG (CCmode,
08231   17),
08232   gen_rtx_COMPARE (CCmode,
08233   operand0,
08234   operand1)));
08235   _val = get_insns ();
08236   end_sequence ();
08237   return _val;
08238 }
08239 
08240 /* ../../gcc/gcc/config/i386/i386.md:703 */
08241 rtx
08242 gen_cmptf (operand0, operand1)
08243      rtx operand0;
08244      rtx operand1;
08245 {
08246   rtx _val = 0;
08247   start_sequence ();
08248   {
08249     rtx operands[2];
08250     operands[0] = operand0;
08251     operands[1] = operand1;
08252 {
08253   ix86_compare_op0 = operands[0];
08254   ix86_compare_op1 = operands[1];
08255   DONE;
08256 }
08257     operand0 = operands[0];
08258     operand1 = operands[1];
08259   }
08260   emit_insn (gen_rtx_SET (VOIDmode,
08261   gen_rtx_REG (CCmode,
08262   17),
08263   gen_rtx_COMPARE (CCmode,
08264   operand0,
08265   operand1)));
08266   _val = get_insns ();
08267   end_sequence ();
08268   return _val;
08269 }
08270 
08271 /* ../../gcc/gcc/config/i386/i386.md:714 */
08272 rtx
08273 gen_cmpdf (operand0, operand1)
08274      rtx operand0;
08275      rtx operand1;
08276 {
08277   rtx _val = 0;
08278   start_sequence ();
08279   {
08280     rtx operands[2];
08281     operands[0] = operand0;
08282     operands[1] = operand1;
08283 {
08284   ix86_compare_op0 = operands[0];
08285   ix86_compare_op1 = operands[1];
08286   DONE;
08287 }
08288     operand0 = operands[0];
08289     operand1 = operands[1];
08290   }
08291   emit_insn (gen_rtx_SET (VOIDmode,
08292   gen_rtx_REG (CCmode,
08293   17),
08294   gen_rtx_COMPARE (CCmode,
08295   operand0,
08296   operand1)));
08297   _val = get_insns ();
08298   end_sequence ();
08299   return _val;
08300 }
08301 
08302 /* ../../gcc/gcc/config/i386/i386.md:725 */
08303 rtx
08304 gen_cmpsf (operand0, operand1)
08305      rtx operand0;
08306      rtx operand1;
08307 {
08308   rtx _val = 0;
08309   start_sequence ();
08310   {
08311     rtx operands[2];
08312     operands[0] = operand0;
08313     operands[1] = operand1;
08314 {
08315   ix86_compare_op0 = operands[0];
08316   ix86_compare_op1 = operands[1];
08317   DONE;
08318 }
08319     operand0 = operands[0];
08320     operand1 = operands[1];
08321   }
08322   emit_insn (gen_rtx_SET (VOIDmode,
08323   gen_rtx_REG (CCmode,
08324   17),
08325   gen_rtx_COMPARE (CCmode,
08326   operand0,
08327   operand1)));
08328   _val = get_insns ();
08329   end_sequence ();
08330   return _val;
08331 }
08332 
08333 /* ../../gcc/gcc/config/i386/i386.md:1028 */
08334 rtx
08335 gen_movsi (operand0, operand1)
08336      rtx operand0;
08337      rtx operand1;
08338 {
08339   rtx _val = 0;
08340   start_sequence ();
08341   {
08342     rtx operands[2];
08343     operands[0] = operand0;
08344     operands[1] = operand1;
08345 ix86_expand_move (SImode, operands); DONE;
08346     operand0 = operands[0];
08347     operand1 = operands[1];
08348   }
08349   emit_insn (gen_rtx_SET (VOIDmode,
08350   operand0,
08351   operand1));
08352   _val = get_insns ();
08353   end_sequence ();
08354   return _val;
08355 }
08356 
08357 /* ../../gcc/gcc/config/i386/i386.md:1198 */
08358 rtx
08359 gen_movhi (operand0, operand1)
08360      rtx operand0;
08361      rtx operand1;
08362 {
08363   rtx _val = 0;
08364   start_sequence ();
08365   {
08366     rtx operands[2];
08367     operands[0] = operand0;
08368     operands[1] = operand1;
08369 ix86_expand_move (HImode, operands); DONE;
08370     operand0 = operands[0];
08371     operand1 = operands[1];
08372   }
08373   emit_insn (gen_rtx_SET (VOIDmode,
08374   operand0,
08375   operand1));
08376   _val = get_insns ();
08377   end_sequence ();
08378   return _val;
08379 }
08380 
08381 /* ../../gcc/gcc/config/i386/i386.md:1329 */
08382 rtx
08383 gen_movstricthi (operand0, operand1)
08384      rtx operand0;
08385      rtx operand1;
08386 {
08387   rtx _val = 0;
08388   start_sequence ();
08389   {
08390     rtx operands[2];
08391     operands[0] = operand0;
08392     operands[1] = operand1;
08393 {
08394   /* Don't generate memory->memory moves, go through a register */
08395   if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
08396     operands[1] = force_reg (HImode, operands[1]);
08397 }
08398     operand0 = operands[0];
08399     operand1 = operands[1];
08400   }
08401   emit_insn (gen_rtx_SET (VOIDmode,
08402   gen_rtx_STRICT_LOW_PART (VOIDmode,
08403   operand0),
08404   operand1));
08405   _val = get_insns ();
08406   end_sequence ();
08407   return _val;
08408 }
08409 
08410 /* ../../gcc/gcc/config/i386/i386.md:1359 */
08411 rtx
08412 gen_movqi (operand0, operand1)
08413      rtx operand0;
08414      rtx operand1;
08415 {
08416   rtx _val = 0;
08417   start_sequence ();
08418   {
08419     rtx operands[2];
08420     operands[0] = operand0;
08421     operands[1] = operand1;
08422 ix86_expand_move (QImode, operands); DONE;
08423     operand0 = operands[0];
08424     operand1 = operands[1];
08425   }
08426   emit_insn (gen_rtx_SET (VOIDmode,
08427   operand0,
08428   operand1));
08429   _val = get_insns ();
08430   end_sequence ();
08431   return _val;
08432 }
08433 
08434 /* ../../gcc/gcc/config/i386/i386.md:1454 */
08435 rtx
08436 gen_reload_outqi (operand0, operand1, operand2)
08437      rtx operand0;
08438      rtx operand1;
08439      rtx operand2;
08440 {
08441   rtx _val = 0;
08442   start_sequence ();
08443   {
08444     rtx operands[3];
08445     operands[0] = operand0;
08446     operands[1] = operand1;
08447     operands[2] = operand2;
08448 {
08449   rtx op0, op1, op2;
08450   op0 = operands[0]; op1 = operands[1]; op2 = operands[2];
08451 
08452   if (reg_overlap_mentioned_p (op2, op0))
08453     abort ();
08454   if (! q_regs_operand (op1, QImode))
08455     {
08456       emit_insn (gen_movqi (op2, op1));
08457       op1 = op2;
08458     }
08459   emit_insn (gen_movqi (op0, op1));
08460   DONE;
08461 }
08462     operand0 = operands[0];
08463     operand1 = operands[1];
08464     operand2 = operands[2];
08465   }
08466   emit (gen_rtx_PARALLEL (VOIDmode,
08467   gen_rtvec (3,
08468     operand0,
08469     operand1,
08470     operand2)));
08471   _val = get_insns ();
08472   end_sequence ();
08473   return _val;
08474 }
08475 
08476 /* ../../gcc/gcc/config/i386/i386.md:1487 */
08477 rtx
08478 gen_movstrictqi (operand0, operand1)
08479      rtx operand0;
08480      rtx operand1;
08481 {
08482   rtx _val = 0;
08483   start_sequence ();
08484   {
08485     rtx operands[2];
08486     operands[0] = operand0;
08487     operands[1] = operand1;
08488 {
08489   /* Don't generate memory->memory moves, go through a register.  */
08490   if (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM)
08491     operands[1] = force_reg (QImode, operands[1]);
08492 }
08493     operand0 = operands[0];
08494     operand1 = operands[1];
08495   }
08496   emit_insn (gen_rtx_SET (VOIDmode,
08497   gen_rtx_STRICT_LOW_PART (VOIDmode,
08498   operand0),
08499   operand1));
08500   _val = get_insns ();
08501   end_sequence ();
08502   return _val;
08503 }
08504 
08505 /* ../../gcc/gcc/config/i386/i386.md:1716 */
08506 rtx
08507 gen_movdi (operand0, operand1)
08508      rtx operand0;
08509      rtx operand1;
08510 {
08511   rtx _val = 0;
08512   start_sequence ();
08513   {
08514     rtx operands[2];
08515     operands[0] = operand0;
08516     operands[1] = operand1;
08517 ix86_expand_move (DImode, operands); DONE;
08518     operand0 = operands[0];
08519     operand1 = operands[1];
08520   }
08521   emit_insn (gen_rtx_SET (VOIDmode,
08522   operand0,
08523   operand1));
08524   _val = get_insns ();
08525   end_sequence ();
08526   return _val;
08527 }
08528 
08529 /* ../../gcc/gcc/config/i386/i386.md:1742 */
08530 extern rtx gen_peephole2_1054 PARAMS ((rtx, rtx *));
08531 rtx
08532 gen_peephole2_1054 (curr_insn, operands)
08533      rtx curr_insn ATTRIBUTE_UNUSED;
08534      rtx *operands;
08535 {
08536   rtx operand0;
08537   rtx operand1;
08538   rtx operand2;
08539   rtx _val = 0;
08540   HARD_REG_SET _regs_allocated;
08541   CLEAR_HARD_REG_SET (_regs_allocated);
08542   if ((operands[2] = peep2_find_free_register (0, 0, "r", DImode, &_regs_allocated)) == NULL_RTX)
08543     return NULL;
08544   start_sequence ();
08545 
08546   operand0 = operands[0];
08547   operand1 = operands[1];
08548   operand2 = operands[2];
08549   emit_insn (gen_rtx_SET (VOIDmode,
08550   operand2,
08551   operand1));
08552   emit_insn (gen_rtx_SET (VOIDmode,
08553   operand0,
08554   copy_rtx (operand2)));
08555   _val = get_insns ();
08556   end_sequence ();
08557   return _val;
08558 }
08559 
08560 /* ../../gcc/gcc/config/i386/i386.md:1754 */
08561 extern rtx gen_peephole2_1055 PARAMS ((rtx, rtx *));
08562 rtx
08563 gen_peephole2_1055 (curr_insn, operands)
08564      rtx curr_insn ATTRIBUTE_UNUSED;
08565      rtx *operands;
08566 {
08567   rtx operand0;
08568   rtx operand1;
08569   rtx operand2;
08570   rtx operand3;
08571   rtx _val = 0;
08572   HARD_REG_SET _regs_allocated;
08573   CLEAR_HARD_REG_SET (_regs_allocated);
08574   start_sequence ();
08575 split_di (operands + 1, 1, operands + 2, operands + 3);
08576    operands[1] = gen_lowpart (DImode, operands[2]);
08577    operands[2] = gen_rtx_MEM (SImode, gen_rtx_PLUS (DImode, stack_pointer_rtx,
08578                 GEN_INT (4)));
08579   
08580   operand0 = operands[0];
08581   operand1 = operands[1];
08582   operand2 = operands[2];
08583   operand3 = operands[3];
08584   emit_insn (gen_rtx_SET (VOIDmode,
08585   operand0,
08586   operand1));
08587   emit_insn (gen_rtx_SET (VOIDmode,
08588   operand2,
08589   operand3));
08590   _val = get_insns ();
08591   end_sequence ();
08592   return _val;
08593 }
08594 
08595 /* ../../gcc/gcc/config/i386/i386.md:1767 */
08596 extern rtx gen_split_1056 PARAMS ((rtx *));
08597 rtx
08598 gen_split_1056 (operands)
08599       rtx *operands;
08600 {
08601   rtx operand0;
08602   rtx operand1;
08603   rtx operand2;
08604   rtx operand3;
08605   rtx _val = 0;
08606   start_sequence ();
08607 split_di (operands + 1, 1, operands + 2, operands + 3);
08608    operands[1] = gen_lowpart (DImode, operands[2]);
08609    operands[2] = gen_rtx_MEM (SImode, gen_rtx_PLUS (DImode, stack_pointer_rtx,
08610                 GEN_INT (4)));
08611   
08612   operand0 = operands[0];
08613   operand1 = operands[1];
08614   operand2 = operands[2];
08615   operand3 = operands[3];
08616   emit_insn (gen_rtx_SET (VOIDmode,
08617   operand0,
08618   operand1));
08619   emit_insn (gen_rtx_SET (VOIDmode,
08620   operand2,
08621   operand3));
08622   _val = get_insns ();
08623   end_sequence ();
08624   return _val;
08625 }
08626 
08627 /* ../../gcc/gcc/config/i386/i386.md:1854 */
08628 extern rtx gen_split_1057 PARAMS ((rtx *));
08629 rtx
08630 gen_split_1057 (operands)
08631       rtx *operands ATTRIBUTE_UNUSED;
08632 {
08633   rtx _val = 0;
08634   start_sequence ();
08635 ix86_split_long_move (operands); DONE;
08636   emit_insn (const0_rtx);
08637   _val = get_insns ();
08638   end_sequence ();
08639   return _val;
08640 }
08641 
08642 /* ../../gcc/gcc/config/i386/i386.md:1863 */
08643 extern rtx gen_split_1058 PARAMS ((rtx *));
08644 rtx
08645 gen_split_1058 (operands)
08646       rtx *operands ATTRIBUTE_UNUSED;
08647 {
08648   rtx _val = 0;
08649   start_sequence ();
08650 ix86_split_long_move (operands); DONE;
08651   emit_insn (const0_rtx);
08652   _val = get_insns ();
08653   end_sequence ();
08654   return _val;
08655 }
08656 
08657 /* ../../gcc/gcc/config/i386/i386.md:1952 */
08658 extern rtx gen_peephole2_1059 PARAMS ((rtx, rtx *));
08659 rtx
08660 gen_peephole2_1059 (curr_insn, operands)
08661      rtx curr_insn ATTRIBUTE_UNUSED;
08662      rtx *operands;
08663 {
08664   rtx operand0;
08665   rtx operand1;
08666   rtx operand2;
08667   rtx _val = 0;
08668   HARD_REG_SET _regs_allocated;
08669   CLEAR_HARD_REG_SET (_regs_allocated);
08670   if ((operands[2] = peep2_find_free_register (0, 0, "r", DImode, &_regs_allocated)) == NULL_RTX)
08671     return NULL;
08672   start_sequence ();
08673 
08674   operand0 = operands[0];
08675   operand1 = operands[1];
08676   operand2 = operands[2];
08677   emit_insn (gen_rtx_SET (VOIDmode,
08678   operand2,
08679   operand1));
08680   emit_insn (gen_rtx_SET (VOIDmode,
08681   operand0,
08682   copy_rtx (operand2)));
08683   _val = get_insns ();
08684   end_sequence ();
08685   return _val;
08686 }
08687 
08688 /* ../../gcc/gcc/config/i386/i386.md:1964 */
08689 extern rtx gen_peephole2_1060 PARAMS ((rtx, rtx *));
08690 rtx
08691 gen_peephole2_1060 (curr_insn, operands)
08692      rtx curr_insn ATTRIBUTE_UNUSED;
08693      rtx *operands;
08694 {
08695   rtx operand0;
08696   rtx operand1;
08697   rtx operand2;
08698   rtx operand3;
08699   rtx operand4;
08700   rtx operand5;
08701   rtx _val = 0;
08702   HARD_REG_SET _regs_allocated;
08703   CLEAR_HARD_REG_SET (_regs_allocated);
08704   start_sequence ();
08705 split_di (operands, 2, operands + 2, operands + 4);
08706   operand0 = operands[0];
08707   operand1 = operands[1];
08708   operand2 = operands[2];
08709   operand3 = operands[3];
08710   operand4 = operands[4];
08711   operand5 = operands[5];
08712   emit_insn (gen_rtx_SET (VOIDmode,
08713   operand2,
08714   operand3));
08715   emit_insn (gen_rtx_SET (VOIDmode,
08716   operand4,
08717   operand5));
08718   _val = get_insns ();
08719   end_sequence ();
08720   return _val;
08721 }
08722 
08723 /* ../../gcc/gcc/config/i386/i386.md:1973 */
08724 extern rtx gen_split_1061 PARAMS ((rtx *));
08725 rtx
08726 gen_split_1061 (operands)
08727       rtx *operands;
08728 {
08729   rtx operand0;
08730   rtx operand1;
08731   rtx operand2;
08732   rtx operand3;
08733   rtx operand4;
08734   rtx operand5;
08735   rtx _val = 0;
08736   start_sequence ();
08737 split_di (operands, 2, operands + 2, operands + 4);
08738   operand0 = operands[0];
08739   operand1 = operands[1];
08740   operand2 = operands[2];
08741   operand3 = operands[3];
08742   operand4 = operands[4];
08743   operand5 = operands[5];
08744   emit_insn (gen_rtx_SET (VOIDmode,
08745   operand2,
08746   operand3));
08747   emit_insn (gen_rtx_SET (VOIDmode,
08748   operand4,
08749   operand5));
08750   _val = get_insns ();
08751   end_sequence ();
08752   return _val;
08753 }
08754 
08755 /* ../../gcc/gcc/config/i386/i386.md:1998 */
08756 rtx
08757 gen_movsf (operand0, operand1)
08758      rtx operand0;
08759      rtx operand1;
08760 {
08761   rtx _val = 0;
08762   start_sequence ();
08763   {
08764     rtx operands[2];
08765     operands[0] = operand0;
08766     operands[1] = operand1;
08767 ix86_expand_move (SFmode, operands); DONE;
08768     operand0 = operands[0];
08769     operand1 = operands[1];
08770   }
08771   emit_insn (gen_rtx_SET (VOIDmode,
08772   operand0,
08773   operand1));
08774   _val = get_insns ();
08775   end_sequence ();
08776   return _val;
08777 }
08778 
08779 /* ../../gcc/gcc/config/i386/i386.md:2063 */
08780 extern rtx gen_split_1063 PARAMS ((rtx *));
08781 rtx
08782 gen_split_1063 (operands)
08783       rtx *operands;
08784 {
08785   rtx operand0;
08786   rtx operand1;
08787   rtx _val = 0;
08788   start_sequence ();
08789 operands[1] = get_pool_constant (XEXP (operands[1], 0));
08790   operand0 = operands[0];
08791   operand1 = operands[1];
08792   emit_insn (gen_rtx_SET (VOIDmode,
08793   operand0,
08794   operand1));
08795   _val = get_insns ();
08796   end_sequence ();
08797   return _val;
08798 }
08799 
08800 /* ../../gcc/gcc/config/i386/i386.md:2076 */
08801 extern rtx gen_split_1064 PARAMS ((rtx *));
08802 rtx
08803 gen_split_1064 (operands)
08804       rtx *operands;
08805 {
08806   rtx operand0;
08807   rtx operand1;
08808   rtx _val = 0;
08809   start_sequence ();
08810   operand0 = operands[0];
08811   operand1 = operands[1];
08812   emit_insn (gen_rtx_SET (VOIDmode,
08813   gen_rtx_REG (SImode,
08814   7),
08815   gen_rtx_PLUS (SImode,
08816   gen_rtx_REG (SImode,
08817   7),
08818   GEN_INT (-4LL))));
08819   emit_insn (gen_rtx_SET (VOIDmode,
08820   gen_rtx_MEM (SFmode,
08821   gen_rtx_REG (SImode,
08822   7)),
08823   operand1));
08824   _val = get_insns ();
08825   end_sequence ();
08826   return _val;
08827 }
08828 
08829 /* ../../gcc/gcc/config/i386/i386.md:2083 */
08830 extern rtx gen_split_1065 PARAMS ((rtx *));
08831 rtx
08832 gen_split_1065 (operands)
08833       rtx *operands;
08834 {
08835   rtx operand0;
08836