osprey/kg++fe/gnu/config/alpha/alpha.h File Reference

Go to the source code of this file.

Data Types
type	alpha_compare
Defines
#define	CPLUSPLUS_CPP_SPEC   "\-D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus \%(cpp) \"
#define	CPP_SPEC   "\%{!undef:\%{.S:-D__LANGUAGE_ASSEMBLY__ -D__LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY }}\%{.m:-D__LANGUAGE_OBJECTIVE_C__ -D__LANGUAGE_OBJECTIVE_C }\%{!.S:%{!.cc:%{!.cxx:%{!.cpp:%{!.cp:%{!.c++:%{!.C:%{!.m:-D__LANGUAGE_C__ -D__LANGUAGE_C %{!ansi:-DLANGUAGE_C }}}}}}}}}\%{mieee:-D_IEEE_FP }\%{mieee-with-inexact:-D_IEEE_FP -D_IEEE_FP_INEXACT }}\%(cpp_cpu) %(cpp_subtarget)"
#define	CPP_SUBTARGET_SPEC   ""
#define	WORD_SWITCH_TAKES_ARG(STR)   (!strcmp (STR, "rpath") || DEFAULT_WORD_SWITCH_TAKES_ARG(STR))
#define	TARGET_VERSION
#define	MASK_FP   (1 << 0)
#define	TARGET_FP   (target_flags & MASK_FP)
#define	MASK_FPREGS   (1 << 1)
#define	TARGET_FPREGS   (target_flags & MASK_FPREGS)
#define	MASK_GAS   (1 << 2)
#define	TARGET_GAS   (target_flags & MASK_GAS)
#define	MASK_IEEE_CONFORMANT   (1 << 3)
#define	TARGET_IEEE_CONFORMANT   (target_flags & MASK_IEEE_CONFORMANT)
#define	MASK_IEEE   (1 << 4)
#define	TARGET_IEEE   (target_flags & MASK_IEEE)
#define	MASK_IEEE_WITH_INEXACT   (1 << 5)
#define	TARGET_IEEE_WITH_INEXACT   (target_flags & MASK_IEEE_WITH_INEXACT)
#define	MASK_BUILD_CONSTANTS   (1 << 6)
#define	TARGET_BUILD_CONSTANTS   (target_flags & MASK_BUILD_CONSTANTS)
#define	MASK_FLOAT_VAX   (1 << 7)
#define	TARGET_FLOAT_VAX   (target_flags & MASK_FLOAT_VAX)
#define	MASK_BWX   (1 << 8)
#define	TARGET_BWX   (target_flags & MASK_BWX)
#define	MASK_MAX   (1 << 9)
#define	TARGET_MAX   (target_flags & MASK_MAX)
#define	MASK_FIX   (1 << 10)
#define	TARGET_FIX   (target_flags & MASK_FIX)
#define	MASK_CIX   (1 << 11)
#define	TARGET_CIX   (target_flags & MASK_CIX)
#define	MASK_EXPLICIT_RELOCS   (1 << 12)
#define	TARGET_EXPLICIT_RELOCS   (target_flags & MASK_EXPLICIT_RELOCS)
#define	MASK_SMALL_DATA   (1 << 13)
#define	TARGET_SMALL_DATA   (target_flags & MASK_SMALL_DATA)
#define	MASK_CPU_EV5   (1 << 28)
#define	TARGET_CPU_EV5   (target_flags & MASK_CPU_EV5)
#define	MASK_CPU_EV6   (1 << 29)
#define	TARGET_CPU_EV6   (target_flags & MASK_CPU_EV6)
#define	MASK_SUPPORT_ARCH   (1 << 30)
#define	TARGET_SUPPORT_ARCH   (target_flags & MASK_SUPPORT_ARCH)
#define	TARGET_ABI_WINDOWS_NT   0
#define	TARGET_ABI_OPEN_VMS   0
#define	TARGET_ABI_UNICOSMK   0
#define	TARGET_ABI_OSF
#define	TARGET_AS_CAN_SUBTRACT_LABELS   TARGET_GAS
#define	TARGET_AS_SLASH_BEFORE_SUFFIX   TARGET_GAS
#define	TARGET_CAN_FAULT_IN_PROLOGUE   0
#define	TARGET_HAS_XFLOATING_LIBS   0
#define	TARGET_PROFILING_NEEDS_GP   0
#define	TARGET_LD_BUGGY_LDGP   0
#define	TARGET_FIXUP_EV5_PREFETCH   0
#define	TARGET_SWITCHES
#define	TARGET_DEFAULT   MASK_FP|MASK_FPREGS
#define	TARGET_CPU_DEFAULT   0
#define	TARGET_DEFAULT_EXPLICIT_RELOCS   0
#define	TARGET_OPTIONS
#define	CPP_AM_BWX_SPEC   "-D__alpha_bwx__ -Acpu=bwx"
#define	CPP_AM_MAX_SPEC   "-D__alpha_max__ -Acpu=max"
#define	CPP_AM_FIX_SPEC   "-D__alpha_fix__ -Acpu=fix"
#define	CPP_AM_CIX_SPEC   "-D__alpha_cix__ -Acpu=cix"
#define	CPP_IM_EV4_SPEC   "-D__alpha_ev4__ -Acpu=ev4"
#define	CPP_IM_EV5_SPEC   "-D__alpha_ev5__ -Acpu=ev5"
#define	CPP_IM_EV6_SPEC   "-D__alpha_ev6__ -Acpu=ev6"
#define	CPP_CPU_EV4_SPEC   "%(cpp_im_ev4)"
#define	CPP_CPU_EV5_SPEC   "%(cpp_im_ev5)"
#define	CPP_CPU_EV56_SPEC   "%(cpp_im_ev5) %(cpp_am_bwx)"
#define	CPP_CPU_PCA56_SPEC   "%(cpp_im_ev5) %(cpp_am_bwx) %(cpp_am_max)"
#define	CPP_CPU_EV6_SPEC   "%(cpp_im_ev6) %(cpp_am_bwx) %(cpp_am_max) %(cpp_am_fix)"
#define	CPP_CPU_EV67_SPEC   "%(cpp_im_ev6) %(cpp_am_bwx) %(cpp_am_max) %(cpp_am_fix) %(cpp_am_cix)"
#define	CPP_CPU_DEFAULT_SPEC   CPP_CPU_EV4_SPEC
#define	CPP_CPU_SPEC   "\%{!undef:-Acpu=alpha -Amachine=alpha -D__alpha -D__alpha__ \%{mcpu=ev4|mcpu=21064:%(cpp_cpu_ev4) }\%{mcpu=ev5|mcpu=21164:%(cpp_cpu_ev5) }\%{mcpu=ev56|mcpu=21164a:%(cpp_cpu_ev56) }\%{mcpu=pca56|mcpu=21164pc|mcpu=21164PC:%(cpp_cpu_pca56) }\%{mcpu=ev6|mcpu=21264:%(cpp_cpu_ev6) }\%{mcpu=ev67|mcpu=21264a:%(cpp_cpu_ev67) }\%{!mcpu*:%(cpp_cpu_default) }}"
#define	EXTRA_SPECS
#define	OVERRIDE_OPTIONS   override_options ()
#define	CONDITIONAL_REGISTER_USAGE
#define	CAN_DEBUG_WITHOUT_FP
#define	REAL_ARITHMETIC
#define	INT_TYPE_SIZE   32
#define	LONG_LONG_TYPE_SIZE   64
#define	FLOAT_TYPE_SIZE   32
#define	DOUBLE_TYPE_SIZE   64
#define	LONG_DOUBLE_TYPE_SIZE   64
#define	WCHAR_TYPE   "unsigned int"
#define	WCHAR_TYPE_SIZE   32
#define	PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)
#define	PROMOTE_FUNCTION_ARGS
#define	PROMOTE_FUNCTION_RETURN
#define	BITS_BIG_ENDIAN   0
#define	BYTES_BIG_ENDIAN   0
#define	WORDS_BIG_ENDIAN   0
#define	BITS_PER_UNIT   8
#define	BITS_PER_WORD   64
#define	UNITS_PER_WORD   8
#define	POINTER_SIZE   64
#define	PARM_BOUNDARY   64
#define	STACK_BOUNDARY   64
#define	FUNCTION_BOUNDARY   32
#define	EMPTY_FIELD_BOUNDARY   64
#define	STRUCTURE_SIZE_BOUNDARY   8
#define	PCC_BITFIELD_TYPE_MATTERS   1
#define	BIGGEST_ALIGNMENT   128
#define	MINIMUM_ATOMIC_ALIGNMENT   ((unsigned int) (TARGET_BWX ? 8 : 32))
#define	STRICT_ALIGNMENT   1
#define	SLOW_UNALIGNED_ACCESS(MODE, ALIGN)   1
#define	FIRST_PSEUDO_REGISTER   64
#define	FIXED_REGISTERS
#define	CALL_USED_REGISTERS
#define	REG_ALLOC_ORDER
#define	HARD_REGNO_NREGS(REGNO, MODE)   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
#define	HARD_REGNO_MODE_OK(REGNO, MODE)
#define	MODES_TIEABLE_P(MODE1, MODE2)
#define	STACK_POINTER_REGNUM   30
#define	HARD_FRAME_POINTER_REGNUM   15
#define	FRAME_POINTER_REQUIRED   0
#define	ARG_POINTER_REGNUM   31
#define	FRAME_POINTER_REGNUM   63
#define	STATIC_CHAIN_REGNUM   1
#define	PIC_OFFSET_TABLE_REGNUM   29
#define	STRUCT_VALUE   0
#define	N_REG_CLASSES   (int) LIM_REG_CLASSES
#define	REG_CLASS_NAMES
#define	REG_CLASS_CONTENTS
#define	REGNO_REG_CLASS(REGNO)
#define	INDEX_REG_CLASS   NO_REGS
#define	BASE_REG_CLASS   GENERAL_REGS
#define	REG_CLASS_FROM_LETTER(C)
#define	CONST_OK_FOR_LETTER_P   alpha_const_ok_for_letter_p
#define	CONST_DOUBLE_OK_FOR_LETTER_P   alpha_const_double_ok_for_letter_p
#define	EXTRA_CONSTRAINT   alpha_extra_constraint
#define	PREFERRED_RELOAD_CLASS   alpha_preferred_reload_class
#define	SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN)   secondary_reload_class((CLASS), (MODE), (IN), 1)
#define	SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT)   secondary_reload_class((CLASS), (MODE), (OUT), 0)
#define	SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE)
#define	SECONDARY_MEMORY_NEEDED_MODE(MODE)
#define	CLASS_MAX_NREGS(CLASS, MODE)   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
#define	CLASS_CANNOT_CHANGE_MODE   FLOAT_REGS
#define	CLASS_CANNOT_CHANGE_MODE_P(FROM, TO)   (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO))
#define	REGISTER_MOVE_COST(MODE, CLASS1, CLASS2)
#define	MEMORY_MOVE_COST(MODE, CLASS, IN)   (2*alpha_memory_latency)
#define	BRANCH_COST   5
#define	STACK_GROWS_DOWNWARD
#define	STARTING_FRAME_OFFSET   0
#define	STACK_CHECK_BUILTIN   1
#define	ACCUMULATE_OUTGOING_ARGS   1
#define	FIRST_PARM_OFFSET(FNDECL)   0
#define	ELIMINABLE_REGS
#define	CAN_ELIMINATE(FROM, TO)   1
#define	ALPHA_ROUND(X)   (((X) + 15) & ~ 15)
#define	INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)
#define	RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE)   0
#define	FUNCTION_VALUE(VALTYPE, FUNC)
#define	LIBCALL_VALUE(MODE)
#define	RETURN_IN_MEMORY(TYPE)
#define	FUNCTION_VALUE_REGNO_P(N)   ((N) == 0 || (N) == 1 || (N) == 32 || (N) == 33)
#define	FUNCTION_ARG_REGNO_P(N)   (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32))
#define	CUMULATIVE_ARGS   int
#define	INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT)   (CUM) = 0
#define	ALPHA_ARG_SIZE(MODE, TYPE, NAMED)
#define	FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)
#define	FUNCTION_ARG(CUM, MODE, TYPE, NAMED)   function_arg((CUM), (MODE), (TYPE), (NAMED))
#define	FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED)   ((MODE) == TFmode || (MODE) == TCmode)
#define	FUNCTION_ARG_PADDING(MODE, TYPE)   upward
#define	FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED)
#define	SETUP_INCOMING_VARARGS(CUM, MODE, TYPE, PRETEND_SIZE, NO_RTL)
#define	FUNCTION_OK_FOR_SIBCALL(DECL)
#define	ASM_COMMENT_START   " #"
#define	ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL)   alpha_start_function(FILE,NAME,DECL);
#define	ASM_DECLARE_FUNCTION_SIZE(FILE, NAME, DECL)   alpha_end_function(FILE,NAME,DECL)
#define	PROFILE_BEFORE_PROLOGUE   1
#define	FUNCTION_PROFILER(FILE, LABELNO)
#define	EXIT_IGNORE_STACK   1
#define	EPILOGUE_USES(REGNO)   ((REGNO) == 26)
#define	TRAMPOLINE_TEMPLATE(FILE)
#define	TRAMPOLINE_SECTION   text_section
#define	TRAMPOLINE_SIZE   32
#define	TRAMPOLINE_ALIGNMENT   64
#define	INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT)   alpha_initialize_trampoline (TRAMP, FNADDR, CXT, 16, 24, 8)
#define	RETURN_ADDR_RTX   alpha_return_addr
#define	INCOMING_RETURN_ADDR_RTX   gen_rtx_REG (Pmode, 26)
#define	DWARF_FRAME_RETURN_COLUMN   DWARF_FRAME_REGNUM (26)
#define	EH_RETURN_DATA_REGNO(N)   ((N) < 4 ? (N) + 16 : INVALID_REGNUM)
#define	EH_RETURN_STACKADJ_RTX   gen_rtx_REG (Pmode, 28)
#define	EH_RETURN_HANDLER_RTX
#define	REGNO_OK_FOR_INDEX_P(REGNO)   0
#define	REGNO_OK_FOR_BASE_P(REGNO)
#define	MAX_REGS_PER_ADDRESS   1
#define	CONSTANT_ADDRESS_P(X)
#define	LEGITIMATE_CONSTANT_P(X)
#define	REG_OK_FOR_INDEX_P(X)   0
#define	NONSTRICT_REG_OK_FOR_BASE_P(X)   (REGNO (X) < 32 || REGNO (X) == 63 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
#define	NONSTRICT_REG_OK_FP_BASE_P(X)
#define	STRICT_REG_OK_FOR_BASE_P(X)   REGNO_OK_FOR_BASE_P (REGNO (X))
#define	REG_OK_FOR_BASE_P(X)   NONSTRICT_REG_OK_FOR_BASE_P (X)
#define	GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN)
#define	LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
#define	LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_L, WIN)
#define	GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)   { if (GET_CODE (ADDR) == AND) goto LABEL; }
#define	ADDRESS_COST(X)   0
#define	MACHINE_DEPENDENT_REORG(X)   alpha_reorg(X)
#define	CASE_VECTOR_MODE   SImode
#define	CASE_VECTOR_PC_RELATIVE   1
#define	DEFAULT_SIGNED_CHAR   1
#define	FIXUNS_TRUNC_LIKE_FIX_TRUNC
#define	MOVE_MAX   8
#define	MOVE_RATIO   (TARGET_BWX ? 7 : 2)
#define	MAX_FIXED_MODE_SIZE   GET_MODE_BITSIZE (TImode)
#define	SLOW_BYTE_ACCESS   1
#define	WORD_REGISTER_OPERATIONS
#define	LOAD_EXTEND_OP(MODE)   ((MODE) == SImode ? SIGN_EXTEND : ZERO_EXTEND)
#define	SHORT_IMMEDIATES_SIGN_EXTEND
#define	TRULY_NOOP_TRUNCATION(OUTPREC, INPREC)   1
#define	STORE_FLAG_VALUE   1
#define	FLOAT_STORE_FLAG_VALUE(MODE)   REAL_VALUE_ATOF ((TARGET_FLOAT_VAX ? "0.5" : "2.0"), (MODE))
#define	CANONICALIZE_COMPARISON(CODE, OP0, OP1)
#define	Pmode   DImode
#define	FUNCTION_MODE   Pmode
#define	NO_FUNCTION_CSE
#define	SHIFT_COUNT_TRUNCATED   1
#define	CONST_COSTS(RTX, CODE, OUTER_CODE)
#define	RTX_COSTS(X, CODE, OUTER_CODE)
#define	ASM_APP_ON   (TARGET_EXPLICIT_RELOCS ? "\t.set\tmacro\n" : "")
#define	ASM_APP_OFF   (TARGET_EXPLICIT_RELOCS ? "\t.set\tnomacro\n" : "")
#define	TEXT_SECTION_ASM_OP   "\t.text"
#define	READONLY_DATA_SECTION_ASM_OP   "\t.rdata"
#define	DATA_SECTION_ASM_OP   "\t.data"
#define	EXTRA_SECTIONS   readonly_data
#define	EXTRA_SECTION_FUNCTIONS
#define	READONLY_DATA_SECTION   literal_section
#define	ENCODE_SECTION_INFO(DECL)   alpha_encode_section_info (DECL)
#define	REDO_SECTION_INFO_P(DECL)
#define	STRIP_NAME_ENCODING(VAR, SYMBOL_NAME)
#define	REGISTER_NAMES
#define	ASM_OUTPUT_LABELREF(STREAM, NAME)
#define	ASM_OUTPUT_LABEL(FILE, NAME)   do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
#define	ASM_GLOBALIZE_LABEL(FILE, NAME)   do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
#define	USER_LABEL_PREFIX   ""
#define	ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM)   fprintf (FILE, "$%s%d:\n", PREFIX, NUM)
#define	ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLEINSN)   { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }
#define	ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM)   sprintf ((LABEL), "*$%s%ld", (PREFIX), (long)(NUM))
#define	CHECK_FLOAT_VALUE(MODE, D, OVERFLOW)   ((OVERFLOW) = check_float_value (MODE, &D, OVERFLOW))
#define	ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH)
#define	ASM_OUTPUT_REG_PUSH(FILE, REGNO)
#define	ASM_OUTPUT_REG_POP(FILE, REGNO)
#define	ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)   abort ()
#define	ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)
#define	ASM_OUTPUT_ALIGN(FILE, LOG)
#define	ASM_OUTPUT_SKIP(FILE, SIZE)   fprintf (FILE, "\t.space %d\n", (SIZE))
#define	ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED)
#define	ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED)
#define	ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO)
#define	PRINT_OPERAND(FILE, X, CODE)   print_operand (FILE, X, CODE)
#define	PRINT_OPERAND_PUNCT_VALID_P(CODE)
#define	PRINT_OPERAND_ADDRESS(FILE, ADDR)   print_operand_address((FILE), (ADDR))
#define	PREDICATE_CODES
#define	BUILD_VA_LIST_TYPE(VALIST)   (VALIST) = alpha_build_va_list ()
#define	EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg)   alpha_va_start (stdarg, valist, nextarg)
#define	EXPAND_BUILTIN_VA_ARG(valist, type)   alpha_va_arg (valist, type)
#define	OBJECT_FORMAT_COFF
#define	EXTENDED_COFF
#define	NM_FLAGS   "-pg"
#define	SDB_DEBUGGING_INFO
#define	DBX_DEBUGGING_INFO
#define	MIPS_DEBUGGING_INFO
#define	PREFERRED_DEBUGGING_TYPE   SDB_DEBUG
#define	DEBUGGER_AUTO_OFFSET(X)   ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset)
#define	DEBUGGER_ARG_OFFSET(OFFSET, X)   (OFFSET + alpha_arg_offset)
#define	ASM_OUTPUT_SOURCE_LINE(STREAM, LINE)   alpha_output_lineno (STREAM, LINE)
#define	ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME)   alpha_output_filename (STREAM, NAME)
#define	DBX_CONTIN_LENGTH   3000
#define	DEFAULT_GDB_EXTENSIONS   1
#define	NO_DBX_FUNCTION_END   1
#define	ASM_STABS_OP   ((TARGET_GAS) ? "\t.stabs\t" : " #.stabs\t")
#define	ASM_STABN_OP   ((TARGET_GAS) ? "\t.stabn\t" : " #.stabn\t")
#define	ASM_STABD_OP   ((TARGET_GAS) ? "\t.stabd\t" : " #.stabd\t")
#define	SDB_ALLOW_FORWARD_REFERENCES
#define	SDB_ALLOW_UNKNOWN_REFERENCES
#define	PUT_SDB_DEF(a)
#define	PUT_SDB_PLAIN_DEF(a)
#define	PUT_SDB_TYPE(a)
#define	PUT_SDB_BLOCK_START(LINE)
#define	PUT_SDB_BLOCK_END(LINE)
#define	PUT_SDB_FUNCTION_START(LINE)
#define	PUT_SDB_FUNCTION_END(LINE)
#define	PUT_SDB_EPILOGUE_END(NAME)   ((void)(NAME))
#define	CODE_MASK   0x8F300
#define	MIPS_IS_STAB(sym)   (((sym)->index & 0xFFF00) == CODE_MASK)
#define	MIPS_MARK_STAB(code)   ((code)+CODE_MASK)
#define	MIPS_UNMARK_STAB(code)   ((code)-CODE_MASK)
#define	SHASH_SIZE   511
#define	THASH_SIZE   55
#define	ALIGN_SYMTABLE_OFFSET(OFFSET)   (((OFFSET) + 7) & ~7)
#define	NO_IMPLICIT_EXTERN_C
#define	TARGET_MEM_FUNCTIONS   1
#define	ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION)   alpha_output_mi_thunk_osf (FILE, THUNK_FNDECL, DELTA, FUNCTION)
Enumerations
enum	processor_type {   PROCESSOR_EV4, PROCESSOR_EV5, PROCESSOR_EV6, PROCESSOR_I386,   PROCESSOR_I486, PROCESSOR_PENTIUM, PROCESSOR_PENTIUMPRO, PROCESSOR_K6,   PROCESSOR_ATHLON, PROCESSOR_PENTIUM4, PROCESSOR_max, PROCESSOR_M88100,   PROCESSOR_M88110, PROCESSOR_M88000, PROCESSOR_700, PROCESSOR_7100,   PROCESSOR_7100LC, PROCESSOR_7200, PROCESSOR_8000, PROCESSOR_RIOS1,   PROCESSOR_RIOS2, PROCESSOR_RS64A, PROCESSOR_MPCCORE, PROCESSOR_PPC403,   PROCESSOR_PPC405, PROCESSOR_PPC601, PROCESSOR_PPC603, PROCESSOR_PPC604,   PROCESSOR_PPC604e, PROCESSOR_PPC620, PROCESSOR_PPC630, PROCESSOR_PPC750,   PROCESSOR_PPC7400, PROCESSOR_PPC7450, PROCESSOR_SH1, PROCESSOR_SH2,   PROCESSOR_SH3, PROCESSOR_SH3E, PROCESSOR_SH4, PROCESSOR_SH5,   PROCESSOR_DEFAULT, PROCESSOR_R3000, PROCESSOR_R3900, PROCESSOR_R6000,   PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111, PROCESSOR_R4120,   PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650, PROCESSOR_R5000,   PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R8000, PROCESSOR_R4KC,   PROCESSOR_R5KC, PROCESSOR_R20KC, PROCESSOR_SR71000, PROCESSOR_SB1,   PROCESSOR_V7, PROCESSOR_CYPRESS, PROCESSOR_V8, PROCESSOR_SUPERSPARC,   PROCESSOR_SPARCLITE, PROCESSOR_F930, PROCESSOR_F934, PROCESSOR_HYPERSPARC,   PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET, PROCESSOR_TSC701, PROCESSOR_V9,   PROCESSOR_ULTRASPARC, PROCESSOR_DEFAULT, PROCESSOR_R3000, PROCESSOR_R3900,   PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111,   PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650,   PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R8000,   PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC, PROCESSOR_SR71000,   PROCESSOR_SB1, PROCESSOR_DEFAULT, PROCESSOR_R3000, PROCESSOR_R3900,   PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111,   PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650,   PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R8000,   PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC, PROCESSOR_SR71000,   PROCESSOR_SB1, PROCESSOR_EV4, PROCESSOR_EV5, PROCESSOR_EV6,   PROCESSOR_I386, PROCESSOR_I486, PROCESSOR_PENTIUM, PROCESSOR_PENTIUMPRO,   PROCESSOR_K6, PROCESSOR_ATHLON, PROCESSOR_PENTIUM4, PROCESSOR_max,   PROCESSOR_M88100, PROCESSOR_M88110, PROCESSOR_M88000, PROCESSOR_700,   PROCESSOR_7100, PROCESSOR_7100LC, PROCESSOR_7200, PROCESSOR_8000,   PROCESSOR_RIOS1, PROCESSOR_RIOS2, PROCESSOR_RS64A, PROCESSOR_MPCCORE,   PROCESSOR_PPC403, PROCESSOR_PPC405, PROCESSOR_PPC601, PROCESSOR_PPC603,   PROCESSOR_PPC604, PROCESSOR_PPC604e, PROCESSOR_PPC620, PROCESSOR_PPC630,   PROCESSOR_PPC750, PROCESSOR_PPC7400, PROCESSOR_PPC7450, PROCESSOR_SH1,   PROCESSOR_SH2, PROCESSOR_SH3, PROCESSOR_SH3E, PROCESSOR_SH4,   PROCESSOR_SH5, PROCESSOR_DEFAULT, PROCESSOR_R3000, PROCESSOR_R3900,   PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111,   PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650,   PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R8000,   PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC, PROCESSOR_SR71000,   PROCESSOR_SB1, PROCESSOR_V7, PROCESSOR_CYPRESS, PROCESSOR_V8,   PROCESSOR_SUPERSPARC, PROCESSOR_SPARCLITE, PROCESSOR_F930, PROCESSOR_F934,   PROCESSOR_HYPERSPARC, PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET, PROCESSOR_TSC701,   PROCESSOR_V9, PROCESSOR_ULTRASPARC, PROCESSOR_DEFAULT, PROCESSOR_R3000,   PROCESSOR_R3900, PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100,   PROCESSOR_R4111, PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600,   PROCESSOR_R4650, PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500,   PROCESSOR_R8000, PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC,   PROCESSOR_SR71000, PROCESSOR_SB1, PROCESSOR_DEFAULT, PROCESSOR_R3000,   PROCESSOR_R3900, PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100,   PROCESSOR_R4111, PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600,   PROCESSOR_R4650, PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500,   PROCESSOR_R8000, PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC,   PROCESSOR_SR71000, PROCESSOR_SB1, PROCESSOR_EV4, PROCESSOR_EV5,   PROCESSOR_EV6, PROCESSOR_MAX, ARM_CORE, PROCESSOR_I386,   PROCESSOR_I486, PROCESSOR_PENTIUM, PROCESSOR_PENTIUMPRO, PROCESSOR_K6,   PROCESSOR_ATHLON, PROCESSOR_PENTIUM4, PROCESSOR_K8, PROCESSOR_NOCONA,   PROCESSOR_max, PROCESSOR_ITANIUM, PROCESSOR_ITANIUM2, PROCESSOR_max,   PROCESSOR_DEFAULT, PROCESSOR_IQ2000, PROCESSOR_IQ10, PROCESSOR_DEFAULT,   PROCESSOR_4KC, PROCESSOR_5KC, PROCESSOR_20KC, PROCESSOR_M4K,   PROCESSOR_R3000, PROCESSOR_R3900, PROCESSOR_R6000, PROCESSOR_R4000,   PROCESSOR_R4100, PROCESSOR_R4111, PROCESSOR_R4120, PROCESSOR_R4130,   PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650, PROCESSOR_R5000,   PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R7000, PROCESSOR_R8000,   PROCESSOR_R9000, PROCESSOR_SB1, PROCESSOR_SR71000, PROCESSOR_700,   PROCESSOR_7100, PROCESSOR_7100LC, PROCESSOR_7200, PROCESSOR_7300,   PROCESSOR_8000, PROCESSOR_RIOS1, PROCESSOR_RIOS2, PROCESSOR_RS64A,   PROCESSOR_MPCCORE, PROCESSOR_PPC403, PROCESSOR_PPC405, PROCESSOR_PPC440,   PROCESSOR_PPC601, PROCESSOR_PPC603, PROCESSOR_PPC604, PROCESSOR_PPC604e,   PROCESSOR_PPC620, PROCESSOR_PPC630, PROCESSOR_PPC750, PROCESSOR_PPC7400,   PROCESSOR_PPC7450, PROCESSOR_PPC8540, PROCESSOR_POWER4, PROCESSOR_POWER5,   PROCESSOR_9672_G5, PROCESSOR_9672_G6, PROCESSOR_2064_Z900, PROCESSOR_2084_Z990,   PROCESSOR_max, PROCESSOR_SH1, PROCESSOR_SH2, PROCESSOR_SH2E,   PROCESSOR_SH2A, PROCESSOR_SH3, PROCESSOR_SH3E, PROCESSOR_SH4,   PROCESSOR_SH4A, PROCESSOR_SH5, PROCESSOR_V7, PROCESSOR_CYPRESS,   PROCESSOR_V8, PROCESSOR_SUPERSPARC, PROCESSOR_SPARCLITE, PROCESSOR_F930,   PROCESSOR_F934, PROCESSOR_HYPERSPARC, PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET,   PROCESSOR_TSC701, PROCESSOR_V9, PROCESSOR_ULTRASPARC, PROCESSOR_ULTRASPARC3,   PROCESSOR_EV4, PROCESSOR_EV5, PROCESSOR_EV6, PROCESSOR_MAX,   ARM_CORE, PROCESSOR_I386, PROCESSOR_I486, PROCESSOR_PENTIUM,   PROCESSOR_PENTIUMPRO, PROCESSOR_K6, PROCESSOR_ATHLON, PROCESSOR_PENTIUM4,   PROCESSOR_K8, PROCESSOR_NOCONA, PROCESSOR_GENERIC32, PROCESSOR_GENERIC64,   PROCESSOR_AMDFAM10, PROCESSOR_max, PROCESSOR_ITANIUM, PROCESSOR_ITANIUM2,   PROCESSOR_max, PROCESSOR_DEFAULT, PROCESSOR_IQ2000, PROCESSOR_IQ10,   PROCESSOR_R3000, PROCESSOR_4KC, PROCESSOR_4KP, PROCESSOR_5KC,   PROCESSOR_5KF, PROCESSOR_20KC, PROCESSOR_24K, PROCESSOR_24KX,   PROCESSOR_M4K, PROCESSOR_R3900, PROCESSOR_R6000, PROCESSOR_R4000,   PROCESSOR_R4100, PROCESSOR_R4111, PROCESSOR_R4120, PROCESSOR_R4130,   PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650, PROCESSOR_R5000,   PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R7000, PROCESSOR_R8000,   PROCESSOR_R9000, PROCESSOR_SB1, PROCESSOR_SB1A, PROCESSOR_SR71000,   PROCESSOR_MAX, PROCESSOR_MN10300, PROCESSOR_AM33, PROCESSOR_AM33_2,   PROCESSOR_MS1_64_001, PROCESSOR_MS1_16_002, PROCESSOR_MS1_16_003, PROCESSOR_MS2,   PROCESSOR_700, PROCESSOR_7100, PROCESSOR_7100LC, PROCESSOR_7200,   PROCESSOR_7300, PROCESSOR_8000, PROCESSOR_RIOS1, PROCESSOR_RIOS2,   PROCESSOR_RS64A, PROCESSOR_MPCCORE, PROCESSOR_PPC403, PROCESSOR_PPC405,   PROCESSOR_PPC440, PROCESSOR_PPC601, PROCESSOR_PPC603, PROCESSOR_PPC604,   PROCESSOR_PPC604e, PROCESSOR_PPC620, PROCESSOR_PPC630, PROCESSOR_PPC750,   PROCESSOR_PPC7400, PROCESSOR_PPC7450, PROCESSOR_PPC8540, PROCESSOR_POWER4,   PROCESSOR_POWER5, PROCESSOR_9672_G5, PROCESSOR_9672_G6, PROCESSOR_2064_Z900,   PROCESSOR_2084_Z990, PROCESSOR_2094_Z9_109, PROCESSOR_max, PROCESSOR_SH1,   PROCESSOR_SH2, PROCESSOR_SH2E, PROCESSOR_SH2A, PROCESSOR_SH3,   PROCESSOR_SH3E, PROCESSOR_SH4, PROCESSOR_SH4A, PROCESSOR_SH5,   PROCESSOR_V7, PROCESSOR_CYPRESS, PROCESSOR_V8, PROCESSOR_SUPERSPARC,   PROCESSOR_SPARCLITE, PROCESSOR_F930, PROCESSOR_F934, PROCESSOR_HYPERSPARC,   PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET, PROCESSOR_TSC701, PROCESSOR_V9,   PROCESSOR_ULTRASPARC, PROCESSOR_ULTRASPARC3, PROCESSOR_NIAGARA }
enum	alpha_trap_precision {   ALPHA_TP_PROG, ALPHA_TP_FUNC, ALPHA_TP_INSN, ALPHA_TP_PROG,   ALPHA_TP_FUNC, ALPHA_TP_INSN, ALPHA_TP_PROG, ALPHA_TP_FUNC,   ALPHA_TP_INSN, ALPHA_TP_PROG, ALPHA_TP_FUNC, ALPHA_TP_INSN }
enum	alpha_fp_rounding_mode {   ALPHA_FPRM_NORM, ALPHA_FPRM_MINF, ALPHA_FPRM_CHOP, ALPHA_FPRM_DYN,   ALPHA_FPRM_NORM, ALPHA_FPRM_MINF, ALPHA_FPRM_CHOP, ALPHA_FPRM_DYN,   ALPHA_FPRM_NORM, ALPHA_FPRM_MINF, ALPHA_FPRM_CHOP, ALPHA_FPRM_DYN,   ALPHA_FPRM_NORM, ALPHA_FPRM_MINF, ALPHA_FPRM_CHOP, ALPHA_FPRM_DYN }
enum	alpha_fp_trap_mode {   ALPHA_FPTM_N, ALPHA_FPTM_U, ALPHA_FPTM_SU, ALPHA_FPTM_SUI,   ALPHA_FPTM_N, ALPHA_FPTM_U, ALPHA_FPTM_SU, ALPHA_FPTM_SUI,   ALPHA_FPTM_N, ALPHA_FPTM_U, ALPHA_FPTM_SU, ALPHA_FPTM_SUI,   ALPHA_FPTM_N, ALPHA_FPTM_U, ALPHA_FPTM_SU, ALPHA_FPTM_SUI }
enum	reg_class {   NO_REGS, R2, R0_1, INDEX_REGS,   BASE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   LR0_REGS, GENERAL_REGS, BP_REGS, FC_REGS,   CR_REGS, Q_REGS, SPECIAL_REGS, ACCUM0_REGS,   ACCUM_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, R24_REG, R25_REG, R27_REG,   GENERAL_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, LPCOUNT_REG, GENERAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, FPU_REGS, LO_REGS,   STACK_REG, BASE_REGS, HI_REGS, CC_REG,   GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   R0_REG, POINTER_X_REGS, POINTER_Y_REGS, POINTER_Z_REGS,   STACK_REG, BASE_POINTER_REGS, POINTER_REGS, ADDW_REGS,   SIMPLE_LD_REGS, LD_REGS, NO_LD_REGS, GENERAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0R1_REGS,   R2R3_REGS, EXT_LOW_REGS, EXT_REGS, ADDR_REGS,   INDEX_REGS, BK_REG, SP_REG, RC_REG,   COUNTER_REGS, INT_REGS, GENERAL_REGS, DP_REG,   ST_REG, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   GENERAL_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, S_REGS, INDEX_REGS, SP_REGS,   A_REGS, SI_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   REPEAT_REGS, CR_REGS, ACCUM_REGS, OTHER_FLAG_REGS,   F0_REGS, F1_REGS, BR_FLAG_REGS, FLAG_REGS,   EVEN_REGS, GPR_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, A0H_REG, A0L_REG, A0_REG,   A1H_REG, ACCUM_HIGH_REGS, A1L_REG, ACCUM_LOW_REGS,   A1_REG, ACCUM_REGS, X_REG, X_OR_ACCUM_LOW_REGS,   X_OR_ACCUM_REGS, YH_REG, YH_OR_ACCUM_HIGH_REGS, X_OR_YH_REGS,   YL_REG, YL_OR_ACCUM_LOW_REGS, X_OR_YL_REGS, X_OR_Y_REGS,   Y_REG, ACCUM_OR_Y_REGS, PH_REG, X_OR_PH_REGS,   PL_REG, PL_OR_ACCUM_LOW_REGS, X_OR_PL_REGS, YL_OR_PL_OR_ACCUM_LOW_REGS,   P_REG, ACCUM_OR_P_REGS, YL_OR_P_REGS, ACCUM_LOW_OR_YL_OR_P_REGS,   Y_OR_P_REGS, ACCUM_Y_OR_P_REGS, NO_FRAME_Y_ADDR_REGS, Y_ADDR_REGS,   ACCUM_LOW_OR_Y_ADDR_REGS, ACCUM_OR_Y_ADDR_REGS, X_OR_Y_ADDR_REGS, Y_OR_Y_ADDR_REGS,   P_OR_Y_ADDR_REGS, NON_HIGH_YBASE_ELIGIBLE_REGS, YBASE_ELIGIBLE_REGS, J_REG,   J_OR_DAU_16_BIT_REGS, BMU_REGS, NOHIGH_NON_ADDR_REGS, NON_ADDR_REGS,   SLOW_MEM_LOAD_REGS, NOHIGH_NON_YBASE_REGS, NO_ACCUM_NON_YBASE_REGS, NON_YBASE_REGS,   YBASE_VIRT_REGS, ACCUM_LOW_OR_YBASE_REGS, ACCUM_OR_YBASE_REGS, X_OR_YBASE_REGS,   Y_OR_YBASE_REGS, ACCUM_LOW_YL_PL_OR_YBASE_REGS, P_OR_YBASE_REGS, ACCUM_Y_P_OR_YBASE_REGS,   Y_ADDR_OR_YBASE_REGS, YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS, YBASE_OR_YBASE_ELIGIBLE_REGS, NO_HIGH_ALL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG,   MULTIPLY_64_REG, LOW_REGS, HIGH_REGS, REAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,   MAC_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   ADDR_REGS, DATA_REGS, FP_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, AREG, DREG,   CREG, BREG, SIREG, DIREG,   AD_REGS, Q_REGS, NON_Q_REGS, INDEX_REGS,   LEGACY_REGS, GENERAL_REGS, FP_TOP_REG, FP_SECOND_REG,   FLOAT_REGS, SSE_REGS, MMX_REGS, FP_TOP_SSE_REGS,   FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS, INT_SSE_REGS,   FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, GLOBAL_REGS, LOCAL_REGS, LOCAL_OR_GLOBAL_REGS,   FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   PR_REGS, BR_REGS, AR_M_REGS, AR_I_REGS,   ADDL_REGS, GR_REGS, FR_REGS, GR_AND_BR_REGS,   GR_AND_FR_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   CARRY_REG, ACCUM_REGS, GENERAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, D_REGS, X_REGS,   Y_REGS, SP_REGS, DA_REGS, DB_REGS,   Z_REGS, D8_REGS, Q_REGS, D_OR_X_REGS,   D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS, A_REGS,   X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS, A_OR_D_REGS,   A_OR_SP_REGS, H_REGS, S_REGS, D_OR_S_REGS,   X_OR_S_REGS, Y_OR_S_REGS, SP_OR_S_REGS, D_OR_X_OR_S_REGS,   D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS, A_OR_S_REGS, D_OR_A_OR_S_REGS,   TMP_REGS, D_OR_A_OR_TMP_REGS, G_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, DATA_REGS, ADDR_REGS,   FP_REGS, GENERAL_REGS, DATA_OR_FP_REGS, ADDR_OR_FP_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, AP_REG,   XRF_REGS, GENERAL_REGS, AGRF_REGS, XGRF_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, ONLYR1_REGS,   LRW_REGS, GENERAL_REGS, C_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, REMAINDER_REG,   HIMULT_REG, SYSTEM_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, DATA_REGS, ADDRESS_REGS, GENERAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,   ADDRESS_REGS, SP_REGS, DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,   EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS,   SP_OR_ADDRESS_OR_EXTENDED_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, GENERAL_REGS, FLOAT_REG0, LONG_FLOAT_REG0,   FLOAT_REGS, FP_REGS, GEN_AND_FP_REGS, FRAME_POINTER_REG,   STACK_POINTER_REG, GEN_AND_MEM_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, R1_REGS, GENERAL_REGS, FPUPPER_REGS,   FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,   FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, MUL_REGS,   GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS, FPU_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, OUT_REGS,   STD_REGS, ARG_REGS, SRC_REGS, DST_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0_REGS,   R15_REGS, BASE_REGS, GENERAL_REGS, FP_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, BASE_REGS,   GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS, VRSAVE_REGS,   NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,   LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,   CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, ADDR_REGS, GENERAL_REGS,   FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R0_REGS, PR_REGS,   T_REGS, MAC_REGS, FPUL_REGS, SIBCALL_REGS,   GENERAL_REGS, FP0_REGS, FP_REGS, DF_REGS,   FPSCR_REGS, GENERAL_FP_REGS, TARGET_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, M16_NA_REGS, M16_REGS,   T_REG, M16_T_REGS, GR_REGS, FP_REGS,   HI_REG, LO_REG, HILO_REG, MD_REGS,   COP0_REGS, COP2_REGS, COP3_REGS, HI_AND_GR_REGS,   LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS,   COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS,   ST_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   FPCC_REGS, I64_REGS, GENERAL_REGS, FP_REGS,   EXTRA_FP_REGS, GENERAL_OR_FP_REGS, GENERAL_OR_EXTRA_FP_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R0_REGS, R1_REGS,   TWO_REGS, R2_REGS, EIGHT_REGS, R8_REGS,   ICALL_REGS, GENERAL_REGS, CARRY_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, BR_REGS, FP_REGS, ACC_REG,   SP_REG, RL_REGS, GR_REGS, AR_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,   M16_REGS, T_REG, M16_T_REGS, GR_REGS,   FP_REGS, HI_REG, LO_REG, HILO_REG,   MD_REGS, COP0_REGS, COP2_REGS, COP3_REGS,   HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS,   COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS,   ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, M16_NA_REGS, M16_REGS, T_REG,   M16_T_REGS, GR_REGS, FP_REGS, HI_REG,   LO_REG, HILO_REG, MD_REGS, COP0_REGS,   COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,   HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS,   COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, R2,   R0_1, INDEX_REGS, BASE_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, LR0_REGS, GENERAL_REGS,   BP_REGS, FC_REGS, CR_REGS, Q_REGS,   SPECIAL_REGS, ACCUM0_REGS, ACCUM_REGS, FLOAT_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, R24_REG,   R25_REG, R27_REG, GENERAL_REGS, FLOAT_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG,   GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   FPU_REGS, LO_REGS, STACK_REG, BASE_REGS,   HI_REGS, CC_REG, GENERAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R0_REG, POINTER_X_REGS,   POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG, BASE_POINTER_REGS,   POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS, LD_REGS,   NO_LD_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, R0R1_REGS, R2R3_REGS, EXT_LOW_REGS,   EXT_REGS, ADDR_REGS, INDEX_REGS, BK_REG,   SP_REG, RC_REG, COUNTER_REGS, INT_REGS,   GENERAL_REGS, DP_REG, ST_REG, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, FLOAT_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, S_REGS,   INDEX_REGS, SP_REGS, A_REGS, SI_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, REPEAT_REGS, CR_REGS,   ACCUM_REGS, OTHER_FLAG_REGS, F0_REGS, F1_REGS,   BR_FLAG_REGS, FLAG_REGS, EVEN_REGS, GPR_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, A0H_REG,   A0L_REG, A0_REG, A1H_REG, ACCUM_HIGH_REGS,   A1L_REG, ACCUM_LOW_REGS, A1_REG, ACCUM_REGS,   X_REG, X_OR_ACCUM_LOW_REGS, X_OR_ACCUM_REGS, YH_REG,   YH_OR_ACCUM_HIGH_REGS, X_OR_YH_REGS, YL_REG, YL_OR_ACCUM_LOW_REGS,   X_OR_YL_REGS, X_OR_Y_REGS, Y_REG, ACCUM_OR_Y_REGS,   PH_REG, X_OR_PH_REGS, PL_REG, PL_OR_ACCUM_LOW_REGS,   X_OR_PL_REGS, YL_OR_PL_OR_ACCUM_LOW_REGS, P_REG, ACCUM_OR_P_REGS,   YL_OR_P_REGS, ACCUM_LOW_OR_YL_OR_P_REGS, Y_OR_P_REGS, ACCUM_Y_OR_P_REGS,   NO_FRAME_Y_ADDR_REGS, Y_ADDR_REGS, ACCUM_LOW_OR_Y_ADDR_REGS, ACCUM_OR_Y_ADDR_REGS,   X_OR_Y_ADDR_REGS, Y_OR_Y_ADDR_REGS, P_OR_Y_ADDR_REGS, NON_HIGH_YBASE_ELIGIBLE_REGS,   YBASE_ELIGIBLE_REGS, J_REG, J_OR_DAU_16_BIT_REGS, BMU_REGS,   NOHIGH_NON_ADDR_REGS, NON_ADDR_REGS, SLOW_MEM_LOAD_REGS, NOHIGH_NON_YBASE_REGS,   NO_ACCUM_NON_YBASE_REGS, NON_YBASE_REGS, YBASE_VIRT_REGS, ACCUM_LOW_OR_YBASE_REGS,   ACCUM_OR_YBASE_REGS, X_OR_YBASE_REGS, Y_OR_YBASE_REGS, ACCUM_LOW_YL_PL_OR_YBASE_REGS,   P_OR_YBASE_REGS, ACCUM_Y_P_OR_YBASE_REGS, Y_ADDR_OR_YBASE_REGS, YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS,   YBASE_OR_YBASE_ELIGIBLE_REGS, NO_HIGH_ALL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, MULTIPLY_32_REG, MULTIPLY_64_REG, LOW_REGS,   HIGH_REGS, REAL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, GENERAL_REGS, MAC_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, ADDR_REGS, DATA_REGS,   FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   AREG, DREG, CREG, BREG,   SIREG, DIREG, AD_REGS, Q_REGS,   NON_Q_REGS, INDEX_REGS, LEGACY_REGS, GENERAL_REGS,   FP_TOP_REG, FP_SECOND_REG, FLOAT_REGS, SSE_REGS,   MMX_REGS, FP_TOP_SSE_REGS, FP_SECOND_SSE_REGS, FLOAT_SSE_REGS,   FLOAT_INT_REGS, INT_SSE_REGS, FLOAT_INT_SSE_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, FP_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, GLOBAL_REGS,   LOCAL_REGS, LOCAL_OR_GLOBAL_REGS, FP_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, PR_REGS, BR_REGS,   AR_M_REGS, AR_I_REGS, ADDL_REGS, GR_REGS,   FR_REGS, GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, CARRY_REG, ACCUM_REGS,   GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   D_REGS, X_REGS, Y_REGS, SP_REGS,   DA_REGS, DB_REGS, Z_REGS, D8_REGS,   Q_REGS, D_OR_X_REGS, D_OR_Y_REGS, D_OR_SP_REGS,   X_OR_Y_REGS, A_REGS, X_OR_SP_REGS, Y_OR_SP_REGS,   X_OR_Y_OR_D_REGS, A_OR_D_REGS, A_OR_SP_REGS, H_REGS,   S_REGS, D_OR_S_REGS, X_OR_S_REGS, Y_OR_S_REGS,   SP_OR_S_REGS, D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS,   A_OR_S_REGS, D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS,   G_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   DATA_REGS, ADDR_REGS, FP_REGS, GENERAL_REGS,   DATA_OR_FP_REGS, ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS,   AGRF_REGS, XGRF_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, ONLYR1_REGS, LRW_REGS, GENERAL_REGS,   C_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   GENERAL_REGS, REMAINDER_REG, HIMULT_REG, SYSTEM_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,   ADDRESS_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS,   DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS, EXTENDED_REGS, DATA_OR_EXTENDED_REGS,   ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS, GENERAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,   FLOAT_REG0, LONG_FLOAT_REG0, FLOAT_REGS, FP_REGS,   GEN_AND_FP_REGS, FRAME_POINTER_REG, STACK_POINTER_REG, GEN_AND_MEM_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,   GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,   SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   R1_REGS, GENERAL_REGS, FPUPPER_REGS, FP_REGS,   GENERAL_OR_FP_REGS, SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS,   NO_LOAD_FPU_REGS, FPU_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, OUT_REGS, STD_REGS, ARG_REGS,   SRC_REGS, DST_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, R0_REGS, R15_REGS, BASE_REGS,   GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, BASE_REGS, GENERAL_REGS, FLOAT_REGS,   ALTIVEC_REGS, VRSAVE_REGS, NON_SPECIAL_REGS, MQ_REGS,   LINK_REGS, CTR_REGS, LINK_OR_CTR_REGS, SPECIAL_REGS,   SPEC_OR_GEN_REGS, CR0_REGS, CR_REGS, NON_FLOAT_REGS,   XER_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   ADDR_REGS, GENERAL_REGS, FP_REGS, ADDR_FP_REGS,   GENERAL_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   R0_REGS, PR_REGS, T_REGS, MAC_REGS,   FPUL_REGS, SIBCALL_REGS, GENERAL_REGS, FP0_REGS,   FP_REGS, DF_REGS, FPSCR_REGS, GENERAL_FP_REGS,   TARGET_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   M16_NA_REGS, M16_REGS, T_REG, M16_T_REGS,   GR_REGS, FP_REGS, HI_REG, LO_REG,   HILO_REG, MD_REGS, COP0_REGS, COP2_REGS,   COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS,   HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,   ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, FPCC_REGS, I64_REGS,   GENERAL_REGS, FP_REGS, EXTRA_FP_REGS, GENERAL_OR_FP_REGS,   GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   R0_REGS, R1_REGS, TWO_REGS, R2_REGS,   EIGHT_REGS, R8_REGS, ICALL_REGS, GENERAL_REGS,   CARRY_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, BR_REGS,   FP_REGS, ACC_REG, SP_REG, RL_REGS,   GR_REGS, AR_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, M16_NA_REGS, M16_REGS, T_REG,   M16_T_REGS, GR_REGS, FP_REGS, HI_REG,   LO_REG, HILO_REG, MD_REGS, COP0_REGS,   COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,   HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS,   COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,   M16_REGS, T_REG, M16_T_REGS, GR_REGS,   FP_REGS, HI_REG, LO_REG, HILO_REG,   MD_REGS, COP0_REGS, COP2_REGS, COP3_REGS,   HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS,   COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS,   ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, R0_REG, R24_REG, R25_REG,   R27_REG, GENERAL_REGS, FLOAT_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG, GENERAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, FPA_REGS,   CIRRUS_REGS, VFP_REGS, IWMMXT_GR_REGS, IWMMXT_REGS,   LO_REGS, STACK_REG, BASE_REGS, HI_REGS,   CC_REG, VFPCC_REG, GENERAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R0_REG, POINTER_X_REGS,   POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG, BASE_POINTER_REGS,   POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS, LD_REGS,   NO_LD_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, IREGS, BREGS, LREGS,   MREGS, CIRCREGS, DAGREGS, EVEN_AREGS,   ODD_AREGS, AREGS, CCREGS, EVEN_DREGS,   ODD_DREGS, DREGS, PREGS_CLOBBERED, PREGS,   DPREGS, MOST_REGS, PROLOGUE_REGS, NON_A_CC_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0R1_REGS,   R2R3_REGS, EXT_LOW_REGS, EXT_REGS, ADDR_REGS,   INDEX_REGS, BK_REG, SP_REG, RC_REG,   COUNTER_REGS, INT_REGS, GENERAL_REGS, DP_REG,   ST_REG, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG,   MULTIPLY_64_REG, LOW_REGS, HIGH_REGS, REAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, ICC_REGS,   FCC_REGS, CC_REGS, ICR_REGS, FCR_REGS,   CR_REGS, LCR_REG, LR_REG, GR8_REGS,   GR9_REGS, GR89_REGS, FDPIC_REGS, FDPIC_FPTR_REGS,   FDPIC_CALL_REGS, SPR_REGS, QUAD_ACC_REGS, EVEN_ACC_REGS,   ACC_REGS, ACCG_REGS, QUAD_FPR_REGS, FEVEN_REGS,   FPR_REGS, QUAD_REGS, EVEN_REGS, GPR_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, COUNTER_REGS,   SOURCE_REGS, DESTINATION_REGS, GENERAL_REGS, MAC_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, AREG,   DREG, CREG, BREG, SIREG,   DIREG, AD_REGS, Q_REGS, NON_Q_REGS,   INDEX_REGS, LEGACY_REGS, GENERAL_REGS, FP_TOP_REG,   FP_SECOND_REG, FLOAT_REGS, SSE_REGS, MMX_REGS,   FP_TOP_SSE_REGS, FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS,   INT_SSE_REGS, FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, PR_REGS, BR_REGS,   AR_M_REGS, AR_I_REGS, ADDL_REGS, GR_REGS,   FR_REGS, GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, DPH_REGS, DPL_REGS,   DP_REGS, SP_REGS, IPH_REGS, IPL_REGS,   IP_REGS, DP_SP_REGS, PTR_REGS, NONPTR_REGS,   NONSP_REGS, GENERAL_REGS, ALL_REGS = GENERAL_REGS, LIM_REG_CLASSES,   NO_REGS, GR_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, CARRY_REG, ACCUM_REGS, GENERAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, D_REGS,   X_REGS, Y_REGS, SP_REGS, DA_REGS,   DB_REGS, Z_REGS, D8_REGS, Q_REGS,   D_OR_X_REGS, D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS,   A_REGS, X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS,   A_OR_D_REGS, A_OR_SP_REGS, H_REGS, S_REGS,   D_OR_S_REGS, X_OR_S_REGS, Y_OR_S_REGS, Z_OR_S_REGS,   SP_OR_S_REGS, D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS,   A_OR_S_REGS, D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS,   G_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   DATA_REGS, ADDR_REGS, FP_REGS, GENERAL_REGS,   DATA_OR_FP_REGS, ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, ONLYR1_REGS, LRW_REGS, GENERAL_REGS,   C_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   M16_NA_REGS, M16_REGS, T_REG, M16_T_REGS,   PIC_FN_ADDR_REG, LEA_REGS, GR_REGS, FP_REGS,   HI_REG, LO_REG, MD_REGS, COP0_REGS,   COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,   HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,   ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, REMAINDER_REG,   HIMULT_REG, SYSTEM_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS,   DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS, EXTENDED_REGS, DATA_OR_EXTENDED_REGS,   ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS, FP_REGS,   FP_ACC_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, GENERAL_REGS, FLOAT_REG0, LONG_FLOAT_REG0,   FLOAT_REGS, LONG_REGS, FP_REGS, GEN_AND_FP_REGS,   FRAME_POINTER_REG, STACK_POINTER_REG, GEN_AND_MEM_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,   FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,   GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,   SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS,   FPU_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   BASE_REGS, GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS,   VRSAVE_REGS, VSCR_REGS, SPE_ACC_REGS, SPEFSCR_REGS,   NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,   LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,   CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, CC_REGS, ADDR_REGS,   GENERAL_REGS, ACCESS_REGS, ADDR_CC_REGS, GENERAL_CC_REGS,   FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R0_REGS, PR_REGS,   T_REGS, MAC_REGS, FPUL_REGS, SIBCALL_REGS,   GENERAL_REGS, FP0_REGS, FP_REGS, DF_HI_REGS,   DF_REGS, FPSCR_REGS, GENERAL_FP_REGS, TARGET_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, FPCC_REGS,   I64_REGS, GENERAL_REGS, FP_REGS, EXTRA_FP_REGS,   GENERAL_OR_FP_REGS, GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, R0_REGS, R1_REGS, TWO_REGS,   R2_REGS, EIGHT_REGS, R8_REGS, ICALL_REGS,   GENERAL_REGS, CARRY_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   BR_REGS, FP_REGS, ACC_REG, SP_REG,   RL_REGS, GR_REGS, AR_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R0_REG, R24_REG,   R25_REG, R27_REG, GENERAL_REGS, FLOAT_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG,   GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   FPA_REGS, CIRRUS_REGS, VFP_REGS, IWMMXT_GR_REGS,   IWMMXT_REGS, LO_REGS, STACK_REG, BASE_REGS,   HI_REGS, CC_REG, VFPCC_REG, GENERAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0_REG,   POINTER_X_REGS, POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG,   BASE_POINTER_REGS, POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS,   LD_REGS, NO_LD_REGS, GENERAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, IREGS, BREGS,   LREGS, MREGS, CIRCREGS, DAGREGS,   EVEN_AREGS, ODD_AREGS, AREGS, CCREGS,   EVEN_DREGS, ODD_DREGS, DREGS, FDPIC_REGS,   FDPIC_FPTR_REGS, PREGS_CLOBBERED, PREGS, IPREGS,   DPREGS, MOST_REGS, LT_REGS, LC_REGS,   LB_REGS, PROLOGUE_REGS, NON_A_CC_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R0R1_REGS, R2R3_REGS,   EXT_LOW_REGS, EXT_REGS, ADDR_REGS, INDEX_REGS,   BK_REG, SP_REG, RC_REG, COUNTER_REGS,   INT_REGS, GENERAL_REGS, DP_REG, ST_REG,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, MOF_REGS,   CC0_REGS, SPECIAL_REGS, GENERAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, LO_REGS, HI_REGS,   HILO_REGS, NOSP_REGS, GENERAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG, MULTIPLY_64_REG,   LOW_REGS, HIGH_REGS, REAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, ICC_REGS, FCC_REGS,   CC_REGS, ICR_REGS, FCR_REGS, CR_REGS,   LCR_REG, LR_REG, GR8_REGS, GR9_REGS,   GR89_REGS, FDPIC_REGS, FDPIC_FPTR_REGS, FDPIC_CALL_REGS,   SPR_REGS, QUAD_ACC_REGS, EVEN_ACC_REGS, ACC_REGS,   ACCG_REGS, QUAD_FPR_REGS, FEVEN_REGS, FPR_REGS,   QUAD_REGS, EVEN_REGS, GPR_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, COUNTER_REGS, SOURCE_REGS,   DESTINATION_REGS, GENERAL_REGS, MAC_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, AREG, DREG,   CREG, BREG, SIREG, DIREG,   AD_REGS, Q_REGS, NON_Q_REGS, INDEX_REGS,   LEGACY_REGS, GENERAL_REGS, FP_TOP_REG, FP_SECOND_REG,   FLOAT_REGS, SSE_REGS, MMX_REGS, FP_TOP_SSE_REGS,   FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS, INT_SSE_REGS,   FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   PR_REGS, BR_REGS, AR_M_REGS, AR_I_REGS,   ADDL_REGS, GR_REGS, FP_REGS, FR_REGS,   GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, GR_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, SP_REGS, FB_REGS, SB_REGS,   CR_REGS, R0_REGS, R1_REGS, R2_REGS,   R3_REGS, R02_REGS, HL_REGS, QI_REGS,   R23_REGS, R03_REGS, DI_REGS, A0_REGS,   A1_REGS, A_REGS, AD_REGS, PS_REGS,   SI_REGS, HI_REGS, RA_REGS, GENERAL_REGS,   FLG_REGS, HC_REGS, MEM_REGS, R02_A_MEM_REGS,   A_HL_MEM_REGS, R1_R3_A_MEM_REGS, R03_MEM_REGS, A_HI_MEM_REGS,   A_AD_CR_MEM_SI_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   CARRY_REG, ACCUM_REGS, GENERAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, D_REGS, X_REGS,   Y_REGS, SP_REGS, DA_REGS, DB_REGS,   Z_REGS, D8_REGS, Q_REGS, D_OR_X_REGS,   D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS, A_REGS,   X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS, A_OR_D_REGS,   A_OR_SP_REGS, H_REGS, S_REGS, D_OR_S_REGS,   X_OR_S_REGS, Y_OR_S_REGS, Z_OR_S_REGS, SP_OR_S_REGS,   D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS, A_OR_S_REGS,   D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS, G_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,   ADDR_REGS, FP_REGS, GENERAL_REGS, DATA_OR_FP_REGS,   ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   ONLYR1_REGS, LRW_REGS, GENERAL_REGS, C_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,   M16_REGS, T_REG, M16_T_REGS, PIC_FN_ADDR_REG,   V1_REG, LEA_REGS, GR_REGS, FP_REGS,   HI_REG, LO_REG, MD_REGS, COP0_REGS,   COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,   HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,   ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, DSP_ACC_REGS,   ACC_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   GENERAL_REGS, REMAINDER_REG, HIMULT_REG, SYSTEM_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,   ADDRESS_REGS, SP_REGS, DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,   EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS,   SP_OR_ADDRESS_OR_EXTENDED_REGS, FP_REGS, FP_ACC_REGS, GENERAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,   FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,   GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,   SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS,   FPU_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   BASE_REGS, GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS,   VRSAVE_REGS, VSCR_REGS, SPE_ACC_REGS, SPEFSCR_REGS,   NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,   LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,   CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, CC_REGS, ADDR_REGS,   GENERAL_REGS, ACCESS_REGS, ADDR_CC_REGS, GENERAL_CC_REGS,   FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, G16_REGS, G32_REGS,   T32_REGS, HI_REG, LO_REG, CE_REGS,   CN_REG, LC_REG, SC_REG, SP_REGS,   CR_REGS, CP1_REGS, CP2_REGS, CP3_REGS,   CPA_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   R0_REGS, PR_REGS, T_REGS, MAC_REGS,   FPUL_REGS, SIBCALL_REGS, GENERAL_REGS, FP0_REGS,   FP_REGS, DF_HI_REGS, DF_REGS, FPSCR_REGS,   GENERAL_FP_REGS, GENERAL_DF_REGS, TARGET_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, FPCC_REGS, I64_REGS,   GENERAL_REGS, FP_REGS, EXTRA_FP_REGS, GENERAL_OR_FP_REGS,   GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   R0_REGS, R1_REGS, TWO_REGS, R2_REGS,   EIGHT_REGS, R8_REGS, ICALL_REGS, GENERAL_REGS,   CARRY_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, BR_REGS,   FP_REGS, ACC_REG, SP_REG, RL_REGS,   GR_REGS, AR_REGS, ALL_REGS, LIM_REG_CLASSES }
Variables
enum processor_type	alpha_cpu
int	target_flags
enum alpha_trap_precision	alpha_tp
enum alpha_fp_rounding_mode	alpha_fprm
enum alpha_fp_trap_mode	alpha_fptm
const char *	alpha_cpu_string
const char *	alpha_tune_string
const char *	alpha_fprm_string
const char *	alpha_fptm_string
const char *	alpha_tp_string
const char *	alpha_mlat_string
int	alpha_memory_latency
struct alpha_compare	alpha_compare
long	alpha_arg_offset
long	alpha_auto_offset
int	sdb_label_count

---

Define Documentation

#define ACCUMULATE_OUTGOING_ARGS   1

Definition at line 924 of file alpha.h.

#define ADDRESS_COST

(

X

)

0

Definition at line 1429 of file alpha.h.

#define ALIGN_SYMTABLE_OFFSET

(

OFFSET

)

(((OFFSET) + 7) & ~7)

Definition at line 2193 of file alpha.h.

#define ALPHA_ARG_SIZE	(	MODE,
		TYPE,
		NAMED		)

Value:

((MODE) == TFmode || (MODE) == TCmode ? 1       \
   : (((MODE) == BLKmode ? int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE)) \
      + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)

Definition at line 1061 of file alpha.h.

Referenced by alpha_arg_partial_bytes(), and function_arg().

#define ALPHA_ROUND

(

X

)

(((X) + 15) & ~ 15)

Definition at line 957 of file alpha.h.

Referenced by alpha_expand_epilogue(), alpha_expand_prologue(), alpha_initial_elimination_offset(), and alpha_start_function().

#define ARG_POINTER_REGNUM   31

Definition at line 673 of file alpha.h.

#define ASM_APP_OFF   (TARGET_EXPLICIT_RELOCS ? "\t.set\tnomacro\n" : "")

Definition at line 1721 of file alpha.h.

#define ASM_APP_ON   (TARGET_EXPLICIT_RELOCS ? "\t.set\tmacro\n" : "")

Definition at line 1717 of file alpha.h.

#define ASM_COMMENT_START   " #"

Definition at line 1205 of file alpha.h.

#define ASM_DECLARE_FUNCTION_NAME	(	FILE,
		NAME,
		DECL		)	alpha_start_function(FILE,NAME,DECL);

Definition at line 1209 of file alpha.h.

#define ASM_DECLARE_FUNCTION_SIZE	(	FILE,
		NAME,
		DECL		)	alpha_end_function(FILE,NAME,DECL)

Definition at line 1214 of file alpha.h.

Referenced by assemble_end_function(), and build_mips16_call_stub().

#define ASM_FORMAT_PRIVATE_NAME	(	OUTPUT,
		NAME,
		LABELNO		)

Value:

( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10),  \
  sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))

Definition at line 1956 of file alpha.h.

#define ASM_GENERATE_INTERNAL_LABEL	(	LABEL,
		PREFIX,
		NUM		)	sprintf ((LABEL), "*$%s%ld", (PREFIX), (long)(NUM))

Definition at line 1848 of file alpha.h.

#define ASM_GLOBALIZE_LABEL	(	FILE,
		NAME		)	do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)

Definition at line 1823 of file alpha.h.

#define ASM_OUTPUT_ADDR_DIFF_ELT	(	FILE,
		BODY,
		VALUE,
		REL		)

Value:

fprintf (FILE, "\t.%s $L%d\n", TARGET_ABI_WINDOWS_NT ? "long" : "gprel32", \
     (VALUE))

Definition at line 1919 of file alpha.h.

#define ASM_OUTPUT_ADDR_VEC_ELT	(	FILE,
		VALUE		)	abort ()

Definition at line 1915 of file alpha.h.

#define ASM_OUTPUT_ALIGN	(	FILE,
		LOG		)

Value:

if ((LOG) != 0)     \
    fprintf (FILE, "\t.align %d\n", LOG);

Definition at line 1927 of file alpha.h.

#define ASM_OUTPUT_ASCII	(	MYFILE,
		MYSTRING,
		MYLENGTH		)

Definition at line 1859 of file alpha.h.

#define ASM_OUTPUT_CASE_LABEL	(	FILE,
		PREFIX,
		NUM,
		TABLEINSN		)	{ ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }

Definition at line 1840 of file alpha.h.

#define ASM_OUTPUT_COMMON	(	FILE,
		NAME,
		SIZE,
		ROUNDED		)

Value:

( fputs ("\t.comm ", (FILE)),     \
  assemble_name ((FILE), (NAME)),   \
  fprintf ((FILE), ",%d\n", (SIZE)))

Definition at line 1939 of file alpha.h.

#define ASM_OUTPUT_INTERNAL_LABEL	(	FILE,
		PREFIX,
		NUM		)	fprintf (FILE, "$%s%d:\n", PREFIX, NUM)

Definition at line 1833 of file alpha.h.

#define ASM_OUTPUT_LABEL	(	FILE,
		NAME		)	do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)

Definition at line 1817 of file alpha.h.

#define ASM_OUTPUT_LABELREF	(	STREAM,
		NAME		)

Value:

do {            \
  const char *name_ = NAME;     \
  if (*name_ == '@')        \
    name_ += 2;         \
  if (*name_ == '*')        \
    name_++;          \
  else            \
    fputs (user_label_prefix, STREAM);    \
  fputs (name_, STREAM);      \
} while (0)

Definition at line 1802 of file alpha.h.

Referenced by assemble_name(), assemble_name_raw(), and darwin_non_lazy_pcrel().

#define ASM_OUTPUT_LOCAL	(	FILE,
		NAME,
		SIZE,
		ROUNDED		)

Value:

( fputs ("\t.lcomm ", (FILE)),        \
  assemble_name ((FILE), (NAME)),     \
  fprintf ((FILE), ",%d\n", (SIZE)))

Definition at line 1947 of file alpha.h.

#define ASM_OUTPUT_MI_THUNK	(	FILE,
		THUNK_FNDECL,
		DELTA,
		FUNCTION		)	alpha_output_mi_thunk_osf (FILE, THUNK_FNDECL, DELTA, FUNCTION)

Definition at line 2203 of file alpha.h.

#define ASM_OUTPUT_REG_POP	(	FILE,
		REGNO		)

Value:

fprintf (FILE, "\tld%s $%s%d,0($30)\n\taddq $30,8,$30\n",   \
    (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "",    \
    (REGNO) & 31);

Definition at line 1907 of file alpha.h.

#define ASM_OUTPUT_REG_PUSH	(	FILE,
		REGNO		)

Value:

fprintf (FILE, "\tsubq $30,8,$30\n\tst%s $%s%d,0($30)\n",   \
    (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "",    \
    (REGNO) & 31);

Definition at line 1899 of file alpha.h.

#define ASM_OUTPUT_SKIP	(	FILE,
		SIZE		)	fprintf (FILE, "\t.space %d\n", (SIZE))

Definition at line 1933 of file alpha.h.

#define ASM_OUTPUT_SOURCE_FILENAME	(	STREAM,
		NAME		)	alpha_output_filename (STREAM, NAME)

Definition at line 2092 of file alpha.h.

Referenced by alpha_start_function(), mips_asm_file_start(), mips_output_function_prologue(), mmix_asm_file_start(), and output_file_directive().

#define ASM_OUTPUT_SOURCE_LINE	(	STREAM,
		LINE		)	alpha_output_lineno (STREAM, LINE)

Definition at line 2089 of file alpha.h.

Referenced by alpha_start_function(), and mips_output_function_prologue().

#define ASM_STABD_OP   ((TARGET_GAS) ? "\t.stabd\t" : " #.stabd\t")

Definition at line 2113 of file alpha.h.

#define ASM_STABN_OP   ((TARGET_GAS) ? "\t.stabn\t" : " #.stabn\t")

Definition at line 2112 of file alpha.h.

Referenced by alpha_output_lineno(), and mips_output_lineno().

#define ASM_STABS_OP   ((TARGET_GAS) ? "\t.stabs\t" : " #.stabs\t")

Definition at line 2111 of file alpha.h.

Referenced by alpha_output_filename(), default_stabs_asm_out_constructor(), default_stabs_asm_out_destructor(), and mips_output_filename().

#define BASE_REG_CLASS   GENERAL_REGS

Definition at line 762 of file alpha.h.

#define BIGGEST_ALIGNMENT   128

Definition at line 512 of file alpha.h.

#define BITS_BIG_ENDIAN   0

Definition at line 464 of file alpha.h.

#define BITS_PER_UNIT   8

Definition at line 478 of file alpha.h.

#define BITS_PER_WORD   64

Definition at line 484 of file alpha.h.

#define BRANCH_COST   5

Definition at line 892 of file alpha.h.

Referenced by do_jump(), do_store_flag(), emit_store_flag(), expand_abs(), expand_abs_nojump(), expand_divmod(), expand_expr(), expand_sdiv_pow2(), expand_smod_pow2(), find_if_case_1(), find_if_case_2(), fold_range_test(), fold_truthop(), ix86_expand_int_movcc(), noce_try_addcc(), noce_try_cmove_arith(), noce_try_store_flag_constants(), noce_try_store_flag_inc(), and noce_try_store_flag_mask().

#define BUILD_VA_LIST_TYPE

(

VALIST

)

(VALIST) = alpha_build_va_list ()

Definition at line 2040 of file alpha.h.

Referenced by build_common_tree_nodes_2().

#define BYTES_BIG_ENDIAN   0

Definition at line 468 of file alpha.h.

#define CALL_USED_REGISTERS

Value:

{1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \
  1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }

Definition at line 579 of file alpha.h.

#define CAN_DEBUG_WITHOUT_FP

Definition at line 408 of file alpha.h.

#define CAN_ELIMINATE	(	FROM,
		TO		)	1

Definition at line 954 of file alpha.h.

#define CANONICALIZE_COMPARISON	(	CODE,
		OP0,
		OP1		)

Value:

do {                  \
    if (((CODE) == GE || (CODE) == GT || (CODE) == GEU || (CODE) == GTU) \
  && (GET_CODE (OP1) == REG || (OP1) == const0_rtx))    \
      {                 \
  rtx tem = (OP0);            \
  (OP0) = (OP1);              \
  (OP1) = tem;              \
  (CODE) = swap_condition (CODE);         \
      }                 \
    if (((CODE) == LT || (CODE) == LTU)         \
  && GET_CODE (OP1) == CONST_INT && INTVAL (OP1) == 256)    \
      {                 \
  (CODE) = (CODE) == LT ? LE : LEU;       \
  (OP1) = GEN_INT (255);            \
      }                 \
  } while (0)

Definition at line 1514 of file alpha.h.

Referenced by mmix_gen_compare_reg(), and simplify_comparison().

#define CASE_VECTOR_MODE   SImode

Definition at line 1436 of file alpha.h.

#define CASE_VECTOR_PC_RELATIVE   1

Definition at line 1446 of file alpha.h.

Referenced by do_tablejump(), expand_case(), and expand_end_case_type().

#define CHECK_FLOAT_VALUE	(	MODE,
		D,
		OVERFLOW		)	((OVERFLOW) = check_float_value (MODE, &D, OVERFLOW))

Definition at line 1853 of file alpha.h.

#define CLASS_CANNOT_CHANGE_MODE   FLOAT_REGS

Definition at line 864 of file alpha.h.

Referenced by colorize_one_web(), init_one_web_common(), and remember_web_was_spilled().

#define CLASS_CANNOT_CHANGE_MODE_P	(	FROM,
		TO		)	(GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO))

Definition at line 868 of file alpha.h.

Referenced by df_def_record_1(), and df_uses_record().

#define CLASS_MAX_NREGS	(	CLASS,
		MODE		)	((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)

Definition at line 858 of file alpha.h.

#define CODE_MASK   0x8F300

Definition at line 2181 of file alpha.h.

#define CONDITIONAL_REGISTER_USAGE

Value:

{           \
  int i;          \
  if (! TARGET_FPREGS)        \
    for (i = 32; i < 63; i++)     \
      fixed_regs[i] = call_used_regs[i] = 1;  \
}

Definition at line 398 of file alpha.h.

#define CONST_COSTS	(	RTX,
		CODE,
		OUTER_CODE		)

Value:

case CONST_INT:           \
    if (INTVAL (RTX) >= 0 && INTVAL (RTX) < 256)    \
      return 0;             \
  case CONST_DOUBLE:            \
    if ((RTX) == CONST0_RTX (GET_MODE (RTX)))     \
      return 0;             \
    else if (((OUTER_CODE) == PLUS && add_operand (RTX, VOIDmode)) \
  || ((OUTER_CODE) == AND && and_operand (RTX, VOIDmode))) \
      return 0;             \
    else if (add_operand (RTX, VOIDmode) || and_operand (RTX, VOIDmode)) \
      return 2;             \
    else              \
      return COSTS_N_INSNS (2);         \
  case CONST:             \
  case SYMBOL_REF:            \
  case LABEL_REF:           \
  switch (alpha_cpu)            \
    {               \
    case PROCESSOR_EV4:           \
      return COSTS_N_INSNS (3);         \
    case PROCESSOR_EV5:           \
    case PROCESSOR_EV6:           \
      return COSTS_N_INSNS (2);         \
    default: abort();           \
    }

Definition at line 1568 of file alpha.h.

#define CONST_DOUBLE_OK_FOR_LETTER_P   alpha_const_double_ok_for_letter_p

Definition at line 800 of file alpha.h.

#define CONST_OK_FOR_LETTER_P   alpha_const_ok_for_letter_p

Definition at line 792 of file alpha.h.

#define CONSTANT_ADDRESS_P

(

X

)

Value:

(GET_CODE (X) == CONST_INT  \
   && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)

Definition at line 1321 of file alpha.h.

#define CPLUSPLUS_CPP_SPEC   "\-D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus \%(cpp) \"

Definition at line 26 of file alpha.h.

#define CPP_AM_BWX_SPEC   "-D__alpha_bwx__ -Acpu=bwx"

Definition at line 291 of file alpha.h.

#define CPP_AM_CIX_SPEC   "-D__alpha_cix__ -Acpu=cix"

Definition at line 294 of file alpha.h.

#define CPP_AM_FIX_SPEC   "-D__alpha_fix__ -Acpu=fix"

Definition at line 293 of file alpha.h.

#define CPP_AM_MAX_SPEC   "-D__alpha_max__ -Acpu=max"

Definition at line 292 of file alpha.h.

#define CPP_CPU_DEFAULT_SPEC   CPP_CPU_EV4_SPEC

Definition at line 330 of file alpha.h.

#define CPP_CPU_EV4_SPEC   "%(cpp_im_ev4)"

Definition at line 302 of file alpha.h.

#define CPP_CPU_EV56_SPEC   "%(cpp_im_ev5) %(cpp_am_bwx)"

Definition at line 304 of file alpha.h.

#define CPP_CPU_EV5_SPEC   "%(cpp_im_ev5)"

Definition at line 303 of file alpha.h.

#define CPP_CPU_EV67_SPEC   "%(cpp_im_ev6) %(cpp_am_bwx) %(cpp_am_max) %(cpp_am_fix) %(cpp_am_cix)"

Definition at line 308 of file alpha.h.

#define CPP_CPU_EV6_SPEC   "%(cpp_im_ev6) %(cpp_am_bwx) %(cpp_am_max) %(cpp_am_fix)"

Definition at line 306 of file alpha.h.

#define CPP_CPU_PCA56_SPEC   "%(cpp_im_ev5) %(cpp_am_bwx) %(cpp_am_max)"

Definition at line 305 of file alpha.h.

#define CPP_CPU_SPEC   "\%{!undef:-Acpu=alpha -Amachine=alpha -D__alpha -D__alpha__ \%{mcpu=ev4|mcpu=21064:%(cpp_cpu_ev4) }\%{mcpu=ev5|mcpu=21164:%(cpp_cpu_ev5) }\%{mcpu=ev56|mcpu=21164a:%(cpp_cpu_ev56) }\%{mcpu=pca56|mcpu=21164pc|mcpu=21164PC:%(cpp_cpu_pca56) }\%{mcpu=ev6|mcpu=21264:%(cpp_cpu_ev6) }\%{mcpu=ev67|mcpu=21264a:%(cpp_cpu_ev67) }\%{!mcpu*:%(cpp_cpu_default) }}"

Definition at line 336 of file alpha.h.

#define CPP_IM_EV4_SPEC   "-D__alpha_ev4__ -Acpu=ev4"

Definition at line 297 of file alpha.h.

#define CPP_IM_EV5_SPEC   "-D__alpha_ev5__ -Acpu=ev5"

Definition at line 298 of file alpha.h.

#define CPP_IM_EV6_SPEC   "-D__alpha_ev6__ -Acpu=ev6"

Definition at line 299 of file alpha.h.

#define CPP_SPEC   "\%{!undef:\%{.S:-D__LANGUAGE_ASSEMBLY__ -D__LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY }}\%{.m:-D__LANGUAGE_OBJECTIVE_C__ -D__LANGUAGE_OBJECTIVE_C }\%{!.S:%{!.cc:%{!.cxx:%{!.cpp:%{!.cp:%{!.c++:%{!.C:%{!.m:-D__LANGUAGE_C__ -D__LANGUAGE_C %{!ansi:-DLANGUAGE_C }}}}}}}}}\%{mieee:-D_IEEE_FP }\%{mieee-with-inexact:-D_IEEE_FP -D_IEEE_FP_INEXACT }}\%(cpp_cpu) %(cpp_subtarget)"

Definition at line 33 of file alpha.h.

#define CPP_SUBTARGET_SPEC   ""

Definition at line 43 of file alpha.h.

#define CUMULATIVE_ARGS   int

Definition at line 1050 of file alpha.h.

#define DATA_SECTION_ASM_OP   "\t.data"

Definition at line 1731 of file alpha.h.

#define DBX_CONTIN_LENGTH   3000

Definition at line 2098 of file alpha.h.

#define DBX_DEBUGGING_INFO

Definition at line 2061 of file alpha.h.

#define DEBUGGER_ARG_OFFSET	(	OFFSET,
		X		)	(OFFSET + alpha_arg_offset)

Definition at line 2086 of file alpha.h.

#define DEBUGGER_AUTO_OFFSET

(

X

)

((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset)

Definition at line 2084 of file alpha.h.

#define DEFAULT_GDB_EXTENSIONS   1

Definition at line 2101 of file alpha.h.

Referenced by common_handle_option().

#define DEFAULT_SIGNED_CHAR   1

Definition at line 1449 of file alpha.h.

#define DOUBLE_TYPE_SIZE   64

Definition at line 426 of file alpha.h.

#define DWARF_FRAME_RETURN_COLUMN   DWARF_FRAME_REGNUM (26)

Definition at line 1284 of file alpha.h.

Referenced by mips_frame_set().

#define EH_RETURN_DATA_REGNO

(

N

)

((N) < 4 ? (N) + 16 : INVALID_REGNUM)

Definition at line 1287 of file alpha.h.

Referenced by alpha_sa_mask(), arm_compute_save_reg0_reg12_mask(), calc_live_regs(), calculate_global_regs_live(), compute_frame_size(), cris_initial_frame_pointer_offset(), cris_reg_saved_in_regsave_area(), cris_target_asm_function_epilogue(), cris_target_asm_function_prologue(), df_bb_refs_record(), df_record_exit_block_uses(), dw2_build_landing_pads(), expand_builtin_eh_return_data_regno(), global_conflicts(), hppa_expand_epilogue(), hppa_expand_prologue(), ix86_save_reg(), m68k_save_reg(), mark_regs_live_at_end(), mda_compute_frame_size(), n_dregs_to_save(), output_stack_adjust(), propagate_block(), rs6000_emit_epilogue(), rs6000_emit_prologue(), rs6000_stack_info(), s390_regs_ever_clobbered(), and sh5_schedule_saves().

#define EH_RETURN_HANDLER_RTX

Value:

gen_rtx_MEM (Pmode, plus_constant (stack_pointer_rtx, \
             current_function_outgoing_args_size))

Definition at line 1289 of file alpha.h.

Referenced by df_record_exit_block_uses(), expand_eh_return(), and mark_regs_live_at_end().

#define EH_RETURN_STACKADJ_RTX   gen_rtx_REG (Pmode, 28)

Definition at line 1288 of file alpha.h.

Referenced by alpha_expand_epilogue(), df_record_exit_block_uses(), expand_eh_return(), frv_expand_epilogue(), gen_eh_return(), hppa_expand_epilogue(), iq2000_expand_epilogue(), ix86_expand_epilogue(), mark_regs_live_at_end(), mdx_epilogue(), mips_expand_epilogue(), mt_emit_eh_epilogue(), mt_expand_eh_return(), rs6000_emit_epilogue(), and sh_expand_epilogue().

#define ELIMINABLE_REGS

Value:

{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM},      \
 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},   \
 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},      \
 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}

Definition at line 942 of file alpha.h.

#define EMPTY_FIELD_BOUNDARY   64

Definition at line 503 of file alpha.h.

#define ENCODE_SECTION_INFO

(

DECL

)

alpha_encode_section_info (DECL)

Definition at line 1767 of file alpha.h.

#define EPILOGUE_USES

(

REGNO

)

((REGNO) == 26)

Definition at line 1236 of file alpha.h.

Referenced by df_record_exit_block_uses(), init_resource_info(), and mark_regs_live_at_end().

#define EXIT_IGNORE_STACK   1

Definition at line 1232 of file alpha.h.

#define EXPAND_BUILTIN_VA_ARG	(	valist,
		type		)	alpha_va_arg (valist, type)

Definition at line 2048 of file alpha.h.

Referenced by expand_builtin_va_arg().

#define EXPAND_BUILTIN_VA_START	(	stdarg,
		valist,
		nextarg		)	alpha_va_start (stdarg, valist, nextarg)

Definition at line 2044 of file alpha.h.

Referenced by expand_builtin_va_start().

#define EXTENDED_COFF

Definition at line 2053 of file alpha.h.

#define EXTRA_CONSTRAINT   alpha_extra_constraint

Definition at line 816 of file alpha.h.

#define EXTRA_SECTION_FUNCTIONS

Value:

void                \
literal_section ()            \
{               \
  if (in_section != readonly_data)        \
    {               \
      static int firsttime = 1;               \
                \
      fprintf (asm_out_file, "%s\n", READONLY_DATA_SECTION_ASM_OP); \
      if (firsttime)            \
  {             \
    firsttime = 0;                \
    assemble_aligned_integer (8, const0_rtx);   \
  }             \
                \
      in_section = readonly_data;       \
    }               \
}               \

Definition at line 1742 of file alpha.h.

#define EXTRA_SECTIONS   readonly_data

Definition at line 1740 of file alpha.h.

#define EXTRA_SPECS

Value:

{ "cpp_am_bwx", CPP_AM_BWX_SPEC },    \
  { "cpp_am_max", CPP_AM_MAX_SPEC },    \
  { "cpp_am_fix", CPP_AM_FIX_SPEC },    \
  { "cpp_am_cix", CPP_AM_CIX_SPEC },    \
  { "cpp_im_ev4", CPP_IM_EV4_SPEC },    \
  { "cpp_im_ev5", CPP_IM_EV5_SPEC },    \
  { "cpp_im_ev6", CPP_IM_EV6_SPEC },    \
  { "cpp_cpu_ev4", CPP_CPU_EV4_SPEC },    \
  { "cpp_cpu_ev5", CPP_CPU_EV5_SPEC },    \
  { "cpp_cpu_ev56", CPP_CPU_EV56_SPEC },  \
  { "cpp_cpu_pca56", CPP_CPU_PCA56_SPEC },  \
  { "cpp_cpu_ev6", CPP_CPU_EV6_SPEC },    \
  { "cpp_cpu_ev67", CPP_CPU_EV67_SPEC },  \
  { "cpp_cpu_default", CPP_CPU_DEFAULT_SPEC },  \
  { "cpp_cpu", CPP_CPU_SPEC },      \
  { "cpp_subtarget", CPP_SUBTARGET_SPEC },  \
  SUBTARGET_EXTRA_SPECS

Definition at line 361 of file alpha.h.

#define FIRST_PARM_OFFSET

(

FNDECL

)

0

Definition at line 928 of file alpha.h.

#define FIRST_PSEUDO_REGISTER   64

Definition at line 562 of file alpha.h.

#define FIXED_REGISTERS

Value:

{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }

Definition at line 567 of file alpha.h.

#define FIXUNS_TRUNC_LIKE_FIX_TRUNC

Definition at line 1457 of file alpha.h.

#define FLOAT_STORE_FLAG_VALUE

(

MODE

)

REAL_VALUE_ATOF ((TARGET_FLOAT_VAX ? "0.5" : "2.0"), (MODE))

Definition at line 1509 of file alpha.h.

Referenced by canonicalize_condition(), combine_simplify_rtx(), find_comparison_args(), fold_rtx(), simplify_relational_operation(), and subst_constants().

#define FLOAT_TYPE_SIZE   32

Definition at line 425 of file alpha.h.

#define FRAME_POINTER_REGNUM   63

Definition at line 676 of file alpha.h.

#define FRAME_POINTER_REQUIRED   0

Definition at line 670 of file alpha.h.

#define FUNCTION_ARG	(	CUM,
		MODE,
		TYPE,
		NAMED		)	function_arg((CUM), (MODE), (TYPE), (NAMED))

Definition at line 1092 of file alpha.h.

#define FUNCTION_ARG_ADVANCE	(	CUM,
		MODE,
		TYPE,
		NAMED		)

Value:

if (MUST_PASS_IN_STACK (MODE, TYPE))          \
    (CUM) = 6;                \
  else                  \
    (CUM) += ALPHA_ARG_SIZE (MODE, TYPE, NAMED)

Definition at line 1070 of file alpha.h.

#define FUNCTION_ARG_PADDING	(	MODE,
		TYPE		)	upward

Definition at line 1109 of file alpha.h.

#define FUNCTION_ARG_PARTIAL_NREGS	(	CUM,
		MODE,
		TYPE,
		NAMED		)

Value:

((CUM) < 6 && 6 < (CUM) + ALPHA_ARG_SIZE (MODE, TYPE, NAMED)  \
 ? 6 - (CUM) : 0)

Definition at line 1115 of file alpha.h.

#define FUNCTION_ARG_PASS_BY_REFERENCE	(	CUM,
		MODE,
		TYPE,
		NAMED		)	((MODE) == TFmode || (MODE) == TCmode)

Definition at line 1101 of file alpha.h.

#define FUNCTION_ARG_REGNO_P

(

N

)

(((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32))

Definition at line 1037 of file alpha.h.

#define FUNCTION_BOUNDARY   32

Definition at line 500 of file alpha.h.

#define FUNCTION_MODE   Pmode

Definition at line 1539 of file alpha.h.

#define FUNCTION_OK_FOR_SIBCALL

(

DECL

)

Value:

(DECL             \
   && ((TREE_ASM_WRITTEN (DECL) && !flag_pic)   \
       || ! TREE_PUBLIC (DECL)))

Definition at line 1177 of file alpha.h.

#define FUNCTION_PROFILER	(	FILE,
		LABELNO		)

Definition at line 1225 of file alpha.h.

#define FUNCTION_VALUE	(	VALTYPE,
		FUNC		)

Value:

gen_rtx_REG (((INTEGRAL_TYPE_P (VALTYPE)      \
     && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
    || POINTER_TYPE_P (VALTYPE))      \
         ? word_mode : TYPE_MODE (VALTYPE),   \
         ((TARGET_FPREGS          \
     && (TREE_CODE (VALTYPE) == REAL_TYPE   \
         || TREE_CODE (VALTYPE) == COMPLEX_TYPE)) \
    ? 32 : 0))

Definition at line 996 of file alpha.h.

#define FUNCTION_VALUE_REGNO_P

(

N

)

((N) == 0 || (N) == 1 || (N) == 32 || (N) == 33)

Definition at line 1031 of file alpha.h.

#define GO_IF_LEGITIMATE_ADDRESS	(	MODE,
		X,
		WIN		)

Value:

do {            \
  if (alpha_legitimate_address_p (MODE, X, 0))  \
    goto WIN;         \
} while (0)

Definition at line 1383 of file alpha.h.

#define GO_IF_MODE_DEPENDENT_ADDRESS	(	ADDR,
		LABEL		)	{ if (GET_CODE (ADDR) == AND) goto LABEL; }

Definition at line 1423 of file alpha.h.

#define HARD_FRAME_POINTER_REGNUM   15

Definition at line 664 of file alpha.h.

Referenced by alpha_expand_epilogue(), alpha_expand_prologue(), alpha_sa_mask(), alpha_sa_size(), alpha_start_function(), alpha_using_fp(), arm_compute_save_reg0_reg12_mask(), arm_debugger_arg_offset(), arm_override_options(), choose_reload_regs(), combinable_i3pat(), compute_saved_regs(), copy_all_regs(), copy_value(), df_bb_refs_record(), df_record_entry_block_defs(), df_record_exit_block_uses(), double_memory_operand(), eliminate_regs_in_insn(), epilogue_renumber(), expand_builtin_setjmp_receiver(), expand_nl_goto_receiver(), find_best_addr(), find_free_reg(), find_reloads_address(), fix_register(), fixup_stack_1(), fr30_expand_prologue(), gen_rtx_REG(), global_alloc(), h8300_expand_epilogue(), h8300_expand_prologue(), h8300_initial_elimination_offset(), h8300_swap_into_er6(), h8300_swap_out_of_er6(), ia64_dbx_register_number(), ia64_expand_epilogue(), ia64_expand_prologue(), ia64_initial_elimination_offset(), ia64_output_function_epilogue(), ia64_output_function_prologue(), init_alias_once(), init_emit(), init_emit_once(), init_ra(), init_reg_sets_1(), init_reload(), init_resource_info(), initial_elimination_offset(), insn_dead_p(), instantiate_virtual_regs_1(), ip2k_init_elim_offset(), iq2000_expand_epilogue(), ix86_initial_elimination_offset(), ix86_save_reg(), m68hc11_gen_movhi(), m68hc11_initial_elimination_offset(), mark_referenced_resources(), mark_regs_live_at_end(), mark_set_1(), mark_used_dest_regs(), mark_used_regs(), mark_used_regs_combine(), mem_min_alignment(), mips_initial_elimination_offset(), mips_output_function_prologue(), mips_save_reg_p(), nonlocal_mentioned_p_1(), pr_addr_post(), process_set(), regrename_optimize(), reload(), rs6000_emit_prologue(), rs6000_initial_elimination_offset(), s390_can_eliminate(), s390_decompose_address(), s390_optimize_prologue(), s390_register_info(), save_restore_insns(), sched_analyze(), score_save_reg_p(), simplify_subreg(), sparc_flat_function_epilogue(), sparc_flat_function_prologue(), sparc_nonflat_function_prologue(), th_function_prologue(), update_eliminables(), and xstormy16_initial_elimination_offset().

#define HARD_REGNO_MODE_OK	(	REGNO,
		MODE		)

Value:

((REGNO) >= 32 && (REGNO) <= 62           \
   ? GET_MODE_UNIT_SIZE (MODE) == 8 || GET_MODE_UNIT_SIZE (MODE) == 4 \
   : 1)

Definition at line 638 of file alpha.h.

#define HARD_REGNO_NREGS	(	REGNO,
		MODE		)	((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)

Definition at line 630 of file alpha.h.

#define INCOMING_RETURN_ADDR_RTX   gen_rtx_REG (Pmode, 26)

Definition at line 1283 of file alpha.h.

Referenced by df_record_entry_block_defs().

#define INDEX_REG_CLASS   NO_REGS

Definition at line 761 of file alpha.h.

#define INIT_CUMULATIVE_ARGS	(	CUM,
		FNTYPE,
		LIBNAME,
		INDIRECT		)	(CUM) = 0

Definition at line 1056 of file alpha.h.

#define INITIAL_ELIMINATION_OFFSET	(	FROM,
		TO,
		OFFSET		)

Value:

{ if ((FROM) == FRAME_POINTER_REGNUM)         \
    (OFFSET) = (ALPHA_ROUND (current_function_outgoing_args_size) \
    + alpha_sa_size ());          \
  else if ((FROM) == ARG_POINTER_REGNUM)        \
    (OFFSET) = (ALPHA_ROUND (current_function_outgoing_args_size) \
    + alpha_sa_size ()          \
    + (ALPHA_ROUND (get_frame_size ()     \
             + current_function_pretend_args_size)  \
       - current_function_pretend_args_size));    \
  else                  \
    abort ();               \
}

Definition at line 961 of file alpha.h.

#define INITIALIZE_TRAMPOLINE	(	TRAMP,
		FNADDR,
		CXT		)	alpha_initialize_trampoline (TRAMP, FNADDR, CXT, 16, 24, 8)

Definition at line 1272 of file alpha.h.

#define INT_TYPE_SIZE   32

Definition at line 416 of file alpha.h.

Referenced by add_standard_iv_candidates(), build_common_tree_nodes(), d30v_build_va_list(), default_scalar_mode_supported_p(), expand_builtin_powi(), expand_java_return(), ffecom_f2c_make_type_(), init_optabs(), java_init_decl_processing(), m68hc11_expand_builtin_va_start(), make_or_reuse_type(), pa_scalar_mode_supported_p(), and sparc_type_code().

#define LEGITIMATE_CONSTANT_P

(

X

)

Value:

(GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT  \
   || (X) == CONST0_RTX (GET_MODE (X)))

Definition at line 1328 of file alpha.h.

#define LEGITIMIZE_ADDRESS	(	X,
		OLDX,
		MODE,
		WIN		)

Value:

do {                \
  rtx new_x = alpha_legitimize_address (X, NULL_RTX, MODE); \
  if (new_x)              \
    {               \
      X = new_x;            \
      goto WIN;             \
    }               \
} while (0)

Definition at line 1394 of file alpha.h.

#define LEGITIMIZE_RELOAD_ADDRESS	(	X,
		MODE,
		OPNUM,
		TYPE,
		IND_L,
		WIN		)

Value:

do {                       \
  rtx new_x = alpha_legitimize_reload_address (X, MODE, OPNUM, TYPE, IND_L); \
  if (new_x)                     \
    {                      \
      X = new_x;                   \
      goto WIN;                    \
    }                      \
} while (0)

Definition at line 1408 of file alpha.h.

Referenced by find_reloads_address().

#define LIBCALL_VALUE

(

MODE

)

Value:

gen_rtx_REG (MODE,            \
    (TARGET_FPREGS          \
     && (GET_MODE_CLASS (MODE) == MODE_FLOAT  \
         || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \
     ? 32 : 0))

Definition at line 1009 of file alpha.h.

#define LOAD_EXTEND_OP

(

MODE

)

((MODE) == SImode ? SIGN_EXTEND : ZERO_EXTEND)

Definition at line 1493 of file alpha.h.

#define LONG_DOUBLE_TYPE_SIZE   64

Definition at line 427 of file alpha.h.

Referenced by build_common_tree_nodes_2(), default_scalar_mode_supported_p(), ffecom_f2c_make_type_(), mips_arg_info(), and pa_scalar_mode_supported_p().

#define LONG_LONG_TYPE_SIZE   64

Definition at line 419 of file alpha.h.

#define MACHINE_DEPENDENT_REORG

(

X

)

alpha_reorg(X)

Definition at line 1432 of file alpha.h.

Referenced by rest_of_compilation().

#define MASK_BUILD_CONSTANTS   (1 << 6)

Definition at line 128 of file alpha.h.

#define MASK_BWX   (1 << 8)

Definition at line 140 of file alpha.h.

Referenced by override_options().

#define MASK_CIX   (1 << 11)

Definition at line 152 of file alpha.h.

Referenced by override_options().

#define MASK_CPU_EV5   (1 << 28)

Definition at line 165 of file alpha.h.

Referenced by override_options().

#define MASK_CPU_EV6   (1 << 29)

Definition at line 169 of file alpha.h.

Referenced by override_options().

#define MASK_EXPLICIT_RELOCS   (1 << 12)

Definition at line 156 of file alpha.h.

Referenced by override_options().

#define MASK_FIX   (1 << 10)

Definition at line 148 of file alpha.h.

Referenced by override_options().

#define MASK_FLOAT_VAX   (1 << 7)

Definition at line 134 of file alpha.h.

#define MASK_FP   (1 << 0)

Definition at line 95 of file alpha.h.

#define MASK_FPREGS   (1 << 1)

Definition at line 102 of file alpha.h.

#define MASK_GAS   (1 << 2)

Definition at line 107 of file alpha.h.

#define MASK_IEEE   (1 << 4)

Definition at line 117 of file alpha.h.

#define MASK_IEEE_CONFORMANT   (1 << 3)

Definition at line 112 of file alpha.h.

Referenced by alpha_handle_option().

#define MASK_IEEE_WITH_INEXACT   (1 << 5)

Definition at line 122 of file alpha.h.

#define MASK_MAX   (1 << 9)

Definition at line 144 of file alpha.h.

Referenced by override_options().

#define MASK_SMALL_DATA   (1 << 13)

Definition at line 160 of file alpha.h.

Referenced by override_options().

#define MASK_SUPPORT_ARCH   (1 << 30)

Definition at line 174 of file alpha.h.

#define MAX_FIXED_MODE_SIZE   GET_MODE_BITSIZE (TImode)

Definition at line 1474 of file alpha.h.

#define MAX_REGS_PER_ADDRESS   1

Definition at line 1315 of file alpha.h.

#define MEMORY_MOVE_COST	(	MODE,
		CLASS,
		IN		)	(2*alpha_memory_latency)

Definition at line 889 of file alpha.h.

#define MINIMUM_ATOMIC_ALIGNMENT   ((unsigned int) (TARGET_BWX ? 8 : 32))

Definition at line 516 of file alpha.h.

#define MIPS_DEBUGGING_INFO

Definition at line 2062 of file alpha.h.

#define MIPS_IS_STAB

(

sym

)

(((sym)->index & 0xFFF00) == CODE_MASK)

Definition at line 2182 of file alpha.h.

#define MIPS_MARK_STAB

(

code

)

((code)+CODE_MASK)

Definition at line 2183 of file alpha.h.

#define MIPS_UNMARK_STAB

(

code

)

((code)-CODE_MASK)

Definition at line 2184 of file alpha.h.

#define MODES_TIEABLE_P	(	MODE1,
		MODE2		)

Value:

(HARD_REGNO_MODE_OK (32, (MODE1))       \
   ? HARD_REGNO_MODE_OK (32, (MODE2))       \
   : 1)

Definition at line 649 of file alpha.h.

#define MOVE_MAX   8

Definition at line 1462 of file alpha.h.

#define MOVE_RATIO   (TARGET_BWX ? 7 : 2)

Definition at line 1470 of file alpha.h.

#define N_REG_CLASSES   (int) LIM_REG_CLASSES

Definition at line 727 of file alpha.h.

#define NM_FLAGS   "-pg"

Definition at line 2056 of file alpha.h.

#define NO_DBX_FUNCTION_END   1

Definition at line 2104 of file alpha.h.

#define NO_FUNCTION_CSE

Definition at line 1551 of file alpha.h.

#define NO_IMPLICIT_EXTERN_C

Definition at line 2196 of file alpha.h.

#define NONSTRICT_REG_OK_FOR_BASE_P

(

X

)

(REGNO (X) < 32 || REGNO (X) == 63 || REGNO (X) >= FIRST_PSEUDO_REGISTER)

Definition at line 1351 of file alpha.h.

Referenced by alpha_legitimate_address_p().

#define NONSTRICT_REG_OK_FP_BASE_P

(

X

)

Value:

(REGNO (X) == 31 || REGNO (X) == 63   \
   || (REGNO (X) >= FIRST_PSEUDO_REGISTER \
       && REGNO (X) < LAST_VIRTUAL_REGISTER))

Definition at line 1359 of file alpha.h.

Referenced by alpha_legitimate_address_p().

#define OBJECT_FORMAT_COFF

Definition at line 2052 of file alpha.h.

#define OVERRIDE_OPTIONS   override_options ()

Definition at line 390 of file alpha.h.

#define PARM_BOUNDARY   64

Definition at line 494 of file alpha.h.

#define PCC_BITFIELD_TYPE_MATTERS   1

Definition at line 509 of file alpha.h.

#define PIC_OFFSET_TABLE_REGNUM   29

Definition at line 686 of file alpha.h.

Referenced by arm_compute_save_reg0_reg12_mask(), arm_output_function_prologue(), bfin_delegitimize_address(), calc_live_regs(), calculate_global_regs_live(), compute_frame_size(), cris_asm_output_label_ref(), cris_asm_output_symbol_ref(), cris_conditional_register_usage(), cris_initial_frame_pointer_offset(), cris_output_addr_const(), cris_output_addr_const_extra(), cris_print_operand(), cris_reg_saved_in_regsave_area(), cris_simple_epilogue(), cris_target_asm_function_epilogue(), cris_target_asm_function_prologue(), df_bb_refs_record(), df_lr_local_compute(), df_record_entry_block_defs(), df_record_exit_block_uses(), expand_asm_operands(), expand_prologue(), gen_rtx_REG(), hppa_expand_prologue(), hppa_pic_save_rtx(), i386_simplify_dwarf_addr(), init_emit_once(), init_reg_sets_1(), ix86_delegitimize_address(), legitimize_pic_address(), legitimize_tls_address(), m32r_compute_frame_size(), m68k_output_function_epilogue(), m68k_output_function_prologue(), m68k_save_reg(), m88k_expand_prologue(), m88k_layout_frame(), machopic_indirect_data_reference(), machopic_legitimize_pic_address(), mark_regs_live_at_end(), mips_expand_epilogue(), mips_output_conditional_branch(), n_pregs_to_save(), output_function_profiler(), print_operand(), rs6000_conditional_register_usage(), s390_conditional_register_usage(), s390_decompose_address(), s390_delegitimize_address(), s390_emit_epilogue(), s390_emit_prologue(), s390_frame_info(), s390_register_info(), s390_simplify_dwarf_addr(), save_restore_insns(), sh_expand_prologue(), sh_media_register_for_return(), sparc_output_mi_thunk(), thumb_compute_save_reg_mask(), and use_return_insn().

#define Pmode   DImode

Definition at line 1535 of file alpha.h.

#define POINTER_SIZE   64

Definition at line 491 of file alpha.h.

#define PREDICATE_CODES

Definition at line 1993 of file alpha.h.

#define PREFERRED_DEBUGGING_TYPE   SDB_DEBUG

Definition at line 2065 of file alpha.h.

Referenced by decode_g_option(), process_options(), and set_debug_level().

#define PREFERRED_RELOAD_CLASS   alpha_preferred_reload_class

Definition at line 823 of file alpha.h.

#define PRINT_OPERAND	(	FILE,
		X,
		CODE		)	print_operand (FILE, X, CODE)

Definition at line 1965 of file alpha.h.

#define PRINT_OPERAND_ADDRESS	(	FILE,
		ADDR		)	print_operand_address((FILE), (ADDR))

Definition at line 1988 of file alpha.h.

#define PRINT_OPERAND_PUNCT_VALID_P

(

CODE

)

Value:

((CODE) == '/' || (CODE) == ',' || (CODE) == '-' || (CODE) == '~' \
   || (CODE) == '#' || (CODE) == '*')

Definition at line 1982 of file alpha.h.

#define PROFILE_BEFORE_PROLOGUE   1

Definition at line 1219 of file alpha.h.

#define PROMOTE_FUNCTION_ARGS

Definition at line 453 of file alpha.h.

#define PROMOTE_FUNCTION_RETURN

Definition at line 457 of file alpha.h.

#define PROMOTE_MODE	(	MODE,
		UNSIGNEDP,
		TYPE		)

Value:

if (GET_MODE_CLASS (MODE) == MODE_INT   \
      && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
    {           \
      if ((MODE) == SImode)     \
  (UNSIGNEDP) = 0;      \
      (MODE) = DImode;        \
    }

Definition at line 441 of file alpha.h.

#define PUT_SDB_BLOCK_END

(

LINE

)

Value:

do {              \
  fprintf (asm_out_file,        \
     "$Le%d:\n\t%s.bend\t$Le%d\t%d\n",    \
     sdb_label_count,       \
     (TARGET_GAS) ? "" : "#",     \
     sdb_label_count,       \
     (LINE));         \
  sdb_label_count++;          \
} while (0)

Definition at line 2158 of file alpha.h.

#define PUT_SDB_BLOCK_START

(

LINE

)

Value:

do {              \
  fprintf (asm_out_file,        \
     "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n",   \
     sdb_label_count,       \
     (TARGET_GAS) ? "" : "#",     \
     sdb_label_count,       \
     (LINE));         \
  sdb_label_count++;          \
} while (0)

Definition at line 2147 of file alpha.h.

#define PUT_SDB_DEF

(

a

)

Value:

do {              \
  fprintf (asm_out_file, "\t%s.def\t",      \
     (TARGET_GAS) ? "" : "#");      \
  ASM_OUTPUT_LABELREF (asm_out_file, a);    \
  fputc (';', asm_out_file);        \
} while (0)

Definition at line 2121 of file alpha.h.

#define PUT_SDB_EPILOGUE_END

(

NAME

)

((void)(NAME))

Definition at line 2173 of file alpha.h.

#define PUT_SDB_FUNCTION_END

(

LINE

)

Definition at line 2171 of file alpha.h.

#define PUT_SDB_FUNCTION_START

(

LINE

)

Definition at line 2169 of file alpha.h.

#define PUT_SDB_PLAIN_DEF

(

a

)

Value:

do {              \
  fprintf (asm_out_file, "\t%s.def\t.%s;",    \
     (TARGET_GAS) ? "" : "#", (a));   \
} while (0)

Definition at line 2129 of file alpha.h.

#define PUT_SDB_TYPE

(

a

)

Value:

do {              \
  fprintf (asm_out_file, "\t.type\t0x%x;", (a));  \
} while (0)

Definition at line 2135 of file alpha.h.

#define READONLY_DATA_SECTION   literal_section

Definition at line 1761 of file alpha.h.

#define READONLY_DATA_SECTION_ASM_OP   "\t.rdata"

Definition at line 1727 of file alpha.h.

#define REAL_ARITHMETIC

Definition at line 413 of file alpha.h.

Referenced by const_binop(), estimate_bb_frequencies(), ffecom_init_0(), fold_convert(), fold_mathfn_compare(), propagate_freq(), simplify_binary_operation(), and simplify_binary_operation_1().

#define REDO_SECTION_INFO_P

(

DECL

)

Value:

((TREE_CODE (DECL) == VAR_DECL)                                      \
    && (DECL_ONE_ONLY (DECL) || DECL_WEAK (DECL) || DECL_COMMON (DECL)  \
        || DECL_SECTION_NAME (DECL) != 0))

Definition at line 1773 of file alpha.h.

#define REG_ALLOC_ORDER

Value:

{42, 43, 44, 45, 46, 47,    \
   54, 55, 56, 57, 58, 59, 60, 61, 62,  \
   53, 52, 51, 50, 49, 48,    \
   32, 33,        \
   34, 35, 36, 37, 38, 39, 40, 41,  \
   1, 2, 3, 4, 5, 6, 7, 8,    \
   22, 23, 24, 25,      \
   28,          \
   0,         \
   21, 20, 19, 18, 17, 16,    \
   27,          \
   9, 10, 11, 12, 13, 14,   \
   26,          \
   15,          \
   29,          \
   30, 31, 63 }

Definition at line 607 of file alpha.h.

#define REG_CLASS_CONTENTS

Value:

{ {0x00000000, 0x00000000}, /* NO_REGS */   \
  {0x01000000, 0x00000000}, /* R24_REG */   \
  {0x02000000, 0x00000000}, /* R25_REG */   \
  {0x08000000, 0x00000000}, /* R27_REG */   \
  {0xffffffff, 0x80000000}, /* GENERAL_REGS */  \
  {0x00000000, 0x7fffffff}, /* FLOAT_REGS */  \
  {0xffffffff, 0xffffffff} }

Definition at line 739 of file alpha.h.

#define REG_CLASS_FROM_LETTER

(

C

)

Value:

((C) == 'a' ? R24_REG     \
  : (C) == 'b' ? R25_REG    \
  : (C) == 'c' ? R27_REG    \
  : (C) == 'f' ? FLOAT_REGS   \
  : NO_REGS)

Definition at line 766 of file alpha.h.

#define REG_CLASS_NAMES

Value:

{"NO_REGS", "R24_REG", "R25_REG", "R27_REG",  \
  "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" }

Definition at line 731 of file alpha.h.

#define REG_OK_FOR_BASE_P

(

X

)

NONSTRICT_REG_OK_FOR_BASE_P (X)

Definition at line 1370 of file alpha.h.

#define REG_OK_FOR_INDEX_P

(

X

)

0

Definition at line 1347 of file alpha.h.

#define REGISTER_MOVE_COST	(	MODE,
		CLASS1,
		CLASS2		)

Value:

(((CLASS1) == FLOAT_REGS) == ((CLASS2) == FLOAT_REGS) \
   ? 2              \
   : TARGET_FIX ? 3 : 4+2*alpha_memory_latency)

Definition at line 878 of file alpha.h.

#define REGISTER_NAMES

Value:

{"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8",    \
 "$9", "$10", "$11", "$12", "$13", "$14", "$15",    \
 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23",  \
 "$24", "$25", "$26", "$27", "$28", "$29", "$30", "AP",   \
 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \
 "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",   \
 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\
 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "FP"}

Definition at line 1790 of file alpha.h.

#define REGNO_OK_FOR_BASE_P

(

REGNO

)

Value:

((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32  \
 || (REGNO) == 63 || reg_renumber[REGNO] == 63)

Definition at line 1310 of file alpha.h.

#define REGNO_OK_FOR_INDEX_P

(

REGNO

)

0

Definition at line 1309 of file alpha.h.

#define REGNO_REG_CLASS

(

REGNO

)

Value:

((REGNO) == 24 ? R24_REG      \
  : (REGNO) == 25 ? R25_REG     \
  : (REGNO) == 27 ? R27_REG     \
  : (REGNO) >= 32 && (REGNO) <= 62 ? FLOAT_REGS \
  : GENERAL_REGS)

Definition at line 753 of file alpha.h.

#define RETURN_ADDR_RTX   alpha_return_addr

Definition at line 1280 of file alpha.h.

Referenced by expand_builtin_return_addr().

#define RETURN_IN_MEMORY

(

TYPE

)

Value:

(TYPE_MODE (TYPE) == BLKmode \
   || TYPE_MODE (TYPE) == TFmode \
   || TYPE_MODE (TYPE) == TCmode \
   || (TREE_CODE (TYPE) == INTEGER_TYPE && TYPE_PRECISION (TYPE) > 64))

Definition at line 1022 of file alpha.h.

#define RETURN_POPS_ARGS	(	FUNDECL,
		FUNTYPE,
		SIZE		)	0

Definition at line 986 of file alpha.h.

#define RTX_COSTS	(	X,
		CODE,
		OUTER_CODE		)

Definition at line 1598 of file alpha.h.

#define SDB_ALLOW_FORWARD_REFERENCES

Definition at line 2116 of file alpha.h.

#define SDB_ALLOW_UNKNOWN_REFERENCES

Definition at line 2119 of file alpha.h.

#define SDB_DEBUGGING_INFO

Definition at line 2060 of file alpha.h.

#define SECONDARY_INPUT_RELOAD_CLASS	(	CLASS,
		MODE,
		IN		)	secondary_reload_class((CLASS), (MODE), (IN), 1)

Definition at line 832 of file alpha.h.

Referenced by choose_reload_regs(), copy_cost(), default_secondary_reload(), emit_input_reload_insns(), init_reg_autoinc(), and push_reload().

#define SECONDARY_MEMORY_NEEDED	(	CLASS1,
		CLASS2,
		MODE		)

Value:

(! TARGET_FIX && (((CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS) \
                   || ((CLASS2) == FLOAT_REGS && (CLASS1) != FLOAT_REGS)))

Definition at line 841 of file alpha.h.

Referenced by choose_reload_regs(), combine_reloads(), emit_input_reload_insns(), gen_reload(), note_local_live(), push_reload(), and push_secondary_reload().

#define SECONDARY_MEMORY_NEEDED_MODE

(

MODE

)

Value:

(GET_MODE_CLASS (MODE) == MODE_FLOAT ? (MODE)   \
   : GET_MODE_SIZE (MODE) >= 4 ? (MODE)     \
   : mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (MODE), 0))

Definition at line 850 of file alpha.h.

#define SECONDARY_OUTPUT_RELOAD_CLASS	(	CLASS,
		MODE,
		OUT		)	secondary_reload_class((CLASS), (MODE), (OUT), 0)

Definition at line 835 of file alpha.h.

Referenced by copy_cost(), default_secondary_reload(), emit_output_reload_insns(), init_reg_autoinc(), and push_reload().

#define SETUP_INCOMING_VARARGS	(	CUM,
		MODE,
		TYPE,
		PRETEND_SIZE,
		NO_RTL		)

Value:

{ if ((CUM) < 6)              \
    {                 \
      if (! (NO_RTL))             \
  {               \
    rtx tmp; int set = get_varargs_alias_set ();      \
    tmp = gen_rtx_MEM (BLKmode,         \
                 plus_constant (virtual_incoming_args_rtx,  \
                    ((CUM) + 6)* UNITS_PER_WORD)); \
    set_mem_alias_set (tmp, set);         \
    move_block_from_reg           \
      (16 + CUM, tmp,           \
       6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD);      \
                  \
    tmp = gen_rtx_MEM (BLKmode,         \
                 plus_constant (virtual_incoming_args_rtx,  \
                    (CUM) * UNITS_PER_WORD)); \
    set_mem_alias_set (tmp, set);         \
    move_block_from_reg           \
      (16 + (TARGET_FPREGS ? 32 : 0) + CUM, tmp,      \
       6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD);      \
   }                \
      PRETEND_SIZE = 12 * UNITS_PER_WORD;       \
    }                 \
}

Definition at line 1147 of file alpha.h.

#define SHASH_SIZE   511

Definition at line 2188 of file alpha.h.

#define SHIFT_COUNT_TRUNCATED   1

Definition at line 1555 of file alpha.h.

#define SHORT_IMMEDIATES_SIGN_EXTEND

Definition at line 1496 of file alpha.h.

#define SLOW_BYTE_ACCESS   1

Definition at line 1483 of file alpha.h.

#define SLOW_UNALIGNED_ACCESS	(	MODE,
		ALIGN		)	1

Definition at line 538 of file alpha.h.

#define STACK_BOUNDARY   64

Definition at line 497 of file alpha.h.

#define STACK_CHECK_BUILTIN   1

Definition at line 919 of file alpha.h.

Referenced by allocate_dynamic_stack_space(), expand_decl(), initialize_argument_information(), and reload().

#define STACK_GROWS_DOWNWARD

Definition at line 898 of file alpha.h.

#define STACK_POINTER_REGNUM   30

Definition at line 661 of file alpha.h.

#define STARTING_FRAME_OFFSET   0

Definition at line 911 of file alpha.h.

#define STATIC_CHAIN_REGNUM   1

Definition at line 682 of file alpha.h.

#define STORE_FLAG_VALUE   1

Definition at line 1505 of file alpha.h.

#define STRICT_ALIGNMENT   1

Definition at line 532 of file alpha.h.

#define STRICT_REG_OK_FOR_BASE_P

(

X

)

REGNO_OK_FOR_BASE_P (REGNO (X))

Definition at line 1365 of file alpha.h.

Referenced by alpha_legitimate_address_p().

#define STRIP_NAME_ENCODING	(	VAR,
		SYMBOL_NAME		)

Value:

do {            \
  (VAR) = (SYMBOL_NAME);      \
  if ((VAR)[0] == '@')        \
    (VAR) += 2;         \
  if ((VAR)[0] == '*')        \
    (VAR)++;          \
} while (0)

Definition at line 1778 of file alpha.h.

Referenced by arm_pe_unique_section(), cris_asm_output_mi_thunk(), cris_output_addr_const(), mcore_unique_section(), mmix_unique_section(), output_call(), output_profile_hook(), output_toc(), and unique_section().

#define STRUCT_VALUE   0

Definition at line 699 of file alpha.h.

Referenced by init_emit_once().

#define STRUCTURE_SIZE_BOUNDARY   8

Definition at line 506 of file alpha.h.

#define TARGET_ABI_OPEN_VMS   0

Definition at line 179 of file alpha.h.

Referenced by alpha_build_builtin_va_list(), alpha_build_va_list(), alpha_expand_epilogue(), alpha_expand_prologue(), alpha_file_start(), alpha_gimplify_va_arg(), alpha_init_libfuncs(), alpha_initialize_trampoline(), alpha_lookup_xfloating_lib_func(), alpha_output_function_end_prologue(), alpha_sa_mask(), alpha_sa_size(), alpha_start_function(), alpha_va_arg(), alpha_va_start(), and direct_return().

#define TARGET_ABI_OSF

Value:

(!TARGET_ABI_WINDOWS_NT \
      && !TARGET_ABI_OPEN_VMS \
      && !TARGET_ABI_UNICOSMK)

Definition at line 181 of file alpha.h.

Referenced by alpha_does_function_need_gp(), alpha_expand_prologue(), alpha_start_function(), and call_operand().

#define TARGET_ABI_UNICOSMK   0

Definition at line 180 of file alpha.h.

Referenced by alpha_build_builtin_va_list(), alpha_build_va_list(), alpha_end_function(), alpha_expand_epilogue(), alpha_expand_prologue(), alpha_extra_constraint(), alpha_gimplify_va_arg(), alpha_init_libfuncs(), alpha_output_function_end_prologue(), alpha_sa_mask(), alpha_sa_size(), alpha_start_function(), alpha_va_arg(), alpha_va_start(), call_operand(), direct_return(), and override_options().

#define TARGET_ABI_WINDOWS_NT   0

Definition at line 178 of file alpha.h.

Referenced by alpha_expand_prologue(), and alpha_output_function_end_prologue().

#define TARGET_AS_CAN_SUBTRACT_LABELS   TARGET_GAS

Definition at line 186 of file alpha.h.

#define TARGET_AS_SLASH_BEFORE_SUFFIX   TARGET_GAS

Definition at line 189 of file alpha.h.

Referenced by print_operand().

#define TARGET_BUILD_CONSTANTS   (target_flags & MASK_BUILD_CONSTANTS)

Definition at line 129 of file alpha.h.

Referenced by alpha_expand_mov(), alpha_legitimate_constant_p(), and alpha_split_const_mov().

#define TARGET_BWX   (target_flags & MASK_BWX)

Definition at line 141 of file alpha.h.

Referenced by alpha_expand_block_clear(), alpha_expand_block_move(), alpha_expand_unaligned_load(), alpha_expand_unaligned_store(), alpha_file_start(), alpha_secondary_reload_class(), input_operand(), and secondary_reload_class().

#define TARGET_CAN_FAULT_IN_PROLOGUE   0

Definition at line 192 of file alpha.h.

Referenced by alpha_expand_prologue().

#define TARGET_CIX   (target_flags & MASK_CIX)

Definition at line 153 of file alpha.h.

Referenced by alpha_file_start().

#define TARGET_CPU_DEFAULT   0

Definition at line 254 of file alpha.h.

Referenced by arm_override_options(), override_options(), rs6000_file_start(), and sparc_override_options().

#define TARGET_CPU_EV5   (target_flags & MASK_CPU_EV5)

Definition at line 166 of file alpha.h.

Referenced by alpha_file_start().

#define TARGET_CPU_EV6   (target_flags & MASK_CPU_EV6)

Definition at line 170 of file alpha.h.

Referenced by alpha_file_start(), and override_options().

#define TARGET_DEFAULT   MASK_FP|MASK_FPREGS

Definition at line 251 of file alpha.h.

#define TARGET_DEFAULT_EXPLICIT_RELOCS   0

Definition at line 261 of file alpha.h.

#define TARGET_EXPLICIT_RELOCS   (target_flags & MASK_EXPLICIT_RELOCS)

Definition at line 157 of file alpha.h.

Referenced by alpha_align_insns(), alpha_cannot_copy_insn_p(), alpha_does_function_need_gp(), alpha_encode_section_info(), alpha_expand_mov(), alpha_file_start(), alpha_legitimate_address_p(), alpha_legitimize_address(), alpha_rtx_costs(), decl_has_samegp(), input_operand(), mips_dangerous_for_la25_p(), mips_declare_object(), mips_emit_loadgp(), mips_expand_epilogue(), mips_global_pointer(), mips_in_small_data_p(), mips_load_call_address(), mips_output_cplocal(), mips_output_external(), mips_output_load_label(), mips_reorg(), mips_restore_gp(), mips_rewrite_small_data_p(), and override_options().

#define TARGET_FIX   (target_flags & MASK_FIX)

Definition at line 149 of file alpha.h.

Referenced by alpha_emit_conditional_move(), alpha_emit_setcc(), and alpha_file_start().

#define TARGET_FIXUP_EV5_PREFETCH   0

Definition at line 204 of file alpha.h.

#define TARGET_FLOAT_VAX   (target_flags & MASK_FLOAT_VAX)

Definition at line 135 of file alpha.h.

Referenced by alpha_lookup_xfloating_lib_func(), check_float_value(), GTY(), override_options(), and print_operand().

#define TARGET_FP   (target_flags & MASK_FP)

Definition at line 96 of file alpha.h.

Referenced by alphaev4_next_nop(), and alphaev5_next_nop().

#define TARGET_FPREGS   (target_flags & MASK_FPREGS)

Definition at line 103 of file alpha.h.

Referenced by alpha_setup_incoming_varargs(), and function_arg().

#define TARGET_GAS   (target_flags & MASK_GAS)

Definition at line 108 of file alpha.h.

Referenced by alpha_output_filename(), alpha_start_function(), attr_length_call(), function_arg(), gen_adddi3(), gen_addsi3(), mips_asm_file_start(), mips_assemble_integer(), mips_output_aligned_decl_common(), mips_output_filename(), mips_output_function_prologue(), output_0(), output_call(), output_indirect_call(), output_lbranch(), output_millicode_call(), override_options(), pa_asm_output_mi_thunk(), pa_output_function_epilogue(), recog_5(), recog_6(), som_output_text_section_asm_op(), som_text_section_asm_op(), and update_total_code_bytes().

#define TARGET_HAS_XFLOATING_LIBS   0

Definition at line 195 of file alpha.h.

Referenced by alpha_emit_conditional_branch(), alpha_emit_setcc(), alpha_lookup_xfloating_lib_func(), and alpha_scalar_mode_supported_p().

#define TARGET_IEEE   (target_flags & MASK_IEEE)

Definition at line 118 of file alpha.h.

Referenced by check_float_value(), and override_options().

#define TARGET_IEEE_CONFORMANT   (target_flags & MASK_IEEE_CONFORMANT)

Definition at line 113 of file alpha.h.

Referenced by alpha_start_function(), and check_float_value().

#define TARGET_IEEE_WITH_INEXACT   (target_flags & MASK_IEEE_WITH_INEXACT)

Definition at line 123 of file alpha.h.

Referenced by check_float_value(), and override_options().

#define TARGET_LD_BUGGY_LDGP   0

Definition at line 201 of file alpha.h.

#define TARGET_MAX   (target_flags & MASK_MAX)

Definition at line 145 of file alpha.h.

Referenced by alpha_file_start().

#define TARGET_MEM_FUNCTIONS   1

Definition at line 2199 of file alpha.h.

Referenced by clear_storage_via_libcall(), emit_block_move_via_libcall(), expand_assignment(), GTY(), and store_constructor().

#define TARGET_OPTIONS

Value:

{             \
  {"cpu=",    &alpha_cpu_string,    \
   N_("Use features of and schedule given CPU")}, \
  {"tune=",   &alpha_tune_string,   \
   N_("Schedule given CPU")},       \
  {"fp-rounding-mode=", &alpha_fprm_string,   \
   N_("Control the generated fp rounding mode")}, \
  {"fp-trap-mode=", &alpha_fptm_string,   \
   N_("Control the IEEE trap mode")},     \
  {"trap-precision=", &alpha_tp_string,   \
   N_("Control the precision given to fp exceptions")}, \
  {"memory-latency=", &alpha_mlat_string,   \
   N_("Tune expected memory latency")},     \
}

Definition at line 272 of file alpha.h.

Referenced by display_target_options().

#define TARGET_PROFILING_NEEDS_GP   0

Definition at line 198 of file alpha.h.

Referenced by alpha_does_function_need_gp(), alpha_expand_prologue(), and direct_call_operand().

#define TARGET_SMALL_DATA   (target_flags & MASK_SMALL_DATA)

Definition at line 161 of file alpha.h.

Referenced by decl_has_samegp(), and small_symbolic_operand().

#define TARGET_SUPPORT_ARCH   (target_flags & MASK_SUPPORT_ARCH)

Definition at line 175 of file alpha.h.

Referenced by alpha_file_start().

#define TARGET_SWITCHES

Definition at line 213 of file alpha.h.

#define TARGET_VERSION

Definition at line 50 of file alpha.h.

#define TEXT_SECTION_ASM_OP   "\t.text"

Definition at line 1723 of file alpha.h.

#define THASH_SIZE   55

Definition at line 2189 of file alpha.h.

#define TRAMPOLINE_ALIGNMENT   64

Definition at line 1266 of file alpha.h.

Referenced by expand_builtin_init_trampoline(), GTY(), and round_trampoline_addr().

#define TRAMPOLINE_SECTION   text_section

Definition at line 1258 of file alpha.h.

#define TRAMPOLINE_SIZE   32

Definition at line 1262 of file alpha.h.

#define TRAMPOLINE_TEMPLATE

(

FILE

)

Value:

do {            \
  fprintf (FILE, "\tldq $1,24($27)\n");   \
  fprintf (FILE, "\tldq $27,16($27)\n");  \
  fprintf (FILE, "\tjmp $31,($27),0\n");  \
  fprintf (FILE, "\tnop\n");      \
  fprintf (FILE, "\t.quad 0,0\n");    \
} while (0)

Definition at line 1246 of file alpha.h.

#define TRULY_NOOP_TRUNCATION	(	OUTPREC,
		INPREC		)	1

Definition at line 1500 of file alpha.h.

#define UNITS_PER_WORD   8

Definition at line 487 of file alpha.h.

#define USER_LABEL_PREFIX   ""

Definition at line 1828 of file alpha.h.

#define WCHAR_TYPE   "unsigned int"

Definition at line 429 of file alpha.h.

#define WCHAR_TYPE_SIZE   32

Definition at line 430 of file alpha.h.

#define WORD_REGISTER_OPERATIONS

Definition at line 1487 of file alpha.h.

#define WORD_SWITCH_TAKES_ARG

(

STR

)

(!strcmp (STR, "rpath") || DEFAULT_WORD_SWITCH_TAKES_ARG(STR))

Definition at line 46 of file alpha.h.

Referenced by lang_specific_driver(), lookup_option(), process_command(), and translate_options().

#define WORDS_BIG_ENDIAN   0

Definition at line 475 of file alpha.h.

---

Enumeration Type Documentation

enum alpha_fp_rounding_mode

Enumerator:

ALPHA_FPRM_NORM
ALPHA_FPRM_MINF
ALPHA_FPRM_CHOP
ALPHA_FPRM_DYN
ALPHA_FPRM_NORM
ALPHA_FPRM_MINF
ALPHA_FPRM_CHOP
ALPHA_FPRM_DYN
ALPHA_FPRM_NORM
ALPHA_FPRM_MINF
ALPHA_FPRM_CHOP
ALPHA_FPRM_DYN
ALPHA_FPRM_NORM
ALPHA_FPRM_MINF
ALPHA_FPRM_CHOP
ALPHA_FPRM_DYN

Definition at line 71 of file alpha.h.

enum alpha_fp_trap_mode

Enumerator:

ALPHA_FPTM_N
ALPHA_FPTM_U
ALPHA_FPTM_SU
ALPHA_FPTM_SUI
ALPHA_FPTM_N
ALPHA_FPTM_U
ALPHA_FPTM_SU
ALPHA_FPTM_SUI
ALPHA_FPTM_N
ALPHA_FPTM_U
ALPHA_FPTM_SU
ALPHA_FPTM_SUI
ALPHA_FPTM_N
ALPHA_FPTM_U
ALPHA_FPTM_SU
ALPHA_FPTM_SUI

Definition at line 79 of file alpha.h.

enum alpha_trap_precision

Enumerator:

ALPHA_TP_PROG
ALPHA_TP_FUNC
ALPHA_TP_INSN
ALPHA_TP_PROG
ALPHA_TP_FUNC
ALPHA_TP_INSN
ALPHA_TP_PROG
ALPHA_TP_FUNC
ALPHA_TP_INSN
ALPHA_TP_PROG
ALPHA_TP_FUNC
ALPHA_TP_INSN

Definition at line 64 of file alpha.h.

enum processor_type

Enumerator:

PROCESSOR_EV4
PROCESSOR_EV5
PROCESSOR_EV6
PROCESSOR_I386
PROCESSOR_I486
PROCESSOR_PENTIUM
PROCESSOR_PENTIUMPRO
PROCESSOR_K6
PROCESSOR_ATHLON
PROCESSOR_PENTIUM4
PROCESSOR_max
PROCESSOR_M88100
PROCESSOR_M88110
PROCESSOR_M88000
PROCESSOR_700
PROCESSOR_7100
PROCESSOR_7100LC
PROCESSOR_7200
PROCESSOR_8000
PROCESSOR_RIOS1
PROCESSOR_RIOS2
PROCESSOR_RS64A
PROCESSOR_MPCCORE
PROCESSOR_PPC403
PROCESSOR_PPC405
PROCESSOR_PPC601
PROCESSOR_PPC603
PROCESSOR_PPC604
PROCESSOR_PPC604e
PROCESSOR_PPC620
PROCESSOR_PPC630
PROCESSOR_PPC750
PROCESSOR_PPC7400
PROCESSOR_PPC7450
PROCESSOR_SH1
PROCESSOR_SH2
PROCESSOR_SH3
PROCESSOR_SH3E
PROCESSOR_SH4
PROCESSOR_SH5
PROCESSOR_DEFAULT
PROCESSOR_R3000
PROCESSOR_R3900
PROCESSOR_R6000
PROCESSOR_R4000
PROCESSOR_R4100
PROCESSOR_R4111
PROCESSOR_R4120
PROCESSOR_R4300
PROCESSOR_R4600
PROCESSOR_R4650
PROCESSOR_R5000
PROCESSOR_R5400
PROCESSOR_R5500
PROCESSOR_R8000
PROCESSOR_R4KC
PROCESSOR_R5KC
PROCESSOR_R20KC
PROCESSOR_SR71000
PROCESSOR_SB1
PROCESSOR_V7
PROCESSOR_CYPRESS
PROCESSOR_V8
PROCESSOR_SUPERSPARC
PROCESSOR_SPARCLITE
PROCESSOR_F930
PROCESSOR_F934
PROCESSOR_HYPERSPARC
PROCESSOR_SPARCLITE86X
PROCESSOR_SPARCLET
PROCESSOR_TSC701
PROCESSOR_V9
PROCESSOR_ULTRASPARC
PROCESSOR_DEFAULT
PROCESSOR_R3000
PROCESSOR_R3900
PROCESSOR_R6000
PROCESSOR_R4000
PROCESSOR_R4100
PROCESSOR_R4111
PROCESSOR_R4120
PROCESSOR_R4300
PROCESSOR_R4600
PROCESSOR_R4650
PROCESSOR_R5000
PROCESSOR_R5400
PROCESSOR_R5500
PROCESSOR_R8000
PROCESSOR_R4KC
PROCESSOR_R5KC
PROCESSOR_R20KC
PROCESSOR_SR71000
PROCESSOR_SB1
PROCESSOR_DEFAULT
PROCESSOR_R3000
PROCESSOR_R3900
PROCESSOR_R6000
PROCESSOR_R4000
PROCESSOR_R4100
PROCESSOR_R4111
PROCESSOR_R4120
PROCESSOR_R4300
PROCESSOR_R4600
PROCESSOR_R4650
PROCESSOR_R5000
PROCESSOR_R5400
PROCESSOR_R5500
PROCESSOR_R8000
PROCESSOR_R4KC
PROCESSOR_R5KC
PROCESSOR_R20KC
PROCESSOR_SR71000
PROCESSOR_SB1
PROCESSOR_EV4
PROCESSOR_EV5
PROCESSOR_EV6
PROCESSOR_I386
PROCESSOR_I486
PROCESSOR_PENTIUM
PROCESSOR_PENTIUMPRO
PROCESSOR_K6
PROCESSOR_ATHLON
PROCESSOR_PENTIUM4
PROCESSOR_max
PROCESSOR_M88100
PROCESSOR_M88110
PROCESSOR_M88000
PROCESSOR_700
PROCESSOR_7100
PROCESSOR_7100LC
PROCESSOR_7200
PROCESSOR_8000
PROCESSOR_RIOS1
PROCESSOR_RIOS2
PROCESSOR_RS64A
PROCESSOR_MPCCORE
PROCESSOR_PPC403
PROCESSOR_PPC405
PROCESSOR_PPC601
PROCESSOR_PPC603
PROCESSOR_PPC604
PROCESSOR_PPC604e
PROCESSOR_PPC620
PROCESSOR_PPC630
PROCESSOR_PPC750
PROCESSOR_PPC7400
PROCESSOR_PPC7450
PROCESSOR_SH1
PROCESSOR_SH2
PROCESSOR_SH3
PROCESSOR_SH3E
PROCESSOR_SH4
PROCESSOR_SH5
PROCESSOR_DEFAULT
PROCESSOR_R3000
PROCESSOR_R3900
PROCESSOR_R6000
PROCESSOR_R4000
PROCESSOR_R4100
PROCESSOR_R4111
PROCESSOR_R4120
PROCESSOR_R4300
PROCESSOR_R4600
PROCESSOR_R4650
PROCESSOR_R5000
PROCESSOR_R5400
PROCESSOR_R5500
PROCESSOR_R8000
PROCESSOR_R4KC
PROCESSOR_R5KC
PROCESSOR_R20KC
PROCESSOR_SR71000
PROCESSOR_SB1
PROCESSOR_V7
PROCESSOR_CYPRESS
PROCESSOR_V8
PROCESSOR_SUPERSPARC
PROCESSOR_SPARCLITE
PROCESSOR_F930
PROCESSOR_F934
PROCESSOR_HYPERSPARC
PROCESSOR_SPARCLITE86X
PROCESSOR_SPARCLET
PROCESSOR_TSC701
PROCESSOR_V9
PROCESSOR_ULTRASPARC
PROCESSOR_DEFAULT
PROCESSOR_R3000
PROCESSOR_R3900
PROCESSOR_R6000
PROCESSOR_R4000
PROCESSOR_R4100
PROCESSOR_R4111
PROCESSOR_R4120
PROCESSOR_R4300
PROCESSOR_R4600
PROCESSOR_R4650
PROCESSOR_R5000
PROCESSOR_R5400
PROCESSOR_R5500
PROCESSOR_R8000
PROCESSOR_R4KC
PROCESSOR_R5KC
PROCESSOR_R20KC
PROCESSOR_SR71000
PROCESSOR_SB1
PROCESSOR_DEFAULT
PROCESSOR_R3000
PROCESSOR_R3900
PROCESSOR_R6000
PROCESSOR_R4000
PROCESSOR_R4100
PROCESSOR_R4111
PROCESSOR_R4120
PROCESSOR_R4300
PROCESSOR_R4600
PROCESSOR_R4650
PROCESSOR_R5000
PROCESSOR_R5400
PROCESSOR_R5500
PROCESSOR_R8000
PROCESSOR_R4KC
PROCESSOR_R5KC
PROCESSOR_R20KC
PROCESSOR_SR71000
PROCESSOR_SB1
PROCESSOR_EV4
PROCESSOR_EV5
PROCESSOR_EV6
PROCESSOR_MAX
ARM_CORE
PROCESSOR_I386
PROCESSOR_I486
PROCESSOR_PENTIUM
PROCESSOR_PENTIUMPRO
PROCESSOR_K6
PROCESSOR_ATHLON
PROCESSOR_PENTIUM4
PROCESSOR_K8
PROCESSOR_NOCONA
PROCESSOR_max
PROCESSOR_ITANIUM
PROCESSOR_ITANIUM2
PROCESSOR_max
PROCESSOR_DEFAULT
PROCESSOR_IQ2000
PROCESSOR_IQ10
PROCESSOR_DEFAULT
PROCESSOR_4KC
PROCESSOR_5KC
PROCESSOR_20KC
PROCESSOR_M4K
PROCESSOR_R3000
PROCESSOR_R3900
PROCESSOR_R6000
PROCESSOR_R4000
PROCESSOR_R4100
PROCESSOR_R4111
PROCESSOR_R4120
PROCESSOR_R4130
PROCESSOR_R4300
PROCESSOR_R4600
PROCESSOR_R4650
PROCESSOR_R5000
PROCESSOR_R5400
PROCESSOR_R5500
PROCESSOR_R7000
PROCESSOR_R8000
PROCESSOR_R9000
PROCESSOR_SB1
PROCESSOR_SR71000
PROCESSOR_700
PROCESSOR_7100
PROCESSOR_7100LC
PROCESSOR_7200
PROCESSOR_7300
PROCESSOR_8000
PROCESSOR_RIOS1
PROCESSOR_RIOS2
PROCESSOR_RS64A
PROCESSOR_MPCCORE
PROCESSOR_PPC403
PROCESSOR_PPC405
PROCESSOR_PPC440
PROCESSOR_PPC601
PROCESSOR_PPC603
PROCESSOR_PPC604
PROCESSOR_PPC604e
PROCESSOR_PPC620
PROCESSOR_PPC630
PROCESSOR_PPC750
PROCESSOR_PPC7400
PROCESSOR_PPC7450
PROCESSOR_PPC8540
PROCESSOR_POWER4
PROCESSOR_POWER5
PROCESSOR_9672_G5
PROCESSOR_9672_G6
PROCESSOR_2064_Z900
PROCESSOR_2084_Z990
PROCESSOR_max
PROCESSOR_SH1
PROCESSOR_SH2
PROCESSOR_SH2E
PROCESSOR_SH2A
PROCESSOR_SH3
PROCESSOR_SH3E
PROCESSOR_SH4
PROCESSOR_SH4A
PROCESSOR_SH5
PROCESSOR_V7
PROCESSOR_CYPRESS
PROCESSOR_V8
PROCESSOR_SUPERSPARC
PROCESSOR_SPARCLITE
PROCESSOR_F930
PROCESSOR_F934
PROCESSOR_HYPERSPARC
PROCESSOR_SPARCLITE86X
PROCESSOR_SPARCLET
PROCESSOR_TSC701
PROCESSOR_V9
PROCESSOR_ULTRASPARC
PROCESSOR_ULTRASPARC3
PROCESSOR_EV4
PROCESSOR_EV5
PROCESSOR_EV6
PROCESSOR_MAX
ARM_CORE
PROCESSOR_I386
PROCESSOR_I486
PROCESSOR_PENTIUM
PROCESSOR_PENTIUMPRO
PROCESSOR_K6
PROCESSOR_ATHLON
PROCESSOR_PENTIUM4
PROCESSOR_K8
PROCESSOR_NOCONA
PROCESSOR_GENERIC32
PROCESSOR_GENERIC64
PROCESSOR_AMDFAM10
PROCESSOR_max
PROCESSOR_ITANIUM
PROCESSOR_ITANIUM2
PROCESSOR_max
PROCESSOR_DEFAULT
PROCESSOR_IQ2000
PROCESSOR_IQ10
PROCESSOR_R3000
PROCESSOR_4KC
PROCESSOR_4KP
PROCESSOR_5KC
PROCESSOR_5KF
PROCESSOR_20KC
PROCESSOR_24K
PROCESSOR_24KX
PROCESSOR_M4K
PROCESSOR_R3900
PROCESSOR_R6000
PROCESSOR_R4000
PROCESSOR_R4100
PROCESSOR_R4111
PROCESSOR_R4120
PROCESSOR_R4130
PROCESSOR_R4300
PROCESSOR_R4600
PROCESSOR_R4650
PROCESSOR_R5000
PROCESSOR_R5400
PROCESSOR_R5500
PROCESSOR_R7000
PROCESSOR_R8000
PROCESSOR_R9000
PROCESSOR_SB1
PROCESSOR_SB1A
PROCESSOR_SR71000
PROCESSOR_MAX
PROCESSOR_MN10300
PROCESSOR_AM33
PROCESSOR_AM33_2
PROCESSOR_MS1_64_001
PROCESSOR_MS1_16_002
PROCESSOR_MS1_16_003
PROCESSOR_MS2
PROCESSOR_700
PROCESSOR_7100
PROCESSOR_7100LC
PROCESSOR_7200
PROCESSOR_7300
PROCESSOR_8000
PROCESSOR_RIOS1
PROCESSOR_RIOS2
PROCESSOR_RS64A
PROCESSOR_MPCCORE
PROCESSOR_PPC403
PROCESSOR_PPC405
PROCESSOR_PPC440
PROCESSOR_PPC601
PROCESSOR_PPC603
PROCESSOR_PPC604
PROCESSOR_PPC604e
PROCESSOR_PPC620
PROCESSOR_PPC630
PROCESSOR_PPC750
PROCESSOR_PPC7400
PROCESSOR_PPC7450
PROCESSOR_PPC8540
PROCESSOR_POWER4
PROCESSOR_POWER5
PROCESSOR_9672_G5
PROCESSOR_9672_G6
PROCESSOR_2064_Z900
PROCESSOR_2084_Z990
PROCESSOR_2094_Z9_109
PROCESSOR_max
PROCESSOR_SH1
PROCESSOR_SH2
PROCESSOR_SH2E
PROCESSOR_SH2A
PROCESSOR_SH3
PROCESSOR_SH3E
PROCESSOR_SH4
PROCESSOR_SH4A
PROCESSOR_SH5
PROCESSOR_V7
PROCESSOR_CYPRESS
PROCESSOR_V8
PROCESSOR_SUPERSPARC
PROCESSOR_SPARCLITE
PROCESSOR_F930
PROCESSOR_F934
PROCESSOR_HYPERSPARC
PROCESSOR_SPARCLITE86X
PROCESSOR_SPARCLET
PROCESSOR_TSC701
PROCESSOR_V9
PROCESSOR_ULTRASPARC
PROCESSOR_ULTRASPARC3
PROCESSOR_NIAGARA

Definition at line 57 of file alpha.h.

enum reg_class

Enumerator:

NO_REGS
R2
R0_1
INDEX_REGS
BASE_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
LR0_REGS
GENERAL_REGS
BP_REGS
FC_REGS
CR_REGS
Q_REGS
SPECIAL_REGS
ACCUM0_REGS
ACCUM_REGS
FLOAT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R24_REG
R25_REG
R27_REG
GENERAL_REGS
FLOAT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
LPCOUNT_REG
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
FPU_REGS
LO_REGS
STACK_REG
BASE_REGS
HI_REGS
CC_REG
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REG
POINTER_X_REGS
POINTER_Y_REGS
POINTER_Z_REGS
STACK_REG
BASE_POINTER_REGS
POINTER_REGS
ADDW_REGS
SIMPLE_LD_REGS
LD_REGS
NO_LD_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0R1_REGS
R2R3_REGS
EXT_LOW_REGS
EXT_REGS
ADDR_REGS
INDEX_REGS
BK_REG
SP_REG
RC_REG
COUNTER_REGS
INT_REGS
GENERAL_REGS
DP_REG
ST_REG
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
FLOAT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
S_REGS
INDEX_REGS
SP_REGS
A_REGS
SI_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
REPEAT_REGS
CR_REGS
ACCUM_REGS
OTHER_FLAG_REGS
F0_REGS
F1_REGS
BR_FLAG_REGS
FLAG_REGS
EVEN_REGS
GPR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
A0H_REG
A0L_REG
A0_REG
A1H_REG
ACCUM_HIGH_REGS
A1L_REG
ACCUM_LOW_REGS
A1_REG
ACCUM_REGS
X_REG
X_OR_ACCUM_LOW_REGS
X_OR_ACCUM_REGS
YH_REG
YH_OR_ACCUM_HIGH_REGS
X_OR_YH_REGS
YL_REG
YL_OR_ACCUM_LOW_REGS
X_OR_YL_REGS
X_OR_Y_REGS
Y_REG
ACCUM_OR_Y_REGS
PH_REG
X_OR_PH_REGS
PL_REG
PL_OR_ACCUM_LOW_REGS
X_OR_PL_REGS
YL_OR_PL_OR_ACCUM_LOW_REGS
P_REG
ACCUM_OR_P_REGS
YL_OR_P_REGS
ACCUM_LOW_OR_YL_OR_P_REGS
Y_OR_P_REGS
ACCUM_Y_OR_P_REGS
NO_FRAME_Y_ADDR_REGS
Y_ADDR_REGS
ACCUM_LOW_OR_Y_ADDR_REGS
ACCUM_OR_Y_ADDR_REGS
X_OR_Y_ADDR_REGS
Y_OR_Y_ADDR_REGS
P_OR_Y_ADDR_REGS
NON_HIGH_YBASE_ELIGIBLE_REGS
YBASE_ELIGIBLE_REGS
J_REG
J_OR_DAU_16_BIT_REGS
BMU_REGS
NOHIGH_NON_ADDR_REGS
NON_ADDR_REGS
SLOW_MEM_LOAD_REGS
NOHIGH_NON_YBASE_REGS
NO_ACCUM_NON_YBASE_REGS
NON_YBASE_REGS
YBASE_VIRT_REGS
ACCUM_LOW_OR_YBASE_REGS
ACCUM_OR_YBASE_REGS
X_OR_YBASE_REGS
Y_OR_YBASE_REGS
ACCUM_LOW_YL_PL_OR_YBASE_REGS
P_OR_YBASE_REGS
ACCUM_Y_P_OR_YBASE_REGS
Y_ADDR_OR_YBASE_REGS
YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS
YBASE_OR_YBASE_ELIGIBLE_REGS
NO_HIGH_ALL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
MULTIPLY_32_REG
MULTIPLY_64_REG
LOW_REGS
HIGH_REGS
REAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
MAC_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ADDR_REGS
DATA_REGS
FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
AREG
DREG
CREG
BREG
SIREG
DIREG
AD_REGS
Q_REGS
NON_Q_REGS
INDEX_REGS
LEGACY_REGS
GENERAL_REGS
FP_TOP_REG
FP_SECOND_REG
FLOAT_REGS
SSE_REGS
MMX_REGS
FP_TOP_SSE_REGS
FP_SECOND_SSE_REGS
FLOAT_SSE_REGS
FLOAT_INT_REGS
INT_SSE_REGS
FLOAT_INT_SSE_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GLOBAL_REGS
LOCAL_REGS
LOCAL_OR_GLOBAL_REGS
FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
PR_REGS
BR_REGS
AR_M_REGS
AR_I_REGS
ADDL_REGS
GR_REGS
FR_REGS
GR_AND_BR_REGS
GR_AND_FR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
CARRY_REG
ACCUM_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
D_REGS
X_REGS
Y_REGS
SP_REGS
DA_REGS
DB_REGS
Z_REGS
D8_REGS
Q_REGS
D_OR_X_REGS
D_OR_Y_REGS
D_OR_SP_REGS
X_OR_Y_REGS
A_REGS
X_OR_SP_REGS
Y_OR_SP_REGS
X_OR_Y_OR_D_REGS
A_OR_D_REGS
A_OR_SP_REGS
H_REGS
S_REGS
D_OR_S_REGS
X_OR_S_REGS
Y_OR_S_REGS
SP_OR_S_REGS
D_OR_X_OR_S_REGS
D_OR_Y_OR_S_REGS
D_OR_SP_OR_S_REGS
A_OR_S_REGS
D_OR_A_OR_S_REGS
TMP_REGS
D_OR_A_OR_TMP_REGS
G_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDR_REGS
FP_REGS
GENERAL_REGS
DATA_OR_FP_REGS
ADDR_OR_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
AP_REG
XRF_REGS
GENERAL_REGS
AGRF_REGS
XGRF_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ONLYR1_REGS
LRW_REGS
GENERAL_REGS
C_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
REMAINDER_REG
HIMULT_REG
SYSTEM_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDRESS_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDRESS_REGS
SP_REGS
DATA_OR_ADDRESS_REGS
SP_OR_ADDRESS_REGS
EXTENDED_REGS
DATA_OR_EXTENDED_REGS
ADDRESS_OR_EXTENDED_REGS
SP_OR_EXTENDED_REGS
SP_OR_ADDRESS_OR_EXTENDED_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
FLOAT_REG0
LONG_FLOAT_REG0
FLOAT_REGS
FP_REGS
GEN_AND_FP_REGS
FRAME_POINTER_REG
STACK_POINTER_REG
GEN_AND_MEM_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R1_REGS
GENERAL_REGS
FPUPPER_REGS
FP_REGS
GENERAL_OR_FP_REGS
SHIFT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R1_REGS
GENERAL_REGS
FPUPPER_REGS
FP_REGS
GENERAL_OR_FP_REGS
SHIFT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
MUL_REGS
GENERAL_REGS
LOAD_FPU_REGS
NO_LOAD_FPU_REGS
FPU_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
OUT_REGS
STD_REGS
ARG_REGS
SRC_REGS
DST_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
R15_REGS
BASE_REGS
GENERAL_REGS
FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
BASE_REGS
GENERAL_REGS
FLOAT_REGS
ALTIVEC_REGS
VRSAVE_REGS
NON_SPECIAL_REGS
MQ_REGS
LINK_REGS
CTR_REGS
LINK_OR_CTR_REGS
SPECIAL_REGS
SPEC_OR_GEN_REGS
CR0_REGS
CR_REGS
NON_FLOAT_REGS
XER_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ADDR_REGS
GENERAL_REGS
FP_REGS
ADDR_FP_REGS
GENERAL_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
PR_REGS
T_REGS
MAC_REGS
FPUL_REGS
SIBCALL_REGS
GENERAL_REGS
FP0_REGS
FP_REGS
DF_REGS
FPSCR_REGS
GENERAL_FP_REGS
TARGET_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
M16_NA_REGS
M16_REGS
T_REG
M16_T_REGS
GR_REGS
FP_REGS
HI_REG
LO_REG
HILO_REG
MD_REGS
COP0_REGS
COP2_REGS
COP3_REGS
HI_AND_GR_REGS
LO_AND_GR_REGS
HILO_AND_GR_REGS
HI_AND_FP_REGS
COP0_AND_GR_REGS
COP2_AND_GR_REGS
COP3_AND_GR_REGS
ALL_COP_REGS
ALL_COP_AND_GR_REGS
ST_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
FPCC_REGS
I64_REGS
GENERAL_REGS
FP_REGS
EXTRA_FP_REGS
GENERAL_OR_FP_REGS
GENERAL_OR_EXTRA_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
R1_REGS
TWO_REGS
R2_REGS
EIGHT_REGS
R8_REGS
ICALL_REGS
GENERAL_REGS
CARRY_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
BR_REGS
FP_REGS
ACC_REG
SP_REG
RL_REGS
GR_REGS
AR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
M16_NA_REGS
M16_REGS
T_REG
M16_T_REGS
GR_REGS
FP_REGS
HI_REG
LO_REG
HILO_REG
MD_REGS
COP0_REGS
COP2_REGS
COP3_REGS
HI_AND_GR_REGS
LO_AND_GR_REGS
HILO_AND_GR_REGS
HI_AND_FP_REGS
COP0_AND_GR_REGS
COP2_AND_GR_REGS
COP3_AND_GR_REGS
ALL_COP_REGS
ALL_COP_AND_GR_REGS
ST_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
M16_NA_REGS
M16_REGS
T_REG
M16_T_REGS
GR_REGS
FP_REGS
HI_REG
LO_REG
HILO_REG
MD_REGS
COP0_REGS
COP2_REGS
COP3_REGS
HI_AND_GR_REGS
LO_AND_GR_REGS
HILO_AND_GR_REGS
HI_AND_FP_REGS
COP0_AND_GR_REGS
COP2_AND_GR_REGS
COP3_AND_GR_REGS
ALL_COP_REGS
ALL_COP_AND_GR_REGS
ST_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R2
R0_1
INDEX_REGS
BASE_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
LR0_REGS
GENERAL_REGS
BP_REGS
FC_REGS
CR_REGS
Q_REGS
SPECIAL_REGS
ACCUM0_REGS
ACCUM_REGS
FLOAT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R24_REG
R25_REG
R27_REG
GENERAL_REGS
FLOAT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
LPCOUNT_REG
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
FPU_REGS
LO_REGS
STACK_REG
BASE_REGS
HI_REGS
CC_REG
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REG
POINTER_X_REGS
POINTER_Y_REGS
POINTER_Z_REGS
STACK_REG
BASE_POINTER_REGS
POINTER_REGS
ADDW_REGS
SIMPLE_LD_REGS
LD_REGS
NO_LD_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0R1_REGS
R2R3_REGS
EXT_LOW_REGS
EXT_REGS
ADDR_REGS
INDEX_REGS
BK_REG
SP_REG
RC_REG
COUNTER_REGS
INT_REGS
GENERAL_REGS
DP_REG
ST_REG
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
FLOAT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
S_REGS
INDEX_REGS
SP_REGS
A_REGS
SI_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
REPEAT_REGS
CR_REGS
ACCUM_REGS
OTHER_FLAG_REGS
F0_REGS
F1_REGS
BR_FLAG_REGS
FLAG_REGS
EVEN_REGS
GPR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
A0H_REG
A0L_REG
A0_REG
A1H_REG
ACCUM_HIGH_REGS
A1L_REG
ACCUM_LOW_REGS
A1_REG
ACCUM_REGS
X_REG
X_OR_ACCUM_LOW_REGS
X_OR_ACCUM_REGS
YH_REG
YH_OR_ACCUM_HIGH_REGS
X_OR_YH_REGS
YL_REG
YL_OR_ACCUM_LOW_REGS
X_OR_YL_REGS
X_OR_Y_REGS
Y_REG
ACCUM_OR_Y_REGS
PH_REG
X_OR_PH_REGS
PL_REG
PL_OR_ACCUM_LOW_REGS
X_OR_PL_REGS
YL_OR_PL_OR_ACCUM_LOW_REGS
P_REG
ACCUM_OR_P_REGS
YL_OR_P_REGS
ACCUM_LOW_OR_YL_OR_P_REGS
Y_OR_P_REGS
ACCUM_Y_OR_P_REGS
NO_FRAME_Y_ADDR_REGS
Y_ADDR_REGS
ACCUM_LOW_OR_Y_ADDR_REGS
ACCUM_OR_Y_ADDR_REGS
X_OR_Y_ADDR_REGS
Y_OR_Y_ADDR_REGS
P_OR_Y_ADDR_REGS
NON_HIGH_YBASE_ELIGIBLE_REGS
YBASE_ELIGIBLE_REGS
J_REG
J_OR_DAU_16_BIT_REGS
BMU_REGS
NOHIGH_NON_ADDR_REGS
NON_ADDR_REGS
SLOW_MEM_LOAD_REGS
NOHIGH_NON_YBASE_REGS
NO_ACCUM_NON_YBASE_REGS
NON_YBASE_REGS
YBASE_VIRT_REGS
ACCUM_LOW_OR_YBASE_REGS
ACCUM_OR_YBASE_REGS
X_OR_YBASE_REGS
Y_OR_YBASE_REGS
ACCUM_LOW_YL_PL_OR_YBASE_REGS
P_OR_YBASE_REGS
ACCUM_Y_P_OR_YBASE_REGS
Y_ADDR_OR_YBASE_REGS
YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS
YBASE_OR_YBASE_ELIGIBLE_REGS
NO_HIGH_ALL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
MULTIPLY_32_REG
MULTIPLY_64_REG
LOW_REGS
HIGH_REGS
REAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
MAC_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ADDR_REGS
DATA_REGS
FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
AREG
DREG
CREG
BREG
SIREG
DIREG
AD_REGS
Q_REGS
NON_Q_REGS
INDEX_REGS
LEGACY_REGS
GENERAL_REGS
FP_TOP_REG
FP_SECOND_REG
FLOAT_REGS
SSE_REGS
MMX_REGS
FP_TOP_SSE_REGS
FP_SECOND_SSE_REGS
FLOAT_SSE_REGS
FLOAT_INT_REGS
INT_SSE_REGS
FLOAT_INT_SSE_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GLOBAL_REGS
LOCAL_REGS
LOCAL_OR_GLOBAL_REGS
FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
PR_REGS
BR_REGS
AR_M_REGS
AR_I_REGS
ADDL_REGS
GR_REGS
FR_REGS
GR_AND_BR_REGS
GR_AND_FR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
CARRY_REG
ACCUM_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
D_REGS
X_REGS
Y_REGS
SP_REGS
DA_REGS
DB_REGS
Z_REGS
D8_REGS
Q_REGS
D_OR_X_REGS
D_OR_Y_REGS
D_OR_SP_REGS
X_OR_Y_REGS
A_REGS
X_OR_SP_REGS
Y_OR_SP_REGS
X_OR_Y_OR_D_REGS
A_OR_D_REGS
A_OR_SP_REGS
H_REGS
S_REGS
D_OR_S_REGS
X_OR_S_REGS
Y_OR_S_REGS
SP_OR_S_REGS
D_OR_X_OR_S_REGS
D_OR_Y_OR_S_REGS
D_OR_SP_OR_S_REGS
A_OR_S_REGS
D_OR_A_OR_S_REGS
TMP_REGS
D_OR_A_OR_TMP_REGS
G_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDR_REGS
FP_REGS
GENERAL_REGS
DATA_OR_FP_REGS
ADDR_OR_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
AP_REG
XRF_REGS
GENERAL_REGS
AGRF_REGS
XGRF_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ONLYR1_REGS
LRW_REGS
GENERAL_REGS
C_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
REMAINDER_REG
HIMULT_REG
SYSTEM_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDRESS_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDRESS_REGS
SP_REGS
DATA_OR_ADDRESS_REGS
SP_OR_ADDRESS_REGS
EXTENDED_REGS
DATA_OR_EXTENDED_REGS
ADDRESS_OR_EXTENDED_REGS
SP_OR_EXTENDED_REGS
SP_OR_ADDRESS_OR_EXTENDED_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
FLOAT_REG0
LONG_FLOAT_REG0
FLOAT_REGS
FP_REGS
GEN_AND_FP_REGS
FRAME_POINTER_REG
STACK_POINTER_REG
GEN_AND_MEM_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R1_REGS
GENERAL_REGS
FPUPPER_REGS
FP_REGS
GENERAL_OR_FP_REGS
SHIFT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R1_REGS
GENERAL_REGS
FPUPPER_REGS
FP_REGS
GENERAL_OR_FP_REGS
SHIFT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
MUL_REGS
GENERAL_REGS
LOAD_FPU_REGS
NO_LOAD_FPU_REGS
FPU_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
OUT_REGS
STD_REGS
ARG_REGS
SRC_REGS
DST_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
R15_REGS
BASE_REGS
GENERAL_REGS
FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
BASE_REGS
GENERAL_REGS
FLOAT_REGS
ALTIVEC_REGS
VRSAVE_REGS
NON_SPECIAL_REGS
MQ_REGS
LINK_REGS
CTR_REGS
LINK_OR_CTR_REGS
SPECIAL_REGS
SPEC_OR_GEN_REGS
CR0_REGS
CR_REGS
NON_FLOAT_REGS
XER_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ADDR_REGS
GENERAL_REGS
FP_REGS
ADDR_FP_REGS
GENERAL_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
PR_REGS
T_REGS
MAC_REGS
FPUL_REGS
SIBCALL_REGS
GENERAL_REGS
FP0_REGS
FP_REGS
DF_REGS
FPSCR_REGS
GENERAL_FP_REGS
TARGET_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
M16_NA_REGS
M16_REGS
T_REG
M16_T_REGS
GR_REGS
FP_REGS
HI_REG
LO_REG
HILO_REG
MD_REGS
COP0_REGS
COP2_REGS
COP3_REGS
HI_AND_GR_REGS
LO_AND_GR_REGS
HILO_AND_GR_REGS
HI_AND_FP_REGS
COP0_AND_GR_REGS
COP2_AND_GR_REGS
COP3_AND_GR_REGS
ALL_COP_REGS
ALL_COP_AND_GR_REGS
ST_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
FPCC_REGS
I64_REGS
GENERAL_REGS
FP_REGS
EXTRA_FP_REGS
GENERAL_OR_FP_REGS
GENERAL_OR_EXTRA_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
R1_REGS
TWO_REGS
R2_REGS
EIGHT_REGS
R8_REGS
ICALL_REGS
GENERAL_REGS
CARRY_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
BR_REGS
FP_REGS
ACC_REG
SP_REG
RL_REGS
GR_REGS
AR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
M16_NA_REGS
M16_REGS
T_REG
M16_T_REGS
GR_REGS
FP_REGS
HI_REG
LO_REG
HILO_REG
MD_REGS
COP0_REGS
COP2_REGS
COP3_REGS
HI_AND_GR_REGS
LO_AND_GR_REGS
HILO_AND_GR_REGS
HI_AND_FP_REGS
COP0_AND_GR_REGS
COP2_AND_GR_REGS
COP3_AND_GR_REGS
ALL_COP_REGS
ALL_COP_AND_GR_REGS
ST_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
M16_NA_REGS
M16_REGS
T_REG
M16_T_REGS
GR_REGS
FP_REGS
HI_REG
LO_REG
HILO_REG
MD_REGS
COP0_REGS
COP2_REGS
COP3_REGS
HI_AND_GR_REGS
LO_AND_GR_REGS
HILO_AND_GR_REGS
HI_AND_FP_REGS
COP0_AND_GR_REGS
COP2_AND_GR_REGS
COP3_AND_GR_REGS
ALL_COP_REGS
ALL_COP_AND_GR_REGS
ST_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REG
R24_REG
R25_REG
R27_REG
GENERAL_REGS
FLOAT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
LPCOUNT_REG
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
FPA_REGS
CIRRUS_REGS
VFP_REGS
IWMMXT_GR_REGS
IWMMXT_REGS
LO_REGS
STACK_REG
BASE_REGS
HI_REGS
CC_REG
VFPCC_REG
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REG
POINTER_X_REGS
POINTER_Y_REGS
POINTER_Z_REGS
STACK_REG
BASE_POINTER_REGS
POINTER_REGS
ADDW_REGS
SIMPLE_LD_REGS
LD_REGS
NO_LD_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
IREGS
BREGS
LREGS
MREGS
CIRCREGS
DAGREGS
EVEN_AREGS
ODD_AREGS
AREGS
CCREGS
EVEN_DREGS
ODD_DREGS
DREGS
PREGS_CLOBBERED
PREGS
DPREGS
MOST_REGS
PROLOGUE_REGS
NON_A_CC_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0R1_REGS
R2R3_REGS
EXT_LOW_REGS
EXT_REGS
ADDR_REGS
INDEX_REGS
BK_REG
SP_REG
RC_REG
COUNTER_REGS
INT_REGS
GENERAL_REGS
DP_REG
ST_REG
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
MULTIPLY_32_REG
MULTIPLY_64_REG
LOW_REGS
HIGH_REGS
REAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ICC_REGS
FCC_REGS
CC_REGS
ICR_REGS
FCR_REGS
CR_REGS
LCR_REG
LR_REG
GR8_REGS
GR9_REGS
GR89_REGS
FDPIC_REGS
FDPIC_FPTR_REGS
FDPIC_CALL_REGS
SPR_REGS
QUAD_ACC_REGS
EVEN_ACC_REGS
ACC_REGS
ACCG_REGS
QUAD_FPR_REGS
FEVEN_REGS
FPR_REGS
QUAD_REGS
EVEN_REGS
GPR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
COUNTER_REGS
SOURCE_REGS
DESTINATION_REGS
GENERAL_REGS
MAC_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
AREG
DREG
CREG
BREG
SIREG
DIREG
AD_REGS
Q_REGS
NON_Q_REGS
INDEX_REGS
LEGACY_REGS
GENERAL_REGS
FP_TOP_REG
FP_SECOND_REG
FLOAT_REGS
SSE_REGS
MMX_REGS
FP_TOP_SSE_REGS
FP_SECOND_SSE_REGS
FLOAT_SSE_REGS
FLOAT_INT_REGS
INT_SSE_REGS
FLOAT_INT_SSE_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
PR_REGS
BR_REGS
AR_M_REGS
AR_I_REGS
ADDL_REGS
GR_REGS
FR_REGS
GR_AND_BR_REGS
GR_AND_FR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DPH_REGS
DPL_REGS
DP_REGS
SP_REGS
IPH_REGS
IPL_REGS
IP_REGS
DP_SP_REGS
PTR_REGS
NONPTR_REGS
NONSP_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
CARRY_REG
ACCUM_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
D_REGS
X_REGS
Y_REGS
SP_REGS
DA_REGS
DB_REGS
Z_REGS
D8_REGS
Q_REGS
D_OR_X_REGS
D_OR_Y_REGS
D_OR_SP_REGS
X_OR_Y_REGS
A_REGS
X_OR_SP_REGS
Y_OR_SP_REGS
X_OR_Y_OR_D_REGS
A_OR_D_REGS
A_OR_SP_REGS
H_REGS
S_REGS
D_OR_S_REGS
X_OR_S_REGS
Y_OR_S_REGS
Z_OR_S_REGS
SP_OR_S_REGS
D_OR_X_OR_S_REGS
D_OR_Y_OR_S_REGS
D_OR_SP_OR_S_REGS
A_OR_S_REGS
D_OR_A_OR_S_REGS
TMP_REGS
D_OR_A_OR_TMP_REGS
G_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDR_REGS
FP_REGS
GENERAL_REGS
DATA_OR_FP_REGS
ADDR_OR_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ONLYR1_REGS
LRW_REGS
GENERAL_REGS
C_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
M16_NA_REGS
M16_REGS
T_REG
M16_T_REGS
PIC_FN_ADDR_REG
LEA_REGS
GR_REGS
FP_REGS
HI_REG
LO_REG
MD_REGS
COP0_REGS
COP2_REGS
COP3_REGS
HI_AND_GR_REGS
LO_AND_GR_REGS
HI_AND_FP_REGS
COP0_AND_GR_REGS
COP2_AND_GR_REGS
COP3_AND_GR_REGS
ALL_COP_REGS
ALL_COP_AND_GR_REGS
ST_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
REMAINDER_REG
HIMULT_REG
SYSTEM_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDRESS_REGS
SP_REGS
DATA_OR_ADDRESS_REGS
SP_OR_ADDRESS_REGS
EXTENDED_REGS
DATA_OR_EXTENDED_REGS
ADDRESS_OR_EXTENDED_REGS
SP_OR_EXTENDED_REGS
SP_OR_ADDRESS_OR_EXTENDED_REGS
FP_REGS
FP_ACC_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
FLOAT_REG0
LONG_FLOAT_REG0
FLOAT_REGS
LONG_REGS
FP_REGS
GEN_AND_FP_REGS
FRAME_POINTER_REG
STACK_POINTER_REG
GEN_AND_MEM_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R1_REGS
GENERAL_REGS
FPUPPER_REGS
FP_REGS
GENERAL_OR_FP_REGS
SHIFT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R1_REGS
GENERAL_REGS
FPUPPER_REGS
FP_REGS
GENERAL_OR_FP_REGS
SHIFT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
MUL_REGS
GENERAL_REGS
LOAD_FPU_REGS
NO_LOAD_FPU_REGS
FPU_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
BASE_REGS
GENERAL_REGS
FLOAT_REGS
ALTIVEC_REGS
VRSAVE_REGS
VSCR_REGS
SPE_ACC_REGS
SPEFSCR_REGS
NON_SPECIAL_REGS
MQ_REGS
LINK_REGS
CTR_REGS
LINK_OR_CTR_REGS
SPECIAL_REGS
SPEC_OR_GEN_REGS
CR0_REGS
CR_REGS
NON_FLOAT_REGS
XER_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
CC_REGS
ADDR_REGS
GENERAL_REGS
ACCESS_REGS
ADDR_CC_REGS
GENERAL_CC_REGS
FP_REGS
ADDR_FP_REGS
GENERAL_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
PR_REGS
T_REGS
MAC_REGS
FPUL_REGS
SIBCALL_REGS
GENERAL_REGS
FP0_REGS
FP_REGS
DF_HI_REGS
DF_REGS
FPSCR_REGS
GENERAL_FP_REGS
TARGET_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
FPCC_REGS
I64_REGS
GENERAL_REGS
FP_REGS
EXTRA_FP_REGS
GENERAL_OR_FP_REGS
GENERAL_OR_EXTRA_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
R1_REGS
TWO_REGS
R2_REGS
EIGHT_REGS
R8_REGS
ICALL_REGS
GENERAL_REGS
CARRY_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
BR_REGS
FP_REGS
ACC_REG
SP_REG
RL_REGS
GR_REGS
AR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REG
R24_REG
R25_REG
R27_REG
GENERAL_REGS
FLOAT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
LPCOUNT_REG
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
FPA_REGS
CIRRUS_REGS
VFP_REGS
IWMMXT_GR_REGS
IWMMXT_REGS
LO_REGS
STACK_REG
BASE_REGS
HI_REGS
CC_REG
VFPCC_REG
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REG
POINTER_X_REGS
POINTER_Y_REGS
POINTER_Z_REGS
STACK_REG
BASE_POINTER_REGS
POINTER_REGS
ADDW_REGS
SIMPLE_LD_REGS
LD_REGS
NO_LD_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
IREGS
BREGS
LREGS
MREGS
CIRCREGS
DAGREGS
EVEN_AREGS
ODD_AREGS
AREGS
CCREGS
EVEN_DREGS
ODD_DREGS
DREGS
FDPIC_REGS
FDPIC_FPTR_REGS
PREGS_CLOBBERED
PREGS
IPREGS
DPREGS
MOST_REGS
LT_REGS
LC_REGS
LB_REGS
PROLOGUE_REGS
NON_A_CC_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0R1_REGS
R2R3_REGS
EXT_LOW_REGS
EXT_REGS
ADDR_REGS
INDEX_REGS
BK_REG
SP_REG
RC_REG
COUNTER_REGS
INT_REGS
GENERAL_REGS
DP_REG
ST_REG
ALL_REGS
LIM_REG_CLASSES
NO_REGS
MOF_REGS
CC0_REGS
SPECIAL_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
LO_REGS
HI_REGS
HILO_REGS
NOSP_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
MULTIPLY_32_REG
MULTIPLY_64_REG
LOW_REGS
HIGH_REGS
REAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ICC_REGS
FCC_REGS
CC_REGS
ICR_REGS
FCR_REGS
CR_REGS
LCR_REG
LR_REG
GR8_REGS
GR9_REGS
GR89_REGS
FDPIC_REGS
FDPIC_FPTR_REGS
FDPIC_CALL_REGS
SPR_REGS
QUAD_ACC_REGS
EVEN_ACC_REGS
ACC_REGS
ACCG_REGS
QUAD_FPR_REGS
FEVEN_REGS
FPR_REGS
QUAD_REGS
EVEN_REGS
GPR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
COUNTER_REGS
SOURCE_REGS
DESTINATION_REGS
GENERAL_REGS
MAC_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
AREG
DREG
CREG
BREG
SIREG
DIREG
AD_REGS
Q_REGS
NON_Q_REGS
INDEX_REGS
LEGACY_REGS
GENERAL_REGS
FP_TOP_REG
FP_SECOND_REG
FLOAT_REGS
SSE_REGS
MMX_REGS
FP_TOP_SSE_REGS
FP_SECOND_SSE_REGS
FLOAT_SSE_REGS
FLOAT_INT_REGS
INT_SSE_REGS
FLOAT_INT_SSE_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
PR_REGS
BR_REGS
AR_M_REGS
AR_I_REGS
ADDL_REGS
GR_REGS
FP_REGS
FR_REGS
GR_AND_BR_REGS
GR_AND_FR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
SP_REGS
FB_REGS
SB_REGS
CR_REGS
R0_REGS
R1_REGS
R2_REGS
R3_REGS
R02_REGS
HL_REGS
QI_REGS
R23_REGS
R03_REGS
DI_REGS
A0_REGS
A1_REGS
A_REGS
AD_REGS
PS_REGS
SI_REGS
HI_REGS
RA_REGS
GENERAL_REGS
FLG_REGS
HC_REGS
MEM_REGS
R02_A_MEM_REGS
A_HL_MEM_REGS
R1_R3_A_MEM_REGS
R03_MEM_REGS
A_HI_MEM_REGS
A_AD_CR_MEM_SI_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
CARRY_REG
ACCUM_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
D_REGS
X_REGS
Y_REGS
SP_REGS
DA_REGS
DB_REGS
Z_REGS
D8_REGS
Q_REGS
D_OR_X_REGS
D_OR_Y_REGS
D_OR_SP_REGS
X_OR_Y_REGS
A_REGS
X_OR_SP_REGS
Y_OR_SP_REGS
X_OR_Y_OR_D_REGS
A_OR_D_REGS
A_OR_SP_REGS
H_REGS
S_REGS
D_OR_S_REGS
X_OR_S_REGS
Y_OR_S_REGS
Z_OR_S_REGS
SP_OR_S_REGS
D_OR_X_OR_S_REGS
D_OR_Y_OR_S_REGS
D_OR_SP_OR_S_REGS
A_OR_S_REGS
D_OR_A_OR_S_REGS
TMP_REGS
D_OR_A_OR_TMP_REGS
G_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDR_REGS
FP_REGS
GENERAL_REGS
DATA_OR_FP_REGS
ADDR_OR_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ONLYR1_REGS
LRW_REGS
GENERAL_REGS
C_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
M16_NA_REGS
M16_REGS
T_REG
M16_T_REGS
PIC_FN_ADDR_REG
V1_REG
LEA_REGS
GR_REGS
FP_REGS
HI_REG
LO_REG
MD_REGS
COP0_REGS
COP2_REGS
COP3_REGS
HI_AND_GR_REGS
LO_AND_GR_REGS
HI_AND_FP_REGS
COP0_AND_GR_REGS
COP2_AND_GR_REGS
COP3_AND_GR_REGS
ALL_COP_REGS
ALL_COP_AND_GR_REGS
ST_REGS
DSP_ACC_REGS
ACC_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
REMAINDER_REG
HIMULT_REG
SYSTEM_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDRESS_REGS
SP_REGS
DATA_OR_ADDRESS_REGS
SP_OR_ADDRESS_REGS
EXTENDED_REGS
DATA_OR_EXTENDED_REGS
ADDRESS_OR_EXTENDED_REGS
SP_OR_EXTENDED_REGS
SP_OR_ADDRESS_OR_EXTENDED_REGS
FP_REGS
FP_ACC_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R1_REGS
GENERAL_REGS
FPUPPER_REGS
FP_REGS
GENERAL_OR_FP_REGS
SHIFT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R1_REGS
GENERAL_REGS
FPUPPER_REGS
FP_REGS
GENERAL_OR_FP_REGS
SHIFT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
MUL_REGS
GENERAL_REGS
LOAD_FPU_REGS
NO_LOAD_FPU_REGS
FPU_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
BASE_REGS
GENERAL_REGS
FLOAT_REGS
ALTIVEC_REGS
VRSAVE_REGS
VSCR_REGS
SPE_ACC_REGS
SPEFSCR_REGS
NON_SPECIAL_REGS
MQ_REGS
LINK_REGS
CTR_REGS
LINK_OR_CTR_REGS
SPECIAL_REGS
SPEC_OR_GEN_REGS
CR0_REGS
CR_REGS
NON_FLOAT_REGS
XER_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
CC_REGS
ADDR_REGS
GENERAL_REGS
ACCESS_REGS
ADDR_CC_REGS
GENERAL_CC_REGS
FP_REGS
ADDR_FP_REGS
GENERAL_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
G16_REGS
G32_REGS
T32_REGS
HI_REG
LO_REG
CE_REGS
CN_REG
LC_REG
SC_REG
SP_REGS
CR_REGS
CP1_REGS
CP2_REGS
CP3_REGS
CPA_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
PR_REGS
T_REGS
MAC_REGS
FPUL_REGS
SIBCALL_REGS
GENERAL_REGS
FP0_REGS
FP_REGS
DF_HI_REGS
DF_REGS
FPSCR_REGS
GENERAL_FP_REGS
GENERAL_DF_REGS
TARGET_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
FPCC_REGS
I64_REGS
GENERAL_REGS
FP_REGS
EXTRA_FP_REGS
GENERAL_OR_FP_REGS
GENERAL_OR_EXTRA_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
R1_REGS
TWO_REGS
R2_REGS
EIGHT_REGS
R8_REGS
ICALL_REGS
GENERAL_REGS
CARRY_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
BR_REGS
FP_REGS
ACC_REG
SP_REG
RL_REGS
GR_REGS
AR_REGS
ALL_REGS
LIM_REG_CLASSES

Definition at line 721 of file alpha.h.

---

Variable Documentation

long alpha_arg_offset

Definition at line 7140 of file alpha.c.

long alpha_auto_offset

Definition at line 7141 of file alpha.c.

struct alpha_compare alpha_compare

Definition at line 83 of file alpha.c.

enum processor_type alpha_cpu

Definition at line 53 of file alpha.c.

const char* alpha_cpu_string

Definition at line 73 of file alpha.c.

enum alpha_fp_rounding_mode alpha_fprm

Definition at line 65 of file alpha.c.

const char* alpha_fprm_string

Definition at line 76 of file alpha.c.

enum alpha_fp_trap_mode alpha_fptm

Definition at line 69 of file alpha.c.

const char* alpha_fptm_string

Definition at line 77 of file alpha.c.

int alpha_memory_latency

Definition at line 92 of file alpha.c.

const char* alpha_mlat_string

Definition at line 78 of file alpha.c.

enum alpha_trap_precision alpha_tp

Definition at line 61 of file alpha.c.

const char* alpha_tp_string

Definition at line 75 of file alpha.c.

const char* alpha_tune_string

Definition at line 74 of file alpha.c.

int sdb_label_count

Definition at line 7124 of file alpha.c.

int target_flags

Definition at line 35 of file gensupport.c.