Open64: osprey/be/cg/ia64/cgemit

00001 /*
00002 
00003   Copyright (C) 2000 Silicon Graphics, Inc.  All Rights Reserved.
00004 
00005   This program is free software; you can redistribute it and/or modify it
00006   under the terms of version 2 of the GNU General Public License as
00007   published by the Free Software Foundation.
00008 
00009   This program is distributed in the hope that it would be useful, but
00010   WITHOUT ANY WARRANTY; without even the implied warranty of
00011   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
00012 
00013   Further, this software is distributed without any warranty that it is
00014   free of the rightful claim of any third person regarding infringement 
00015   or the like.  Any license provided herein, whether implied or 
00016   otherwise, applies only to this software file.  Patent licenses, if 
00017   any, provided herein do not apply to combinations of this program with 
00018   other software, or any other product whatsoever.  
00019 
00020   You should have received a copy of the GNU General Public License along
00021   with this program; if not, write the Free Software Foundation, Inc., 59
00022   Temple Place - Suite 330, Boston MA 02111-1307, USA.
00023 
00024   Contact information:  Silicon Graphics, Inc., 1600 Amphitheatre Pky,
00025   Mountain View, CA 94043, or:
00026 
00027   http://www.sgi.com
00028 
00029   For further information regarding this notice, see:
00030 
00031   http://oss.sgi.com/projects/GenInfo/NoticeExplan
00032 
00033 */
00034 
00035 
00036 /* ====================================================================
00037  *
00038  * Module: cgemit_targ.c
00039  * $Revision: 1.1.1.1 $
00040  * $Date: 2005/10/21 19:00:00 $
00041  * $Author: marcel $
00042  * $Source: /proj/osprey/CVS/open64/osprey1.0/be/cg/ia64/cgemit_targ.cxx,v $
00043  *
00044  * Description:
00045  *
00046  * Target-specific cgemit code.
00047  *
00048  * ====================================================================
00049  * ====================================================================
00050  */
00051 
00052 
00053 #include <elf_stuff.h>
00054 
00055 #define USE_STANDARD_TYPES 1
00056 #include "defs.h"
00057 #include "targ_isa_lits.h"
00058 #include "vstring.h"
00059 #include "config_asm.h"
00060 #include "em_elf.h"
00061 #include "symtab.h"
00062 #include "tn.h"
00063 #include "cgemit.h"
00064 #include "cgemit_targ.h"
00065 #include "data_layout.h"
00066 #include "bb.h"
00067 #include "op.h"
00068 #include "iface_scn.h"
00069 #include "cg_flags.h"
00070 #include "glob.h"
00071 #include "targ_isa_print.h"
00072 
00073 extern void
00074 CGEMIT_Prn_File_Dir_In_Asm(USRCPOS usrcpos,
00075                         const char *pathname,
00076                         const char *filename)
00077 {
00078     if( !CG_emit_asm_dwarf) 
00079       fprintf (Asm_File, "// "); //turn the rest into comment
00080 
00081     fprintf (Asm_File, "\t%s\t%d \"%s/%s\"\n",AS_FILE, 
00082     USRCPOS_filenum(usrcpos),
00083     pathname,filename);
00084 }
00085 
00086 extern void
00087 CGEMIT_Prn_Line_Dir_In_Asm (USRCPOS usrcpos)
00088 {
00089     if( !CG_emit_asm_dwarf) {
00090       fprintf (Asm_File, "// "); //turn the rest into comment
00091     }
00092     fprintf (Asm_File, "\t.loc\t%d\t%d\t%d\n", 
00093     USRCPOS_filenum(usrcpos),
00094     USRCPOS_linenum(usrcpos),
00095     USRCPOS_column(usrcpos));
00096 }
00097 
00098 
00099 extern void
00100 CGEMIT_Prn_Scn_In_Asm (FILE       *asm_file,
00101            const char *scn_name,
00102            Elf64_Word  scn_type,
00103            Elf64_Word  scn_flags,
00104            Elf64_Xword scn_entsize,
00105            Elf64_Word  scn_align,
00106            const char *cur_scn_name)
00107 {
00108   char scn_flags_string[5];
00109   char scn_type_string[10];  // min of strlen("progbits") + 1
00110   char *p = &scn_flags_string[0];
00111 
00112   fprintf (asm_file, "\n\t%s %s,", AS_SECTION, scn_name);
00113   if (scn_flags & SHF_WRITE) *p++ = 'w';
00114   if (scn_flags & SHF_ALLOC) *p++ = 'a';
00115   if (scn_flags & SHF_EXECINSTR) *p++ = 'x';
00116   if (scn_flags & SHF_TLS) *p++ = 'T';
00117   // short sections are only recognized by name, not by "s" qualifier
00118   // if (scn_flags & SHF_IRIX_GPREL) *p++ = 's';
00119   *p = '\0'; // null terminate the string.
00120   fprintf (asm_file, " \"%s\",", scn_flags_string);
00121 
00122   p = &scn_type_string[0];
00123   if (scn_type == SHT_NOBITS) {
00124     strcpy(p, "nobits");
00125   }
00126   else if (scn_type == SHT_PROGBITS) {
00127     strcpy(p, "progbits");
00128   }
00129   else {
00130     DevWarn("Intel assembler definition inadequate for "
00131       "ELF section type 0x%llx; using \"progbits\"", (UINT64)scn_type);
00132     strcpy(p, "progbits");
00133   }
00134   fprintf (asm_file, " \"%s\"\n", scn_type_string);
00135 #if 0   // contrary to document, it should be align, not power of it.
00136   UINT32 tmp, power;
00137   power = 0;
00138   for (tmp = scn__align; tmp > 1; tmp >>= 1) power++;
00139   fprintf (asm_file, "\t%s\t%d\n", AS_ALIGN, power);
00140 #else
00141   fprintf (asm_file, "\t%s\t%d\n", AS_ALIGN, scn_align);  
00142 #endif
00143 }
00144 
00145 extern void
00146 CGEMIT_Prn_Scn_In_Asm (ST *st, Elf64_Word scn_type, Elf64_Word scn_flags,
00147            Elf64_Xword scn_entsize, ST *cur_section)
00148 {
00149   CGEMIT_Prn_Scn_In_Asm(Asm_File, ST_name(st), scn_type, scn_flags,
00150       scn_entsize, STB_align(st),
00151       cur_section != NULL ? ST_name(cur_section) : NULL);
00152 }
00153 
00154 // whether to use the base st for the reloc
00155 extern BOOL
00156 CGEMIT_Use_Base_ST_For_Reloc (INT reloc, ST *st)
00157 {
00158   if (reloc == TN_RELOC_IA_LTOFF_FPTR) 
00159     // gas doesn't like addends
00160     return FALSE;
00161         // OSP 490
00162         else if (ST_is_thread_local(st))
00163                 return FALSE;
00164         else 
00165     return ST_is_export_local(st);
00166 }
00167 
00168     
00169 extern INT
00170 CGEMIT_Relocs_In_Asm (TN *t, ST *st, vstring *buf, INT64 *val)
00171 {
00172   INT paren = 1;  // num parens
00173   // only add in GP_DISP if based on gprel section
00174   // not if based on ipa-generated extern.
00175   if (ST_class(st) == CLASS_BLOCK && STB_section(st)) {
00176     *val -= GP_DISP;
00177   }
00178   switch (TN_relocs(t)) {
00179       case TN_RELOC_IA_GPREL22:
00180           *buf = vstr_concat (*buf, "@gprel");
00181     break;
00182   case TN_RELOC_IA_LTOFF22:
00183           *buf = vstr_concat (*buf, "@ltoff");
00184     break;
00185   case TN_RELOC_IA_LTOFF22X:
00186           *buf = vstr_concat (*buf, "@ltoffx");
00187     break;
00188   case TN_RELOC_IA_LTOFF_FPTR:
00189           *buf = vstr_concat (*buf, "@ltoff(@fptr");
00190     ++paren;
00191     break;
00192   case TN_RELOC_IA_LTOFF_DTPMOD22:
00193     *buf = vstr_concat (*buf, "@ltoff(@dtpmod");
00194     ++paren;
00195     break;
00196   case TN_RELOC_IA_LTOFF_DTPREL22:
00197     *buf = vstr_concat (*buf, "@ltoff(@dtprel");
00198     ++paren;
00199     break;
00200   case TN_RELOC_IA_DTPREL22:
00201     *buf = vstr_concat (*buf, "@dtprel");
00202     break;
00203   case TN_RELOC_IA_LTOFF_TPREL22:
00204     *buf = vstr_concat (*buf, "@ltoff(@tprel");
00205     ++paren;
00206     break;
00207   case TN_RELOC_IA_TPREL22:
00208     *buf = vstr_concat (*buf, "@tprel");
00209     break;
00210   
00211       default:
00212     #pragma mips_frequency_hint NEVER
00213         FmtAssert (FALSE, ("relocs_asm: illegal reloc TN"));
00214     /*NOTREACHED*/
00215   }
00216   *buf = vstr_concat (*buf, "(" );
00217   *buf = vstr_concat (*buf, ST_name(st));
00218   *buf = vstr_concat (*buf, Symbol_Name_Suffix);
00219   return paren;
00220 }
00221 
00222 
00223 extern void
00224 CGEMIT_Relocs_In_Object (TN *t, ST *st, INT32 PC, pSCNINFO PU_section, INT64 *val)
00225 {
00226   // only add in GP_DISP if based on gprel section
00227   // not if based on ipa-generated extern.
00228   if (ST_class(st) == CLASS_BLOCK && STB_section(st)) {
00229     *val -= GP_DISP;
00230   }
00231   switch (TN_relocs(t)) {
00232   case TN_RELOC_IA_GPREL22:
00233     Em_Add_New_Rela (EMT_Put_Elf_Symbol (st), 
00234       R_IA_64_GPREL22, PC, *val, PU_section);
00235           *val = 0;
00236     break;
00237   case TN_RELOC_IA_LTOFF22:
00238     Em_Add_New_Rela (EMT_Put_Elf_Symbol (st), 
00239       R_IA_64_LTOFF22, PC, *val, PU_section);
00240     *val = 0;
00241     break;
00242   case TN_RELOC_IA_LTOFF_FPTR:
00243     Em_Add_New_Rela (EMT_Put_Elf_Symbol (st), 
00244       R_IA_64_LTOFF_FPTR22, PC, *val, PU_section);
00245     *val = 0;
00246     break;
00247   default:
00248         #pragma mips_frequency_hint NEVER
00249         FmtAssert (FALSE, ("relocs_object: illegal reloc TN"));
00250   }
00251 } 
00252 
00253 // add events and relocs as needed for call
00254 extern void 
00255 CGEMIT_Add_Call_Information (OP *op, BB *bb, INT32 PC, pSCNINFO PU_section)
00256 {
00257   ANNOTATION *ant = ANNOT_Get (BB_annotations(bb), ANNOT_CALLINFO);
00258   ST *call_sym = CALLINFO_call_st(ANNOT_callinfo(ant));
00259       Elf_Event_Kind event_type;
00260 
00261   if (call_sym == NULL) return;
00262   if (ST_is_export_local(call_sym)) {
00263     event_type = EK_FCALL_LOCAL;
00264   }
00265   else {
00266     event_type = EK_FCALL_EXTERN;
00267         }
00268   Em_Add_New_Event (event_type, PC, EMT_Put_Elf_Symbol(call_sym),
00269       0, 0, PU_section);
00270       
00271   // TODO: if indirect call add plt reloc
00272 
00273   // do pcrel relocation for all calls,
00274   // as even statics may be forward refs so don't know pc.
00275   // Ld will generate a stub if needed.
00276   Em_Add_New_Rela (EMT_Put_Elf_Symbol(call_sym), 
00277     R_IA_64_PCREL21B, PC, 0, PU_section);
00278 
00279         if (EMIT_interface_section) {
00280     Interface_Scn_Add_Call( call_sym, 
00281       CALLINFO_call_wn(ANNOT_callinfo(ant)));
00282         }
00283 }
00284 
00285 
00286 /* Generate the .frame, .mask and the .fmask directives for the assembler. */
00287 void
00288 CGEMIT_Gen_Asm_Frame (INT64 frame_len)
00289 {
00290   // .fframe is only used for unwind info,
00291   // and we plan on emitting that info directly.
00292 #if 0
00293   if (Current_PU_Stack_Model != SMODEL_SMALL)
00294   fprintf ( Asm_File, "\t%s\t%lld\n", AS_FRAME, frame_len);
00295   else
00296   fprintf ( Asm_File, "\t%s\t%lld\n", AS_FRAME, frame_len);
00297 #endif
00298 }
00299 
00300 
00301 // Generate the entry (.proc) directive.
00302 void 
00303 CGEMIT_Prn_Ent_In_Asm (ST *pu)
00304 {
00305   BB_LIST *ent_list;
00306 
00307   fprintf ( Asm_File, "\t%s\t", AS_ENT);
00308   EMT_Write_Qualified_Name(Asm_File, pu);
00309 
00310   for (ent_list = Entry_BB_Head; ent_list; ent_list = BB_LIST_rest(ent_list)) {
00311     BB *bb = BB_LIST_first(ent_list);
00312     ANNOTATION *ant = ANNOT_Get (BB_annotations(bb), ANNOT_ENTRYINFO);
00313     ENTRYINFO *ent = ANNOT_entryinfo(ant);
00314     ST *entry_sym = ENTRYINFO_name(ent);
00315 
00316     if ( !ST_is_not_used(entry_sym)) {
00317       const char *entry_name = ST_name(entry_sym);
00318       if (strcmp( Cur_PU_Name, entry_name ) != 0) {
00319   fprintf (Asm_File, ", %s", entry_name);
00320       }
00321     }
00322   }
00323 
00324   fprintf ( Asm_File, "\n");
00325 }
00326 
00327 
00328 // Preprocess FP registers before emit.  Needed only for IA-32.
00329 void
00330 STACK_FP_Fixup_PU()
00331 {}
00332 
00333 void
00334 CGEMIT_Weak_Alias (ST *sym, ST *strongsym) 
00335 {
00336         fprintf ( Asm_File, "\t%s\t%s#\n", AS_WEAK, ST_name(sym));
00337         // bug fix for OSP_145
00338   CGEMIT_Alias(sym, strongsym);
00339 }
00340 
00341 void
00342 CGEMIT_Alias (ST *sym, ST *strongsym) 
00343 {
00344         // bug fix for OSP_145
00345   fprintf ( Asm_File, "\t.set %s#, ", ST_name(sym));
00346   if ( ST_is_export_local(strongsym) && ST_class(strongsym) == CLASS_VAR) {
00347     // file scope local symbol
00348     if (ST_level(strongsym) == GLOBAL_SYMTAB) {
00349                         // OSP 490
00350                         if (Emit_Global_Data || ST_sclass(strongsym) == SCLASS_PSTATIC)
00351               fprintf (Asm_File, "%s%s%d#\n",
00352                   ST_name(strongsym), Label_Name_Separator, ST_index(strongsym));
00353                 }
00354                 else
00355       Is_True(0, ("Impossible alias to a PU scope variable"));
00356   }
00357   else // global export symbol
00358     fprintf (Asm_File, "%s#\n", ST_name(strongsym));
00359 }
00360 
00361 INT CGEMIT_Print_Inst (OP* op, const char* result[], const char* opnd[], FILE* f ) {
00362 
00363   INT i;
00364   INT st;
00365   INT comp;
00366   TOP topcode = OP_code(op);
00367   const char *arg[ISA_PRINT_COMP_MAX];
00368   const char *Opnds[ISA_PRINT_COMP_MAX];
00369   const char *Res[ISA_PRINT_COMP_MAX];
00370 
00371   const ISA_PRINT_INFO *pinfo = ISA_PRINT_Info(topcode);
00372 
00373   FmtAssert( pinfo != NULL, ("no ISA_PRINT_INFO for %s", TOP_Name(topcode)));
00374 
00375   i = 0;
00376   do {
00377     comp = ISA_PRINT_INFO_Comp(pinfo, i);
00378 
00379     switch (comp) {
00380     case ISA_PRINT_COMP_name:
00381       arg[i] = ISA_PRINT_AsmName(topcode);
00382       break;
00383 
00384     case ISA_PRINT_COMP_opnd:
00385     case ISA_PRINT_COMP_opnd+1:
00386     case ISA_PRINT_COMP_opnd+2:
00387     case ISA_PRINT_COMP_opnd+3:
00388     case ISA_PRINT_COMP_opnd+4:
00389     case ISA_PRINT_COMP_opnd+5:
00390       Opnds[comp-ISA_PRINT_COMP_opnd] = 
00391       arg[i] = opnd[comp - ISA_PRINT_COMP_opnd];
00392       break;
00393 
00394     case ISA_PRINT_COMP_result:
00395     case ISA_PRINT_COMP_result+1:
00396       Res[comp-ISA_PRINT_COMP_result] = 
00397       arg[i] = result[comp - ISA_PRINT_COMP_result];
00398       break;
00399 
00400     case ISA_PRINT_COMP_end:
00401       break;
00402 
00403     default:
00404       FmtAssert (false, ("Unhandled listing component %d for %s", 
00405                         comp, TOP_Name(topcode)));
00406       break;
00407     };
00408     
00409     i++;
00410   } while (comp != ISA_PRINT_COMP_end);
00411 
00412   // Intercept some special cases -- this render it easier to add some
00413   // simulated instructions without changing the whole machine model 
00414   // and CG. 
00415   //
00416   if (OP_load_GOT_entry(op) && topcode == TOP_ld8) {
00417     extern OP_MAP OP_Ld_GOT_2_Sym_Map; 
00418     ST* sym = (ST*)OP_MAP_Get (OP_Ld_GOT_2_Sym_Map, op);
00419     if (sym) { 
00420       st = fprintf (f, "%5s ld8.mov %s=[%s], %s%s", Opnds[0], 
00421                        Res[0], Opnds[3], ST_name(sym), 
00422            Symbol_Name_Suffix);
00423       return st;
00424     }
00425   }
00426 
00427   st = fprintf (f, ISA_PRINT_INFO_Format(pinfo),
00428          arg[0], arg[1], arg[2], arg[3], 
00429          arg[4], arg[5], arg[6], arg[7],
00430          arg[8]);
00431   FmtAssert( st != -1, ("fprintf failed: not enough disk space") );
00432   return st;
00433 }
osprey/be/cg/ia64/cgemit_targ.cxx
