osprey/kg++fe/gnu/config/m32r/m32r.h File Reference

Go to the source code of this file.

Defines

#define TARGET_VERSION   fprintf (stderr, " (m32r/x)");
#define CPP_CPU_SPEC   "%{m32rx:-D__M32RX__} %{m32r:-U__M32RX__}"
#define ASM_CPU_SPEC   "%{m32r} %{m32rx} %{!O0: %{O*: -O}} --no-warn-explicit-parallel-conflicts"
#define STARTFILE_CPU_SPEC   "%{!shared:crt0.o%s} %{m32rx:m32rx/crtinit.o%s} %{!m32rx:crtinit.o%s}"
#define ENDFILE_CPU_SPEC   "-lgloss %{m32rx:m32rx/crtfini.o%s} %{!m32rx:crtfini.o%s}"
#define SUBTARGET_SWITCHES
#define SUBTARGET_MULTILIB_DEFAULTS   , "m32r"
#define SUBTARGET_NUM_REGISTERS   1
#define SUBTARGET_FIXED_REGISTERS   , 1
#define SUBTARGET_CALL_USED_REGISTERS   , 1
#define SUBTARGET_REG_ALLOC_ORDER   , 19
#define SUBTARGET_REG_CLASS_ACCUM   0x80000
#define SUBTARGET_REG_CLASS_ALL   SUBTARGET_REG_CLASS_ACCUM
#define SUBTARGET_ACCUM_P(REGNO)   ((REGNO) == 19)
#define SUBTARGET_REGISTER_NAMES   , "a1"
#define SWITCH_TAKES_ARG(CHAR)   (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')
#define CPP_PREDEFINES   "-Acpu=m32r -Amachine=m32r -D__M32R__"
#define CC1_CPU_SPEC   ""
#define LINK_CPU_SPEC   ""
#define RELAX_SPEC   ""
#define EXTRA_SPECS
#define CC1_SPEC   "%{G*} %(cc1_cpu)"
#define ASM_SPEC   "%{v} %(asm_cpu) %(relax)"
#define LINK_SPEC   "%{v} %(link_cpu) %(relax)"
#define STARTFILE_SPEC   "%(startfile_cpu)"
#define ENDFILE_SPEC   "%(endfile_cpu)"
#define TARGET_RELAX_MASK   (1 << 0)
#define TARGET_DEBUG_MASK   (1 << 1)
#define TARGET_DEBUG   (target_flags & TARGET_DEBUG_MASK)
#define TARGET_ALIGN_LOOPS_MASK   (1 << 2)
#define TARGET_ALIGN_LOOPS   (target_flags & TARGET_ALIGN_LOOPS_MASK)
#define TARGET_LOW_ISSUE_RATE_MASK   (1 << 3)
#define TARGET_LOW_ISSUE_RATE   (target_flags & TARGET_LOW_ISSUE_RATE_MASK)
#define TARGET_BRANCH_COST_MASK   (1 << 4)
#define TARGET_BRANCH_COST   (target_flags & TARGET_BRANCH_COST_MASK)
#define TARGET_M32R   1
#define TARGET_M32RX_MASK   (1 << 5)
#define TARGET_M32RX   (target_flags & TARGET_M32RX_MASK)
#define TARGET_M32R   (! TARGET_M32RX)
#define TARGET_DEFAULT   0
#define TARGET_SWITCHES
#define TARGET_OPTIONS
#define TARGET_MODEL_SMALL   (m32r_model == M32R_MODEL_SMALL)
#define TARGET_MODEL_MEDIUM   (m32r_model == M32R_MODEL_MEDIUM)
#define TARGET_MODEL_LARGE   (m32r_model == M32R_MODEL_LARGE)
#define TARGET_ADDR24   (m32r_model == M32R_MODEL_SMALL)
#define TARGET_ADDR32   (! TARGET_ADDR24)
#define TARGET_CALL26   (! TARGET_CALL32)
#define TARGET_CALL32   (m32r_model == M32R_MODEL_LARGE)
#define M32R_MODEL_DEFAULT   "small"
#define SDATA_DEFAULT_SIZE   8
#define TARGET_SDATA_NONE   (m32r_sdata == M32R_SDATA_NONE)
#define TARGET_SDATA_SDATA   (m32r_sdata == M32R_SDATA_SDATA)
#define TARGET_SDATA_USE   (m32r_sdata == M32R_SDATA_USE)
#define M32R_SDATA_DEFAULT   "none"
#define MULTILIB_DEFAULTS   { "mmodel=small" SUBTARGET_MULTILIB_DEFAULTS }
#define OVERRIDE_OPTIONS
#define OPTIMIZATION_OPTIONS(LEVEL, SIZE)
#define CAN_DEBUG_WITHOUT_FP
#define REAL_ARITHMETIC
#define BITS_BIG_ENDIAN   1
#define BYTES_BIG_ENDIAN   1
#define WORDS_BIG_ENDIAN   1
#define BITS_PER_UNIT   8
#define BITS_PER_WORD   32
#define UNITS_PER_WORD   4
#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)
#define POINTER_SIZE   32
#define PARM_BOUNDARY   32
#define STACK_BOUNDARY   32
#define M32R_STACK_ALIGN(LOC)   (((LOC)+3) & ~3)
#define FUNCTION_BOUNDARY   32
#define EMPTY_FIELD_BOUNDARY   32
#define STRUCTURE_SIZE_BOUNDARY   8
#define PCC_BITFIELD_TYPE_MATTERS   1
#define BIGGEST_ALIGNMENT   32
#define FASTEST_ALIGNMENT   32
#define CONSTANT_ALIGNMENT(EXP, ALIGN)
#define DATA_ALIGNMENT(TYPE, ALIGN)
#define STRICT_ALIGNMENT   1
#define SHORT_TYPE_SIZE   16
#define INT_TYPE_SIZE   32
#define LONG_TYPE_SIZE   32
#define LONG_LONG_TYPE_SIZE   64
#define FLOAT_TYPE_SIZE   32
#define DOUBLE_TYPE_SIZE   64
#define LONG_DOUBLE_TYPE_SIZE   64
#define DEFAULT_SIGNED_CHAR   1
#define SIZE_TYPE   "long unsigned int"
#define PTRDIFF_TYPE   "long int"
#define WCHAR_TYPE   "short unsigned int"
#define WCHAR_TYPE_SIZE   16
#define M32R_NUM_REGISTERS   19
#define FIRST_PSEUDO_REGISTER   (M32R_NUM_REGISTERS + SUBTARGET_NUM_REGISTERS)
#define FIXED_REGISTERS
#define CALL_USED_REGISTERS
#define REG_ALLOC_ORDER
#define HARD_REGNO_NREGS(REGNO, MODE)   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
#define HARD_REGNO_MODE_OK(REGNO, MODE)   ((m32r_hard_regno_mode_ok[REGNO] & m32r_mode_class[MODE]) != 0)
#define MODES_TIEABLE_P(MODE1, MODE2)
#define N_REG_CLASSES   ((int) LIM_REG_CLASSES)
#define REG_CLASS_NAMES   { "NO_REGS", "CARRY_REG", "ACCUM_REGS", "GENERAL_REGS", "ALL_REGS" }
#define SUBTARGET_REG_CLASS_CARRY   0
#define SUBTARGET_REG_CLASS_GENERAL   0
#define REG_CLASS_CONTENTS
#define REGNO_REG_CLASS(REGNO)   (m32r_regno_reg_class[REGNO])
#define INDEX_REG_CLASS   GENERAL_REGS
#define BASE_REG_CLASS   GENERAL_REGS
#define REG_CLASS_FROM_LETTER(C)
#define REGNO_OK_FOR_BASE_P(REGNO)
#define REGNO_OK_FOR_INDEX_P(REGNO)   REGNO_OK_FOR_BASE_P(REGNO)
#define PREFERRED_RELOAD_CLASS(X, CLASS)   (CLASS)
#define CLASS_MAX_NREGS(CLASS, MODE)   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
#define IN_RANGE_P(VALUE, LOW, HIGH)
#define INT8_P(X)   ((X) >= -0x80 && (X) <= 0x7f)
#define INT16_P(X)   ((X) >= -0x8000 && (X) <= 0x7fff)
#define CMP_INT16_P(X)   ((X) >= -0x7fff && (X) <= 0x8000)
#define UPPER16_P(X)
#define UINT16_P(X)   (((unsigned HOST_WIDE_INT) (X)) <= 0x0000ffff)
#define UINT24_P(X)   (((unsigned HOST_WIDE_INT) (X)) <= 0x00ffffff)
#define UINT32_P(X)   (((unsigned HOST_WIDE_INT) (X)) <= 0xffffffff)
#define UINT5_P(X)   ((X) >= 0 && (X) < 32)
#define INVERTED_SIGNED_8BIT(VAL)   ((VAL) >= -127 && (VAL) <= 128)
#define CONST_OK_FOR_LETTER_P(VALUE, C)
#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C)
#define EXTRA_CONSTRAINT(VALUE, C)
#define STACK_GROWS_DOWNWARD
#define STARTING_FRAME_OFFSET   M32R_STACK_ALIGN (current_function_outgoing_args_size)
#define STACK_POINTER_OFFSET   0
#define FIRST_PARM_OFFSET(FNDECL)   0
#define STACK_POINTER_REGNUM   15
#define FRAME_POINTER_REGNUM   13
#define ARG_POINTER_REGNUM   16
#define STATIC_CHAIN_REGNUM   7
#define PROLOGUE_TMP_REGNUM   4
#define RETURN_ADDR_REGNUM   14
#define CARRY_REGNUM   17
#define ACCUM_REGNUM   18
#define M32R_MAX_INT_REGS   16
#define SUBTARGET_GPR_P(REGNO)   0
#define SUBTARGET_CARRY_P(REGNO)   0
#define GPR_P(REGNO)   (IN_RANGE_P ((REGNO), 0, 15) || SUBTARGET_GPR_P (REGNO))
#define ACCUM_P(REGNO)   ((REGNO) == ACCUM_REGNUM || SUBTARGET_ACCUM_P (REGNO))
#define CARRY_P(REGNO)   ((REGNO) == CARRY_REGNUM || SUBTARGET_CARRY_P (REGNO))
#define FRAME_POINTER_REQUIRED   current_function_calls_alloca
#define ELIMINABLE_REGS
#define CAN_ELIMINATE(FROM, TO)
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)
#define PROMOTE_PROTOTYPES   1
#define ACCUMULATE_OUTGOING_ARGS   1
#define RETURN_POPS_ARGS(DECL, FUNTYPE, SIZE)   0
#define MUST_PASS_IN_STACK(MODE, TYPE)
#define CUMULATIVE_ARGS   int
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT)   ((CUM) = 0)
#define M32R_MAX_PARM_REGS   4
#define FUNCTION_ARG_REGNO_P(N)   ((unsigned) (N) < M32R_MAX_PARM_REGS)
#define ROUND_ADVANCE(SIZE)   (((SIZE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
#define ROUND_ADVANCE_ARG(MODE, TYPE)
#define ROUND_ADVANCE_CUM(CUM, MODE, TYPE)   (CUM)
#define PASS_IN_REG_P(CUM, MODE, TYPE, NAMED)   (ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) < M32R_MAX_PARM_REGS)
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED)
#define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED)
#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED)   function_arg_partial_nregs (&CUM, (int)MODE, TYPE, NAMED)
#define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED)   ((TYPE) && int_size_in_bytes (TYPE) > 8)
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)
#define SETUP_INCOMING_VARARGS(ARGS_SO_FAR, MODE, TYPE, PRETEND_SIZE, NO_RTL)   m32r_setup_incoming_varargs (&ARGS_SO_FAR, MODE, TYPE, &PRETEND_SIZE, NO_RTL)
#define EXPAND_BUILTIN_VA_ARG(valist, type)   m32r_va_arg (valist, type)
#define FUNCTION_VALUE(VALTYPE, FUNC)   gen_rtx_REG (TYPE_MODE (VALTYPE), 0)
#define LIBCALL_VALUE(MODE)   gen_rtx_REG (MODE, 0)
#define FUNCTION_VALUE_REGNO_P(N)   ((N) == 0)
#define RETURN_IN_MEMORY(TYPE)   (int_size_in_bytes (TYPE) > 8)
#define DEFAULT_PCC_STRUCT_RETURN   0
#define STRUCT_VALUE   0
#define INIT_EXPANDERS   m32r_init_expanders ()
#define EXIT_IGNORE_STACK   1
#define FUNCTION_PROFILER(FILE, LABELNO)   abort ()
#define TRAMPOLINE_SIZE   12
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT)
#define TARGET_MEM_FUNCTIONS
#define MAX_REGS_PER_ADDRESS   1
#define HAVE_PRE_DECREMENT   1
#define HAVE_PRE_INCREMENT   1
#define HAVE_POST_INCREMENT   1
#define CONSTANT_ADDRESS_P(X)
#define LEGITIMATE_CONSTANT_P(X)
#define REG_OK_FOR_BASE_P(X)
#define REG_OK_FOR_INDEX_P(X)   REG_OK_FOR_BASE_P (X)
#define RTX_OK_FOR_BASE_P(X)   (REG_P (X) && REG_OK_FOR_BASE_P (X))
#define RTX_OK_FOR_OFFSET_P(X)   (GET_CODE (X) == CONST_INT && INT16_P (INTVAL (X)))
#define LEGITIMATE_OFFSET_ADDRESS_P(MODE, X)
#define LEGITIMATE_LO_SUM_ADDRESS_P(MODE, X)
#define LOAD_POSTINC_P(MODE, X)
#define STORE_PREINC_PREDEC_P(MODE, X)
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)
#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
#define SELECT_CC_MODE(OP, X, Y)   ((enum machine_mode)m32r_select_cc_mode ((int)OP, X, Y))
#define REVERSIBLE_CC_MODE(MODE)   1
#define CONST_COSTS(X, CODE, OUTER_CODE)
#define ADDRESS_COST(ADDR)   m32r_address_cost (ADDR)
#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2)   2
#define MEMORY_MOVE_COST(MODE, CLASS, IN_P)   (GET_MODE_SIZE (MODE) <= UNITS_PER_WORD ? 6 : 12)
#define BRANCH_COST   ((TARGET_BRANCH_COST) ? 2 : 1)
#define RTX_COSTS(X, CODE, OUTER_CODE)
#define SLOW_BYTE_ACCESS   1
#define NO_FUNCTION_CSE
#define NO_RECURSIVE_FUNCTION_CSE
#define FIRST_INSN_ADDRESS   m32r_first_insn_address ()
#define TEXT_SECTION_ASM_OP   "\t.section .text"
#define DATA_SECTION_ASM_OP   "\t.section .data"
#define RODATA_SECTION_ASM_OP   "\t.section .rodata"
#define BSS_SECTION_ASM_OP   "\t.section .bss"
#define SDATA_SECTION_ASM_OP   "\t.section .sdata"
#define SBSS_SECTION_ASM_OP   "\t.section .sbss"
#define CONST_SECTION_ASM_OP   "\t.section .rodata"
#define EXTRA_SECTIONS   in_sdata, in_sbss, in_const
#define EXTRA_SECTION_FUNCTIONS
#define SDATA_SECTION_FUNCTION
#define SBSS_SECTION_FUNCTION
#define SELECT_SECTION(EXP, RELOC, ALIGN)   m32r_select_section ((EXP), (RELOC))
#define SDATA_FLAG_CHAR   '@'
#define MEDIUM_FLAG_CHAR   '%'
#define LARGE_FLAG_CHAR   '&'
#define SDATA_NAME_P(NAME)   (*(NAME) == SDATA_FLAG_CHAR)
#define SMALL_NAME_P(NAME)   (! ENCODED_NAME_P (NAME) && ! LIT_NAME_P (NAME))
#define MEDIUM_NAME_P(NAME)   (*(NAME) == MEDIUM_FLAG_CHAR)
#define LARGE_NAME_P(NAME)   (*(NAME) == LARGE_FLAG_CHAR)
#define LIT_NAME_P(NAME)   ((NAME)[0] == '*' && (NAME)[1] == '.')
#define ENCODED_NAME_P(SYMBOL_NAME)
#define ENCODE_SECTION_INFO(DECL)   m32r_encode_section_info (DECL)
#define STRIP_NAME_ENCODING(VAR, SYMBOL_NAME)
#define ASM_FILE_START(FILE)   m32r_asm_file_start (FILE)
#define ASM_COMMENT_START   ";"
#define ASM_APP_ON   ""
#define ASM_APP_OFF   ""
#define ASM_OUTPUT_LABEL(FILE, NAME)
#define ASM_GLOBALIZE_LABEL(FILE, NAME)
#define ASM_OUTPUT_LABELREF(FILE, NAME)
#define ASM_OUTPUT_SOURCE_LINE(file, line)
#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO)
#define REGISTER_NAMES
#define ADDITIONAL_REGISTER_NAMES
#define PRINT_OPERAND_PUNCT_VALID_P(CHAR)   m32r_punct_chars[(unsigned char) (CHAR)]
#define PRINT_OPERAND(FILE, X, CODE)   m32r_print_operand (FILE, X, CODE)
#define PRINT_OPERAND_ADDRESS(FILE, ADDR)   m32r_print_operand_address (FILE, ADDR)
#define REGISTER_PREFIX   ""
#define LOCAL_LABEL_PREFIX   ".L"
#define USER_LABEL_PREFIX   ""
#define IMMEDIATE_PREFIX   "#"
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)
#define LOOP_ALIGN(LABEL)   (TARGET_ALIGN_LOOPS ? 5 : 0)
#define LOOP_TEST_THRESHOLD
#define ASM_OUTPUT_ALIGN(FILE, LOG)
#define SCOMMON_ASM_OP   "\t.scomm\t"
#define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN)
#define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN)
#define DBX_DEBUGGING_INFO
#define DWARF_DEBUGGING_INFO
#define DWARF2_DEBUGGING_INFO
#define PREFERRED_DEBUGGING_TYPE   DBX_DEBUG
#define DBX_CONTIN_LENGTH   0
#define CASE_VECTOR_MODE   Pmode
#define WORD_REGISTER_OPERATIONS
#define LOAD_EXTEND_OP(MODE)   ZERO_EXTEND
#define MOVE_MAX   4
#define SHIFT_COUNT_TRUNCATED   1
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC)   1
#define STORE_FLAG_VALUE   1
#define Pmode   SImode
#define FUNCTION_MODE   SImode
#define M32R_INTERRUPT_P(TYPE)   ((TYPE) == M32R_FUNCTION_INTERRUPT)
#define PREDICATE_CODES

Enumerations

enum  m32r_model {
  M32R_MODEL_SMALL, M32R_MODEL_MEDIUM, M32R_MODEL_LARGE, M32R_MODEL_SMALL,
  M32R_MODEL_MEDIUM, M32R_MODEL_LARGE, M32R_MODEL_SMALL, M32R_MODEL_MEDIUM,
  M32R_MODEL_LARGE, M32R_MODEL_SMALL, M32R_MODEL_MEDIUM, M32R_MODEL_LARGE
}
enum  m32r_sdata {
  M32R_SDATA_NONE, M32R_SDATA_SDATA, M32R_SDATA_USE, M32R_SDATA_NONE,
  M32R_SDATA_SDATA, M32R_SDATA_USE, M32R_SDATA_NONE, M32R_SDATA_SDATA,
  M32R_SDATA_USE, M32R_SDATA_NONE, M32R_SDATA_SDATA, M32R_SDATA_USE
}
enum  reg_class {
  NO_REGS, R2, R0_1, INDEX_REGS,
  BASE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  LR0_REGS, GENERAL_REGS, BP_REGS, FC_REGS,
  CR_REGS, Q_REGS, SPECIAL_REGS, ACCUM0_REGS,
  ACCUM_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R24_REG, R25_REG, R27_REG,
  GENERAL_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, LPCOUNT_REG, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, FPU_REGS, LO_REGS,
  STACK_REG, BASE_REGS, HI_REGS, CC_REG,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REG, POINTER_X_REGS, POINTER_Y_REGS, POINTER_Z_REGS,
  STACK_REG, BASE_POINTER_REGS, POINTER_REGS, ADDW_REGS,
  SIMPLE_LD_REGS, LD_REGS, NO_LD_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0R1_REGS,
  R2R3_REGS, EXT_LOW_REGS, EXT_REGS, ADDR_REGS,
  INDEX_REGS, BK_REG, SP_REG, RC_REG,
  COUNTER_REGS, INT_REGS, GENERAL_REGS, DP_REG,
  ST_REG, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, S_REGS, INDEX_REGS, SP_REGS,
  A_REGS, SI_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  REPEAT_REGS, CR_REGS, ACCUM_REGS, OTHER_FLAG_REGS,
  F0_REGS, F1_REGS, BR_FLAG_REGS, FLAG_REGS,
  EVEN_REGS, GPR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, A0H_REG, A0L_REG, A0_REG,
  A1H_REG, ACCUM_HIGH_REGS, A1L_REG, ACCUM_LOW_REGS,
  A1_REG, ACCUM_REGS, X_REG, X_OR_ACCUM_LOW_REGS,
  X_OR_ACCUM_REGS, YH_REG, YH_OR_ACCUM_HIGH_REGS, X_OR_YH_REGS,
  YL_REG, YL_OR_ACCUM_LOW_REGS, X_OR_YL_REGS, X_OR_Y_REGS,
  Y_REG, ACCUM_OR_Y_REGS, PH_REG, X_OR_PH_REGS,
  PL_REG, PL_OR_ACCUM_LOW_REGS, X_OR_PL_REGS, YL_OR_PL_OR_ACCUM_LOW_REGS,
  P_REG, ACCUM_OR_P_REGS, YL_OR_P_REGS, ACCUM_LOW_OR_YL_OR_P_REGS,
  Y_OR_P_REGS, ACCUM_Y_OR_P_REGS, NO_FRAME_Y_ADDR_REGS, Y_ADDR_REGS,
  ACCUM_LOW_OR_Y_ADDR_REGS, ACCUM_OR_Y_ADDR_REGS, X_OR_Y_ADDR_REGS, Y_OR_Y_ADDR_REGS,
  P_OR_Y_ADDR_REGS, NON_HIGH_YBASE_ELIGIBLE_REGS, YBASE_ELIGIBLE_REGS, J_REG,
  J_OR_DAU_16_BIT_REGS, BMU_REGS, NOHIGH_NON_ADDR_REGS, NON_ADDR_REGS,
  SLOW_MEM_LOAD_REGS, NOHIGH_NON_YBASE_REGS, NO_ACCUM_NON_YBASE_REGS, NON_YBASE_REGS,
  YBASE_VIRT_REGS, ACCUM_LOW_OR_YBASE_REGS, ACCUM_OR_YBASE_REGS, X_OR_YBASE_REGS,
  Y_OR_YBASE_REGS, ACCUM_LOW_YL_PL_OR_YBASE_REGS, P_OR_YBASE_REGS, ACCUM_Y_P_OR_YBASE_REGS,
  Y_ADDR_OR_YBASE_REGS, YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS, YBASE_OR_YBASE_ELIGIBLE_REGS, NO_HIGH_ALL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG,
  MULTIPLY_64_REG, LOW_REGS, HIGH_REGS, REAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,
  MAC_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ADDR_REGS, DATA_REGS, FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, AREG, DREG,
  CREG, BREG, SIREG, DIREG,
  AD_REGS, Q_REGS, NON_Q_REGS, INDEX_REGS,
  LEGACY_REGS, GENERAL_REGS, FP_TOP_REG, FP_SECOND_REG,
  FLOAT_REGS, SSE_REGS, MMX_REGS, FP_TOP_SSE_REGS,
  FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS, INT_SSE_REGS,
  FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GLOBAL_REGS, LOCAL_REGS, LOCAL_OR_GLOBAL_REGS,
  FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  PR_REGS, BR_REGS, AR_M_REGS, AR_I_REGS,
  ADDL_REGS, GR_REGS, FR_REGS, GR_AND_BR_REGS,
  GR_AND_FR_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  CARRY_REG, ACCUM_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, D_REGS, X_REGS,
  Y_REGS, SP_REGS, DA_REGS, DB_REGS,
  Z_REGS, D8_REGS, Q_REGS, D_OR_X_REGS,
  D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS, A_REGS,
  X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS, A_OR_D_REGS,
  A_OR_SP_REGS, H_REGS, S_REGS, D_OR_S_REGS,
  X_OR_S_REGS, Y_OR_S_REGS, SP_OR_S_REGS, D_OR_X_OR_S_REGS,
  D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS, A_OR_S_REGS, D_OR_A_OR_S_REGS,
  TMP_REGS, D_OR_A_OR_TMP_REGS, G_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, DATA_REGS, ADDR_REGS,
  FP_REGS, GENERAL_REGS, DATA_OR_FP_REGS, ADDR_OR_FP_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, AP_REG,
  XRF_REGS, GENERAL_REGS, AGRF_REGS, XGRF_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, ONLYR1_REGS,
  LRW_REGS, GENERAL_REGS, C_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, REMAINDER_REG,
  HIMULT_REG, SYSTEM_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, DATA_REGS, ADDRESS_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,
  ADDRESS_REGS, SP_REGS, DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,
  EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS,
  SP_OR_ADDRESS_OR_EXTENDED_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, FLOAT_REG0, LONG_FLOAT_REG0,
  FLOAT_REGS, FP_REGS, GEN_AND_FP_REGS, FRAME_POINTER_REG,
  STACK_POINTER_REG, GEN_AND_MEM_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R1_REGS, GENERAL_REGS, FPUPPER_REGS,
  FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,
  FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, MUL_REGS,
  GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS, FPU_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, OUT_REGS,
  STD_REGS, ARG_REGS, SRC_REGS, DST_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0_REGS,
  R15_REGS, BASE_REGS, GENERAL_REGS, FP_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, BASE_REGS,
  GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS, VRSAVE_REGS,
  NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,
  LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,
  CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, ADDR_REGS, GENERAL_REGS,
  FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REGS, PR_REGS,
  T_REGS, MAC_REGS, FPUL_REGS, SIBCALL_REGS,
  GENERAL_REGS, FP0_REGS, FP_REGS, DF_REGS,
  FPSCR_REGS, GENERAL_FP_REGS, TARGET_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, M16_NA_REGS, M16_REGS,
  T_REG, M16_T_REGS, GR_REGS, FP_REGS,
  HI_REG, LO_REG, HILO_REG, MD_REGS,
  COP0_REGS, COP2_REGS, COP3_REGS, HI_AND_GR_REGS,
  LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS,
  COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS,
  ST_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  FPCC_REGS, I64_REGS, GENERAL_REGS, FP_REGS,
  EXTRA_FP_REGS, GENERAL_OR_FP_REGS, GENERAL_OR_EXTRA_FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REGS, R1_REGS,
  TWO_REGS, R2_REGS, EIGHT_REGS, R8_REGS,
  ICALL_REGS, GENERAL_REGS, CARRY_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, BR_REGS, FP_REGS, ACC_REG,
  SP_REG, RL_REGS, GR_REGS, AR_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,
  M16_REGS, T_REG, M16_T_REGS, GR_REGS,
  FP_REGS, HI_REG, LO_REG, HILO_REG,
  MD_REGS, COP0_REGS, COP2_REGS, COP3_REGS,
  HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS,
  COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS,
  ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, M16_NA_REGS, M16_REGS, T_REG,
  M16_T_REGS, GR_REGS, FP_REGS, HI_REG,
  LO_REG, HILO_REG, MD_REGS, COP0_REGS,
  COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,
  HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS,
  COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R2,
  R0_1, INDEX_REGS, BASE_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, LR0_REGS, GENERAL_REGS,
  BP_REGS, FC_REGS, CR_REGS, Q_REGS,
  SPECIAL_REGS, ACCUM0_REGS, ACCUM_REGS, FLOAT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R24_REG,
  R25_REG, R27_REG, GENERAL_REGS, FLOAT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  FPU_REGS, LO_REGS, STACK_REG, BASE_REGS,
  HI_REGS, CC_REG, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REG, POINTER_X_REGS,
  POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG, BASE_POINTER_REGS,
  POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS, LD_REGS,
  NO_LD_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R0R1_REGS, R2R3_REGS, EXT_LOW_REGS,
  EXT_REGS, ADDR_REGS, INDEX_REGS, BK_REG,
  SP_REG, RC_REG, COUNTER_REGS, INT_REGS,
  GENERAL_REGS, DP_REG, ST_REG, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, FLOAT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, S_REGS,
  INDEX_REGS, SP_REGS, A_REGS, SI_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, REPEAT_REGS, CR_REGS,
  ACCUM_REGS, OTHER_FLAG_REGS, F0_REGS, F1_REGS,
  BR_FLAG_REGS, FLAG_REGS, EVEN_REGS, GPR_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, A0H_REG,
  A0L_REG, A0_REG, A1H_REG, ACCUM_HIGH_REGS,
  A1L_REG, ACCUM_LOW_REGS, A1_REG, ACCUM_REGS,
  X_REG, X_OR_ACCUM_LOW_REGS, X_OR_ACCUM_REGS, YH_REG,
  YH_OR_ACCUM_HIGH_REGS, X_OR_YH_REGS, YL_REG, YL_OR_ACCUM_LOW_REGS,
  X_OR_YL_REGS, X_OR_Y_REGS, Y_REG, ACCUM_OR_Y_REGS,
  PH_REG, X_OR_PH_REGS, PL_REG, PL_OR_ACCUM_LOW_REGS,
  X_OR_PL_REGS, YL_OR_PL_OR_ACCUM_LOW_REGS, P_REG, ACCUM_OR_P_REGS,
  YL_OR_P_REGS, ACCUM_LOW_OR_YL_OR_P_REGS, Y_OR_P_REGS, ACCUM_Y_OR_P_REGS,
  NO_FRAME_Y_ADDR_REGS, Y_ADDR_REGS, ACCUM_LOW_OR_Y_ADDR_REGS, ACCUM_OR_Y_ADDR_REGS,
  X_OR_Y_ADDR_REGS, Y_OR_Y_ADDR_REGS, P_OR_Y_ADDR_REGS, NON_HIGH_YBASE_ELIGIBLE_REGS,
  YBASE_ELIGIBLE_REGS, J_REG, J_OR_DAU_16_BIT_REGS, BMU_REGS,
  NOHIGH_NON_ADDR_REGS, NON_ADDR_REGS, SLOW_MEM_LOAD_REGS, NOHIGH_NON_YBASE_REGS,
  NO_ACCUM_NON_YBASE_REGS, NON_YBASE_REGS, YBASE_VIRT_REGS, ACCUM_LOW_OR_YBASE_REGS,
  ACCUM_OR_YBASE_REGS, X_OR_YBASE_REGS, Y_OR_YBASE_REGS, ACCUM_LOW_YL_PL_OR_YBASE_REGS,
  P_OR_YBASE_REGS, ACCUM_Y_P_OR_YBASE_REGS, Y_ADDR_OR_YBASE_REGS, YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS,
  YBASE_OR_YBASE_ELIGIBLE_REGS, NO_HIGH_ALL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, MULTIPLY_32_REG, MULTIPLY_64_REG, LOW_REGS,
  HIGH_REGS, REAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, MAC_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, ADDR_REGS, DATA_REGS,
  FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  AREG, DREG, CREG, BREG,
  SIREG, DIREG, AD_REGS, Q_REGS,
  NON_Q_REGS, INDEX_REGS, LEGACY_REGS, GENERAL_REGS,
  FP_TOP_REG, FP_SECOND_REG, FLOAT_REGS, SSE_REGS,
  MMX_REGS, FP_TOP_SSE_REGS, FP_SECOND_SSE_REGS, FLOAT_SSE_REGS,
  FLOAT_INT_REGS, INT_SSE_REGS, FLOAT_INT_SSE_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, FP_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GLOBAL_REGS,
  LOCAL_REGS, LOCAL_OR_GLOBAL_REGS, FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, PR_REGS, BR_REGS,
  AR_M_REGS, AR_I_REGS, ADDL_REGS, GR_REGS,
  FR_REGS, GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, CARRY_REG, ACCUM_REGS,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  D_REGS, X_REGS, Y_REGS, SP_REGS,
  DA_REGS, DB_REGS, Z_REGS, D8_REGS,
  Q_REGS, D_OR_X_REGS, D_OR_Y_REGS, D_OR_SP_REGS,
  X_OR_Y_REGS, A_REGS, X_OR_SP_REGS, Y_OR_SP_REGS,
  X_OR_Y_OR_D_REGS, A_OR_D_REGS, A_OR_SP_REGS, H_REGS,
  S_REGS, D_OR_S_REGS, X_OR_S_REGS, Y_OR_S_REGS,
  SP_OR_S_REGS, D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS,
  A_OR_S_REGS, D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS,
  G_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  DATA_REGS, ADDR_REGS, FP_REGS, GENERAL_REGS,
  DATA_OR_FP_REGS, ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS,
  AGRF_REGS, XGRF_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, ONLYR1_REGS, LRW_REGS, GENERAL_REGS,
  C_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, REMAINDER_REG, HIMULT_REG, SYSTEM_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,
  ADDRESS_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS,
  DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS, EXTENDED_REGS, DATA_OR_EXTENDED_REGS,
  ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,
  FLOAT_REG0, LONG_FLOAT_REG0, FLOAT_REGS, FP_REGS,
  GEN_AND_FP_REGS, FRAME_POINTER_REG, STACK_POINTER_REG, GEN_AND_MEM_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,
  GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,
  SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R1_REGS, GENERAL_REGS, FPUPPER_REGS, FP_REGS,
  GENERAL_OR_FP_REGS, SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS,
  NO_LOAD_FPU_REGS, FPU_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, OUT_REGS, STD_REGS, ARG_REGS,
  SRC_REGS, DST_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R0_REGS, R15_REGS, BASE_REGS,
  GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, BASE_REGS, GENERAL_REGS, FLOAT_REGS,
  ALTIVEC_REGS, VRSAVE_REGS, NON_SPECIAL_REGS, MQ_REGS,
  LINK_REGS, CTR_REGS, LINK_OR_CTR_REGS, SPECIAL_REGS,
  SPEC_OR_GEN_REGS, CR0_REGS, CR_REGS, NON_FLOAT_REGS,
  XER_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ADDR_REGS, GENERAL_REGS, FP_REGS, ADDR_FP_REGS,
  GENERAL_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REGS, PR_REGS, T_REGS, MAC_REGS,
  FPUL_REGS, SIBCALL_REGS, GENERAL_REGS, FP0_REGS,
  FP_REGS, DF_REGS, FPSCR_REGS, GENERAL_FP_REGS,
  TARGET_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  M16_NA_REGS, M16_REGS, T_REG, M16_T_REGS,
  GR_REGS, FP_REGS, HI_REG, LO_REG,
  HILO_REG, MD_REGS, COP0_REGS, COP2_REGS,
  COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS,
  HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,
  ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, FPCC_REGS, I64_REGS,
  GENERAL_REGS, FP_REGS, EXTRA_FP_REGS, GENERAL_OR_FP_REGS,
  GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REGS, R1_REGS, TWO_REGS, R2_REGS,
  EIGHT_REGS, R8_REGS, ICALL_REGS, GENERAL_REGS,
  CARRY_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, BR_REGS,
  FP_REGS, ACC_REG, SP_REG, RL_REGS,
  GR_REGS, AR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, M16_NA_REGS, M16_REGS, T_REG,
  M16_T_REGS, GR_REGS, FP_REGS, HI_REG,
  LO_REG, HILO_REG, MD_REGS, COP0_REGS,
  COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,
  HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS,
  COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,
  M16_REGS, T_REG, M16_T_REGS, GR_REGS,
  FP_REGS, HI_REG, LO_REG, HILO_REG,
  MD_REGS, COP0_REGS, COP2_REGS, COP3_REGS,
  HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS,
  COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS,
  ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R0_REG, R24_REG, R25_REG,
  R27_REG, GENERAL_REGS, FLOAT_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, FPA_REGS,
  CIRRUS_REGS, VFP_REGS, IWMMXT_GR_REGS, IWMMXT_REGS,
  LO_REGS, STACK_REG, BASE_REGS, HI_REGS,
  CC_REG, VFPCC_REG, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REG, POINTER_X_REGS,
  POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG, BASE_POINTER_REGS,
  POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS, LD_REGS,
  NO_LD_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, IREGS, BREGS, LREGS,
  MREGS, CIRCREGS, DAGREGS, EVEN_AREGS,
  ODD_AREGS, AREGS, CCREGS, EVEN_DREGS,
  ODD_DREGS, DREGS, PREGS_CLOBBERED, PREGS,
  DPREGS, MOST_REGS, PROLOGUE_REGS, NON_A_CC_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0R1_REGS,
  R2R3_REGS, EXT_LOW_REGS, EXT_REGS, ADDR_REGS,
  INDEX_REGS, BK_REG, SP_REG, RC_REG,
  COUNTER_REGS, INT_REGS, GENERAL_REGS, DP_REG,
  ST_REG, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG,
  MULTIPLY_64_REG, LOW_REGS, HIGH_REGS, REAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, ICC_REGS,
  FCC_REGS, CC_REGS, ICR_REGS, FCR_REGS,
  CR_REGS, LCR_REG, LR_REG, GR8_REGS,
  GR9_REGS, GR89_REGS, FDPIC_REGS, FDPIC_FPTR_REGS,
  FDPIC_CALL_REGS, SPR_REGS, QUAD_ACC_REGS, EVEN_ACC_REGS,
  ACC_REGS, ACCG_REGS, QUAD_FPR_REGS, FEVEN_REGS,
  FPR_REGS, QUAD_REGS, EVEN_REGS, GPR_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, COUNTER_REGS,
  SOURCE_REGS, DESTINATION_REGS, GENERAL_REGS, MAC_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, AREG,
  DREG, CREG, BREG, SIREG,
  DIREG, AD_REGS, Q_REGS, NON_Q_REGS,
  INDEX_REGS, LEGACY_REGS, GENERAL_REGS, FP_TOP_REG,
  FP_SECOND_REG, FLOAT_REGS, SSE_REGS, MMX_REGS,
  FP_TOP_SSE_REGS, FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS,
  INT_SSE_REGS, FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, PR_REGS, BR_REGS,
  AR_M_REGS, AR_I_REGS, ADDL_REGS, GR_REGS,
  FR_REGS, GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, DPH_REGS, DPL_REGS,
  DP_REGS, SP_REGS, IPH_REGS, IPL_REGS,
  IP_REGS, DP_SP_REGS, PTR_REGS, NONPTR_REGS,
  NONSP_REGS, GENERAL_REGS, ALL_REGS = GENERAL_REGS, LIM_REG_CLASSES,
  NO_REGS, GR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, CARRY_REG, ACCUM_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, D_REGS,
  X_REGS, Y_REGS, SP_REGS, DA_REGS,
  DB_REGS, Z_REGS, D8_REGS, Q_REGS,
  D_OR_X_REGS, D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS,
  A_REGS, X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS,
  A_OR_D_REGS, A_OR_SP_REGS, H_REGS, S_REGS,
  D_OR_S_REGS, X_OR_S_REGS, Y_OR_S_REGS, Z_OR_S_REGS,
  SP_OR_S_REGS, D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS,
  A_OR_S_REGS, D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS,
  G_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  DATA_REGS, ADDR_REGS, FP_REGS, GENERAL_REGS,
  DATA_OR_FP_REGS, ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, ONLYR1_REGS, LRW_REGS, GENERAL_REGS,
  C_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  M16_NA_REGS, M16_REGS, T_REG, M16_T_REGS,
  PIC_FN_ADDR_REG, LEA_REGS, GR_REGS, FP_REGS,
  HI_REG, LO_REG, MD_REGS, COP0_REGS,
  COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,
  HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,
  ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, REMAINDER_REG,
  HIMULT_REG, SYSTEM_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS,
  DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS, EXTENDED_REGS, DATA_OR_EXTENDED_REGS,
  ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS, FP_REGS,
  FP_ACC_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, FLOAT_REG0, LONG_FLOAT_REG0,
  FLOAT_REGS, LONG_REGS, FP_REGS, GEN_AND_FP_REGS,
  FRAME_POINTER_REG, STACK_POINTER_REG, GEN_AND_MEM_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,
  FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,
  GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,
  SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS,
  FPU_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  BASE_REGS, GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS,
  VRSAVE_REGS, VSCR_REGS, SPE_ACC_REGS, SPEFSCR_REGS,
  NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,
  LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,
  CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, CC_REGS, ADDR_REGS,
  GENERAL_REGS, ACCESS_REGS, ADDR_CC_REGS, GENERAL_CC_REGS,
  FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REGS, PR_REGS,
  T_REGS, MAC_REGS, FPUL_REGS, SIBCALL_REGS,
  GENERAL_REGS, FP0_REGS, FP_REGS, DF_HI_REGS,
  DF_REGS, FPSCR_REGS, GENERAL_FP_REGS, TARGET_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, FPCC_REGS,
  I64_REGS, GENERAL_REGS, FP_REGS, EXTRA_FP_REGS,
  GENERAL_OR_FP_REGS, GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R0_REGS, R1_REGS, TWO_REGS,
  R2_REGS, EIGHT_REGS, R8_REGS, ICALL_REGS,
  GENERAL_REGS, CARRY_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  BR_REGS, FP_REGS, ACC_REG, SP_REG,
  RL_REGS, GR_REGS, AR_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REG, R24_REG,
  R25_REG, R27_REG, GENERAL_REGS, FLOAT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  FPA_REGS, CIRRUS_REGS, VFP_REGS, IWMMXT_GR_REGS,
  IWMMXT_REGS, LO_REGS, STACK_REG, BASE_REGS,
  HI_REGS, CC_REG, VFPCC_REG, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0_REG,
  POINTER_X_REGS, POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG,
  BASE_POINTER_REGS, POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS,
  LD_REGS, NO_LD_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, IREGS, BREGS,
  LREGS, MREGS, CIRCREGS, DAGREGS,
  EVEN_AREGS, ODD_AREGS, AREGS, CCREGS,
  EVEN_DREGS, ODD_DREGS, DREGS, FDPIC_REGS,
  FDPIC_FPTR_REGS, PREGS_CLOBBERED, PREGS, IPREGS,
  DPREGS, MOST_REGS, LT_REGS, LC_REGS,
  LB_REGS, PROLOGUE_REGS, NON_A_CC_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0R1_REGS, R2R3_REGS,
  EXT_LOW_REGS, EXT_REGS, ADDR_REGS, INDEX_REGS,
  BK_REG, SP_REG, RC_REG, COUNTER_REGS,
  INT_REGS, GENERAL_REGS, DP_REG, ST_REG,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, MOF_REGS,
  CC0_REGS, SPECIAL_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, LO_REGS, HI_REGS,
  HILO_REGS, NOSP_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG, MULTIPLY_64_REG,
  LOW_REGS, HIGH_REGS, REAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, ICC_REGS, FCC_REGS,
  CC_REGS, ICR_REGS, FCR_REGS, CR_REGS,
  LCR_REG, LR_REG, GR8_REGS, GR9_REGS,
  GR89_REGS, FDPIC_REGS, FDPIC_FPTR_REGS, FDPIC_CALL_REGS,
  SPR_REGS, QUAD_ACC_REGS, EVEN_ACC_REGS, ACC_REGS,
  ACCG_REGS, QUAD_FPR_REGS, FEVEN_REGS, FPR_REGS,
  QUAD_REGS, EVEN_REGS, GPR_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, COUNTER_REGS, SOURCE_REGS,
  DESTINATION_REGS, GENERAL_REGS, MAC_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, AREG, DREG,
  CREG, BREG, SIREG, DIREG,
  AD_REGS, Q_REGS, NON_Q_REGS, INDEX_REGS,
  LEGACY_REGS, GENERAL_REGS, FP_TOP_REG, FP_SECOND_REG,
  FLOAT_REGS, SSE_REGS, MMX_REGS, FP_TOP_SSE_REGS,
  FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS, INT_SSE_REGS,
  FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  PR_REGS, BR_REGS, AR_M_REGS, AR_I_REGS,
  ADDL_REGS, GR_REGS, FP_REGS, FR_REGS,
  GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, SP_REGS, FB_REGS, SB_REGS,
  CR_REGS, R0_REGS, R1_REGS, R2_REGS,
  R3_REGS, R02_REGS, HL_REGS, QI_REGS,
  R23_REGS, R03_REGS, DI_REGS, A0_REGS,
  A1_REGS, A_REGS, AD_REGS, PS_REGS,
  SI_REGS, HI_REGS, RA_REGS, GENERAL_REGS,
  FLG_REGS, HC_REGS, MEM_REGS, R02_A_MEM_REGS,
  A_HL_MEM_REGS, R1_R3_A_MEM_REGS, R03_MEM_REGS, A_HI_MEM_REGS,
  A_AD_CR_MEM_SI_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  CARRY_REG, ACCUM_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, D_REGS, X_REGS,
  Y_REGS, SP_REGS, DA_REGS, DB_REGS,
  Z_REGS, D8_REGS, Q_REGS, D_OR_X_REGS,
  D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS, A_REGS,
  X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS, A_OR_D_REGS,
  A_OR_SP_REGS, H_REGS, S_REGS, D_OR_S_REGS,
  X_OR_S_REGS, Y_OR_S_REGS, Z_OR_S_REGS, SP_OR_S_REGS,
  D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS, A_OR_S_REGS,
  D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS, G_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,
  ADDR_REGS, FP_REGS, GENERAL_REGS, DATA_OR_FP_REGS,
  ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ONLYR1_REGS, LRW_REGS, GENERAL_REGS, C_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,
  M16_REGS, T_REG, M16_T_REGS, PIC_FN_ADDR_REG,
  V1_REG, LEA_REGS, GR_REGS, FP_REGS,
  HI_REG, LO_REG, MD_REGS, COP0_REGS,
  COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,
  HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,
  ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, DSP_ACC_REGS,
  ACC_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, REMAINDER_REG, HIMULT_REG, SYSTEM_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,
  ADDRESS_REGS, SP_REGS, DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,
  EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS,
  SP_OR_ADDRESS_OR_EXTENDED_REGS, FP_REGS, FP_ACC_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,
  FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,
  GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,
  SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS,
  FPU_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  BASE_REGS, GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS,
  VRSAVE_REGS, VSCR_REGS, SPE_ACC_REGS, SPEFSCR_REGS,
  NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,
  LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,
  CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, CC_REGS, ADDR_REGS,
  GENERAL_REGS, ACCESS_REGS, ADDR_CC_REGS, GENERAL_CC_REGS,
  FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, G16_REGS, G32_REGS,
  T32_REGS, HI_REG, LO_REG, CE_REGS,
  CN_REG, LC_REG, SC_REG, SP_REGS,
  CR_REGS, CP1_REGS, CP2_REGS, CP3_REGS,
  CPA_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REGS, PR_REGS, T_REGS, MAC_REGS,
  FPUL_REGS, SIBCALL_REGS, GENERAL_REGS, FP0_REGS,
  FP_REGS, DF_HI_REGS, DF_REGS, FPSCR_REGS,
  GENERAL_FP_REGS, GENERAL_DF_REGS, TARGET_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, FPCC_REGS, I64_REGS,
  GENERAL_REGS, FP_REGS, EXTRA_FP_REGS, GENERAL_OR_FP_REGS,
  GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REGS, R1_REGS, TWO_REGS, R2_REGS,
  EIGHT_REGS, R8_REGS, ICALL_REGS, GENERAL_REGS,
  CARRY_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, BR_REGS,
  FP_REGS, ACC_REG, SP_REG, RL_REGS,
  GR_REGS, AR_REGS, ALL_REGS, LIM_REG_CLASSES
}
enum  m32r_function_type {
  M32R_FUNCTION_UNKNOWN, M32R_FUNCTION_NORMAL, M32R_FUNCTION_INTERRUPT, M32R_FUNCTION_UNKNOWN,
  M32R_FUNCTION_NORMAL, M32R_FUNCTION_INTERRUPT, M32R_FUNCTION_UNKNOWN, M32R_FUNCTION_NORMAL,
  M32R_FUNCTION_INTERRUPT, M32R_FUNCTION_UNKNOWN, M32R_FUNCTION_NORMAL, M32R_FUNCTION_INTERRUPT
}

Variables

int target_flags
const char * m32r_model_string
const char * m32r_sdata_string
enum m32r_model m32r_model
int g_switch_value
int g_switch_set
enum m32r_sdata m32r_sdata
unsigned int m32r_hard_regno_mode_ok [FIRST_PSEUDO_REGISTER]
unsigned int m32r_mode_class []
enum reg_class m32r_regno_reg_class [FIRST_PSEUDO_REGISTER]
char m32r_punct_chars [256]
struct rtx_def * m32r_compare_op0
struct rtx_def * m32r_compare_op1

Define Documentation

#define ACCUM_P ( REGNO   )     ((REGNO) == ACCUM_REGNUM || SUBTARGET_ACCUM_P (REGNO))

Definition at line 957 of file m32r.h.

#define ACCUM_REGNUM   18

Definition at line 941 of file m32r.h.

#define ACCUMULATE_OUTGOING_ARGS   1

Definition at line 1031 of file m32r.h.

#define ADDITIONAL_REGISTER_NAMES

Value:

{         \
  /*{ "gp", GP_REGNUM },*/    \
  { "r13", FRAME_POINTER_REGNUM },  \
  { "r14", RETURN_ADDR_REGNUM },  \
  { "r15", STACK_POINTER_REGNUM },  \
  SUBTARGET_ADDITIONAL_REGISTER_NAMES \
}

Definition at line 1813 of file m32r.h.

#define ADDRESS_COST ( ADDR   )     m32r_address_cost (ADDR)

Definition at line 1481 of file m32r.h.

#define ARG_POINTER_REGNUM   16

Definition at line 917 of file m32r.h.

#define ASM_APP_OFF   ""

Definition at line 1718 of file m32r.h.

#define ASM_APP_ON   ""

Definition at line 1714 of file m32r.h.

#define ASM_COMMENT_START   ";"

Definition at line 1710 of file m32r.h.

#define ASM_CPU_SPEC   "%{m32r} %{m32rx} %{!O0: %{O*: -O}} --no-warn-explicit-parallel-conflicts"

Definition at line 52 of file m32r.h.

#define ASM_FILE_START ( FILE   )     m32r_asm_file_start (FILE)

Definition at line 1705 of file m32r.h.

#define ASM_FORMAT_PRIVATE_NAME ( OUTPUT,
NAME,
LABELNO   ) 

Value:

do              \
    {             \
      (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10);\
      sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)); \
    }             \
  while (0)

Definition at line 1783 of file m32r.h.

#define ASM_GLOBALIZE_LABEL ( FILE,
NAME   ) 

Value:

do          \
    {         \
      fputs ("\t.global\t", FILE);  \
      assemble_name (FILE, NAME); \
      fputs ("\n", FILE);   \
    }         \
  while (0)

Definition at line 1734 of file m32r.h.

#define ASM_OUTPUT_ADDR_DIFF_ELT ( FILE,
BODY,
VALUE,
REL   ) 

Value:

do              \
    {             \
      char label[30];         \
      ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE);  \
      fprintf (FILE, "\t.word\t");      \
      assemble_name (FILE, label);      \
      fprintf (FILE, "-");        \
      ASM_GENERATE_INTERNAL_LABEL (label, "L", REL);  \
      assemble_name (FILE, label);      \
      fprintf (FILE, ")\n");        \
    }             \
  while (0)

Definition at line 1868 of file m32r.h.

#define ASM_OUTPUT_ADDR_VEC_ELT ( FILE,
VALUE   ) 

Value:

do              \
     {              \
       char label[30];          \
       ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \
       fprintf (FILE, "\t.word\t");     \
       assemble_name (FILE, label);     \
       fprintf (FILE, "\n");        \
     }              \
  while (0)

Definition at line 1856 of file m32r.h.

#define ASM_OUTPUT_ALIGN ( FILE,
LOG   ) 

Value:

do              \
    {             \
      if ((LOG) != 0)         \
  fprintf (FILE, "\t.balign %d\n", 1 << (LOG)); \
    }             \
  while (0)

Definition at line 1902 of file m32r.h.

#define ASM_OUTPUT_ALIGNED_BSS ( FILE,
DECL,
NAME,
SIZE,
ALIGN   ) 

Value:

do                \
    {               \
      ASM_GLOBALIZE_LABEL (FILE, NAME);       \
      ASM_OUTPUT_ALIGNED_COMMON (FILE, NAME, SIZE, ALIGN);  \
    }               \
  while (0)

Definition at line 1940 of file m32r.h.

#define ASM_OUTPUT_ALIGNED_COMMON ( FILE,
NAME,
SIZE,
ALIGN   ) 

Value:

do                  \
    {                 \
      if (! TARGET_SDATA_NONE           \
    && (SIZE) > 0 && (SIZE) <= g_switch_value)      \
  fprintf ((FILE), "%s", SCOMMON_ASM_OP);       \
      else                \
  fprintf ((FILE), "%s", COMMON_ASM_OP);        \
      assemble_name ((FILE), (NAME));         \
      fprintf ((FILE), ",%u,%u\n", (SIZE), (ALIGN) / BITS_PER_UNIT);  \
    }                 \
  while (0)

Definition at line 1919 of file m32r.h.

#define ASM_OUTPUT_LABEL ( FILE,
NAME   ) 

Value:

do          \
    {         \
      assemble_name (FILE, NAME); \
      fputs (":\n", FILE);    \
    }         \
  while (0)

Definition at line 1724 of file m32r.h.

#define ASM_OUTPUT_LABELREF ( FILE,
NAME   ) 

Value:

do            \
    {           \
      const char * real_name;     \
      STRIP_NAME_ENCODING (real_name, (NAME));  \
      asm_fprintf (FILE, "%U%s", real_name);  \
    }           \
  while (0)

Definition at line 1746 of file m32r.h.

#define ASM_OUTPUT_SOURCE_LINE ( file,
line   ) 

Value:

do                  \
    {                 \
      static int sym_lineno = 1;          \
      fprintf (file, ".stabn 68,0,%d,.LM%d-",       \
         line, sym_lineno);         \
      assemble_name             \
  (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); \
      fprintf (file, (optimize_size || TARGET_M32R)     \
         ? "\n\t.debugsym .LM%d\n"        \
         : "\n.LM%d:\n",            \
         sym_lineno);           \
      sym_lineno += 1;              \
    }                 \
  while (0)

Definition at line 1764 of file m32r.h.

#define ASM_SPEC   "%{v} %(asm_cpu) %(relax)"

Definition at line 170 of file m32r.h.

#define BASE_REG_CLASS   GENERAL_REGS

Definition at line 746 of file m32r.h.

#define BIGGEST_ALIGNMENT   32

Definition at line 502 of file m32r.h.

#define BITS_BIG_ENDIAN   1

Definition at line 428 of file m32r.h.

#define BITS_PER_UNIT   8

Definition at line 444 of file m32r.h.

#define BITS_PER_WORD   32

Definition at line 450 of file m32r.h.

#define BRANCH_COST   ((TARGET_BRANCH_COST) ? 2 : 1)

Definition at line 1497 of file m32r.h.

#define BSS_SECTION_ASM_OP   "\t.section .bss"

Definition at line 1540 of file m32r.h.

#define BYTES_BIG_ENDIAN   1

Definition at line 431 of file m32r.h.

#define CALL_USED_REGISTERS

Value:

{       \
  1, 1, 1, 1, 1, 1, 1, 1, \
  0, 0, 0, 0, 0, 0, 1, 1, \
  1, 1, 1     \
  SUBTARGET_CALL_USED_REGISTERS \
}

Definition at line 598 of file m32r.h.

#define CAN_DEBUG_WITHOUT_FP

Definition at line 418 of file m32r.h.

#define CAN_ELIMINATE ( FROM,
TO   ) 

Value:

((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM   \
   ? ! frame_pointer_needed           \
   : 1)

Definition at line 997 of file m32r.h.

#define CARRY_P ( REGNO   )     ((REGNO) == CARRY_REGNUM || SUBTARGET_CARRY_P (REGNO))

Definition at line 958 of file m32r.h.

#define CARRY_REGNUM   17

Definition at line 940 of file m32r.h.

Referenced by carry_compare_operand(), and gen_compare().

#define CASE_VECTOR_MODE   Pmode

Definition at line 1970 of file m32r.h.

#define CC1_CPU_SPEC   ""

Definition at line 133 of file m32r.h.

#define CC1_SPEC   "%{G*} %(cc1_cpu)"

Definition at line 166 of file m32r.h.

#define CLASS_MAX_NREGS ( CLASS,
MODE   )     ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)

Definition at line 773 of file m32r.h.

#define CMP_INT16_P ( X   )     ((X) >= -0x7fff && (X) <= 0x8000)

Definition at line 799 of file m32r.h.

Referenced by cmp_int16_operand(), gen_compare(), reg_or_cmp_int16_operand(), and reg_or_eq_int16_operand().

#define CONST_COSTS ( X,
CODE,
OUTER_CODE   ) 

Value:

case CONST_INT :            \
    if (INT16_P (INTVAL (X)))         \
      return 0;             \
    /* fall through */            \
  case CONST :              \
  case LABEL_REF :            \
  case SYMBOL_REF :           \
    return 4;             \
  case CONST_DOUBLE :           \
    {               \
      rtx high, low;            \
      split_double (X, &high, &low);        \
      return 4 * (!INT16_P (INTVAL (high))      \
      + !INT16_P (INTVAL (low)));     \
    }

Definition at line 1463 of file m32r.h.

#define CONST_DOUBLE_OK_FOR_LETTER_P ( VALUE,
C   ) 

Value:

((C) == 'G' ? easy_di_const (VALUE)         \
 : (C) == 'H' ? easy_df_const (VALUE)         \
 : 0)

Definition at line 824 of file m32r.h.

#define CONST_OK_FOR_LETTER_P ( VALUE,
C   ) 

Value:

((C) == 'I' ? INT8_P (VALUE)            \
 : (C) == 'J' ? INT16_P (VALUE)           \
 : (C) == 'K' ? UINT16_P (VALUE)          \
 : (C) == 'L' ? UPPER16_P (VALUE)         \
 : (C) == 'M' ? UINT24_P (VALUE)          \
 : (C) == 'N' ? INVERTED_SIGNED_8BIT (VALUE)        \
 : (C) == 'O' ? UINT5_P (VALUE)           \
 : (C) == 'P' ? CMP_INT16_P (VALUE)         \
 : 0)

Definition at line 809 of file m32r.h.

#define CONST_SECTION_ASM_OP   "\t.section .rodata"

Definition at line 1545 of file m32r.h.

#define CONSTANT_ADDRESS_P ( X   ) 

Value:

(GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF  \
 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST)

Definition at line 1302 of file m32r.h.

#define CONSTANT_ALIGNMENT ( EXP,
ALIGN   ) 

Value:

((TREE_CODE (EXP) == STRING_CST \
    && (ALIGN) < FASTEST_ALIGNMENT) \
   ? FASTEST_ALIGNMENT : (ALIGN))

Definition at line 508 of file m32r.h.

#define CPP_CPU_SPEC   "%{m32rx:-D__M32RX__} %{m32r:-U__M32RX__}"

Definition at line 49 of file m32r.h.

#define CPP_PREDEFINES   "-Acpu=m32r -Amachine=m32r -D__M32R__"

Definition at line 108 of file m32r.h.

#define CUMULATIVE_ARGS   int

Definition at line 1068 of file m32r.h.

#define DATA_ALIGNMENT ( TYPE,
ALIGN   ) 

Value:

(TREE_CODE (TYPE) == ARRAY_TYPE         \
   && TYPE_MODE (TREE_TYPE (TYPE)) == QImode        \
   && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN))

Definition at line 514 of file m32r.h.

#define DATA_SECTION_ASM_OP   "\t.section .data"

Definition at line 1538 of file m32r.h.

#define DBX_CONTIN_LENGTH   0

Definition at line 1964 of file m32r.h.

#define DBX_DEBUGGING_INFO

Definition at line 1955 of file m32r.h.

#define DEFAULT_PCC_STRUCT_RETURN   0

Definition at line 1234 of file m32r.h.

#define DEFAULT_SIGNED_CHAR   1

Definition at line 534 of file m32r.h.

#define DOUBLE_TYPE_SIZE   64

Definition at line 530 of file m32r.h.

#define DWARF2_DEBUGGING_INFO

Definition at line 1957 of file m32r.h.

#define DWARF_DEBUGGING_INFO

Definition at line 1956 of file m32r.h.

#define ELIMINABLE_REGS

Value:

{{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM },  \
 { ARG_POINTER_REGNUM,   STACK_POINTER_REGNUM },  \
 { ARG_POINTER_REGNUM,   FRAME_POINTER_REGNUM }}

Definition at line 985 of file m32r.h.

#define EMPTY_FIELD_BOUNDARY   32

Definition at line 493 of file m32r.h.

#define ENCODE_SECTION_INFO ( DECL   )     m32r_encode_section_info (DECL)

Definition at line 1648 of file m32r.h.

#define ENCODED_NAME_P ( SYMBOL_NAME   ) 

Value:

(SDATA_NAME_P (SYMBOL_NAME) \
 /*|| SMALL_NAME_P (SYMBOL_NAME)*/ \
 || MEDIUM_NAME_P (SYMBOL_NAME) \
 || LARGE_NAME_P (SYMBOL_NAME))

Definition at line 1642 of file m32r.h.

Referenced by print_operand_address(), and special_symbolref_operand().

#define ENDFILE_CPU_SPEC   "-lgloss %{m32rx:m32rx/crtfini.o%s} %{!m32rx:crtfini.o%s}"

Definition at line 57 of file m32r.h.

#define ENDFILE_SPEC   "%(endfile_cpu)"

Definition at line 180 of file m32r.h.

#define EXIT_IGNORE_STACK   1

Definition at line 1250 of file m32r.h.

#define EXPAND_BUILTIN_VA_ARG ( valist,
type   )     m32r_va_arg (valist, type)

Definition at line 1205 of file m32r.h.

#define EXTRA_CONSTRAINT ( VALUE,
C   ) 

Value:

(  (C) == 'Q' ? ((TARGET_ADDR24 && GET_CODE (VALUE) == LABEL_REF) \
     || addr24_operand (VALUE, VOIDmode))     \
 : (C) == 'R' ? ((TARGET_ADDR32 && GET_CODE (VALUE) == LABEL_REF) \
     || addr32_operand (VALUE, VOIDmode))     \
 : (C) == 'S' ? (GET_CODE (VALUE) == MEM        \
     && STORE_PREINC_PREDEC_P (GET_MODE (VALUE),    \
             XEXP (VALUE, 0)))    \
 : (C) == 'T' ? (GET_CODE (VALUE) == MEM        \
     && memreg_operand (VALUE, GET_MODE (VALUE)))   \
 : (C) == 'U' ? (GET_CODE (VALUE) == MEM        \
     && LOAD_POSTINC_P (GET_MODE (VALUE),     \
            XEXP (VALUE, 0)))     \
 : 0)

Definition at line 841 of file m32r.h.

#define EXTRA_SECTION_FUNCTIONS

Value:

CONST_SECTION_FUNCTION  \
  SDATA_SECTION_FUNCTION  \
  SBSS_SECTION_FUNCTION

Definition at line 1558 of file m32r.h.

#define EXTRA_SECTIONS   in_sdata, in_sbss, in_const

Definition at line 1551 of file m32r.h.

#define EXTRA_SPECS

Value:

{ "asm_cpu",      ASM_CPU_SPEC },       \
  { "cpp_cpu",      CPP_CPU_SPEC },       \
  { "cc1_cpu",      CC1_CPU_SPEC },       \
  { "link_cpu",     LINK_CPU_SPEC },      \
  { "startfile_cpu",    STARTFILE_CPU_SPEC },     \
  { "endfile_cpu",    ENDFILE_CPU_SPEC },     \
  { "relax",      RELAX_SPEC },       \
  SUBTARGET_EXTRA_SPECS

Definition at line 156 of file m32r.h.

#define FASTEST_ALIGNMENT   32

Definition at line 505 of file m32r.h.

#define FIRST_INSN_ADDRESS   m32r_first_insn_address ()

Definition at line 1532 of file m32r.h.

Referenced by shorten_branches().

#define FIRST_PARM_OFFSET ( FNDECL   )     0

Definition at line 882 of file m32r.h.

#define FIRST_PSEUDO_REGISTER   (M32R_NUM_REGISTERS + SUBTARGET_NUM_REGISTERS)

Definition at line 555 of file m32r.h.

#define FIXED_REGISTERS

Value:

{       \
  0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 1, \
  1, 1, 1     \
  SUBTARGET_FIXED_REGISTERS \
}

Definition at line 579 of file m32r.h.

#define FLOAT_TYPE_SIZE   32

Definition at line 529 of file m32r.h.

#define FRAME_POINTER_REGNUM   13

Definition at line 914 of file m32r.h.

#define FRAME_POINTER_REQUIRED   current_function_calls_alloca

Definition at line 965 of file m32r.h.

#define FUNCTION_ARG ( CUM,
MODE,
TYPE,
NAMED   ) 

Value:

(PASS_IN_REG_P ((CUM), (MODE), (TYPE), (NAMED))     \
   ? gen_rtx_REG ((MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)))  \
   : 0)

Definition at line 1119 of file m32r.h.

#define FUNCTION_ARG_ADVANCE ( CUM,
MODE,
TYPE,
NAMED   ) 

Value:

((CUM) = (ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) \
    + ROUND_ADVANCE_ARG ((MODE), (TYPE))))

Definition at line 1159 of file m32r.h.

#define FUNCTION_ARG_PARTIAL_NREGS ( CUM,
MODE,
TYPE,
NAMED   )     function_arg_partial_nregs (&CUM, (int)MODE, TYPE, NAMED)

Definition at line 1144 of file m32r.h.

#define FUNCTION_ARG_PASS_BY_REFERENCE ( CUM,
MODE,
TYPE,
NAMED   )     ((TYPE) && int_size_in_bytes (TYPE) > 8)

Definition at line 1153 of file m32r.h.

#define FUNCTION_ARG_REGNO_P ( N   )     ((unsigned) (N) < M32R_MAX_PARM_REGS)

Definition at line 1080 of file m32r.h.

#define FUNCTION_BOUNDARY   32

Definition at line 490 of file m32r.h.

#define FUNCTION_INCOMING_ARG ( CUM,
MODE,
TYPE,
NAMED   ) 

Value:

(((! current_function_varargs || (NAMED))       \
    && PASS_IN_REG_P ((CUM), (MODE), (TYPE), (NAMED)))      \
   ? gen_rtx_REG ((MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)))  \
   : 0)

Definition at line 1125 of file m32r.h.

#define FUNCTION_MODE   SImode

Definition at line 2016 of file m32r.h.

#define FUNCTION_PROFILER ( FILE,
LABELNO   )     abort ()

Definition at line 1254 of file m32r.h.

#define FUNCTION_VALUE ( VALTYPE,
FUNC   )     gen_rtx_REG (TYPE_MODE (VALTYPE), 0)

Definition at line 1214 of file m32r.h.

#define FUNCTION_VALUE_REGNO_P ( N   )     ((N) == 0)

Definition at line 1223 of file m32r.h.

#define GO_IF_LEGITIMATE_ADDRESS ( MODE,
X,
ADDR   ) 

Value:

{ if (RTX_OK_FOR_BASE_P (X))            \
    goto ADDR;                \
  if (LEGITIMATE_OFFSET_ADDRESS_P ((MODE), (X)))      \
    goto ADDR;                \
  if (LEGITIMATE_LO_SUM_ADDRESS_P ((MODE), (X)))      \
    goto ADDR;                \
  if (LOAD_POSTINC_P ((MODE), (X)))         \
    goto ADDR;                \
  if (STORE_PREINC_PREDEC_P ((MODE), (X)))        \
    goto ADDR;                \
}

Definition at line 1396 of file m32r.h.

#define GO_IF_MODE_DEPENDENT_ADDRESS ( ADDR,
LABEL   ) 

Value:

do {                  \
  if (GET_CODE (ADDR) == PRE_DEC          \
      || GET_CODE (ADDR) == PRE_INC         \
      || GET_CODE (ADDR) == POST_INC          \
      || GET_CODE (ADDR) == LO_SUM)         \
    goto LABEL;               \
} while (0)

Definition at line 1428 of file m32r.h.

#define GPR_P ( REGNO   )     (IN_RANGE_P ((REGNO), 0, 15) || SUBTARGET_GPR_P (REGNO))

Definition at line 956 of file m32r.h.

#define HARD_REGNO_MODE_OK ( REGNO,
MODE   )     ((m32r_hard_regno_mode_ok[REGNO] & m32r_mode_class[MODE]) != 0)

Definition at line 654 of file m32r.h.

#define HARD_REGNO_NREGS ( REGNO,
MODE   )     ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)

Definition at line 648 of file m32r.h.

#define HAVE_POST_INCREMENT   1

Definition at line 1299 of file m32r.h.

#define HAVE_PRE_DECREMENT   1

Definition at line 1297 of file m32r.h.

#define HAVE_PRE_INCREMENT   1

Definition at line 1298 of file m32r.h.

#define IMMEDIATE_PREFIX   "#"

Definition at line 1853 of file m32r.h.

#define IN_RANGE_P ( VALUE,
LOW,
HIGH   ) 

Value:

(((unsigned HOST_WIDE_INT)((VALUE) - (LOW)))        \
   <= ((unsigned HOST_WIDE_INT)((HIGH) - (LOW))))

Definition at line 792 of file m32r.h.

#define INDEX_REG_CLASS   GENERAL_REGS

Definition at line 745 of file m32r.h.

#define INIT_CUMULATIVE_ARGS ( CUM,
FNTYPE,
LIBNAME,
INDIRECT   )     ((CUM) = 0)

Definition at line 1073 of file m32r.h.

#define INIT_EXPANDERS   m32r_init_expanders ()

Definition at line 1244 of file m32r.h.

#define INITIAL_ELIMINATION_OFFSET ( FROM,
TO,
OFFSET   ) 

Value:

{                 \
  int size = m32r_compute_frame_size (get_frame_size ());   \
                  \
 if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM)  \
   (OFFSET) = 0;              \
 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
   (OFFSET) = size - current_function_pretend_args_size;    \
 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
   (OFFSET) = size - current_function_pretend_args_size;    \
  else                  \
    abort ();               \
}

Definition at line 1007 of file m32r.h.

#define INITIALIZE_TRAMPOLINE ( TRAMP,
FNADDR,
CXT   ) 

Value:

do { \
  emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 0)), \
      plus_constant ((CXT), 0xe7000000)); \
  emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), \
      plus_constant ((FNADDR), 0xe6000000)); \
  emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 8)), \
      GEN_INT (0x1fc67000)); \
  emit_insn (gen_flush_icache (validize_mem (gen_rtx_MEM (SImode, TRAMP)))); \
} while (0)

Definition at line 1274 of file m32r.h.

#define INT16_P ( X   )     ((X) >= -0x8000 && (X) <= 0x7fff)

Definition at line 798 of file m32r.h.

Referenced by m32r_expand_block_move(), m32r_legitimize_pic_address(), m32r_rtx_costs(), reg_or_int16_operand(), seth_add3_operand(), small_data_operand(), and two_insn_const_operand().

#define INT8_P ( X   )     ((X) >= -0x80 && (X) <= 0x7f)

Definition at line 797 of file m32r.h.

Referenced by conditional_move_operand(), and int8_operand().

#define INT_TYPE_SIZE   32

Definition at line 526 of file m32r.h.

#define INVERTED_SIGNED_8BIT ( VAL   )     ((VAL) >= -127 && (VAL) <= 128)

Definition at line 807 of file m32r.h.

#define LARGE_FLAG_CHAR   '&'

Definition at line 1632 of file m32r.h.

Referenced by m32r_encode_section_info().

#define LARGE_NAME_P ( NAME   )     (*(NAME) == LARGE_FLAG_CHAR)

Definition at line 1638 of file m32r.h.

Referenced by call26_operand().

#define LEGITIMATE_CONSTANT_P ( X   ) 

Value:

(! (GET_CODE (X) == CONST           \
    && GET_CODE (XEXP (X, 0)) == PLUS         \
    && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF     \
    && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT      \
    && (unsigned HOST_WIDE_INT) INTVAL (XEXP (XEXP (X, 0), 1)) > 32767))

Definition at line 1312 of file m32r.h.

#define LEGITIMATE_LO_SUM_ADDRESS_P ( MODE,
X   ) 

Value:

(GET_CODE (X) == LO_SUM             \
 && (MODE != BLKmode && GET_MODE_SIZE (MODE) <= UNITS_PER_WORD)   \
 && RTX_OK_FOR_BASE_P (XEXP (X, 0))         \
 && CONSTANT_P (XEXP (X, 1)))

Definition at line 1374 of file m32r.h.

Referenced by rs6000_legitimate_address().

#define LEGITIMATE_OFFSET_ADDRESS_P ( MODE,
X   ) 

Value:

(GET_CODE (X) == PLUS             \
 && RTX_OK_FOR_BASE_P (XEXP (X, 0))         \
 && RTX_OK_FOR_OFFSET_P (XEXP (X, 1)))

Definition at line 1366 of file m32r.h.

#define LEGITIMIZE_ADDRESS ( X,
OLDX,
MODE,
WIN   ) 

Definition at line 1424 of file m32r.h.

#define LIBCALL_VALUE ( MODE   )     gen_rtx_REG (MODE, 0)

Definition at line 1218 of file m32r.h.

#define LINK_CPU_SPEC   ""

Definition at line 137 of file m32r.h.

#define LINK_SPEC   "%{v} %(link_cpu) %(relax)"

Definition at line 174 of file m32r.h.

#define LIT_NAME_P ( NAME   )     ((NAME)[0] == '*' && (NAME)[1] == '.')

Definition at line 1640 of file m32r.h.

Referenced by addr24_operand().

#define LOAD_EXTEND_OP ( MODE   )     ZERO_EXTEND

Definition at line 1989 of file m32r.h.

#define LOAD_POSTINC_P ( MODE,
X   ) 

Value:

(((MODE) == SImode || (MODE) == SFmode)         \
 && GET_CODE (X) == POST_INC            \
 && GET_CODE (XEXP (X, 0)) == REG         \
 && RTX_OK_FOR_BASE_P (XEXP (X, 0)))

Definition at line 1382 of file m32r.h.

#define LOCAL_LABEL_PREFIX   ".L"

Definition at line 1851 of file m32r.h.

#define LONG_DOUBLE_TYPE_SIZE   64

Definition at line 531 of file m32r.h.

#define LONG_LONG_TYPE_SIZE   64

Definition at line 528 of file m32r.h.

#define LONG_TYPE_SIZE   32

Definition at line 527 of file m32r.h.

#define LOOP_ALIGN ( LABEL   )     (TARGET_ALIGN_LOOPS ? 5 : 0)

Definition at line 1886 of file m32r.h.

#define LOOP_TEST_THRESHOLD

Value:

(optimize_size        \
           && !flag_unroll_loops      \
           && !flag_unroll_all_loops ? 2 : 30)

Definition at line 1894 of file m32r.h.

#define M32R_INTERRUPT_P ( TYPE   )     ((TYPE) == M32R_FUNCTION_INTERRUPT)

Definition at line 2030 of file m32r.h.

Referenced by m32r_compute_frame_size(), m32r_output_function_epilogue(), and m32r_output_function_prologue().

#define M32R_MAX_INT_REGS   16

Definition at line 942 of file m32r.h.

Referenced by m32r_compute_frame_size(), m32r_expand_prologue(), and m32r_output_function_epilogue().

#define M32R_MAX_PARM_REGS   4

Definition at line 1077 of file m32r.h.

Referenced by function_arg_partial_nregs(), m32r_arg_partial_bytes(), and m32r_setup_incoming_varargs().

#define M32R_MODEL_DEFAULT   "small"

Definition at line 304 of file m32r.h.

#define M32R_NUM_REGISTERS   19

Definition at line 549 of file m32r.h.

#define M32R_SDATA_DEFAULT   "none"

Definition at line 358 of file m32r.h.

#define M32R_STACK_ALIGN ( LOC   )     (((LOC)+3) & ~3)

Definition at line 487 of file m32r.h.

Referenced by m32r_compute_frame_size().

#define MAX_REGS_PER_ADDRESS   1

Definition at line 1293 of file m32r.h.

#define MEDIUM_FLAG_CHAR   '%'

Definition at line 1631 of file m32r.h.

Referenced by m32r_encode_section_info().

#define MEDIUM_NAME_P ( NAME   )     (*(NAME) == MEDIUM_FLAG_CHAR)

Definition at line 1637 of file m32r.h.

#define MEMORY_MOVE_COST ( MODE,
CLASS,
IN_P   )     (GET_MODE_SIZE (MODE) <= UNITS_PER_WORD ? 6 : 12)

Definition at line 1490 of file m32r.h.

#define MODES_TIEABLE_P ( MODE1,
MODE2   ) 

Value:

(GET_MODE_CLASS (MODE1) == MODE_INT   \
 && GET_MODE_CLASS (MODE2) == MODE_INT    \
 && GET_MODE_SIZE (MODE1) <= UNITS_PER_WORD \
 && GET_MODE_SIZE (MODE2) <= UNITS_PER_WORD)

Definition at line 666 of file m32r.h.

#define MOVE_MAX   4

Definition at line 1993 of file m32r.h.

#define MULTILIB_DEFAULTS   { "mmodel=small" SUBTARGET_MULTILIB_DEFAULTS }

Definition at line 370 of file m32r.h.

#define MUST_PASS_IN_STACK ( MODE,
TYPE   ) 

Value:

((TYPE) != 0            \
   && (TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST  \
       || TREE_ADDRESSABLE (TYPE)))

Definition at line 1058 of file m32r.h.

#define N_REG_CLASSES   ((int) LIM_REG_CLASSES)

Definition at line 702 of file m32r.h.

#define NO_FUNCTION_CSE

Definition at line 1522 of file m32r.h.

#define NO_RECURSIVE_FUNCTION_CSE

Definition at line 1527 of file m32r.h.

#define OPTIMIZATION_OPTIONS ( LEVEL,
SIZE   ) 

Value:

do            \
    {           \
      if (LEVEL == 1)       \
  flag_regmove = TRUE;      \
                  \
      if (SIZE)         \
  {         \
    flag_omit_frame_pointer = TRUE; \
    flag_strength_reduce = FALSE;   \
  }         \
                  \
      SUBTARGET_OPTIMIZATION_OPTIONS    \
    }           \
  while (0)

Definition at line 399 of file m32r.h.

#define OVERRIDE_OPTIONS

Value:

do            \
    {           \
      /* These need to be done at start up. \
   It's convenient to do them here.  */ \
      m32r_init ();       \
      SUBTARGET_OVERRIDE_OPTIONS    \
    }           \
  while (0)

Definition at line 386 of file m32r.h.

#define PARM_BOUNDARY   32

Definition at line 481 of file m32r.h.

#define PASS_IN_REG_P ( CUM,
MODE,
TYPE,
NAMED   )     (ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) < M32R_MAX_PARM_REGS)

Definition at line 1102 of file m32r.h.

#define PCC_BITFIELD_TYPE_MATTERS   1

Definition at line 499 of file m32r.h.

#define Pmode   SImode

Definition at line 2013 of file m32r.h.

#define POINTER_SIZE   32

Definition at line 478 of file m32r.h.

#define PREDICATE_CODES

Value:

{ "reg_or_zero_operand",        { REG, SUBREG, CONST_INT }},            \
{ "conditional_move_operand", { REG, SUBREG, CONST_INT }},    \
{ "carry_compare_operand",  { EQ, NE }},        \
{ "eqne_comparison_operator", { EQ, NE }},        \
{ "signed_comparison_operator", { EQ, NE, LT, LE, GT, GE }},    \
{ "move_dest_operand",    { REG, SUBREG, MEM }},      \
{ "move_src_operand",   { REG, SUBREG, MEM, CONST_INT,    \
          CONST_DOUBLE, LABEL_REF, CONST, \
          SYMBOL_REF }},      \
{ "move_double_src_operand",  { REG, SUBREG, MEM, CONST_INT,    \
          CONST_DOUBLE }},      \
{ "two_insn_const_operand", { CONST_INT }},       \
{ "symbolic_operand",   { SYMBOL_REF, LABEL_REF, CONST }},  \
{ "seth_add3_operand",    { SYMBOL_REF, LABEL_REF, CONST }},  \
{ "int8_operand",   { CONST_INT }},       \
{ "uint16_operand",   { CONST_INT }},       \
{ "reg_or_int16_operand", { REG, SUBREG, CONST_INT }},    \
{ "reg_or_uint16_operand",  { REG, SUBREG, CONST_INT }},    \
{ "reg_or_cmp_int16_operand", { REG, SUBREG, CONST_INT }},    \
{ "reg_or_eq_int16_operand",  { REG, SUBREG, CONST_INT }},    \
{ "cmp_int16_operand",    { CONST_INT }},       \
{ "call_address_operand", { SYMBOL_REF, LABEL_REF, CONST }},  \
{ "extend_operand",   { REG, SUBREG, MEM }},      \
{ "small_insn_p",   { INSN, CALL_INSN, JUMP_INSN }},  \
{ "m32r_block_immediate_operand",{ CONST_INT }},      \
{ "large_insn_p",   { INSN, CALL_INSN, JUMP_INSN }},  \
{ "seth_add3_operand",    { SYMBOL_REF, LABEL_REF, CONST }},

Definition at line 2039 of file m32r.h.

#define PREFERRED_DEBUGGING_TYPE   DBX_DEBUG

Definition at line 1961 of file m32r.h.

#define PREFERRED_RELOAD_CLASS ( X,
CLASS   )     (CLASS)

Definition at line 768 of file m32r.h.

#define PRINT_OPERAND ( FILE,
X,
CODE   )     m32r_print_operand (FILE, X, CODE)

Definition at line 1831 of file m32r.h.

#define PRINT_OPERAND_ADDRESS ( FILE,
ADDR   )     m32r_print_operand_address (FILE, ADDR)

Definition at line 1842 of file m32r.h.

#define PRINT_OPERAND_PUNCT_VALID_P ( CHAR   )     m32r_punct_chars[(unsigned char) (CHAR)]

Definition at line 1825 of file m32r.h.

#define PROLOGUE_TMP_REGNUM   4

Definition at line 937 of file m32r.h.

#define PROMOTE_MODE ( MODE,
UNSIGNEDP,
TYPE   ) 

Value:

if (GET_MODE_CLASS (MODE) == MODE_INT   \
      && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
    {           \
      (MODE) = SImode;        \
    }

Definition at line 460 of file m32r.h.

#define PROMOTE_PROTOTYPES   1

Definition at line 1024 of file m32r.h.

#define PTRDIFF_TYPE   "long int"

Definition at line 537 of file m32r.h.

#define REAL_ARITHMETIC

Definition at line 424 of file m32r.h.

#define REG_ALLOC_ORDER

Value:

{           \
  4,  5,  6,  7,  2,  3,  8,  9, 10,    \
  11, 12, 13, 14,  0,  1, 15, 16, 17, 18  \
  SUBTARGET_REG_ALLOC_ORDER     \
}

Definition at line 628 of file m32r.h.

#define REG_CLASS_CONTENTS

Value:

{                 \
  { 0x00000 },                \
  { 0x20000 | SUBTARGET_REG_CLASS_CARRY },        \
  { 0x40000 | SUBTARGET_REG_CLASS_ACCUM },        \
  { 0x1ffff | SUBTARGET_REG_CLASS_GENERAL },        \
  { 0x7ffff | SUBTARGET_REG_CLASS_ALL },        \
}

Definition at line 728 of file m32r.h.

#define REG_CLASS_FROM_LETTER ( C   ) 

Value:

((C) == 'c' ? CARRY_REG           \
 : (C) == 'a' ? ACCUM_REGS            \
 :      NO_REGS)

Definition at line 748 of file m32r.h.

#define REG_CLASS_NAMES   { "NO_REGS", "CARRY_REG", "ACCUM_REGS", "GENERAL_REGS", "ALL_REGS" }

Definition at line 705 of file m32r.h.

#define REG_OK_FOR_BASE_P ( X   ) 

Value:

(GPR_P (REGNO (X))      \
 || (REGNO (X)) == ARG_POINTER_REGNUM \
 || REGNO (X) >= FIRST_PSEUDO_REGISTER)

Definition at line 1343 of file m32r.h.

#define REG_OK_FOR_INDEX_P ( X   )     REG_OK_FOR_BASE_P (X)

Definition at line 1349 of file m32r.h.

#define REGISTER_MOVE_COST ( MODE,
CLASS1,
CLASS2   )     2

Definition at line 1485 of file m32r.h.

#define REGISTER_NAMES

Value:

{             \
  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
  "r8", "r9", "r10", "r11", "r12", "fp", "lr", "sp",  \
  "ap", "cbit", "a0"          \
  SUBTARGET_REGISTER_NAMES        \
}

Definition at line 1797 of file m32r.h.

#define REGISTER_PREFIX   ""

Definition at line 1850 of file m32r.h.

#define REGNO_OK_FOR_BASE_P ( REGNO   ) 

Value:

((REGNO) < FIRST_PSEUDO_REGISTER      \
 ? GPR_P (REGNO) || (REGNO) == ARG_POINTER_REGNUM \
 : GPR_P (reg_renumber[REGNO]))

Definition at line 758 of file m32r.h.

#define REGNO_OK_FOR_INDEX_P ( REGNO   )     REGNO_OK_FOR_BASE_P(REGNO)

Definition at line 762 of file m32r.h.

#define REGNO_REG_CLASS ( REGNO   )     (m32r_regno_reg_class[REGNO])

Definition at line 742 of file m32r.h.

#define RELAX_SPEC   ""

Definition at line 152 of file m32r.h.

#define RETURN_ADDR_REGNUM   14

Definition at line 938 of file m32r.h.

#define RETURN_IN_MEMORY ( TYPE   )     (int_size_in_bytes (TYPE) > 8)

Definition at line 1230 of file m32r.h.

#define RETURN_POPS_ARGS ( DECL,
FUNTYPE,
SIZE   )     0

Definition at line 1055 of file m32r.h.

#define REVERSIBLE_CC_MODE ( MODE   )     1

Definition at line 1446 of file m32r.h.

#define RODATA_SECTION_ASM_OP   "\t.section .rodata"

Definition at line 1539 of file m32r.h.

#define ROUND_ADVANCE ( SIZE   )     (((SIZE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)

Definition at line 1085 of file m32r.h.

#define ROUND_ADVANCE_ARG ( MODE,
TYPE   ) 

Value:

((MODE) == BLKmode        \
   ? ROUND_ADVANCE ((unsigned int) int_size_in_bytes (TYPE))  \
   : ROUND_ADVANCE (GET_MODE_SIZE (MODE)))

Definition at line 1089 of file m32r.h.

#define ROUND_ADVANCE_CUM ( CUM,
MODE,
TYPE   )     (CUM)

Definition at line 1095 of file m32r.h.

#define RTX_COSTS ( X,
CODE,
OUTER_CODE   ) 

Value:

case MULT :       \
    return COSTS_N_INSNS (3);   \
  case DIV :        \
  case UDIV :       \
  case MOD :        \
  case UMOD :       \
    return COSTS_N_INSNS (10);

Definition at line 1505 of file m32r.h.

#define RTX_OK_FOR_BASE_P ( X   )     (REG_P (X) && REG_OK_FOR_BASE_P (X))

Definition at line 1359 of file m32r.h.

#define RTX_OK_FOR_OFFSET_P ( X   )     (GET_CODE (X) == CONST_INT && INT16_P (INTVAL (X)))

Definition at line 1362 of file m32r.h.

#define SBSS_SECTION_ASM_OP   "\t.section .sbss"

Definition at line 1542 of file m32r.h.

#define SBSS_SECTION_FUNCTION

Value:

void                  \
sbss_section ()               \
{                 \
  if (in_section != in_sbss)            \
    {                 \
      fprintf (asm_out_file, "%s\n", SBSS_SECTION_ASM_OP);    \
      in_section = in_sbss;           \
    }                 \
}                 \

Definition at line 1574 of file m32r.h.

#define SCOMMON_ASM_OP   "\t.scomm\t"

Definition at line 1916 of file m32r.h.

Referenced by v850_output_common().

#define SDATA_DEFAULT_SIZE   8

Definition at line 342 of file m32r.h.

Referenced by frv_override_options(), and m32r_init().

#define SDATA_FLAG_CHAR   '@'

Definition at line 1625 of file m32r.h.

Referenced by m32r_encode_section_info().

#define SDATA_NAME_P ( NAME   )     (*(NAME) == SDATA_FLAG_CHAR)

Definition at line 1634 of file m32r.h.

Referenced by m32r_select_section(), and small_data_operand().

#define SDATA_SECTION_ASM_OP   "\t.section .sdata"

Definition at line 1541 of file m32r.h.

#define SDATA_SECTION_FUNCTION

Value:

void                  \
sdata_section ()              \
{                 \
  if (in_section != in_sdata)           \
    {                 \
      fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP);   \
      in_section = in_sdata;            \
    }                 \
}                 \

Definition at line 1563 of file m32r.h.

#define SELECT_CC_MODE ( OP,
X,
Y   )     ((enum machine_mode)m32r_select_cc_mode ((int)OP, X, Y))

Definition at line 1441 of file m32r.h.

#define SELECT_SECTION ( EXP,
RELOC,
ALIGN   )     m32r_select_section ((EXP), (RELOC))

Definition at line 1590 of file m32r.h.

#define SETUP_INCOMING_VARARGS ( ARGS_SO_FAR,
MODE,
TYPE,
PRETEND_SIZE,
NO_RTL   )     m32r_setup_incoming_varargs (&ARGS_SO_FAR, MODE, TYPE, &PRETEND_SIZE, NO_RTL)

Definition at line 1201 of file m32r.h.

#define SHIFT_COUNT_TRUNCATED   1

Definition at line 1997 of file m32r.h.

#define SHORT_TYPE_SIZE   16

Definition at line 525 of file m32r.h.

#define SIZE_TYPE   "long unsigned int"

Definition at line 536 of file m32r.h.

#define SLOW_BYTE_ACCESS   1

Definition at line 1518 of file m32r.h.

#define SMALL_NAME_P ( NAME   )     (! ENCODED_NAME_P (NAME) && ! LIT_NAME_P (NAME))

Definition at line 1636 of file m32r.h.

Referenced by addr24_operand().

#define STACK_BOUNDARY   32

Definition at line 484 of file m32r.h.

#define STACK_GROWS_DOWNWARD

Definition at line 860 of file m32r.h.

#define STACK_POINTER_OFFSET   0

Definition at line 879 of file m32r.h.

#define STACK_POINTER_REGNUM   15

Definition at line 911 of file m32r.h.

#define STARTFILE_CPU_SPEC   "%{!shared:crt0.o%s} %{m32rx:m32rx/crtinit.o%s} %{!m32rx:crtinit.o%s}"

Definition at line 56 of file m32r.h.

#define STARTFILE_SPEC   "%(startfile_cpu)"

Definition at line 177 of file m32r.h.

#define STARTING_FRAME_OFFSET   M32R_STACK_ALIGN (current_function_outgoing_args_size)

Definition at line 874 of file m32r.h.

#define STATIC_CHAIN_REGNUM   7

Definition at line 934 of file m32r.h.

#define STORE_FLAG_VALUE   1

Definition at line 2005 of file m32r.h.

#define STORE_PREINC_PREDEC_P ( MODE,
X   ) 

Value:

(((MODE) == SImode || (MODE) == SFmode)         \
 && (GET_CODE (X) == PRE_INC || GET_CODE (X) == PRE_DEC)    \
 && GET_CODE (XEXP (X, 0)) == REG         \
 && RTX_OK_FOR_BASE_P (XEXP (X, 0)))

Definition at line 1390 of file m32r.h.

#define STRICT_ALIGNMENT   1

Definition at line 521 of file m32r.h.

#define STRIP_NAME_ENCODING ( VAR,
SYMBOL_NAME   ) 

Value:

do {              \
  (VAR) = (SYMBOL_NAME) + ENCODED_NAME_P (SYMBOL_NAME); \
  (VAR) += *(VAR) == '*';       \
} while (0)

Definition at line 1654 of file m32r.h.

#define STRUCT_VALUE   0

Definition at line 1238 of file m32r.h.

#define STRUCTURE_SIZE_BOUNDARY   8

Definition at line 496 of file m32r.h.

#define SUBTARGET_ACCUM_P ( REGNO   )     ((REGNO) == 19)

Definition at line 89 of file m32r.h.

#define SUBTARGET_CALL_USED_REGISTERS   , 1

Definition at line 77 of file m32r.h.

#define SUBTARGET_CARRY_P ( REGNO   )     0

Definition at line 953 of file m32r.h.

#define SUBTARGET_FIXED_REGISTERS   , 1

Definition at line 74 of file m32r.h.

#define SUBTARGET_GPR_P ( REGNO   )     0

Definition at line 945 of file m32r.h.

#define SUBTARGET_MULTILIB_DEFAULTS   , "m32r"

Definition at line 68 of file m32r.h.

#define SUBTARGET_NUM_REGISTERS   1

Definition at line 71 of file m32r.h.

#define SUBTARGET_REG_ALLOC_ORDER   , 19

Definition at line 80 of file m32r.h.

#define SUBTARGET_REG_CLASS_ACCUM   0x80000

Definition at line 83 of file m32r.h.

#define SUBTARGET_REG_CLASS_ALL   SUBTARGET_REG_CLASS_ACCUM

Definition at line 86 of file m32r.h.

#define SUBTARGET_REG_CLASS_CARRY   0

Definition at line 713 of file m32r.h.

#define SUBTARGET_REG_CLASS_GENERAL   0

Definition at line 721 of file m32r.h.

#define SUBTARGET_REGISTER_NAMES   , "a1"

Definition at line 92 of file m32r.h.

#define SUBTARGET_SWITCHES

Value:

{ "32rx",     TARGET_M32RX_MASK, "Compile for the m32rx" }, \
    { "32r",      -TARGET_M32RX_MASK, "" },

Definition at line 60 of file m32r.h.

#define SWITCH_TAKES_ARG ( CHAR   )     (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')

Definition at line 103 of file m32r.h.

#define TARGET_ADDR24   (m32r_model == M32R_MODEL_SMALL)

Definition at line 297 of file m32r.h.

Referenced by addr24_operand(), and move_src_operand().

#define TARGET_ADDR32   (! TARGET_ADDR24)

Definition at line 298 of file m32r.h.

Referenced by addr32_operand().

#define TARGET_ALIGN_LOOPS   (target_flags & TARGET_ALIGN_LOOPS_MASK)

Definition at line 203 of file m32r.h.

#define TARGET_ALIGN_LOOPS_MASK   (1 << 2)

Definition at line 202 of file m32r.h.

#define TARGET_BRANCH_COST   (target_flags & TARGET_BRANCH_COST_MASK)

Definition at line 211 of file m32r.h.

#define TARGET_BRANCH_COST_MASK   (1 << 4)

Definition at line 210 of file m32r.h.

#define TARGET_CALL26   (! TARGET_CALL32)

Definition at line 299 of file m32r.h.

Referenced by call26_operand().

#define TARGET_CALL32   (m32r_model == M32R_MODEL_LARGE)

Definition at line 300 of file m32r.h.

#define TARGET_DEBUG   (target_flags & TARGET_DEBUG_MASK)

Definition at line 198 of file m32r.h.

#define TARGET_DEBUG_MASK   (1 << 1)

Definition at line 197 of file m32r.h.

#define TARGET_DEFAULT   0

Definition at line 233 of file m32r.h.

#define TARGET_LOW_ISSUE_RATE   (target_flags & TARGET_LOW_ISSUE_RATE_MASK)

Definition at line 207 of file m32r.h.

Referenced by m32r_issue_rate().

#define TARGET_LOW_ISSUE_RATE_MASK   (1 << 3)

Definition at line 206 of file m32r.h.

#define TARGET_M32R   (! TARGET_M32RX)

Definition at line 220 of file m32r.h.

#define TARGET_M32R   1

Definition at line 220 of file m32r.h.

#define TARGET_M32RX   (target_flags & TARGET_M32RX_MASK)

Definition at line 218 of file m32r.h.

#define TARGET_M32RX_MASK   (1 << 5)

Definition at line 217 of file m32r.h.

#define TARGET_MEM_FUNCTIONS

Definition at line 1288 of file m32r.h.

#define TARGET_MODEL_LARGE   (m32r_model == M32R_MODEL_LARGE)

Definition at line 296 of file m32r.h.

Referenced by m32r_encode_section_info(), and m32r_function_symbol().

#define TARGET_MODEL_MEDIUM   (m32r_model == M32R_MODEL_MEDIUM)

Definition at line 295 of file m32r.h.

Referenced by m32r_encode_section_info(), and m32r_function_symbol().

#define TARGET_MODEL_SMALL   (m32r_model == M32R_MODEL_SMALL)

Definition at line 294 of file m32r.h.

Referenced by m32r_encode_section_info(), m32r_function_symbol(), and m32r_load_pic_register().

#define TARGET_OPTIONS

Value:

{                 \
  { "model=", & m32r_model_string,          \
    N_("Code size: small, medium or large") },        \
  { "sdata=", & m32r_sdata_string,          \
    N_("Small data area: none, sdata, use") }       \
  SUBTARGET_OPTIONS             \
}

Definition at line 261 of file m32r.h.

#define TARGET_RELAX_MASK   (1 << 0)

Definition at line 194 of file m32r.h.

#define TARGET_SDATA_NONE   (m32r_sdata == M32R_SDATA_NONE)

Definition at line 351 of file m32r.h.

Referenced by m32r_encode_section_info(), and m32r_in_small_data_p().

#define TARGET_SDATA_SDATA   (m32r_sdata == M32R_SDATA_SDATA)

Definition at line 352 of file m32r.h.

#define TARGET_SDATA_USE   (m32r_sdata == M32R_SDATA_USE)

Definition at line 353 of file m32r.h.

Referenced by small_data_operand().

#define TARGET_SWITCHES

Value:

{                 \
/*  { "relax",      TARGET_RELAX_MASK, "" },    \
    { "no-relax",   -TARGET_RELAX_MASK, "" },*/   \
    { "debug",      TARGET_DEBUG_MASK,      \
  N_("Display compile time statistics") },      \
    { "align-loops",    TARGET_ALIGN_LOOPS_MASK,    \
  N_("Align all loops to 32 byte boundary") },      \
    { "no-align-loops",   -TARGET_ALIGN_LOOPS_MASK, "" },   \
    { "issue-rate=1",   TARGET_LOW_ISSUE_RATE_MASK,     \
  N_("Only issue one instruction per cycle") },     \
    { "issue-rate=2",   -TARGET_LOW_ISSUE_RATE_MASK, "" },  \
    { "branch-cost=1",    TARGET_BRANCH_COST_MASK,    \
  N_("Prefer branches over conditional execution") },   \
    { "branch-cost=2",    -TARGET_BRANCH_COST_MASK, "" },   \
    SUBTARGET_SWITCHES              \
    { "", TARGET_DEFAULT, "" }            \
}

Definition at line 236 of file m32r.h.

#define TARGET_VERSION   fprintf (stderr, " (m32r/x)");

Definition at line 46 of file m32r.h.

#define TEXT_SECTION_ASM_OP   "\t.section .text"

Definition at line 1537 of file m32r.h.

#define TRAMPOLINE_SIZE   12

Definition at line 1269 of file m32r.h.

#define TRULY_NOOP_TRUNCATION ( OUTPREC,
INPREC   )     1

Definition at line 2001 of file m32r.h.

#define UINT16_P ( X   )     (((unsigned HOST_WIDE_INT) (X)) <= 0x0000ffff)

Definition at line 803 of file m32r.h.

Referenced by reg_or_eq_int16_operand(), reg_or_uint16_operand(), and uint16_operand().

#define UINT24_P ( X   )     (((unsigned HOST_WIDE_INT) (X)) <= 0x00ffffff)

Definition at line 804 of file m32r.h.

Referenced by addr24_operand(), and two_insn_const_operand().

#define UINT32_P ( X   )     (((unsigned HOST_WIDE_INT) (X)) <= 0xffffffff)

Definition at line 805 of file m32r.h.

#define UINT5_P ( X   )     ((X) >= 0 && (X) < 32)

Definition at line 806 of file m32r.h.

#define UNITS_PER_WORD   4

Definition at line 453 of file m32r.h.

#define UPPER16_P ( X   ) 

Value:

(((X) & 0xffff) == 0        \
          && ((X) >> 16) >= -0x8000       \
          && ((X) >> 16) <= 0x7fff)

Definition at line 800 of file m32r.h.

Referenced by two_insn_const_operand().

#define USER_LABEL_PREFIX   ""

Definition at line 1852 of file m32r.h.

#define WCHAR_TYPE   "short unsigned int"

Definition at line 538 of file m32r.h.

#define WCHAR_TYPE_SIZE   16

Definition at line 539 of file m32r.h.

#define WORD_REGISTER_OPERATIONS

Definition at line 1983 of file m32r.h.

#define WORDS_BIG_ENDIAN   1

Definition at line 435 of file m32r.h.

Enumeration Type Documentation

enum m32r_function_type

Enumerator:
M32R_FUNCTION_UNKNOWN 
M32R_FUNCTION_NORMAL 
M32R_FUNCTION_INTERRUPT 
M32R_FUNCTION_UNKNOWN 
M32R_FUNCTION_NORMAL 
M32R_FUNCTION_INTERRUPT 
M32R_FUNCTION_UNKNOWN 
M32R_FUNCTION_NORMAL 
M32R_FUNCTION_INTERRUPT 
M32R_FUNCTION_UNKNOWN 
M32R_FUNCTION_NORMAL 
M32R_FUNCTION_INTERRUPT 

Definition at line 2025 of file m32r.h.

enum m32r_model

Enumerator:
M32R_MODEL_SMALL 
M32R_MODEL_MEDIUM 
M32R_MODEL_LARGE 
M32R_MODEL_SMALL 
M32R_MODEL_MEDIUM 
M32R_MODEL_LARGE 
M32R_MODEL_SMALL 
M32R_MODEL_MEDIUM 
M32R_MODEL_LARGE 
M32R_MODEL_SMALL 
M32R_MODEL_MEDIUM 
M32R_MODEL_LARGE 

Definition at line 291 of file m32r.h.

enum m32r_sdata

Enumerator:
M32R_SDATA_NONE 
M32R_SDATA_SDATA 
M32R_SDATA_USE 
M32R_SDATA_NONE 
M32R_SDATA_SDATA 
M32R_SDATA_USE 
M32R_SDATA_NONE 
M32R_SDATA_SDATA 
M32R_SDATA_USE 
M32R_SDATA_NONE 
M32R_SDATA_SDATA 
M32R_SDATA_USE 

Definition at line 348 of file m32r.h.

enum reg_class

Enumerator:
NO_REGS 
R2 
R0_1 
INDEX_REGS 
BASE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LR0_REGS 
GENERAL_REGS 
BP_REGS 
FC_REGS 
CR_REGS 
Q_REGS 
SPECIAL_REGS 
ACCUM0_REGS 
ACCUM_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R24_REG 
R25_REG 
R27_REG 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LPCOUNT_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPU_REGS 
LO_REGS 
STACK_REG 
BASE_REGS 
HI_REGS 
CC_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
POINTER_X_REGS 
POINTER_Y_REGS 
POINTER_Z_REGS 
STACK_REG 
BASE_POINTER_REGS 
POINTER_REGS 
ADDW_REGS 
SIMPLE_LD_REGS 
LD_REGS 
NO_LD_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0R1_REGS 
R2R3_REGS 
EXT_LOW_REGS 
EXT_REGS 
ADDR_REGS 
INDEX_REGS 
BK_REG 
SP_REG 
RC_REG 
COUNTER_REGS 
INT_REGS 
GENERAL_REGS 
DP_REG 
ST_REG 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
S_REGS 
INDEX_REGS 
SP_REGS 
A_REGS 
SI_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
REPEAT_REGS 
CR_REGS 
ACCUM_REGS 
OTHER_FLAG_REGS 
F0_REGS 
F1_REGS 
BR_FLAG_REGS 
FLAG_REGS 
EVEN_REGS 
GPR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
A0H_REG 
A0L_REG 
A0_REG 
A1H_REG 
ACCUM_HIGH_REGS 
A1L_REG 
ACCUM_LOW_REGS 
A1_REG 
ACCUM_REGS 
X_REG 
X_OR_ACCUM_LOW_REGS 
X_OR_ACCUM_REGS 
YH_REG 
YH_OR_ACCUM_HIGH_REGS 
X_OR_YH_REGS 
YL_REG 
YL_OR_ACCUM_LOW_REGS 
X_OR_YL_REGS 
X_OR_Y_REGS 
Y_REG 
ACCUM_OR_Y_REGS 
PH_REG 
X_OR_PH_REGS 
PL_REG 
PL_OR_ACCUM_LOW_REGS 
X_OR_PL_REGS 
YL_OR_PL_OR_ACCUM_LOW_REGS 
P_REG 
ACCUM_OR_P_REGS 
YL_OR_P_REGS 
ACCUM_LOW_OR_YL_OR_P_REGS 
Y_OR_P_REGS 
ACCUM_Y_OR_P_REGS 
NO_FRAME_Y_ADDR_REGS 
Y_ADDR_REGS 
ACCUM_LOW_OR_Y_ADDR_REGS 
ACCUM_OR_Y_ADDR_REGS 
X_OR_Y_ADDR_REGS 
Y_OR_Y_ADDR_REGS 
P_OR_Y_ADDR_REGS 
NON_HIGH_YBASE_ELIGIBLE_REGS 
YBASE_ELIGIBLE_REGS 
J_REG 
J_OR_DAU_16_BIT_REGS 
BMU_REGS 
NOHIGH_NON_ADDR_REGS 
NON_ADDR_REGS 
SLOW_MEM_LOAD_REGS 
NOHIGH_NON_YBASE_REGS 
NO_ACCUM_NON_YBASE_REGS 
NON_YBASE_REGS 
YBASE_VIRT_REGS 
ACCUM_LOW_OR_YBASE_REGS 
ACCUM_OR_YBASE_REGS 
X_OR_YBASE_REGS 
Y_OR_YBASE_REGS 
ACCUM_LOW_YL_PL_OR_YBASE_REGS 
P_OR_YBASE_REGS 
ACCUM_Y_P_OR_YBASE_REGS 
Y_ADDR_OR_YBASE_REGS 
YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS 
YBASE_OR_YBASE_ELIGIBLE_REGS 
NO_HIGH_ALL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MULTIPLY_32_REG 
MULTIPLY_64_REG 
LOW_REGS 
HIGH_REGS 
REAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
MAC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ADDR_REGS 
DATA_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AREG 
DREG 
CREG 
BREG 
SIREG 
DIREG 
AD_REGS 
Q_REGS 
NON_Q_REGS 
INDEX_REGS 
LEGACY_REGS 
GENERAL_REGS 
FP_TOP_REG 
FP_SECOND_REG 
FLOAT_REGS 
SSE_REGS 
MMX_REGS 
FP_TOP_SSE_REGS 
FP_SECOND_SSE_REGS 
FLOAT_SSE_REGS 
FLOAT_INT_REGS 
INT_SSE_REGS 
FLOAT_INT_SSE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GLOBAL_REGS 
LOCAL_REGS 
LOCAL_OR_GLOBAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
PR_REGS 
BR_REGS 
AR_M_REGS 
AR_I_REGS 
ADDL_REGS 
GR_REGS 
FR_REGS 
GR_AND_BR_REGS 
GR_AND_FR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CARRY_REG 
ACCUM_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
D_REGS 
X_REGS 
Y_REGS 
SP_REGS 
DA_REGS 
DB_REGS 
Z_REGS 
D8_REGS 
Q_REGS 
D_OR_X_REGS 
D_OR_Y_REGS 
D_OR_SP_REGS 
X_OR_Y_REGS 
A_REGS 
X_OR_SP_REGS 
Y_OR_SP_REGS 
X_OR_Y_OR_D_REGS 
A_OR_D_REGS 
A_OR_SP_REGS 
H_REGS 
S_REGS 
D_OR_S_REGS 
X_OR_S_REGS 
Y_OR_S_REGS 
SP_OR_S_REGS 
D_OR_X_OR_S_REGS 
D_OR_Y_OR_S_REGS 
D_OR_SP_OR_S_REGS 
A_OR_S_REGS 
D_OR_A_OR_S_REGS 
TMP_REGS 
D_OR_A_OR_TMP_REGS 
G_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDR_REGS 
FP_REGS 
GENERAL_REGS 
DATA_OR_FP_REGS 
ADDR_OR_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AP_REG 
XRF_REGS 
GENERAL_REGS 
AGRF_REGS 
XGRF_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ONLYR1_REGS 
LRW_REGS 
GENERAL_REGS 
C_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
REMAINDER_REG 
HIMULT_REG 
SYSTEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
SP_REGS 
DATA_OR_ADDRESS_REGS 
SP_OR_ADDRESS_REGS 
EXTENDED_REGS 
DATA_OR_EXTENDED_REGS 
ADDRESS_OR_EXTENDED_REGS 
SP_OR_EXTENDED_REGS 
SP_OR_ADDRESS_OR_EXTENDED_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REG0 
LONG_FLOAT_REG0 
FLOAT_REGS 
FP_REGS 
GEN_AND_FP_REGS 
FRAME_POINTER_REG 
STACK_POINTER_REG 
GEN_AND_MEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MUL_REGS 
GENERAL_REGS 
LOAD_FPU_REGS 
NO_LOAD_FPU_REGS 
FPU_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
OUT_REGS 
STD_REGS 
ARG_REGS 
SRC_REGS 
DST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R15_REGS 
BASE_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BASE_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALTIVEC_REGS 
VRSAVE_REGS 
NON_SPECIAL_REGS 
MQ_REGS 
LINK_REGS 
CTR_REGS 
LINK_OR_CTR_REGS 
SPECIAL_REGS 
SPEC_OR_GEN_REGS 
CR0_REGS 
CR_REGS 
NON_FLOAT_REGS 
XER_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ADDR_REGS 
GENERAL_REGS 
FP_REGS 
ADDR_FP_REGS 
GENERAL_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
PR_REGS 
T_REGS 
MAC_REGS 
FPUL_REGS 
SIBCALL_REGS 
GENERAL_REGS 
FP0_REGS 
FP_REGS 
DF_REGS 
FPSCR_REGS 
GENERAL_FP_REGS 
TARGET_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPCC_REGS 
I64_REGS 
GENERAL_REGS 
FP_REGS 
EXTRA_FP_REGS 
GENERAL_OR_FP_REGS 
GENERAL_OR_EXTRA_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R1_REGS 
TWO_REGS 
R2_REGS 
EIGHT_REGS 
R8_REGS 
ICALL_REGS 
GENERAL_REGS 
CARRY_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BR_REGS 
FP_REGS 
ACC_REG 
SP_REG 
RL_REGS 
GR_REGS 
AR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R2 
R0_1 
INDEX_REGS 
BASE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LR0_REGS 
GENERAL_REGS 
BP_REGS 
FC_REGS 
CR_REGS 
Q_REGS 
SPECIAL_REGS 
ACCUM0_REGS 
ACCUM_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R24_REG 
R25_REG 
R27_REG 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LPCOUNT_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPU_REGS 
LO_REGS 
STACK_REG 
BASE_REGS 
HI_REGS 
CC_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
POINTER_X_REGS 
POINTER_Y_REGS 
POINTER_Z_REGS 
STACK_REG 
BASE_POINTER_REGS 
POINTER_REGS 
ADDW_REGS 
SIMPLE_LD_REGS 
LD_REGS 
NO_LD_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0R1_REGS 
R2R3_REGS 
EXT_LOW_REGS 
EXT_REGS 
ADDR_REGS 
INDEX_REGS 
BK_REG 
SP_REG 
RC_REG 
COUNTER_REGS 
INT_REGS 
GENERAL_REGS 
DP_REG 
ST_REG 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
S_REGS 
INDEX_REGS 
SP_REGS 
A_REGS 
SI_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
REPEAT_REGS 
CR_REGS 
ACCUM_REGS 
OTHER_FLAG_REGS 
F0_REGS 
F1_REGS 
BR_FLAG_REGS 
FLAG_REGS 
EVEN_REGS 
GPR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
A0H_REG 
A0L_REG 
A0_REG 
A1H_REG 
ACCUM_HIGH_REGS 
A1L_REG 
ACCUM_LOW_REGS 
A1_REG 
ACCUM_REGS 
X_REG 
X_OR_ACCUM_LOW_REGS 
X_OR_ACCUM_REGS 
YH_REG 
YH_OR_ACCUM_HIGH_REGS 
X_OR_YH_REGS 
YL_REG 
YL_OR_ACCUM_LOW_REGS 
X_OR_YL_REGS 
X_OR_Y_REGS 
Y_REG 
ACCUM_OR_Y_REGS 
PH_REG 
X_OR_PH_REGS 
PL_REG 
PL_OR_ACCUM_LOW_REGS 
X_OR_PL_REGS 
YL_OR_PL_OR_ACCUM_LOW_REGS 
P_REG 
ACCUM_OR_P_REGS 
YL_OR_P_REGS 
ACCUM_LOW_OR_YL_OR_P_REGS 
Y_OR_P_REGS 
ACCUM_Y_OR_P_REGS 
NO_FRAME_Y_ADDR_REGS 
Y_ADDR_REGS 
ACCUM_LOW_OR_Y_ADDR_REGS 
ACCUM_OR_Y_ADDR_REGS 
X_OR_Y_ADDR_REGS 
Y_OR_Y_ADDR_REGS 
P_OR_Y_ADDR_REGS 
NON_HIGH_YBASE_ELIGIBLE_REGS 
YBASE_ELIGIBLE_REGS 
J_REG 
J_OR_DAU_16_BIT_REGS 
BMU_REGS 
NOHIGH_NON_ADDR_REGS 
NON_ADDR_REGS 
SLOW_MEM_LOAD_REGS 
NOHIGH_NON_YBASE_REGS 
NO_ACCUM_NON_YBASE_REGS 
NON_YBASE_REGS 
YBASE_VIRT_REGS 
ACCUM_LOW_OR_YBASE_REGS 
ACCUM_OR_YBASE_REGS 
X_OR_YBASE_REGS 
Y_OR_YBASE_REGS 
ACCUM_LOW_YL_PL_OR_YBASE_REGS 
P_OR_YBASE_REGS 
ACCUM_Y_P_OR_YBASE_REGS 
Y_ADDR_OR_YBASE_REGS 
YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS 
YBASE_OR_YBASE_ELIGIBLE_REGS 
NO_HIGH_ALL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MULTIPLY_32_REG 
MULTIPLY_64_REG 
LOW_REGS 
HIGH_REGS 
REAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
MAC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ADDR_REGS 
DATA_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AREG 
DREG 
CREG 
BREG 
SIREG 
DIREG 
AD_REGS 
Q_REGS 
NON_Q_REGS 
INDEX_REGS 
LEGACY_REGS 
GENERAL_REGS 
FP_TOP_REG 
FP_SECOND_REG 
FLOAT_REGS 
SSE_REGS 
MMX_REGS 
FP_TOP_SSE_REGS 
FP_SECOND_SSE_REGS 
FLOAT_SSE_REGS 
FLOAT_INT_REGS 
INT_SSE_REGS 
FLOAT_INT_SSE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GLOBAL_REGS 
LOCAL_REGS 
LOCAL_OR_GLOBAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
PR_REGS 
BR_REGS 
AR_M_REGS 
AR_I_REGS 
ADDL_REGS 
GR_REGS 
FR_REGS 
GR_AND_BR_REGS 
GR_AND_FR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CARRY_REG 
ACCUM_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
D_REGS 
X_REGS 
Y_REGS 
SP_REGS 
DA_REGS 
DB_REGS 
Z_REGS 
D8_REGS 
Q_REGS 
D_OR_X_REGS 
D_OR_Y_REGS 
D_OR_SP_REGS 
X_OR_Y_REGS 
A_REGS 
X_OR_SP_REGS 
Y_OR_SP_REGS 
X_OR_Y_OR_D_REGS 
A_OR_D_REGS 
A_OR_SP_REGS 
H_REGS 
S_REGS 
D_OR_S_REGS 
X_OR_S_REGS 
Y_OR_S_REGS 
SP_OR_S_REGS 
D_OR_X_OR_S_REGS 
D_OR_Y_OR_S_REGS 
D_OR_SP_OR_S_REGS 
A_OR_S_REGS 
D_OR_A_OR_S_REGS 
TMP_REGS 
D_OR_A_OR_TMP_REGS 
G_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDR_REGS 
FP_REGS 
GENERAL_REGS 
DATA_OR_FP_REGS 
ADDR_OR_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AP_REG 
XRF_REGS 
GENERAL_REGS 
AGRF_REGS 
XGRF_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ONLYR1_REGS 
LRW_REGS 
GENERAL_REGS 
C_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
REMAINDER_REG 
HIMULT_REG 
SYSTEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
SP_REGS 
DATA_OR_ADDRESS_REGS 
SP_OR_ADDRESS_REGS 
EXTENDED_REGS 
DATA_OR_EXTENDED_REGS 
ADDRESS_OR_EXTENDED_REGS 
SP_OR_EXTENDED_REGS 
SP_OR_ADDRESS_OR_EXTENDED_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REG0 
LONG_FLOAT_REG0 
FLOAT_REGS 
FP_REGS 
GEN_AND_FP_REGS 
FRAME_POINTER_REG 
STACK_POINTER_REG 
GEN_AND_MEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MUL_REGS 
GENERAL_REGS 
LOAD_FPU_REGS 
NO_LOAD_FPU_REGS 
FPU_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
OUT_REGS 
STD_REGS 
ARG_REGS 
SRC_REGS 
DST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R15_REGS 
BASE_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BASE_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALTIVEC_REGS 
VRSAVE_REGS 
NON_SPECIAL_REGS 
MQ_REGS 
LINK_REGS 
CTR_REGS 
LINK_OR_CTR_REGS 
SPECIAL_REGS 
SPEC_OR_GEN_REGS 
CR0_REGS 
CR_REGS 
NON_FLOAT_REGS 
XER_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ADDR_REGS 
GENERAL_REGS 
FP_REGS 
ADDR_FP_REGS 
GENERAL_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
PR_REGS 
T_REGS 
MAC_REGS 
FPUL_REGS 
SIBCALL_REGS 
GENERAL_REGS 
FP0_REGS 
FP_REGS 
DF_REGS 
FPSCR_REGS 
GENERAL_FP_REGS 
TARGET_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPCC_REGS 
I64_REGS 
GENERAL_REGS 
FP_REGS 
EXTRA_FP_REGS 
GENERAL_OR_FP_REGS 
GENERAL_OR_EXTRA_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R1_REGS 
TWO_REGS 
R2_REGS 
EIGHT_REGS 
R8_REGS 
ICALL_REGS 
GENERAL_REGS 
CARRY_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BR_REGS 
FP_REGS 
ACC_REG 
SP_REG 
RL_REGS 
GR_REGS 
AR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
R24_REG 
R25_REG 
R27_REG 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LPCOUNT_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPA_REGS 
CIRRUS_REGS 
VFP_REGS 
IWMMXT_GR_REGS 
IWMMXT_REGS 
LO_REGS 
STACK_REG 
BASE_REGS 
HI_REGS 
CC_REG 
VFPCC_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
POINTER_X_REGS 
POINTER_Y_REGS 
POINTER_Z_REGS 
STACK_REG 
BASE_POINTER_REGS 
POINTER_REGS 
ADDW_REGS 
SIMPLE_LD_REGS 
LD_REGS 
NO_LD_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
IREGS 
BREGS 
LREGS 
MREGS 
CIRCREGS 
DAGREGS 
EVEN_AREGS 
ODD_AREGS 
AREGS 
CCREGS 
EVEN_DREGS 
ODD_DREGS 
DREGS 
PREGS_CLOBBERED 
PREGS 
DPREGS 
MOST_REGS 
PROLOGUE_REGS 
NON_A_CC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0R1_REGS 
R2R3_REGS 
EXT_LOW_REGS 
EXT_REGS 
ADDR_REGS 
INDEX_REGS 
BK_REG 
SP_REG 
RC_REG 
COUNTER_REGS 
INT_REGS 
GENERAL_REGS 
DP_REG 
ST_REG 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MULTIPLY_32_REG 
MULTIPLY_64_REG 
LOW_REGS 
HIGH_REGS 
REAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ICC_REGS 
FCC_REGS 
CC_REGS 
ICR_REGS 
FCR_REGS 
CR_REGS 
LCR_REG 
LR_REG 
GR8_REGS 
GR9_REGS 
GR89_REGS 
FDPIC_REGS 
FDPIC_FPTR_REGS 
FDPIC_CALL_REGS 
SPR_REGS 
QUAD_ACC_REGS 
EVEN_ACC_REGS 
ACC_REGS 
ACCG_REGS 
QUAD_FPR_REGS 
FEVEN_REGS 
FPR_REGS 
QUAD_REGS 
EVEN_REGS 
GPR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
COUNTER_REGS 
SOURCE_REGS 
DESTINATION_REGS 
GENERAL_REGS 
MAC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AREG 
DREG 
CREG 
BREG 
SIREG 
DIREG 
AD_REGS 
Q_REGS 
NON_Q_REGS 
INDEX_REGS 
LEGACY_REGS 
GENERAL_REGS 
FP_TOP_REG 
FP_SECOND_REG 
FLOAT_REGS 
SSE_REGS 
MMX_REGS 
FP_TOP_SSE_REGS 
FP_SECOND_SSE_REGS 
FLOAT_SSE_REGS 
FLOAT_INT_REGS 
INT_SSE_REGS 
FLOAT_INT_SSE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
PR_REGS 
BR_REGS 
AR_M_REGS 
AR_I_REGS 
ADDL_REGS 
GR_REGS 
FR_REGS 
GR_AND_BR_REGS 
GR_AND_FR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DPH_REGS 
DPL_REGS 
DP_REGS 
SP_REGS 
IPH_REGS 
IPL_REGS 
IP_REGS 
DP_SP_REGS 
PTR_REGS 
NONPTR_REGS 
NONSP_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CARRY_REG 
ACCUM_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
D_REGS 
X_REGS 
Y_REGS 
SP_REGS 
DA_REGS 
DB_REGS 
Z_REGS 
D8_REGS 
Q_REGS 
D_OR_X_REGS 
D_OR_Y_REGS 
D_OR_SP_REGS 
X_OR_Y_REGS 
A_REGS 
X_OR_SP_REGS 
Y_OR_SP_REGS 
X_OR_Y_OR_D_REGS 
A_OR_D_REGS 
A_OR_SP_REGS 
H_REGS 
S_REGS 
D_OR_S_REGS 
X_OR_S_REGS 
Y_OR_S_REGS 
Z_OR_S_REGS 
SP_OR_S_REGS 
D_OR_X_OR_S_REGS 
D_OR_Y_OR_S_REGS 
D_OR_SP_OR_S_REGS 
A_OR_S_REGS 
D_OR_A_OR_S_REGS 
TMP_REGS 
D_OR_A_OR_TMP_REGS 
G_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDR_REGS 
FP_REGS 
GENERAL_REGS 
DATA_OR_FP_REGS 
ADDR_OR_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ONLYR1_REGS 
LRW_REGS 
GENERAL_REGS 
C_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
PIC_FN_ADDR_REG 
LEA_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
REMAINDER_REG 
HIMULT_REG 
SYSTEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
SP_REGS 
DATA_OR_ADDRESS_REGS 
SP_OR_ADDRESS_REGS 
EXTENDED_REGS 
DATA_OR_EXTENDED_REGS 
ADDRESS_OR_EXTENDED_REGS 
SP_OR_EXTENDED_REGS 
SP_OR_ADDRESS_OR_EXTENDED_REGS 
FP_REGS 
FP_ACC_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REG0 
LONG_FLOAT_REG0 
FLOAT_REGS 
LONG_REGS 
FP_REGS 
GEN_AND_FP_REGS 
FRAME_POINTER_REG 
STACK_POINTER_REG 
GEN_AND_MEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MUL_REGS 
GENERAL_REGS 
LOAD_FPU_REGS 
NO_LOAD_FPU_REGS 
FPU_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BASE_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALTIVEC_REGS 
VRSAVE_REGS 
VSCR_REGS 
SPE_ACC_REGS 
SPEFSCR_REGS 
NON_SPECIAL_REGS 
MQ_REGS 
LINK_REGS 
CTR_REGS 
LINK_OR_CTR_REGS 
SPECIAL_REGS 
SPEC_OR_GEN_REGS 
CR0_REGS 
CR_REGS 
NON_FLOAT_REGS 
XER_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CC_REGS 
ADDR_REGS 
GENERAL_REGS 
ACCESS_REGS 
ADDR_CC_REGS 
GENERAL_CC_REGS 
FP_REGS 
ADDR_FP_REGS 
GENERAL_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
PR_REGS 
T_REGS 
MAC_REGS 
FPUL_REGS 
SIBCALL_REGS 
GENERAL_REGS 
FP0_REGS 
FP_REGS 
DF_HI_REGS 
DF_REGS 
FPSCR_REGS 
GENERAL_FP_REGS 
TARGET_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPCC_REGS 
I64_REGS 
GENERAL_REGS 
FP_REGS 
EXTRA_FP_REGS 
GENERAL_OR_FP_REGS 
GENERAL_OR_EXTRA_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R1_REGS 
TWO_REGS 
R2_REGS 
EIGHT_REGS 
R8_REGS 
ICALL_REGS 
GENERAL_REGS 
CARRY_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BR_REGS 
FP_REGS 
ACC_REG 
SP_REG 
RL_REGS 
GR_REGS 
AR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
R24_REG 
R25_REG 
R27_REG 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LPCOUNT_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPA_REGS 
CIRRUS_REGS 
VFP_REGS 
IWMMXT_GR_REGS 
IWMMXT_REGS 
LO_REGS 
STACK_REG 
BASE_REGS 
HI_REGS 
CC_REG 
VFPCC_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
POINTER_X_REGS 
POINTER_Y_REGS 
POINTER_Z_REGS 
STACK_REG 
BASE_POINTER_REGS 
POINTER_REGS 
ADDW_REGS 
SIMPLE_LD_REGS 
LD_REGS 
NO_LD_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
IREGS 
BREGS 
LREGS 
MREGS 
CIRCREGS 
DAGREGS 
EVEN_AREGS 
ODD_AREGS 
AREGS 
CCREGS 
EVEN_DREGS 
ODD_DREGS 
DREGS 
FDPIC_REGS 
FDPIC_FPTR_REGS 
PREGS_CLOBBERED 
PREGS 
IPREGS 
DPREGS 
MOST_REGS 
LT_REGS 
LC_REGS 
LB_REGS 
PROLOGUE_REGS 
NON_A_CC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0R1_REGS 
R2R3_REGS 
EXT_LOW_REGS 
EXT_REGS 
ADDR_REGS 
INDEX_REGS 
BK_REG 
SP_REG 
RC_REG 
COUNTER_REGS 
INT_REGS 
GENERAL_REGS 
DP_REG 
ST_REG 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MOF_REGS 
CC0_REGS 
SPECIAL_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LO_REGS 
HI_REGS 
HILO_REGS 
NOSP_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MULTIPLY_32_REG 
MULTIPLY_64_REG 
LOW_REGS 
HIGH_REGS 
REAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ICC_REGS 
FCC_REGS 
CC_REGS 
ICR_REGS 
FCR_REGS 
CR_REGS 
LCR_REG 
LR_REG 
GR8_REGS 
GR9_REGS 
GR89_REGS 
FDPIC_REGS 
FDPIC_FPTR_REGS 
FDPIC_CALL_REGS 
SPR_REGS 
QUAD_ACC_REGS 
EVEN_ACC_REGS 
ACC_REGS 
ACCG_REGS 
QUAD_FPR_REGS 
FEVEN_REGS 
FPR_REGS 
QUAD_REGS 
EVEN_REGS 
GPR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
COUNTER_REGS 
SOURCE_REGS 
DESTINATION_REGS 
GENERAL_REGS 
MAC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AREG 
DREG 
CREG 
BREG 
SIREG 
DIREG 
AD_REGS 
Q_REGS 
NON_Q_REGS 
INDEX_REGS 
LEGACY_REGS 
GENERAL_REGS 
FP_TOP_REG 
FP_SECOND_REG 
FLOAT_REGS 
SSE_REGS 
MMX_REGS 
FP_TOP_SSE_REGS 
FP_SECOND_SSE_REGS 
FLOAT_SSE_REGS 
FLOAT_INT_REGS 
INT_SSE_REGS 
FLOAT_INT_SSE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
PR_REGS 
BR_REGS 
AR_M_REGS 
AR_I_REGS 
ADDL_REGS 
GR_REGS 
FP_REGS 
FR_REGS 
GR_AND_BR_REGS 
GR_AND_FR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
SP_REGS 
FB_REGS 
SB_REGS 
CR_REGS 
R0_REGS 
R1_REGS 
R2_REGS 
R3_REGS 
R02_REGS 
HL_REGS 
QI_REGS 
R23_REGS 
R03_REGS 
DI_REGS 
A0_REGS 
A1_REGS 
A_REGS 
AD_REGS 
PS_REGS 
SI_REGS 
HI_REGS 
RA_REGS 
GENERAL_REGS 
FLG_REGS 
HC_REGS 
MEM_REGS 
R02_A_MEM_REGS 
A_HL_MEM_REGS 
R1_R3_A_MEM_REGS 
R03_MEM_REGS 
A_HI_MEM_REGS 
A_AD_CR_MEM_SI_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CARRY_REG 
ACCUM_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
D_REGS 
X_REGS 
Y_REGS 
SP_REGS 
DA_REGS 
DB_REGS 
Z_REGS 
D8_REGS 
Q_REGS 
D_OR_X_REGS 
D_OR_Y_REGS 
D_OR_SP_REGS 
X_OR_Y_REGS 
A_REGS 
X_OR_SP_REGS 
Y_OR_SP_REGS 
X_OR_Y_OR_D_REGS 
A_OR_D_REGS 
A_OR_SP_REGS 
H_REGS 
S_REGS 
D_OR_S_REGS 
X_OR_S_REGS 
Y_OR_S_REGS 
Z_OR_S_REGS 
SP_OR_S_REGS 
D_OR_X_OR_S_REGS 
D_OR_Y_OR_S_REGS 
D_OR_SP_OR_S_REGS 
A_OR_S_REGS 
D_OR_A_OR_S_REGS 
TMP_REGS 
D_OR_A_OR_TMP_REGS 
G_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDR_REGS 
FP_REGS 
GENERAL_REGS 
DATA_OR_FP_REGS 
ADDR_OR_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ONLYR1_REGS 
LRW_REGS 
GENERAL_REGS 
C_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
PIC_FN_ADDR_REG 
V1_REG 
LEA_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
DSP_ACC_REGS 
ACC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
REMAINDER_REG 
HIMULT_REG 
SYSTEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
SP_REGS 
DATA_OR_ADDRESS_REGS 
SP_OR_ADDRESS_REGS 
EXTENDED_REGS 
DATA_OR_EXTENDED_REGS 
ADDRESS_OR_EXTENDED_REGS 
SP_OR_EXTENDED_REGS 
SP_OR_ADDRESS_OR_EXTENDED_REGS 
FP_REGS 
FP_ACC_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MUL_REGS 
GENERAL_REGS 
LOAD_FPU_REGS 
NO_LOAD_FPU_REGS 
FPU_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BASE_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALTIVEC_REGS 
VRSAVE_REGS 
VSCR_REGS 
SPE_ACC_REGS 
SPEFSCR_REGS 
NON_SPECIAL_REGS 
MQ_REGS 
LINK_REGS 
CTR_REGS 
LINK_OR_CTR_REGS 
SPECIAL_REGS 
SPEC_OR_GEN_REGS 
CR0_REGS 
CR_REGS 
NON_FLOAT_REGS 
XER_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CC_REGS 
ADDR_REGS 
GENERAL_REGS 
ACCESS_REGS 
ADDR_CC_REGS 
GENERAL_CC_REGS 
FP_REGS 
ADDR_FP_REGS 
GENERAL_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
G16_REGS 
G32_REGS 
T32_REGS 
HI_REG 
LO_REG 
CE_REGS 
CN_REG 
LC_REG 
SC_REG 
SP_REGS 
CR_REGS 
CP1_REGS 
CP2_REGS 
CP3_REGS 
CPA_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
PR_REGS 
T_REGS 
MAC_REGS 
FPUL_REGS 
SIBCALL_REGS 
GENERAL_REGS 
FP0_REGS 
FP_REGS 
DF_HI_REGS 
DF_REGS 
FPSCR_REGS 
GENERAL_FP_REGS 
GENERAL_DF_REGS 
TARGET_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPCC_REGS 
I64_REGS 
GENERAL_REGS 
FP_REGS 
EXTRA_FP_REGS 
GENERAL_OR_FP_REGS 
GENERAL_OR_EXTRA_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R1_REGS 
TWO_REGS 
R2_REGS 
EIGHT_REGS 
R8_REGS 
ICALL_REGS 
GENERAL_REGS 
CARRY_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BR_REGS 
FP_REGS 
ACC_REG 
SP_REG 
RL_REGS 
GR_REGS 
AR_REGS 
ALL_REGS 
LIM_REG_CLASSES 

Definition at line 697 of file m32r.h.

Variable Documentation

int g_switch_set

Definition at line 371 of file toplev.c.

Referenced by common_handle_option(), frv_override_options(), ia64_override_options(), m32r_init(), override_options(), and score_override_options().

int g_switch_value

Definition at line 90 of file ldmain.c.

struct rtx_def* m32r_compare_op0

Definition at line 45 of file m32r.c.

struct rtx_def* m32r_compare_op1

Definition at line 45 of file m32r.c.

unsigned int m32r_hard_regno_mode_ok[FIRST_PSEUDO_REGISTER]

Definition at line 175 of file m32r.c.

unsigned int m32r_mode_class[]

Definition at line 182 of file m32r.c.

enum m32r_model m32r_model

Definition at line 52 of file m32r.c.

const char* m32r_model_string

Definition at line 51 of file m32r.c.

char m32r_punct_chars[256]

Definition at line 48 of file m32r.c.

enum reg_class m32r_regno_reg_class[FIRST_PSEUDO_REGISTER]

Definition at line 184 of file m32r.c.

enum m32r_sdata m32r_sdata

Definition at line 56 of file m32r.c.

const char* m32r_sdata_string

Definition at line 55 of file m32r.c.

int target_flags

Definition at line 35 of file gensupport.c.

Generated on Wed Apr 8 14:59:30 2009 for Open64 by  doxygen 1.5.6