osprey/kg++fe/gnu/config/arm/arm.h File Reference

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Data Types
type	arm_cpu_select
type	machine_function
type	CUMULATIVE_ARGS
Defines
#define	TARGET_CPU_arm2   0x0000
#define	TARGET_CPU_arm250   0x0000
#define	TARGET_CPU_arm3   0x0000
#define	TARGET_CPU_arm6   0x0001
#define	TARGET_CPU_arm600   0x0001
#define	TARGET_CPU_arm610   0x0002
#define	TARGET_CPU_arm7   0x0001
#define	TARGET_CPU_arm7m   0x0004
#define	TARGET_CPU_arm7dm   0x0004
#define	TARGET_CPU_arm7dmi   0x0004
#define	TARGET_CPU_arm700   0x0001
#define	TARGET_CPU_arm710   0x0002
#define	TARGET_CPU_arm7100   0x0002
#define	TARGET_CPU_arm7500   0x0002
#define	TARGET_CPU_arm7500fe   0x1001
#define	TARGET_CPU_arm7tdmi   0x0008
#define	TARGET_CPU_arm8   0x0010
#define	TARGET_CPU_arm810   0x0020
#define	TARGET_CPU_strongarm   0x0040
#define	TARGET_CPU_strongarm110   0x0040
#define	TARGET_CPU_strongarm1100   0x0040
#define	TARGET_CPU_arm9   0x0080
#define	TARGET_CPU_arm9tdmi   0x0080
#define	TARGET_CPU_xscale   0x0100
#define	TARGET_CPU_generic   0x8000
#define	ARM_INVERSE_CONDITION_CODE(X)   ((arm_cc) (((int)X) ^ 1))
#define	TARGET_CPU_DEFAULT   TARGET_CPU_generic
#define	TARGET_CPU_DEFAULT   TARGET_CPU_arm6
#define	CPP_ARCH_DEFAULT_SPEC   "-D__ARM_ARCH_3__"
#define	CPP_SPEC   "\%(cpp_cpu_arch) %(cpp_apcs_pc) %(cpp_float) \%(cpp_endian) %(subtarget_cpp_spec) %(cpp_isa) %(cpp_interwork)"
#define	CPP_ISA_SPEC   "%{mthumb:-D__thumb__} %{!mthumb:-D__arm__}"
#define	CPP_CPU_ARCH_SPEC   "\-Acpu=arm -Amachine=arm \%{march=arm2:-D__ARM_ARCH_2__} \%{march=arm250:-D__ARM_ARCH_2__} \%{march=arm3:-D__ARM_ARCH_2__} \%{march=arm6:-D__ARM_ARCH_3__} \%{march=arm600:-D__ARM_ARCH_3__} \%{march=arm610:-D__ARM_ARCH_3__} \%{march=arm7:-D__ARM_ARCH_3__} \%{march=arm700:-D__ARM_ARCH_3__} \%{march=arm710:-D__ARM_ARCH_3__} \%{march=arm720:-D__ARM_ARCH_3__} \%{march=arm7100:-D__ARM_ARCH_3__} \%{march=arm7500:-D__ARM_ARCH_3__} \%{march=arm7500fe:-D__ARM_ARCH_3__} \%{march=arm7m:-D__ARM_ARCH_3M__} \%{march=arm7dm:-D__ARM_ARCH_3M__} \%{march=arm7dmi:-D__ARM_ARCH_3M__} \%{march=arm7tdmi:-D__ARM_ARCH_4T__} \%{march=arm8:-D__ARM_ARCH_4__} \%{march=arm810:-D__ARM_ARCH_4__} \%{march=arm9:-D__ARM_ARCH_4T__} \%{march=arm920:-D__ARM_ARCH_4__} \%{march=arm920t:-D__ARM_ARCH_4T__} \%{march=arm9tdmi:-D__ARM_ARCH_4T__} \%{march=strongarm:-D__ARM_ARCH_4__} \%{march=strongarm110:-D__ARM_ARCH_4__} \%{march=strongarm1100:-D__ARM_ARCH_4__} \%{march=xscale:-D__ARM_ARCH_5TE__} \%{march=xscale:-D__XSCALE__} \%{march=armv2:-D__ARM_ARCH_2__} \%{march=armv2a:-D__ARM_ARCH_2__} \%{march=armv3:-D__ARM_ARCH_3__} \%{march=armv3m:-D__ARM_ARCH_3M__} \%{march=armv4:-D__ARM_ARCH_4__} \%{march=armv4t:-D__ARM_ARCH_4T__} \%{march=armv5:-D__ARM_ARCH_5__} \%{march=armv5t:-D__ARM_ARCH_5T__} \%{march=armv5e:-D__ARM_ARCH_5E__} \%{march=armv5te:-D__ARM_ARCH_5TE__} \%{!march=*: \ %{mcpu=arm2:-D__ARM_ARCH_2__} \ %{mcpu=arm250:-D__ARM_ARCH_2__} \ %{mcpu=arm3:-D__ARM_ARCH_2__} \ %{mcpu=arm6:-D__ARM_ARCH_3__} \ %{mcpu=arm600:-D__ARM_ARCH_3__} \ %{mcpu=arm610:-D__ARM_ARCH_3__} \ %{mcpu=arm7:-D__ARM_ARCH_3__} \ %{mcpu=arm700:-D__ARM_ARCH_3__} \ %{mcpu=arm710:-D__ARM_ARCH_3__} \ %{mcpu=arm720:-D__ARM_ARCH_3__} \ %{mcpu=arm7100:-D__ARM_ARCH_3__} \ %{mcpu=arm7500:-D__ARM_ARCH_3__} \ %{mcpu=arm7500fe:-D__ARM_ARCH_3__} \ %{mcpu=arm7m:-D__ARM_ARCH_3M__} \ %{mcpu=arm7dm:-D__ARM_ARCH_3M__} \ %{mcpu=arm7dmi:-D__ARM_ARCH_3M__} \ %{mcpu=arm7tdmi:-D__ARM_ARCH_4T__} \ %{mcpu=arm8:-D__ARM_ARCH_4__} \ %{mcpu=arm810:-D__ARM_ARCH_4__} \ %{mcpu=arm9:-D__ARM_ARCH_4T__} \ %{mcpu=arm920:-D__ARM_ARCH_4__} \ %{mcpu=arm920t:-D__ARM_ARCH_4T__} \ %{mcpu=arm9tdmi:-D__ARM_ARCH_4T__} \ %{mcpu=strongarm:-D__ARM_ARCH_4__} \ %{mcpu=strongarm110:-D__ARM_ARCH_4__} \ %{mcpu=strongarm1100:-D__ARM_ARCH_4__} \ %{mcpu=xscale:-D__ARM_ARCH_5TE__} \ %{mcpu=xscale:-D__XSCALE__} \ %{!mcpu*:%(cpp_cpu_arch_default)}} \"
#define	CPP_APCS_PC_SPEC   "\%{mapcs-32:%{mapcs-26:%e-mapcs-26 and -mapcs-32 may not be used together} \ -D__APCS_32__} \%{mapcs-26:-D__APCS_26__} \%{!mapcs-32: %{!mapcs-26:%(cpp_apcs_pc_default)}} \"
#define	CPP_APCS_PC_DEFAULT_SPEC   "-D__APCS_26__"
#define	CPP_FLOAT_SPEC   "\%{msoft-float:\ %{mhard-float:%e-msoft-float and -mhard_float may not be used together} \ -D__SOFTFP__} \%{!mhard-float:%{!msoft-float:%(cpp_float_default)}} \"
#define	CPP_FLOAT_DEFAULT_SPEC   ""
#define	CPP_ENDIAN_SPEC   "\%{mbig-endian: \ %{mlittle-endian: \ %e-mbig-endian and -mlittle-endian may not be used together} \ -D__ARMEB__ %{mwords-little-endian:-D__ARMWEL__} %{mthumb:-D__THUMBEB__}}\%{mlittle-endian:-D__ARMEL__ %{mthumb:-D__THUMBEL__}} \%{!mlittle-endian:%{!mbig-endian:%(cpp_endian_default)}} \"
#define	CPP_ENDIAN_DEFAULT_SPEC   "-D__ARMEL__ %{mthumb:-D__THUMBEL__}"
#define	CPP_INTERWORK_DEFAULT_SPEC   ""
#define	CPP_INTERWORK_SPEC   " \%{mthumb-interwork: \ %{mno-thumb-interwork: %eincompatible interworking options} \ -D__THUMB_INTERWORK__} \%{!mthumb-interwork:%{!mno-thumb-interwork:%(cpp_interwork_default)}} \"
#define	CPP_PREDEFINES   ""
#define	CC1_SPEC   ""
#define	EXTRA_SPECS
#define	SUBTARGET_CPP_SPEC   ""
#define	TARGET_VERSION   fputs (" (ARM/generic)", stderr);
#define	ARM_FLAG_APCS_FRAME   (1 << 0)
#define	ARM_FLAG_POKE   (1 << 1)
#define	ARM_FLAG_FPE   (1 << 2)
#define	ARM_FLAG_APCS_32   (1 << 3)
#define	ARM_FLAG_APCS_STACK   (1 << 4)
#define	ARM_FLAG_APCS_FLOAT   (1 << 5)
#define	ARM_FLAG_APCS_REENT   (1 << 6)
#define	ARM_FLAG_MMU_TRAPS   (1 << 7)
#define	ARM_FLAG_SOFT_FLOAT   (1 << 8)
#define	ARM_FLAG_BIG_END   (1 << 9)
#define	ARM_FLAG_INTERWORK   (1 << 10)
#define	ARM_FLAG_LITTLE_WORDS   (1 << 11)
#define	ARM_FLAG_NO_SCHED_PRO   (1 << 12)
#define	ARM_FLAG_ABORT_NORETURN   (1 << 13)
#define	ARM_FLAG_SINGLE_PIC_BASE   (1 << 14)
#define	ARM_FLAG_LONG_CALLS   (1 << 15)
#define	ARM_FLAG_THUMB   (1 << 16)
#define	THUMB_FLAG_BACKTRACE   (1 << 17)
#define	THUMB_FLAG_LEAF_BACKTRACE   (1 << 18)
#define	THUMB_FLAG_CALLEE_SUPER_INTERWORKING   (1 << 19)
#define	THUMB_FLAG_CALLER_SUPER_INTERWORKING   (1 << 20)
#define	TARGET_APCS_FRAME   (target_flags & ARM_FLAG_APCS_FRAME)
#define	TARGET_POKE_FUNCTION_NAME   (target_flags & ARM_FLAG_POKE)
#define	TARGET_FPE   (target_flags & ARM_FLAG_FPE)
#define	TARGET_APCS_32   (target_flags & ARM_FLAG_APCS_32)
#define	TARGET_APCS_STACK   (target_flags & ARM_FLAG_APCS_STACK)
#define	TARGET_APCS_FLOAT   (target_flags & ARM_FLAG_APCS_FLOAT)
#define	TARGET_APCS_REENT   (target_flags & ARM_FLAG_APCS_REENT)
#define	TARGET_MMU_TRAPS   (target_flags & ARM_FLAG_MMU_TRAPS)
#define	TARGET_SOFT_FLOAT   (target_flags & ARM_FLAG_SOFT_FLOAT)
#define	TARGET_HARD_FLOAT   (! TARGET_SOFT_FLOAT)
#define	TARGET_BIG_END   (target_flags & ARM_FLAG_BIG_END)
#define	TARGET_INTERWORK   (target_flags & ARM_FLAG_INTERWORK)
#define	TARGET_LITTLE_WORDS   (target_flags & ARM_FLAG_LITTLE_WORDS)
#define	TARGET_NO_SCHED_PRO   (target_flags & ARM_FLAG_NO_SCHED_PRO)
#define	TARGET_ABORT_NORETURN   (target_flags & ARM_FLAG_ABORT_NORETURN)
#define	TARGET_SINGLE_PIC_BASE   (target_flags & ARM_FLAG_SINGLE_PIC_BASE)
#define	TARGET_LONG_CALLS   (target_flags & ARM_FLAG_LONG_CALLS)
#define	TARGET_THUMB   (target_flags & ARM_FLAG_THUMB)
#define	TARGET_ARM   (! TARGET_THUMB)
#define	TARGET_EITHER   1
#define	TARGET_CALLEE_INTERWORKING   (target_flags & THUMB_FLAG_CALLEE_SUPER_INTERWORKING)
#define	TARGET_CALLER_INTERWORKING   (target_flags & THUMB_FLAG_CALLER_SUPER_INTERWORKING)
#define	TARGET_BACKTRACE
#define	TARGET_SWITCHES
#define	TARGET_OPTIONS
#define	arm_prog_mode   ((enum attr_prog_mode) arm_prgmode)
#define	arm_fpu_attr   ((enum attr_fpu) arm_fpu)
#define	FP_DEFAULT   FP_SOFT2
#define	TARGET_DEFAULT   (ARM_FLAG_APCS_FRAME)
#define	CAN_DEBUG_WITHOUT_FP
#define	TARGET_MEM_FUNCTIONS   1
#define	OVERRIDE_OPTIONS   arm_override_options ()
#define	NEED_GOT_RELOC   0
#define	NEED_PLT_RELOC   0
#define	GOT_PCREL   1
#define	PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)
#define	PROMOTE_FUNCTION_ARGS
#define	ENABLE_XF_PATTERNS   0
#define	REAL_ARITHMETIC
#define	BITS_BIG_ENDIAN   0
#define	BYTES_BIG_ENDIAN   (TARGET_BIG_END != 0)
#define	WORDS_BIG_ENDIAN   (BYTES_BIG_ENDIAN && ! TARGET_LITTLE_WORDS)
#define	LIBGCC2_WORDS_BIG_ENDIAN   0
#define	FLOAT_WORDS_BIG_ENDIAN   1
#define	BITS_PER_UNIT   8
#define	BITS_PER_WORD   32
#define	UNITS_PER_WORD   4
#define	POINTER_SIZE   32
#define	PARM_BOUNDARY   32
#define	STACK_BOUNDARY   32
#define	FUNCTION_BOUNDARY   32
#define	TARGET_PTRMEMFUNC_VBIT_LOCATION   ptrmemfunc_vbit_in_delta
#define	EMPTY_FIELD_BOUNDARY   32
#define	BIGGEST_ALIGNMENT   32
#define	CONSTANT_ALIGNMENT_FACTOR   (TARGET_THUMB || ! arm_is_xscale ? 1 : 2)
#define	CONSTANT_ALIGNMENT(EXP, ALIGN)
#define	STRUCTURE_SIZE_BOUNDARY   arm_structure_size_boundary
#define	DEFAULT_STRUCTURE_SIZE_BOUNDARY   32
#define	STRICT_ALIGNMENT   1
#define	TARGET_FLOAT_FORMAT   IEEE_FLOAT_FORMAT
#define	FIXED_REGISTERS
#define	CALL_USED_REGISTERS
#define	CONDITIONAL_REGISTER_USAGE
#define	ASM_FPRINTF_EXTENSIONS(FILE, ARGS, P)
#define	ROUND_UP(X)   (((X) + 3) & ~3)
#define	NUM_INTS(X)   (((X) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
#define	NUM_REGS(MODE)   NUM_INTS (GET_MODE_SIZE (MODE))
#define	NUM_REGS2(MODE, TYPE)
#define	NUM_ARG_REGS   4
#define	ARG_REGISTER(N)   (N - 1)
#define	STRUCT_VALUE_REGNUM   ARG_REGISTER (1)
#define	LAST_ARG_REGNUM   ARG_REGISTER (NUM_ARG_REGS)
#define	LAST_LO_REGNUM   7
#define	EXCEPTION_LR_REGNUM   2
#define	STATIC_CHAIN_REGNUM   (TARGET_ARM ? 12 : 9)
#define	ARM_HARD_FRAME_POINTER_REGNUM   11
#define	THUMB_HARD_FRAME_POINTER_REGNUM   7
#define	HARD_FRAME_POINTER_REGNUM
#define	FP_REGNUM   HARD_FRAME_POINTER_REGNUM
#define	STACK_POINTER_REGNUM   SP_REGNUM
#define	FIRST_ARM_FP_REGNUM   16
#define	LAST_ARM_FP_REGNUM   23
#define	FRAME_POINTER_REGNUM   25
#define	ARG_POINTER_REGNUM   26
#define	FIRST_PSEUDO_REGISTER   27
#define	FRAME_POINTER_REQUIRED
#define	HARD_REGNO_NREGS(REGNO, MODE)
#define	HARD_REGNO_MODE_OK(REGNO, MODE)   arm_hard_regno_mode_ok ((REGNO), (MODE))
#define	MODES_TIEABLE_P(MODE1, MODE2)   (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
#define	REG_ALLOC_ORDER
#define	HARD_REGNO_RENAME_OK(SRC, DST)
#define	N_REG_CLASSES   (int) LIM_REG_CLASSES
#define	REG_CLASS_NAMES
#define	REG_CLASS_CONTENTS
#define	REGNO_REG_CLASS(REGNO)   arm_regno_class (REGNO)
#define	INDEX_REG_CLASS   (TARGET_THUMB ? LO_REGS : GENERAL_REGS)
#define	BASE_REG_CLASS   (TARGET_THUMB ? LO_REGS : GENERAL_REGS)
#define	MODE_BASE_REG_CLASS(MODE)
#define	SMALL_REGISTER_CLASSES   TARGET_THUMB
#define	REG_CLASS_FROM_LETTER(C)
#define	CONST_OK_FOR_ARM_LETTER(VALUE, C)
#define	CONST_OK_FOR_THUMB_LETTER(VAL, C)
#define	CONST_OK_FOR_LETTER_P(VALUE, C)
#define	CONST_DOUBLE_OK_FOR_ARM_LETTER(X, C)
#define	CONST_DOUBLE_OK_FOR_LETTER_P(X, C)
#define	EXTRA_CONSTRAINT_ARM(OP, C)
#define	EXTRA_CONSTRAINT_THUMB(X, C)
#define	EXTRA_CONSTRAINT(X, C)
#define	PREFERRED_RELOAD_CLASS(X, CLASS)
#define	THUMB_SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X)
#define	THUMB_SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X)
#define	SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X)
#define	SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X)
#define	ARM_LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND, WIN)
#define	THUMB_LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_LEVELS, WIN)
#define	LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_LEVELS, WIN)
#define	CLASS_MAX_NREGS(CLASS, MODE)   ((CLASS) == FPU_REGS ? 1 : NUM_REGS (MODE))
#define	REGISTER_MOVE_COST(MODE, FROM, TO)
#define	STACK_GROWS_DOWNWARD   1
#define	FRAME_GROWS_DOWNWARD   1
#define	STARTING_FRAME_OFFSET   0
#define	ACCUMULATE_OUTGOING_ARGS   1
#define	FIRST_PARM_OFFSET(FNDECL)   (TARGET_ARM ? 4 : 0)
#define	RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE)   0
#define	LIBCALL_VALUE(MODE)
#define	FUNCTION_VALUE(VALTYPE, FUNC)   LIBCALL_VALUE (TYPE_MODE (VALTYPE))
#define	FUNCTION_VALUE_REGNO_P(REGNO)
#define	RETURN_IN_MEMORY(TYPE)   arm_return_in_memory (TYPE)
#define	DEFAULT_PCC_STRUCT_RETURN   0
#define	CALL_NORMAL   0x00000000
#define	CALL_LONG   0x00000001
#define	CALL_SHORT   0x00000002
#define	ARM_FT_UNKNOWN   0
#define	ARM_FT_NORMAL   1
#define	ARM_FT_INTERWORKED   2
#define	ARM_FT_EXCEPTION_HANDLER   3
#define	ARM_FT_ISR   4
#define	ARM_FT_FIQ   5
#define	ARM_FT_EXCEPTION   6
#define	ARM_FT_TYPE_MASK   ((1 << 3) - 1)
#define	ARM_FT_INTERRUPT   (1 << 2)
#define	ARM_FT_NAKED   (1 << 3)
#define	ARM_FT_VOLATILE   (1 << 4)
#define	ARM_FT_NESTED   (1 << 5)
#define	ARM_FUNC_TYPE(t)   (t & ARM_FT_TYPE_MASK)
#define	IS_INTERRUPT(t)   (t & ARM_FT_INTERRUPT)
#define	IS_VOLATILE(t)   (t & ARM_FT_VOLATILE)
#define	IS_NAKED(t)   (t & ARM_FT_NAKED)
#define	IS_NESTED(t)   (t & ARM_FT_NESTED)
#define	FUNCTION_ARG(CUM, MODE, TYPE, NAMED)   arm_function_arg (&(CUM), (MODE), (TYPE), (NAMED))
#define	FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED)
#define	INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT)   arm_init_cumulative_args (&(CUM), (FNTYPE), (LIBNAME), (INDIRECT))
#define	FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)   (CUM).nregs += NUM_REGS2 (MODE, TYPE)
#define	FUNCTION_ARG_REGNO_P(REGNO)   (IN_RANGE ((REGNO), 0, 3))
#define	FUNCTION_OK_FOR_SIBCALL(DECL)   arm_function_ok_for_sibcall ((DECL))
#define	SETUP_INCOMING_VARARGS(CUM, MODE, TYPE, PRETEND_SIZE, NO_RTL)
#define	ARM_MCOUNT_NAME   "*mcount"
#define	ARM_FUNCTION_PROFILER(STREAM, LABELNO)
#define	THUMB_FUNCTION_PROFILER(STREAM, LABELNO)
#define	FUNCTION_PROFILER(STREAM, LABELNO)
#define	EXIT_IGNORE_STACK   1
#define	EPILOGUE_USES(REGNO)   (reload_completed && (REGNO) == LR_REGNUM)
#define	USE_RETURN_INSN(ISCOND)   (TARGET_ARM ? use_return_insn (ISCOND) : 0)
#define	ELIMINABLE_REGS
#define	CAN_ELIMINATE(FROM, TO)
#define	ARM_INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)
#define	THUMB_INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)
#define	INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)
#define	DEBUGGER_ARG_OFFSET(value, addr)   value ? value : arm_debugger_arg_offset (value, addr)
#define	INIT_EXPANDERS   arm_init_expanders ()
#define	ARM_TRAMPOLINE_TEMPLATE(FILE)
#define	THUMB_TRAMPOLINE_TEMPLATE(FILE)
#define	TRAMPOLINE_TEMPLATE(FILE)
#define	TRAMPOLINE_SIZE   (TARGET_ARM ? 16 : 24)
#define	TRAMPOLINE_ALIGNMENT   32
#define	INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT)
#define	HAVE_POST_INCREMENT   1
#define	HAVE_PRE_INCREMENT   TARGET_ARM
#define	HAVE_POST_DECREMENT   TARGET_ARM
#define	HAVE_PRE_DECREMENT   TARGET_ARM
#define	TEST_REGNO(R, TEST, VALUE)   ((R TEST VALUE) || ((unsigned) reg_renumber[R] TEST VALUE))
#define	ARM_REGNO_OK_FOR_BASE_P(REGNO)
#define	THUMB_REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE)
#define	REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE)
#define	REGNO_OK_FOR_INDEX_P(REGNO)   REGNO_MODE_OK_FOR_BASE_P (REGNO, QImode)
#define	MAX_REGS_PER_ADDRESS   2
#define	CONSTANT_ADDRESS_P(X)
#define	ARM_LEGITIMATE_CONSTANT_P(X)   (flag_pic || ! label_mentioned_p (X))
#define	THUMB_LEGITIMATE_CONSTANT_P(X)
#define	LEGITIMATE_CONSTANT_P(X)   (TARGET_ARM ? ARM_LEGITIMATE_CONSTANT_P (X) : THUMB_LEGITIMATE_CONSTANT_P (X))
#define	SHORT_CALL_FLAG_CHAR   '^'
#define	LONG_CALL_FLAG_CHAR   '#'
#define	ENCODED_SHORT_CALL_ATTR_P(SYMBOL_NAME)   (*(SYMBOL_NAME) == SHORT_CALL_FLAG_CHAR)
#define	ENCODED_LONG_CALL_ATTR_P(SYMBOL_NAME)   (*(SYMBOL_NAME) == LONG_CALL_FLAG_CHAR)
#define	ARM_NAME_ENCODING_LENGTHS
#define	STRIP_NAME_ENCODING(VAR, SYMBOL_NAME)   (VAR) = arm_strip_name_encoding (SYMBOL_NAME)
#define	ASM_OUTPUT_LABELREF(FILE, NAME)   asm_fprintf (FILE, "%U%s", arm_strip_name_encoding (NAME))
#define	ARM_ENCODE_CALL_TYPE(decl)
#define	ENCODE_SECTION_INFO(decl)
#define	ARM_DECLARE_FUNCTION_SIZE(STREAM, NAME, DECL)   arm_encode_call_attribute (DECL, SHORT_CALL_FLAG_CHAR)
#define	ARM_REG_OK_FOR_BASE_P(X)
#define	THUMB_REG_MODE_OK_FOR_BASE_P(X, MODE)
#define	REG_MODE_OK_FOR_BASE_P(X, MODE)
#define	ARM_REG_OK_FOR_INDEX_P(X)   ARM_REG_OK_FOR_BASE_P (X)
#define	THUMB_REG_OK_FOR_INDEX_P(X)   THUMB_REG_MODE_OK_FOR_BASE_P (X, QImode)
#define	REG_OK_FOR_INDEX_P(X)
#define	ARM_BASE_REGISTER_RTX_P(X)   (GET_CODE (X) == REG && ARM_REG_OK_FOR_BASE_P (X))
#define	ARM_INDEX_REGISTER_RTX_P(X)   (GET_CODE (X) == REG && ARM_REG_OK_FOR_INDEX_P (X))
#define	ARM_GO_IF_LEGITIMATE_INDEX(MODE, BASE_REGNO, INDEX, LABEL)
#define	ARM_GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL)
#define	THUMB_LEGITIMATE_OFFSET(MODE, VAL)
#define	THUMB_GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN)
#define	GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN)
#define	ARM_LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
#define	THUMB_LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
#define	LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
#define	ARM_GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
#define	GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
#define	CASE_VECTOR_MODE   Pmode
#define	DEFAULT_SIGNED_CHAR   0
#define	NO_RECURSIVE_FUNCTION_CSE   1
#define	MOVE_MAX   4
#define	MOVE_RATIO   (arm_is_xscale ? 4 : 2)
#define	WORD_REGISTER_OPERATIONS
#define	LOAD_EXTEND_OP(MODE)
#define	SLOW_BYTE_ACCESS   0
#define	SLOW_UNALIGNED_ACCESS(MODE, ALIGN)   1
#define	TRULY_NOOP_TRUNCATION(OUTPREC, INPREC)   1
#define	NO_FUNCTION_CSE   1
#define	PROMOTE_PROTOTYPES   1
#define	Pmode   SImode
#define	FUNCTION_MODE   Pmode
#define	ARM_FRAME_RTX(X)
#define	DEFAULT_RTX_COSTS(X, CODE, OUTER_CODE)   return arm_rtx_costs (X, CODE, OUTER_CODE);
#define	MEMORY_MOVE_COST(M, CLASS, IN)
#define	ARM_ADDRESS_COST(X)
#define	THUMB_ADDRESS_COST(X)
#define	ADDRESS_COST(X)   (TARGET_ARM ? ARM_ADDRESS_COST (X) : THUMB_ADDRESS_COST (X))
#define	BRANCH_COST   (TARGET_ARM ? 4 : (optimize > 1 ? 1 : 0))
#define	PIC_OFFSET_TABLE_REGNUM   arm_pic_register
#define	FINALIZE_PIC   arm_finalize_pic (1)
#define	LEGITIMATE_PIC_OPERAND_P(X)
#define	REGISTER_TARGET_PRAGMAS(PFILE)
#define	EXTRA_CC_MODES
#define	SELECT_CC_MODE(OP, X, Y)   arm_select_cc_mode (OP, X, Y)
#define	REVERSIBLE_CC_MODE(MODE)   ((MODE) != CCFPEmode)
#define	CANONICALIZE_COMPARISON(CODE, OP0, OP1)
#define	STORE_FLAG_VALUE   1
#define	MACHINE_DEPENDENT_REORG(INSN)   arm_reorg (INSN); \
#define	ASM_APP_OFF   (TARGET_THUMB ? "\t.code\t16\n" : "")
#define	ASM_OUTPUT_INTERNAL_LABEL(STREAM, PREFIX, NUM)
#define	ASM_OUTPUT_REG_PUSH(STREAM, REGNO)
#define	ASM_OUTPUT_REG_POP(STREAM, REGNO)
#define	ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, JUMPTABLE)
#define	ARM_DECLARE_FUNCTION_NAME(STREAM, NAME, DECL)
#define	ASM_OUTPUT_DEF_FROM_DECLS(FILE, DECL1, DECL2)
#define	FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS)
#define	PRINT_OPERAND_PUNCT_VALID_P(CODE)
#define	PRINT_OPERAND(STREAM, X, CODE)   arm_print_operand (STREAM, X, CODE)
#define	ARM_SIGN_EXTEND(x)
#define	ARM_PRINT_OPERAND_ADDRESS(STREAM, X)
#define	THUMB_PRINT_OPERAND_ADDRESS(STREAM, X)
#define	PRINT_OPERAND_ADDRESS(STREAM, X)
#define	ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION)
#define	RETURN_ADDR_RTX(COUNT, FRAME)   arm_return_addr (COUNT, FRAME)
#define	RETURN_ADDR_MASK26   (0x03fffffc)
#define	INCOMING_RETURN_ADDR_RTX   gen_rtx_REG (Pmode, LR_REGNUM)
#define	DWARF_FRAME_RETURN_COLUMN   DWARF_FRAME_REGNUM (LR_REGNUM)
#define	MASK_RETURN_ADDR
#define	PREDICATE_CODES
#define	SPECIAL_MODE_PREDICATES   "cc_register", "dominant_cc_register",
Typedefs
typedef enum arm_cond_code	arm_cc
Enumerations
enum	arm_cond_code {   ARM_EQ = 0, ARM_NE, ARM_CS, ARM_CC,   ARM_MI, ARM_PL, ARM_VS, ARM_VC,   ARM_HI, ARM_LS, ARM_GE, ARM_LT,   ARM_GT, ARM_LE, ARM_AL, ARM_NV,   ARM_EQ = 0, ARM_NE, ARM_CS, ARM_CC,   ARM_MI, ARM_PL, ARM_VS, ARM_VC,   ARM_HI, ARM_LS, ARM_GE, ARM_LT,   ARM_GT, ARM_LE, ARM_AL, ARM_NV,   ARM_EQ = 0, ARM_NE, ARM_CS, ARM_CC,   ARM_MI, ARM_PL, ARM_VS, ARM_VC,   ARM_HI, ARM_LS, ARM_GE, ARM_LT,   ARM_GT, ARM_LE, ARM_AL, ARM_NV,   ARM_EQ = 0, ARM_NE, ARM_CS, ARM_CC,   ARM_MI, ARM_PL, ARM_VS, ARM_VC,   ARM_HI, ARM_LS, ARM_GE, ARM_LT,   ARM_GT, ARM_LE, ARM_AL, ARM_NV }
enum	prog_mode_type { prog_mode26, prog_mode32, prog_mode26, prog_mode32 }
enum	floating_point_type {   FP_HARD, FP_SOFT2, FP_SOFT3, FP_HARD,   FP_SOFT2, FP_SOFT3 }
enum	reg_class {   NO_REGS, R2, R0_1, INDEX_REGS,   BASE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   LR0_REGS, GENERAL_REGS, BP_REGS, FC_REGS,   CR_REGS, Q_REGS, SPECIAL_REGS, ACCUM0_REGS,   ACCUM_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, R24_REG, R25_REG, R27_REG,   GENERAL_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, LPCOUNT_REG, GENERAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, FPU_REGS, LO_REGS,   STACK_REG, BASE_REGS, HI_REGS, CC_REG,   GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   R0_REG, POINTER_X_REGS, POINTER_Y_REGS, POINTER_Z_REGS,   STACK_REG, BASE_POINTER_REGS, POINTER_REGS, ADDW_REGS,   SIMPLE_LD_REGS, LD_REGS, NO_LD_REGS, GENERAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0R1_REGS,   R2R3_REGS, EXT_LOW_REGS, EXT_REGS, ADDR_REGS,   INDEX_REGS, BK_REG, SP_REG, RC_REG,   COUNTER_REGS, INT_REGS, GENERAL_REGS, DP_REG,   ST_REG, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   GENERAL_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, S_REGS, INDEX_REGS, SP_REGS,   A_REGS, SI_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   REPEAT_REGS, CR_REGS, ACCUM_REGS, OTHER_FLAG_REGS,   F0_REGS, F1_REGS, BR_FLAG_REGS, FLAG_REGS,   EVEN_REGS, GPR_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, A0H_REG, A0L_REG, A0_REG,   A1H_REG, ACCUM_HIGH_REGS, A1L_REG, ACCUM_LOW_REGS,   A1_REG, ACCUM_REGS, X_REG, X_OR_ACCUM_LOW_REGS,   X_OR_ACCUM_REGS, YH_REG, YH_OR_ACCUM_HIGH_REGS, X_OR_YH_REGS,   YL_REG, YL_OR_ACCUM_LOW_REGS, X_OR_YL_REGS, X_OR_Y_REGS,   Y_REG, ACCUM_OR_Y_REGS, PH_REG, X_OR_PH_REGS,   PL_REG, PL_OR_ACCUM_LOW_REGS, X_OR_PL_REGS, YL_OR_PL_OR_ACCUM_LOW_REGS,   P_REG, ACCUM_OR_P_REGS, YL_OR_P_REGS, ACCUM_LOW_OR_YL_OR_P_REGS,   Y_OR_P_REGS, ACCUM_Y_OR_P_REGS, NO_FRAME_Y_ADDR_REGS, Y_ADDR_REGS,   ACCUM_LOW_OR_Y_ADDR_REGS, ACCUM_OR_Y_ADDR_REGS, X_OR_Y_ADDR_REGS, Y_OR_Y_ADDR_REGS,   P_OR_Y_ADDR_REGS, NON_HIGH_YBASE_ELIGIBLE_REGS, YBASE_ELIGIBLE_REGS, J_REG,   J_OR_DAU_16_BIT_REGS, BMU_REGS, NOHIGH_NON_ADDR_REGS, NON_ADDR_REGS,   SLOW_MEM_LOAD_REGS, NOHIGH_NON_YBASE_REGS, NO_ACCUM_NON_YBASE_REGS, NON_YBASE_REGS,   YBASE_VIRT_REGS, ACCUM_LOW_OR_YBASE_REGS, ACCUM_OR_YBASE_REGS, X_OR_YBASE_REGS,   Y_OR_YBASE_REGS, ACCUM_LOW_YL_PL_OR_YBASE_REGS, P_OR_YBASE_REGS, ACCUM_Y_P_OR_YBASE_REGS,   Y_ADDR_OR_YBASE_REGS, YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS, YBASE_OR_YBASE_ELIGIBLE_REGS, NO_HIGH_ALL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG,   MULTIPLY_64_REG, LOW_REGS, HIGH_REGS, REAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,   MAC_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   ADDR_REGS, DATA_REGS, FP_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, AREG, DREG,   CREG, BREG, SIREG, DIREG,   AD_REGS, Q_REGS, NON_Q_REGS, INDEX_REGS,   LEGACY_REGS, GENERAL_REGS, FP_TOP_REG, FP_SECOND_REG,   FLOAT_REGS, SSE_REGS, MMX_REGS, FP_TOP_SSE_REGS,   FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS, INT_SSE_REGS,   FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, GLOBAL_REGS, LOCAL_REGS, LOCAL_OR_GLOBAL_REGS,   FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   PR_REGS, BR_REGS, AR_M_REGS, AR_I_REGS,   ADDL_REGS, GR_REGS, FR_REGS, GR_AND_BR_REGS,   GR_AND_FR_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   CARRY_REG, ACCUM_REGS, GENERAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, D_REGS, X_REGS,   Y_REGS, SP_REGS, DA_REGS, DB_REGS,   Z_REGS, D8_REGS, Q_REGS, D_OR_X_REGS,   D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS, A_REGS,   X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS, A_OR_D_REGS,   A_OR_SP_REGS, H_REGS, S_REGS, D_OR_S_REGS,   X_OR_S_REGS, Y_OR_S_REGS, SP_OR_S_REGS, D_OR_X_OR_S_REGS,   D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS, A_OR_S_REGS, D_OR_A_OR_S_REGS,   TMP_REGS, D_OR_A_OR_TMP_REGS, G_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, DATA_REGS, ADDR_REGS,   FP_REGS, GENERAL_REGS, DATA_OR_FP_REGS, ADDR_OR_FP_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, AP_REG,   XRF_REGS, GENERAL_REGS, AGRF_REGS, XGRF_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, ONLYR1_REGS,   LRW_REGS, GENERAL_REGS, C_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, REMAINDER_REG,   HIMULT_REG, SYSTEM_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, DATA_REGS, ADDRESS_REGS, GENERAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,   ADDRESS_REGS, SP_REGS, DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,   EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS,   SP_OR_ADDRESS_OR_EXTENDED_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, GENERAL_REGS, FLOAT_REG0, LONG_FLOAT_REG0,   FLOAT_REGS, FP_REGS, GEN_AND_FP_REGS, FRAME_POINTER_REG,   STACK_POINTER_REG, GEN_AND_MEM_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, R1_REGS, GENERAL_REGS, FPUPPER_REGS,   FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,   FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, MUL_REGS,   GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS, FPU_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, OUT_REGS,   STD_REGS, ARG_REGS, SRC_REGS, DST_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0_REGS,   R15_REGS, BASE_REGS, GENERAL_REGS, FP_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, BASE_REGS,   GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS, VRSAVE_REGS,   NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,   LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,   CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, ADDR_REGS, GENERAL_REGS,   FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R0_REGS, PR_REGS,   T_REGS, MAC_REGS, FPUL_REGS, SIBCALL_REGS,   GENERAL_REGS, FP0_REGS, FP_REGS, DF_REGS,   FPSCR_REGS, GENERAL_FP_REGS, TARGET_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, M16_NA_REGS, M16_REGS,   T_REG, M16_T_REGS, GR_REGS, FP_REGS,   HI_REG, LO_REG, HILO_REG, MD_REGS,   COP0_REGS, COP2_REGS, COP3_REGS, HI_AND_GR_REGS,   LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS,   COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS,   ST_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   FPCC_REGS, I64_REGS, GENERAL_REGS, FP_REGS,   EXTRA_FP_REGS, GENERAL_OR_FP_REGS, GENERAL_OR_EXTRA_FP_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R0_REGS, R1_REGS,   TWO_REGS, R2_REGS, EIGHT_REGS, R8_REGS,   ICALL_REGS, GENERAL_REGS, CARRY_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, BR_REGS, FP_REGS, ACC_REG,   SP_REG, RL_REGS, GR_REGS, AR_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,   M16_REGS, T_REG, M16_T_REGS, GR_REGS,   FP_REGS, HI_REG, LO_REG, HILO_REG,   MD_REGS, COP0_REGS, COP2_REGS, COP3_REGS,   HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS,   COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS,   ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, M16_NA_REGS, M16_REGS, T_REG,   M16_T_REGS, GR_REGS, FP_REGS, HI_REG,   LO_REG, HILO_REG, MD_REGS, COP0_REGS,   COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,   HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS,   COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, R2,   R0_1, INDEX_REGS, BASE_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, LR0_REGS, GENERAL_REGS,   BP_REGS, FC_REGS, CR_REGS, Q_REGS,   SPECIAL_REGS, ACCUM0_REGS, ACCUM_REGS, FLOAT_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, R24_REG,   R25_REG, R27_REG, GENERAL_REGS, FLOAT_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG,   GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   FPU_REGS, LO_REGS, STACK_REG, BASE_REGS,   HI_REGS, CC_REG, GENERAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R0_REG, POINTER_X_REGS,   POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG, BASE_POINTER_REGS,   POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS, LD_REGS,   NO_LD_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, R0R1_REGS, R2R3_REGS, EXT_LOW_REGS,   EXT_REGS, ADDR_REGS, INDEX_REGS, BK_REG,   SP_REG, RC_REG, COUNTER_REGS, INT_REGS,   GENERAL_REGS, DP_REG, ST_REG, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, FLOAT_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, S_REGS,   INDEX_REGS, SP_REGS, A_REGS, SI_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, REPEAT_REGS, CR_REGS,   ACCUM_REGS, OTHER_FLAG_REGS, F0_REGS, F1_REGS,   BR_FLAG_REGS, FLAG_REGS, EVEN_REGS, GPR_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, A0H_REG,   A0L_REG, A0_REG, A1H_REG, ACCUM_HIGH_REGS,   A1L_REG, ACCUM_LOW_REGS, A1_REG, ACCUM_REGS,   X_REG, X_OR_ACCUM_LOW_REGS, X_OR_ACCUM_REGS, YH_REG,   YH_OR_ACCUM_HIGH_REGS, X_OR_YH_REGS, YL_REG, YL_OR_ACCUM_LOW_REGS,   X_OR_YL_REGS, X_OR_Y_REGS, Y_REG, ACCUM_OR_Y_REGS,   PH_REG, X_OR_PH_REGS, PL_REG, PL_OR_ACCUM_LOW_REGS,   X_OR_PL_REGS, YL_OR_PL_OR_ACCUM_LOW_REGS, P_REG, ACCUM_OR_P_REGS,   YL_OR_P_REGS, ACCUM_LOW_OR_YL_OR_P_REGS, Y_OR_P_REGS, ACCUM_Y_OR_P_REGS,   NO_FRAME_Y_ADDR_REGS, Y_ADDR_REGS, ACCUM_LOW_OR_Y_ADDR_REGS, ACCUM_OR_Y_ADDR_REGS,   X_OR_Y_ADDR_REGS, Y_OR_Y_ADDR_REGS, P_OR_Y_ADDR_REGS, NON_HIGH_YBASE_ELIGIBLE_REGS,   YBASE_ELIGIBLE_REGS, J_REG, J_OR_DAU_16_BIT_REGS, BMU_REGS,   NOHIGH_NON_ADDR_REGS, NON_ADDR_REGS, SLOW_MEM_LOAD_REGS, NOHIGH_NON_YBASE_REGS,   NO_ACCUM_NON_YBASE_REGS, NON_YBASE_REGS, YBASE_VIRT_REGS, ACCUM_LOW_OR_YBASE_REGS,   ACCUM_OR_YBASE_REGS, X_OR_YBASE_REGS, Y_OR_YBASE_REGS, ACCUM_LOW_YL_PL_OR_YBASE_REGS,   P_OR_YBASE_REGS, ACCUM_Y_P_OR_YBASE_REGS, Y_ADDR_OR_YBASE_REGS, YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS,   YBASE_OR_YBASE_ELIGIBLE_REGS, NO_HIGH_ALL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, MULTIPLY_32_REG, MULTIPLY_64_REG, LOW_REGS,   HIGH_REGS, REAL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, GENERAL_REGS, MAC_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, ADDR_REGS, DATA_REGS,   FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   AREG, DREG, CREG, BREG,   SIREG, DIREG, AD_REGS, Q_REGS,   NON_Q_REGS, INDEX_REGS, LEGACY_REGS, GENERAL_REGS,   FP_TOP_REG, FP_SECOND_REG, FLOAT_REGS, SSE_REGS,   MMX_REGS, FP_TOP_SSE_REGS, FP_SECOND_SSE_REGS, FLOAT_SSE_REGS,   FLOAT_INT_REGS, INT_SSE_REGS, FLOAT_INT_SSE_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, FP_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, GLOBAL_REGS,   LOCAL_REGS, LOCAL_OR_GLOBAL_REGS, FP_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, PR_REGS, BR_REGS,   AR_M_REGS, AR_I_REGS, ADDL_REGS, GR_REGS,   FR_REGS, GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, CARRY_REG, ACCUM_REGS,   GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   D_REGS, X_REGS, Y_REGS, SP_REGS,   DA_REGS, DB_REGS, Z_REGS, D8_REGS,   Q_REGS, D_OR_X_REGS, D_OR_Y_REGS, D_OR_SP_REGS,   X_OR_Y_REGS, A_REGS, X_OR_SP_REGS, Y_OR_SP_REGS,   X_OR_Y_OR_D_REGS, A_OR_D_REGS, A_OR_SP_REGS, H_REGS,   S_REGS, D_OR_S_REGS, X_OR_S_REGS, Y_OR_S_REGS,   SP_OR_S_REGS, D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS,   A_OR_S_REGS, D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS,   G_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   DATA_REGS, ADDR_REGS, FP_REGS, GENERAL_REGS,   DATA_OR_FP_REGS, ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS,   AGRF_REGS, XGRF_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, ONLYR1_REGS, LRW_REGS, GENERAL_REGS,   C_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   GENERAL_REGS, REMAINDER_REG, HIMULT_REG, SYSTEM_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,   ADDRESS_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS,   DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS, EXTENDED_REGS, DATA_OR_EXTENDED_REGS,   ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS, GENERAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,   FLOAT_REG0, LONG_FLOAT_REG0, FLOAT_REGS, FP_REGS,   GEN_AND_FP_REGS, FRAME_POINTER_REG, STACK_POINTER_REG, GEN_AND_MEM_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,   GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,   SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   R1_REGS, GENERAL_REGS, FPUPPER_REGS, FP_REGS,   GENERAL_OR_FP_REGS, SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS,   NO_LOAD_FPU_REGS, FPU_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, OUT_REGS, STD_REGS, ARG_REGS,   SRC_REGS, DST_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, R0_REGS, R15_REGS, BASE_REGS,   GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, BASE_REGS, GENERAL_REGS, FLOAT_REGS,   ALTIVEC_REGS, VRSAVE_REGS, NON_SPECIAL_REGS, MQ_REGS,   LINK_REGS, CTR_REGS, LINK_OR_CTR_REGS, SPECIAL_REGS,   SPEC_OR_GEN_REGS, CR0_REGS, CR_REGS, NON_FLOAT_REGS,   XER_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   ADDR_REGS, GENERAL_REGS, FP_REGS, ADDR_FP_REGS,   GENERAL_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   R0_REGS, PR_REGS, T_REGS, MAC_REGS,   FPUL_REGS, SIBCALL_REGS, GENERAL_REGS, FP0_REGS,   FP_REGS, DF_REGS, FPSCR_REGS, GENERAL_FP_REGS,   TARGET_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   M16_NA_REGS, M16_REGS, T_REG, M16_T_REGS,   GR_REGS, FP_REGS, HI_REG, LO_REG,   HILO_REG, MD_REGS, COP0_REGS, COP2_REGS,   COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS,   HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,   ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, FPCC_REGS, I64_REGS,   GENERAL_REGS, FP_REGS, EXTRA_FP_REGS, GENERAL_OR_FP_REGS,   GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   R0_REGS, R1_REGS, TWO_REGS, R2_REGS,   EIGHT_REGS, R8_REGS, ICALL_REGS, GENERAL_REGS,   CARRY_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, BR_REGS,   FP_REGS, ACC_REG, SP_REG, RL_REGS,   GR_REGS, AR_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, M16_NA_REGS, M16_REGS, T_REG,   M16_T_REGS, GR_REGS, FP_REGS, HI_REG,   LO_REG, HILO_REG, MD_REGS, COP0_REGS,   COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,   HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS,   COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,   M16_REGS, T_REG, M16_T_REGS, GR_REGS,   FP_REGS, HI_REG, LO_REG, HILO_REG,   MD_REGS, COP0_REGS, COP2_REGS, COP3_REGS,   HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS,   COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS,   ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, R0_REG, R24_REG, R25_REG,   R27_REG, GENERAL_REGS, FLOAT_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG, GENERAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, FPA_REGS,   CIRRUS_REGS, VFP_REGS, IWMMXT_GR_REGS, IWMMXT_REGS,   LO_REGS, STACK_REG, BASE_REGS, HI_REGS,   CC_REG, VFPCC_REG, GENERAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R0_REG, POINTER_X_REGS,   POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG, BASE_POINTER_REGS,   POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS, LD_REGS,   NO_LD_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, IREGS, BREGS, LREGS,   MREGS, CIRCREGS, DAGREGS, EVEN_AREGS,   ODD_AREGS, AREGS, CCREGS, EVEN_DREGS,   ODD_DREGS, DREGS, PREGS_CLOBBERED, PREGS,   DPREGS, MOST_REGS, PROLOGUE_REGS, NON_A_CC_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0R1_REGS,   R2R3_REGS, EXT_LOW_REGS, EXT_REGS, ADDR_REGS,   INDEX_REGS, BK_REG, SP_REG, RC_REG,   COUNTER_REGS, INT_REGS, GENERAL_REGS, DP_REG,   ST_REG, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG,   MULTIPLY_64_REG, LOW_REGS, HIGH_REGS, REAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, ICC_REGS,   FCC_REGS, CC_REGS, ICR_REGS, FCR_REGS,   CR_REGS, LCR_REG, LR_REG, GR8_REGS,   GR9_REGS, GR89_REGS, FDPIC_REGS, FDPIC_FPTR_REGS,   FDPIC_CALL_REGS, SPR_REGS, QUAD_ACC_REGS, EVEN_ACC_REGS,   ACC_REGS, ACCG_REGS, QUAD_FPR_REGS, FEVEN_REGS,   FPR_REGS, QUAD_REGS, EVEN_REGS, GPR_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, COUNTER_REGS,   SOURCE_REGS, DESTINATION_REGS, GENERAL_REGS, MAC_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, AREG,   DREG, CREG, BREG, SIREG,   DIREG, AD_REGS, Q_REGS, NON_Q_REGS,   INDEX_REGS, LEGACY_REGS, GENERAL_REGS, FP_TOP_REG,   FP_SECOND_REG, FLOAT_REGS, SSE_REGS, MMX_REGS,   FP_TOP_SSE_REGS, FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS,   INT_SSE_REGS, FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, PR_REGS, BR_REGS,   AR_M_REGS, AR_I_REGS, ADDL_REGS, GR_REGS,   FR_REGS, GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, DPH_REGS, DPL_REGS,   DP_REGS, SP_REGS, IPH_REGS, IPL_REGS,   IP_REGS, DP_SP_REGS, PTR_REGS, NONPTR_REGS,   NONSP_REGS, GENERAL_REGS, ALL_REGS = GENERAL_REGS, LIM_REG_CLASSES,   NO_REGS, GR_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, CARRY_REG, ACCUM_REGS, GENERAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, D_REGS,   X_REGS, Y_REGS, SP_REGS, DA_REGS,   DB_REGS, Z_REGS, D8_REGS, Q_REGS,   D_OR_X_REGS, D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS,   A_REGS, X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS,   A_OR_D_REGS, A_OR_SP_REGS, H_REGS, S_REGS,   D_OR_S_REGS, X_OR_S_REGS, Y_OR_S_REGS, Z_OR_S_REGS,   SP_OR_S_REGS, D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS,   A_OR_S_REGS, D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS,   G_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   DATA_REGS, ADDR_REGS, FP_REGS, GENERAL_REGS,   DATA_OR_FP_REGS, ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, ONLYR1_REGS, LRW_REGS, GENERAL_REGS,   C_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   M16_NA_REGS, M16_REGS, T_REG, M16_T_REGS,   PIC_FN_ADDR_REG, LEA_REGS, GR_REGS, FP_REGS,   HI_REG, LO_REG, MD_REGS, COP0_REGS,   COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,   HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,   ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, REMAINDER_REG,   HIMULT_REG, SYSTEM_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS,   DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS, EXTENDED_REGS, DATA_OR_EXTENDED_REGS,   ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS, FP_REGS,   FP_ACC_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, GENERAL_REGS, FLOAT_REG0, LONG_FLOAT_REG0,   FLOAT_REGS, LONG_REGS, FP_REGS, GEN_AND_FP_REGS,   FRAME_POINTER_REG, STACK_POINTER_REG, GEN_AND_MEM_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,   FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,   GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,   SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS,   FPU_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   BASE_REGS, GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS,   VRSAVE_REGS, VSCR_REGS, SPE_ACC_REGS, SPEFSCR_REGS,   NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,   LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,   CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, CC_REGS, ADDR_REGS,   GENERAL_REGS, ACCESS_REGS, ADDR_CC_REGS, GENERAL_CC_REGS,   FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R0_REGS, PR_REGS,   T_REGS, MAC_REGS, FPUL_REGS, SIBCALL_REGS,   GENERAL_REGS, FP0_REGS, FP_REGS, DF_HI_REGS,   DF_REGS, FPSCR_REGS, GENERAL_FP_REGS, TARGET_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, FPCC_REGS,   I64_REGS, GENERAL_REGS, FP_REGS, EXTRA_FP_REGS,   GENERAL_OR_FP_REGS, GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, R0_REGS, R1_REGS, TWO_REGS,   R2_REGS, EIGHT_REGS, R8_REGS, ICALL_REGS,   GENERAL_REGS, CARRY_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   BR_REGS, FP_REGS, ACC_REG, SP_REG,   RL_REGS, GR_REGS, AR_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R0_REG, R24_REG,   R25_REG, R27_REG, GENERAL_REGS, FLOAT_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG,   GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   FPA_REGS, CIRRUS_REGS, VFP_REGS, IWMMXT_GR_REGS,   IWMMXT_REGS, LO_REGS, STACK_REG, BASE_REGS,   HI_REGS, CC_REG, VFPCC_REG, GENERAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0_REG,   POINTER_X_REGS, POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG,   BASE_POINTER_REGS, POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS,   LD_REGS, NO_LD_REGS, GENERAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, IREGS, BREGS,   LREGS, MREGS, CIRCREGS, DAGREGS,   EVEN_AREGS, ODD_AREGS, AREGS, CCREGS,   EVEN_DREGS, ODD_DREGS, DREGS, FDPIC_REGS,   FDPIC_FPTR_REGS, PREGS_CLOBBERED, PREGS, IPREGS,   DPREGS, MOST_REGS, LT_REGS, LC_REGS,   LB_REGS, PROLOGUE_REGS, NON_A_CC_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R0R1_REGS, R2R3_REGS,   EXT_LOW_REGS, EXT_REGS, ADDR_REGS, INDEX_REGS,   BK_REG, SP_REG, RC_REG, COUNTER_REGS,   INT_REGS, GENERAL_REGS, DP_REG, ST_REG,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, MOF_REGS,   CC0_REGS, SPECIAL_REGS, GENERAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, LO_REGS, HI_REGS,   HILO_REGS, NOSP_REGS, GENERAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG, MULTIPLY_64_REG,   LOW_REGS, HIGH_REGS, REAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, ICC_REGS, FCC_REGS,   CC_REGS, ICR_REGS, FCR_REGS, CR_REGS,   LCR_REG, LR_REG, GR8_REGS, GR9_REGS,   GR89_REGS, FDPIC_REGS, FDPIC_FPTR_REGS, FDPIC_CALL_REGS,   SPR_REGS, QUAD_ACC_REGS, EVEN_ACC_REGS, ACC_REGS,   ACCG_REGS, QUAD_FPR_REGS, FEVEN_REGS, FPR_REGS,   QUAD_REGS, EVEN_REGS, GPR_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, COUNTER_REGS, SOURCE_REGS,   DESTINATION_REGS, GENERAL_REGS, MAC_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, AREG, DREG,   CREG, BREG, SIREG, DIREG,   AD_REGS, Q_REGS, NON_Q_REGS, INDEX_REGS,   LEGACY_REGS, GENERAL_REGS, FP_TOP_REG, FP_SECOND_REG,   FLOAT_REGS, SSE_REGS, MMX_REGS, FP_TOP_SSE_REGS,   FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS, INT_SSE_REGS,   FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   PR_REGS, BR_REGS, AR_M_REGS, AR_I_REGS,   ADDL_REGS, GR_REGS, FP_REGS, FR_REGS,   GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, GR_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, SP_REGS, FB_REGS, SB_REGS,   CR_REGS, R0_REGS, R1_REGS, R2_REGS,   R3_REGS, R02_REGS, HL_REGS, QI_REGS,   R23_REGS, R03_REGS, DI_REGS, A0_REGS,   A1_REGS, A_REGS, AD_REGS, PS_REGS,   SI_REGS, HI_REGS, RA_REGS, GENERAL_REGS,   FLG_REGS, HC_REGS, MEM_REGS, R02_A_MEM_REGS,   A_HL_MEM_REGS, R1_R3_A_MEM_REGS, R03_MEM_REGS, A_HI_MEM_REGS,   A_AD_CR_MEM_SI_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   CARRY_REG, ACCUM_REGS, GENERAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, D_REGS, X_REGS,   Y_REGS, SP_REGS, DA_REGS, DB_REGS,   Z_REGS, D8_REGS, Q_REGS, D_OR_X_REGS,   D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS, A_REGS,   X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS, A_OR_D_REGS,   A_OR_SP_REGS, H_REGS, S_REGS, D_OR_S_REGS,   X_OR_S_REGS, Y_OR_S_REGS, Z_OR_S_REGS, SP_OR_S_REGS,   D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS, A_OR_S_REGS,   D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS, G_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,   ADDR_REGS, FP_REGS, GENERAL_REGS, DATA_OR_FP_REGS,   ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   ONLYR1_REGS, LRW_REGS, GENERAL_REGS, C_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,   M16_REGS, T_REG, M16_T_REGS, PIC_FN_ADDR_REG,   V1_REG, LEA_REGS, GR_REGS, FP_REGS,   HI_REG, LO_REG, MD_REGS, COP0_REGS,   COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,   HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,   ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, DSP_ACC_REGS,   ACC_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   GENERAL_REGS, REMAINDER_REG, HIMULT_REG, SYSTEM_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,   ADDRESS_REGS, SP_REGS, DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,   EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS,   SP_OR_ADDRESS_OR_EXTENDED_REGS, FP_REGS, FP_ACC_REGS, GENERAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,   FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,   GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,   SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS,   FPU_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   BASE_REGS, GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS,   VRSAVE_REGS, VSCR_REGS, SPE_ACC_REGS, SPEFSCR_REGS,   NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,   LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,   CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, CC_REGS, ADDR_REGS,   GENERAL_REGS, ACCESS_REGS, ADDR_CC_REGS, GENERAL_CC_REGS,   FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, G16_REGS, G32_REGS,   T32_REGS, HI_REG, LO_REG, CE_REGS,   CN_REG, LC_REG, SC_REG, SP_REGS,   CR_REGS, CP1_REGS, CP2_REGS, CP3_REGS,   CPA_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   R0_REGS, PR_REGS, T_REGS, MAC_REGS,   FPUL_REGS, SIBCALL_REGS, GENERAL_REGS, FP0_REGS,   FP_REGS, DF_HI_REGS, DF_REGS, FPSCR_REGS,   GENERAL_FP_REGS, GENERAL_DF_REGS, TARGET_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, FPCC_REGS, I64_REGS,   GENERAL_REGS, FP_REGS, EXTRA_FP_REGS, GENERAL_OR_FP_REGS,   GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   R0_REGS, R1_REGS, TWO_REGS, R2_REGS,   EIGHT_REGS, R8_REGS, ICALL_REGS, GENERAL_REGS,   CARRY_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, BR_REGS,   FP_REGS, ACC_REG, SP_REG, RL_REGS,   GR_REGS, AR_REGS, ALL_REGS, LIM_REG_CLASSES }
enum	arm_builtins {   ARM_BUILTIN_CLZ, ARM_BUILTIN_MAX, ARM_BUILTIN_CLZ, ARM_BUILTIN_MAX,   ARM_BUILTIN_GETWCX, ARM_BUILTIN_SETWCX, ARM_BUILTIN_WZERO, ARM_BUILTIN_WAVG2BR,   ARM_BUILTIN_WAVG2HR, ARM_BUILTIN_WAVG2B, ARM_BUILTIN_WAVG2H, ARM_BUILTIN_WACCB,   ARM_BUILTIN_WACCH, ARM_BUILTIN_WACCW, ARM_BUILTIN_WMACS, ARM_BUILTIN_WMACSZ,   ARM_BUILTIN_WMACU, ARM_BUILTIN_WMACUZ, ARM_BUILTIN_WSADB, ARM_BUILTIN_WSADBZ,   ARM_BUILTIN_WSADH, ARM_BUILTIN_WSADHZ, ARM_BUILTIN_WALIGN, ARM_BUILTIN_TMIA,   ARM_BUILTIN_TMIAPH, ARM_BUILTIN_TMIABB, ARM_BUILTIN_TMIABT, ARM_BUILTIN_TMIATB,   ARM_BUILTIN_TMIATT, ARM_BUILTIN_TMOVMSKB, ARM_BUILTIN_TMOVMSKH, ARM_BUILTIN_TMOVMSKW,   ARM_BUILTIN_TBCSTB, ARM_BUILTIN_TBCSTH, ARM_BUILTIN_TBCSTW, ARM_BUILTIN_WMADDS,   ARM_BUILTIN_WMADDU, ARM_BUILTIN_WPACKHSS, ARM_BUILTIN_WPACKWSS, ARM_BUILTIN_WPACKDSS,   ARM_BUILTIN_WPACKHUS, ARM_BUILTIN_WPACKWUS, ARM_BUILTIN_WPACKDUS, ARM_BUILTIN_WADDB,   ARM_BUILTIN_WADDH, ARM_BUILTIN_WADDW, ARM_BUILTIN_WADDSSB, ARM_BUILTIN_WADDSSH,   ARM_BUILTIN_WADDSSW, ARM_BUILTIN_WADDUSB, ARM_BUILTIN_WADDUSH, ARM_BUILTIN_WADDUSW,   ARM_BUILTIN_WSUBB, ARM_BUILTIN_WSUBH, ARM_BUILTIN_WSUBW, ARM_BUILTIN_WSUBSSB,   ARM_BUILTIN_WSUBSSH, ARM_BUILTIN_WSUBSSW, ARM_BUILTIN_WSUBUSB, ARM_BUILTIN_WSUBUSH,   ARM_BUILTIN_WSUBUSW, ARM_BUILTIN_WAND, ARM_BUILTIN_WANDN, ARM_BUILTIN_WOR,   ARM_BUILTIN_WXOR, ARM_BUILTIN_WCMPEQB, ARM_BUILTIN_WCMPEQH, ARM_BUILTIN_WCMPEQW,   ARM_BUILTIN_WCMPGTUB, ARM_BUILTIN_WCMPGTUH, ARM_BUILTIN_WCMPGTUW, ARM_BUILTIN_WCMPGTSB,   ARM_BUILTIN_WCMPGTSH, ARM_BUILTIN_WCMPGTSW, ARM_BUILTIN_TEXTRMSB, ARM_BUILTIN_TEXTRMSH,   ARM_BUILTIN_TEXTRMSW, ARM_BUILTIN_TEXTRMUB, ARM_BUILTIN_TEXTRMUH, ARM_BUILTIN_TEXTRMUW,   ARM_BUILTIN_TINSRB, ARM_BUILTIN_TINSRH, ARM_BUILTIN_TINSRW, ARM_BUILTIN_WMAXSW,   ARM_BUILTIN_WMAXSH, ARM_BUILTIN_WMAXSB, ARM_BUILTIN_WMAXUW, ARM_BUILTIN_WMAXUH,   ARM_BUILTIN_WMAXUB, ARM_BUILTIN_WMINSW, ARM_BUILTIN_WMINSH, ARM_BUILTIN_WMINSB,   ARM_BUILTIN_WMINUW, ARM_BUILTIN_WMINUH, ARM_BUILTIN_WMINUB, ARM_BUILTIN_WMULUM,   ARM_BUILTIN_WMULSM, ARM_BUILTIN_WMULUL, ARM_BUILTIN_PSADBH, ARM_BUILTIN_WSHUFH,   ARM_BUILTIN_WSLLH, ARM_BUILTIN_WSLLW, ARM_BUILTIN_WSLLD, ARM_BUILTIN_WSRAH,   ARM_BUILTIN_WSRAW, ARM_BUILTIN_WSRAD, ARM_BUILTIN_WSRLH, ARM_BUILTIN_WSRLW,   ARM_BUILTIN_WSRLD, ARM_BUILTIN_WRORH, ARM_BUILTIN_WRORW, ARM_BUILTIN_WRORD,   ARM_BUILTIN_WSLLHI, ARM_BUILTIN_WSLLWI, ARM_BUILTIN_WSLLDI, ARM_BUILTIN_WSRAHI,   ARM_BUILTIN_WSRAWI, ARM_BUILTIN_WSRADI, ARM_BUILTIN_WSRLHI, ARM_BUILTIN_WSRLWI,   ARM_BUILTIN_WSRLDI, ARM_BUILTIN_WRORHI, ARM_BUILTIN_WRORWI, ARM_BUILTIN_WRORDI,   ARM_BUILTIN_WUNPCKIHB, ARM_BUILTIN_WUNPCKIHH, ARM_BUILTIN_WUNPCKIHW, ARM_BUILTIN_WUNPCKILB,   ARM_BUILTIN_WUNPCKILH, ARM_BUILTIN_WUNPCKILW, ARM_BUILTIN_WUNPCKEHSB, ARM_BUILTIN_WUNPCKEHSH,   ARM_BUILTIN_WUNPCKEHSW, ARM_BUILTIN_WUNPCKEHUB, ARM_BUILTIN_WUNPCKEHUH, ARM_BUILTIN_WUNPCKEHUW,   ARM_BUILTIN_WUNPCKELSB, ARM_BUILTIN_WUNPCKELSH, ARM_BUILTIN_WUNPCKELSW, ARM_BUILTIN_WUNPCKELUB,   ARM_BUILTIN_WUNPCKELUH, ARM_BUILTIN_WUNPCKELUW, ARM_BUILTIN_MAX, ARM_BUILTIN_GETWCX,   ARM_BUILTIN_SETWCX, ARM_BUILTIN_WZERO, ARM_BUILTIN_WAVG2BR, ARM_BUILTIN_WAVG2HR,   ARM_BUILTIN_WAVG2B, ARM_BUILTIN_WAVG2H, ARM_BUILTIN_WACCB, ARM_BUILTIN_WACCH,   ARM_BUILTIN_WACCW, ARM_BUILTIN_WMACS, ARM_BUILTIN_WMACSZ, ARM_BUILTIN_WMACU,   ARM_BUILTIN_WMACUZ, ARM_BUILTIN_WSADB, ARM_BUILTIN_WSADBZ, ARM_BUILTIN_WSADH,   ARM_BUILTIN_WSADHZ, ARM_BUILTIN_WALIGN, ARM_BUILTIN_TMIA, ARM_BUILTIN_TMIAPH,   ARM_BUILTIN_TMIABB, ARM_BUILTIN_TMIABT, ARM_BUILTIN_TMIATB, ARM_BUILTIN_TMIATT,   ARM_BUILTIN_TMOVMSKB, ARM_BUILTIN_TMOVMSKH, ARM_BUILTIN_TMOVMSKW, ARM_BUILTIN_TBCSTB,   ARM_BUILTIN_TBCSTH, ARM_BUILTIN_TBCSTW, ARM_BUILTIN_WMADDS, ARM_BUILTIN_WMADDU,   ARM_BUILTIN_WPACKHSS, ARM_BUILTIN_WPACKWSS, ARM_BUILTIN_WPACKDSS, ARM_BUILTIN_WPACKHUS,   ARM_BUILTIN_WPACKWUS, ARM_BUILTIN_WPACKDUS, ARM_BUILTIN_WADDB, ARM_BUILTIN_WADDH,   ARM_BUILTIN_WADDW, ARM_BUILTIN_WADDSSB, ARM_BUILTIN_WADDSSH, ARM_BUILTIN_WADDSSW,   ARM_BUILTIN_WADDUSB, ARM_BUILTIN_WADDUSH, ARM_BUILTIN_WADDUSW, ARM_BUILTIN_WSUBB,   ARM_BUILTIN_WSUBH, ARM_BUILTIN_WSUBW, ARM_BUILTIN_WSUBSSB, ARM_BUILTIN_WSUBSSH,   ARM_BUILTIN_WSUBSSW, ARM_BUILTIN_WSUBUSB, ARM_BUILTIN_WSUBUSH, ARM_BUILTIN_WSUBUSW,   ARM_BUILTIN_WAND, ARM_BUILTIN_WANDN, ARM_BUILTIN_WOR, ARM_BUILTIN_WXOR,   ARM_BUILTIN_WCMPEQB, ARM_BUILTIN_WCMPEQH, ARM_BUILTIN_WCMPEQW, ARM_BUILTIN_WCMPGTUB,   ARM_BUILTIN_WCMPGTUH, ARM_BUILTIN_WCMPGTUW, ARM_BUILTIN_WCMPGTSB, ARM_BUILTIN_WCMPGTSH,   ARM_BUILTIN_WCMPGTSW, ARM_BUILTIN_TEXTRMSB, ARM_BUILTIN_TEXTRMSH, ARM_BUILTIN_TEXTRMSW,   ARM_BUILTIN_TEXTRMUB, ARM_BUILTIN_TEXTRMUH, ARM_BUILTIN_TEXTRMUW, ARM_BUILTIN_TINSRB,   ARM_BUILTIN_TINSRH, ARM_BUILTIN_TINSRW, ARM_BUILTIN_WMAXSW, ARM_BUILTIN_WMAXSH,   ARM_BUILTIN_WMAXSB, ARM_BUILTIN_WMAXUW, ARM_BUILTIN_WMAXUH, ARM_BUILTIN_WMAXUB,   ARM_BUILTIN_WMINSW, ARM_BUILTIN_WMINSH, ARM_BUILTIN_WMINSB, ARM_BUILTIN_WMINUW,   ARM_BUILTIN_WMINUH, ARM_BUILTIN_WMINUB, ARM_BUILTIN_WMULUM, ARM_BUILTIN_WMULSM,   ARM_BUILTIN_WMULUL, ARM_BUILTIN_PSADBH, ARM_BUILTIN_WSHUFH, ARM_BUILTIN_WSLLH,   ARM_BUILTIN_WSLLW, ARM_BUILTIN_WSLLD, ARM_BUILTIN_WSRAH, ARM_BUILTIN_WSRAW,   ARM_BUILTIN_WSRAD, ARM_BUILTIN_WSRLH, ARM_BUILTIN_WSRLW, ARM_BUILTIN_WSRLD,   ARM_BUILTIN_WRORH, ARM_BUILTIN_WRORW, ARM_BUILTIN_WRORD, ARM_BUILTIN_WSLLHI,   ARM_BUILTIN_WSLLWI, ARM_BUILTIN_WSLLDI, ARM_BUILTIN_WSRAHI, ARM_BUILTIN_WSRAWI,   ARM_BUILTIN_WSRADI, ARM_BUILTIN_WSRLHI, ARM_BUILTIN_WSRLWI, ARM_BUILTIN_WSRLDI,   ARM_BUILTIN_WRORHI, ARM_BUILTIN_WRORWI, ARM_BUILTIN_WRORDI, ARM_BUILTIN_WUNPCKIHB,   ARM_BUILTIN_WUNPCKIHH, ARM_BUILTIN_WUNPCKIHW, ARM_BUILTIN_WUNPCKILB, ARM_BUILTIN_WUNPCKILH,   ARM_BUILTIN_WUNPCKILW, ARM_BUILTIN_WUNPCKEHSB, ARM_BUILTIN_WUNPCKEHSH, ARM_BUILTIN_WUNPCKEHSW,   ARM_BUILTIN_WUNPCKEHUB, ARM_BUILTIN_WUNPCKEHUH, ARM_BUILTIN_WUNPCKEHUW, ARM_BUILTIN_WUNPCKELSB,   ARM_BUILTIN_WUNPCKELSH, ARM_BUILTIN_WUNPCKELSW, ARM_BUILTIN_WUNPCKELUB, ARM_BUILTIN_WUNPCKELUH,   ARM_BUILTIN_WUNPCKELUW, ARM_BUILTIN_THREAD_POINTER, ARM_BUILTIN_MAX }
Variables
arm_cc	arm_current_cc
int	arm_target_label
int	arm_ccfsm_state
struct rtx_def *	arm_target_insn
int	target_flags
const char *	target_fp_name
struct rtx_def *	arm_compare_op0
struct rtx_def *	arm_compare_op1
struct rtx_def *	pool_vector_label
int	return_used_this_function
struct arm_cpu_select	arm_select []
enum prog_mode_type	arm_prgmode
enum floating_point_type	arm_fpu
enum floating_point_type	arm_fpu_arch
int	arm_fast_multiply
int	arm_arch4
int	arm_arch5
int	arm_arch5e
int	arm_ld_sched
int	thumb_code
int	arm_is_strong
int	arm_is_xscale
int	arm_is_6_or_7
int	arm_structure_size_boundary
const char *	structure_size_string
int	arm_pic_register
const char *	arm_pic_register_string
int	making_const_table

---

Define Documentation

#define ACCUMULATE_OUTGOING_ARGS   1

Definition at line 1363 of file arm.h.

#define ADDRESS_COST

(

X

)

(TARGET_ARM ? ARM_ADDRESS_COST (X) : THUMB_ADDRESS_COST (X))

Definition at line 2441 of file arm.h.

#define ARG_POINTER_REGNUM   26

Definition at line 977 of file arm.h.

#define ARG_REGISTER

(

N

)

(N - 1)

Definition at line 907 of file arm.h.

Referenced by arm_struct_value_rtx(), and thumb_exit().

#define ARM_ADDRESS_COST

(

X

)

Value:

(10 - ((GET_CODE (X) == MEM || GET_CODE (X) == LABEL_REF         \
    || GET_CODE (X) == SYMBOL_REF)             \
   ? 0                     \
   : ((GET_CODE (X) == PRE_INC || GET_CODE (X) == PRE_DEC        \
       || GET_CODE (X) == POST_INC || GET_CODE (X) == POST_DEC)      \
      ? 10                   \
      : (((GET_CODE (X) == PLUS || GET_CODE (X) == MINUS)        \
    ? 6 + (GET_CODE (XEXP (X, 1)) == CONST_INT ? 2         \
           : ((GET_RTX_CLASS (GET_CODE (XEXP (X, 0))) == '2'     \
         || GET_RTX_CLASS (GET_CODE (XEXP (X, 0))) == 'c'  \
         || GET_RTX_CLASS (GET_CODE (XEXP (X, 1))) == '2'  \
         || GET_RTX_CLASS (GET_CODE (XEXP (X, 1))) == 'c') \
        ? 1 : 0))              \
    : 4)))))

Definition at line 2419 of file arm.h.

#define ARM_BASE_REGISTER_RTX_P

(

X

)

(GET_CODE (X) == REG && ARM_REG_OK_FOR_BASE_P (X))

Definition at line 2002 of file arm.h.

Referenced by arm_legitimize_address().

#define ARM_DECLARE_FUNCTION_NAME	(	STREAM,
		NAME,
		DECL		)

Value:

do              \
    {             \
      if (TARGET_THUMB)         \
        {           \
          if (is_called_in_ARM_mode (DECL))   \
            fprintf (STREAM, "\t.code 32\n") ;    \
          else            \
           fprintf (STREAM, "\t.thumb_func\n") ;  \
        }           \
      if (TARGET_POKE_FUNCTION_NAME)      \
        arm_poke_function_name (STREAM, (char *) NAME); \
    }             \
  while (0)

Definition at line 2591 of file arm.h.

#define ARM_DECLARE_FUNCTION_SIZE	(	STREAM,
		NAME,
		DECL		)	arm_encode_call_attribute (DECL, SHORT_CALL_FLAG_CHAR)

Definition at line 1937 of file arm.h.

#define ARM_ENCODE_CALL_TYPE

(

decl

)

Value:

if (TREE_CODE_CLASS (TREE_CODE (decl)) == 'd')      \
    {                 \
      if (TREE_CODE (decl) == FUNCTION_DECL && DECL_WEAK (decl))  \
        arm_encode_call_attribute (decl, LONG_CALL_FLAG_CHAR);    \
      else if (! TREE_PUBLIC (decl))                \
        arm_encode_call_attribute (decl, SHORT_CALL_FLAG_CHAR);   \
    }

Definition at line 1902 of file arm.h.

#define ARM_FLAG_ABORT_NORETURN   (1 << 13)

Definition at line 359 of file arm.h.

#define ARM_FLAG_APCS_32   (1 << 3)

Definition at line 320 of file arm.h.

Referenced by arm_override_options().

#define ARM_FLAG_APCS_FLOAT   (1 << 5)

Definition at line 330 of file arm.h.

#define ARM_FLAG_APCS_FRAME   (1 << 0)

Definition at line 304 of file arm.h.

Referenced by arm_override_options().

#define ARM_FLAG_APCS_REENT   (1 << 6)

Definition at line 334 of file arm.h.

#define ARM_FLAG_APCS_STACK   (1 << 4)

Definition at line 326 of file arm.h.

#define ARM_FLAG_BIG_END   (1 << 9)

Definition at line 345 of file arm.h.

#define ARM_FLAG_FPE   (1 << 2)

Definition at line 315 of file arm.h.

#define ARM_FLAG_INTERWORK   (1 << 10)

Definition at line 348 of file arm.h.

Referenced by arm_override_options().

#define ARM_FLAG_LITTLE_WORDS   (1 << 11)

Definition at line 352 of file arm.h.

#define ARM_FLAG_LONG_CALLS   (1 << 15)

Definition at line 365 of file arm.h.

#define ARM_FLAG_MMU_TRAPS   (1 << 7)

Definition at line 338 of file arm.h.

#define ARM_FLAG_NO_SCHED_PRO   (1 << 12)

Definition at line 355 of file arm.h.

#define ARM_FLAG_POKE   (1 << 1)

Definition at line 311 of file arm.h.

#define ARM_FLAG_SINGLE_PIC_BASE   (1 << 14)

Definition at line 362 of file arm.h.

#define ARM_FLAG_SOFT_FLOAT   (1 << 8)

Definition at line 342 of file arm.h.

#define ARM_FLAG_THUMB   (1 << 16)

Definition at line 368 of file arm.h.

Referenced by arm_override_options().

#define arm_fpu_attr   ((enum attr_fpu) arm_fpu)

Definition at line 543 of file arm.h.

#define ARM_FRAME_RTX

(

X

)

Value:

(   (X) == frame_pointer_rtx || (X) == stack_pointer_rtx  \
   || (X) == arg_pointer_rtx)

Definition at line 2402 of file arm.h.

Referenced by arm_rtx_costs(), and arm_rtx_costs_1().

#define ARM_FT_EXCEPTION   6

Definition at line 1431 of file arm.h.

Referenced by arm_output_epilogue(), arm_output_function_prologue(), and output_return_instruction().

#define ARM_FT_EXCEPTION_HANDLER   3

Definition at line 1428 of file arm.h.

Referenced by arm_compute_func_type(), arm_output_epilogue(), arm_output_function_prologue(), and use_return_insn().

#define ARM_FT_FIQ   5

Definition at line 1430 of file arm.h.

Referenced by arm_compute_save_reg0_reg12_mask(), arm_expand_prologue(), arm_output_epilogue(), arm_output_function_prologue(), and output_return_instruction().

#define ARM_FT_INTERRUPT   (1 << 2)

Definition at line 1437 of file arm.h.

#define ARM_FT_INTERWORKED   2

Definition at line 1427 of file arm.h.

Referenced by arm_compute_func_type(), arm_output_epilogue(), arm_output_function_prologue(), and output_return_instruction().

#define ARM_FT_ISR   4

Definition at line 1429 of file arm.h.

Referenced by arm_expand_prologue(), arm_isr_value(), arm_output_epilogue(), arm_output_function_prologue(), and output_return_instruction().

#define ARM_FT_NAKED   (1 << 3)

Definition at line 1438 of file arm.h.

Referenced by arm_compute_func_type(), and use_return_insn().

#define ARM_FT_NESTED   (1 << 5)

Definition at line 1440 of file arm.h.

Referenced by arm_compute_func_type().

#define ARM_FT_NORMAL   1

Definition at line 1426 of file arm.h.

Referenced by arm_compute_func_type(), arm_compute_save_reg_mask(), arm_output_epilogue(), and arm_output_function_prologue().

#define ARM_FT_TYPE_MASK   ((1 << 3) - 1)

Definition at line 1433 of file arm.h.

#define ARM_FT_UNKNOWN   0

Definition at line 1425 of file arm.h.

Referenced by arm_compute_func_type(), arm_current_func_type(), arm_handle_isr_attribute(), arm_init_machine_status(), and arm_isr_value().

#define ARM_FT_VOLATILE   (1 << 4)

Definition at line 1439 of file arm.h.

Referenced by arm_compute_func_type(), and use_return_insn().

#define ARM_FUNC_TYPE

(

t

)

(t & ARM_FT_TYPE_MASK)

Definition at line 1443 of file arm.h.

Referenced by arm_compute_save_reg0_reg12_mask(), arm_compute_save_reg_mask(), arm_current_func_type(), arm_output_epilogue(), arm_output_function_prologue(), output_return_instruction(), and use_return_insn().

#define ARM_FUNCTION_PROFILER	(	STREAM,
		LABELNO		)

Value:

{             \
  char temp[20];          \
  rtx sym;            \
              \
  asm_fprintf (STREAM, "\tmov\t%r, %r\n\tbl\t",   \
     IP_REGNUM, LR_REGNUM);     \
  assemble_name (STREAM, ARM_MCOUNT_NAME);    \
  fputc ('\n', STREAM);         \
  ASM_GENERATE_INTERNAL_LABEL (temp, "LP", LABELNO);  \
  sym = gen_rtx (SYMBOL_REF, Pmode, temp);    \
  assemble_aligned_integer (UNITS_PER_WORD, sym); \
}

Definition at line 1576 of file arm.h.

#define ARM_GO_IF_LEGITIMATE_ADDRESS	(	MODE,
		X,
		LABEL		)

Definition at line 2069 of file arm.h.

#define ARM_GO_IF_LEGITIMATE_INDEX	(	MODE,
		BASE_REGNO,
		INDEX,
		LABEL		)

Definition at line 2011 of file arm.h.

Referenced by legitimize_pic_address().

#define ARM_GO_IF_MODE_DEPENDENT_ADDRESS	(	ADDR,
		LABEL		)

Value:

{                 \
  if (   GET_CODE (ADDR) == PRE_DEC || GET_CODE (ADDR) == POST_DEC  \
      || GET_CODE (ADDR) == PRE_INC || GET_CODE (ADDR) == POST_INC) \
    goto LABEL;               \
}

Definition at line 2321 of file arm.h.

#define ARM_HARD_FRAME_POINTER_REGNUM   11

Definition at line 956 of file arm.h.

Referenced by arm_compute_initial_elimination_offset(), arm_compute_save_reg_mask(), thumb_compute_initial_elimination_offset(), thumb_compute_save_reg_mask(), thumb_exit(), thumb_expand_prologue(), and thumb_output_function_prologue().

#define ARM_INDEX_REGISTER_RTX_P

(

X

)

(GET_CODE (X) == REG && ARM_REG_OK_FOR_INDEX_P (X))

Definition at line 2005 of file arm.h.

#define ARM_INITIAL_ELIMINATION_OFFSET	(	FROM,
		TO,
		OFFSET		)

Value:

do                  \
    {                 \
      (OFFSET) = arm_compute_initial_elimination_offset (FROM, TO); \
    }                 \
  while (0)

Definition at line 1662 of file arm.h.

#define ARM_INVERSE_CONDITION_CODE

(

X

)

((arm_cc) (((int)X) ^ 1))

Definition at line 65 of file arm.h.

Referenced by arm_final_prescan_insn(), arm_print_operand(), and get_arm_condition_code().

#define ARM_LEGITIMATE_CONSTANT_P

(

X

)

(flag_pic || ! label_mentioned_p (X))

Definition at line 1849 of file arm.h.

#define ARM_LEGITIMIZE_ADDRESS	(	X,
		OLDX,
		MODE,
		WIN		)

Definition at line 2247 of file arm.h.

#define ARM_LEGITIMIZE_RELOAD_ADDRESS	(	X,
		MODE,
		OPNUM,
		TYPE,
		IND,
		WIN		)

Definition at line 1241 of file arm.h.

#define ARM_MCOUNT_NAME   "*mcount"

Definition at line 1556 of file arm.h.

#define ARM_NAME_ENCODING_LENGTHS

Value:

case SHORT_CALL_FLAG_CHAR: return 1;    \
  case LONG_CALL_FLAG_CHAR:  return 1;    \
  case '*':  return 1;        \
  SUBTARGET_NAME_ENCODING_LENGTHS

Definition at line 1880 of file arm.h.

Referenced by arm_get_strip_length().

#define ARM_PRINT_OPERAND_ADDRESS	(	STREAM,
		X		)

Definition at line 2667 of file arm.h.

#define arm_prog_mode   ((enum attr_prog_mode) arm_prgmode)

Definition at line 529 of file arm.h.

#define ARM_REG_OK_FOR_BASE_P

(

X

)

Value:

(REGNO (X) <= LAST_ARM_REGNUM     \
   || REGNO (X) >= FIRST_PSEUDO_REGISTER  \
   || REGNO (X) == FRAME_POINTER_REGNUM   \
   || REGNO (X) == ARG_POINTER_REGNUM)

Definition at line 1948 of file arm.h.

#define ARM_REG_OK_FOR_INDEX_P

(

X

)

ARM_REG_OK_FOR_BASE_P (X)

Definition at line 1979 of file arm.h.

#define ARM_REGNO_OK_FOR_BASE_P

(

REGNO

)

Value:

(TEST_REGNO (REGNO, <, PC_REGNUM)     \
   || TEST_REGNO (REGNO, ==, FRAME_POINTER_REGNUM)  \
   || TEST_REGNO (REGNO, ==, ARG_POINTER_REGNUM))

Definition at line 1800 of file arm.h.

Referenced by arm_address_register_rtx_p().

#define ARM_SIGN_EXTEND

(

x

)

Value:

((HOST_WIDE_INT)      \
  (HOST_BITS_PER_WIDE_INT <= 32 ? (unsigned HOST_WIDE_INT) (x)  \
   : ((((unsigned HOST_WIDE_INT)(x)) & (unsigned HOST_WIDE_INT) 0xffffffff) |\
      ((((unsigned HOST_WIDE_INT)(x)) & (unsigned HOST_WIDE_INT) 0x80000000) \
       ? ((~ (unsigned HOST_WIDE_INT) 0)      \
    & ~ (unsigned HOST_WIDE_INT) 0xffffffff)    \
       : 0))))

Definition at line 2658 of file arm.h.

Referenced by arm_gen_constant(), arm_print_operand(), const_ok_for_op(), and output_move_double().

#define ARM_TRAMPOLINE_TEMPLATE

(

FILE

)

Value:

{               \
  asm_fprintf (FILE, "\tldr\t%r, [%r, #0]\n",     \
         STATIC_CHAIN_REGNUM, PC_REGNUM);     \
  asm_fprintf (FILE, "\tldr\t%r, [%r, #0]\n",     \
         PC_REGNUM, PC_REGNUM);       \
  assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);  \
  assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);  \
}

Definition at line 1726 of file arm.h.

#define ASM_APP_OFF   (TARGET_THUMB ? "\t.code\t16\n" : "")

Definition at line 2542 of file arm.h.

#define ASM_FPRINTF_EXTENSIONS	(	FILE,
		ARGS,
		P		)

Value:

case '@':           \
    fputs (ASM_COMMENT_START, FILE);      \
    break;            \
              \
  case 'r':           \
    fputs (REGISTER_PREFIX, FILE);      \
    fputs (reg_names [va_arg (ARGS, int)], FILE); \
    break;

Definition at line 878 of file arm.h.

Referenced by asm_fprintf(), and VPARAMS().

#define ASM_OUTPUT_CASE_LABEL	(	FILE,
		PREFIX,
		NUM,
		JUMPTABLE		)

Value:

do                \
    {               \
      if (TARGET_THUMB)           \
        ASM_OUTPUT_ALIGN (FILE, 2);       \
      ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM);    \
    }               \
  while (0)

Definition at line 2582 of file arm.h.

#define ASM_OUTPUT_DEF_FROM_DECLS	(	FILE,
		DECL1,
		DECL2		)

Value:

do                  \
    {               \
      const char *const LABEL1 = XSTR (XEXP (DECL_RTL (decl), 0), 0); \
      const char *const LABEL2 = IDENTIFIER_POINTER (DECL2);  \
                \
      if (TARGET_THUMB && TREE_CODE (DECL1) == FUNCTION_DECL) \
  {             \
    fprintf (FILE, "\t.thumb_set ");      \
    assemble_name (FILE, LABEL1);         \
    fprintf (FILE, ",");            \
    assemble_name (FILE, LABEL2);         \
    fprintf (FILE, "\n");         \
  }             \
      else              \
  ASM_OUTPUT_DEF (FILE, LABEL1, LABEL2);      \
    }               \
  while (0)

Definition at line 2607 of file arm.h.

#define ASM_OUTPUT_INTERNAL_LABEL	(	STREAM,
		PREFIX,
		NUM		)

Value:

do                \
    {               \
      char * s = (char *) alloca (40 + strlen (PREFIX));  \
                \
      if (arm_ccfsm_state == 3 && arm_target_label == (NUM) \
    && !strcmp (PREFIX, "L"))       \
  {             \
    arm_ccfsm_state = 0;          \
    arm_target_insn = NULL;       \
  }             \
      ASM_GENERATE_INTERNAL_LABEL (s, (PREFIX), (NUM));   \
      ASM_OUTPUT_LABEL (STREAM, s);                   \
    }               \
  while (0)

Definition at line 2546 of file arm.h.

#define ASM_OUTPUT_LABELREF	(	FILE,
		NAME		)	asm_fprintf (FILE, "%U%s", arm_strip_name_encoding (NAME))

Definition at line 1895 of file arm.h.

#define ASM_OUTPUT_MI_THUNK	(	FILE,
		THUNK_FNDECL,
		DELTA,
		FUNCTION		)

Value:

do                    \
    {                   \
      int mi_delta = (DELTA);             \
      const char *const mi_op = mi_delta < 0 ? "sub" : "add";     \
      int shift = 0;                \
      int this_regno = (aggregate_value_p (TREE_TYPE (TREE_TYPE (FUNCTION)))  \
            ? 1 : 0);           \
      if (mi_delta < 0)               \
        mi_delta = - mi_delta;              \
      while (mi_delta != 0)             \
        {                 \
          if ((mi_delta & (3 << shift)) == 0)         \
      shift += 2;               \
          else                  \
      {                 \
        asm_fprintf (FILE, "\t%s\t%r, %r, #%d\n",       \
               mi_op, this_regno, this_regno,     \
               mi_delta & (0xff << shift));       \
        mi_delta &= ~(0xff << shift);         \
        shift += 8;             \
      }                 \
        }                 \
      fputs ("\tb\t", FILE);              \
      assemble_name (FILE, XSTR (XEXP (DECL_RTL (FUNCTION), 0), 0));    \
      if (NEED_PLT_RELOC)             \
        fputs ("(PLT)", FILE);              \
      fputc ('\n', FILE);             \
    }                   \
  while (0)

Definition at line 2771 of file arm.h.

#define ASM_OUTPUT_REG_POP	(	STREAM,
		REGNO		)

Value:

if (TARGET_ARM)         \
    asm_fprintf (STREAM, "\tldmfd\t%r!,{%r}\n",   \
                 STACK_POINTER_REGNUM, REGNO);    \
  else              \
    asm_fprintf (STREAM, "\tpop {%r}\n", REGNO)

Definition at line 2572 of file arm.h.

#define ASM_OUTPUT_REG_PUSH	(	STREAM,
		REGNO		)

Value:

if (TARGET_ARM)         \
    asm_fprintf (STREAM,"\tstmfd\t%r!,{%r}\n",    \
     STACK_POINTER_REGNUM, REGNO);    \
  else              \
    asm_fprintf (STREAM, "\tpush {%r}\n", REGNO)

Definition at line 2564 of file arm.h.

#define BASE_REG_CLASS   (TARGET_THUMB ? LO_REGS : GENERAL_REGS)

Definition at line 1096 of file arm.h.

#define BIGGEST_ALIGNMENT   32

Definition at line 721 of file arm.h.

#define BITS_BIG_ENDIAN   0

Definition at line 674 of file arm.h.

#define BITS_PER_UNIT   8

Definition at line 700 of file arm.h.

#define BITS_PER_WORD   32

Definition at line 702 of file arm.h.

#define BRANCH_COST   (TARGET_ARM ? 4 : (optimize > 1 ? 1 : 0))

Definition at line 2446 of file arm.h.

#define BYTES_BIG_ENDIAN   (TARGET_BIG_END != 0)

Definition at line 680 of file arm.h.

#define CALL_LONG   0x00000001

Definition at line 1411 of file arm.h.

Referenced by arm_function_ok_for_sibcall(), arm_init_cumulative_args(), arm_is_longcall_p(), bfin_longcall_p(), and init_cumulative_args().

#define CALL_NORMAL   0x00000000

Definition at line 1410 of file arm.h.

Referenced by arm_function_ok_for_sibcall(), arm_init_cumulative_args(), and init_cumulative_args().

#define CALL_SHORT   0x00000002

Definition at line 1412 of file arm.h.

Referenced by arm_function_ok_for_sibcall(), arm_init_cumulative_args(), arm_is_longcall_p(), bfin_longcall_p(), and init_cumulative_args().

#define CALL_USED_REGISTERS

Value:

{                            \
  1,1,1,1,0,0,0,0,       \
  0,0,0,0,1,1,1,1,       \
  1,1,1,1,0,0,0,0,       \
  1,1,1          \
}

Definition at line 834 of file arm.h.

#define CAN_DEBUG_WITHOUT_FP

Definition at line 591 of file arm.h.

#define CAN_ELIMINATE	(	FROM,
		TO		)

Value:

(((TO) == FRAME_POINTER_REGNUM && (FROM) == ARG_POINTER_REGNUM) ? 0 : \
   ((TO) == STACK_POINTER_REGNUM && frame_pointer_needed) ? 0 :   \
   ((TO) == ARM_HARD_FRAME_POINTER_REGNUM && TARGET_THUMB) ? 0 :  \
   ((TO) == THUMB_HARD_FRAME_POINTER_REGNUM && TARGET_ARM) ? 0 :  \
   1)

Definition at line 1653 of file arm.h.

#define CANONICALIZE_COMPARISON	(	CODE,
		OP0,
		OP1		)

Value:

do                  \
    {                 \
      if (GET_CODE (OP1) == CONST_INT         \
          && ! (const_ok_for_arm (INTVAL (OP1))       \
          || (const_ok_for_arm (- INTVAL (OP1)))))    \
        {               \
          rtx const_op = OP1;           \
          CODE = arm_canonicalize_comparison ((CODE), &const_op); \
          OP1 = const_op;           \
        }               \
    }                 \
  while (0)

Definition at line 2516 of file arm.h.

#define CASE_VECTOR_MODE   Pmode

Definition at line 2336 of file arm.h.

#define CC1_SPEC   ""

Definition at line 262 of file arm.h.

#define CLASS_MAX_NREGS	(	CLASS,
		MODE		)	((CLASS) == FPU_REGS ? 1 : NUM_REGS (MODE))

Definition at line 1325 of file arm.h.

#define CONDITIONAL_REGISTER_USAGE

Value:

{               \
  int regno;              \
                \
  if (TARGET_SOFT_FLOAT || TARGET_THUMB)      \
    {               \
      for (regno = FIRST_ARM_FP_REGNUM;       \
     regno <= LAST_ARM_FP_REGNUM; ++regno)    \
  fixed_regs[regno] = call_used_regs[regno] = 1;    \
    }               \
  if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)    \
    {               \
      fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1;      \
      call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;    \
    }               \
  else if (TARGET_APCS_STACK)         \
    {               \
      fixed_regs[10]     = 1;         \
      call_used_regs[10] = 1;         \
    }               \
  if (TARGET_APCS_FRAME)          \
    {               \
      fixed_regs[ARM_HARD_FRAME_POINTER_REGNUM] = 1;    \
      call_used_regs[ARM_HARD_FRAME_POINTER_REGNUM] = 1;  \
    }               \
  SUBTARGET_CONDITIONAL_REGISTER_USAGE        \
}

Definition at line 846 of file arm.h.

#define CONST_DOUBLE_OK_FOR_ARM_LETTER	(	X,
		C		)

Value:

((C) == 'G' ? const_double_rtx_ok_for_fpu (X) :   \
     (C) == 'H' ? neg_const_double_rtx_ok_for_fpu (X) : 0)

Definition at line 1162 of file arm.h.

#define CONST_DOUBLE_OK_FOR_LETTER_P	(	X,
		C		)

Value:

(TARGET_ARM ?             \
   CONST_DOUBLE_OK_FOR_ARM_LETTER (X, C) : 0)

Definition at line 1166 of file arm.h.

#define CONST_OK_FOR_ARM_LETTER	(	VALUE,
		C		)

Value:

((C) == 'I' ? const_ok_for_arm (VALUE) :    \
   (C) == 'J' ? ((VALUE) < 4096 && (VALUE) > -4096) : \
   (C) == 'K' ? (const_ok_for_arm (~(VALUE))) :   \
   (C) == 'L' ? (const_ok_for_arm (-(VALUE))) :   \
   (C) == 'M' ? (((VALUE >= 0 && VALUE <= 32))    \
     || (((VALUE) & ((VALUE) - 1)) == 0)) \
   : 0)

Definition at line 1136 of file arm.h.

#define CONST_OK_FOR_LETTER_P	(	VALUE,
		C		)

Value:

(TARGET_ARM ?               \
   CONST_OK_FOR_ARM_LETTER (VALUE, C) : CONST_OK_FOR_THUMB_LETTER (VALUE, C))

Definition at line 1156 of file arm.h.

#define CONST_OK_FOR_THUMB_LETTER	(	VAL,
		C		)

Value:

((C) == 'I' ? (unsigned HOST_WIDE_INT) (VAL) < 256 :  \
   (C) == 'J' ? (VAL) > -256 && (VAL) < 0 :   \
   (C) == 'K' ? thumb_shiftable_const (VAL) :   \
   (C) == 'L' ? (VAL) > -8 && (VAL) < 8 :   \
   (C) == 'M' ? ((unsigned HOST_WIDE_INT) (VAL) < 1024  \
       && ((VAL) & 3) == 0) :   \
   (C) == 'N' ? ((unsigned HOST_WIDE_INT) (VAL) < 32) : \
   (C) == 'O' ? ((VAL) >= -508 && (VAL) <= 508)   \
   : 0)

Definition at line 1145 of file arm.h.

#define CONSTANT_ADDRESS_P

(

X

)

Value:

(GET_CODE (X) == SYMBOL_REF       \
   && (CONSTANT_POOL_ADDRESS_P (X)    \
       || (TARGET_ARM && optimize > 0 && SYMBOL_REF_FLAG (X))))

Definition at line 1834 of file arm.h.

#define CONSTANT_ALIGNMENT	(	EXP,
		ALIGN		)

Value:

((TREE_CODE (EXP) == STRING_CST       \
    && (ALIGN) < BITS_PER_WORD * CONSTANT_ALIGNMENT_FACTOR) \
   ? BITS_PER_WORD * CONSTANT_ALIGNMENT_FACTOR : (ALIGN))

Definition at line 726 of file arm.h.

#define CONSTANT_ALIGNMENT_FACTOR   (TARGET_THUMB || ! arm_is_xscale ? 1 : 2)

Definition at line 724 of file arm.h.

#define CPP_APCS_PC_DEFAULT_SPEC   "-D__APCS_26__"

Definition at line 218 of file arm.h.

#define CPP_APCS_PC_SPEC   "\%{mapcs-32:%{mapcs-26:%e-mapcs-26 and -mapcs-32 may not be used together} \ -D__APCS_32__} \%{mapcs-26:-D__APCS_26__} \%{!mapcs-32: %{!mapcs-26:%(cpp_apcs_pc_default)}} \"

Definition at line 210 of file arm.h.

#define CPP_ARCH_DEFAULT_SPEC   "-D__ARM_ARCH_3__"

Definition at line 106 of file arm.h.

#define CPP_CPU_ARCH_SPEC   "\-Acpu=arm -Amachine=arm \%{march=arm2:-D__ARM_ARCH_2__} \%{march=arm250:-D__ARM_ARCH_2__} \%{march=arm3:-D__ARM_ARCH_2__} \%{march=arm6:-D__ARM_ARCH_3__} \%{march=arm600:-D__ARM_ARCH_3__} \%{march=arm610:-D__ARM_ARCH_3__} \%{march=arm7:-D__ARM_ARCH_3__} \%{march=arm700:-D__ARM_ARCH_3__} \%{march=arm710:-D__ARM_ARCH_3__} \%{march=arm720:-D__ARM_ARCH_3__} \%{march=arm7100:-D__ARM_ARCH_3__} \%{march=arm7500:-D__ARM_ARCH_3__} \%{march=arm7500fe:-D__ARM_ARCH_3__} \%{march=arm7m:-D__ARM_ARCH_3M__} \%{march=arm7dm:-D__ARM_ARCH_3M__} \%{march=arm7dmi:-D__ARM_ARCH_3M__} \%{march=arm7tdmi:-D__ARM_ARCH_4T__} \%{march=arm8:-D__ARM_ARCH_4__} \%{march=arm810:-D__ARM_ARCH_4__} \%{march=arm9:-D__ARM_ARCH_4T__} \%{march=arm920:-D__ARM_ARCH_4__} \%{march=arm920t:-D__ARM_ARCH_4T__} \%{march=arm9tdmi:-D__ARM_ARCH_4T__} \%{march=strongarm:-D__ARM_ARCH_4__} \%{march=strongarm110:-D__ARM_ARCH_4__} \%{march=strongarm1100:-D__ARM_ARCH_4__} \%{march=xscale:-D__ARM_ARCH_5TE__} \%{march=xscale:-D__XSCALE__} \%{march=armv2:-D__ARM_ARCH_2__} \%{march=armv2a:-D__ARM_ARCH_2__} \%{march=armv3:-D__ARM_ARCH_3__} \%{march=armv3m:-D__ARM_ARCH_3M__} \%{march=armv4:-D__ARM_ARCH_4__} \%{march=armv4t:-D__ARM_ARCH_4T__} \%{march=armv5:-D__ARM_ARCH_5__} \%{march=armv5t:-D__ARM_ARCH_5T__} \%{march=armv5e:-D__ARM_ARCH_5E__} \%{march=armv5te:-D__ARM_ARCH_5TE__} \%{!march=*: \ %{mcpu=arm2:-D__ARM_ARCH_2__} \ %{mcpu=arm250:-D__ARM_ARCH_2__} \ %{mcpu=arm3:-D__ARM_ARCH_2__} \ %{mcpu=arm6:-D__ARM_ARCH_3__} \ %{mcpu=arm600:-D__ARM_ARCH_3__} \ %{mcpu=arm610:-D__ARM_ARCH_3__} \ %{mcpu=arm7:-D__ARM_ARCH_3__} \ %{mcpu=arm700:-D__ARM_ARCH_3__} \ %{mcpu=arm710:-D__ARM_ARCH_3__} \ %{mcpu=arm720:-D__ARM_ARCH_3__} \ %{mcpu=arm7100:-D__ARM_ARCH_3__} \ %{mcpu=arm7500:-D__ARM_ARCH_3__} \ %{mcpu=arm7500fe:-D__ARM_ARCH_3__} \ %{mcpu=arm7m:-D__ARM_ARCH_3M__} \ %{mcpu=arm7dm:-D__ARM_ARCH_3M__} \ %{mcpu=arm7dmi:-D__ARM_ARCH_3M__} \ %{mcpu=arm7tdmi:-D__ARM_ARCH_4T__} \ %{mcpu=arm8:-D__ARM_ARCH_4__} \ %{mcpu=arm810:-D__ARM_ARCH_4__} \ %{mcpu=arm9:-D__ARM_ARCH_4T__} \ %{mcpu=arm920:-D__ARM_ARCH_4__} \ %{mcpu=arm920t:-D__ARM_ARCH_4T__} \ %{mcpu=arm9tdmi:-D__ARM_ARCH_4T__} \ %{mcpu=strongarm:-D__ARM_ARCH_4__} \ %{mcpu=strongarm110:-D__ARM_ARCH_4__} \ %{mcpu=strongarm1100:-D__ARM_ARCH_4__} \ %{mcpu=xscale:-D__ARM_ARCH_5TE__} \ %{mcpu=xscale:-D__XSCALE__} \ %{!mcpu*:%(cpp_cpu_arch_default)}} \"

Definition at line 137 of file arm.h.

#define CPP_ENDIAN_DEFAULT_SPEC   "-D__ARMEL__ %{mthumb:-D__THUMBEL__}"

Definition at line 241 of file arm.h.

#define CPP_ENDIAN_SPEC   "\%{mbig-endian: \ %{mlittle-endian: \ %e-mbig-endian and -mlittle-endian may not be used together} \ -D__ARMEB__ %{mwords-little-endian:-D__ARMWEL__} %{mthumb:-D__THUMBEB__}}\%{mlittle-endian:-D__ARMEL__ %{mthumb:-D__THUMBEL__}} \%{!mlittle-endian:%{!mbig-endian:%(cpp_endian_default)}} \"

Definition at line 231 of file arm.h.

#define CPP_FLOAT_DEFAULT_SPEC   ""

Definition at line 229 of file arm.h.

#define CPP_FLOAT_SPEC   "\%{msoft-float:\ %{mhard-float:%e-msoft-float and -mhard_float may not be used together} \ -D__SOFTFP__} \%{!mhard-float:%{!msoft-float:%(cpp_float_default)}} \"

Definition at line 221 of file arm.h.

#define CPP_INTERWORK_DEFAULT_SPEC   ""

Definition at line 247 of file arm.h.

#define CPP_INTERWORK_SPEC   " \%{mthumb-interwork: \ %{mno-thumb-interwork: %eincompatible interworking options} \ -D__THUMB_INTERWORK__} \%{!mthumb-interwork:%{!mno-thumb-interwork:%(cpp_interwork_default)}} \"

Definition at line 250 of file arm.h.

#define CPP_ISA_SPEC   "%{mthumb:-D__thumb__} %{!mthumb:-D__arm__}"

Definition at line 133 of file arm.h.

#define CPP_PREDEFINES   ""

Definition at line 258 of file arm.h.

#define CPP_SPEC   "\%(cpp_cpu_arch) %(cpp_apcs_pc) %(cpp_float) \%(cpp_endian) %(subtarget_cpp_spec) %(cpp_isa) %(cpp_interwork)"

Definition at line 129 of file arm.h.

#define DEBUGGER_ARG_OFFSET	(	value,
		addr		)	value ? value : arm_debugger_arg_offset (value, addr)

Definition at line 1710 of file arm.h.

#define DEFAULT_PCC_STRUCT_RETURN   0

Definition at line 1407 of file arm.h.

#define DEFAULT_RTX_COSTS	(	X,
		CODE,
		OUTER_CODE		)	return arm_rtx_costs (X, CODE, OUTER_CODE);

Definition at line 2406 of file arm.h.

Referenced by rtx_cost().

#define DEFAULT_SIGNED_CHAR   0

Definition at line 2347 of file arm.h.

#define DEFAULT_STRUCTURE_SIZE_BOUNDARY   32

Definition at line 745 of file arm.h.

#define DWARF_FRAME_RETURN_COLUMN   DWARF_FRAME_REGNUM (LR_REGNUM)

Definition at line 2816 of file arm.h.

#define ELIMINABLE_REGS

Value:

{{ ARG_POINTER_REGNUM,        STACK_POINTER_REGNUM            },\
 { ARG_POINTER_REGNUM,        FRAME_POINTER_REGNUM            },\
 { ARG_POINTER_REGNUM,        ARM_HARD_FRAME_POINTER_REGNUM   },\
 { ARG_POINTER_REGNUM,        THUMB_HARD_FRAME_POINTER_REGNUM },\
 { FRAME_POINTER_REGNUM,      STACK_POINTER_REGNUM            },\
 { FRAME_POINTER_REGNUM,      ARM_HARD_FRAME_POINTER_REGNUM   },\
 { FRAME_POINTER_REGNUM,      THUMB_HARD_FRAME_POINTER_REGNUM }}

Definition at line 1636 of file arm.h.

#define EMPTY_FIELD_BOUNDARY   32

Definition at line 719 of file arm.h.

#define ENABLE_XF_PATTERNS   0

Definition at line 664 of file arm.h.

#define ENCODE_SECTION_INFO

(

decl

)

Value:

{                 \
  if (optimize > 0 && TREE_CONSTANT (decl)        \
      && (!flag_writable_strings || TREE_CODE (decl) != STRING_CST))  \
    {                 \
      rtx rtl = (TREE_CODE_CLASS (TREE_CODE (decl)) != 'd'    \
                 ? TREE_CST_RTL (decl) : DECL_RTL (decl));    \
      SYMBOL_REF_FLAG (XEXP (rtl, 0)) = 1;        \
    }                 \
  ARM_ENCODE_CALL_TYPE (decl)           \
}

Definition at line 1919 of file arm.h.

#define ENCODED_LONG_CALL_ATTR_P

(

SYMBOL_NAME

)

(*(SYMBOL_NAME) == LONG_CALL_FLAG_CHAR)

Definition at line 1869 of file arm.h.

Referenced by arm_is_longcall_p().

#define ENCODED_SHORT_CALL_ATTR_P

(

SYMBOL_NAME

)

(*(SYMBOL_NAME) == SHORT_CALL_FLAG_CHAR)

Definition at line 1866 of file arm.h.

Referenced by arm_assemble_integer(), current_file_function_operand(), and legitimize_pic_address().

#define EPILOGUE_USES

(

REGNO

)

(reload_completed && (REGNO) == LR_REGNUM)

Definition at line 1615 of file arm.h.

#define EXCEPTION_LR_REGNUM   2

Definition at line 933 of file arm.h.

Referenced by arm_output_epilogue().

#define EXIT_IGNORE_STACK   1

Definition at line 1613 of file arm.h.

#define EXTRA_CC_MODES

Value:

CC(CC_NOOVmode, "CC_NOOV") \
        CC(CC_Zmode, "CC_Z") \
        CC(CC_SWPmode, "CC_SWP") \
        CC(CCFPmode, "CCFP") \
        CC(CCFPEmode, "CCFPE") \
        CC(CC_DNEmode, "CC_DNE") \
        CC(CC_DEQmode, "CC_DEQ") \
        CC(CC_DLEmode, "CC_DLE") \
        CC(CC_DLTmode, "CC_DLT") \
        CC(CC_DGEmode, "CC_DGE") \
        CC(CC_DGTmode, "CC_DGT") \
        CC(CC_DLEUmode, "CC_DLEU") \
        CC(CC_DLTUmode, "CC_DLTU") \
        CC(CC_DGEUmode, "CC_DGEU") \
        CC(CC_DGTUmode, "CC_DGTU") \
        CC(CC_Cmode, "CC_C")

Definition at line 2494 of file arm.h.

#define EXTRA_CONSTRAINT	(	X,
		C		)

Value:

(TARGET_ARM ?               \
   EXTRA_CONSTRAINT_ARM (X, C) : EXTRA_CONSTRAINT_THUMB (X, C))

Definition at line 1188 of file arm.h.

#define EXTRA_CONSTRAINT_ARM	(	OP,
		C		)

Value:

((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG :    \
   (C) == 'R' ? (GET_CODE (OP) == MEM             \
     && GET_CODE (XEXP (OP, 0)) == SYMBOL_REF       \
     && CONSTANT_POOL_ADDRESS_P (XEXP (OP, 0))) :       \
   (C) == 'S' ? (optimize > 0 && CONSTANT_ADDRESS_P (OP))       \
   : 0)

Definition at line 1176 of file arm.h.

#define EXTRA_CONSTRAINT_THUMB	(	X,
		C		)

Value:

((C) == 'Q' ? (GET_CODE (X) == MEM          \
     && GET_CODE (XEXP (X, 0)) == LABEL_REF) : 0)

Definition at line 1184 of file arm.h.

#define EXTRA_SPECS

Value:

{ "cpp_cpu_arch",   CPP_CPU_ARCH_SPEC },    \
  { "cpp_cpu_arch_default", CPP_ARCH_DEFAULT_SPEC },  \
  { "cpp_apcs_pc",    CPP_APCS_PC_SPEC },   \
  { "cpp_apcs_pc_default",  CPP_APCS_PC_DEFAULT_SPEC }, \
  { "cpp_float",    CPP_FLOAT_SPEC },   \
  { "cpp_float_default",  CPP_FLOAT_DEFAULT_SPEC }, \
  { "cpp_endian",   CPP_ENDIAN_SPEC },    \
  { "cpp_endian_default", CPP_ENDIAN_DEFAULT_SPEC },  \
  { "cpp_isa",      CPP_ISA_SPEC },     \
  { "cpp_interwork",    CPP_INTERWORK_SPEC },   \
  { "cpp_interwork_default",  CPP_INTERWORK_DEFAULT_SPEC }, \
  { "subtarget_cpp_spec", SUBTARGET_CPP_SPEC },           \
  SUBTARGET_EXTRA_SPECS

Definition at line 274 of file arm.h.

#define FINAL_PRESCAN_INSN	(	INSN,
		OPVEC,
		NOPERANDS		)

Value:

if (TARGET_ARM && optimize)       \
    arm_final_prescan_insn (INSN);      \
  else if (TARGET_THUMB)        \
    thumb_final_prescan_insn (INSN)

Definition at line 2643 of file arm.h.

#define FINALIZE_PIC   arm_finalize_pic (1)

Definition at line 2462 of file arm.h.

#define FIRST_ARM_FP_REGNUM   16

Definition at line 970 of file arm.h.

Referenced by arm_compute_initial_elimination_offset(), arm_expand_prologue(), arm_hard_regno_mode_ok(), arm_output_epilogue(), and use_return_insn().

#define FIRST_PARM_OFFSET

(

FNDECL

)

(TARGET_ARM ? 4 : 0)

Definition at line 1366 of file arm.h.

#define FIRST_PSEUDO_REGISTER   27

Definition at line 980 of file arm.h.

#define FIXED_REGISTERS

Value:

{                        \
  0,0,0,0,0,0,0,0,   \
  0,0,0,0,0,1,0,1,   \
  0,0,0,0,0,0,0,0,   \
  1,1,1      \
}

Definition at line 818 of file arm.h.

#define FLOAT_WORDS_BIG_ENDIAN   1

Definition at line 697 of file arm.h.

Referenced by decode_c4x_extended(), decode_decimal128(), decode_decimal32(), decode_decimal64(), decode_i370_double(), decode_ieee_double(), decode_ieee_extended(), decode_ieee_extended_128(), decode_ieee_extended_intel_96(), decode_ieee_quad(), decode_vax_d(), decode_vax_g(), encode_c4x_extended(), encode_decimal128(), encode_decimal32(), encode_decimal64(), encode_i370_double(), encode_ibm_extended(), encode_ieee_double(), encode_ieee_extended(), encode_ieee_extended_128(), encode_ieee_extended_intel_96(), encode_ieee_quad(), encode_vax_d(), encode_vax_g(), expand_absneg_bit(), expand_builtin_signbit(), expand_copysign_absneg(), expand_copysign_bit(), find_constant_index(), ia64_split_tmode(), and write_real_cst().

#define FP_DEFAULT   FP_SOFT2

Definition at line 554 of file arm.h.

Referenced by arm_override_options().

#define FP_REGNUM   HARD_FRAME_POINTER_REGNUM

Definition at line 964 of file arm.h.

Referenced by arm_output_epilogue().

#define FRAME_GROWS_DOWNWARD   1

Definition at line 1346 of file arm.h.

#define FRAME_POINTER_REGNUM   25

Definition at line 974 of file arm.h.

#define FRAME_POINTER_REQUIRED

Value:

(current_function_has_nonlocal_label        \
   || (TARGET_ARM && TARGET_APCS_FRAME && ! leaf_function_p ()))

Definition at line 988 of file arm.h.

#define FUNCTION_ARG	(	CUM,
		MODE,
		TYPE,
		NAMED		)	arm_function_arg (&(CUM), (MODE), (TYPE), (NAMED))

Definition at line 1497 of file arm.h.

#define FUNCTION_ARG_ADVANCE	(	CUM,
		MODE,
		TYPE,
		NAMED		)	(CUM).nregs += NUM_REGS2 (MODE, TYPE)

Definition at line 1518 of file arm.h.

#define FUNCTION_ARG_PARTIAL_NREGS	(	CUM,
		MODE,
		TYPE,
		NAMED		)

Value:

(    NUM_ARG_REGS > (CUM).nregs       \
   && (NUM_ARG_REGS < ((CUM).nregs + NUM_REGS2 (MODE, TYPE))) \
   ?   NUM_ARG_REGS - (CUM).nregs : 0)

Definition at line 1503 of file arm.h.

#define FUNCTION_ARG_REGNO_P

(

REGNO

)

(IN_RANGE ((REGNO), 0, 3))

Definition at line 1523 of file arm.h.

#define FUNCTION_BOUNDARY   32

Definition at line 712 of file arm.h.

#define FUNCTION_MODE   Pmode

Definition at line 2400 of file arm.h.

#define FUNCTION_OK_FOR_SIBCALL

(

DECL

)

arm_function_ok_for_sibcall ((DECL))

Definition at line 1530 of file arm.h.

#define FUNCTION_PROFILER	(	STREAM,
		LABELNO		)

Value:

if (TARGET_ARM)         \
    ARM_FUNCTION_PROFILER (STREAM, LABELNO)   \
  else              \
    THUMB_FUNCTION_PROFILER (STREAM, LABELNO)

Definition at line 1600 of file arm.h.

#define FUNCTION_VALUE	(	VALTYPE,
		FUNC		)	LIBCALL_VALUE (TYPE_MODE (VALTYPE))

Definition at line 1390 of file arm.h.

#define FUNCTION_VALUE_REGNO_P

(

REGNO

)

Value:

((REGNO) == ARG_REGISTER (1) \
   || (TARGET_ARM && ((REGNO) == FIRST_ARM_FP_REGNUM) && TARGET_HARD_FLOAT))

Definition at line 1395 of file arm.h.

#define GO_IF_LEGITIMATE_ADDRESS	(	MODE,
		X,
		WIN		)

Value:

if (TARGET_ARM)             \
    ARM_GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN)       \
  else /* if (TARGET_THUMB) */            \
    THUMB_GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN)

Definition at line 2224 of file arm.h.

#define GO_IF_MODE_DEPENDENT_ADDRESS	(	ADDR,
		LABEL		)

Value:

if (TARGET_ARM)         \
    ARM_GO_IF_MODE_DEPENDENT_ADDRESS (ADDR, LABEL)

Definition at line 2329 of file arm.h.

#define GOT_PCREL   1

Definition at line 620 of file arm.h.

Referenced by arm_finalize_pic(), and arm_load_pic_register().

#define HARD_FRAME_POINTER_REGNUM

Value:

(TARGET_ARM         \
   ? ARM_HARD_FRAME_POINTER_REGNUM    \
   : THUMB_HARD_FRAME_POINTER_REGNUM)

Definition at line 959 of file arm.h.

#define HARD_REGNO_MODE_OK	(	REGNO,
		MODE		)	arm_hard_regno_mode_ok ((REGNO), (MODE))

Definition at line 1007 of file arm.h.

#define HARD_REGNO_NREGS	(	REGNO,
		MODE		)

Value:

((TARGET_ARM        \
    && REGNO >= FIRST_ARM_FP_REGNUM \
    && REGNO != FRAME_POINTER_REGNUM  \
    && REGNO != ARG_POINTER_REGNUM) \
   ? 1 : NUM_REGS (MODE))

Definition at line 999 of file arm.h.

#define HARD_REGNO_RENAME_OK	(	SRC,
		DST		)

Value:

(! IS_INTERRUPT (cfun->machine->func_type) ||     \
    regs_ever_live[DST])

Definition at line 1034 of file arm.h.

Referenced by regrename_optimize().

#define HAVE_POST_DECREMENT   TARGET_ARM

Definition at line 1786 of file arm.h.

Referenced by can_store_by_pieces(), fixup_match_1(), fold_rtx(), loop_giv_reduce_benefit(), and try_auto_increment().

#define HAVE_POST_INCREMENT   1

Definition at line 1784 of file arm.h.

Referenced by fixup_match_1(), fold_rtx(), loop_giv_reduce_benefit(), move_by_pieces(), move_by_pieces_1(), sh_expand_epilogue(), store_by_pieces(), store_by_pieces_2(), and try_auto_increment().

#define HAVE_PRE_DECREMENT   TARGET_ARM

Definition at line 1787 of file arm.h.

#define HAVE_PRE_INCREMENT   TARGET_ARM

Definition at line 1785 of file arm.h.

#define INCOMING_RETURN_ADDR_RTX   gen_rtx_REG (Pmode, LR_REGNUM)

Definition at line 2815 of file arm.h.

#define INDEX_REG_CLASS   (TARGET_THUMB ? LO_REGS : GENERAL_REGS)

Definition at line 1095 of file arm.h.

#define INIT_CUMULATIVE_ARGS	(	CUM,
		FNTYPE,
		LIBNAME,
		INDIRECT		)	arm_init_cumulative_args (&(CUM), (FNTYPE), (LIBNAME), (INDIRECT))

Definition at line 1512 of file arm.h.

#define INIT_EXPANDERS   arm_init_expanders ()

Definition at line 1714 of file arm.h.

Referenced by init_emit(), and init_emit_once().

#define INITIAL_ELIMINATION_OFFSET	(	FROM,
		TO,
		OFFSET		)

Value:

if (TARGET_ARM)             \
    ARM_INITIAL_ELIMINATION_OFFSET (FROM, TO, OFFSET);      \
  else                  \
    THUMB_INITIAL_ELIMINATION_OFFSET (FROM, TO, OFFSET)

Definition at line 1703 of file arm.h.

#define INITIALIZE_TRAMPOLINE	(	TRAMP,
		FNADDR,
		CXT		)

Value:

{                     \
  emit_move_insn                  \
    (gen_rtx_MEM (SImode, plus_constant (TRAMP, TARGET_ARM ? 8 : 16)), CXT);    \
  emit_move_insn                  \
    (gen_rtx_MEM (SImode, plus_constant (TRAMP, TARGET_ARM ? 12 : 20)), FNADDR);  \
}

Definition at line 1774 of file arm.h.

#define IS_INTERRUPT

(

t

)

(t & ARM_FT_INTERRUPT)

Definition at line 1444 of file arm.h.

Referenced by arm_compute_save_reg0_reg12_mask(), arm_expand_prologue(), arm_function_ok_for_sibcall(), arm_output_epilogue(), output_return_instruction(), thumb_expand_prologue(), and use_return_insn().

#define IS_NAKED

(

t

)

(t & ARM_FT_NAKED)

Definition at line 1446 of file arm.h.

Referenced by arm_compute_save_reg_mask(), arm_expand_prologue(), arm_output_epilogue(), arm_output_function_prologue(), output_return_instruction(), thumb_expand_epilogue(), thumb_expand_prologue(), thumb_output_function_prologue(), and thumb_unexpanded_epilogue().

#define IS_NESTED

(

t

)

(t & ARM_FT_NESTED)

Definition at line 1447 of file arm.h.

Referenced by arm_expand_prologue(), and arm_output_function_prologue().

#define IS_VOLATILE

(

t

)

(t & ARM_FT_VOLATILE)

Definition at line 1445 of file arm.h.

Referenced by arm_compute_initial_elimination_offset(), arm_compute_save_reg_mask(), arm_expand_prologue(), arm_get_frame_offsets(), arm_output_epilogue(), arm_output_function_prologue(), and output_return_instruction().

#define LAST_ARG_REGNUM   ARG_REGISTER (NUM_ARG_REGS)

Definition at line 927 of file arm.h.

Referenced by frv_arg_partial_bytes(), frv_function_arg(), frv_stack_info(), thumb_compute_save_reg_mask(), thumb_exit(), thumb_expand_epilogue(), thumb_expand_prologue(), thumb_find_work_register(), thumb_output_function_prologue(), and thumb_unexpanded_epilogue().

#define LAST_ARM_FP_REGNUM   23

Definition at line 971 of file arm.h.

Referenced by arm_compute_initial_elimination_offset(), arm_expand_prologue(), arm_hard_regno_mode_ok(), arm_output_epilogue(), and use_return_insn().

#define LAST_LO_REGNUM   7

Definition at line 930 of file arm.h.

Referenced by arm_hard_regno_mode_ok(), arm_load_pic_register(), thumb_base_register_rtx_p(), thumb_compute_save_reg_mask(), thumb_expand_prologue(), thumb_find_work_register(), thumb_output_function_prologue(), and thumb_unexpanded_epilogue().

#define LEGITIMATE_CONSTANT_P

(

X

)

(TARGET_ARM ? ARM_LEGITIMATE_CONSTANT_P (X) : THUMB_LEGITIMATE_CONSTANT_P (X))

Definition at line 1857 of file arm.h.

#define LEGITIMATE_PIC_OPERAND_P

(

X

)

Value:

(   ! symbol_mentioned_p (X)          \
   && ! label_mentioned_p (X)         \
   && (! CONSTANT_POOL_ADDRESS_P (X)        \
       || (   ! symbol_mentioned_p (get_pool_constant (X))    \
           && ! label_mentioned_p (get_pool_constant (X)))))

Definition at line 2466 of file arm.h.

Referenced by asm_operand_ok(), find_reloads(), frv_legitimate_constant_p(), general_operand(), immediate_operand(), nonmemory_operand(), output_44(), output_83(), record_reg_classes(), and reload().

#define LEGITIMIZE_ADDRESS	(	X,
		OLDX,
		MODE,
		WIN		)

Value:

if (TARGET_ARM)       \
    ARM_LEGITIMIZE_ADDRESS (X, OLDX, MODE, WIN) \
  else            \
    THUMB_LEGITIMIZE_ADDRESS (X, OLDX, MODE, WIN)

Definition at line 2313 of file arm.h.

#define LEGITIMIZE_RELOAD_ADDRESS	(	X,
		MODE,
		OPNUM,
		TYPE,
		IND_LEVELS,
		WIN		)

Value:

if (TARGET_ARM)                \
    ARM_LEGITIMIZE_RELOAD_ADDRESS (X, MODE, OPNUM, TYPE, IND_LEVELS, WIN); \
  else                     \
    THUMB_LEGITIMIZE_RELOAD_ADDRESS (X, MODE, OPNUM, TYPE, IND_LEVELS, WIN)

Definition at line 1316 of file arm.h.

#define LIBCALL_VALUE

(

MODE

)

Value:

(TARGET_ARM && TARGET_HARD_FLOAT && GET_MODE_CLASS (MODE) == MODE_FLOAT \
   ? gen_rtx_REG (MODE, FIRST_ARM_FP_REGNUM) \
   : gen_rtx_REG (MODE, ARG_REGISTER (1)))

Definition at line 1381 of file arm.h.

#define LIBGCC2_WORDS_BIG_ENDIAN   0

Definition at line 692 of file arm.h.

#define LOAD_EXTEND_OP

(

MODE

)

Value:

(TARGET_THUMB ? ZERO_EXTEND :           \
   ((arm_arch4 || (MODE) == QImode) ? ZERO_EXTEND     \
    : ((BYTES_BIG_ENDIAN && (MODE) == HImode) ? SIGN_EXTEND : NIL)))

Definition at line 2368 of file arm.h.

#define LONG_CALL_FLAG_CHAR   '#'

Definition at line 1864 of file arm.h.

Referenced by arm_encode_section_info().

#define MACHINE_DEPENDENT_REORG

(

INSN

)

arm_reorg (INSN); \

Definition at line 2538 of file arm.h.

#define MASK_RETURN_ADDR

Value:

/* If we are generating code for an ARM2/ARM3 machine or for an ARM6  \
     in 26 bit mode, the condition codes must be masked out of the  \
     return address.  This does not apply to ARM6 and later processors  \
     when running in 32 bit mode.  */         \
  ((!TARGET_APCS_32) ? (GEN_INT (RETURN_ADDR_MASK26))     \
   : (GEN_INT ((unsigned long)0xffffffff)))

Definition at line 2820 of file arm.h.

Referenced by expand_builtin_extract_return_addr(), and return_addr_rtx().

#define MAX_REGS_PER_ADDRESS   2

Definition at line 1822 of file arm.h.

#define MEMORY_MOVE_COST	(	M,
		CLASS,
		IN		)

Value:

(TARGET_ARM ? 10 :          \
   ((GET_MODE_SIZE (M) < 4 ? 8 : 2 * GET_MODE_SIZE (M)) \
    * (CLASS == LO_REGS ? 1 : 2)))

Definition at line 2410 of file arm.h.

#define MODE_BASE_REG_CLASS

(

MODE

)

Value:

(TARGET_ARM ? GENERAL_REGS :          \
     (((MODE) == SImode && !reload_completed) ? BASE_REGS : LO_REGS))

Definition at line 1103 of file arm.h.

Referenced by base_reg_class(), find_reloads(), find_reloads_address(), find_reloads_address_1(), init_caller_save(), init_reg_autoinc(), maybe_fix_stack_asms(), preprocess_constraints(), record_address_regs(), record_operand_costs(), record_reg_classes(), replace_oldest_value_addr(), replace_oldest_value_mem(), scan_one_insn(), scan_rtx(), scan_rtx_address(), and thumb_legitimize_reload_address().

#define MODES_TIEABLE_P	(	MODE1,
		MODE2		)	(GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))

Definition at line 1014 of file arm.h.

#define MOVE_MAX   4

Definition at line 2355 of file arm.h.

#define MOVE_RATIO   (arm_is_xscale ? 4 : 2)

Definition at line 2358 of file arm.h.

#define N_REG_CLASSES   (int) LIM_REG_CLASSES

Definition at line 1056 of file arm.h.

#define NEED_GOT_RELOC   0

Definition at line 602 of file arm.h.

Referenced by arm_assemble_integer(), and legitimize_pic_address().

#define NEED_PLT_RELOC   0

Definition at line 605 of file arm.h.

Referenced by arm_output_epilogue(), arm_output_mi_thunk(), and output_return_instruction().

#define NO_FUNCTION_CSE   1

Definition at line 2393 of file arm.h.

#define NO_RECURSIVE_FUNCTION_CSE   1

Definition at line 2351 of file arm.h.

#define NUM_ARG_REGS   4

Definition at line 904 of file arm.h.

Referenced by arm_arg_partial_bytes(), arm_function_arg(), and arm_setup_incoming_varargs().

#define NUM_INTS

(

X

)

(((X) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)

Definition at line 892 of file arm.h.

Referenced by arm_gen_movstrqi(), and thumb_output_function_prologue().

#define NUM_REGS

(

MODE

)

NUM_INTS (GET_MODE_SIZE (MODE))

Definition at line 895 of file arm.h.

Referenced by add_worklist(), arm_hard_regno_mode_ok(), arm_print_operand(), build_worklists(), combine(), conservative(), decrement_degree(), freeze_moves(), ok(), and rws_access_regno().

#define NUM_REGS2	(	MODE,
		TYPE		)

Value:

NUM_INTS ((MODE) == BLKmode ?     \
  int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE))

Definition at line 899 of file arm.h.

#define OVERRIDE_OPTIONS   arm_override_options ()

Definition at line 596 of file arm.h.

#define PARM_BOUNDARY   32

Definition at line 708 of file arm.h.

#define PIC_OFFSET_TABLE_REGNUM   arm_pic_register

Definition at line 2460 of file arm.h.

#define Pmode   SImode

Definition at line 2399 of file arm.h.

#define POINTER_SIZE   32

Definition at line 706 of file arm.h.

#define PREDICATE_CODES

Definition at line 2827 of file arm.h.

#define PREFERRED_RELOAD_CLASS	(	X,
		CLASS		)

Value:

(TARGET_ARM ? (CLASS) :     \
   ((CLASS) == BASE_REGS ? (CLASS) : LO_REGS))

Definition at line 1196 of file arm.h.

#define PRINT_OPERAND	(	STREAM,
		X,
		CODE		)	arm_print_operand (STREAM, X, CODE)

Definition at line 2655 of file arm.h.

#define PRINT_OPERAND_ADDRESS	(	STREAM,
		X		)

Value:

if (TARGET_ARM)       \
    ARM_PRINT_OPERAND_ADDRESS (STREAM, X) \
  else            \
    THUMB_PRINT_OPERAND_ADDRESS (STREAM, X)

Definition at line 2763 of file arm.h.

#define PRINT_OPERAND_PUNCT_VALID_P

(

CODE

)

Value:

(CODE == '@' || CODE == '|'     \
   || (TARGET_ARM   && (CODE == '?'))   \
   || (TARGET_THUMB && (CODE == '_')))

Definition at line 2649 of file arm.h.

#define PROMOTE_FUNCTION_ARGS

Definition at line 648 of file arm.h.

#define PROMOTE_MODE	(	MODE,
		UNSIGNEDP,
		TYPE		)

Value:

if (GET_MODE_CLASS (MODE) == MODE_INT   \
      && GET_MODE_SIZE (MODE) < 4)        \
    {           \
      if (MODE == QImode)     \
  UNSIGNEDP = 1;        \
      else if (MODE == HImode)      \
  UNSIGNEDP = TARGET_MMU_TRAPS != 0;  \
      (MODE) = SImode;        \
    }

Definition at line 634 of file arm.h.

#define PROMOTE_PROTOTYPES   1

Definition at line 2396 of file arm.h.

#define REAL_ARITHMETIC

Definition at line 670 of file arm.h.

#define REG_ALLOC_ORDER

Value:

{                                   \
     3,  2,  1,  0, 12, 14,  4,  5, \
     6,  7,  8, 10,  9, 11, 13, 15, \
    16, 17, 18, 19, 20, 21, 22, 23, \
    24, 25, 26          \
}

Definition at line 1023 of file arm.h.

#define REG_CLASS_CONTENTS

Value:

{         \
  { 0x0000000 }, /* NO_REGS  */   \
  { 0x0FF0000 }, /* FPU_REGS */   \
  { 0x00000FF }, /* LO_REGS */    \
  { 0x0002000 }, /* STACK_REG */  \
  { 0x00020FF }, /* BASE_REGS */  \
  { 0x000FF00 }, /* HI_REGS */    \
  { 0x1000000 }, /* CC_REG */   \
  { 0x200FFFF }, /* GENERAL_REGS */ \
  { 0x2FFFFFF }  /* ALL_REGS */   \
}

Definition at line 1075 of file arm.h.

#define REG_CLASS_FROM_LETTER

(

C

)

Value:

(  (C) == 'f' ? FPU_REGS    \
   : (C) == 'l' ? (TARGET_ARM ? GENERAL_REGS : LO_REGS) \
   : TARGET_ARM ? NO_REGS   \
   : (C) == 'h' ? HI_REGS   \
   : (C) == 'b' ? BASE_REGS   \
   : (C) == 'k' ? STACK_REG   \
   : (C) == 'c' ? CC_REG    \
   : NO_REGS)

Definition at line 1116 of file arm.h.

#define REG_CLASS_NAMES

Value:

{     \
  "NO_REGS",    \
  "FPU_REGS",   \
  "LO_REGS",    \
  "STACK_REG",    \
  "BASE_REGS",    \
  "HI_REGS",    \
  "CC_REG",   \
  "GENERAL_REGS", \
  "ALL_REGS",   \
}

Definition at line 1059 of file arm.h.

#define REG_MODE_OK_FOR_BASE_P	(	X,
		MODE		)

Value:

(TARGET_THUMB         \
   ? THUMB_REG_MODE_OK_FOR_BASE_P (X, MODE) \
   : ARM_REG_OK_FOR_BASE_P (X))

Definition at line 1974 of file arm.h.

Referenced by arm_coproc_mem_operand(), cirrus_memory_offset(), find_reloads_address(), find_reloads_address_1(), replace_oldest_value_addr(), rs6000_legitimize_reload_address(), and scan_rtx_address().

#define REG_OK_FOR_INDEX_P

(

X

)

Value:

(TARGET_THUMB         \
   ? THUMB_REG_OK_FOR_INDEX_P (X)   \
   : ARM_REG_OK_FOR_INDEX_P (X))

Definition at line 1988 of file arm.h.

#define REGISTER_MOVE_COST	(	MODE,
		FROM,
		TO		)

Value:

(TARGET_ARM ?           \
   ((FROM) == FPU_REGS && (TO) != FPU_REGS ? 20 : \
    (FROM) != FPU_REGS && (TO) == FPU_REGS ? 20 : 2)  \
   :              \
   ((FROM) == HI_REGS || (TO) == HI_REGS) ? 4 : 2)

Definition at line 1329 of file arm.h.

#define REGISTER_TARGET_PRAGMAS

(

PFILE

)

Value:

do { \
  cpp_register_pragma (PFILE, 0, "long_calls", arm_pr_long_calls); \
  cpp_register_pragma (PFILE, 0, "no_long_calls", arm_pr_no_long_calls); \
  cpp_register_pragma (PFILE, 0, "long_calls_off", arm_pr_long_calls_off); \
} while (0)

Definition at line 2479 of file arm.h.

Referenced by init_pragma().

#define REGNO_MODE_OK_FOR_BASE_P	(	REGNO,
		MODE		)

Value:

(TARGET_THUMB           \
   ? THUMB_REGNO_MODE_OK_FOR_BASE_P (REGNO, MODE) \
   : ARM_REGNO_OK_FOR_BASE_P (REGNO))

Definition at line 1810 of file arm.h.

Referenced by find_reloads_address(), find_reloads_address_1(), iq2000_reg_mode_ok_for_base_p(), mips_reg_mode_ok_for_base_p(), and ok_for_base_p_1().

#define REGNO_OK_FOR_INDEX_P

(

REGNO

)

REGNO_MODE_OK_FOR_BASE_P (REGNO, QImode)

Definition at line 1817 of file arm.h.

#define REGNO_REG_CLASS

(

REGNO

)

arm_regno_class (REGNO)

Definition at line 1092 of file arm.h.

#define RETURN_ADDR_MASK26   (0x03fffffc)

Definition at line 2810 of file arm.h.

Referenced by arm_return_addr().

#define RETURN_ADDR_RTX	(	COUNT,
		FRAME		)	arm_return_addr (COUNT, FRAME)

Definition at line 2805 of file arm.h.

#define RETURN_IN_MEMORY

(

TYPE

)

arm_return_in_memory (TYPE)

Definition at line 1402 of file arm.h.

#define RETURN_POPS_ARGS	(	FUNDECL,
		FUNTYPE,
		SIZE		)	0

Definition at line 1377 of file arm.h.

#define REVERSIBLE_CC_MODE

(

MODE

)

((MODE) != CCFPEmode)

Definition at line 2514 of file arm.h.

#define ROUND_UP

(

X

)

(((X) + 3) & ~3)

Definition at line 889 of file arm.h.

Referenced by alloc_large_page(), arm_poke_function_name(), ggc_alloc_zone_1(), ggc_pch_read(), ggc_pch_this_base(), ggc_pch_total_size(), init_ggc(), thumb_expand_epilogue(), and thumb_expand_prologue().

#define SECONDARY_INPUT_RELOAD_CLASS	(	CLASS,
		MODE,
		X		)

Value:

(TARGET_ARM ?             \
   (((MODE) == HImode && ! arm_arch4 && TARGET_MMU_TRAPS  \
     && (GET_CODE (X) == MEM          \
   || ((GET_CODE (X) == REG || GET_CODE (X) == SUBREG)  \
       && true_regnum (X) == -1)))      \
    ? GENERAL_REGS : NO_REGS)         \
   : THUMB_SECONDARY_INPUT_RELOAD_CLASS (CLASS, MODE, X))

Definition at line 1225 of file arm.h.

#define SECONDARY_OUTPUT_RELOAD_CLASS	(	CLASS,
		MODE,
		X		)

Value:

(TARGET_ARM ?             \
   (((MODE) == HImode && ! arm_arch4 && true_regnum (X) == -1)  \
    ? GENERAL_REGS : NO_REGS)         \
   : THUMB_SECONDARY_OUTPUT_RELOAD_CLASS (CLASS, MODE, X))

Definition at line 1218 of file arm.h.

#define SELECT_CC_MODE	(	OP,
		X,
		Y		)	arm_select_cc_mode (OP, X, Y)

Definition at line 2512 of file arm.h.

#define SETUP_INCOMING_VARARGS	(	CUM,
		MODE,
		TYPE,
		PRETEND_SIZE,
		NO_RTL		)

Value:

{                 \
  cfun->machine->uses_anonymous_args = 1;       \
  if ((CUM).nregs < NUM_ARG_REGS)         \
    (PRETEND_SIZE) = (NUM_ARG_REGS - (CUM).nregs) * UNITS_PER_WORD; \
}

Definition at line 1545 of file arm.h.

#define SHORT_CALL_FLAG_CHAR   '^'

Definition at line 1863 of file arm.h.

Referenced by arm_encode_call_attribute(), and arm_encode_section_info().

#define SLOW_BYTE_ACCESS   0

Definition at line 2374 of file arm.h.

#define SLOW_UNALIGNED_ACCESS	(	MODE,
		ALIGN		)	1

Definition at line 2376 of file arm.h.

#define SMALL_REGISTER_CLASSES   TARGET_THUMB

Definition at line 1111 of file arm.h.

Referenced by approx_reg_cost_1(), block_alloc(), canon_hash(), check_cond_move_block(), combine_reloads(), dead_or_predicable(), expand_function_start(), find_reusable_reload(), fixup_var_refs_insn(), hash_rtx(), noce_process_if_block(), optimize_reg_copy_1(), precompute_register_parameters(), prepare_call_address(), push_secondary_reload(), reload_as_needed(), scan_loop(), scan_paradoxical_subregs(), and valid_initial_value_p().

#define SPECIAL_MODE_PREDICATES   "cc_register", "dominant_cc_register",

Definition at line 2866 of file arm.h.

#define STACK_BOUNDARY   32

Definition at line 710 of file arm.h.

#define STACK_GROWS_DOWNWARD   1

Definition at line 1340 of file arm.h.

#define STACK_POINTER_REGNUM   SP_REGNUM

Definition at line 967 of file arm.h.

#define STARTING_FRAME_OFFSET   0

Definition at line 1352 of file arm.h.

#define STATIC_CHAIN_REGNUM   (TARGET_ARM ? 12 : 9)

Definition at line 938 of file arm.h.

#define STORE_FLAG_VALUE   1

Definition at line 2530 of file arm.h.

#define STRICT_ALIGNMENT   1

Definition at line 753 of file arm.h.

#define STRIP_NAME_ENCODING	(	VAR,
		SYMBOL_NAME		)	(VAR) = arm_strip_name_encoding (SYMBOL_NAME)

Definition at line 1889 of file arm.h.

#define STRUCT_VALUE_REGNUM   ARG_REGISTER (1)

Definition at line 920 of file arm.h.

#define STRUCTURE_SIZE_BOUNDARY   arm_structure_size_boundary

Definition at line 737 of file arm.h.

#define SUBTARGET_CPP_SPEC   ""

Definition at line 294 of file arm.h.

#define TARGET_ABORT_NORETURN   (target_flags & ARM_FLAG_ABORT_NORETURN)

Definition at line 400 of file arm.h.

Referenced by arm_output_epilogue(), and output_return_instruction().

#define TARGET_APCS_32   (target_flags & ARM_FLAG_APCS_32)

Definition at line 389 of file arm.h.

Referenced by arm_final_prescan_insn(), arm_output_epilogue(), arm_override_options(), arm_return_addr(), output_return_instruction(), and print_multi_reg().

#define TARGET_APCS_FLOAT   (target_flags & ARM_FLAG_APCS_FLOAT)

Definition at line 391 of file arm.h.

Referenced by arm_override_options().

#define TARGET_APCS_FRAME   (target_flags & ARM_FLAG_APCS_FRAME)

Definition at line 386 of file arm.h.

Referenced by arm_compute_save_reg0_reg12_mask(), and arm_override_options().

#define TARGET_APCS_REENT   (target_flags & ARM_FLAG_APCS_REENT)

Definition at line 392 of file arm.h.

Referenced by arm_override_options().

#define TARGET_APCS_STACK   (target_flags & ARM_FLAG_APCS_STACK)

Definition at line 390 of file arm.h.

Referenced by arm_override_options().

#define TARGET_ARM   (! TARGET_THUMB)

Definition at line 404 of file arm.h.

Referenced by arm_address_cost(), arm_apply_result_size(), arm_call_tls_get_addr(), arm_finalize_pic(), arm_get_frame_offsets(), arm_load_pic_register(), arm_output_function_prologue(), arm_override_options(), arm_print_operand(), arm_select_cc_mode(), legitimize_pic_address(), and legitimize_tls_address().

#define TARGET_BACKTRACE

Value:

(leaf_function_p ()             \
                 ? (target_flags & THUMB_FLAG_LEAF_BACKTRACE) \
                 : (target_flags & THUMB_FLAG_BACKTRACE))

Definition at line 408 of file arm.h.

Referenced by arm_get_frame_offsets(), thumb_compute_save_reg_mask(), thumb_exit(), thumb_output_function_prologue(), thumb_pushpop(), thumb_set_return_address(), and thumb_unexpanded_epilogue().

#define TARGET_BIG_END   (target_flags & ARM_FLAG_BIG_END)

Definition at line 396 of file arm.h.

Referenced by arm_float_words_big_endian().

#define TARGET_CALLEE_INTERWORKING   (target_flags & THUMB_FLAG_CALLEE_SUPER_INTERWORKING)

Definition at line 406 of file arm.h.

Referenced by arm_override_options(), and is_called_in_ARM_mode().

#define TARGET_CALLER_INTERWORKING   (target_flags & THUMB_FLAG_CALLER_SUPER_INTERWORKING)

Definition at line 407 of file arm.h.

Referenced by arm_override_options().

#define TARGET_CPU_arm2   0x0000

Definition at line 29 of file arm.h.

Referenced by arm_override_options().

#define TARGET_CPU_arm250   0x0000

Definition at line 30 of file arm.h.

#define TARGET_CPU_arm3   0x0000

Definition at line 31 of file arm.h.

#define TARGET_CPU_arm6   0x0001

Definition at line 32 of file arm.h.

Referenced by arm_override_options().

#define TARGET_CPU_arm600   0x0001

Definition at line 33 of file arm.h.

#define TARGET_CPU_arm610   0x0002

Definition at line 34 of file arm.h.

Referenced by arm_override_options().

#define TARGET_CPU_arm7   0x0001

Definition at line 35 of file arm.h.

#define TARGET_CPU_arm700   0x0001

Definition at line 39 of file arm.h.

#define TARGET_CPU_arm710   0x0002

Definition at line 40 of file arm.h.

Referenced by arm_override_options().

#define TARGET_CPU_arm7100   0x0002

Definition at line 41 of file arm.h.

#define TARGET_CPU_arm7500   0x0002

Definition at line 42 of file arm.h.

#define TARGET_CPU_arm7500fe   0x1001

Definition at line 43 of file arm.h.

Referenced by arm_override_options().

#define TARGET_CPU_arm7dm   0x0004

Definition at line 37 of file arm.h.

#define TARGET_CPU_arm7dmi   0x0004

Definition at line 38 of file arm.h.

#define TARGET_CPU_arm7m   0x0004

Definition at line 36 of file arm.h.

Referenced by arm_override_options().

#define TARGET_CPU_arm7tdmi   0x0008

Definition at line 44 of file arm.h.

Referenced by arm_override_options().

#define TARGET_CPU_arm8   0x0010

Definition at line 45 of file arm.h.

Referenced by arm_override_options().

#define TARGET_CPU_arm810   0x0020

Definition at line 46 of file arm.h.

Referenced by arm_override_options().

#define TARGET_CPU_arm9   0x0080

Definition at line 50 of file arm.h.

Referenced by arm_override_options().

#define TARGET_CPU_arm9tdmi   0x0080

Definition at line 51 of file arm.h.

#define TARGET_CPU_DEFAULT   TARGET_CPU_arm6

Definition at line 98 of file arm.h.

#define TARGET_CPU_DEFAULT   TARGET_CPU_generic

Definition at line 98 of file arm.h.

#define TARGET_CPU_generic   0x8000

Definition at line 54 of file arm.h.

Referenced by arm_override_options().

#define TARGET_CPU_strongarm   0x0040

Definition at line 47 of file arm.h.

Referenced by arm_override_options().

#define TARGET_CPU_strongarm110   0x0040

Definition at line 48 of file arm.h.

#define TARGET_CPU_strongarm1100   0x0040

Definition at line 49 of file arm.h.

#define TARGET_CPU_xscale   0x0100

Definition at line 52 of file arm.h.

Referenced by arm_override_options().

#define TARGET_DEFAULT   (ARM_FLAG_APCS_FRAME)

Definition at line 586 of file arm.h.

#define TARGET_EITHER   1

Definition at line 405 of file arm.h.

#define TARGET_FLOAT_FORMAT   IEEE_FLOAT_FORMAT

Definition at line 755 of file arm.h.

#define TARGET_FPE   (target_flags & ARM_FLAG_FPE)

Definition at line 388 of file arm.h.

Referenced by arm_override_options().

#define TARGET_HARD_FLOAT   (! TARGET_SOFT_FLOAT)

Definition at line 395 of file arm.h.

Referenced by arm_expand_prologue(), arm_get_frame_offsets(), arm_get_vfp_saved_size(), arm_hard_regno_mode_ok(), arm_legitimate_index_p(), arm_output_epilogue(), arm_select_cc_mode(), arm_size_rtx_costs(), frv_reorg(), function_arg(), function_arg_advance(), function_arg_boundary(), gen_conditional_move(), legitimate_lo_sum_address_p(), m68k_compute_frame_layout(), mips_conditional_register_usage(), mips_preferred_reload_class(), output_cbranch(), output_condmove_single(), output_move_single(), override_options(), recog_1(), recog_2(), recog_3(), recog_4(), recog_5(), recog_6(), rs6000_complex_function_value(), rs6000_emit_cmove(), rs6000_emit_move(), rs6000_emit_sCOND(), rs6000_function_value(), rs6000_generate_compare(), rs6000_gimplify_va_arg(), rs6000_init_libfuncs(), rs6000_legitimate_address(), rs6000_legitimize_address(), rs6000_legitimize_reload_address(), rs6000_libcall_value(), rs6000_rtx_costs(), s390_function_value(), s390_register_info(), s390_rtx_costs(), setup_incoming_varargs(), use_return_insn(), xtensa_expand_conditional_branch(), and xtensa_rtx_costs().

#define TARGET_INTERWORK   (target_flags & ARM_FLAG_INTERWORK)

Definition at line 397 of file arm.h.

Referenced by arm_compute_func_type(), arm_function_ok_for_sibcall(), arm_override_options(), output_call(), output_call_mem(), output_return_instruction(), thumb_exit(), thumb_pushpop(), and use_return_insn().

#define TARGET_LITTLE_WORDS   (target_flags & ARM_FLAG_LITTLE_WORDS)

Definition at line 398 of file arm.h.

#define TARGET_LONG_CALLS   (target_flags & ARM_FLAG_LONG_CALLS)

Definition at line 402 of file arm.h.

Referenced by arm_function_ok_for_sibcall(), arm_init_cumulative_args(), arm_is_longcall_p(), attr_length_call(), attr_length_millicode_call(), bfin_longcall_p(), call_address_operand(), call_operand(), construct_restore_jr(), construct_save_jarl(), expand_prologue(), gen_call(), gen_call_value(), m68hc11_encode_section_info(), m68hc11_initial_elimination_offset(), m68hc11_override_options(), mips_output_mi_thunk(), output_call(), output_millicode_call(), pa_asm_output_mi_thunk(), pattern_is_ok_for_prologue(), recog_6(), recog_8(), and recog_9().

#define TARGET_MEM_FUNCTIONS   1

Definition at line 594 of file arm.h.

#define TARGET_MMU_TRAPS   (target_flags & ARM_FLAG_MMU_TRAPS)

Definition at line 393 of file arm.h.

Referenced by arm_gen_rotated_half_load().

#define TARGET_NO_SCHED_PRO   (target_flags & ARM_FLAG_NO_SCHED_PRO)

Definition at line 399 of file arm.h.

Referenced by arm_expand_prologue(), thumb_expand_epilogue(), and thumb_expand_prologue().

#define TARGET_OPTIONS

Value:

{               \
  {"cpu=",  & arm_select[0].string,       \
   N_("Specify the name of the target CPU") },      \
  {"arch=", & arm_select[1].string,       \
   N_("Specify the name of the target architecture") },   \
  {"tune=", & arm_select[2].string, "" },       \
  {"fpe=",  & target_fp_name, "" },         \
  {"fp=",   & target_fp_name,         \
   N_("Specify the version of the floating point emulator") },  \
  {"structure-size-boundary=", & structure_size_string,   \
   N_("Specify the minimum bit alignment of structures") },   \
  {"pic-register=", & arm_pic_register_string,      \
   N_("Specify the register to be used for PIC addressing") } \
}

Definition at line 494 of file arm.h.

#define TARGET_POKE_FUNCTION_NAME   (target_flags & ARM_FLAG_POKE)

Definition at line 387 of file arm.h.

Referenced by arm_override_options().

#define TARGET_PTRMEMFUNC_VBIT_LOCATION   ptrmemfunc_vbit_in_delta

Definition at line 717 of file arm.h.

Referenced by build_ptrmemfunc(), cxx_init_decl_processing(), expand_ptrmemfunc_cst(), get_member_function_from_ptrfunc(), and java_init().

#define TARGET_SINGLE_PIC_BASE   (target_flags & ARM_FLAG_SINGLE_PIC_BASE)

Definition at line 401 of file arm.h.

Referenced by arm_compute_save_reg0_reg12_mask(), arm_finalize_pic(), arm_load_pic_register(), arm_override_options(), thumb_compute_save_reg_mask(), thumb_expand_prologue(), thumb_output_function_prologue(), and thumb_unexpanded_epilogue().

#define TARGET_SOFT_FLOAT   (target_flags & ARM_FLAG_SOFT_FLOAT)

Definition at line 394 of file arm.h.

#define TARGET_SWITCHES

Definition at line 418 of file arm.h.

#define TARGET_THUMB   (target_flags & ARM_FLAG_THUMB)

Definition at line 403 of file arm.h.

Referenced by arm_9e_rtx_costs(), arm_add_operand(), arm_debugger_arg_offset(), arm_fastmul_rtx_costs(), arm_function_ok_for_sibcall(), arm_hard_regno_mode_ok(), arm_output_function_epilogue(), arm_output_mi_thunk(), arm_override_options(), arm_print_operand(), arm_regno_class(), arm_rtx_costs(), arm_select_cc_mode(), arm_size_rtx_costs(), arm_slowmul_rtx_costs(), and arm_xscale_rtx_costs().

#define TARGET_VERSION   fputs (" (ARM/generic)", stderr);

Definition at line 299 of file arm.h.

#define TEST_REGNO	(	R,
		TEST,
		VALUE		)	((R TEST VALUE) || ((unsigned) reg_renumber[R] TEST VALUE))

Definition at line 1796 of file arm.h.

#define THUMB_ADDRESS_COST

(

X

)

Value:

((GET_CODE (X) == REG           \
    || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
  && GET_CODE (XEXP (X, 1)) == CONST_INT))    \
   ? 1 : 2)

Definition at line 2435 of file arm.h.

#define THUMB_FLAG_BACKTRACE   (1 << 17)

Definition at line 372 of file arm.h.

Referenced by arm_override_options().

#define THUMB_FLAG_CALLEE_SUPER_INTERWORKING   (1 << 19)

Definition at line 380 of file arm.h.

#define THUMB_FLAG_CALLER_SUPER_INTERWORKING   (1 << 20)

Definition at line 384 of file arm.h.

#define THUMB_FLAG_LEAF_BACKTRACE   (1 << 18)

Definition at line 376 of file arm.h.

Referenced by arm_override_options().

#define THUMB_FUNCTION_PROFILER	(	STREAM,
		LABELNO		)

Value:

{             \
  fprintf (STREAM, "\tmov\tip, lr\n");      \
  fprintf (STREAM, "\tbl\tmcount\n");     \
  fprintf (STREAM, "\t.word\tLP%d\n", LABELNO);   \
}

Definition at line 1592 of file arm.h.

#define THUMB_GO_IF_LEGITIMATE_ADDRESS	(	MODE,
		X,
		WIN		)

Definition at line 2144 of file arm.h.

#define THUMB_HARD_FRAME_POINTER_REGNUM   7

Definition at line 957 of file arm.h.

Referenced by arm_compute_initial_elimination_offset(), thumb_compute_initial_elimination_offset(), thumb_expand_prologue(), and thumb_set_return_address().

#define THUMB_INITIAL_ELIMINATION_OFFSET	(	FROM,
		TO,
		OFFSET		)

Definition at line 1670 of file arm.h.

#define THUMB_LEGITIMATE_CONSTANT_P

(

X

)

Value:

(   GET_CODE (X) == CONST_INT   \
  || GET_CODE (X) == CONST_DOUBLE \
  || CONSTANT_ADDRESS_P (X)   \
  || flag_pic)

Definition at line 1851 of file arm.h.

#define THUMB_LEGITIMATE_OFFSET	(	MODE,
		VAL		)

Value:

(GET_MODE_SIZE (MODE) == 1 ? ((unsigned HOST_WIDE_INT) (VAL) < 32)  \
   : GET_MODE_SIZE (MODE) == 2 ? ((unsigned HOST_WIDE_INT) (VAL) < 64 \
          && ((VAL) & 1) == 0)      \
   : ((VAL) >= 0 && ((VAL) + GET_MODE_SIZE (MODE)) <= 128   \
      && ((VAL) & 3) == 0))

Definition at line 2122 of file arm.h.

#define THUMB_LEGITIMIZE_ADDRESS	(	X,
		OLDX,
		MODE,
		WIN		)

Value:

if (flag_pic)           \
    (X) = legitimize_pic_address (OLDX, MODE, NULL_RTX);

Definition at line 2309 of file arm.h.

#define THUMB_LEGITIMIZE_RELOAD_ADDRESS	(	X,
		MODE,
		OPNUM,
		TYPE,
		IND_LEVELS,
		WIN		)

Value:

{                 \
  if (GET_CODE (X) == PLUS            \
      && GET_MODE_SIZE (MODE) < 4         \
      && GET_CODE (XEXP (X, 0)) == REG          \
      && XEXP (X, 0) == stack_pointer_rtx       \
      && GET_CODE (XEXP (X, 1)) == CONST_INT        \
      && ! THUMB_LEGITIMATE_OFFSET (MODE, INTVAL (XEXP (X, 1))))  \
    {                 \
      rtx orig_X = X;             \
      X = copy_rtx (X);             \
      push_reload (orig_X, NULL_RTX, &X, NULL,        \
       MODE_BASE_REG_CLASS (MODE),        \
       Pmode, VOIDmode, 0, 0, OPNUM, TYPE);     \
      goto WIN;               \
    }                 \
}

Definition at line 1298 of file arm.h.

#define THUMB_PRINT_OPERAND_ADDRESS	(	STREAM,
		X		)

Value:

{             \
  if (GET_CODE (X) == REG)        \
    asm_fprintf (STREAM, "[%r]", REGNO (X));    \
  else if (GET_CODE (X) == POST_INC)      \
    asm_fprintf (STREAM, "%r!", REGNO (XEXP (X, 0))); \
  else if (GET_CODE (X) == PLUS)      \
    {             \
      if (GET_CODE (XEXP (X, 1)) == CONST_INT)    \
  asm_fprintf (STREAM, "[%r, #%d]",     \
         REGNO (XEXP (X, 0)),   \
         (int) INTVAL (XEXP (X, 1))); \
      else            \
  asm_fprintf (STREAM, "[%r, %r]",    \
         REGNO (XEXP (X, 0)),   \
         REGNO (XEXP (X, 1)));    \
    }             \
  else              \
    output_addr_const (STREAM, X);      \
}

Definition at line 2742 of file arm.h.

#define THUMB_REG_MODE_OK_FOR_BASE_P	(	X,
		MODE		)

Value:

(REGNO (X) <= LAST_LO_REGNUM      \
   || REGNO (X) >= FIRST_PSEUDO_REGISTER  \
   || (GET_MODE_SIZE (MODE) >= 4    \
       && (REGNO (X) == STACK_POINTER_REGNUM  \
     || (X) == hard_frame_pointer_rtx \
     || (X) == arg_pointer_rtx)))

Definition at line 1954 of file arm.h.

#define THUMB_REG_OK_FOR_INDEX_P

(

X

)

THUMB_REG_MODE_OK_FOR_BASE_P (X, QImode)

Definition at line 1983 of file arm.h.

#define THUMB_REGNO_MODE_OK_FOR_BASE_P	(	REGNO,
		MODE		)

Value:

(TEST_REGNO (REGNO, <=, LAST_LO_REGNUM)     \
   || (GET_MODE_SIZE (MODE) >= 4        \
       && TEST_REGNO (REGNO, ==, STACK_POINTER_REGNUM)))

Definition at line 1805 of file arm.h.

Referenced by thumb_base_register_rtx_p().

#define THUMB_SECONDARY_INPUT_RELOAD_CLASS	(	CLASS,
		MODE,
		X		)

Value:

((CLASS) != LO_REGS && (CLASS) != BASE_REGS       \
   ? ((true_regnum (X) == -1 ? LO_REGS          \
       : (true_regnum (X) + HARD_REGNO_NREGS (0, MODE) > 8) ? LO_REGS \
       : NO_REGS))              \
   : NO_REGS)

Definition at line 1201 of file arm.h.

#define THUMB_SECONDARY_OUTPUT_RELOAD_CLASS	(	CLASS,
		MODE,
		X		)

Value:

((CLASS) != LO_REGS             \
   ? ((true_regnum (X) == -1 ? LO_REGS          \
       : (true_regnum (X) + HARD_REGNO_NREGS (0, MODE) > 8) ? LO_REGS \
       : NO_REGS))              \
   : NO_REGS)

Definition at line 1208 of file arm.h.

#define THUMB_TRAMPOLINE_TEMPLATE

(

FILE

)

Value:

{           \
  fprintf (FILE, "\t.code 32\n");   \
  fprintf (FILE, ".Ltrampoline_start:\n");  \
  asm_fprintf (FILE, "\tldr\t%r, [%r, #8]\n", \
         STATIC_CHAIN_REGNUM, PC_REGNUM); \
  asm_fprintf (FILE, "\tldr\t%r, [%r, #8]\n", \
         IP_REGNUM, PC_REGNUM);   \
  asm_fprintf (FILE, "\torr\t%r, %r, #1\n",     \
         IP_REGNUM, IP_REGNUM);       \
  asm_fprintf (FILE, "\tbx\t%r\n", IP_REGNUM);  \
  fprintf (FILE, "\t.word\t0\n");   \
  fprintf (FILE, "\t.word\t0\n");   \
  fprintf (FILE, "\t.code 16\n");   \
}

Definition at line 1743 of file arm.h.

#define TRAMPOLINE_ALIGNMENT   32

Definition at line 1769 of file arm.h.

#define TRAMPOLINE_SIZE   (TARGET_ARM ? 16 : 24)

Definition at line 1766 of file arm.h.

#define TRAMPOLINE_TEMPLATE

(

FILE

)

Value:

if (TARGET_ARM)       \
    ARM_TRAMPOLINE_TEMPLATE (FILE)    \
  else            \
    THUMB_TRAMPOLINE_TEMPLATE (FILE)

Definition at line 1759 of file arm.h.

#define TRULY_NOOP_TRUNCATION	(	OUTPREC,
		INPREC		)	1

Definition at line 2390 of file arm.h.

#define UNITS_PER_WORD   4

Definition at line 704 of file arm.h.

#define USE_RETURN_INSN

(

ISCOND

)

(TARGET_ARM ? use_return_insn (ISCOND) : 0)

Definition at line 1619 of file arm.h.

#define WORD_REGISTER_OPERATIONS

Definition at line 2362 of file arm.h.

#define WORDS_BIG_ENDIAN   (BYTES_BIG_ENDIAN && ! TARGET_LITTLE_WORDS)

Definition at line 685 of file arm.h.

---

Typedef Documentation

typedef enum arm_cond_code arm_cc

---

Enumeration Type Documentation

enum arm_builtins

Enumerator:

ARM_BUILTIN_CLZ
ARM_BUILTIN_MAX
ARM_BUILTIN_CLZ
ARM_BUILTIN_MAX
ARM_BUILTIN_GETWCX
ARM_BUILTIN_SETWCX
ARM_BUILTIN_WZERO
ARM_BUILTIN_WAVG2BR
ARM_BUILTIN_WAVG2HR
ARM_BUILTIN_WAVG2B
ARM_BUILTIN_WAVG2H
ARM_BUILTIN_WACCB
ARM_BUILTIN_WACCH
ARM_BUILTIN_WACCW
ARM_BUILTIN_WMACS
ARM_BUILTIN_WMACSZ
ARM_BUILTIN_WMACU
ARM_BUILTIN_WMACUZ
ARM_BUILTIN_WSADB
ARM_BUILTIN_WSADBZ
ARM_BUILTIN_WSADH
ARM_BUILTIN_WSADHZ
ARM_BUILTIN_WALIGN
ARM_BUILTIN_TMIA
ARM_BUILTIN_TMIAPH
ARM_BUILTIN_TMIABB
ARM_BUILTIN_TMIABT
ARM_BUILTIN_TMIATB
ARM_BUILTIN_TMIATT
ARM_BUILTIN_TMOVMSKB
ARM_BUILTIN_TMOVMSKH
ARM_BUILTIN_TMOVMSKW
ARM_BUILTIN_TBCSTB
ARM_BUILTIN_TBCSTH
ARM_BUILTIN_TBCSTW
ARM_BUILTIN_WMADDS
ARM_BUILTIN_WMADDU
ARM_BUILTIN_WPACKHSS
ARM_BUILTIN_WPACKWSS
ARM_BUILTIN_WPACKDSS
ARM_BUILTIN_WPACKHUS
ARM_BUILTIN_WPACKWUS
ARM_BUILTIN_WPACKDUS
ARM_BUILTIN_WADDB
ARM_BUILTIN_WADDH
ARM_BUILTIN_WADDW
ARM_BUILTIN_WADDSSB
ARM_BUILTIN_WADDSSH
ARM_BUILTIN_WADDSSW
ARM_BUILTIN_WADDUSB
ARM_BUILTIN_WADDUSH
ARM_BUILTIN_WADDUSW
ARM_BUILTIN_WSUBB
ARM_BUILTIN_WSUBH
ARM_BUILTIN_WSUBW
ARM_BUILTIN_WSUBSSB
ARM_BUILTIN_WSUBSSH
ARM_BUILTIN_WSUBSSW
ARM_BUILTIN_WSUBUSB
ARM_BUILTIN_WSUBUSH
ARM_BUILTIN_WSUBUSW
ARM_BUILTIN_WAND
ARM_BUILTIN_WANDN
ARM_BUILTIN_WOR
ARM_BUILTIN_WXOR
ARM_BUILTIN_WCMPEQB
ARM_BUILTIN_WCMPEQH
ARM_BUILTIN_WCMPEQW
ARM_BUILTIN_WCMPGTUB
ARM_BUILTIN_WCMPGTUH
ARM_BUILTIN_WCMPGTUW
ARM_BUILTIN_WCMPGTSB
ARM_BUILTIN_WCMPGTSH
ARM_BUILTIN_WCMPGTSW
ARM_BUILTIN_TEXTRMSB
ARM_BUILTIN_TEXTRMSH
ARM_BUILTIN_TEXTRMSW
ARM_BUILTIN_TEXTRMUB
ARM_BUILTIN_TEXTRMUH
ARM_BUILTIN_TEXTRMUW
ARM_BUILTIN_TINSRB
ARM_BUILTIN_TINSRH
ARM_BUILTIN_TINSRW
ARM_BUILTIN_WMAXSW
ARM_BUILTIN_WMAXSH
ARM_BUILTIN_WMAXSB
ARM_BUILTIN_WMAXUW
ARM_BUILTIN_WMAXUH
ARM_BUILTIN_WMAXUB
ARM_BUILTIN_WMINSW
ARM_BUILTIN_WMINSH
ARM_BUILTIN_WMINSB
ARM_BUILTIN_WMINUW
ARM_BUILTIN_WMINUH
ARM_BUILTIN_WMINUB
ARM_BUILTIN_WMULUM
ARM_BUILTIN_WMULSM
ARM_BUILTIN_WMULUL
ARM_BUILTIN_PSADBH
ARM_BUILTIN_WSHUFH
ARM_BUILTIN_WSLLH
ARM_BUILTIN_WSLLW
ARM_BUILTIN_WSLLD
ARM_BUILTIN_WSRAH
ARM_BUILTIN_WSRAW
ARM_BUILTIN_WSRAD
ARM_BUILTIN_WSRLH
ARM_BUILTIN_WSRLW
ARM_BUILTIN_WSRLD
ARM_BUILTIN_WRORH
ARM_BUILTIN_WRORW
ARM_BUILTIN_WRORD
ARM_BUILTIN_WSLLHI
ARM_BUILTIN_WSLLWI
ARM_BUILTIN_WSLLDI
ARM_BUILTIN_WSRAHI
ARM_BUILTIN_WSRAWI
ARM_BUILTIN_WSRADI
ARM_BUILTIN_WSRLHI
ARM_BUILTIN_WSRLWI
ARM_BUILTIN_WSRLDI
ARM_BUILTIN_WRORHI
ARM_BUILTIN_WRORWI
ARM_BUILTIN_WRORDI
ARM_BUILTIN_WUNPCKIHB
ARM_BUILTIN_WUNPCKIHH
ARM_BUILTIN_WUNPCKIHW
ARM_BUILTIN_WUNPCKILB
ARM_BUILTIN_WUNPCKILH
ARM_BUILTIN_WUNPCKILW
ARM_BUILTIN_WUNPCKEHSB
ARM_BUILTIN_WUNPCKEHSH
ARM_BUILTIN_WUNPCKEHSW
ARM_BUILTIN_WUNPCKEHUB
ARM_BUILTIN_WUNPCKEHUH
ARM_BUILTIN_WUNPCKEHUW
ARM_BUILTIN_WUNPCKELSB
ARM_BUILTIN_WUNPCKELSH
ARM_BUILTIN_WUNPCKELSW
ARM_BUILTIN_WUNPCKELUB
ARM_BUILTIN_WUNPCKELUH
ARM_BUILTIN_WUNPCKELUW
ARM_BUILTIN_MAX
ARM_BUILTIN_GETWCX
ARM_BUILTIN_SETWCX
ARM_BUILTIN_WZERO
ARM_BUILTIN_WAVG2BR
ARM_BUILTIN_WAVG2HR
ARM_BUILTIN_WAVG2B
ARM_BUILTIN_WAVG2H
ARM_BUILTIN_WACCB
ARM_BUILTIN_WACCH
ARM_BUILTIN_WACCW
ARM_BUILTIN_WMACS
ARM_BUILTIN_WMACSZ
ARM_BUILTIN_WMACU
ARM_BUILTIN_WMACUZ
ARM_BUILTIN_WSADB
ARM_BUILTIN_WSADBZ
ARM_BUILTIN_WSADH
ARM_BUILTIN_WSADHZ
ARM_BUILTIN_WALIGN
ARM_BUILTIN_TMIA
ARM_BUILTIN_TMIAPH
ARM_BUILTIN_TMIABB
ARM_BUILTIN_TMIABT
ARM_BUILTIN_TMIATB
ARM_BUILTIN_TMIATT
ARM_BUILTIN_TMOVMSKB
ARM_BUILTIN_TMOVMSKH
ARM_BUILTIN_TMOVMSKW
ARM_BUILTIN_TBCSTB
ARM_BUILTIN_TBCSTH
ARM_BUILTIN_TBCSTW
ARM_BUILTIN_WMADDS
ARM_BUILTIN_WMADDU
ARM_BUILTIN_WPACKHSS
ARM_BUILTIN_WPACKWSS
ARM_BUILTIN_WPACKDSS
ARM_BUILTIN_WPACKHUS
ARM_BUILTIN_WPACKWUS
ARM_BUILTIN_WPACKDUS
ARM_BUILTIN_WADDB
ARM_BUILTIN_WADDH
ARM_BUILTIN_WADDW
ARM_BUILTIN_WADDSSB
ARM_BUILTIN_WADDSSH
ARM_BUILTIN_WADDSSW
ARM_BUILTIN_WADDUSB
ARM_BUILTIN_WADDUSH
ARM_BUILTIN_WADDUSW
ARM_BUILTIN_WSUBB
ARM_BUILTIN_WSUBH
ARM_BUILTIN_WSUBW
ARM_BUILTIN_WSUBSSB
ARM_BUILTIN_WSUBSSH
ARM_BUILTIN_WSUBSSW
ARM_BUILTIN_WSUBUSB
ARM_BUILTIN_WSUBUSH
ARM_BUILTIN_WSUBUSW
ARM_BUILTIN_WAND
ARM_BUILTIN_WANDN
ARM_BUILTIN_WOR
ARM_BUILTIN_WXOR
ARM_BUILTIN_WCMPEQB
ARM_BUILTIN_WCMPEQH
ARM_BUILTIN_WCMPEQW
ARM_BUILTIN_WCMPGTUB
ARM_BUILTIN_WCMPGTUH
ARM_BUILTIN_WCMPGTUW
ARM_BUILTIN_WCMPGTSB
ARM_BUILTIN_WCMPGTSH
ARM_BUILTIN_WCMPGTSW
ARM_BUILTIN_TEXTRMSB
ARM_BUILTIN_TEXTRMSH
ARM_BUILTIN_TEXTRMSW
ARM_BUILTIN_TEXTRMUB
ARM_BUILTIN_TEXTRMUH
ARM_BUILTIN_TEXTRMUW
ARM_BUILTIN_TINSRB
ARM_BUILTIN_TINSRH
ARM_BUILTIN_TINSRW
ARM_BUILTIN_WMAXSW
ARM_BUILTIN_WMAXSH
ARM_BUILTIN_WMAXSB
ARM_BUILTIN_WMAXUW
ARM_BUILTIN_WMAXUH
ARM_BUILTIN_WMAXUB
ARM_BUILTIN_WMINSW
ARM_BUILTIN_WMINSH
ARM_BUILTIN_WMINSB
ARM_BUILTIN_WMINUW
ARM_BUILTIN_WMINUH
ARM_BUILTIN_WMINUB
ARM_BUILTIN_WMULUM
ARM_BUILTIN_WMULSM
ARM_BUILTIN_WMULUL
ARM_BUILTIN_PSADBH
ARM_BUILTIN_WSHUFH
ARM_BUILTIN_WSLLH
ARM_BUILTIN_WSLLW
ARM_BUILTIN_WSLLD
ARM_BUILTIN_WSRAH
ARM_BUILTIN_WSRAW
ARM_BUILTIN_WSRAD
ARM_BUILTIN_WSRLH
ARM_BUILTIN_WSRLW
ARM_BUILTIN_WSRLD
ARM_BUILTIN_WRORH
ARM_BUILTIN_WRORW
ARM_BUILTIN_WRORD
ARM_BUILTIN_WSLLHI
ARM_BUILTIN_WSLLWI
ARM_BUILTIN_WSLLDI
ARM_BUILTIN_WSRAHI
ARM_BUILTIN_WSRAWI
ARM_BUILTIN_WSRADI
ARM_BUILTIN_WSRLHI
ARM_BUILTIN_WSRLWI
ARM_BUILTIN_WSRLDI
ARM_BUILTIN_WRORHI
ARM_BUILTIN_WRORWI
ARM_BUILTIN_WRORDI
ARM_BUILTIN_WUNPCKIHB
ARM_BUILTIN_WUNPCKIHH
ARM_BUILTIN_WUNPCKIHW
ARM_BUILTIN_WUNPCKILB
ARM_BUILTIN_WUNPCKILH
ARM_BUILTIN_WUNPCKILW
ARM_BUILTIN_WUNPCKEHSB
ARM_BUILTIN_WUNPCKEHSH
ARM_BUILTIN_WUNPCKEHSW
ARM_BUILTIN_WUNPCKEHUB
ARM_BUILTIN_WUNPCKEHUH
ARM_BUILTIN_WUNPCKEHUW
ARM_BUILTIN_WUNPCKELSB
ARM_BUILTIN_WUNPCKELSH
ARM_BUILTIN_WUNPCKELSW
ARM_BUILTIN_WUNPCKELUB
ARM_BUILTIN_WUNPCKELUH
ARM_BUILTIN_WUNPCKELUW
ARM_BUILTIN_THREAD_POINTER
ARM_BUILTIN_MAX

Definition at line 2869 of file arm.h.

enum arm_cond_code

Enumerator:

ARM_EQ
ARM_NE
ARM_CS
ARM_CC
ARM_MI
ARM_PL
ARM_VS
ARM_VC
ARM_HI
ARM_LS
ARM_GE
ARM_LT
ARM_GT
ARM_LE
ARM_AL
ARM_NV
ARM_EQ
ARM_NE
ARM_CS
ARM_CC
ARM_MI
ARM_PL
ARM_VS
ARM_VC
ARM_HI
ARM_LS
ARM_GE
ARM_LT
ARM_GT
ARM_LE
ARM_AL
ARM_NV
ARM_EQ
ARM_NE
ARM_CS
ARM_CC
ARM_MI
ARM_PL
ARM_VS
ARM_VC
ARM_HI
ARM_LS
ARM_GE
ARM_LT
ARM_GT
ARM_LE
ARM_AL
ARM_NV
ARM_EQ
ARM_NE
ARM_CS
ARM_CC
ARM_MI
ARM_PL
ARM_VS
ARM_VC
ARM_HI
ARM_LS
ARM_GE
ARM_LT
ARM_GT
ARM_LE
ARM_AL
ARM_NV

Definition at line 56 of file arm.h.

enum floating_point_type

Enumerator:

FP_HARD
FP_SOFT2
FP_SOFT3
FP_HARD
FP_SOFT2
FP_SOFT3

Definition at line 535 of file arm.h.

enum prog_mode_type

Enumerator:

prog_mode26
prog_mode32
prog_mode26
prog_mode32

Definition at line 522 of file arm.h.

enum reg_class

Enumerator:

NO_REGS
R2
R0_1
INDEX_REGS
BASE_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
LR0_REGS
GENERAL_REGS
BP_REGS
FC_REGS
CR_REGS
Q_REGS
SPECIAL_REGS
ACCUM0_REGS
ACCUM_REGS
FLOAT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R24_REG
R25_REG
R27_REG
GENERAL_REGS
FLOAT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
LPCOUNT_REG
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
FPU_REGS
LO_REGS
STACK_REG
BASE_REGS
HI_REGS
CC_REG
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REG
POINTER_X_REGS
POINTER_Y_REGS
POINTER_Z_REGS
STACK_REG
BASE_POINTER_REGS
POINTER_REGS
ADDW_REGS
SIMPLE_LD_REGS
LD_REGS
NO_LD_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0R1_REGS
R2R3_REGS
EXT_LOW_REGS
EXT_REGS
ADDR_REGS
INDEX_REGS
BK_REG
SP_REG
RC_REG
COUNTER_REGS
INT_REGS
GENERAL_REGS
DP_REG
ST_REG
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
FLOAT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
S_REGS
INDEX_REGS
SP_REGS
A_REGS
SI_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
REPEAT_REGS
CR_REGS
ACCUM_REGS
OTHER_FLAG_REGS
F0_REGS
F1_REGS
BR_FLAG_REGS
FLAG_REGS
EVEN_REGS
GPR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
A0H_REG
A0L_REG
A0_REG
A1H_REG
ACCUM_HIGH_REGS
A1L_REG
ACCUM_LOW_REGS
A1_REG
ACCUM_REGS
X_REG
X_OR_ACCUM_LOW_REGS
X_OR_ACCUM_REGS
YH_REG
YH_OR_ACCUM_HIGH_REGS
X_OR_YH_REGS
YL_REG
YL_OR_ACCUM_LOW_REGS
X_OR_YL_REGS
X_OR_Y_REGS
Y_REG
ACCUM_OR_Y_REGS
PH_REG
X_OR_PH_REGS
PL_REG
PL_OR_ACCUM_LOW_REGS
X_OR_PL_REGS
YL_OR_PL_OR_ACCUM_LOW_REGS
P_REG
ACCUM_OR_P_REGS
YL_OR_P_REGS
ACCUM_LOW_OR_YL_OR_P_REGS
Y_OR_P_REGS
ACCUM_Y_OR_P_REGS
NO_FRAME_Y_ADDR_REGS
Y_ADDR_REGS
ACCUM_LOW_OR_Y_ADDR_REGS
ACCUM_OR_Y_ADDR_REGS
X_OR_Y_ADDR_REGS
Y_OR_Y_ADDR_REGS
P_OR_Y_ADDR_REGS
NON_HIGH_YBASE_ELIGIBLE_REGS
YBASE_ELIGIBLE_REGS
J_REG
J_OR_DAU_16_BIT_REGS
BMU_REGS
NOHIGH_NON_ADDR_REGS
NON_ADDR_REGS
SLOW_MEM_LOAD_REGS
NOHIGH_NON_YBASE_REGS
NO_ACCUM_NON_YBASE_REGS
NON_YBASE_REGS
YBASE_VIRT_REGS
ACCUM_LOW_OR_YBASE_REGS
ACCUM_OR_YBASE_REGS
X_OR_YBASE_REGS
Y_OR_YBASE_REGS
ACCUM_LOW_YL_PL_OR_YBASE_REGS
P_OR_YBASE_REGS
ACCUM_Y_P_OR_YBASE_REGS
Y_ADDR_OR_YBASE_REGS
YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS
YBASE_OR_YBASE_ELIGIBLE_REGS
NO_HIGH_ALL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
MULTIPLY_32_REG
MULTIPLY_64_REG
LOW_REGS
HIGH_REGS
REAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
MAC_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ADDR_REGS
DATA_REGS
FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
AREG
DREG
CREG
BREG
SIREG
DIREG
AD_REGS
Q_REGS
NON_Q_REGS
INDEX_REGS
LEGACY_REGS
GENERAL_REGS
FP_TOP_REG
FP_SECOND_REG
FLOAT_REGS
SSE_REGS
MMX_REGS
FP_TOP_SSE_REGS
FP_SECOND_SSE_REGS
FLOAT_SSE_REGS
FLOAT_INT_REGS
INT_SSE_REGS
FLOAT_INT_SSE_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GLOBAL_REGS
LOCAL_REGS
LOCAL_OR_GLOBAL_REGS
FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
PR_REGS
BR_REGS
AR_M_REGS
AR_I_REGS
ADDL_REGS
GR_REGS
FR_REGS
GR_AND_BR_REGS
GR_AND_FR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
CARRY_REG
ACCUM_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
D_REGS
X_REGS
Y_REGS
SP_REGS
DA_REGS
DB_REGS
Z_REGS
D8_REGS
Q_REGS
D_OR_X_REGS
D_OR_Y_REGS
D_OR_SP_REGS
X_OR_Y_REGS
A_REGS
X_OR_SP_REGS
Y_OR_SP_REGS
X_OR_Y_OR_D_REGS
A_OR_D_REGS
A_OR_SP_REGS
H_REGS
S_REGS
D_OR_S_REGS
X_OR_S_REGS
Y_OR_S_REGS
SP_OR_S_REGS
D_OR_X_OR_S_REGS
D_OR_Y_OR_S_REGS
D_OR_SP_OR_S_REGS
A_OR_S_REGS
D_OR_A_OR_S_REGS
TMP_REGS
D_OR_A_OR_TMP_REGS
G_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDR_REGS
FP_REGS
GENERAL_REGS
DATA_OR_FP_REGS
ADDR_OR_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
AP_REG
XRF_REGS
GENERAL_REGS
AGRF_REGS
XGRF_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ONLYR1_REGS
LRW_REGS
GENERAL_REGS
C_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
REMAINDER_REG
HIMULT_REG
SYSTEM_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDRESS_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDRESS_REGS
SP_REGS
DATA_OR_ADDRESS_REGS
SP_OR_ADDRESS_REGS
EXTENDED_REGS
DATA_OR_EXTENDED_REGS
ADDRESS_OR_EXTENDED_REGS
SP_OR_EXTENDED_REGS
SP_OR_ADDRESS_OR_EXTENDED_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
FLOAT_REG0
LONG_FLOAT_REG0
FLOAT_REGS
FP_REGS
GEN_AND_FP_REGS
FRAME_POINTER_REG
STACK_POINTER_REG
GEN_AND_MEM_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R1_REGS
GENERAL_REGS
FPUPPER_REGS
FP_REGS
GENERAL_OR_FP_REGS
SHIFT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R1_REGS
GENERAL_REGS
FPUPPER_REGS
FP_REGS
GENERAL_OR_FP_REGS
SHIFT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
MUL_REGS
GENERAL_REGS
LOAD_FPU_REGS
NO_LOAD_FPU_REGS
FPU_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
OUT_REGS
STD_REGS
ARG_REGS
SRC_REGS
DST_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
R15_REGS
BASE_REGS
GENERAL_REGS
FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
BASE_REGS
GENERAL_REGS
FLOAT_REGS
ALTIVEC_REGS
VRSAVE_REGS
NON_SPECIAL_REGS
MQ_REGS
LINK_REGS
CTR_REGS
LINK_OR_CTR_REGS
SPECIAL_REGS
SPEC_OR_GEN_REGS
CR0_REGS
CR_REGS
NON_FLOAT_REGS
XER_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ADDR_REGS
GENERAL_REGS
FP_REGS
ADDR_FP_REGS
GENERAL_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
PR_REGS
T_REGS
MAC_REGS
FPUL_REGS
SIBCALL_REGS
GENERAL_REGS
FP0_REGS
FP_REGS
DF_REGS
FPSCR_REGS
GENERAL_FP_REGS
TARGET_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
M16_NA_REGS
M16_REGS
T_REG
M16_T_REGS
GR_REGS
FP_REGS
HI_REG
LO_REG
HILO_REG
MD_REGS
COP0_REGS
COP2_REGS
COP3_REGS
HI_AND_GR_REGS
LO_AND_GR_REGS
HILO_AND_GR_REGS
HI_AND_FP_REGS
COP0_AND_GR_REGS
COP2_AND_GR_REGS
COP3_AND_GR_REGS
ALL_COP_REGS
ALL_COP_AND_GR_REGS
ST_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
FPCC_REGS
I64_REGS
GENERAL_REGS
FP_REGS
EXTRA_FP_REGS
GENERAL_OR_FP_REGS
GENERAL_OR_EXTRA_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
R1_REGS
TWO_REGS
R2_REGS
EIGHT_REGS
R8_REGS
ICALL_REGS
GENERAL_REGS
CARRY_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
BR_REGS
FP_REGS
ACC_REG
SP_REG
RL_REGS
GR_REGS
AR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
M16_NA_REGS
M16_REGS
T_REG
M16_T_REGS
GR_REGS
FP_REGS
HI_REG
LO_REG
HILO_REG
MD_REGS
COP0_REGS
COP2_REGS
COP3_REGS
HI_AND_GR_REGS
LO_AND_GR_REGS
HILO_AND_GR_REGS
HI_AND_FP_REGS
COP0_AND_GR_REGS
COP2_AND_GR_REGS
COP3_AND_GR_REGS
ALL_COP_REGS
ALL_COP_AND_GR_REGS
ST_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
M16_NA_REGS
M16_REGS
T_REG
M16_T_REGS
GR_REGS
FP_REGS
HI_REG
LO_REG
HILO_REG
MD_REGS
COP0_REGS
COP2_REGS
COP3_REGS
HI_AND_GR_REGS
LO_AND_GR_REGS
HILO_AND_GR_REGS
HI_AND_FP_REGS
COP0_AND_GR_REGS
COP2_AND_GR_REGS
COP3_AND_GR_REGS
ALL_COP_REGS
ALL_COP_AND_GR_REGS
ST_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R2
R0_1
INDEX_REGS
BASE_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
LR0_REGS
GENERAL_REGS
BP_REGS
FC_REGS
CR_REGS
Q_REGS
SPECIAL_REGS
ACCUM0_REGS
ACCUM_REGS
FLOAT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R24_REG
R25_REG
R27_REG
GENERAL_REGS
FLOAT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
LPCOUNT_REG
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
FPU_REGS
LO_REGS
STACK_REG
BASE_REGS
HI_REGS
CC_REG
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REG
POINTER_X_REGS
POINTER_Y_REGS
POINTER_Z_REGS
STACK_REG
BASE_POINTER_REGS
POINTER_REGS
ADDW_REGS
SIMPLE_LD_REGS
LD_REGS
NO_LD_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0R1_REGS
R2R3_REGS
EXT_LOW_REGS
EXT_REGS
ADDR_REGS
INDEX_REGS
BK_REG
SP_REG
RC_REG
COUNTER_REGS
INT_REGS
GENERAL_REGS
DP_REG
ST_REG
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
FLOAT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
S_REGS
INDEX_REGS
SP_REGS
A_REGS
SI_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
REPEAT_REGS
CR_REGS
ACCUM_REGS
OTHER_FLAG_REGS
F0_REGS
F1_REGS
BR_FLAG_REGS
FLAG_REGS
EVEN_REGS
GPR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
A0H_REG
A0L_REG
A0_REG
A1H_REG
ACCUM_HIGH_REGS
A1L_REG
ACCUM_LOW_REGS
A1_REG
ACCUM_REGS
X_REG
X_OR_ACCUM_LOW_REGS
X_OR_ACCUM_REGS
YH_REG
YH_OR_ACCUM_HIGH_REGS
X_OR_YH_REGS
YL_REG
YL_OR_ACCUM_LOW_REGS
X_OR_YL_REGS
X_OR_Y_REGS
Y_REG
ACCUM_OR_Y_REGS
PH_REG
X_OR_PH_REGS
PL_REG
PL_OR_ACCUM_LOW_REGS
X_OR_PL_REGS
YL_OR_PL_OR_ACCUM_LOW_REGS
P_REG
ACCUM_OR_P_REGS
YL_OR_P_REGS
ACCUM_LOW_OR_YL_OR_P_REGS
Y_OR_P_REGS
ACCUM_Y_OR_P_REGS
NO_FRAME_Y_ADDR_REGS
Y_ADDR_REGS
ACCUM_LOW_OR_Y_ADDR_REGS
ACCUM_OR_Y_ADDR_REGS
X_OR_Y_ADDR_REGS
Y_OR_Y_ADDR_REGS
P_OR_Y_ADDR_REGS
NON_HIGH_YBASE_ELIGIBLE_REGS
YBASE_ELIGIBLE_REGS
J_REG
J_OR_DAU_16_BIT_REGS
BMU_REGS
NOHIGH_NON_ADDR_REGS
NON_ADDR_REGS
SLOW_MEM_LOAD_REGS
NOHIGH_NON_YBASE_REGS
NO_ACCUM_NON_YBASE_REGS
NON_YBASE_REGS
YBASE_VIRT_REGS
ACCUM_LOW_OR_YBASE_REGS
ACCUM_OR_YBASE_REGS
X_OR_YBASE_REGS
Y_OR_YBASE_REGS
ACCUM_LOW_YL_PL_OR_YBASE_REGS
P_OR_YBASE_REGS
ACCUM_Y_P_OR_YBASE_REGS
Y_ADDR_OR_YBASE_REGS
YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS
YBASE_OR_YBASE_ELIGIBLE_REGS
NO_HIGH_ALL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
MULTIPLY_32_REG
MULTIPLY_64_REG
LOW_REGS
HIGH_REGS
REAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
MAC_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ADDR_REGS
DATA_REGS
FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
AREG
DREG
CREG
BREG
SIREG
DIREG
AD_REGS
Q_REGS
NON_Q_REGS
INDEX_REGS
LEGACY_REGS
GENERAL_REGS
FP_TOP_REG
FP_SECOND_REG
FLOAT_REGS
SSE_REGS
MMX_REGS
FP_TOP_SSE_REGS
FP_SECOND_SSE_REGS
FLOAT_SSE_REGS
FLOAT_INT_REGS
INT_SSE_REGS
FLOAT_INT_SSE_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GLOBAL_REGS
LOCAL_REGS
LOCAL_OR_GLOBAL_REGS
FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
PR_REGS
BR_REGS
AR_M_REGS
AR_I_REGS
ADDL_REGS
GR_REGS
FR_REGS
GR_AND_BR_REGS
GR_AND_FR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
CARRY_REG
ACCUM_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
D_REGS
X_REGS
Y_REGS
SP_REGS
DA_REGS
DB_REGS
Z_REGS
D8_REGS
Q_REGS
D_OR_X_REGS
D_OR_Y_REGS
D_OR_SP_REGS
X_OR_Y_REGS
A_REGS
X_OR_SP_REGS
Y_OR_SP_REGS
X_OR_Y_OR_D_REGS
A_OR_D_REGS
A_OR_SP_REGS
H_REGS
S_REGS
D_OR_S_REGS
X_OR_S_REGS
Y_OR_S_REGS
SP_OR_S_REGS
D_OR_X_OR_S_REGS
D_OR_Y_OR_S_REGS
D_OR_SP_OR_S_REGS
A_OR_S_REGS
D_OR_A_OR_S_REGS
TMP_REGS
D_OR_A_OR_TMP_REGS
G_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDR_REGS
FP_REGS
GENERAL_REGS
DATA_OR_FP_REGS
ADDR_OR_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
AP_REG
XRF_REGS
GENERAL_REGS
AGRF_REGS
XGRF_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ONLYR1_REGS
LRW_REGS
GENERAL_REGS
C_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
REMAINDER_REG
HIMULT_REG
SYSTEM_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDRESS_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDRESS_REGS
SP_REGS
DATA_OR_ADDRESS_REGS
SP_OR_ADDRESS_REGS
EXTENDED_REGS
DATA_OR_EXTENDED_REGS
ADDRESS_OR_EXTENDED_REGS
SP_OR_EXTENDED_REGS
SP_OR_ADDRESS_OR_EXTENDED_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
FLOAT_REG0
LONG_FLOAT_REG0
FLOAT_REGS
FP_REGS
GEN_AND_FP_REGS
FRAME_POINTER_REG
STACK_POINTER_REG
GEN_AND_MEM_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R1_REGS
GENERAL_REGS
FPUPPER_REGS
FP_REGS
GENERAL_OR_FP_REGS
SHIFT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R1_REGS
GENERAL_REGS
FPUPPER_REGS
FP_REGS
GENERAL_OR_FP_REGS
SHIFT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
MUL_REGS
GENERAL_REGS
LOAD_FPU_REGS
NO_LOAD_FPU_REGS
FPU_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
OUT_REGS
STD_REGS
ARG_REGS
SRC_REGS
DST_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
R15_REGS
BASE_REGS
GENERAL_REGS
FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
BASE_REGS
GENERAL_REGS
FLOAT_REGS
ALTIVEC_REGS
VRSAVE_REGS
NON_SPECIAL_REGS
MQ_REGS
LINK_REGS
CTR_REGS
LINK_OR_CTR_REGS
SPECIAL_REGS
SPEC_OR_GEN_REGS
CR0_REGS
CR_REGS
NON_FLOAT_REGS
XER_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ADDR_REGS
GENERAL_REGS
FP_REGS
ADDR_FP_REGS
GENERAL_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
PR_REGS
T_REGS
MAC_REGS
FPUL_REGS
SIBCALL_REGS
GENERAL_REGS
FP0_REGS
FP_REGS
DF_REGS
FPSCR_REGS
GENERAL_FP_REGS
TARGET_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
M16_NA_REGS
M16_REGS
T_REG
M16_T_REGS
GR_REGS
FP_REGS
HI_REG
LO_REG
HILO_REG
MD_REGS
COP0_REGS
COP2_REGS
COP3_REGS
HI_AND_GR_REGS
LO_AND_GR_REGS
HILO_AND_GR_REGS
HI_AND_FP_REGS
COP0_AND_GR_REGS
COP2_AND_GR_REGS
COP3_AND_GR_REGS
ALL_COP_REGS
ALL_COP_AND_GR_REGS
ST_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
FPCC_REGS
I64_REGS
GENERAL_REGS
FP_REGS
EXTRA_FP_REGS
GENERAL_OR_FP_REGS
GENERAL_OR_EXTRA_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
R1_REGS
TWO_REGS
R2_REGS
EIGHT_REGS
R8_REGS
ICALL_REGS
GENERAL_REGS
CARRY_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
BR_REGS
FP_REGS
ACC_REG
SP_REG
RL_REGS
GR_REGS
AR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
M16_NA_REGS
M16_REGS
T_REG
M16_T_REGS
GR_REGS
FP_REGS
HI_REG
LO_REG
HILO_REG
MD_REGS
COP0_REGS
COP2_REGS
COP3_REGS
HI_AND_GR_REGS
LO_AND_GR_REGS
HILO_AND_GR_REGS
HI_AND_FP_REGS
COP0_AND_GR_REGS
COP2_AND_GR_REGS
COP3_AND_GR_REGS
ALL_COP_REGS
ALL_COP_AND_GR_REGS
ST_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
M16_NA_REGS
M16_REGS
T_REG
M16_T_REGS
GR_REGS
FP_REGS
HI_REG
LO_REG
HILO_REG
MD_REGS
COP0_REGS
COP2_REGS
COP3_REGS
HI_AND_GR_REGS
LO_AND_GR_REGS
HILO_AND_GR_REGS
HI_AND_FP_REGS
COP0_AND_GR_REGS
COP2_AND_GR_REGS
COP3_AND_GR_REGS
ALL_COP_REGS
ALL_COP_AND_GR_REGS
ST_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REG
R24_REG
R25_REG
R27_REG
GENERAL_REGS
FLOAT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
LPCOUNT_REG
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
FPA_REGS
CIRRUS_REGS
VFP_REGS
IWMMXT_GR_REGS
IWMMXT_REGS
LO_REGS
STACK_REG
BASE_REGS
HI_REGS
CC_REG
VFPCC_REG
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REG
POINTER_X_REGS
POINTER_Y_REGS
POINTER_Z_REGS
STACK_REG
BASE_POINTER_REGS
POINTER_REGS
ADDW_REGS
SIMPLE_LD_REGS
LD_REGS
NO_LD_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
IREGS
BREGS
LREGS
MREGS
CIRCREGS
DAGREGS
EVEN_AREGS
ODD_AREGS
AREGS
CCREGS
EVEN_DREGS
ODD_DREGS
DREGS
PREGS_CLOBBERED
PREGS
DPREGS
MOST_REGS
PROLOGUE_REGS
NON_A_CC_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0R1_REGS
R2R3_REGS
EXT_LOW_REGS
EXT_REGS
ADDR_REGS
INDEX_REGS
BK_REG
SP_REG
RC_REG
COUNTER_REGS
INT_REGS
GENERAL_REGS
DP_REG
ST_REG
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
MULTIPLY_32_REG
MULTIPLY_64_REG
LOW_REGS
HIGH_REGS
REAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ICC_REGS
FCC_REGS
CC_REGS
ICR_REGS
FCR_REGS
CR_REGS
LCR_REG
LR_REG
GR8_REGS
GR9_REGS
GR89_REGS
FDPIC_REGS
FDPIC_FPTR_REGS
FDPIC_CALL_REGS
SPR_REGS
QUAD_ACC_REGS
EVEN_ACC_REGS
ACC_REGS
ACCG_REGS
QUAD_FPR_REGS
FEVEN_REGS
FPR_REGS
QUAD_REGS
EVEN_REGS
GPR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
COUNTER_REGS
SOURCE_REGS
DESTINATION_REGS
GENERAL_REGS
MAC_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
AREG
DREG
CREG
BREG
SIREG
DIREG
AD_REGS
Q_REGS
NON_Q_REGS
INDEX_REGS
LEGACY_REGS
GENERAL_REGS
FP_TOP_REG
FP_SECOND_REG
FLOAT_REGS
SSE_REGS
MMX_REGS
FP_TOP_SSE_REGS
FP_SECOND_SSE_REGS
FLOAT_SSE_REGS
FLOAT_INT_REGS
INT_SSE_REGS
FLOAT_INT_SSE_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
PR_REGS
BR_REGS
AR_M_REGS
AR_I_REGS
ADDL_REGS
GR_REGS
FR_REGS
GR_AND_BR_REGS
GR_AND_FR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DPH_REGS
DPL_REGS
DP_REGS
SP_REGS
IPH_REGS
IPL_REGS
IP_REGS
DP_SP_REGS
PTR_REGS
NONPTR_REGS
NONSP_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
CARRY_REG
ACCUM_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
D_REGS
X_REGS
Y_REGS
SP_REGS
DA_REGS
DB_REGS
Z_REGS
D8_REGS
Q_REGS
D_OR_X_REGS
D_OR_Y_REGS
D_OR_SP_REGS
X_OR_Y_REGS
A_REGS
X_OR_SP_REGS
Y_OR_SP_REGS
X_OR_Y_OR_D_REGS
A_OR_D_REGS
A_OR_SP_REGS
H_REGS
S_REGS
D_OR_S_REGS
X_OR_S_REGS
Y_OR_S_REGS
Z_OR_S_REGS
SP_OR_S_REGS
D_OR_X_OR_S_REGS
D_OR_Y_OR_S_REGS
D_OR_SP_OR_S_REGS
A_OR_S_REGS
D_OR_A_OR_S_REGS
TMP_REGS
D_OR_A_OR_TMP_REGS
G_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDR_REGS
FP_REGS
GENERAL_REGS
DATA_OR_FP_REGS
ADDR_OR_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ONLYR1_REGS
LRW_REGS
GENERAL_REGS
C_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
M16_NA_REGS
M16_REGS
T_REG
M16_T_REGS
PIC_FN_ADDR_REG
LEA_REGS
GR_REGS
FP_REGS
HI_REG
LO_REG
MD_REGS
COP0_REGS
COP2_REGS
COP3_REGS
HI_AND_GR_REGS
LO_AND_GR_REGS
HI_AND_FP_REGS
COP0_AND_GR_REGS
COP2_AND_GR_REGS
COP3_AND_GR_REGS
ALL_COP_REGS
ALL_COP_AND_GR_REGS
ST_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
REMAINDER_REG
HIMULT_REG
SYSTEM_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDRESS_REGS
SP_REGS
DATA_OR_ADDRESS_REGS
SP_OR_ADDRESS_REGS
EXTENDED_REGS
DATA_OR_EXTENDED_REGS
ADDRESS_OR_EXTENDED_REGS
SP_OR_EXTENDED_REGS
SP_OR_ADDRESS_OR_EXTENDED_REGS
FP_REGS
FP_ACC_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
FLOAT_REG0
LONG_FLOAT_REG0
FLOAT_REGS
LONG_REGS
FP_REGS
GEN_AND_FP_REGS
FRAME_POINTER_REG
STACK_POINTER_REG
GEN_AND_MEM_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R1_REGS
GENERAL_REGS
FPUPPER_REGS
FP_REGS
GENERAL_OR_FP_REGS
SHIFT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R1_REGS
GENERAL_REGS
FPUPPER_REGS
FP_REGS
GENERAL_OR_FP_REGS
SHIFT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
MUL_REGS
GENERAL_REGS
LOAD_FPU_REGS
NO_LOAD_FPU_REGS
FPU_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
BASE_REGS
GENERAL_REGS
FLOAT_REGS
ALTIVEC_REGS
VRSAVE_REGS
VSCR_REGS
SPE_ACC_REGS
SPEFSCR_REGS
NON_SPECIAL_REGS
MQ_REGS
LINK_REGS
CTR_REGS
LINK_OR_CTR_REGS
SPECIAL_REGS
SPEC_OR_GEN_REGS
CR0_REGS
CR_REGS
NON_FLOAT_REGS
XER_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
CC_REGS
ADDR_REGS
GENERAL_REGS
ACCESS_REGS
ADDR_CC_REGS
GENERAL_CC_REGS
FP_REGS
ADDR_FP_REGS
GENERAL_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
PR_REGS
T_REGS
MAC_REGS
FPUL_REGS
SIBCALL_REGS
GENERAL_REGS
FP0_REGS
FP_REGS
DF_HI_REGS
DF_REGS
FPSCR_REGS
GENERAL_FP_REGS
TARGET_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
FPCC_REGS
I64_REGS
GENERAL_REGS
FP_REGS
EXTRA_FP_REGS
GENERAL_OR_FP_REGS
GENERAL_OR_EXTRA_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
R1_REGS
TWO_REGS
R2_REGS
EIGHT_REGS
R8_REGS
ICALL_REGS
GENERAL_REGS
CARRY_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
BR_REGS
FP_REGS
ACC_REG
SP_REG
RL_REGS
GR_REGS
AR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REG
R24_REG
R25_REG
R27_REG
GENERAL_REGS
FLOAT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
LPCOUNT_REG
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
FPA_REGS
CIRRUS_REGS
VFP_REGS
IWMMXT_GR_REGS
IWMMXT_REGS
LO_REGS
STACK_REG
BASE_REGS
HI_REGS
CC_REG
VFPCC_REG
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REG
POINTER_X_REGS
POINTER_Y_REGS
POINTER_Z_REGS
STACK_REG
BASE_POINTER_REGS
POINTER_REGS
ADDW_REGS
SIMPLE_LD_REGS
LD_REGS
NO_LD_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
IREGS
BREGS
LREGS
MREGS
CIRCREGS
DAGREGS
EVEN_AREGS
ODD_AREGS
AREGS
CCREGS
EVEN_DREGS
ODD_DREGS
DREGS
FDPIC_REGS
FDPIC_FPTR_REGS
PREGS_CLOBBERED
PREGS
IPREGS
DPREGS
MOST_REGS
LT_REGS
LC_REGS
LB_REGS
PROLOGUE_REGS
NON_A_CC_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0R1_REGS
R2R3_REGS
EXT_LOW_REGS
EXT_REGS
ADDR_REGS
INDEX_REGS
BK_REG
SP_REG
RC_REG
COUNTER_REGS
INT_REGS
GENERAL_REGS
DP_REG
ST_REG
ALL_REGS
LIM_REG_CLASSES
NO_REGS
MOF_REGS
CC0_REGS
SPECIAL_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
LO_REGS
HI_REGS
HILO_REGS
NOSP_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
MULTIPLY_32_REG
MULTIPLY_64_REG
LOW_REGS
HIGH_REGS
REAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ICC_REGS
FCC_REGS
CC_REGS
ICR_REGS
FCR_REGS
CR_REGS
LCR_REG
LR_REG
GR8_REGS
GR9_REGS
GR89_REGS
FDPIC_REGS
FDPIC_FPTR_REGS
FDPIC_CALL_REGS
SPR_REGS
QUAD_ACC_REGS
EVEN_ACC_REGS
ACC_REGS
ACCG_REGS
QUAD_FPR_REGS
FEVEN_REGS
FPR_REGS
QUAD_REGS
EVEN_REGS
GPR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
COUNTER_REGS
SOURCE_REGS
DESTINATION_REGS
GENERAL_REGS
MAC_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
AREG
DREG
CREG
BREG
SIREG
DIREG
AD_REGS
Q_REGS
NON_Q_REGS
INDEX_REGS
LEGACY_REGS
GENERAL_REGS
FP_TOP_REG
FP_SECOND_REG
FLOAT_REGS
SSE_REGS
MMX_REGS
FP_TOP_SSE_REGS
FP_SECOND_SSE_REGS
FLOAT_SSE_REGS
FLOAT_INT_REGS
INT_SSE_REGS
FLOAT_INT_SSE_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
PR_REGS
BR_REGS
AR_M_REGS
AR_I_REGS
ADDL_REGS
GR_REGS
FP_REGS
FR_REGS
GR_AND_BR_REGS
GR_AND_FR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
SP_REGS
FB_REGS
SB_REGS
CR_REGS
R0_REGS
R1_REGS
R2_REGS
R3_REGS
R02_REGS
HL_REGS
QI_REGS
R23_REGS
R03_REGS
DI_REGS
A0_REGS
A1_REGS
A_REGS
AD_REGS
PS_REGS
SI_REGS
HI_REGS
RA_REGS
GENERAL_REGS
FLG_REGS
HC_REGS
MEM_REGS
R02_A_MEM_REGS
A_HL_MEM_REGS
R1_R3_A_MEM_REGS
R03_MEM_REGS
A_HI_MEM_REGS
A_AD_CR_MEM_SI_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
CARRY_REG
ACCUM_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
D_REGS
X_REGS
Y_REGS
SP_REGS
DA_REGS
DB_REGS
Z_REGS
D8_REGS
Q_REGS
D_OR_X_REGS
D_OR_Y_REGS
D_OR_SP_REGS
X_OR_Y_REGS
A_REGS
X_OR_SP_REGS
Y_OR_SP_REGS
X_OR_Y_OR_D_REGS
A_OR_D_REGS
A_OR_SP_REGS
H_REGS
S_REGS
D_OR_S_REGS
X_OR_S_REGS
Y_OR_S_REGS
Z_OR_S_REGS
SP_OR_S_REGS
D_OR_X_OR_S_REGS
D_OR_Y_OR_S_REGS
D_OR_SP_OR_S_REGS
A_OR_S_REGS
D_OR_A_OR_S_REGS
TMP_REGS
D_OR_A_OR_TMP_REGS
G_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDR_REGS
FP_REGS
GENERAL_REGS
DATA_OR_FP_REGS
ADDR_OR_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ONLYR1_REGS
LRW_REGS
GENERAL_REGS
C_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
M16_NA_REGS
M16_REGS
T_REG
M16_T_REGS
PIC_FN_ADDR_REG
V1_REG
LEA_REGS
GR_REGS
FP_REGS
HI_REG
LO_REG
MD_REGS
COP0_REGS
COP2_REGS
COP3_REGS
HI_AND_GR_REGS
LO_AND_GR_REGS
HI_AND_FP_REGS
COP0_AND_GR_REGS
COP2_AND_GR_REGS
COP3_AND_GR_REGS
ALL_COP_REGS
ALL_COP_AND_GR_REGS
ST_REGS
DSP_ACC_REGS
ACC_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
REMAINDER_REG
HIMULT_REG
SYSTEM_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDRESS_REGS
SP_REGS
DATA_OR_ADDRESS_REGS
SP_OR_ADDRESS_REGS
EXTENDED_REGS
DATA_OR_EXTENDED_REGS
ADDRESS_OR_EXTENDED_REGS
SP_OR_EXTENDED_REGS
SP_OR_ADDRESS_OR_EXTENDED_REGS
FP_REGS
FP_ACC_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R1_REGS
GENERAL_REGS
FPUPPER_REGS
FP_REGS
GENERAL_OR_FP_REGS
SHIFT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R1_REGS
GENERAL_REGS
FPUPPER_REGS
FP_REGS
GENERAL_OR_FP_REGS
SHIFT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
MUL_REGS
GENERAL_REGS
LOAD_FPU_REGS
NO_LOAD_FPU_REGS
FPU_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
BASE_REGS
GENERAL_REGS
FLOAT_REGS
ALTIVEC_REGS
VRSAVE_REGS
VSCR_REGS
SPE_ACC_REGS
SPEFSCR_REGS
NON_SPECIAL_REGS
MQ_REGS
LINK_REGS
CTR_REGS
LINK_OR_CTR_REGS
SPECIAL_REGS
SPEC_OR_GEN_REGS
CR0_REGS
CR_REGS
NON_FLOAT_REGS
XER_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
CC_REGS
ADDR_REGS
GENERAL_REGS
ACCESS_REGS
ADDR_CC_REGS
GENERAL_CC_REGS
FP_REGS
ADDR_FP_REGS
GENERAL_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
G16_REGS
G32_REGS
T32_REGS
HI_REG
LO_REG
CE_REGS
CN_REG
LC_REG
SC_REG
SP_REGS
CR_REGS
CP1_REGS
CP2_REGS
CP3_REGS
CPA_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
PR_REGS
T_REGS
MAC_REGS
FPUL_REGS
SIBCALL_REGS
GENERAL_REGS
FP0_REGS
FP_REGS
DF_HI_REGS
DF_REGS
FPSCR_REGS
GENERAL_FP_REGS
GENERAL_DF_REGS
TARGET_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
FPCC_REGS
I64_REGS
GENERAL_REGS
FP_REGS
EXTRA_FP_REGS
GENERAL_OR_FP_REGS
GENERAL_OR_EXTRA_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
R1_REGS
TWO_REGS
R2_REGS
EIGHT_REGS
R8_REGS
ICALL_REGS
GENERAL_REGS
CARRY_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
BR_REGS
FP_REGS
ACC_REG
SP_REG
RL_REGS
GR_REGS
AR_REGS
ALL_REGS
LIM_REG_CLASSES

Definition at line 1042 of file arm.h.

---

Variable Documentation

int arm_arch4

Definition at line 241 of file arm.c.

int arm_arch5

Definition at line 244 of file arm.c.

int arm_arch5e

Definition at line 247 of file arm.c.

int arm_ccfsm_state

Definition at line 285 of file arm.c.

struct rtx_def* arm_compare_op0

Definition at line 193 of file arm.c.

struct rtx_def* arm_compare_op1

Definition at line 193 of file arm.c.

arm_cc arm_current_cc

Definition at line 286 of file arm.c.

int arm_fast_multiply

Definition at line 238 of file arm.c.

enum floating_point_type arm_fpu

Definition at line 196 of file arm.c.

enum floating_point_type arm_fpu_arch

Definition at line 199 of file arm.c.

int arm_is_6_or_7

Definition at line 259 of file arm.c.

int arm_is_strong

Definition at line 253 of file arm.c.

int arm_is_xscale

Definition at line 256 of file arm.c.

int arm_ld_sched

Definition at line 250 of file arm.c.

int arm_pic_register

Definition at line 271 of file arm.c.

const char* arm_pic_register_string

Definition at line 270 of file arm.c.

enum prog_mode_type arm_prgmode

Definition at line 202 of file arm.c.

struct arm_cpu_select arm_select[]

Definition at line 384 of file arm.c.

int arm_structure_size_boundary

Definition at line 209 of file arm.c.

struct rtx_def* arm_target_insn

Definition at line 287 of file arm.c.

int arm_target_label

Definition at line 288 of file arm.c.

int making_const_table

Definition at line 189 of file arm.c.

struct rtx_def* pool_vector_label

int return_used_this_function

Definition at line 275 of file arm.c.

const char* structure_size_string

Definition at line 208 of file arm.c.

int target_flags

Definition at line 35 of file gensupport.c.

const char* target_fp_name

Definition at line 205 of file arm.c.

int thumb_code

Definition at line 262 of file arm.c.