Open64: osprey/kgccfe/gnu/ia64/insn-output.c Source File

00001 /* Generated automatically by the program `genoutput'
00002    from the machine description file `md'.  */
00003 
00004 #include "config.h"
00005 #include "system.h"
00006 #include "flags.h"
00007 #include "ggc.h"
00008 #include "rtl.h"
00009 #include "expr.h"
00010 #include "insn-codes.h"
00011 #include "tm_p.h"
00012 #include "function.h"
00013 #include "regs.h"
00014 #include "hard-reg-set.h"
00015 #include "real.h"
00016 #include "insn-config.h"
00017 
00018 #include "conditions.h"
00019 #include "insn-attr.h"
00020 
00021 #include "recog.h"
00022 
00023 #include "toplev.h"
00024 #include "output.h"
00025 
00026 static const char * const output_0[] = {
00027   "cmp.ne %0, p0 = r0, r0",
00028   "cmp.eq %0, p0 = r0, r0",
00029   "(%1) cmp.eq.unc %0, p0 = r0, r0",
00030 };
00031 
00032 static const char * const output_1[] = {
00033   "cmp.ne %0, %I0 = r0, r0",
00034   "cmp.eq %0, %I0 = r0, r0",
00035   "#",
00036   "#",
00037   "tbit.nz %0, %I0 = %1, 0",
00038   "adds %0 = %1, r0",
00039   "ld1%O1 %0 = %1%P1",
00040   "st1%Q0 %0 = %1%P0",
00041   "mov %0 = %1",
00042 };
00043 
00044 static const char * const output_2[] = {
00045   "mov %0 = %r1",
00046   "addl %0 = %1, r0",
00047   "ld1%O1 %0 = %1%P1",
00048   "st1%Q0 %0 = %r1%P0",
00049   "getf.sig %0 = %1",
00050   "setf.sig %0 = %r1",
00051   "mov %0 = %1",
00052 };
00053 
00054 static const char * const output_3[] = {
00055   "mov %0 = %r1",
00056   "addl %0 = %1, r0",
00057   "ld2%O1 %0 = %1%P1",
00058   "st2%Q0 %0 = %r1%P0",
00059   "getf.sig %0 = %1",
00060   "setf.sig %0 = %r1",
00061   "mov %0 = %1",
00062 };
00063 
00064 static const char *output_4 PARAMS ((rtx *, rtx));
00065 
00066 static const char *
00067 output_4 (operands, insn)
00068      rtx *operands ATTRIBUTE_UNUSED;
00069      rtx insn ATTRIBUTE_UNUSED;
00070 {
00071  abort ();
00072 }
00073 
00074 static const char * const output_5[] = {
00075   "mov %0 = %r1",
00076   "addl %0 = %1, r0",
00077   "movl %0 = %1",
00078   "ld4%O1 %0 = %1%P1",
00079   "st4%Q0 %0 = %r1%P0",
00080   "getf.sig %0 = %1",
00081   "setf.sig %0 = %r1",
00082   "mov %0 = %1",
00083   "mov %0 = %1",
00084   "mov %0 = %r1",
00085 };
00086 
00087 static const char *output_6 PARAMS ((rtx *, rtx));
00088 
00089 static const char *
00090 output_6 (operands, insn)
00091      rtx *operands ATTRIBUTE_UNUSED;
00092      rtx insn ATTRIBUTE_UNUSED;
00093 {
00094  abort ();
00095 }
00096 
00097 static const char *output_7 PARAMS ((rtx *, rtx));
00098 
00099 static const char *
00100 output_7 (operands, insn)
00101      rtx *operands ATTRIBUTE_UNUSED;
00102      rtx insn ATTRIBUTE_UNUSED;
00103 {
00104 {
00105   static const char * const alt[] = {
00106     "%,mov %0 = %r1",
00107     "%,addl %0 = %1, r0",
00108     "%,movl %0 = %1",
00109     "%,ld8%O1 %0 = %1%P1",
00110     "%,st8%Q0 %0 = %r1%P0",
00111     "%,getf.sig %0 = %1",
00112     "%,setf.sig %0 = %r1",
00113     "%,mov %0 = %1",
00114     "%,ldf8 %0 = %1%P1",
00115     "%,stf8 %0 = %1%P0",
00116     "%,mov %0 = %1",
00117     "%,mov %0 = %r1",
00118     "%,mov %0 = %1",
00119     "%,mov %0 = %1",
00120     "%,mov %0 = %1",
00121     "%,mov %0 = %1",
00122     "mov %0 = pr",
00123     "mov pr = %1, -1"
00124   };
00125 
00126   if (which_alternative == 2 && ! TARGET_NO_PIC
00127       && symbolic_operand (operands[1], VOIDmode))
00128     abort ();
00129 
00130   return alt[which_alternative];
00131 }
00132 }
00133 
00134 static const char *output_11 PARAMS ((rtx *, rtx));
00135 
00136 static const char *
00137 output_11 (operands, insn)
00138      rtx *operands ATTRIBUTE_UNUSED;
00139      rtx insn ATTRIBUTE_UNUSED;
00140 {
00141 {
00142   if (HAVE_AS_LTOFFX_LDXMOV_RELOCS)
00143     return "%,addl %0 = @ltoffx(%1), %2";
00144   else
00145     return "%,addl %0 = @ltoff(%1), %2";
00146 }
00147 }
00148 
00149 static const char *output_12 PARAMS ((rtx *, rtx));
00150 
00151 static const char *
00152 output_12 (operands, insn)
00153      rtx *operands ATTRIBUTE_UNUSED;
00154      rtx insn ATTRIBUTE_UNUSED;
00155 {
00156 {
00157   if (HAVE_AS_LTOFFX_LDXMOV_RELOCS)
00158     return "%,ld8.mov %0 = [%1], %2";
00159   else
00160     return "%,ld8 %0 = [%1]";
00161 }
00162 }
00163 
00164 static const char * const output_26[] = {
00165   "mov %0 = %F1",
00166   "ldfs %0 = %1%P1",
00167   "stfs %0 = %F1%P0",
00168   "getf.s %0 = %F1",
00169   "setf.s %0 = %1",
00170   "mov %0 = %1",
00171   "ld4%O1 %0 = %1%P1",
00172   "st4%Q0 %0 = %1%P0",
00173 };
00174 
00175 static const char * const output_27[] = {
00176   "mov %0 = %F1",
00177   "ldfd %0 = %1%P1",
00178   "stfd %0 = %F1%P0",
00179   "getf.d %0 = %F1",
00180   "setf.d %0 = %1",
00181   "mov %0 = %1",
00182   "ld8%O1 %0 = %1%P1",
00183   "st8%Q0 %0 = %1%P0",
00184 };
00185 
00186 static const char * const output_28[] = {
00187   "mov %0 = %F1",
00188   "ldfe %0 = %1%P1",
00189   "stfe %0 = %F1%P0",
00190 };
00191 
00192 static const char * const output_31[] = {
00193   "sxt4 %0 = %1",
00194   "fsxt.r %0 = %1, %1",
00195 };
00196 
00197 static const char * const output_32[] = {
00198   "zxt1 %0 = %1",
00199   "ld1%O1 %0 = %1%P1",
00200 };
00201 
00202 static const char * const output_33[] = {
00203   "zxt2 %0 = %1",
00204   "ld2%O1 %0 = %1%P1",
00205 };
00206 
00207 static const char * const output_34[] = {
00208   "zxt4 %0 = %1",
00209   "ld4%O1 %0 = %1%P1",
00210   "fmix.r %0 = f0, %1",
00211 };
00212 
00213 static const char *output_56 PARAMS ((rtx *, rtx));
00214 
00215 static const char *
00216 output_56 (operands, insn)
00217      rtx *operands ATTRIBUTE_UNUSED;
00218      rtx insn ATTRIBUTE_UNUSED;
00219 {
00220 {
00221   operands[3] = GEN_INT (ia64_depz_field_mask (operands[3], operands[2]));
00222   return "%,dep.z %0 = %1, %2, %3";
00223 }
00224 }
00225 
00226 static const char * const output_61[] = {
00227   "#",
00228   "tbit.nz.and.orcm %0, %I0 = %2, 0",
00229   "and %0 = %2, %1",
00230 };
00231 
00232 static const char * const output_62[] = {
00233   "#",
00234   "tbit.z.and.orcm %0, %I0 = %1, 0",
00235   "andcm %0 = %2, %1",
00236 };
00237 
00238 static const char * const output_63[] = {
00239   "#",
00240   "tbit.nz.or.andcm %0, %I0 = %2, 0",
00241   "or %0 = %2, %1",
00242 };
00243 
00244 static const char * const output_64[] = {
00245   "#",
00246   "tbit.z.or.andcm %0, %I0 = %1, 0",
00247 };
00248 
00249 static const char * const output_65[] = {
00250   "tbit.z %0, %I0 = %1, 0",
00251   "xor %0 = 1, %1",
00252   "#",
00253   "#",
00254 };
00255 
00256 static const char * const output_91[] = {
00257   "add %0 = %1, %2",
00258   "adds %0 = %2, %1",
00259   "addl %0 = %2, %1",
00260 };
00261 
00262 static const char * const output_101[] = {
00263   "add %0 = %1, %2",
00264   "adds %0 = %2, %1",
00265   "addl %0 = %2, %1",
00266 };
00267 
00268 static const char * const output_187[] = {
00269   "shladd %0 = %1, %2, r0",
00270   "dep.z %0 = %1, %2, %E2",
00271   "shl %0 = %1, %2",
00272 };
00273 
00274 static const char * const output_190[] = {
00275   "shladd %0 = %1, %2, r0",
00276   "shl %0 = %1, %2",
00277   "shl %0 = %1, %2",
00278 };
00279 
00280 static const char *output_192 PARAMS ((rtx *, rtx));
00281 
00282 static const char *
00283 output_192 (operands, insn)
00284      rtx *operands ATTRIBUTE_UNUSED;
00285      rtx insn ATTRIBUTE_UNUSED;
00286 {
00287  abort ();
00288 }
00289 
00290 static const char * const output_193[] = {
00291   "shr %0 = %1, %2",
00292   "shr %0 = %1, %2",
00293 };
00294 
00295 static const char * const output_194[] = {
00296   "shr.u %0 = %1, %2",
00297   "shr.u %0 = %1, %2",
00298 };
00299 
00300 static const char * const output_198[] = {
00301   "and %0 = %2, %1",
00302   "fand %0 = %2, %1",
00303 };
00304 
00305 static const char * const output_199[] = {
00306   "andcm %0 = %2, %1",
00307   "fandcm %0 = %2, %1",
00308 };
00309 
00310 static const char * const output_200[] = {
00311   "or %0 = %2, %1",
00312   "for %0 = %2, %1",
00313 };
00314 
00315 static const char * const output_201[] = {
00316   "xor %0 = %2, %1",
00317   "fxor %0 = %2, %1",
00318 };
00319 
00320 static const char *output_217 PARAMS ((rtx *, rtx));
00321 
00322 static const char *
00323 output_217 (operands, insn)
00324      rtx *operands ATTRIBUTE_UNUSED;
00325      rtx insn ATTRIBUTE_UNUSED;
00326 {
00327 { abort (); }
00328 }
00329 
00330 static const char *output_219 PARAMS ((rtx *, rtx));
00331 
00332 static const char *
00333 output_219 (operands, insn)
00334      rtx *operands ATTRIBUTE_UNUSED;
00335      rtx insn ATTRIBUTE_UNUSED;
00336 {
00337 { abort (); }
00338 }
00339 
00340 static const char * const output_236[] = {
00341   "add %0 = %1, %2",
00342   "adds %0 = %2, %1",
00343   "addl %0 = %2, %1",
00344 };
00345 
00346 static const char *output_240 PARAMS ((rtx *, rtx));
00347 
00348 static const char *
00349 output_240 (operands, insn)
00350      rtx *operands ATTRIBUTE_UNUSED;
00351      rtx insn ATTRIBUTE_UNUSED;
00352 {
00353 {
00354   /* Note that we use a C output pattern here to avoid the predicate
00355      being automatically added before the .mem.offset directive.  */
00356   return ".mem.offset %2, 0\n\t%,st8.spill %0 = %1%P0";
00357 }
00358 }
00359 
00360 static const char *output_241 PARAMS ((rtx *, rtx));
00361 
00362 static const char *
00363 output_241 (operands, insn)
00364      rtx *operands ATTRIBUTE_UNUSED;
00365      rtx insn ATTRIBUTE_UNUSED;
00366 {
00367 { return ".mem.offset %2, 0\n\t%,ld8.fill %0 = %1%P1"; }
00368 }
00369 
00370 static const char *output_244 PARAMS ((rtx *, rtx));
00371 
00372 static const char *
00373 output_244 (operands, insn)
00374      rtx *operands ATTRIBUTE_UNUSED;
00375      rtx insn ATTRIBUTE_UNUSED;
00376 {
00377 
00378 {
00379   return ";;\n\t%,mov %0 = ar.bsp";
00380 }
00381 }
00382 
00383 static const char *output_253 PARAMS ((rtx *, rtx));
00384 
00385 static const char *
00386 output_253 (operands, insn)
00387      rtx *operands ATTRIBUTE_UNUSED;
00388      rtx insn ATTRIBUTE_UNUSED;
00389 {
00390 { return get_bundle_name (INTVAL (operands[0])); }
00391 }
00392 
00393 static const char *output_259 PARAMS ((rtx *, rtx));
00394 
00395 static const char *
00396 output_259 (operands, insn)
00397      rtx *operands ATTRIBUTE_UNUSED;
00398      rtx insn ATTRIBUTE_UNUSED;
00399 {
00400 {
00401   static const char * const alt[2][4] = {
00402     {
00403       "lfetch.nta [%0]",
00404       "lfetch.nt1 [%0]",
00405       "lfetch.nt2 [%0]",
00406       "lfetch [%0]"
00407     },
00408     {
00409       "lfetch.excl.nta [%0]",
00410       "lfetch.excl.nt1 [%0]",
00411       "lfetch.excl.nt2 [%0]",
00412       "lfetch.excl [%0]"
00413     }
00414   };
00415   int i = (INTVAL (operands[1]));
00416   int j = (INTVAL (operands[2]));
00417 
00418   if (i != 0 && i != 1)
00419     abort ();
00420   if (j < 0 || j > 3)
00421     abort ();
00422   return alt[i][j];
00423 }
00424 }
00425 
00426 static const char *output_270 PARAMS ((rtx *, rtx));
00427 
00428 static const char *
00429 output_270 (operands, insn)
00430      rtx *operands ATTRIBUTE_UNUSED;
00431      rtx insn ATTRIBUTE_UNUSED;
00432 {
00433 {
00434   emit_safe_across_calls (asm_out_file);
00435   return "";
00436 }
00437 }
00438 
00439 static const char * const output_418[] = {
00440   "(%J2) cmp.ne %0, %I0 = r0, r0",
00441   "(%J2) cmp.eq %0, %I0 = r0, r0",
00442   "#",
00443   "#",
00444   "(%J2) tbit.nz %0, %I0 = %1, 0",
00445   "(%J2) adds %0 = %1, r0",
00446   "(%J2) ld1%O1 %0 = %1%P1",
00447   "(%J2) st1%Q0 %0 = %1%P0",
00448   "(%J2) mov %0 = %1",
00449 };
00450 
00451 static const char * const output_419[] = {
00452   "(%J2) mov %0 = %r1",
00453   "(%J2) addl %0 = %1, r0",
00454   "(%J2) ld1%O1 %0 = %1%P1",
00455   "(%J2) st1%Q0 %0 = %r1%P0",
00456   "(%J2) getf.sig %0 = %1",
00457   "(%J2) setf.sig %0 = %r1",
00458   "(%J2) mov %0 = %1",
00459 };
00460 
00461 static const char * const output_420[] = {
00462   "(%J2) mov %0 = %r1",
00463   "(%J2) addl %0 = %1, r0",
00464   "(%J2) ld2%O1 %0 = %1%P1",
00465   "(%J2) st2%Q0 %0 = %r1%P0",
00466   "(%J2) getf.sig %0 = %1",
00467   "(%J2) setf.sig %0 = %r1",
00468   "(%J2) mov %0 = %1",
00469 };
00470 
00471 static const char *output_421 PARAMS ((rtx *, rtx));
00472 
00473 static const char *
00474 output_421 (operands, insn)
00475      rtx *operands ATTRIBUTE_UNUSED;
00476      rtx insn ATTRIBUTE_UNUSED;
00477 {
00478  abort ();
00479 }
00480 
00481 static const char * const output_422[] = {
00482   "(%J2) mov %0 = %r1",
00483   "(%J2) addl %0 = %1, r0",
00484   "(%J2) movl %0 = %1",
00485   "(%J2) ld4%O1 %0 = %1%P1",
00486   "(%J2) st4%Q0 %0 = %r1%P0",
00487   "(%J2) getf.sig %0 = %1",
00488   "(%J2) setf.sig %0 = %r1",
00489   "(%J2) mov %0 = %1",
00490   "(%J2) mov %0 = %1",
00491   "(%J2) mov %0 = %r1",
00492 };
00493 
00494 static const char *output_423 PARAMS ((rtx *, rtx));
00495 
00496 static const char *
00497 output_423 (operands, insn)
00498      rtx *operands ATTRIBUTE_UNUSED;
00499      rtx insn ATTRIBUTE_UNUSED;
00500 {
00501  abort ();
00502 }
00503 
00504 static const char *output_424 PARAMS ((rtx *, rtx));
00505 
00506 static const char *
00507 output_424 (operands, insn)
00508      rtx *operands ATTRIBUTE_UNUSED;
00509      rtx insn ATTRIBUTE_UNUSED;
00510 {
00511 {
00512   static const char * const alt[] = {
00513     "%,mov %0 = %r1",
00514     "%,addl %0 = %1, r0",
00515     "%,movl %0 = %1",
00516     "%,ld8%O1 %0 = %1%P1",
00517     "%,st8%Q0 %0 = %r1%P0",
00518     "%,getf.sig %0 = %1",
00519     "%,setf.sig %0 = %r1",
00520     "%,mov %0 = %1",
00521     "%,ldf8 %0 = %1%P1",
00522     "%,stf8 %0 = %1%P0",
00523     "%,mov %0 = %1",
00524     "%,mov %0 = %r1",
00525     "%,mov %0 = %1",
00526     "%,mov %0 = %1",
00527     "%,mov %0 = %1",
00528     "%,mov %0 = %1",
00529     "mov %0 = pr",
00530     "mov pr = %1, -1"
00531   };
00532 
00533   if (which_alternative == 2 && ! TARGET_NO_PIC
00534       && symbolic_operand (operands[1], VOIDmode))
00535     abort ();
00536 
00537   return alt[which_alternative];
00538 }
00539 }
00540 
00541 static const char *output_428 PARAMS ((rtx *, rtx));
00542 
00543 static const char *
00544 output_428 (operands, insn)
00545      rtx *operands ATTRIBUTE_UNUSED;
00546      rtx insn ATTRIBUTE_UNUSED;
00547 {
00548 {
00549   if (HAVE_AS_LTOFFX_LDXMOV_RELOCS)
00550     return "%,addl %0 = @ltoffx(%1), %2";
00551   else
00552     return "%,addl %0 = @ltoff(%1), %2";
00553 }
00554 }
00555 
00556 static const char *output_429 PARAMS ((rtx *, rtx));
00557 
00558 static const char *
00559 output_429 (operands, insn)
00560      rtx *operands ATTRIBUTE_UNUSED;
00561      rtx insn ATTRIBUTE_UNUSED;
00562 {
00563 {
00564   if (HAVE_AS_LTOFFX_LDXMOV_RELOCS)
00565     return "%,ld8.mov %0 = [%1], %2";
00566   else
00567     return "%,ld8 %0 = [%1]";
00568 }
00569 }
00570 
00571 static const char * const output_441[] = {
00572   "(%J2) mov %0 = %F1",
00573   "(%J2) ldfs %0 = %1%P1",
00574   "(%J2) stfs %0 = %F1%P0",
00575   "(%J2) getf.s %0 = %F1",
00576   "(%J2) setf.s %0 = %1",
00577   "(%J2) mov %0 = %1",
00578   "(%J2) ld4%O1 %0 = %1%P1",
00579   "(%J2) st4%Q0 %0 = %1%P0",
00580 };
00581 
00582 static const char * const output_442[] = {
00583   "(%J2) mov %0 = %F1",
00584   "(%J2) ldfd %0 = %1%P1",
00585   "(%J2) stfd %0 = %F1%P0",
00586   "(%J2) getf.d %0 = %F1",
00587   "(%J2) setf.d %0 = %1",
00588   "(%J2) mov %0 = %1",
00589   "(%J2) ld8%O1 %0 = %1%P1",
00590   "(%J2) st8%Q0 %0 = %1%P0",
00591 };
00592 
00593 static const char * const output_443[] = {
00594   "(%J2) mov %0 = %F1",
00595   "(%J2) ldfe %0 = %1%P1",
00596   "(%J2) stfe %0 = %F1%P0",
00597 };
00598 
00599 static const char * const output_446[] = {
00600   "(%J2) sxt4 %0 = %1",
00601   "(%J2) fsxt.r %0 = %1, %1",
00602 };
00603 
00604 static const char * const output_447[] = {
00605   "(%J2) zxt1 %0 = %1",
00606   "(%J2) ld1%O1 %0 = %1%P1",
00607 };
00608 
00609 static const char * const output_448[] = {
00610   "(%J2) zxt2 %0 = %1",
00611   "(%J2) ld2%O1 %0 = %1%P1",
00612 };
00613 
00614 static const char * const output_449[] = {
00615   "(%J2) zxt4 %0 = %1",
00616   "(%J2) ld4%O1 %0 = %1%P1",
00617   "(%J2) fmix.r %0 = f0, %1",
00618 };
00619 
00620 static const char *output_471 PARAMS ((rtx *, rtx));
00621 
00622 static const char *
00623 output_471 (operands, insn)
00624      rtx *operands ATTRIBUTE_UNUSED;
00625      rtx insn ATTRIBUTE_UNUSED;
00626 {
00627 {
00628   operands[3] = GEN_INT (ia64_depz_field_mask (operands[3], operands[2]));
00629   return "%,dep.z %0 = %1, %2, %3";
00630 }
00631 }
00632 
00633 static const char * const output_476[] = {
00634   "#",
00635   "(%J3) tbit.nz.and.orcm %0, %I0 = %2, 0",
00636   "(%J3) and %0 = %2, %1",
00637 };
00638 
00639 static const char * const output_477[] = {
00640   "#",
00641   "(%J3) tbit.z.and.orcm %0, %I0 = %1, 0",
00642   "(%J3) andcm %0 = %2, %1",
00643 };
00644 
00645 static const char * const output_478[] = {
00646   "#",
00647   "(%J3) tbit.nz.or.andcm %0, %I0 = %2, 0",
00648   "(%J3) or %0 = %2, %1",
00649 };
00650 
00651 static const char * const output_479[] = {
00652   "#",
00653   "(%J3) tbit.z.or.andcm %0, %I0 = %1, 0",
00654 };
00655 
00656 static const char * const output_480[] = {
00657   "(%J3) tbit.z %0, %I0 = %1, 0",
00658   "(%J3) xor %0 = 1, %1",
00659   "#",
00660   "#",
00661 };
00662 
00663 static const char * const output_506[] = {
00664   "(%J3) add %0 = %1, %2",
00665   "(%J3) adds %0 = %2, %1",
00666   "(%J3) addl %0 = %2, %1",
00667 };
00668 
00669 static const char * const output_515[] = {
00670   "(%J3) add %0 = %1, %2",
00671   "(%J3) adds %0 = %2, %1",
00672   "(%J3) addl %0 = %2, %1",
00673 };
00674 
00675 static const char * const output_592[] = {
00676   "(%J3) shladd %0 = %1, %2, r0",
00677   "(%J3) dep.z %0 = %1, %2, %E2",
00678   "(%J3) shl %0 = %1, %2",
00679 };
00680 
00681 static const char * const output_595[] = {
00682   "(%J3) shladd %0 = %1, %2, r0",
00683   "(%J3) shl %0 = %1, %2",
00684   "(%J3) shl %0 = %1, %2",
00685 };
00686 
00687 static const char *output_597 PARAMS ((rtx *, rtx));
00688 
00689 static const char *
00690 output_597 (operands, insn)
00691      rtx *operands ATTRIBUTE_UNUSED;
00692      rtx insn ATTRIBUTE_UNUSED;
00693 {
00694  abort ();
00695 }
00696 
00697 static const char * const output_598[] = {
00698   "(%J3) shr %0 = %1, %2",
00699   "(%J3) shr %0 = %1, %2",
00700 };
00701 
00702 static const char * const output_599[] = {
00703   "(%J3) shr.u %0 = %1, %2",
00704   "(%J3) shr.u %0 = %1, %2",
00705 };
00706 
00707 static const char * const output_603[] = {
00708   "(%J3) and %0 = %2, %1",
00709   "(%J3) fand %0 = %2, %1",
00710 };
00711 
00712 static const char * const output_604[] = {
00713   "(%J3) andcm %0 = %2, %1",
00714   "(%J3) fandcm %0 = %2, %1",
00715 };
00716 
00717 static const char * const output_605[] = {
00718   "(%J3) or %0 = %2, %1",
00719   "(%J3) for %0 = %2, %1",
00720 };
00721 
00722 static const char * const output_606[] = {
00723   "(%J3) xor %0 = %2, %1",
00724   "(%J3) fxor %0 = %2, %1",
00725 };
00726 
00727 static const char * const output_630[] = {
00728   "(%J4) add %0 = %1, %2",
00729   "(%J4) adds %0 = %2, %1",
00730   "(%J4) addl %0 = %2, %1",
00731 };
00732 
00733 static const char *output_632 PARAMS ((rtx *, rtx));
00734 
00735 static const char *
00736 output_632 (operands, insn)
00737      rtx *operands ATTRIBUTE_UNUSED;
00738      rtx insn ATTRIBUTE_UNUSED;
00739 {
00740 {
00741   /* Note that we use a C output pattern here to avoid the predicate
00742      being automatically added before the .mem.offset directive.  */
00743   return ".mem.offset %2, 0\n\t%,st8.spill %0 = %1%P0";
00744 }
00745 }
00746 
00747 static const char *output_633 PARAMS ((rtx *, rtx));
00748 
00749 static const char *
00750 output_633 (operands, insn)
00751      rtx *operands ATTRIBUTE_UNUSED;
00752      rtx insn ATTRIBUTE_UNUSED;
00753 {
00754 { return ".mem.offset %2, 0\n\t%,ld8.fill %0 = %1%P1"; }
00755 }
00756 
00757 static const char *output_636 PARAMS ((rtx *, rtx));
00758 
00759 static const char *
00760 output_636 (operands, insn)
00761      rtx *operands ATTRIBUTE_UNUSED;
00762      rtx insn ATTRIBUTE_UNUSED;
00763 {
00764 
00765 {
00766   return ";;\n\t%,mov %0 = ar.bsp";
00767 }
00768 }
00769 
00770 static const char *output_645 PARAMS ((rtx *, rtx));
00771 
00772 static const char *
00773 output_645 (operands, insn)
00774      rtx *operands ATTRIBUTE_UNUSED;
00775      rtx insn ATTRIBUTE_UNUSED;
00776 {
00777 {
00778   static const char * const alt[2][4] = {
00779     {
00780       "lfetch.nta [%0]",
00781       "lfetch.nt1 [%0]",
00782       "lfetch.nt2 [%0]",
00783       "lfetch [%0]"
00784     },
00785     {
00786       "lfetch.excl.nta [%0]",
00787       "lfetch.excl.nt1 [%0]",
00788       "lfetch.excl.nt2 [%0]",
00789       "lfetch.excl [%0]"
00790     }
00791   };
00792   int i = (INTVAL (operands[1]));
00793   int j = (INTVAL (operands[2]));
00794 
00795   if (i != 0 && i != 1)
00796     abort ();
00797   if (j < 0 || j > 3)
00798     abort ();
00799   return alt[i][j];
00800 }
00801 }
00802 
00803 
00804 extern int register_operand PARAMS ((rtx, enum machine_mode));
00805 extern int nonmemory_operand PARAMS ((rtx, enum machine_mode));
00806 extern int nonimmediate_operand PARAMS ((rtx, enum machine_mode));
00807 extern int move_operand PARAMS ((rtx, enum machine_mode));
00808 extern int destination_operand PARAMS ((rtx, enum machine_mode));
00809 extern int symbolic_operand PARAMS ((rtx, enum machine_mode));
00810 extern int scratch_operand PARAMS ((rtx, enum machine_mode));
00811 extern int function_operand PARAMS ((rtx, enum machine_mode));
00812 extern int sdata_symbolic_operand PARAMS ((rtx, enum machine_mode));
00813 extern int got_symbolic_operand PARAMS ((rtx, enum machine_mode));
00814 extern int general_operand PARAMS ((rtx, enum machine_mode));
00815 extern int destination_tfmode_operand PARAMS ((rtx, enum machine_mode));
00816 extern int general_tfmode_operand PARAMS ((rtx, enum machine_mode));
00817 extern int gr_register_operand PARAMS ((rtx, enum machine_mode));
00818 extern int grfr_register_operand PARAMS ((rtx, enum machine_mode));
00819 extern int gr_nonimmediate_operand PARAMS ((rtx, enum machine_mode));
00820 extern int grfr_nonimmediate_operand PARAMS ((rtx, enum machine_mode));
00821 extern int fr_register_operand PARAMS ((rtx, enum machine_mode));
00822 extern int const_int_operand PARAMS ((rtx, enum machine_mode));
00823 extern int gr_reg_or_0_operand PARAMS ((rtx, enum machine_mode));
00824 extern int gr_reg_or_8bit_operand PARAMS ((rtx, enum machine_mode));
00825 extern int predicate_operator PARAMS ((rtx, enum machine_mode));
00826 extern int signed_inequality_operator PARAMS ((rtx, enum machine_mode));
00827 extern int gr_reg_or_22bit_operand PARAMS ((rtx, enum machine_mode));
00828 extern int shladd_operand PARAMS ((rtx, enum machine_mode));
00829 extern int fr_reg_or_fp01_operand PARAMS ((rtx, enum machine_mode));
00830 extern int tfreg_or_fp01_operand PARAMS ((rtx, enum machine_mode));
00831 extern int gr_reg_or_5bit_operand PARAMS ((rtx, enum machine_mode));
00832 extern int shift_32bit_count_operand PARAMS ((rtx, enum machine_mode));
00833 extern int gr_reg_or_6bit_operand PARAMS ((rtx, enum machine_mode));
00834 extern int shift_count_operand PARAMS ((rtx, enum machine_mode));
00835 extern int grfr_reg_or_8bit_operand PARAMS ((rtx, enum machine_mode));
00836 extern int normal_comparison_operator PARAMS ((rtx, enum machine_mode));
00837 extern int adjusted_comparison_operator PARAMS ((rtx, enum machine_mode));
00838 extern int gr_reg_or_8bit_adjusted_operand PARAMS ((rtx, enum machine_mode));
00839 extern int comparison_operator PARAMS ((rtx, enum machine_mode));
00840 extern int immediate_operand PARAMS ((rtx, enum machine_mode));
00841 extern int ar_lc_reg_operand PARAMS ((rtx, enum machine_mode));
00842 extern int condop_operator PARAMS ((rtx, enum machine_mode));
00843 extern int call_operand PARAMS ((rtx, enum machine_mode));
00844 extern int memory_operand PARAMS ((rtx, enum machine_mode));
00845 extern int address_operand PARAMS ((rtx, enum machine_mode));
00846 extern int not_postinc_memory_operand PARAMS ((rtx, enum machine_mode));
00847 extern int fetchadd_operand PARAMS ((rtx, enum machine_mode));
00848 extern int ar_ccv_reg_operand PARAMS ((rtx, enum machine_mode));
00849 extern int basereg_operand PARAMS ((rtx, enum machine_mode));
00850 extern int gr_reg_or_14bit_operand PARAMS ((rtx, enum machine_mode));
00851 extern int gr_reg_or_8bit_and_adjusted_operand PARAMS ((rtx, enum machine_mode));
00852 
00853 
00854 
00855 static const struct insn_operand_data operand_data[] = 
00856 {
00857   {
00858     0,
00859     "",
00860     VOIDmode,
00861     0,
00862     0
00863   },
00864   {
00865     register_operand,
00866     "=c,c,c",
00867     CCImode,
00868     0,
00869     1
00870   },
00871   {
00872     nonmemory_operand,
00873     "O,n,c",
00874     CCImode,
00875     0,
00876     1
00877   },
00878   {
00879     nonimmediate_operand,
00880     "=c,c,?c,?*r,c,*r,*r,*m,*r",
00881     BImode,
00882     0,
00883     1
00884   },
00885   {
00886     move_operand,
00887     "O,n,c,c,*r,n,*m,*r,*r",
00888     BImode,
00889     0,
00890     1
00891   },
00892   {
00893     destination_operand,
00894     "=r,r,r,m,r,*f,*f",
00895     QImode,
00896     0,
00897     1
00898   },
00899   {
00900     move_operand,
00901     "rO,J,m,rO,*f,rO,*f",
00902     QImode,
00903     0,
00904     1
00905   },
00906   {
00907     destination_operand,
00908     "=r,r,r,m,r,*f,*f",
00909     HImode,
00910     0,
00911     1
00912   },
00913   {
00914     move_operand,
00915     "rO,J,m,rO,*f,rO,*f",
00916     HImode,
00917     0,
00918     1
00919   },
00920   {
00921     register_operand,
00922     "=r",
00923     SImode,
00924     0,
00925     1
00926   },
00927   {
00928     symbolic_operand,
00929     "s",
00930     SImode,
00931     0,
00932     1
00933   },
00934   {
00935     scratch_operand,
00936     "=r",
00937     DImode,
00938     0,
00939     0
00940   },
00941   {
00942     destination_operand,
00943     "=r,r,r,r,m,r,*f,*f,r,*d",
00944     SImode,
00945     0,
00946     1
00947   },
00948   {
00949     move_operand,
00950     "rO,J,i,m,rO,*f,rO,*f,*d,rK",
00951     SImode,
00952     0,
00953     1
00954   },
00955   {
00956     register_operand,
00957     "=r",
00958     DImode,
00959     0,
00960     1
00961   },
00962   {
00963     symbolic_operand,
00964     "s",
00965     DImode,
00966     0,
00967     1
00968   },
00969   {
00970     scratch_operand,
00971     "=r",
00972     DImode,
00973     0,
00974     0
00975   },
00976   {
00977     destination_operand,
00978     "=r,r,r,r,m,r,*f,*f,*f,Q,r,*b,r,*e,r,*d,r,*c",
00979     DImode,
00980     0,
00981     1
00982   },
00983   {
00984     move_operand,
00985     "rO,J,i,m,rO,*f,rO,*f,Q,*f,*b,rO,*e,rK,*d,rK,*c,rO",
00986     DImode,
00987     0,
00988     1
00989   },
00990   {
00991     register_operand,
00992     "=r",
00993     DImode,
00994     0,
00995     1
00996   },
00997   {
00998     function_operand,
00999     "s",
01000     VOIDmode,
01001     0,
01002     1
01003   },
01004   {
01005     register_operand,
01006     "=r",
01007     DImode,
01008     0,
01009     1
01010   },
01011   {
01012     sdata_symbolic_operand,
01013     "s",
01014     VOIDmode,
01015     0,
01016     1
01017   },
01018   {
01019     register_operand,
01020     "=r",
01021     DImode,
01022     0,
01023     1
01024   },
01025   {
01026     symbolic_operand,
01027     "",
01028     DImode,
01029     0,
01030     1
01031   },
01032   {
01033     register_operand,
01034     "=r",
01035     DImode,
01036     0,
01037     1
01038   },
01039   {
01040     got_symbolic_operand,
01041     "s",
01042     VOIDmode,
01043     0,
01044     1
01045   },
01046   {
01047     register_operand,
01048     "a",
01049     DImode,
01050     0,
01051     1
01052   },
01053   {
01054     register_operand,
01055     "=r",
01056     DImode,
01057     0,
01058     1
01059   },
01060   {
01061     register_operand,
01062     "r",
01063     DImode,
01064     0,
01065     1
01066   },
01067   {
01068     got_symbolic_operand,
01069     "s",
01070     VOIDmode,
01071     0,
01072     1
01073   },
01074   {
01075     register_operand,
01076     "=r",
01077     DImode,
01078     0,
01079     1
01080   },
01081   {
01082     register_operand,
01083     "r",
01084     DImode,
01085     0,
01086     1
01087   },
01088   {
01089     symbolic_operand,
01090     "",
01091     DImode,
01092     0,
01093     1
01094   },
01095   {
01096     register_operand,
01097     "=r",
01098     DImode,
01099     0,
01100     1
01101   },
01102   {
01103     register_operand,
01104     "a",
01105     DImode,
01106     0,
01107     1
01108   },
01109   {
01110     symbolic_operand,
01111     "",
01112     DImode,
01113     0,
01114     1
01115   },
01116   {
01117     nonimmediate_operand,
01118     "=r,r,m",
01119     TImode,
01120     0,
01121     1
01122   },
01123   {
01124     general_operand,
01125     "ri,m,r",
01126     TImode,
01127     0,
01128     1
01129   },
01130   {
01131     scratch_operand,
01132     "=X,&r,&r",
01133     DImode,
01134     0,
01135     0
01136   },
01137   {
01138     register_operand,
01139     "=r",
01140     TImode,
01141     0,
01142     1
01143   },
01144   {
01145     nonmemory_operand,
01146     "ri",
01147     TImode,
01148     0,
01149     1
01150   },
01151   {
01152     destination_operand,
01153     "=f,f,Q,*r,f,*r,*r,m",
01154     SFmode,
01155     0,
01156     1
01157   },
01158   {
01159     general_operand,
01160     "fG,Q,fG,fG,*r,*r,m,*r",
01161     SFmode,
01162     0,
01163     1
01164   },
01165   {
01166     destination_operand,
01167     "=f,f,Q,*r,f,*r,*r,m",
01168     DFmode,
01169     0,
01170     1
01171   },
01172   {
01173     general_operand,
01174     "fG,Q,fG,fG,*r,*r,m,*r",
01175     DFmode,
01176     0,
01177     1
01178   },
01179   {
01180     destination_tfmode_operand,
01181     "=f,f,m",
01182     TFmode,
01183     0,
01184     1
01185   },
01186   {
01187     general_tfmode_operand,
01188     "fG,m,fG",
01189     TFmode,
01190     0,
01191     1
01192   },
01193   {
01194     gr_register_operand,
01195     "=r",
01196     DImode,
01197     0,
01198     1
01199   },
01200   {
01201     gr_register_operand,
01202     "r",
01203     QImode,
01204     0,
01205     1
01206   },
01207   {
01208     gr_register_operand,
01209     "=r",
01210     DImode,
01211     0,
01212     1
01213   },
01214   {
01215     gr_register_operand,
01216     "r",
01217     HImode,
01218     0,
01219     1
01220   },
01221   {
01222     grfr_register_operand,
01223     "=r,?f",
01224     DImode,
01225     0,
01226     1
01227   },
01228   {
01229     grfr_register_operand,
01230     "r,f",
01231     SImode,
01232     0,
01233     1
01234   },
01235   {
01236     gr_register_operand,
01237     "=r,r",
01238     DImode,
01239     0,
01240     1
01241   },
01242   {
01243     gr_nonimmediate_operand,
01244     "r,m",
01245     QImode,
01246     0,
01247     1
01248   },
01249   {
01250     gr_register_operand,
01251     "=r,r",
01252     DImode,
01253     0,
01254     1
01255   },
01256   {
01257     gr_nonimmediate_operand,
01258     "r,m",
01259     HImode,
01260     0,
01261     1
01262   },
01263   {
01264     grfr_register_operand,
01265     "=r,r,?f",
01266     DImode,
01267     0,
01268     1
01269   },
01270   {
01271     grfr_nonimmediate_operand,
01272     "r,m,f",
01273     SImode,
01274     0,
01275     1
01276   },
01277   {
01278     fr_register_operand,
01279     "=f",
01280     DFmode,
01281     0,
01282     1
01283   },
01284   {
01285     fr_register_operand,
01286     "f",
01287     SFmode,
01288     0,
01289     1
01290   },
01291   {
01292     fr_register_operand,
01293     "=f",
01294     TFmode,
01295     0,
01296     1
01297   },
01298   {
01299     fr_register_operand,
01300     "f",
01301     SFmode,
01302     0,
01303     1
01304   },
01305   {
01306     fr_register_operand,
01307     "=f",
01308     TFmode,
01309     0,
01310     1
01311   },
01312   {
01313     fr_register_operand,
01314     "f",
01315     DFmode,
01316     0,
01317     1
01318   },
01319   {
01320     fr_register_operand,
01321     "=f",
01322     SFmode,
01323     0,
01324     1
01325   },
01326   {
01327     fr_register_operand,
01328     "f",
01329     DFmode,
01330     0,
01331     1
01332   },
01333   {
01334     fr_register_operand,
01335     "=f",
01336     SFmode,
01337     0,
01338     1
01339   },
01340   {
01341     fr_register_operand,
01342     "f",
01343     TFmode,
01344     0,
01345     1
01346   },
01347   {
01348     fr_register_operand,
01349     "=f",
01350     DFmode,
01351     0,
01352     1
01353   },
01354   {
01355     fr_register_operand,
01356     "f",
01357     TFmode,
01358     0,
01359     1
01360   },
01361   {
01362     fr_register_operand,
01363     "=f",
01364     TFmode,
01365     0,
01366     1
01367   },
01368   {
01369     fr_register_operand,
01370     "f",
01371     DImode,
01372     0,
01373     1
01374   },
01375   {
01376     fr_register_operand,
01377     "=f",
01378     DImode,
01379     0,
01380     1
01381   },
01382   {
01383     fr_register_operand,
01384     "f",
01385     SFmode,
01386     0,
01387     1
01388   },
01389   {
01390     fr_register_operand,
01391     "=f",
01392     DImode,
01393     0,
01394     1
01395   },
01396   {
01397     fr_register_operand,
01398     "f",
01399     DFmode,
01400     0,
01401     1
01402   },
01403   {
01404     fr_register_operand,
01405     "=f",
01406     DImode,
01407     0,
01408     1
01409   },
01410   {
01411     fr_register_operand,
01412     "f",
01413     TFmode,
01414     0,
01415     1
01416   },
01417   {
01418     const_int_operand,
01419     "",
01420     SImode,
01421     0,
01422     1
01423   },
01424   {
01425     fr_register_operand,
01426     "=f",
01427     SFmode,
01428     0,
01429     1
01430   },
01431   {
01432     fr_register_operand,
01433     "f",
01434     DImode,
01435     0,
01436     1
01437   },
01438   {
01439     fr_register_operand,
01440     "=f",
01441     DFmode,
01442     0,
01443     1
01444   },
01445   {
01446     fr_register_operand,
01447     "f",
01448     DImode,
01449     0,
01450     1
01451   },
01452   {
01453     gr_register_operand,
01454     "=r",
01455     DImode,
01456     0,
01457     1
01458   },
01459   {
01460     gr_register_operand,
01461     "r",
01462     DImode,
01463     0,
01464     1
01465   },
01466   {
01467     const_int_operand,
01468     "n",
01469     DImode,
01470     0,
01471     1
01472   },
01473   {
01474     const_int_operand,
01475     "n",
01476     DImode,
01477     0,
01478     1
01479   },
01480   {
01481     gr_register_operand,
01482     "+r",
01483     DImode,
01484     0,
01485     1
01486   },
01487   {
01488     const_int_operand,
01489     "n",
01490     DImode,
01491     0,
01492     1
01493   },
01494   {
01495     const_int_operand,
01496     "n",
01497     DImode,
01498     0,
01499     1
01500   },
01501   {
01502     nonmemory_operand,
01503     "rP",
01504     DImode,
01505     0,
01506     1
01507   },
01508   {
01509     gr_register_operand,
01510     "+r",
01511     DImode,
01512     0,
01513     1
01514   },
01515   {
01516     gr_register_operand,
01517     "r",
01518     DImode,
01519     0,
01520     1
01521   },
01522   {
01523     gr_register_operand,
01524     "=r",
01525     DImode,
01526     0,
01527     1
01528   },
01529   {
01530     gr_register_operand,
01531     "+r",
01532     DImode,
01533     0,
01534     1
01535   },
01536   {
01537     gr_reg_or_0_operand,
01538     "rO",
01539     DImode,
01540     0,
01541     1
01542   },
01543   {
01544     gr_register_operand,
01545     "=r",
01546     DImode,
01547     0,
01548     1
01549   },
01550   {
01551     gr_register_operand,
01552     "r",
01553     SImode,
01554     0,
01555     1
01556   },
01557   {
01558     gr_register_operand,
01559     "r",
01560     SImode,
01561     0,
01562     1
01563   },
01564   {
01565     register_operand,
01566     "=c,c,r",
01567     BImode,
01568     0,
01569     1
01570   },
01571   {
01572     register_operand,
01573     "%0,0,r",
01574     BImode,
01575     0,
01576     1
01577   },
01578   {
01579     register_operand,
01580     "c,r,r",
01581     BImode,
01582     0,
01583     1
01584   },
01585   {
01586     register_operand,
01587     "=c,c,r",
01588     BImode,
01589     0,
01590     1
01591   },
01592   {
01593     register_operand,
01594     "c,r,r",
01595     BImode,
01596     0,
01597     1
01598   },
01599   {
01600     register_operand,
01601     "0,0,r",
01602     BImode,
01603     0,
01604     1
01605   },
01606   {
01607     register_operand,
01608     "=c,c",
01609     BImode,
01610     0,
01611     1
01612   },
01613   {
01614     register_operand,
01615     "c,r",
01616     BImode,
01617     0,
01618     1
01619   },
01620   {
01621     register_operand,
01622     "0,0",
01623     BImode,
01624     0,
01625     1
01626   },
01627   {
01628     register_operand,
01629     "=c,r,c,&c",
01630     BImode,
01631     0,
01632     1
01633   },
01634   {
01635     register_operand,
01636     "r,r,0,c",
01637     BImode,
01638     0,
01639     1
01640   },
01641   {
01642     scratch_operand,
01643     "=X,X,c,X",
01644     BImode,
01645     0,
01646     0
01647   },
01648   {
01649     register_operand,
01650     "=c",
01651     BImode,
01652     0,
01653     1
01654   },
01655   {
01656     register_operand,
01657     "0",
01658     BImode,
01659     0,
01660     1
01661   },
01662   {
01663     gr_reg_or_0_operand,
01664     "rO",
01665     SImode,
01666     0,
01667     1
01668   },
01669   {
01670     gr_reg_or_8bit_operand,
01671     "rK",
01672     SImode,
01673     0,
01674     1
01675   },
01676   {
01677     predicate_operator,
01678     "",
01679     BImode,
01680     0,
01681     0
01682   },
01683   {
01684     register_operand,
01685     "=c",
01686     BImode,
01687     0,
01688     1
01689   },
01690   {
01691     register_operand,
01692     "0",
01693     BImode,
01694     0,
01695     1
01696   },
01697   {
01698     gr_register_operand,
01699     "r",
01700     SImode,
01701     0,
01702     1
01703   },
01704   {
01705     signed_inequality_operator,
01706     "",
01707     BImode,
01708     0,
01709     0
01710   },
01711   {
01712     register_operand,
01713     "=c",
01714     BImode,
01715     0,
01716     1
01717   },
01718   {
01719     register_operand,
01720     "0",
01721     BImode,
01722     0,
01723     1
01724   },
01725   {
01726     gr_register_operand,
01727     "r",
01728     DImode,
01729     0,
01730     1
01731   },
01732   {
01733     gr_reg_or_8bit_operand,
01734     "rK",
01735     DImode,
01736     0,
01737     1
01738   },
01739   {
01740     predicate_operator,
01741     "",
01742     BImode,
01743     0,
01744     0
01745   },
01746   {
01747     register_operand,
01748     "=c",
01749     BImode,
01750     0,
01751     1
01752   },
01753   {
01754     register_operand,
01755     "0",
01756     BImode,
01757     0,
01758     1
01759   },
01760   {
01761     gr_register_operand,
01762     "r",
01763     DImode,
01764     0,
01765     1
01766   },
01767   {
01768     signed_inequality_operator,
01769     "",
01770     BImode,
01771     0,
01772     0
01773   },
01774   {
01775     register_operand,
01776     "=c",
01777     BImode,
01778     0,
01779     1
01780   },
01781   {
01782     gr_register_operand,
01783     "r",
01784     DImode,
01785     0,
01786     1
01787   },
01788   {
01789     register_operand,
01790     "0",
01791     BImode,
01792     0,
01793     1
01794   },
01795   {
01796     register_operand,
01797     "=c",
01798     BImode,
01799     0,
01800     1
01801   },
01802   {
01803     gr_register_operand,
01804     "r",
01805     DImode,
01806     0,
01807     1
01808   },
01809   {
01810     const_int_operand,
01811     "n",
01812     DImode,
01813     0,
01814     1
01815   },
01816   {
01817     register_operand,
01818     "0",
01819     BImode,
01820     0,
01821     1
01822   },
01823   {
01824     gr_register_operand,
01825     "=r",
01826     HImode,
01827     0,
01828     1
01829   },
01830   {
01831     gr_register_operand,
01832     "r",
01833     HImode,
01834     0,
01835     1
01836   },
01837   {
01838     gr_register_operand,
01839     "r",
01840     HImode,
01841     0,
01842     1
01843   },
01844   {
01845     gr_register_operand,
01846     "=r,r,r",
01847     SImode,
01848     0,
01849     1
01850   },
01851   {
01852     gr_register_operand,
01853     "%r,r,a",
01854     SImode,
01855     0,
01856     1
01857   },
01858   {
01859     gr_reg_or_22bit_operand,
01860     "r,I,J",
01861     SImode,
01862     0,
01863     1
01864   },
01865   {
01866     gr_register_operand,
01867     "=r",
01868     SImode,
01869     0,
01870     1
01871   },
01872   {
01873     gr_register_operand,
01874     "r",
01875     SImode,
01876     0,
01877     1
01878   },
01879   {
01880     gr_register_operand,
01881     "r",
01882     SImode,
01883     0,
01884     1
01885   },
01886   {
01887     gr_register_operand,
01888     "=r",
01889     SImode,
01890     0,
01891     1
01892   },
01893   {
01894     gr_register_operand,
01895     "r",
01896     SImode,
01897     0,
01898     1
01899   },
01900   {
01901     shladd_operand,
01902     "n",
01903     SImode,
01904     0,
01905     1
01906   },
01907   {
01908     gr_register_operand,
01909     "r",
01910     SImode,
01911     0,
01912     1
01913   },
01914   {
01915     gr_register_operand,
01916     "=r",
01917     SImode,
01918     0,
01919     1
01920   },
01921   {
01922     gr_reg_or_8bit_operand,
01923     "rK",
01924     SImode,
01925     0,
01926     1
01927   },
01928   {
01929     gr_register_operand,
01930     "r",
01931     SImode,
01932     0,
01933     1
01934   },
01935   {
01936     fr_register_operand,
01937     "=f",
01938     SImode,
01939     0,
01940     1
01941   },
01942   {
01943     grfr_register_operand,
01944     "f",
01945     SImode,
01946     0,
01947     1
01948   },
01949   {
01950     grfr_register_operand,
01951     "f",
01952     SImode,
01953     0,
01954     1
01955   },
01956   {
01957     grfr_register_operand,
01958     "f",
01959     SImode,
01960     0,
01961     1
01962   },
01963   {
01964     fr_register_operand,
01965     "=&f",
01966     TFmode,
01967     0,
01968     1
01969   },
01970   {
01971     fr_register_operand,
01972     "f",
01973     TFmode,
01974     0,
01975     1
01976   },
01977   {
01978     fr_register_operand,
01979     "f",
01980     TFmode,
01981     0,
01982     1
01983   },
01984   {
01985     fr_register_operand,
01986     "f",
01987     TFmode,
01988     0,
01989     1
01990   },
01991   {
01992     scratch_operand,
01993     "=&f",
01994     TFmode,
01995     0,
01996     0
01997   },
01998   {
01999     scratch_operand,
02000     "=&f",
02001     TFmode,
02002     0,
02003     0
02004   },
02005   {
02006     scratch_operand,
02007     "=c",
02008     BImode,
02009     0,
02010     0
02011   },
02012   {
02013     gr_register_operand,
02014     "=r,r,r",
02015     DImode,
02016     0,
02017     1
02018   },
02019   {
02020     gr_register_operand,
02021     "%r,r,a",
02022     DImode,
02023     0,
02024     1
02025   },
02026   {
02027     gr_reg_or_22bit_operand,
02028     "r,I,J",
02029     DImode,
02030     0,
02031     1
02032   },
02033   {
02034     gr_register_operand,
02035     "=r",
02036     DImode,
02037     0,
02038     1
02039   },
02040   {
02041     gr_register_operand,
02042     "r",
02043     DImode,
02044     0,
02045     1
02046   },
02047   {
02048     gr_register_operand,
02049     "r",
02050     DImode,
02051     0,
02052     1
02053   },
02054   {
02055     gr_register_operand,
02056     "=r",
02057     DImode,
02058     0,
02059     1
02060   },
02061   {
02062     gr_reg_or_8bit_operand,
02063     "rK",
02064     DImode,
02065     0,
02066     1
02067   },
02068   {
02069     gr_register_operand,
02070     "r",
02071     DImode,
02072     0,
02073     1
02074   },
02075   {
02076     fr_register_operand,
02077     "=f",
02078     DImode,
02079     0,
02080     1
02081   },
02082   {
02083     grfr_register_operand,
02084     "f",
02085     DImode,
02086     0,
02087     1
02088   },
02089   {
02090     grfr_register_operand,
02091     "f",
02092     DImode,
02093     0,
02094     1
02095   },
02096   {
02097     grfr_register_operand,
02098     "f",
02099     DImode,
02100     0,
02101     1
02102   },
02103   {
02104     scratch_operand,
02105     "=X",
02106     DImode,
02107     0,
02108     0
02109   },
02110   {
02111     register_operand,
02112     "=&r",
02113     DImode,
02114     0,
02115     1
02116   },
02117   {
02118     register_operand,
02119     "f",
02120     DImode,
02121     0,
02122     1
02123   },
02124   {
02125     register_operand,
02126     "f",
02127     DImode,
02128     0,
02129     1
02130   },
02131   {
02132     register_operand,
02133     "f",
02134     DImode,
02135     0,
02136     1
02137   },
02138   {
02139     nonmemory_operand,
02140     "rI",
02141     DImode,
02142     0,
02143     1
02144   },
02145   {
02146     scratch_operand,
02147     "=f",
02148     DImode,
02149     0,
02150     0
02151   },
02152   {
02153     fr_register_operand,
02154     "=f",
02155     DImode,
02156     0,
02157     1
02158   },
02159   {
02160     fr_register_operand,
02161     "f",
02162     DImode,
02163     0,
02164     1
02165   },
02166   {
02167     fr_register_operand,
02168     "f",
02169     DImode,
02170     0,
02171     1
02172   },
02173   {
02174     fr_register_operand,
02175     "=&f",
02176     TFmode,
02177     0,
02178     1
02179   },
02180   {
02181     fr_register_operand,
02182     "f",
02183     TFmode,
02184     0,
02185     1
02186   },
02187   {
02188     fr_register_operand,
02189     "f",
02190     TFmode,
02191     0,
02192     1
02193   },
02194   {
02195     scratch_operand,
02196     "=&f",
02197     TFmode,
02198     0,
02199     0
02200   },
02201   {
02202     scratch_operand,
02203     "=&f",
02204     TFmode,
02205     0,
02206     0
02207   },
02208   {
02209     scratch_operand,
02210     "=&f",
02211     TFmode,
02212     0,
02213     0
02214   },
02215   {
02216     scratch_operand,
02217     "=c",
02218     BImode,
02219     0,
02220     0
02221   },
02222   {
02223     fr_register_operand,
02224     "=&f",
02225     TFmode,
02226     0,
02227     1
02228   },
02229   {
02230     fr_register_operand,
02231     "f",
02232     TFmode,
02233     0,
02234     1
02235   },
02236   {
02237     fr_register_operand,
02238     "f",
02239     TFmode,
02240     0,
02241     1
02242   },
02243   {
02244     scratch_operand,
02245     "=&f",
02246     TFmode,
02247     0,
02248     0
02249   },
02250   {
02251     scratch_operand,
02252     "=f",
02253     TFmode,
02254     0,
02255     0
02256   },
02257   {
02258     scratch_operand,
02259     "=c",
02260     BImode,
02261     0,
02262     0
02263   },
02264   {
02265     fr_register_operand,
02266     "=f",
02267     SFmode,
02268     0,
02269     1
02270   },
02271   {
02272     fr_register_operand,
02273     "%f",
02274     SFmode,
02275     0,
02276     1
02277   },
02278   {
02279     fr_reg_or_fp01_operand,
02280     "fG",
02281     SFmode,
02282     0,
02283     1
02284   },
02285   {
02286     fr_register_operand,
02287     "=f",
02288     SFmode,
02289     0,
02290     1
02291   },
02292   {
02293     fr_reg_or_fp01_operand,
02294     "fG",
02295     SFmode,
02296     0,
02297     1
02298   },
02299   {
02300     fr_reg_or_fp01_operand,
02301     "fG",
02302     SFmode,
02303     0,
02304     1
02305   },
02306   {
02307     fr_register_operand,
02308     "=f",
02309     SFmode,
02310     0,
02311     1
02312   },
02313   {
02314     fr_register_operand,
02315     "%f",
02316     SFmode,
02317     0,
02318     1
02319   },
02320   {
02321     fr_register_operand,
02322     "f",
02323     SFmode,
02324     0,
02325     1
02326   },
02327   {
02328     fr_register_operand,
02329     "=f",
02330     SFmode,
02331     0,
02332     1
02333   },
02334   {
02335     fr_register_operand,
02336     "f",
02337     SFmode,
02338     0,
02339     1
02340   },
02341   {
02342     fr_reg_or_fp01_operand,
02343     "fG",
02344     SFmode,
02345     0,
02346     1
02347   },
02348   {
02349     fr_register_operand,
02350     "=f",
02351     SFmode,
02352     0,
02353     1
02354   },
02355   {
02356     fr_register_operand,
02357     "f",
02358     SFmode,
02359     0,
02360     1
02361   },
02362   {
02363     fr_register_operand,
02364     "f",
02365     SFmode,
02366     0,
02367     1
02368   },
02369   {
02370     fr_reg_or_fp01_operand,
02371     "fG",
02372     SFmode,
02373     0,
02374     1
02375   },
02376   {
02377     fr_register_operand,
02378     "=&f",
02379     SFmode,
02380     0,
02381     1
02382   },
02383   {
02384     fr_register_operand,
02385     "f",
02386     SFmode,
02387     0,
02388     1
02389   },
02390   {
02391     fr_register_operand,
02392     "f",
02393     SFmode,
02394     0,
02395     1
02396   },
02397   {
02398     scratch_operand,
02399     "=&f",
02400     TFmode,
02401     0,
02402     0
02403   },
02404   {
02405     scratch_operand,
02406     "=f",
02407     TFmode,
02408     0,
02409     0
02410   },
02411   {
02412     scratch_operand,
02413     "=c",
02414     BImode,
02415     0,
02416     0
02417   },
02418   {
02419     fr_register_operand,
02420     "=f",
02421     DFmode,
02422     0,
02423     1
02424   },
02425   {
02426     fr_register_operand,
02427     "%f",
02428     DFmode,
02429     0,
02430     1
02431   },
02432   {
02433     fr_reg_or_fp01_operand,
02434     "fG",
02435     DFmode,
02436     0,
02437     1
02438   },
02439   {
02440     fr_register_operand,
02441     "=f",
02442     SFmode,
02443     0,
02444     1
02445   },
02446   {
02447     fr_register_operand,
02448     "%f",
02449     DFmode,
02450     0,
02451     1
02452   },
02453   {
02454     fr_reg_or_fp01_operand,
02455     "fG",
02456     DFmode,
02457     0,
02458     1
02459   },
02460   {
02461     fr_register_operand,
02462     "=f",
02463     DFmode,
02464     0,
02465     1
02466   },
02467   {
02468     fr_reg_or_fp01_operand,
02469     "fG",
02470     DFmode,
02471     0,
02472     1
02473   },
02474   {
02475     fr_reg_or_fp01_operand,
02476     "fG",
02477     DFmode,
02478     0,
02479     1
02480   },
02481   {
02482     fr_register_operand,
02483     "=f",
02484     SFmode,
02485     0,
02486     1
02487   },
02488   {
02489     fr_reg_or_fp01_operand,
02490     "fG",
02491     DFmode,
02492     0,
02493     1
02494   },
02495   {
02496     fr_reg_or_fp01_operand,
02497     "fG",
02498     DFmode,
02499     0,
02500     1
02501   },
02502   {
02503     fr_register_operand,
02504     "=f",
02505     DFmode,
02506     0,
02507     1
02508   },
02509   {
02510     fr_register_operand,
02511     "f",
02512     DFmode,
02513     0,
02514     1
02515   },
02516   {
02517     fr_register_operand,
02518     "f",
02519     DFmode,
02520     0,
02521     1
02522   },
02523   {
02524     fr_register_operand,
02525     "=f",
02526     SFmode,
02527     0,
02528     1
02529   },
02530   {
02531     fr_register_operand,
02532     "f",
02533     DFmode,
02534     0,
02535     1
02536   },
02537   {
02538     fr_register_operand,
02539     "f",
02540     DFmode,
02541     0,
02542     1
02543   },
02544   {
02545     fr_register_operand,
02546     "=f",
02547     DFmode,
02548     0,
02549     1
02550   },
02551   {
02552     fr_register_operand,
02553     "f",
02554     DFmode,
02555     0,
02556     1
02557   },
02558   {
02559     fr_reg_or_fp01_operand,
02560     "fG",
02561     DFmode,
02562     0,
02563     1
02564   },
02565   {
02566     fr_register_operand,
02567     "=f",
02568     DFmode,
02569     0,
02570     1
02571   },
02572   {
02573     fr_register_operand,
02574     "f",
02575     DFmode,
02576     0,
02577     1
02578   },
02579   {
02580     fr_register_operand,
02581     "f",
02582     DFmode,
02583     0,
02584     1
02585   },
02586   {
02587     fr_reg_or_fp01_operand,
02588     "fG",
02589     DFmode,
02590     0,
02591     1
02592   },
02593   {
02594     fr_register_operand,
02595     "=f",
02596     SFmode,
02597     0,
02598     1
02599   },
02600   {
02601     fr_register_operand,
02602     "f",
02603     DFmode,
02604     0,
02605     1
02606   },
02607   {
02608     fr_register_operand,
02609     "f",
02610     DFmode,
02611     0,
02612     1
02613   },
02614   {
02615     fr_reg_or_fp01_operand,
02616     "fG",
02617     DFmode,
02618     0,
02619     1
02620   },
02621   {
02622     fr_register_operand,
02623     "=f",
02624     DFmode,
02625     0,
02626     1
02627   },
02628   {
02629     fr_register_operand,
02630     "f",
02631     DFmode,
02632     0,
02633     1
02634   },
02635   {
02636     fr_register_operand,
02637     "f",
02638     DFmode,
02639     0,
02640     1
02641   },
02642   {
02643     fr_reg_or_fp01_operand,
02644     "fG",
02645     DFmode,
02646     0,
02647     1
02648   },
02649   {
02650     const_int_operand,
02651     "",
02652     SImode,
02653     0,
02654     1
02655   },
02656   {
02657     fr_register_operand,
02658     "=&f",
02659     DFmode,
02660     0,
02661     1
02662   },
02663   {
02664     fr_register_operand,
02665     "f",
02666     DFmode,
02667     0,
02668     1
02669   },
02670   {
02671     fr_register_operand,
02672     "f",
02673     DFmode,
02674     0,
02675     1
02676   },
02677   {
02678     scratch_operand,
02679     "=&f",
02680     TFmode,
02681     0,
02682     0
02683   },
02684   {
02685     scratch_operand,
02686     "=&f",
02687     TFmode,
02688     0,
02689     0
02690   },
02691   {
02692     scratch_operand,
02693     "=&f",
02694     TFmode,
02695     0,
02696     0
02697   },
02698   {
02699     scratch_operand,
02700     "=c",
02701     BImode,
02702     0,
02703     0
02704   },
02705   {
02706     fr_register_operand,
02707     "=&f",
02708     DFmode,
02709     0,
02710     1
02711   },
02712   {
02713     fr_register_operand,
02714     "f",
02715     DFmode,
02716     0,
02717     1
02718   },
02719   {
02720     fr_register_operand,
02721     "f",
02722     DFmode,
02723     0,
02724     1
02725   },
02726   {
02727     scratch_operand,
02728     "=&f",
02729     TFmode,
02730     0,
02731     0
02732   },
02733   {
02734     scratch_operand,
02735     "=f",
02736     DFmode,
02737     0,
02738     0
02739   },
02740   {
02741     scratch_operand,
02742     "=c",
02743     BImode,
02744     0,
02745     0
02746   },
02747   {
02748     fr_register_operand,
02749     "=f",
02750     TFmode,
02751     0,
02752     1
02753   },
02754   {
02755     tfreg_or_fp01_operand,
02756     "fG",
02757     TFmode,
02758     0,
02759     1
02760   },
02761   {
02762     tfreg_or_fp01_operand,
02763     "fG",
02764     TFmode,
02765     0,
02766     1
02767   },
02768   {
02769     fr_register_operand,
02770     "=f",
02771     SFmode,
02772     0,
02773     1
02774   },
02775   {
02776     tfreg_or_fp01_operand,
02777     "fG",
02778     TFmode,
02779     0,
02780     1
02781   },
02782   {
02783     tfreg_or_fp01_operand,
02784     "fG",
02785     TFmode,
02786     0,
02787     1
02788   },
02789   {
02790     fr_register_operand,
02791     "=f",
02792     DFmode,
02793     0,
02794     1
02795   },
02796   {
02797     tfreg_or_fp01_operand,
02798     "fG",
02799     TFmode,
02800     0,
02801     1
02802   },
02803   {
02804     tfreg_or_fp01_operand,
02805     "fG",
02806     TFmode,
02807     0,
02808     1
02809   },
02810   {
02811     fr_register_operand,
02812     "=f",
02813     TFmode,
02814     0,
02815     1
02816   },
02817   {
02818     tfreg_or_fp01_operand,
02819     "fG",
02820     TFmode,
02821     0,
02822     1
02823   },
02824   {
02825     tfreg_or_fp01_operand,
02826     "fG",
02827     TFmode,
02828     0,
02829     1
02830   },
02831   {
02832     const_int_operand,
02833     "",
02834     SImode,
02835     0,
02836     1
02837   },
02838   {
02839     fr_register_operand,
02840     "=f",
02841     SFmode,
02842     0,
02843     1
02844   },
02845   {
02846     tfreg_or_fp01_operand,
02847     "fG",
02848     TFmode,
02849     0,
02850     1
02851   },
02852   {
02853     tfreg_or_fp01_operand,
02854     "fG",
02855     TFmode,
02856     0,
02857     1
02858   },
02859   {
02860     const_int_operand,
02861     "",
02862     SImode,
02863     0,
02864     1
02865   },
02866   {
02867     fr_register_operand,
02868     "=f",
02869     DFmode,
02870     0,
02871     1
02872   },
02873   {
02874     tfreg_or_fp01_operand,
02875     "fG",
02876     TFmode,
02877     0,
02878     1
02879   },
02880   {
02881     tfreg_or_fp01_operand,
02882     "fG",
02883     TFmode,
02884     0,
02885     1
02886   },
02887   {
02888     const_int_operand,
02889     "",
02890     SImode,
02891     0,
02892     1
02893   },
02894   {
02895     fr_register_operand,
02896     "=f",
02897     TFmode,
02898     0,
02899     1
02900   },
02901   {
02902     tfreg_or_fp01_operand,
02903     "fG",
02904     TFmode,
02905     0,
02906     1
02907   },
02908   {
02909     tfreg_or_fp01_operand,
02910     "fG",
02911     TFmode,
02912     0,
02913     1
02914   },
02915   {
02916     tfreg_or_fp01_operand,
02917     "fG",
02918     TFmode,
02919     0,
02920     1
02921   },
02922   {
02923     fr_register_operand,
02924     "=f",
02925     SFmode,
02926     0,
02927     1
02928   },
02929   {
02930     tfreg_or_fp01_operand,
02931     "fG",
02932     TFmode,
02933     0,
02934     1
02935   },
02936   {
02937     tfreg_or_fp01_operand,
02938     "fG",
02939     TFmode,
02940     0,
02941     1
02942   },
02943   {
02944     tfreg_or_fp01_operand,
02945     "fG",
02946     TFmode,
02947     0,
02948     1
02949   },
02950   {
02951     fr_register_operand,
02952     "=f",
02953     DFmode,
02954     0,
02955     1
02956   },
02957   {
02958     tfreg_or_fp01_operand,
02959     "fG",
02960     TFmode,
02961     0,
02962     1
02963   },
02964   {
02965     tfreg_or_fp01_operand,
02966     "fG",
02967     TFmode,
02968     0,
02969     1
02970   },
02971   {
02972     tfreg_or_fp01_operand,
02973     "fG",
02974     TFmode,
02975     0,
02976     1
02977   },
02978   {
02979     fr_register_operand,
02980     "=f",
02981     TFmode,
02982     0,
02983     1
02984   },
02985   {
02986     tfreg_or_fp01_operand,
02987     "fG",
02988     TFmode,
02989     0,
02990     1
02991   },
02992   {
02993     tfreg_or_fp01_operand,
02994     "fG",
02995     TFmode,
02996     0,
02997     1
02998   },
02999   {
03000     tfreg_or_fp01_operand,
03001     "fG",
03002     TFmode,
03003     0,
03004     1
03005   },
03006   {
03007     const_int_operand,
03008     "",
03009     SImode,
03010     0,
03011     1
03012   },
03013   {
03014     fr_register_operand,
03015     "=f",
03016     DFmode,
03017     0,
03018     1
03019   },
03020   {
03021     tfreg_or_fp01_operand,
03022     "fG",
03023     TFmode,
03024     0,
03025     1
03026   },
03027   {
03028     tfreg_or_fp01_operand,
03029     "fG",
03030     TFmode,
03031     0,
03032     1
03033   },
03034   {
03035     tfreg_or_fp01_operand,
03036     "fG",
03037     TFmode,
03038     0,
03039     1
03040   },
03041   {
03042     const_int_operand,
03043     "",
03044     SImode,
03045     0,
03046     1
03047   },
03048   {
03049     fr_register_operand,
03050     "=&f",
03051     TFmode,
03052     0,
03053     1
03054   },
03055   {
03056     fr_register_operand,
03057     "f",
03058     TFmode,
03059     0,
03060     1
03061   },
03062   {
03063     fr_register_operand,
03064     "f",
03065     TFmode,
03066     0,
03067     1
03068   },
03069   {
03070     scratch_operand,
03071     "=&f",
03072     TFmode,
03073     0,
03074     0
03075   },
03076   {
03077     scratch_operand,
03078     "=&f",
03079     TFmode,
03080     0,
03081     0
03082   },
03083   {
03084     scratch_operand,
03085     "=&f",
03086     TFmode,
03087     0,
03088     0
03089   },
03090   {
03091     scratch_operand,
03092     "=&f",
03093     TFmode,
03094     0,
03095     0
03096   },
03097   {
03098     scratch_operand,
03099     "=c",
03100     BImode,
03101     0,
03102     0
03103   },
03104   {
03105     fr_register_operand,
03106     "=&f",
03107     TFmode,
03108     0,
03109     1
03110   },
03111   {
03112     fr_register_operand,
03113     "f",
03114     TFmode,
03115     0,
03116     1
03117   },
03118   {
03119     fr_register_operand,
03120     "f",
03121     TFmode,
03122     0,
03123     1
03124   },
03125   {
03126     scratch_operand,
03127     "=&f",
03128     TFmode,
03129     0,
03130     0
03131   },
03132   {
03133     scratch_operand,
03134     "=&f",
03135     TFmode,
03136     0,
03137     0
03138   },
03139   {
03140     scratch_operand,
03141     "=c",
03142     BImode,
03143     0,
03144     0
03145   },
03146   {
03147     fr_register_operand,
03148     "=f",
03149     TFmode,
03150     0,
03151     1
03152   },
03153   {
03154     register_operand,
03155     "=c",
03156     BImode,
03157     0,
03158     1
03159   },
03160   {
03161     fr_register_operand,
03162     "f",
03163     TFmode,
03164     0,
03165     1
03166   },
03167   {
03168     fr_register_operand,
03169     "f",
03170     TFmode,
03171     0,
03172     1
03173   },
03174   {
03175     const_int_operand,
03176     "",
03177     SImode,
03178     0,
03179     1
03180   },
03181   {
03182     gr_register_operand,
03183     "=r,r,r",
03184     SImode,
03185     0,
03186     1
03187   },
03188   {
03189     gr_register_operand,
03190     "r,r,r",
03191     SImode,
03192     0,
03193     1
03194   },
03195   {
03196     gr_reg_or_5bit_operand,
03197     "R,n,r",
03198     DImode,
03199     0,
03200     1
03201   },
03202   {
03203     gr_register_operand,
03204     "=&r",
03205     SImode,
03206     0,
03207     1
03208   },
03209   {
03210     gr_register_operand,
03211     "r",
03212     SImode,
03213     0,
03214     1
03215   },
03216   {
03217     gr_reg_or_5bit_operand,
03218     "rM",
03219     DImode,
03220     0,
03221     1
03222   },
03223   {
03224     gr_register_operand,
03225     "=r",
03226     SImode,
03227     0,
03228     1
03229   },
03230   {
03231     gr_register_operand,
03232     "r",
03233     SImode,
03234     0,
03235     1
03236   },
03237   {
03238     shift_32bit_count_operand,
03239     "n",
03240     SImode,
03241     0,
03242     1
03243   },
03244   {
03245     gr_register_operand,
03246     "=r,r,r",
03247     DImode,
03248     0,
03249     1
03250   },
03251   {
03252     gr_register_operand,
03253     "r,r,r",
03254     DImode,
03255     0,
03256     1
03257   },
03258   {
03259     gr_reg_or_6bit_operand,
03260     "R,r,rM",
03261     DImode,
03262     0,
03263     1
03264   },
03265   {
03266     gr_register_operand,
03267     "=r",
03268     DImode,
03269     0,
03270     1
03271   },
03272   {
03273     gr_register_operand,
03274     "r",
03275     DImode,
03276     0,
03277     1
03278   },
03279   {
03280     shladd_operand,
03281     "n",
03282     DImode,
03283     0,
03284     1
03285   },
03286   {
03287     gr_register_operand,
03288     "r",
03289     DImode,
03290     0,
03291     1
03292   },
03293   {
03294     gr_register_operand,
03295     "=&r",
03296     DImode,
03297     0,
03298     1
03299   },
03300   {
03301     gr_register_operand,
03302     "r",
03303     DImode,
03304     0,
03305     1
03306   },
03307   {
03308     shladd_operand,
03309     "n",
03310     DImode,
03311     0,
03312     1
03313   },
03314   {
03315     nonmemory_operand,
03316     "r",
03317     DImode,
03318     0,
03319     1
03320   },
03321   {
03322     nonmemory_operand,
03323     "rI",
03324     DImode,
03325     0,
03326     1
03327   },
03328   {
03329     gr_register_operand,
03330     "=r,r",
03331     DImode,
03332     0,
03333     1
03334   },
03335   {
03336     gr_register_operand,
03337     "r,r",
03338     DImode,
03339     0,
03340     1
03341   },
03342   {
03343     gr_reg_or_6bit_operand,
03344     "r,rM",
03345     DImode,
03346     0,
03347     1
03348   },
03349   {
03350     gr_register_operand,
03351     "=r",
03352     DImode,
03353     0,
03354     1
03355   },
03356   {
03357     gr_register_operand,
03358     "r",
03359     DImode,
03360     0,
03361     1
03362   },
03363   {
03364     shift_count_operand,
03365     "M",
03366     DImode,
03367     0,
03368     1
03369   },
03370   {
03371     grfr_register_operand,
03372     "=r,*f",
03373     DImode,
03374     0,
03375     1
03376   },
03377   {
03378     grfr_register_operand,
03379     "%r,*f",
03380     DImode,
03381     0,
03382     1
03383   },
03384   {
03385     grfr_reg_or_8bit_operand,
03386     "rK,*f",
03387     DImode,
03388     0,
03389     1
03390   },
03391   {
03392     grfr_register_operand,
03393     "=r,*f",
03394     DImode,
03395     0,
03396     1
03397   },
03398   {
03399     grfr_register_operand,
03400     "r,*f",
03401     DImode,
03402     0,
03403     1
03404   },
03405   {
03406     grfr_reg_or_8bit_operand,
03407     "rK,*f",
03408     DImode,
03409     0,
03410     1
03411   },
03412   {
03413     register_operand,
03414     "=c",
03415     BImode,
03416     0,
03417     1
03418   },
03419   {
03420     normal_comparison_operator,
03421     "",
03422     BImode,
03423     0,
03424     0
03425   },
03426   {
03427     gr_register_operand,
03428     "r",
03429     SImode,
03430     0,
03431     1
03432   },
03433   {
03434     gr_reg_or_8bit_operand,
03435     "rK",
03436     SImode,
03437     0,
03438     1
03439   },
03440   {
03441     register_operand,
03442     "=c",
03443     BImode,
03444     0,
03445     1
03446   },
03447   {
03448     adjusted_comparison_operator,
03449     "",
03450     BImode,
03451     0,
03452     0
03453   },
03454   {
03455     gr_register_operand,
03456     "r",
03457     SImode,
03458     0,
03459     1
03460   },
03461   {
03462     gr_reg_or_8bit_adjusted_operand,
03463     "rL",
03464     SImode,
03465     0,
03466     1
03467   },
03468   {
03469     register_operand,
03470     "=c",
03471     BImode,
03472     0,
03473     1
03474   },
03475   {
03476     normal_comparison_operator,
03477     "",
03478     BImode,
03479     0,
03480     0
03481   },
03482   {
03483     gr_reg_or_0_operand,
03484     "rO",
03485     DImode,
03486     0,
03487     1
03488   },
03489   {
03490     gr_reg_or_8bit_operand,
03491     "rK",
03492     DImode,
03493     0,
03494     1
03495   },
03496   {
03497     register_operand,
03498     "=c",
03499     BImode,
03500     0,
03501     1
03502   },
03503   {
03504     adjusted_comparison_operator,
03505     "",
03506     BImode,
03507     0,
03508     0
03509   },
03510   {
03511     gr_register_operand,
03512     "r",
03513     DImode,
03514     0,
03515     1
03516   },
03517   {
03518     gr_reg_or_8bit_adjusted_operand,
03519     "rL",
03520     DImode,
03521     0,
03522     1
03523   },
03524   {
03525     register_operand,
03526     "=c",
03527     BImode,
03528     0,
03529     1
03530   },
03531   {
03532     comparison_operator,
03533     "",
03534     BImode,
03535     0,
03536     0
03537   },
03538   {
03539     fr_reg_or_fp01_operand,
03540     "fG",
03541     SFmode,
03542     0,
03543     1
03544   },
03545   {
03546     fr_reg_or_fp01_operand,
03547     "fG",
03548     SFmode,
03549     0,
03550     1
03551   },
03552   {
03553     register_operand,
03554     "=c",
03555     BImode,
03556     0,
03557     1
03558   },
03559   {
03560     comparison_operator,
03561     "",
03562     BImode,
03563     0,
03564     0
03565   },
03566   {
03567     fr_reg_or_fp01_operand,
03568     "fG",
03569     DFmode,
03570     0,
03571     1
03572   },
03573   {
03574     fr_reg_or_fp01_operand,
03575     "fG",
03576     DFmode,
03577     0,
03578     1
03579   },
03580   {
03581     register_operand,
03582     "=c",
03583     BImode,
03584     0,
03585     1
03586   },
03587   {
03588     comparison_operator,
03589     "",
03590     BImode,
03591     0,
03592     0
03593   },
03594   {
03595     tfreg_or_fp01_operand,
03596     "fG",
03597     TFmode,
03598     0,
03599     1
03600   },
03601   {
03602     tfreg_or_fp01_operand,
03603     "fG",
03604     TFmode,
03605     0,
03606     1
03607   },
03608   {
03609     register_operand,
03610     "=c",
03611     BImode,
03612     0,
03613     1
03614   },
03615   {
03616     gr_register_operand,
03617     "r",
03618     DImode,
03619     0,
03620     1
03621   },
03622   {
03623     immediate_operand,
03624     "n",
03625     DImode,
03626     0,
03627     1
03628   },
03629   {
03630     predicate_operator,
03631     "",
03632     VOIDmode,
03633     0,
03634     0
03635   },
03636   {
03637     register_operand,
03638     "c",
03639     BImode,
03640     0,
03641     1
03642   },
03643   {
03644     0,
03645     "",
03646     VOIDmode,
03647     0,
03648     1
03649   },
03650   {
03651     ar_lc_reg_operand,
03652     "",
03653     DImode,
03654     0,
03655     1
03656   },
03657   {
03658     0,
03659     "",
03660     VOIDmode,
03661     0,
03662     1
03663   },
03664   {
03665     gr_register_operand,
03666     "=r",
03667     DImode,
03668     0,
03669     1
03670   },
03671   {
03672     register_operand,
03673     "c",
03674     BImode,
03675     0,
03676     1
03677   },
03678   {
03679     destination_operand,
03680     "=r,r,r,r,r,r,r,r,r,r,m,Q,*f,*b,*d*e",
03681     DImode,
03682     0,
03683     1
03684   },
03685   {
03686     register_operand,
03687     "c,c,c,c,c,c,c,c,c,c,c,c,c,c,c",
03688     BImode,
03689     0,
03690     1
03691   },
03692   {
03693     move_operand,
03694     "rnm,*f,*b,*d*e,rnm,rnm,rnm,*f,*b,*d*e,rO,*f,rOQ,rO,rK",
03695     DImode,
03696     0,
03697     1
03698   },
03699   {
03700     move_operand,
03701     "rnm,rnm,rnm,rnm,*f,*b,*d*e,*f,*b,*d*e,rO,*f,rOQ,rO,rK",
03702     DImode,
03703     0,
03704     1
03705   },
03706   {
03707     predicate_operator,
03708     "",
03709     VOIDmode,
03710     0,
03711     0
03712   },
03713   {
03714     gr_register_operand,
03715     "=r,r",
03716     DImode,
03717     0,
03718     1
03719   },
03720   {
03721     register_operand,
03722     "c,c",
03723     BImode,
03724     0,
03725     1
03726   },
03727   {
03728     gr_reg_or_22bit_operand,
03729     "rI,rI",
03730     DImode,
03731     0,
03732     1
03733   },
03734   {
03735     gr_reg_or_22bit_operand,
03736     "0,rI",
03737     DImode,
03738     0,
03739     1
03740   },
03741   {
03742     predicate_operator,
03743     "",
03744     VOIDmode,
03745     0,
03746     0
03747   },
03748   {
03749     destination_operand,
03750     "=r,m,*f,r,m,*f,r,m,*f",
03751     SImode,
03752     0,
03753     1
03754   },
03755   {
03756     register_operand,
03757     "c,c,c,c,c,c,c,c,c",
03758     BImode,
03759     0,
03760     1
03761   },
03762   {
03763     move_operand,
03764     "0,0,0,rnm*f,rO,rO,rnm*f,rO,rO",
03765     SImode,
03766     0,
03767     1
03768   },
03769   {
03770     move_operand,
03771     "rnm*f,rO,rO,0,0,0,rnm*f,rO,rO",
03772     SImode,
03773     0,
03774     1
03775   },
03776   {
03777     predicate_operator,
03778     "",
03779     VOIDmode,
03780     0,
03781     0
03782   },
03783   {
03784     gr_register_operand,
03785     "=r,r",
03786     SImode,
03787     0,
03788     1
03789   },
03790   {
03791     register_operand,
03792     "c,c",
03793     BImode,
03794     0,
03795     1
03796   },
03797   {
03798     gr_reg_or_22bit_operand,
03799     "0,rI",
03800     SImode,
03801     0,
03802     1
03803   },
03804   {
03805     gr_reg_or_22bit_operand,
03806     "rI,rI",
03807     SImode,
03808     0,
03809     1
03810   },
03811   {
03812     predicate_operator,
03813     "",
03814     VOIDmode,
03815     0,
03816     0
03817   },
03818   {
03819     gr_register_operand,
03820     "=r",
03821     SImode,
03822     0,
03823     1
03824   },
03825   {
03826     register_operand,
03827     "c",
03828     BImode,
03829     0,
03830     1
03831   },
03832   {
03833     gr_register_operand,
03834     "r",
03835     SImode,
03836     0,
03837     1
03838   },
03839   {
03840     gr_register_operand,
03841     "r",
03842     SImode,
03843     0,
03844     1
03845   },
03846   {
03847     gr_register_operand,
03848     "r",
03849     SImode,
03850     0,
03851     1
03852   },
03853   {
03854     condop_operator,
03855     "",
03856     SImode,
03857     0,
03858     0
03859   },
03860   {
03861     predicate_operator,
03862     "",
03863     VOIDmode,
03864     0,
03865     0
03866   },
03867   {
03868     call_operand,
03869     "?b,i",
03870     DImode,
03871     0,
03872     1
03873   },
03874   {
03875     register_operand,
03876     "=b,b",
03877     DImode,
03878     0,
03879     1
03880   },
03881   {
03882     0,
03883     "",
03884     VOIDmode,
03885     0,
03886     1
03887   },
03888   {
03889     call_operand,
03890     "?b,i",
03891     DImode,
03892     0,
03893     1
03894   },
03895   {
03896     register_operand,
03897     "=b,b",
03898     DImode,
03899     0,
03900     1
03901   },
03902   {
03903     call_operand,
03904     "?r,i",
03905     VOIDmode,
03906     0,
03907     1
03908   },
03909   {
03910     register_operand,
03911     "=b,b",
03912     DImode,
03913     0,
03914     1
03915   },
03916   {
03917     scratch_operand,
03918     "=&r,X",
03919     DImode,
03920     0,
03921     0
03922   },
03923   {
03924     scratch_operand,
03925     "=b,X",
03926     DImode,
03927     0,
03928     0
03929   },
03930   {
03931     0,
03932     "",
03933     VOIDmode,
03934     0,
03935     1
03936   },
03937   {
03938     call_operand,
03939     "?r,i",
03940     DImode,
03941     0,
03942     1
03943   },
03944   {
03945     register_operand,
03946     "=b,b",
03947     DImode,
03948     0,
03949     1
03950   },
03951   {
03952     scratch_operand,
03953     "=&r,X",
03954     DImode,
03955     0,
03956     0
03957   },
03958   {
03959     scratch_operand,
03960     "=b,X",
03961     DImode,
03962     0,
03963     0
03964   },
03965   {
03966     call_operand,
03967     "?r,i",
03968     DImode,
03969     0,
03970     1
03971   },
03972   {
03973     scratch_operand,
03974     "=&r,X",
03975     DImode,
03976     0,
03977     0
03978   },
03979   {
03980     scratch_operand,
03981     "=b,X",
03982     DImode,
03983     0,
03984     0
03985   },
03986   {
03987     register_operand,
03988     "b",
03989     DImode,
03990     0,
03991     1
03992   },
03993   {
03994     0,
03995     "",
03996     VOIDmode,
03997     0,
03998     1
03999   },
04000   {
04001     register_operand,
04002     "=r,r,r",
04003     DImode,
04004     0,
04005     1
04006   },
04007   {
04008     register_operand,
04009     "%r,r,a",
04010     DImode,
04011     0,
04012     1
04013   },
04014   {
04015     gr_reg_or_22bit_operand,
04016     "r,I,J",
04017     DImode,
04018     0,
04019     1
04020   },
04021   {
04022     register_operand,
04023     "+r,r,r",
04024     DImode,
04025     0,
04026     1
04027   },
04028   {
04029     register_operand,
04030     "=r",
04031     DImode,
04032     0,
04033     1
04034   },
04035   {
04036     register_operand,
04037     "+r",
04038     DImode,
04039     0,
04040     1
04041   },
04042   {
04043     register_operand,
04044     "",
04045     DImode,
04046     0,
04047     1
04048   },
04049   {
04050     register_operand,
04051     "=r",
04052     DImode,
04053     0,
04054     1
04055   },
04056   {
04057     const_int_operand,
04058     "i",
04059     DImode,
04060     0,
04061     1
04062   },
04063   {
04064     const_int_operand,
04065     "i",
04066     DImode,
04067     0,
04068     1
04069   },
04070   {
04071     const_int_operand,
04072     "i",
04073     DImode,
04074     0,
04075     1
04076   },
04077   {
04078     const_int_operand,
04079     "i",
04080     DImode,
04081     0,
04082     1
04083   },
04084   {
04085     memory_operand,
04086     "=m",
04087     DImode,
04088     0,
04089     1
04090   },
04091   {
04092     register_operand,
04093     "r",
04094     DImode,
04095     0,
04096     1
04097   },
04098   {
04099     const_int_operand,
04100     "",
04101     DImode,
04102     0,
04103     1
04104   },
04105   {
04106     register_operand,
04107     "",
04108     DImode,
04109     0,
04110     1
04111   },
04112   {
04113     register_operand,
04114     "=r",
04115     DImode,
04116     0,
04117     1
04118   },
04119   {
04120     memory_operand,
04121     "m",
04122     DImode,
04123     0,
04124     1
04125   },
04126   {
04127     const_int_operand,
04128     "",
04129     DImode,
04130     0,
04131     1
04132   },
04133   {
04134     register_operand,
04135     "",
04136     DImode,
04137     0,
04138     1
04139   },
04140   {
04141     memory_operand,
04142     "=m",
04143     TFmode,
04144     0,
04145     1
04146   },
04147   {
04148     register_operand,
04149     "f",
04150     TFmode,
04151     0,
04152     1
04153   },
04154   {
04155     register_operand,
04156     "=f",
04157     TFmode,
04158     0,
04159     1
04160   },
04161   {
04162     memory_operand,
04163     "m",
04164     TFmode,
04165     0,
04166     1
04167   },
04168   {
04169     const_int_operand,
04170     "",
04171     VOIDmode,
04172     0,
04173     1
04174   },
04175   {
04176     predicate_operator,
04177     "",
04178     VOIDmode,
04179     0,
04180     0
04181   },
04182   {
04183     register_operand,
04184     "c",
04185     BImode,
04186     0,
04187     1
04188   },
04189   {
04190     const_int_operand,
04191     "",
04192     VOIDmode,
04193     0,
04194     1
04195   },
04196   {
04197     address_operand,
04198     "p",
04199     DImode,
04200     0,
04201     1
04202   },
04203   {
04204     const_int_operand,
04205     "n",
04206     DImode,
04207     0,
04208     1
04209   },
04210   {
04211     const_int_operand,
04212     "n",
04213     DImode,
04214     0,
04215     1
04216   },
04217   {
04218     0,
04219     "",
04220     DImode,
04221     0,
04222     1
04223   },
04224   {
04225     0,
04226     "",
04227     BLKmode,
04228     0,
04229     1
04230   },
04231   {
04232     0,
04233     "",
04234     BLKmode,
04235     0,
04236     1
04237   },
04238   {
04239     gr_register_operand,
04240     "=r",
04241     SImode,
04242     0,
04243     1
04244   },
04245   {
04246     not_postinc_memory_operand,
04247     "+S",
04248     SImode,
04249     0,
04250     1
04251   },
04252   {
04253     fetchadd_operand,
04254     "n",
04255     SImode,
04256     0,
04257     1
04258   },
04259   {
04260     gr_register_operand,
04261     "=r",
04262     DImode,
04263     0,
04264     1
04265   },
04266   {
04267     not_postinc_memory_operand,
04268     "+S",
04269     DImode,
04270     0,
04271     1
04272   },
04273   {
04274     fetchadd_operand,
04275     "n",
04276     DImode,
04277     0,
04278     1
04279   },
04280   {
04281     gr_register_operand,
04282     "=r",
04283     SImode,
04284     0,
04285     1
04286   },
04287   {
04288     not_postinc_memory_operand,
04289     "+S",
04290     SImode,
04291     0,
04292     1
04293   },
04294   {
04295     gr_register_operand,
04296     "r",
04297     SImode,
04298     0,
04299     1
04300   },
04301   {
04302     ar_ccv_reg_operand,
04303     "",
04304     VOIDmode,
04305     0,
04306     1
04307   },
04308   {
04309     gr_register_operand,
04310     "=r",
04311     DImode,
04312     0,
04313     1
04314   },
04315   {
04316     not_postinc_memory_operand,
04317     "+S",
04318     DImode,
04319     0,
04320     1
04321   },
04322   {
04323     gr_register_operand,
04324     "r",
04325     DImode,
04326     0,
04327     1
04328   },
04329   {
04330     ar_ccv_reg_operand,
04331     "",
04332     DImode,
04333     0,
04334     1
04335   },
04336   {
04337     register_operand,
04338     "+c",
04339     BImode,
04340     0,
04341     1
04342   },
04343   {
04344     gr_register_operand,
04345     "=r",
04346     DImode,
04347     0,
04348     1
04349   },
04350   {
04351     basereg_operand,
04352     "r",
04353     SImode,
04354     0,
04355     1
04356   },
04357   {
04358     gr_reg_or_14bit_operand,
04359     "rI",
04360     SImode,
04361     0,
04362     1
04363   },
04364   {
04365     gr_register_operand,
04366     "=r",
04367     DImode,
04368     0,
04369     1
04370   },
04371   {
04372     gr_register_operand,
04373     "r",
04374     SImode,
04375     0,
04376     1
04377   },
04378   {
04379     basereg_operand,
04380     "r",
04381     SImode,
04382     0,
04383     1
04384   },
04385   {
04386     register_operand,
04387     "",
04388     BImode,
04389     0,
04390     1
04391   },
04392   {
04393     register_operand,
04394     "",
04395     BImode,
04396     0,
04397     1
04398   },
04399   {
04400     general_operand,
04401     "",
04402     QImode,
04403     0,
04404     1
04405   },
04406   {
04407     general_operand,
04408     "",
04409     QImode,
04410     0,
04411     1
04412   },
04413   {
04414     general_operand,
04415     "",
04416     HImode,
04417     0,
04418     1
04419   },
04420   {
04421     general_operand,
04422     "",
04423     HImode,
04424     0,
04425     1
04426   },
04427   {
04428     general_operand,
04429     "",
04430     SImode,
04431     0,
04432     1
04433   },
04434   {
04435     general_operand,
04436     "",
04437     SImode,
04438     0,
04439     1
04440   },
04441   {
04442     register_operand,
04443     "",
04444     SImode,
04445     0,
04446     1
04447   },
04448   {
04449     symbolic_operand,
04450     "",
04451     SImode,
04452     0,
04453     1
04454   },
04455   {
04456     scratch_operand,
04457     "",
04458     DImode,
04459     0,
04460     0
04461   },
04462   {
04463     general_operand,
04464     "",
04465     DImode,
04466     0,
04467     1
04468   },
04469   {
04470     general_operand,
04471     "",
04472     DImode,
04473     0,
04474     1
04475   },
04476   {
04477     register_operand,
04478     "",
04479     DImode,
04480     0,
04481     1
04482   },
04483   {
04484     symbolic_operand,
04485     "",
04486     DImode,
04487     0,
04488     1
04489   },
04490   {
04491     scratch_operand,
04492     "",
04493     DImode,
04494     0,
04495     0
04496   },
04497   {
04498     register_operand,
04499     "",
04500     DImode,
04501     0,
04502     1
04503   },
04504   {
04505     function_operand,
04506     "",
04507     VOIDmode,
04508     0,
04509     1
04510   },
04511   {
04512     register_operand,
04513     "",
04514     DImode,
04515     0,
04516     1
04517   },
04518   {
04519     got_symbolic_operand,
04520     "",
04521     DImode,
04522     0,
04523     1
04524   },
04525   {
04526     register_operand,
04527     "",
04528     DImode,
04529     0,
04530     1
04531   },
04532   {
04533     register_operand,
04534     "",
04535     DImode,
04536     0,
04537     1
04538   },
04539   {
04540     symbolic_operand,
04541     "",
04542     DImode,
04543     0,
04544     1
04545   },
04546   {
04547     general_operand,
04548     "",
04549     TImode,
04550     0,
04551     1
04552   },
04553   {
04554     general_operand,
04555     "",
04556     TImode,
04557     0,
04558     1
04559   },
04560   {
04561     scratch_operand,
04562     "",
04563     DImode,
04564     0,
04565     0
04566   },
04567   {
04568     nonimmediate_operand,
04569     "",
04570     TImode,
04571     0,
04572     1
04573   },
04574   {
04575     general_operand,
04576     "",
04577     TImode,
04578     0,
04579     1
04580   },
04581   {
04582     scratch_operand,
04583     "",
04584     DImode,
04585     0,
04586     0
04587   },
04588   {
04589     register_operand,
04590     "",
04591     TImode,
04592     0,
04593     1
04594   },
04595   {
04596     nonmemory_operand,
04597     "",
04598     TImode,
04599     0,
04600     1
04601   },
04602   {
04603     register_operand,
04604     "=r",
04605     TImode,
04606     0,
04607     1
04608   },
04609   {
04610     0,
04611     "m",
04612     TImode,
04613     0,
04614     1
04615   },
04616   {
04617     register_operand,
04618     "=&r",
04619     TImode,
04620     0,
04621     1
04622   },
04623   {
04624     0,
04625     "=m",
04626     TImode,
04627     0,
04628     1
04629   },
04630   {
04631     register_operand,
04632     "r",
04633     TImode,
04634     0,
04635     1
04636   },
04637   {
04638     register_operand,
04639     "=&r",
04640     TImode,
04641     0,
04642     1
04643   },
04644   {
04645     general_operand,
04646     "",
04647     SFmode,
04648     0,
04649     1
04650   },
04651   {
04652     general_operand,
04653     "",
04654     SFmode,
04655     0,
04656     1
04657   },
04658   {
04659     general_operand,
04660     "",
04661     DFmode,
04662     0,
04663     1
04664   },
04665   {
04666     general_operand,
04667     "",
04668     DFmode,
04669     0,
04670     1
04671   },
04672   {
04673     general_operand,
04674     "",
04675     TFmode,
04676     0,
04677     1
04678   },
04679   {
04680     general_operand,
04681     "",
04682     TFmode,
04683     0,
04684     1
04685   },
04686   {
04687     gr_register_operand,
04688     "",
04689     DImode,
04690     0,
04691     1
04692   },
04693   {
04694     const_int_operand,
04695     "",
04696     DImode,
04697     0,
04698     1
04699   },
04700   {
04701     const_int_operand,
04702     "",
04703     DImode,
04704     0,
04705     1
04706   },
04707   {
04708     nonmemory_operand,
04709     "",
04710     DImode,
04711     0,
04712     1
04713   },
04714   {
04715     register_operand,
04716     "",
04717     DImode,
04718     0,
04719     1
04720   },
04721   {
04722     register_operand,
04723     "",
04724     DImode,
04725     0,
04726     1
04727   },
04728   {
04729     register_operand,
04730     "",
04731     DImode,
04732     0,
04733     1
04734   },
04735   {
04736     register_operand,
04737     "",
04738     BImode,
04739     0,
04740     1
04741   },
04742   {
04743     register_operand,
04744     "",
04745     BImode,
04746     0,
04747     1
04748   },
04749   {
04750     register_operand,
04751     "",
04752     BImode,
04753     0,
04754     1
04755   },
04756   {
04757     scratch_operand,
04758     "",
04759     BImode,
04760     0,
04761     0
04762   },
04763   {
04764     register_operand,
04765     "",
04766     BImode,
04767     0,
04768     1
04769   },
04770   {
04771     0,
04772     "",
04773     VOIDmode,
04774     0,
04775     0
04776   },
04777   {
04778     register_operand,
04779     "",
04780     BImode,
04781     0,
04782     1
04783   },
04784   {
04785     register_operand,
04786     "",
04787     DImode,
04788     0,
04789     1
04790   },
04791   {
04792     register_operand,
04793     "",
04794     BImode,
04795     0,
04796     1
04797   },
04798   {
04799     comparison_operator,
04800     "",
04801     BImode,
04802     0,
04803     1
04804   },
04805   {
04806     register_operand,
04807     "",
04808     CCImode,
04809     0,
04810     1
04811   },
04812   {
04813     register_operand,
04814     "",
04815     CCImode,
04816     0,
04817     1
04818   },
04819   {
04820     register_operand,
04821     "",
04822     CCImode,
04823     0,
04824     1
04825   },
04826   {
04827     register_operand,
04828     "",
04829     CCImode,
04830     0,
04831     1
04832   },
04833   {
04834     register_operand,
04835     "",
04836     BImode,
04837     0,
04838     1
04839   },
04840   {
04841     gr_register_operand,
04842     "",
04843     SImode,
04844     0,
04845     1
04846   },
04847   {
04848     gr_register_operand,
04849     "",
04850     SImode,
04851     0,
04852     1
04853   },
04854   {
04855     gr_register_operand,
04856     "",
04857     SImode,
04858     0,
04859     1
04860   },
04861   {
04862     register_operand,
04863     "",
04864     SImode,
04865     0,
04866     1
04867   },
04868   {
04869     general_operand,
04870     "",
04871     SImode,
04872     0,
04873     1
04874   },
04875   {
04876     general_operand,
04877     "",
04878     SImode,
04879     0,
04880     1
04881   },
04882   {
04883     fr_register_operand,
04884     "",
04885     TFmode,
04886     0,
04887     1
04888   },
04889   {
04890     fr_register_operand,
04891     "",
04892     TFmode,
04893     0,
04894     1
04895   },
04896   {
04897     fr_register_operand,
04898     "",
04899     TFmode,
04900     0,
04901     1
04902   },
04903   {
04904     fr_register_operand,
04905     "",
04906     TFmode,
04907     0,
04908     1
04909   },
04910   {
04911     scratch_operand,
04912     "",
04913     TFmode,
04914     0,
04915     0
04916   },
04917   {
04918     scratch_operand,
04919     "",
04920     TFmode,
04921     0,
04922     0
04923   },
04924   {
04925     scratch_operand,
04926     "",
04927     BImode,
04928     0,
04929     0
04930   },
04931   {
04932     register_operand,
04933     "",
04934     DImode,
04935     0,
04936     1
04937   },
04938   {
04939     register_operand,
04940     "",
04941     DImode,
04942     0,
04943     1
04944   },
04945   {
04946     register_operand,
04947     "",
04948     DImode,
04949     0,
04950     1
04951   },
04952   {
04953     register_operand,
04954     "",
04955     DImode,
04956     0,
04957     1
04958   },
04959   {
04960     gr_reg_or_14bit_operand,
04961     "",
04962     DImode,
04963     0,
04964     1
04965   },
04966   {
04967     scratch_operand,
04968     "",
04969     DImode,
04970     0,
04971     0
04972   },
04973   {
04974     gr_register_operand,
04975     "",
04976     DImode,
04977     0,
04978     1
04979   },
04980   {
04981     gr_register_operand,
04982     "",
04983     DImode,
04984     0,
04985     1
04986   },
04987   {
04988     gr_register_operand,
04989     "",
04990     DImode,
04991     0,
04992     1
04993   },
04994   {
04995     register_operand,
04996     "",
04997     DImode,
04998     0,
04999     1
05000   },
05001   {
05002     general_operand,
05003     "",
05004     DImode,
05005     0,
05006     1
05007   },
05008   {
05009     general_operand,
05010     "",
05011     DImode,
05012     0,
05013     1
05014   },
05015   {
05016     fr_register_operand,
05017     "",
05018     TFmode,
05019     0,
05020     1
05021   },
05022   {
05023     fr_register_operand,
05024     "",
05025     TFmode,
05026     0,
05027     1
05028   },
05029   {
05030     fr_register_operand,
05031     "",
05032     TFmode,
05033     0,
05034     1
05035   },
05036   {
05037     scratch_operand,
05038     "",
05039     TFmode,
05040     0,
05041     0
05042   },
05043   {
05044     scratch_operand,
05045     "",
05046     TFmode,
05047     0,
05048     0
05049   },
05050   {
05051     scratch_operand,
05052     "",
05053     TFmode,
05054     0,
05055     0
05056   },
05057   {
05058     scratch_operand,
05059     "",
05060     BImode,
05061     0,
05062     0
05063   },
05064   {
05065     fr_register_operand,
05066     "",
05067     SFmode,
05068     0,
05069     1
05070   },
05071   {
05072     fr_register_operand,
05073     "",
05074     SFmode,
05075     0,
05076     1
05077   },
05078   {
05079     fr_register_operand,
05080     "",
05081     SFmode,
05082     0,
05083     1
05084   },
05085   {
05086     scratch_operand,
05087     "",
05088     TFmode,
05089     0,
05090     0
05091   },
05092   {
05093     scratch_operand,
05094     "",
05095     TFmode,
05096     0,
05097     0
05098   },
05099   {
05100     scratch_operand,
05101     "",
05102     BImode,
05103     0,
05104     0
05105   },
05106   {
05107     fr_register_operand,
05108     "",
05109     DFmode,
05110     0,
05111     1
05112   },
05113   {
05114     fr_register_operand,
05115     "",
05116     DFmode,
05117     0,
05118     1
05119   },
05120   {
05121     fr_register_operand,
05122     "",
05123     DFmode,
05124     0,
05125     1
05126   },
05127   {
05128     scratch_operand,
05129     "",
05130     TFmode,
05131     0,
05132     0
05133   },
05134   {
05135     scratch_operand,
05136     "",
05137     TFmode,
05138     0,
05139     0
05140   },
05141   {
05142     scratch_operand,
05143     "",
05144     TFmode,
05145     0,
05146     0
05147   },
05148   {
05149     scratch_operand,
05150     "",
05151     BImode,
05152     0,
05153     0
05154   },
05155   {
05156     fr_register_operand,
05157     "",
05158     DFmode,
05159     0,
05160     1
05161   },
05162   {
05163     fr_register_operand,
05164     "",
05165     DFmode,
05166     0,
05167     1
05168   },
05169   {
05170     fr_register_operand,
05171     "",
05172     DFmode,
05173     0,
05174     1
05175   },
05176   {
05177     scratch_operand,
05178     "",
05179     TFmode,
05180     0,
05181     0
05182   },
05183   {
05184     scratch_operand,
05185     "",
05186     DFmode,
05187     0,
05188     0
05189   },
05190   {
05191     scratch_operand,
05192     "",
05193     BImode,
05194     0,
05195     0
05196   },
05197   {
05198     fr_register_operand,
05199     "",
05200     TFmode,
05201     0,
05202     1
05203   },
05204   {
05205     fr_register_operand,
05206     "",
05207     TFmode,
05208     0,
05209     1
05210   },
05211   {
05212     fr_register_operand,
05213     "",
05214     TFmode,
05215     0,
05216     1
05217   },
05218   {
05219     scratch_operand,
05220     "",
05221     TFmode,
05222     0,
05223     0
05224   },
05225   {
05226     scratch_operand,
05227     "",
05228     TFmode,
05229     0,
05230     0
05231   },
05232   {
05233     scratch_operand,
05234     "",
05235     TFmode,
05236     0,
05237     0
05238   },
05239   {
05240     scratch_operand,
05241     "",
05242     TFmode,
05243     0,
05244     0
05245   },
05246   {
05247     scratch_operand,
05248     "",
05249     BImode,
05250     0,
05251     0
05252   },
05253   {
05254     gr_register_operand,
05255     "",
05256     SImode,
05257     0,
05258     1
05259   },
05260   {
05261     gr_register_operand,
05262     "",
05263     SImode,
05264     0,
05265     1
05266   },
05267   {
05268     gr_reg_or_5bit_operand,
05269     "",
05270     SImode,
05271     0,
05272     1
05273   },
05274   {
05275     gr_register_operand,
05276     "",
05277     SImode,
05278     0,
05279     1
05280   },
05281   {
05282     gr_register_operand,
05283     "",
05284     SImode,
05285     0,
05286     1
05287   },
05288   {
05289     gr_reg_or_5bit_operand,
05290     "",
05291     DImode,
05292     0,
05293     1
05294   },
05295   {
05296     gr_register_operand,
05297     "",
05298     SImode,
05299     0,
05300     1
05301   },
05302   {
05303     gr_register_operand,
05304     "",
05305     SImode,
05306     0,
05307     1
05308   },
05309   {
05310     shift_32bit_count_operand,
05311     "",
05312     SImode,
05313     0,
05314     1
05315   },
05316   {
05317     gr_register_operand,
05318     "",
05319     DImode,
05320     0,
05321     1
05322   },
05323   {
05324     gr_register_operand,
05325     "",
05326     DImode,
05327     0,
05328     1
05329   },
05330   {
05331     shladd_operand,
05332     "",
05333     DImode,
05334     0,
05335     1
05336   },
05337   {
05338     nonmemory_operand,
05339     "",
05340     DImode,
05341     0,
05342     1
05343   },
05344   {
05345     nonmemory_operand,
05346     "",
05347     DImode,
05348     0,
05349     1
05350   },
05351   {
05352     gr_register_operand,
05353     "",
05354     DImode,
05355     0,
05356     1
05357   },
05358   {
05359     gr_register_operand,
05360     "",
05361     DImode,
05362     0,
05363     1
05364   },
05365   {
05366     nonmemory_operand,
05367     "",
05368     DImode,
05369     0,
05370     1
05371   },
05372   {
05373     register_operand,
05374     "",
05375     BImode,
05376     0,
05377     1
05378   },
05379   {
05380     const_int_operand,
05381     "",
05382     BImode,
05383     0,
05384     1
05385   },
05386   {
05387     gr_register_operand,
05388     "",
05389     SImode,
05390     0,
05391     1
05392   },
05393   {
05394     gr_reg_or_8bit_and_adjusted_operand,
05395     "",
05396     SImode,
05397     0,
05398     1
05399   },
05400   {
05401     gr_register_operand,
05402     "",
05403     DImode,
05404     0,
05405     1
05406   },
05407   {
05408     gr_reg_or_8bit_and_adjusted_operand,
05409     "",
05410     DImode,
05411     0,
05412     1
05413   },
05414   {
05415     fr_reg_or_fp01_operand,
05416     "",
05417     SFmode,
05418     0,
05419     1
05420   },
05421   {
05422     fr_reg_or_fp01_operand,
05423     "",
05424     SFmode,
05425     0,
05426     1
05427   },
05428   {
05429     fr_reg_or_fp01_operand,
05430     "",
05431     DFmode,
05432     0,
05433     1
05434   },
05435   {
05436     fr_reg_or_fp01_operand,
05437     "",
05438     DFmode,
05439     0,
05440     1
05441   },
05442   {
05443     tfreg_or_fp01_operand,
05444     "",
05445     TFmode,
05446     0,
05447     1
05448   },
05449   {
05450     tfreg_or_fp01_operand,
05451     "",
05452     TFmode,
05453     0,
05454     1
05455   },
05456   {
05457     0,
05458     "",
05459     VOIDmode,
05460     0,
05461     1
05462   },
05463   {
05464     0,
05465     "",
05466     VOIDmode,
05467     0,
05468     1
05469   },
05470   {
05471     0,
05472     "",
05473     VOIDmode,
05474     0,
05475     1
05476   },
05477   {
05478     0,
05479     "",
05480     VOIDmode,
05481     0,
05482     1
05483   },
05484   {
05485     0,
05486     "",
05487     VOIDmode,
05488     0,
05489     1
05490   },
05491   {
05492     gr_register_operand,
05493     "",
05494     DImode,
05495     0,
05496     1
05497   },
05498   {
05499     register_operand,
05500     "",
05501     BImode,
05502     0,
05503     1
05504   },
05505   {
05506     destination_operand,
05507     "",
05508     VOIDmode,
05509     0,
05510     1
05511   },
05512   {
05513     register_operand,
05514     "",
05515     BImode,
05516     0,
05517     1
05518   },
05519   {
05520     move_operand,
05521     "",
05522     VOIDmode,
05523     0,
05524     1
05525   },
05526   {
05527     move_operand,
05528     "",
05529     VOIDmode,
05530     0,
05531     1
05532   },
05533   {
05534     predicate_operator,
05535     "",
05536     VOIDmode,
05537     0,
05538     0
05539   },
05540   {
05541     register_operand,
05542     "",
05543     DImode,
05544     0,
05545     1
05546   },
05547   {
05548     register_operand,
05549     "c,c",
05550     BImode,
05551     0,
05552     1
05553   },
05554   {
05555     gr_reg_or_22bit_operand,
05556     "",
05557     DImode,
05558     0,
05559     1
05560   },
05561   {
05562     gr_reg_or_22bit_operand,
05563     "",
05564     DImode,
05565     0,
05566     1
05567   },
05568   {
05569     predicate_operator,
05570     "",
05571     VOIDmode,
05572     0,
05573     0
05574   },
05575   {
05576     register_operand,
05577     "",
05578     SImode,
05579     0,
05580     1
05581   },
05582   {
05583     register_operand,
05584     "c,c",
05585     BImode,
05586     0,
05587     1
05588   },
05589   {
05590     gr_reg_or_22bit_operand,
05591     "",
05592     SImode,
05593     0,
05594     1
05595   },
05596   {
05597     gr_reg_or_22bit_operand,
05598     "",
05599     SImode,
05600     0,
05601     1
05602   },
05603   {
05604     predicate_operator,
05605     "",
05606     VOIDmode,
05607     0,
05608     0
05609   },
05610   {
05611     gr_register_operand,
05612     "",
05613     SImode,
05614     0,
05615     1
05616   },
05617   {
05618     register_operand,
05619     "",
05620     BImode,
05621     0,
05622     1
05623   },
05624   {
05625     gr_register_operand,
05626     "",
05627     SImode,
05628     0,
05629     1
05630   },
05631   {
05632     gr_register_operand,
05633     "",
05634     SImode,
05635     0,
05636     1
05637   },
05638   {
05639     gr_register_operand,
05640     "",
05641     SImode,
05642     0,
05643     1
05644   },
05645   {
05646     condop_operator,
05647     "",
05648     SImode,
05649     0,
05650     0
05651   },
05652   {
05653     predicate_operator,
05654     "",
05655     VOIDmode,
05656     0,
05657     0
05658   },
05659   {
05660     0,
05661     "",
05662     DImode,
05663     0,
05664     1
05665   },
05666   {
05667     0,
05668     "",
05669     VOIDmode,
05670     0,
05671     1
05672   },
05673   {
05674     0,
05675     "",
05676     VOIDmode,
05677     0,
05678     1
05679   },
05680   {
05681     0,
05682     "",
05683     VOIDmode,
05684     0,
05685     1
05686   },
05687   {
05688     0,
05689     "",
05690     DImode,
05691     0,
05692     1
05693   },
05694   {
05695     0,
05696     "",
05697     VOIDmode,
05698     0,
05699     1
05700   },
05701   {
05702     0,
05703     "",
05704     VOIDmode,
05705     0,
05706     1
05707   },
05708   {
05709     0,
05710     "",
05711     VOIDmode,
05712     0,
05713     1
05714   },
05715   {
05716     call_operand,
05717     "",
05718     VOIDmode,
05719     0,
05720     1
05721   },
05722   {
05723     register_operand,
05724     "",
05725     DImode,
05726     0,
05727     1
05728   },
05729   {
05730     scratch_operand,
05731     "",
05732     DImode,
05733     0,
05734     0
05735   },
05736   {
05737     scratch_operand,
05738     "",
05739     DImode,
05740     0,
05741     0
05742   },
05743   {
05744     0,
05745     "",
05746     VOIDmode,
05747     0,
05748     1
05749   },
05750   {
05751     call_operand,
05752     "",
05753     DImode,
05754     0,
05755     1
05756   },
05757   {
05758     register_operand,
05759     "",
05760     DImode,
05761     0,
05762     1
05763   },
05764   {
05765     scratch_operand,
05766     "",
05767     DImode,
05768     0,
05769     0
05770   },
05771   {
05772     scratch_operand,
05773     "",
05774     DImode,
05775     0,
05776     0
05777   },
05778   {
05779     call_operand,
05780     "",
05781     DImode,
05782     0,
05783     1
05784   },
05785   {
05786     scratch_operand,
05787     "",
05788     DImode,
05789     0,
05790     0
05791   },
05792   {
05793     scratch_operand,
05794     "",
05795     DImode,
05796     0,
05797     0
05798   },
05799   {
05800     memory_operand,
05801     "",
05802     DImode,
05803     0,
05804     1
05805   },
05806   {
05807     0,
05808     "",
05809     VOIDmode,
05810     0,
05811     1
05812   },
05813   {
05814     memory_operand,
05815     "",
05816     OImode,
05817     0,
05818     1
05819   },
05820   {
05821     register_operand,
05822     "",
05823     DImode,
05824     0,
05825     1
05826   },
05827   {
05828     general_operand,
05829     "",
05830     VOIDmode,
05831     0,
05832     1
05833   },
05834   {
05835     general_operand,
05836     "",
05837     VOIDmode,
05838     0,
05839     1
05840   },
05841   {
05842     general_operand,
05843     "",
05844     VOIDmode,
05845     0,
05846     1
05847   },
05848   {
05849     general_operand,
05850     "",
05851     VOIDmode,
05852     0,
05853     1
05854   },
05855   {
05856     register_operand,
05857     "r",
05858     DImode,
05859     0,
05860     1
05861   },
05862   {
05863     register_operand,
05864     "r",
05865     DImode,
05866     0,
05867     1
05868   },
05869   {
05870     register_operand,
05871     "r",
05872     DImode,
05873     0,
05874     1
05875   },
05876   {
05877     register_operand,
05878     "",
05879     DImode,
05880     0,
05881     1
05882   },
05883   {
05884     memory_operand,
05885     "",
05886     OImode,
05887     0,
05888     1
05889   },
05890   {
05891     nonimmediate_operand,
05892     "=c,c,?c,?*r,c,*r,*r,*m,*r",
05893     BImode,
05894     0,
05895     1
05896   },
05897   {
05898     move_operand,
05899     "O,n,c,c,*r,n,*m,*r,*r",
05900     BImode,
05901     0,
05902     1
05903   },
05904   {
05905     predicate_operator,
05906     "",
05907     VOIDmode,
05908     0,
05909     0
05910   },
05911   {
05912     register_operand,
05913     "c,c,c,c,c,c,c,c,c",
05914     BImode,
05915     0,
05916     1
05917   },
05918   {
05919     destination_operand,
05920     "=r,r,r,m,r,*f,*f",
05921     QImode,
05922     0,
05923     1
05924   },
05925   {
05926     move_operand,
05927     "rO,J,m,rO,*f,rO,*f",
05928     QImode,
05929     0,
05930     1
05931   },
05932   {
05933     predicate_operator,
05934     "",
05935     VOIDmode,
05936     0,
05937     0
05938   },
05939   {
05940     register_operand,
05941     "c,c,c,c,c,c,c",
05942     BImode,
05943     0,
05944     1
05945   },
05946   {
05947     destination_operand,
05948     "=r,r,r,m,r,*f,*f",
05949     HImode,
05950     0,
05951     1
05952   },
05953   {
05954     move_operand,
05955     "rO,J,m,rO,*f,rO,*f",
05956     HImode,
05957     0,
05958     1
05959   },
05960   {
05961     predicate_operator,
05962     "",
05963     VOIDmode,
05964     0,
05965     0
05966   },
05967   {
05968     register_operand,
05969     "c,c,c,c,c,c,c",
05970     BImode,
05971     0,
05972     1
05973   },
05974   {
05975     register_operand,
05976     "=r",
05977     SImode,
05978     0,
05979     1
05980   },
05981   {
05982     symbolic_operand,
05983     "s",
05984     SImode,
05985     0,
05986     1
05987   },
05988   {
05989     scratch_operand,
05990     "=r",
05991     DImode,
05992     0,
05993     0
05994   },
05995   {
05996     predicate_operator,
05997     "",
05998     VOIDmode,
05999     0,
06000     0
06001   },
06002   {
06003     register_operand,
06004     "c",
06005     BImode,
06006     0,
06007     1
06008   },
06009   {
06010     destination_operand,
06011     "=r,r,r,r,m,r,*f,*f,r,*d",
06012     SImode,
06013     0,
06014     1
06015   },
06016   {
06017     move_operand,
06018     "rO,J,i,m,rO,*f,rO,*f,*d,rK",
06019     SImode,
06020     0,
06021     1
06022   },
06023   {
06024     predicate_operator,
06025     "",
06026     VOIDmode,
06027     0,
06028     0
06029   },
06030   {
06031     register_operand,
06032     "c,c,c,c,c,c,c,c,c,c",
06033     BImode,
06034     0,
06035     1
06036   },
06037   {
06038     register_operand,
06039     "=r",
06040     DImode,
06041     0,
06042     1
06043   },
06044   {
06045     symbolic_operand,
06046     "s",
06047     DImode,
06048     0,
06049     1
06050   },
06051   {
06052     scratch_operand,
06053     "=r",
06054     DImode,
06055     0,
06056     0
06057   },
06058   {
06059     predicate_operator,
06060     "",
06061     VOIDmode,
06062     0,
06063     0
06064   },
06065   {
06066     register_operand,
06067     "c",
06068     BImode,
06069     0,
06070     1
06071   },
06072   {
06073     destination_operand,
06074     "=r,r,r,r,m,r,*f,*f,*f,Q,r,*b,r,*e,r,*d,r,*c",
06075     DImode,
06076     0,
06077     1
06078   },
06079   {
06080     move_operand,
06081     "rO,J,i,m,rO,*f,rO,*f,Q,*f,*b,rO,*e,rK,*d,rK,*c,rO",
06082     DImode,
06083     0,
06084     1
06085   },
06086   {
06087     predicate_operator,
06088     "",
06089     VOIDmode,
06090     0,
06091     0
06092   },
06093   {
06094     register_operand,
06095     "c,c,c,c,c,c,c,c,c,c,c,c,c,c,c,c,c,c",
06096     BImode,
06097     0,
06098     1
06099   },
06100   {
06101     register_operand,
06102     "=r",
06103     DImode,
06104     0,
06105     1
06106   },
06107   {
06108     function_operand,
06109     "s",
06110     VOIDmode,
06111     0,
06112     1
06113   },
06114   {
06115     predicate_operator,
06116     "",
06117     VOIDmode,
06118     0,
06119     0
06120   },
06121   {
06122     register_operand,
06123     "c",
06124     BImode,
06125     0,
06126     1
06127   },
06128   {
06129     register_operand,
06130     "=r",
06131     DImode,
06132     0,
06133     1
06134   },
06135   {
06136     sdata_symbolic_operand,
06137     "s",
06138     VOIDmode,
06139     0,
06140     1
06141   },
06142   {
06143     predicate_operator,
06144     "",
06145     VOIDmode,
06146     0,
06147     0
06148   },
06149   {
06150     register_operand,
06151     "c",
06152     BImode,
06153     0,
06154     1
06155   },
06156   {
06157     register_operand,
06158     "=r",
06159     DImode,
06160     0,
06161     1
06162   },
06163   {
06164     symbolic_operand,
06165     "",
06166     DImode,
06167     0,
06168     1
06169   },
06170   {
06171     predicate_operator,
06172     "",
06173     VOIDmode,
06174     0,
06175     0
06176   },
06177   {
06178     register_operand,
06179     "c",
06180     BImode,
06181     0,
06182     1
06183   },
06184   {
06185     register_operand,
06186     "=r",
06187     DImode,
06188     0,
06189     1
06190   },
06191   {
06192     got_symbolic_operand,
06193     "s",
06194     VOIDmode,
06195     0,
06196     1
06197   },
06198   {
06199     register_operand,
06200     "a",
06201     DImode,
06202     0,
06203     1
06204   },
06205   {
06206     predicate_operator,
06207     "",
06208     VOIDmode,
06209     0,
06210     0
06211   },
06212   {
06213     register_operand,
06214     "c",
06215     BImode,
06216     0,
06217     1
06218   },
06219   {
06220     register_operand,
06221     "=r",
06222     DImode,
06223     0,
06224     1
06225   },
06226   {
06227     register_operand,
06228     "r",
06229     DImode,
06230     0,
06231     1
06232   },
06233   {
06234     got_symbolic_operand,
06235     "s",
06236     VOIDmode,
06237     0,
06238     1
06239   },
06240   {
06241     predicate_operator,
06242     "",
06243     VOIDmode,
06244     0,
06245     0
06246   },
06247   {
06248     register_operand,
06249     "c",
06250     BImode,
06251     0,
06252     1
06253   },
06254   {
06255     register_operand,
06256     "=r",
06257     DImode,
06258     0,
06259     1
06260   },
06261   {
06262     register_operand,
06263     "r",
06264     DImode,
06265     0,
06266     1
06267   },
06268   {
06269     symbolic_operand,
06270     "",
06271     DImode,
06272     0,
06273     1
06274   },
06275   {
06276     predicate_operator,
06277     "",
06278     VOIDmode,
06279     0,
06280     0
06281   },
06282   {
06283     register_operand,
06284     "c",
06285     BImode,
06286     0,
06287     1
06288   },
06289   {
06290     register_operand,
06291     "=r",
06292     DImode,
06293     0,
06294     1
06295   },
06296   {
06297     register_operand,
06298     "a",
06299     DImode,
06300     0,
06301     1
06302   },
06303   {
06304     symbolic_operand,
06305     "",
06306     DImode,
06307     0,
06308     1
06309   },
06310   {
06311     predicate_operator,
06312     "",
06313     VOIDmode,
06314     0,
06315     0
06316   },
06317   {
06318     register_operand,
06319     "c",
06320     BImode,
06321     0,
06322     1
06323   },
06324   {
06325     destination_operand,
06326     "=f,f,Q,*r,f,*r,*r,m",
06327     SFmode,
06328     0,
06329     1
06330   },
06331   {
06332     general_operand,
06333     "fG,Q,fG,fG,*r,*r,m,*r",
06334     SFmode,
06335     0,
06336     1
06337   },
06338   {
06339     predicate_operator,
06340     "",
06341     VOIDmode,
06342     0,
06343     0
06344   },
06345   {
06346     register_operand,
06347     "c,c,c,c,c,c,c,c",
06348     BImode,
06349     0,
06350     1
06351   },
06352   {
06353     destination_operand,
06354     "=f,f,Q,*r,f,*r,*r,m",
06355     DFmode,
06356     0,
06357     1
06358   },
06359   {
06360     general_operand,
06361     "fG,Q,fG,fG,*r,*r,m,*r",
06362     DFmode,
06363     0,
06364     1
06365   },
06366   {
06367     predicate_operator,
06368     "",
06369     VOIDmode,
06370     0,
06371     0
06372   },
06373   {
06374     register_operand,
06375     "c,c,c,c,c,c,c,c",
06376     BImode,
06377     0,
06378     1
06379   },
06380   {
06381     destination_tfmode_operand,
06382     "=f,f,m",
06383     TFmode,
06384     0,
06385     1
06386   },
06387   {
06388     general_tfmode_operand,
06389     "fG,m,fG",
06390     TFmode,
06391     0,
06392     1
06393   },
06394   {
06395     predicate_operator,
06396     "",
06397     VOIDmode,
06398     0,
06399     0
06400   },
06401   {
06402     register_operand,
06403     "c,c,c",
06404     BImode,
06405     0,
06406     1
06407   },
06408   {
06409     gr_register_operand,
06410     "=r",
06411     DImode,
06412     0,
06413     1
06414   },
06415   {
06416     gr_register_operand,
06417     "r",
06418     QImode,
06419     0,
06420     1
06421   },
06422   {
06423     predicate_operator,
06424     "",
06425     VOIDmode,
06426     0,
06427     0
06428   },
06429   {
06430     register_operand,
06431     "c",
06432     BImode,
06433     0,
06434     1
06435   },
06436   {
06437     gr_register_operand,
06438     "=r",
06439     DImode,
06440     0,
06441     1
06442   },
06443   {
06444     gr_register_operand,
06445     "r",
06446     HImode,
06447     0,
06448     1
06449   },
06450   {
06451     predicate_operator,
06452     "",
06453     VOIDmode,
06454     0,
06455     0
06456   },
06457   {
06458     register_operand,
06459     "c",
06460     BImode,
06461     0,
06462     1
06463   },
06464   {
06465     grfr_register_operand,
06466     "=r,?f",
06467     DImode,
06468     0,
06469     1
06470   },
06471   {
06472     grfr_register_operand,
06473     "r,f",
06474     SImode,
06475     0,
06476     1
06477   },
06478   {
06479     predicate_operator,
06480     "",
06481     VOIDmode,
06482     0,
06483     0
06484   },
06485   {
06486     register_operand,
06487     "c,c",
06488     BImode,
06489     0,
06490     1
06491   },
06492   {
06493     gr_register_operand,
06494     "=r,r",
06495     DImode,
06496     0,
06497     1
06498   },
06499   {
06500     gr_nonimmediate_operand,
06501     "r,m",
06502     QImode,
06503     0,
06504     1
06505   },
06506   {
06507     predicate_operator,
06508     "",
06509     VOIDmode,
06510     0,
06511     0
06512   },
06513   {
06514     register_operand,
06515     "c,c",
06516     BImode,
06517     0,
06518     1
06519   },
06520   {
06521     gr_register_operand,
06522     "=r,r",
06523     DImode,
06524     0,
06525     1
06526   },
06527   {
06528     gr_nonimmediate_operand,
06529     "r,m",
06530     HImode,
06531     0,
06532     1
06533   },
06534   {
06535     predicate_operator,
06536     "",
06537     VOIDmode,
06538     0,
06539     0
06540   },
06541   {
06542     register_operand,
06543     "c,c",
06544     BImode,
06545     0,
06546     1
06547   },
06548   {
06549     grfr_register_operand,
06550     "=r,r,?f",
06551     DImode,
06552     0,
06553     1
06554   },
06555   {
06556     grfr_nonimmediate_operand,
06557     "r,m,f",
06558     SImode,
06559     0,
06560     1
06561   },
06562   {
06563     predicate_operator,
06564     "",
06565     VOIDmode,
06566     0,
06567     0
06568   },
06569   {
06570     register_operand,
06571     "c,c,c",
06572     BImode,
06573     0,
06574     1
06575   },
06576   {
06577     fr_register_operand,
06578     "=f",
06579     DFmode,
06580     0,
06581     1
06582   },
06583   {
06584     fr_register_operand,
06585     "f",
06586     SFmode,
06587     0,
06588     1
06589   },
06590   {
06591     predicate_operator,
06592     "",
06593     VOIDmode,
06594     0,
06595     0
06596   },
06597   {
06598     register_operand,
06599     "c",
06600     BImode,
06601     0,
06602     1
06603   },
06604   {
06605     fr_register_operand,
06606     "=f",
06607     TFmode,
06608     0,
06609     1
06610   },
06611   {
06612     fr_register_operand,
06613     "f",
06614     SFmode,
06615     0,
06616     1
06617   },
06618   {
06619     predicate_operator,
06620     "",
06621     VOIDmode,
06622     0,
06623     0
06624   },
06625   {
06626     register_operand,
06627     "c",
06628     BImode,
06629     0,
06630     1
06631   },
06632   {
06633     fr_register_operand,
06634     "=f",
06635     TFmode,
06636     0,
06637     1
06638   },
06639   {
06640     fr_register_operand,
06641     "f",
06642     DFmode,
06643     0,
06644     1
06645   },
06646   {
06647     predicate_operator,
06648     "",
06649     VOIDmode,
06650     0,
06651     0
06652   },
06653   {
06654     register_operand,
06655     "c",
06656     BImode,
06657     0,
06658     1
06659   },
06660   {
06661     fr_register_operand,
06662     "=f",
06663     SFmode,
06664     0,
06665     1
06666   },
06667   {
06668     fr_register_operand,
06669     "f",
06670     DFmode,
06671     0,
06672     1
06673   },
06674   {
06675     predicate_operator,
06676     "",
06677     VOIDmode,
06678     0,
06679     0
06680   },
06681   {
06682     register_operand,
06683     "c",
06684     BImode,
06685     0,
06686     1
06687   },
06688   {
06689     fr_register_operand,
06690     "=f",
06691     SFmode,
06692     0,
06693     1
06694   },
06695   {
06696     fr_register_operand,
06697     "f",
06698     TFmode,
06699     0,
06700     1
06701   },
06702   {
06703     predicate_operator,
06704     "",
06705     VOIDmode,
06706     0,
06707     0
06708   },
06709   {
06710     register_operand,
06711     "c",
06712     BImode,
06713     0,
06714     1
06715   },
06716   {
06717     fr_register_operand,
06718     "=f",
06719     DFmode,
06720     0,
06721     1
06722   },
06723   {
06724     fr_register_operand,
06725     "f",
06726     TFmode,
06727     0,
06728     1
06729   },
06730   {
06731     predicate_operator,
06732     "",
06733     VOIDmode,
06734     0,
06735     0
06736   },
06737   {
06738     register_operand,
06739     "c",
06740     BImode,
06741     0,
06742     1
06743   },
06744   {
06745     fr_register_operand,
06746     "=f",
06747     TFmode,
06748     0,
06749     1
06750   },
06751   {
06752     fr_register_operand,
06753     "f",
06754     DImode,
06755     0,
06756     1
06757   },
06758   {
06759     predicate_operator,
06760     "",
06761     VOIDmode,
06762     0,
06763     0
06764   },
06765   {
06766     register_operand,
06767     "c",
06768     BImode,
06769     0,
06770     1
06771   },
06772   {
06773     fr_register_operand,
06774     "=f",
06775     DImode,
06776     0,
06777     1
06778   },
06779   {
06780     fr_register_operand,
06781     "f",
06782     SFmode,
06783     0,
06784     1
06785   },
06786   {
06787     predicate_operator,
06788     "",
06789     VOIDmode,
06790     0,
06791     0
06792   },
06793   {
06794     register_operand,
06795     "c",
06796     BImode,
06797     0,
06798     1
06799   },
06800   {
06801     fr_register_operand,
06802     "=f",
06803     DImode,
06804     0,
06805     1
06806   },
06807   {
06808     fr_register_operand,
06809     "f",
06810     DFmode,
06811     0,
06812     1
06813   },
06814   {
06815     predicate_operator,
06816     "",
06817     VOIDmode,
06818     0,
06819     0
06820   },
06821   {
06822     register_operand,
06823     "c",
06824     BImode,
06825     0,
06826     1
06827   },
06828   {
06829     fr_register_operand,
06830     "=f",
06831     DImode,
06832     0,
06833     1
06834   },
06835   {
06836     fr_register_operand,
06837     "f",
06838     TFmode,
06839     0,
06840     1
06841   },
06842   {
06843     predicate_operator,
06844     "",
06845     VOIDmode,
06846     0,
06847     0
06848   },
06849   {
06850     register_operand,
06851     "c",
06852     BImode,
06853     0,
06854     1
06855   },
06856   {
06857     fr_register_operand,
06858     "=f",
06859     DImode,
06860     0,
06861     1
06862   },
06863   {
06864     fr_register_operand,
06865     "f",
06866     TFmode,
06867     0,
06868     1
06869   },
06870   {
06871     const_int_operand,
06872     "",
06873     SImode,
06874     0,
06875     1
06876   },
06877   {
06878     predicate_operator,
06879     "",
06880     VOIDmode,
06881     0,
06882     0
06883   },
06884   {
06885     register_operand,
06886     "c",
06887     BImode,
06888     0,
06889     1
06890   },
06891   {
06892     fr_register_operand,
06893     "=f",
06894     SFmode,
06895     0,
06896     1
06897   },
06898   {
06899     fr_register_operand,
06900     "f",
06901     DImode,
06902     0,
06903     1
06904   },
06905   {
06906     predicate_operator,
06907     "",
06908     VOIDmode,
06909     0,
06910     0
06911   },
06912   {
06913     register_operand,
06914     "c",
06915     BImode,
06916     0,
06917     1
06918   },
06919   {
06920     fr_register_operand,
06921     "=f",
06922     DFmode,
06923     0,
06924     1
06925   },
06926   {
06927     fr_register_operand,
06928     "f",
06929     DImode,
06930     0,
06931     1
06932   },
06933   {
06934     predicate_operator,
06935     "",
06936     VOIDmode,
06937     0,
06938     0
06939   },
06940   {
06941     register_operand,
06942     "c",
06943     BImode,
06944     0,
06945     1
06946   },
06947   {
06948     gr_register_operand,
06949     "=r",
06950     DImode,
06951     0,
06952     1
06953   },
06954   {
06955     gr_register_operand,
06956     "r",
06957     DImode,
06958     0,
06959     1
06960   },
06961   {
06962     const_int_operand,
06963     "n",
06964     DImode,
06965     0,
06966     1
06967   },
06968   {
06969     const_int_operand,
06970     "n",
06971     DImode,
06972     0,
06973     1
06974   },
06975   {
06976     predicate_operator,
06977     "",
06978     VOIDmode,
06979     0,
06980     0
06981   },
06982   {
06983     register_operand,
06984     "c",
06985     BImode,
06986     0,
06987     1
06988   },
06989   {
06990     gr_register_operand,
06991     "+r",
06992     DImode,
06993     0,
06994     1
06995   },
06996   {
06997     const_int_operand,
06998     "n",
06999     DImode,
07000     0,
07001     1
07002   },
07003   {
07004     const_int_operand,
07005     "n",
07006     DImode,
07007     0,
07008     1
07009   },
07010   {
07011     nonmemory_operand,
07012     "rP",
07013     DImode,
07014     0,
07015     1
07016   },
07017   {
07018     predicate_operator,
07019     "",
07020     VOIDmode,
07021     0,
07022     0
07023   },
07024   {
07025     register_operand,
07026     "c",
07027     BImode,
07028     0,
07029     1
07030   },
07031   {
07032     gr_register_operand,
07033     "+r",
07034     DImode,
07035     0,
07036     1
07037   },
07038   {
07039     gr_register_operand,
07040     "r",
07041     DImode,
07042     0,
07043     1
07044   },
07045   {
07046     gr_register_operand,
07047     "=r",
07048     DImode,
07049     0,
07050     1
07051   },
07052   {
07053     predicate_operator,
07054     "",
07055     VOIDmode,
07056     0,
07057     0
07058   },
07059   {
07060     register_operand,
07061     "c",
07062     BImode,
07063     0,
07064     1
07065   },
07066   {
07067     gr_register_operand,
07068     "+r",
07069     DImode,
07070     0,
07071     1
07072   },
07073   {
07074     gr_register_operand,
07075     "r",
07076     DImode,
07077     0,
07078     1
07079   },
07080   {
07081     predicate_operator,
07082     "",
07083     VOIDmode,
07084     0,
07085     0
07086   },
07087   {
07088     register_operand,
07089     "c",
07090     BImode,
07091     0,
07092     1
07093   },
07094   {
07095     gr_register_operand,
07096     "+r",
07097     DImode,
07098     0,
07099     1
07100   },
07101   {
07102     gr_reg_or_0_operand,
07103     "rO",
07104     DImode,
07105     0,
07106     1
07107   },
07108   {
07109     predicate_operator,
07110     "",
07111     VOIDmode,
07112     0,
07113     0
07114   },
07115   {
07116     register_operand,
07117     "c",
07118     BImode,
07119     0,
07120     1
07121   },
07122   {
07123     gr_register_operand,
07124     "=r",
07125     DImode,
07126     0,
07127     1
07128   },
07129   {
07130     gr_register_operand,
07131     "r",
07132     SImode,
07133     0,
07134     1
07135   },
07136   {
07137     gr_register_operand,
07138     "r",
07139     SImode,
07140     0,
07141     1
07142   },
07143   {
07144     predicate_operator,
07145     "",
07146     VOIDmode,
07147     0,
07148     0
07149   },
07150   {
07151     register_operand,
07152     "c",
07153     BImode,
07154     0,
07155     1
07156   },
07157   {
07158     register_operand,
07159     "=c,c,r",
07160     BImode,
07161     0,
07162     1
07163   },
07164   {
07165     register_operand,
07166     "%0,0,r",
07167     BImode,
07168     0,
07169     1
07170   },
07171   {
07172     register_operand,
07173     "c,r,r",
07174     BImode,
07175     0,
07176     1
07177   },
07178   {
07179     predicate_operator,
07180     "",
07181     VOIDmode,
07182     0,
07183     0
07184   },
07185   {
07186     register_operand,
07187     "c,c,c",
07188     BImode,
07189     0,
07190     1
07191   },
07192   {
07193     register_operand,
07194     "=c,c,r",
07195     BImode,
07196     0,
07197     1
07198   },
07199   {
07200     register_operand,
07201     "c,r,r",
07202     BImode,
07203     0,
07204     1
07205   },
07206   {
07207     register_operand,
07208     "0,0,r",
07209     BImode,
07210     0,
07211     1
07212   },
07213   {
07214     predicate_operator,
07215     "",
07216     VOIDmode,
07217     0,
07218     0
07219   },
07220   {
07221     register_operand,
07222     "c,c,c",
07223     BImode,
07224     0,
07225     1
07226   },
07227   {
07228     register_operand,
07229     "=c,c",
07230     BImode,
07231     0,
07232     1
07233   },
07234   {
07235     register_operand,
07236     "c,r",
07237     BImode,
07238     0,
07239     1
07240   },
07241   {
07242     register_operand,
07243     "0,0",
07244     BImode,
07245     0,
07246     1
07247   },
07248   {
07249     predicate_operator,
07250     "",
07251     VOIDmode,
07252     0,
07253     0
07254   },
07255   {
07256     register_operand,
07257     "c,c",
07258     BImode,
07259     0,
07260     1
07261   },
07262   {
07263     register_operand,
07264     "=c,r,c,&c",
07265     BImode,
07266     0,
07267     1
07268   },
07269   {
07270     register_operand,
07271     "r,r,0,c",
07272     BImode,
07273     0,
07274     1
07275   },
07276   {
07277     scratch_operand,
07278     "=X,X,c,X",
07279     BImode,
07280     0,
07281     0
07282   },
07283   {
07284     predicate_operator,
07285     "",
07286     VOIDmode,
07287     0,
07288     0
07289   },
07290   {
07291     register_operand,
07292     "c,c,c,c",
07293     BImode,
07294     0,
07295     1
07296   },
07297   {
07298     register_operand,
07299     "=c",
07300     BImode,
07301     0,
07302     1
07303   },
07304   {
07305     register_operand,
07306     "0",
07307     BImode,
07308     0,
07309     1
07310   },
07311   {
07312     gr_reg_or_0_operand,
07313     "rO",
07314     SImode,
07315     0,
07316     1
07317   },
07318   {
07319     gr_reg_or_8bit_operand,
07320     "rK",
07321     SImode,
07322     0,
07323     1
07324   },
07325   {
07326     predicate_operator,
07327     "",
07328     BImode,
07329     0,
07330     0
07331   },
07332   {
07333     predicate_operator,
07334     "",
07335     VOIDmode,
07336     0,
07337     0
07338   },
07339   {
07340     register_operand,
07341     "c",
07342     BImode,
07343     0,
07344     1
07345   },
07346   {
07347     register_operand,
07348     "=c",
07349     BImode,
07350     0,
07351     1
07352   },
07353   {
07354     register_operand,
07355     "0",
07356     BImode,
07357     0,
07358     1
07359   },
07360   {
07361     gr_register_operand,
07362     "r",
07363     SImode,
07364     0,
07365     1
07366   },
07367   {
07368     signed_inequality_operator,
07369     "",
07370     BImode,
07371     0,
07372     0
07373   },
07374   {
07375     predicate_operator,
07376     "",
07377     VOIDmode,
07378     0,
07379     0
07380   },
07381   {
07382     register_operand,
07383     "c",
07384     BImode,
07385     0,
07386     1
07387   },
07388   {
07389     register_operand,
07390     "=c",
07391     BImode,
07392     0,
07393     1
07394   },
07395   {
07396     register_operand,
07397     "0",
07398     BImode,
07399     0,
07400     1
07401   },
07402   {
07403     gr_register_operand,
07404     "r",
07405     DImode,
07406     0,
07407     1
07408   },
07409   {
07410     gr_reg_or_8bit_operand,
07411     "rK",
07412     DImode,
07413     0,
07414     1
07415   },
07416   {
07417     predicate_operator,
07418     "",
07419     BImode,
07420     0,
07421     0
07422   },
07423   {
07424     predicate_operator,
07425     "",
07426     VOIDmode,
07427     0,
07428     0
07429   },
07430   {
07431     register_operand,
07432     "c",
07433     BImode,
07434     0,
07435     1
07436   },
07437   {
07438     register_operand,
07439     "=c",
07440     BImode,
07441     0,
07442     1
07443   },
07444   {
07445     register_operand,
07446     "0",
07447     BImode,
07448     0,
07449     1
07450   },
07451   {
07452     gr_register_operand,
07453     "r",
07454     DImode,
07455     0,
07456     1
07457   },
07458   {
07459     signed_inequality_operator,
07460     "",
07461     BImode,
07462     0,
07463     0
07464   },
07465   {
07466     predicate_operator,
07467     "",
07468     VOIDmode,
07469     0,
07470     0
07471   },
07472   {
07473     register_operand,
07474     "c",
07475     BImode,
07476     0,
07477     1
07478   },
07479   {
07480     register_operand,
07481     "=c",
07482     BImode,
07483     0,
07484     1
07485   },
07486   {
07487     gr_register_operand,
07488     "r",
07489     DImode,
07490     0,
07491     1
07492   },
07493   {
07494     register_operand,
07495     "0",
07496     BImode,
07497     0,
07498     1
07499   },
07500   {
07501     predicate_operator,
07502     "",
07503     VOIDmode,
07504     0,
07505     0
07506   },
07507   {
07508     register_operand,
07509     "c",
07510     BImode,
07511     0,
07512     1
07513   },
07514   {
07515     register_operand,
07516     "=c",
07517     BImode,
07518     0,
07519     1
07520   },
07521   {
07522     gr_register_operand,
07523     "r",
07524     DImode,
07525     0,
07526     1
07527   },
07528   {
07529     const_int_operand,
07530     "n",
07531     DImode,
07532     0,
07533     1
07534   },
07535   {
07536     register_operand,
07537     "0",
07538     BImode,
07539     0,
07540     1
07541   },
07542   {
07543     predicate_operator,
07544     "",
07545     VOIDmode,
07546     0,
07547     0
07548   },
07549   {
07550     register_operand,
07551     "c",
07552     BImode,
07553     0,
07554     1
07555   },
07556   {
07557     gr_register_operand,
07558     "=r",
07559     HImode,
07560     0,
07561     1
07562   },
07563   {
07564     gr_register_operand,
07565     "r",
07566     HImode,
07567     0,
07568     1
07569   },
07570   {
07571     gr_register_operand,
07572     "r",
07573     HImode,
07574     0,
07575     1
07576   },
07577   {
07578     predicate_operator,
07579     "",
07580     VOIDmode,
07581     0,
07582     0
07583   },
07584   {
07585     register_operand,
07586     "c",
07587     BImode,
07588     0,
07589     1
07590   },
07591   {
07592     gr_register_operand,
07593     "=r,r,r",
07594     SImode,
07595     0,
07596     1
07597   },
07598   {
07599     gr_register_operand,
07600     "%r,r,a",
07601     SImode,
07602     0,
07603     1
07604   },
07605   {
07606     gr_reg_or_22bit_operand,
07607     "r,I,J",
07608     SImode,
07609     0,
07610     1
07611   },
07612   {
07613     predicate_operator,
07614     "",
07615     VOIDmode,
07616     0,
07617     0
07618   },
07619   {
07620     register_operand,
07621     "c,c,c",
07622     BImode,
07623     0,
07624     1
07625   },
07626   {
07627     gr_register_operand,
07628     "=r",
07629     SImode,
07630     0,
07631     1
07632   },
07633   {
07634     gr_register_operand,
07635     "r",
07636     SImode,
07637     0,
07638     1
07639   },
07640   {
07641     gr_register_operand,
07642     "r",
07643     SImode,
07644     0,
07645     1
07646   },
07647   {
07648     predicate_operator,
07649     "",
07650     VOIDmode,
07651     0,
07652     0
07653   },
07654   {
07655     register_operand,
07656     "c",
07657     BImode,
07658     0,
07659     1
07660   },
07661   {
07662     gr_register_operand,
07663     "=r",
07664     SImode,
07665     0,
07666     1
07667   },
07668   {
07669     gr_register_operand,
07670     "r",
07671     SImode,
07672     0,
07673     1
07674   },
07675   {
07676     predicate_operator,
07677     "",
07678     VOIDmode,
07679     0,
07680     0
07681   },
07682   {
07683     register_operand,
07684     "c",
07685     BImode,
07686     0,
07687     1
07688   },
07689   {
07690     gr_register_operand,
07691     "=r",
07692     SImode,
07693     0,
07694     1
07695   },
07696   {
07697     gr_register_operand,
07698     "r",
07699     SImode,
07700     0,
07701     1
07702   },
07703   {
07704     shladd_operand,
07705     "n",
07706     SImode,
07707     0,
07708     1
07709   },
07710   {
07711     gr_register_operand,
07712     "r",
07713     SImode,
07714     0,
07715     1
07716   },
07717   {
07718     predicate_operator,
07719     "",
07720     VOIDmode,
07721     0,
07722     0
07723   },
07724   {
07725     register_operand,
07726     "c",
07727     BImode,
07728     0,
07729     1
07730   },
07731   {
07732     gr_register_operand,
07733     "=r",
07734     SImode,
07735     0,
07736     1
07737   },
07738   {
07739     gr_reg_or_8bit_operand,
07740     "rK",
07741     SImode,
07742     0,
07743     1
07744   },
07745   {
07746     gr_register_operand,
07747     "r",
07748     SImode,
07749     0,
07750     1
07751   },
07752   {
07753     predicate_operator,
07754     "",
07755     VOIDmode,
07756     0,
07757     0
07758   },
07759   {
07760     register_operand,
07761     "c",
07762     BImode,
07763     0,
07764     1
07765   },
07766   {
07767     fr_register_operand,
07768     "=f",
07769     SImode,
07770     0,
07771     1
07772   },
07773   {
07774     grfr_register_operand,
07775     "f",
07776     SImode,
07777     0,
07778     1
07779   },
07780   {
07781     grfr_register_operand,
07782     "f",
07783     SImode,
07784     0,
07785     1
07786   },
07787   {
07788     predicate_operator,
07789     "",
07790     VOIDmode,
07791     0,
07792     0
07793   },
07794   {
07795     register_operand,
07796     "c",
07797     BImode,
07798     0,
07799     1
07800   },
07801   {
07802     fr_register_operand,
07803     "=f",
07804     SImode,
07805     0,
07806     1
07807   },
07808   {
07809     grfr_register_operand,
07810     "f",
07811     SImode,
07812     0,
07813     1
07814   },
07815   {
07816     grfr_register_operand,
07817     "f",
07818     SImode,
07819     0,
07820     1
07821   },
07822   {
07823     grfr_register_operand,
07824     "f",
07825     SImode,
07826     0,
07827     1
07828   },
07829   {
07830     predicate_operator,
07831     "",
07832     VOIDmode,
07833     0,
07834     0
07835   },
07836   {
07837     register_operand,
07838     "c",
07839     BImode,
07840     0,
07841     1
07842   },
07843   {
07844     gr_register_operand,
07845     "=r,r,r",
07846     DImode,
07847     0,
07848     1
07849   },
07850   {
07851     gr_register_operand,
07852     "%r,r,a",
07853     DImode,
07854     0,
07855     1
07856   },
07857   {
07858     gr_reg_or_22bit_operand,
07859     "r,I,J",
07860     DImode,
07861     0,
07862     1
07863   },
07864   {
07865     predicate_operator,
07866     "",
07867     VOIDmode,
07868     0,
07869     0
07870   },
07871   {
07872     register_operand,
07873     "c,c,c",
07874     BImode,
07875     0,
07876     1
07877   },
07878   {
07879     gr_register_operand,
07880     "=r",
07881     DImode,
07882     0,
07883     1
07884   },
07885   {
07886     gr_register_operand,
07887     "r",
07888     DImode,
07889     0,
07890     1
07891   },
07892   {
07893     gr_register_operand,
07894     "r",
07895     DImode,
07896     0,
07897     1
07898   },
07899   {
07900     predicate_operator,
07901     "",
07902     VOIDmode,
07903     0,
07904     0
07905   },
07906   {
07907     register_operand,
07908     "c",
07909     BImode,
07910     0,
07911     1
07912   },
07913   {
07914     gr_register_operand,
07915     "=r",
07916     DImode,
07917     0,
07918     1
07919   },
07920   {
07921     gr_register_operand,
07922     "r",
07923     DImode,
07924     0,
07925     1
07926   },
07927   {
07928     predicate_operator,
07929     "",
07930     VOIDmode,
07931     0,
07932     0
07933   },
07934   {
07935     register_operand,
07936     "c",
07937     BImode,
07938     0,
07939     1
07940   },
07941   {
07942     gr_register_operand,
07943     "=r",
07944     DImode,
07945     0,
07946     1
07947   },
07948   {
07949     gr_reg_or_8bit_operand,
07950     "rK",
07951     DImode,
07952     0,
07953     1
07954   },
07955   {
07956     gr_register_operand,
07957     "r",
07958     DImode,
07959     0,
07960     1
07961   },
07962   {
07963     predicate_operator,
07964     "",
07965     VOIDmode,
07966     0,
07967     0
07968   },
07969   {
07970     register_operand,
07971     "c",
07972     BImode,
07973     0,
07974     1
07975   },
07976   {
07977     fr_register_operand,
07978     "=f",
07979     DImode,
07980     0,
07981     1
07982   },
07983   {
07984     grfr_register_operand,
07985     "f",
07986     DImode,
07987     0,
07988     1
07989   },
07990   {
07991     grfr_register_operand,
07992     "f",
07993     DImode,
07994     0,
07995     1
07996   },
07997   {
07998     predicate_operator,
07999     "",
08000     VOIDmode,
08001     0,
08002     0
08003   },
08004   {
08005     register_operand,
08006     "c",
08007     BImode,
08008     0,
08009     1
08010   },
08011   {
08012     fr_register_operand,
08013     "=f",
08014     DImode,
08015     0,
08016     1
08017   },
08018   {
08019     grfr_register_operand,
08020     "f",
08021     DImode,
08022     0,
08023     1
08024   },
08025   {
08026     grfr_register_operand,
08027     "f",
08028     DImode,
08029     0,
08030     1
08031   },
08032   {
08033     grfr_register_operand,
08034     "f",
08035     DImode,
08036     0,
08037     1
08038   },
08039   {
08040     scratch_operand,
08041     "=X",
08042     DImode,
08043     0,
08044     0
08045   },
08046   {
08047     predicate_operator,
08048     "",
08049     VOIDmode,
08050     0,
08051     0
08052   },
08053   {
08054     register_operand,
08055     "c",
08056     BImode,
08057     0,
08058     1
08059   },
08060   {
08061     register_operand,
08062     "=&r",
08063     DImode,
08064     0,
08065     1
08066   },
08067   {
08068     register_operand,
08069     "f",
08070     DImode,
08071     0,
08072     1
08073   },
08074   {
08075     register_operand,
08076     "f",
08077     DImode,
08078     0,
08079     1
08080   },
08081   {
08082     register_operand,
08083     "f",
08084     DImode,
08085     0,
08086     1
08087   },
08088   {
08089     nonmemory_operand,
08090     "rI",
08091     DImode,
08092     0,
08093     1
08094   },
08095   {
08096     scratch_operand,
08097     "=f",
08098     DImode,
08099     0,
08100     0
08101   },
08102   {
08103     predicate_operator,
08104     "",
08105     VOIDmode,
08106     0,
08107     0
08108   },
08109   {
08110     register_operand,
08111     "c",
08112     BImode,
08113     0,
08114     1
08115   },
08116   {
08117     fr_register_operand,
08118     "=f",
08119     DImode,
08120     0,
08121     1
08122   },
08123   {
08124     fr_register_operand,
08125     "f",
08126     DImode,
08127     0,
08128     1
08129   },
08130   {
08131     fr_register_operand,
08132     "f",
08133     DImode,
08134     0,
08135     1
08136   },
08137   {
08138     predicate_operator,
08139     "",
08140     VOIDmode,
08141     0,
08142     0
08143   },
08144   {
08145     register_operand,
08146     "c",
08147     BImode,
08148     0,
08149     1
08150   },
08151   {
08152     fr_register_operand,
08153     "=f",
08154     SFmode,
08155     0,
08156     1
08157   },
08158   {
08159     fr_register_operand,
08160     "%f",
08161     SFmode,
08162     0,
08163     1
08164   },
08165   {
08166     fr_reg_or_fp01_operand,
08167     "fG",
08168     SFmode,
08169     0,
08170     1
08171   },
08172   {
08173     predicate_operator,
08174     "",
08175     VOIDmode,
08176     0,
08177     0
08178   },
08179   {
08180     register_operand,
08181     "c",
08182     BImode,
08183     0,
08184     1
08185   },
08186   {
08187     fr_register_operand,
08188     "=f",
08189     SFmode,
08190     0,
08191     1
08192   },
08193   {
08194     fr_reg_or_fp01_operand,
08195     "fG",
08196     SFmode,
08197     0,
08198     1
08199   },
08200   {
08201     fr_reg_or_fp01_operand,
08202     "fG",
08203     SFmode,
08204     0,
08205     1
08206   },
08207   {
08208     predicate_operator,
08209     "",
08210     VOIDmode,
08211     0,
08212     0
08213   },
08214   {
08215     register_operand,
08216     "c",
08217     BImode,
08218     0,
08219     1
08220   },
08221   {
08222     fr_register_operand,
08223     "=f",
08224     SFmode,
08225     0,
08226     1
08227   },
08228   {
08229     fr_register_operand,
08230     "%f",
08231     SFmode,
08232     0,
08233     1
08234   },
08235   {
08236     fr_register_operand,
08237     "f",
08238     SFmode,
08239     0,
08240     1
08241   },
08242   {
08243     predicate_operator,
08244     "",
08245     VOIDmode,
08246     0,
08247     0
08248   },
08249   {
08250     register_operand,
08251     "c",
08252     BImode,
08253     0,
08254     1
08255   },
08256   {
08257     fr_register_operand,
08258     "=f",
08259     SFmode,
08260     0,
08261     1
08262   },
08263   {
08264     fr_register_operand,
08265     "f",
08266     SFmode,
08267     0,
08268     1
08269   },
08270   {
08271     predicate_operator,
08272     "",
08273     VOIDmode,
08274     0,
08275     0
08276   },
08277   {
08278     register_operand,
08279     "c",
08280     BImode,
08281     0,
08282     1
08283   },
08284   {
08285     fr_register_operand,
08286     "=f",
08287     SFmode,
08288     0,
08289     1
08290   },
08291   {
08292     fr_register_operand,
08293     "f",
08294     SFmode,
08295     0,
08296     1
08297   },
08298   {
08299     fr_reg_or_fp01_operand,
08300     "fG",
08301     SFmode,
08302     0,
08303     1
08304   },
08305   {
08306     predicate_operator,
08307     "",
08308     VOIDmode,
08309     0,
08310     0
08311   },
08312   {
08313     register_operand,
08314     "c",
08315     BImode,
08316     0,
08317     1
08318   },
08319   {
08320     fr_register_operand,
08321     "=f",
08322     SFmode,
08323     0,
08324     1
08325   },
08326   {
08327     fr_register_operand,
08328     "f",
08329     SFmode,
08330     0,
08331     1
08332   },
08333   {
08334     fr_register_operand,
08335     "f",
08336     SFmode,
08337     0,
08338     1
08339   },
08340   {
08341     fr_reg_or_fp01_operand,
08342     "fG",
08343     SFmode,
08344     0,
08345     1
08346   },
08347   {
08348     predicate_operator,
08349     "",
08350     VOIDmode,
08351     0,
08352     0
08353   },
08354   {
08355     register_operand,
08356     "c",
08357     BImode,
08358     0,
08359     1
08360   },
08361   {
08362     fr_register_operand,
08363     "=f",
08364     SFmode,
08365     0,
08366     1
08367   },
08368   {
08369     fr_register_operand,
08370     "f",
08371     SFmode,
08372     0,
08373     1
08374   },
08375   {
08376     fr_register_operand,
08377     "f",
08378     SFmode,
08379     0,
08380     1
08381   },
08382   {
08383     predicate_operator,
08384     "",
08385     VOIDmode,
08386     0,
08387     0
08388   },
08389   {
08390     register_operand,
08391     "c",
08392     BImode,
08393     0,
08394     1
08395   },
08396   {
08397     fr_register_operand,
08398     "=f",
08399     DFmode,
08400     0,
08401     1
08402   },
08403   {
08404     fr_register_operand,
08405     "%f",
08406     DFmode,
08407     0,
08408     1
08409   },
08410   {
08411     fr_reg_or_fp01_operand,
08412     "fG",
08413     DFmode,
08414     0,
08415     1
08416   },
08417   {
08418     predicate_operator,
08419     "",
08420     VOIDmode,
08421     0,
08422     0
08423   },
08424   {
08425     register_operand,
08426     "c",
08427     BImode,
08428     0,
08429     1
08430   },
08431   {
08432     fr_register_operand,
08433     "=f",
08434     SFmode,
08435     0,
08436     1
08437   },
08438   {
08439     fr_register_operand,
08440     "%f",
08441     DFmode,
08442     0,
08443     1
08444   },
08445   {
08446     fr_reg_or_fp01_operand,
08447     "fG",
08448     DFmode,
08449     0,
08450     1
08451   },
08452   {
08453     predicate_operator,
08454     "",
08455     VOIDmode,
08456     0,
08457     0
08458   },
08459   {
08460     register_operand,
08461     "c",
08462     BImode,
08463     0,
08464     1
08465   },
08466   {
08467     fr_register_operand,
08468     "=f",
08469     DFmode,
08470     0,
08471     1
08472   },
08473   {
08474     fr_reg_or_fp01_operand,
08475     "fG",
08476     DFmode,
08477     0,
08478     1
08479   },
08480   {
08481     fr_reg_or_fp01_operand,
08482     "fG",
08483     DFmode,
08484     0,
08485     1
08486   },
08487   {
08488     predicate_operator,
08489     "",
08490     VOIDmode,
08491     0,
08492     0
08493   },
08494   {
08495     register_operand,
08496     "c",
08497     BImode,
08498     0,
08499     1
08500   },
08501   {
08502     fr_register_operand,
08503     "=f",
08504     SFmode,
08505     0,
08506     1
08507   },
08508   {
08509     fr_reg_or_fp01_operand,
08510     "fG",
08511     DFmode,
08512     0,
08513     1
08514   },
08515   {
08516     fr_reg_or_fp01_operand,
08517     "fG",
08518     DFmode,
08519     0,
08520     1
08521   },
08522   {
08523     predicate_operator,
08524     "",
08525     VOIDmode,
08526     0,
08527     0
08528   },
08529   {
08530     register_operand,
08531     "c",
08532     BImode,
08533     0,
08534     1
08535   },
08536   {
08537     fr_register_operand,
08538     "=f",
08539     DFmode,
08540     0,
08541     1
08542   },
08543   {
08544     fr_register_operand,
08545     "f",
08546     DFmode,
08547     0,
08548     1
08549   },
08550   {
08551     fr_register_operand,
08552     "f",
08553     DFmode,
08554     0,
08555     1
08556   },
08557   {
08558     predicate_operator,
08559     "",
08560     VOIDmode,
08561     0,
08562     0
08563   },
08564   {
08565     register_operand,
08566     "c",
08567     BImode,
08568     0,
08569     1
08570   },
08571   {
08572     fr_register_operand,
08573     "=f",
08574     SFmode,
08575     0,
08576     1
08577   },
08578   {
08579     fr_register_operand,
08580     "f",
08581     DFmode,
08582     0,
08583     1
08584   },
08585   {
08586     fr_register_operand,
08587     "f",
08588     DFmode,
08589     0,
08590     1
08591   },
08592   {
08593     predicate_operator,
08594     "",
08595     VOIDmode,
08596     0,
08597     0
08598   },
08599   {
08600     register_operand,
08601     "c",
08602     BImode,
08603     0,
08604     1
08605   },
08606   {
08607     fr_register_operand,
08608     "=f",
08609     DFmode,
08610     0,
08611     1
08612   },
08613   {
08614     fr_register_operand,
08615     "f",
08616     DFmode,
08617     0,
08618     1
08619   },
08620   {
08621     predicate_operator,
08622     "",
08623     VOIDmode,
08624     0,
08625     0
08626   },
08627   {
08628     register_operand,
08629     "c",
08630     BImode,
08631     0,
08632     1
08633   },
08634   {
08635     fr_register_operand,
08636     "=f",
08637     DFmode,
08638     0,
08639     1
08640   },
08641   {
08642     fr_register_operand,
08643     "f",
08644     DFmode,
08645     0,
08646     1
08647   },
08648   {
08649     fr_reg_or_fp01_operand,
08650     "fG",
08651     DFmode,
08652     0,
08653     1
08654   },
08655   {
08656     predicate_operator,
08657     "",
08658     VOIDmode,
08659     0,
08660     0
08661   },
08662   {
08663     register_operand,
08664     "c",
08665     BImode,
08666     0,
08667     1
08668   },
08669   {
08670     fr_register_operand,
08671     "=f",
08672     DFmode,
08673     0,
08674     1
08675   },
08676   {
08677     fr_register_operand,
08678     "f",
08679     DFmode,
08680     0,
08681     1
08682   },
08683   {
08684     fr_register_operand,
08685     "f",
08686     DFmode,
08687     0,
08688     1
08689   },
08690   {
08691     fr_reg_or_fp01_operand,
08692     "fG",
08693     DFmode,
08694     0,
08695     1
08696   },
08697   {
08698     predicate_operator,
08699     "",
08700     VOIDmode,
08701     0,
08702     0
08703   },
08704   {
08705     register_operand,
08706     "c",
08707     BImode,
08708     0,
08709     1
08710   },
08711   {
08712     fr_register_operand,
08713     "=f",
08714     SFmode,
08715     0,
08716     1
08717   },
08718   {
08719     fr_register_operand,
08720     "f",
08721     DFmode,
08722     0,
08723     1
08724   },
08725   {
08726     fr_register_operand,
08727     "f",
08728     DFmode,
08729     0,
08730     1
08731   },
08732   {
08733     fr_reg_or_fp01_operand,
08734     "fG",
08735     DFmode,
08736     0,
08737     1
08738   },
08739   {
08740     predicate_operator,
08741     "",
08742     VOIDmode,
08743     0,
08744     0
08745   },
08746   {
08747     register_operand,
08748     "c",
08749     BImode,
08750     0,
08751     1
08752   },
08753   {
08754     fr_register_operand,
08755     "=f",
08756     DFmode,
08757     0,
08758     1
08759   },
08760   {
08761     fr_register_operand,
08762     "f",
08763     DFmode,
08764     0,
08765     1
08766   },
08767   {
08768     fr_register_operand,
08769     "f",
08770     DFmode,
08771     0,
08772     1
08773   },
08774   {
08775     fr_reg_or_fp01_operand,
08776     "fG",
08777     DFmode,
08778     0,
08779     1
08780   },
08781   {
08782     const_int_operand,
08783     "",
08784     SImode,
08785     0,
08786     1
08787   },
08788   {
08789     predicate_operator,
08790     "",
08791     VOIDmode,
08792     0,
08793     0
08794   },
08795   {
08796     register_operand,
08797     "c",
08798     BImode,
08799     0,
08800     1
08801   },
08802   {
08803     fr_register_operand,
08804     "=f",
08805     TFmode,
08806     0,
08807     1
08808   },
08809   {
08810     tfreg_or_fp01_operand,
08811     "fG",
08812     TFmode,
08813     0,
08814     1
08815   },
08816   {
08817     tfreg_or_fp01_operand,
08818     "fG",
08819     TFmode,
08820     0,
08821     1
08822   },
08823   {
08824     predicate_operator,
08825     "",
08826     VOIDmode,
08827     0,
08828     0
08829   },
08830   {
08831     register_operand,
08832     "c",
08833     BImode,
08834     0,
08835     1
08836   },
08837   {
08838     fr_register_operand,
08839     "=f",
08840     SFmode,
08841     0,
08842     1
08843   },
08844   {
08845     tfreg_or_fp01_operand,
08846     "fG",
08847     TFmode,
08848     0,
08849     1
08850   },
08851   {
08852     tfreg_or_fp01_operand,
08853     "fG",
08854     TFmode,
08855     0,
08856     1
08857   },
08858   {
08859     predicate_operator,
08860     "",
08861     VOIDmode,
08862     0,
08863     0
08864   },
08865   {
08866     register_operand,
08867     "c",
08868     BImode,
08869     0,
08870     1
08871   },
08872   {
08873     fr_register_operand,
08874     "=f",
08875     DFmode,
08876     0,
08877     1
08878   },
08879   {
08880     tfreg_or_fp01_operand,
08881     "fG",
08882     TFmode,
08883     0,
08884     1
08885   },
08886   {
08887     tfreg_or_fp01_operand,
08888     "fG",
08889     TFmode,
08890     0,
08891     1
08892   },
08893   {
08894     predicate_operator,
08895     "",
08896     VOIDmode,
08897     0,
08898     0
08899   },
08900   {
08901     register_operand,
08902     "c",
08903     BImode,
08904     0,
08905     1
08906   },
08907   {
08908     fr_register_operand,
08909     "=f",
08910     TFmode,
08911     0,
08912     1
08913   },
08914   {
08915     tfreg_or_fp01_operand,
08916     "fG",
08917     TFmode,
08918     0,
08919     1
08920   },
08921   {
08922     tfreg_or_fp01_operand,
08923     "fG",
08924     TFmode,
08925     0,
08926     1
08927   },
08928   {
08929     const_int_operand,
08930     "",
08931     SImode,
08932     0,
08933     1
08934   },
08935   {
08936     predicate_operator,
08937     "",
08938     VOIDmode,
08939     0,
08940     0
08941   },
08942   {
08943     register_operand,
08944     "c",
08945     BImode,
08946     0,
08947     1
08948   },
08949   {
08950     fr_register_operand,
08951     "=f",
08952     SFmode,
08953     0,
08954     1
08955   },
08956   {
08957     tfreg_or_fp01_operand,
08958     "fG",
08959     TFmode,
08960     0,
08961     1
08962   },
08963   {
08964     tfreg_or_fp01_operand,
08965     "fG",
08966     TFmode,
08967     0,
08968     1
08969   },
08970   {
08971     const_int_operand,
08972     "",
08973     SImode,
08974     0,
08975     1
08976   },
08977   {
08978     predicate_operator,
08979     "",
08980     VOIDmode,
08981     0,
08982     0
08983   },
08984   {
08985     register_operand,
08986     "c",
08987     BImode,
08988     0,
08989     1
08990   },
08991   {
08992     fr_register_operand,
08993     "=f",
08994     DFmode,
08995     0,
08996     1
08997   },
08998   {
08999     tfreg_or_fp01_operand,
09000     "fG",
09001     TFmode,
09002     0,
09003     1
09004   },
09005   {
09006     tfreg_or_fp01_operand,
09007     "fG",
09008     TFmode,
09009     0,
09010     1
09011   },
09012   {
09013     const_int_operand,
09014     "",
09015     SImode,
09016     0,
09017     1
09018   },
09019   {
09020     predicate_operator,
09021     "",
09022     VOIDmode,
09023     0,
09024     0
09025   },
09026   {
09027     register_operand,
09028     "c",
09029     BImode,
09030     0,
09031     1
09032   },
09033   {
09034     fr_register_operand,
09035     "=f",
09036     TFmode,
09037     0,
09038     1
09039   },
09040   {
09041     tfreg_or_fp01_operand,
09042     "fG",
09043     TFmode,
09044     0,
09045     1
09046   },
09047   {
09048     predicate_operator,
09049     "",
09050     VOIDmode,
09051     0,
09052     0
09053   },
09054   {
09055     register_operand,
09056     "c",
09057     BImode,
09058     0,
09059     1
09060   },
09061   {
09062     fr_register_operand,
09063     "=f",
09064     TFmode,
09065     0,
09066     1
09067   },
09068   {
09069     tfreg_or_fp01_operand,
09070     "fG",
09071     TFmode,
09072     0,
09073     1
09074   },
09075   {
09076     tfreg_or_fp01_operand,
09077     "fG",
09078     TFmode,
09079     0,
09080     1
09081   },
09082   {
09083     tfreg_or_fp01_operand,
09084     "fG",
09085     TFmode,
09086     0,
09087     1
09088   },
09089   {
09090     predicate_operator,
09091     "",
09092     VOIDmode,
09093     0,
09094     0
09095   },
09096   {
09097     register_operand,
09098     "c",
09099     BImode,
09100     0,
09101     1
09102   },
09103   {
09104     fr_register_operand,
09105     "=f",
09106     SFmode,
09107     0,
09108     1
09109   },
09110   {
09111     tfreg_or_fp01_operand,
09112     "fG",
09113     TFmode,
09114     0,
09115     1
09116   },
09117   {
09118     tfreg_or_fp01_operand,
09119     "fG",
09120     TFmode,
09121     0,
09122     1
09123   },
09124   {
09125     tfreg_or_fp01_operand,
09126     "fG",
09127     TFmode,
09128     0,
09129     1
09130   },
09131   {
09132     predicate_operator,
09133     "",
09134     VOIDmode,
09135     0,
09136     0
09137   },
09138   {
09139     register_operand,
09140     "c",
09141     BImode,
09142     0,
09143     1
09144   },
09145   {
09146     fr_register_operand,
09147     "=f",
09148     DFmode,
09149     0,
09150     1
09151   },
09152   {
09153     tfreg_or_fp01_operand,
09154     "fG",
09155     TFmode,
09156     0,
09157     1
09158   },
09159   {
09160     tfreg_or_fp01_operand,
09161     "fG",
09162     TFmode,
09163     0,
09164     1
09165   },
09166   {
09167     tfreg_or_fp01_operand,
09168     "fG",
09169     TFmode,
09170     0,
09171     1
09172   },
09173   {
09174     predicate_operator,
09175     "",
09176     VOIDmode,
09177     0,
09178     0
09179   },
09180   {
09181     register_operand,
09182     "c",
09183     BImode,
09184     0,
09185     1
09186   },
09187   {
09188     fr_register_operand,
09189     "=f",
09190     TFmode,
09191     0,
09192     1
09193   },
09194   {
09195     tfreg_or_fp01_operand,
09196     "fG",
09197     TFmode,
09198     0,
09199     1
09200   },
09201   {
09202     tfreg_or_fp01_operand,
09203     "fG",
09204     TFmode,
09205     0,
09206     1
09207   },
09208   {
09209     tfreg_or_fp01_operand,
09210     "fG",
09211     TFmode,
09212     0,
09213     1
09214   },
09215   {
09216     const_int_operand,
09217     "",
09218     SImode,
09219     0,
09220     1
09221   },
09222   {
09223     predicate_operator,
09224     "",
09225     VOIDmode,
09226     0,
09227     0
09228   },
09229   {
09230     register_operand,
09231     "c",
09232     BImode,
09233     0,
09234     1
09235   },
09236   {
09237     fr_register_operand,
09238     "=f",
09239     DFmode,
09240     0,
09241     1
09242   },
09243   {
09244     tfreg_or_fp01_operand,
09245     "fG",
09246     TFmode,
09247     0,
09248     1
09249   },
09250   {
09251     tfreg_or_fp01_operand,
09252     "fG",
09253     TFmode,
09254     0,
09255     1
09256   },
09257   {
09258     tfreg_or_fp01_operand,
09259     "fG",
09260     TFmode,
09261     0,
09262     1
09263   },
09264   {
09265     const_int_operand,
09266     "",
09267     SImode,
09268     0,
09269     1
09270   },
09271   {
09272     predicate_operator,
09273     "",
09274     VOIDmode,
09275     0,
09276     0
09277   },
09278   {
09279     register_operand,
09280     "c",
09281     BImode,
09282     0,
09283     1
09284   },
09285   {
09286     gr_register_operand,
09287     "=r,r,r",
09288     SImode,
09289     0,
09290     1
09291   },
09292   {
09293     gr_register_operand,
09294     "r,r,r",
09295     SImode,
09296     0,
09297     1
09298   },
09299   {
09300     gr_reg_or_5bit_operand,
09301     "R,n,r",
09302     DImode,
09303     0,
09304     1
09305   },
09306   {
09307     predicate_operator,
09308     "",
09309     VOIDmode,
09310     0,
09311     0
09312   },
09313   {
09314     register_operand,
09315     "c,c,c",
09316     BImode,
09317     0,
09318     1
09319   },
09320   {
09321     gr_register_operand,
09322     "=&r",
09323     SImode,
09324     0,
09325     1
09326   },
09327   {
09328     gr_register_operand,
09329     "r",
09330     SImode,
09331     0,
09332     1
09333   },
09334   {
09335     gr_reg_or_5bit_operand,
09336     "rM",
09337     DImode,
09338     0,
09339     1
09340   },
09341   {
09342     predicate_operator,
09343     "",
09344     VOIDmode,
09345     0,
09346     0
09347   },
09348   {
09349     register_operand,
09350     "c",
09351     BImode,
09352     0,
09353     1
09354   },
09355   {
09356     gr_register_operand,
09357     "=r",
09358     SImode,
09359     0,
09360     1
09361   },
09362   {
09363     gr_register_operand,
09364     "r",
09365     SImode,
09366     0,
09367     1
09368   },
09369   {
09370     shift_32bit_count_operand,
09371     "n",
09372     SImode,
09373     0,
09374     1
09375   },
09376   {
09377     predicate_operator,
09378     "",
09379     VOIDmode,
09380     0,
09381     0
09382   },
09383   {
09384     register_operand,
09385     "c",
09386     BImode,
09387     0,
09388     1
09389   },
09390   {
09391     gr_register_operand,
09392     "=r,r,r",
09393     DImode,
09394     0,
09395     1
09396   },
09397   {
09398     gr_register_operand,
09399     "r,r,r",
09400     DImode,
09401     0,
09402     1
09403   },
09404   {
09405     gr_reg_or_6bit_operand,
09406     "R,r,rM",
09407     DImode,
09408     0,
09409     1
09410   },
09411   {
09412     predicate_operator,
09413     "",
09414     VOIDmode,
09415     0,
09416     0
09417   },
09418   {
09419     register_operand,
09420     "c,c,c",
09421     BImode,
09422     0,
09423     1
09424   },
09425   {
09426     gr_register_operand,
09427     "=r",
09428     DImode,
09429     0,
09430     1
09431   },
09432   {
09433     gr_register_operand,
09434     "r",
09435     DImode,
09436     0,
09437     1
09438   },
09439   {
09440     shladd_operand,
09441     "n",
09442     DImode,
09443     0,
09444     1
09445   },
09446   {
09447     gr_register_operand,
09448     "r",
09449     DImode,
09450     0,
09451     1
09452   },
09453   {
09454     predicate_operator,
09455     "",
09456     VOIDmode,
09457     0,
09458     0
09459   },
09460   {
09461     register_operand,
09462     "c",
09463     BImode,
09464     0,
09465     1
09466   },
09467   {
09468     gr_register_operand,
09469     "=&r",
09470     DImode,
09471     0,
09472     1
09473   },
09474   {
09475     gr_register_operand,
09476     "r",
09477     DImode,
09478     0,
09479     1
09480   },
09481   {
09482     shladd_operand,
09483     "n",
09484     DImode,
09485     0,
09486     1
09487   },
09488   {
09489     nonmemory_operand,
09490     "r",
09491     DImode,
09492     0,
09493     1
09494   },
09495   {
09496     nonmemory_operand,
09497     "rI",
09498     DImode,
09499     0,
09500     1
09501   },
09502   {
09503     predicate_operator,
09504     "",
09505     VOIDmode,
09506     0,
09507     0
09508   },
09509   {
09510     register_operand,
09511     "c",
09512     BImode,
09513     0,
09514     1
09515   },
09516   {
09517     gr_register_operand,
09518     "=r,r",
09519     DImode,
09520     0,
09521     1
09522   },
09523   {
09524     gr_register_operand,
09525     "r,r",
09526     DImode,
09527     0,
09528     1
09529   },
09530   {
09531     gr_reg_or_6bit_operand,
09532     "r,rM",
09533     DImode,
09534     0,
09535     1
09536   },
09537   {
09538     predicate_operator,
09539     "",
09540     VOIDmode,
09541     0,
09542     0
09543   },
09544   {
09545     register_operand,
09546     "c,c",
09547     BImode,
09548     0,
09549     1
09550   },
09551   {
09552     gr_register_operand,
09553     "=r",
09554     DImode,
09555     0,
09556     1
09557   },
09558   {
09559     gr_register_operand,
09560     "r",
09561     DImode,
09562     0,
09563     1
09564   },
09565   {
09566     shift_count_operand,
09567     "M",
09568     DImode,
09569     0,
09570     1
09571   },
09572   {
09573     predicate_operator,
09574     "",
09575     VOIDmode,
09576     0,
09577     0
09578   },
09579   {
09580     register_operand,
09581     "c",
09582     BImode,
09583     0,
09584     1
09585   },
09586   {
09587     grfr_register_operand,
09588     "=r,*f",
09589     DImode,
09590     0,
09591     1
09592   },
09593   {
09594     grfr_register_operand,
09595     "%r,*f",
09596     DImode,
09597     0,
09598     1
09599   },
09600   {
09601     grfr_reg_or_8bit_operand,
09602     "rK,*f",
09603     DImode,
09604     0,
09605     1
09606   },
09607   {
09608     predicate_operator,
09609     "",
09610     VOIDmode,
09611     0,
09612     0
09613   },
09614   {
09615     register_operand,
09616     "c,c",
09617     BImode,
09618     0,
09619     1
09620   },
09621   {
09622     grfr_register_operand,
09623     "=r,*f",
09624     DImode,
09625     0,
09626     1
09627   },
09628   {
09629     grfr_register_operand,
09630     "r,*f",
09631     DImode,
09632     0,
09633     1
09634   },
09635   {
09636     grfr_reg_or_8bit_operand,
09637     "rK,*f",
09638     DImode,
09639     0,
09640     1
09641   },
09642   {
09643     predicate_operator,
09644     "",
09645     VOIDmode,
09646     0,
09647     0
09648   },
09649   {
09650     register_operand,
09651     "c,c",
09652     BImode,
09653     0,
09654     1
09655   },
09656   {
09657     register_operand,
09658     "=c",
09659     BImode,
09660     0,
09661     1
09662   },
09663   {
09664     normal_comparison_operator,
09665     "",
09666     BImode,
09667     0,
09668     0
09669   },
09670   {
09671     gr_register_operand,
09672     "r",
09673     SImode,
09674     0,
09675     1
09676   },
09677   {
09678     gr_reg_or_8bit_operand,
09679     "rK",
09680     SImode,
09681     0,
09682     1
09683   },
09684   {
09685     predicate_operator,
09686     "",
09687     VOIDmode,
09688     0,
09689     0
09690   },
09691   {
09692     register_operand,
09693     "c",
09694     BImode,
09695     0,
09696     1
09697   },
09698   {
09699     register_operand,
09700     "=c",
09701     BImode,
09702     0,
09703     1
09704   },
09705   {
09706     adjusted_comparison_operator,
09707     "",
09708     BImode,
09709     0,
09710     0
09711   },
09712   {
09713     gr_register_operand,
09714     "r",
09715     SImode,
09716     0,
09717     1
09718   },
09719   {
09720     gr_reg_or_8bit_adjusted_operand,
09721     "rL",
09722     SImode,
09723     0,
09724     1
09725   },
09726   {
09727     predicate_operator,
09728     "",
09729     VOIDmode,
09730     0,
09731     0
09732   },
09733   {
09734     register_operand,
09735     "c",
09736     BImode,
09737     0,
09738     1
09739   },
09740   {
09741     register_operand,
09742     "=c",
09743     BImode,
09744     0,
09745     1
09746   },
09747   {
09748     normal_comparison_operator,
09749     "",
09750     BImode,
09751     0,
09752     0
09753   },
09754   {
09755     gr_reg_or_0_operand,
09756     "rO",
09757     DImode,
09758     0,
09759     1
09760   },
09761   {
09762     gr_reg_or_8bit_operand,
09763     "rK",
09764     DImode,
09765     0,
09766     1
09767   },
09768   {
09769     predicate_operator,
09770     "",
09771     VOIDmode,
09772     0,
09773     0
09774   },
09775   {
09776     register_operand,
09777     "c",
09778     BImode,
09779     0,
09780     1
09781   },
09782   {
09783     register_operand,
09784     "=c",
09785     BImode,
09786     0,
09787     1
09788   },
09789   {
09790     adjusted_comparison_operator,
09791     "",
09792     BImode,
09793     0,
09794     0
09795   },
09796   {
09797     gr_register_operand,
09798     "r",
09799     DImode,
09800     0,
09801     1
09802   },
09803   {
09804     gr_reg_or_8bit_adjusted_operand,
09805     "rL",
09806     DImode,
09807     0,
09808     1
09809   },
09810   {
09811     predicate_operator,
09812     "",
09813     VOIDmode,
09814     0,
09815     0
09816   },
09817   {
09818     register_operand,
09819     "c",
09820     BImode,
09821     0,
09822     1
09823   },
09824   {
09825     register_operand,
09826     "=c",
09827     BImode,
09828     0,
09829     1
09830   },
09831   {
09832     comparison_operator,
09833     "",
09834     BImode,
09835     0,
09836     0
09837   },
09838   {
09839     fr_reg_or_fp01_operand,
09840     "fG",
09841     SFmode,
09842     0,
09843     1
09844   },
09845   {
09846     fr_reg_or_fp01_operand,
09847     "fG",
09848     SFmode,
09849     0,
09850     1
09851   },
09852   {
09853     predicate_operator,
09854     "",
09855     VOIDmode,
09856     0,
09857     0
09858   },
09859   {
09860     register_operand,
09861     "c",
09862     BImode,
09863     0,
09864     1
09865   },
09866   {
09867     register_operand,
09868     "=c",
09869     BImode,
09870     0,
09871     1
09872   },
09873   {
09874     comparison_operator,
09875     "",
09876     BImode,
09877     0,
09878     0
09879   },
09880   {
09881     fr_reg_or_fp01_operand,
09882     "fG",
09883     DFmode,
09884     0,
09885     1
09886   },
09887   {
09888     fr_reg_or_fp01_operand,
09889     "fG",
09890     DFmode,
09891     0,
09892     1
09893   },
09894   {
09895     predicate_operator,
09896     "",
09897     VOIDmode,
09898     0,
09899     0
09900   },
09901   {
09902     register_operand,
09903     "c",
09904     BImode,
09905     0,
09906     1
09907   },
09908   {
09909     register_operand,
09910     "=c",
09911     BImode,
09912     0,
09913     1
09914   },
09915   {
09916     comparison_operator,
09917     "",
09918     BImode,
09919     0,
09920     0
09921   },
09922   {
09923     tfreg_or_fp01_operand,
09924     "fG",
09925     TFmode,
09926     0,
09927     1
09928   },
09929   {
09930     tfreg_or_fp01_operand,
09931     "fG",
09932     TFmode,
09933     0,
09934     1
09935   },
09936   {
09937     predicate_operator,
09938     "",
09939     VOIDmode,
09940     0,
09941     0
09942   },
09943   {
09944     register_operand,
09945     "c",
09946     BImode,
09947     0,
09948     1
09949   },
09950   {
09951     gr_register_operand,
09952     "=r",
09953     DImode,
09954     0,
09955     1
09956   },
09957   {
09958     register_operand,
09959     "c",
09960     BImode,
09961     0,
09962     1
09963   },
09964   {
09965     predicate_operator,
09966     "",
09967     VOIDmode,
09968     0,
09969     0
09970   },
09971   {
09972     register_operand,
09973     "c",
09974     BImode,
09975     0,
09976     1
09977   },
09978   {
09979     call_operand,
09980     "?b,i",
09981     DImode,
09982     0,
09983     1
09984   },
09985   {
09986     register_operand,
09987     "=b,b",
09988     DImode,
09989     0,
09990     1
09991   },
09992   {
09993     predicate_operator,
09994     "",
09995     VOIDmode,
09996     0,
09997     0
09998   },
09999   {
10000     register_operand,
10001     "c,c",
10002     BImode,
10003     0,
10004     1
10005   },
10006   {
10007     0,
10008     "",
10009     VOIDmode,
10010     0,
10011     1
10012   },
10013   {
10014     call_operand,
10015     "?b,i",
10016     DImode,
10017     0,
10018     1
10019   },
10020   {
10021     register_operand,
10022     "=b,b",
10023     DImode,
10024     0,
10025     1
10026   },
10027   {
10028     predicate_operator,
10029     "",
10030     VOIDmode,
10031     0,
10032     0
10033   },
10034   {
10035     register_operand,
10036     "c,c",
10037     BImode,
10038     0,
10039     1
10040   },
10041   {
10042     call_operand,
10043     "?b,i",
10044     DImode,
10045     0,
10046     1
10047   },
10048   {
10049     predicate_operator,
10050     "",
10051     VOIDmode,
10052     0,
10053     0
10054   },
10055   {
10056     register_operand,
10057     "c,c",
10058     BImode,
10059     0,
10060     1
10061   },
10062   {
10063     call_operand,
10064     "?r,i",
10065     VOIDmode,
10066     0,
10067     1
10068   },
10069   {
10070     register_operand,
10071     "=b,b",
10072     DImode,
10073     0,
10074     1
10075   },
10076   {
10077     scratch_operand,
10078     "=&r,X",
10079     DImode,
10080     0,
10081     0
10082   },
10083   {
10084     scratch_operand,
10085     "=b,X",
10086     DImode,
10087     0,
10088     0
10089   },
10090   {
10091     predicate_operator,
10092     "",
10093     VOIDmode,
10094     0,
10095     0
10096   },
10097   {
10098     register_operand,
10099     "c,c",
10100     BImode,
10101     0,
10102     1
10103   },
10104   {
10105     0,
10106     "",
10107     VOIDmode,
10108     0,
10109     1
10110   },
10111   {
10112     call_operand,
10113     "?r,i",
10114     DImode,
10115     0,
10116     1
10117   },
10118   {
10119     register_operand,
10120     "=b,b",
10121     DImode,
10122     0,
10123     1
10124   },
10125   {
10126     scratch_operand,
10127     "=&r,X",
10128     DImode,
10129     0,
10130     0
10131   },
10132   {
10133     scratch_operand,
10134     "=b,X",
10135     DImode,
10136     0,
10137     0
10138   },
10139   {
10140     predicate_operator,
10141     "",
10142     VOIDmode,
10143     0,
10144     0
10145   },
10146   {
10147     register_operand,
10148     "c,c",
10149     BImode,
10150     0,
10151     1
10152   },
10153   {
10154     call_operand,
10155     "?r,i",
10156     DImode,
10157     0,
10158     1
10159   },
10160   {
10161     scratch_operand,
10162     "=&r,X",
10163     DImode,
10164     0,
10165     0
10166   },
10167   {
10168     scratch_operand,
10169     "=b,X",
10170     DImode,
10171     0,
10172     0
10173   },
10174   {
10175     predicate_operator,
10176     "",
10177     VOIDmode,
10178     0,
10179     0
10180   },
10181   {
10182     register_operand,
10183     "c,c",
10184     BImode,
10185     0,
10186     1
10187   },
10188   {
10189     register_operand,
10190     "b",
10191     DImode,
10192     0,
10193     1
10194   },
10195   {
10196     predicate_operator,
10197     "",
10198     VOIDmode,
10199     0,
10200     0
10201   },
10202   {
10203     register_operand,
10204     "c",
10205     BImode,
10206     0,
10207     1
10208   },
10209   {
10210     0,
10211     "",
10212     VOIDmode,
10213     0,
10214     1
10215   },
10216   {
10217     predicate_operator,
10218     "",
10219     VOIDmode,
10220     0,
10221     0
10222   },
10223   {
10224     register_operand,
10225     "c",
10226     BImode,
10227     0,
10228     1
10229   },
10230   {
10231     register_operand,
10232     "b",
10233     DImode,
10234     0,
10235     1
10236   },
10237   {
10238     0,
10239     "",
10240     VOIDmode,
10241     0,
10242     1
10243   },
10244   {
10245     predicate_operator,
10246     "",
10247     VOIDmode,
10248     0,
10249     0
10250   },
10251   {
10252     register_operand,
10253     "c",
10254     BImode,
10255     0,
10256     1
10257   },
10258   {
10259     register_operand,
10260     "=r,r,r",
10261     DImode,
10262     0,
10263     1
10264   },
10265   {
10266     register_operand,
10267     "%r,r,a",
10268     DImode,
10269     0,
10270     1
10271   },
10272   {
10273     gr_reg_or_22bit_operand,
10274     "r,I,J",
10275     DImode,
10276     0,
10277     1
10278   },
10279   {
10280     register_operand,
10281     "+r,r,r",
10282     DImode,
10283     0,
10284     1
10285   },
10286   {
10287     predicate_operator,
10288     "",
10289     VOIDmode,
10290     0,
10291     0
10292   },
10293   {
10294     register_operand,
10295     "c,c,c",
10296     BImode,
10297     0,
10298     1
10299   },
10300   {
10301     register_operand,
10302     "=r",
10303     DImode,
10304     0,
10305     1
10306   },
10307   {
10308     register_operand,
10309     "+r",
10310     DImode,
10311     0,
10312     1
10313   },
10314   {
10315     predicate_operator,
10316     "",
10317     VOIDmode,
10318     0,
10319     0
10320   },
10321   {
10322     register_operand,
10323     "c",
10324     BImode,
10325     0,
10326     1
10327   },
10328   {
10329     memory_operand,
10330     "=m",
10331     DImode,
10332     0,
10333     1
10334   },
10335   {
10336     register_operand,
10337     "r",
10338     DImode,
10339     0,
10340     1
10341   },
10342   {
10343     const_int_operand,
10344     "",
10345     DImode,
10346     0,
10347     1
10348   },
10349   {
10350     register_operand,
10351     "",
10352     DImode,
10353     0,
10354     1
10355   },
10356   {
10357     predicate_operator,
10358     "",
10359     VOIDmode,
10360     0,
10361     0
10362   },
10363   {
10364     register_operand,
10365     "c",
10366     BImode,
10367     0,
10368     1
10369   },
10370   {
10371     register_operand,
10372     "=r",
10373     DImode,
10374     0,
10375     1
10376   },
10377   {
10378     memory_operand,
10379     "m",
10380     DImode,
10381     0,
10382     1
10383   },
10384   {
10385     const_int_operand,
10386     "",
10387     DImode,
10388     0,
10389     1
10390   },
10391   {
10392     register_operand,
10393     "",
10394     DImode,
10395     0,
10396     1
10397   },
10398   {
10399     predicate_operator,
10400     "",
10401     VOIDmode,
10402     0,
10403     0
10404   },
10405   {
10406     register_operand,
10407     "c",
10408     BImode,
10409     0,
10410     1
10411   },
10412   {
10413     memory_operand,
10414     "=m",
10415     TFmode,
10416     0,
10417     1
10418   },
10419   {
10420     register_operand,
10421     "f",
10422     TFmode,
10423     0,
10424     1
10425   },
10426   {
10427     predicate_operator,
10428     "",
10429     VOIDmode,
10430     0,
10431     0
10432   },
10433   {
10434     register_operand,
10435     "c",
10436     BImode,
10437     0,
10438     1
10439   },
10440   {
10441     register_operand,
10442     "=f",
10443     TFmode,
10444     0,
10445     1
10446   },
10447   {
10448     memory_operand,
10449     "m",
10450     TFmode,
10451     0,
10452     1
10453   },
10454   {
10455     predicate_operator,
10456     "",
10457     VOIDmode,
10458     0,
10459     0
10460   },
10461   {
10462     register_operand,
10463     "c",
10464     BImode,
10465     0,
10466     1
10467   },
10468   {
10469     register_operand,
10470     "=r",
10471     DImode,
10472     0,
10473     1
10474   },
10475   {
10476     predicate_operator,
10477     "",
10478     VOIDmode,
10479     0,
10480     0
10481   },
10482   {
10483     register_operand,
10484     "c",
10485     BImode,
10486     0,
10487     1
10488   },
10489   {
10490     address_operand,
10491     "p",
10492     DImode,
10493     0,
10494     1
10495   },
10496   {
10497     const_int_operand,
10498     "n",
10499     DImode,
10500     0,
10501     1
10502   },
10503   {
10504     const_int_operand,
10505     "n",
10506     DImode,
10507     0,
10508     1
10509   },
10510   {
10511     predicate_operator,
10512     "",
10513     VOIDmode,
10514     0,
10515     0
10516   },
10517   {
10518     register_operand,
10519     "c",
10520     BImode,
10521     0,
10522     1
10523   },
10524   {
10525     0,
10526     "",
10527     DImode,
10528     0,
10529     1
10530   },
10531   {
10532     predicate_operator,
10533     "",
10534     VOIDmode,
10535     0,
10536     0
10537   },
10538   {
10539     register_operand,
10540     "c",
10541     BImode,
10542     0,
10543     1
10544   },
10545   {
10546     0,
10547     "",
10548     BLKmode,
10549     0,
10550     1
10551   },
10552   {
10553     0,
10554     "",
10555     BLKmode,
10556     0,
10557     1
10558   },
10559   {
10560     predicate_operator,
10561     "",
10562     VOIDmode,
10563     0,
10564     0
10565   },
10566   {
10567     register_operand,
10568     "c",
10569     BImode,
10570     0,
10571     1
10572   },
10573   {
10574     gr_register_operand,
10575     "=r",
10576     SImode,
10577     0,
10578     1
10579   },
10580   {
10581     not_postinc_memory_operand,
10582     "+S",
10583     SImode,
10584     0,
10585     1
10586   },
10587   {
10588     fetchadd_operand,
10589     "n",
10590     SImode,
10591     0,
10592     1
10593   },
10594   {
10595     predicate_operator,
10596     "",
10597     VOIDmode,
10598     0,
10599     0
10600   },
10601   {
10602     register_operand,
10603     "c",
10604     BImode,
10605     0,
10606     1
10607   },
10608   {
10609     gr_register_operand,
10610     "=r",
10611     DImode,
10612     0,
10613     1
10614   },
10615   {
10616     not_postinc_memory_operand,
10617     "+S",
10618     DImode,
10619     0,
10620     1
10621   },
10622   {
10623     fetchadd_operand,
10624     "n",
10625     DImode,
10626     0,
10627     1
10628   },
10629   {
10630     predicate_operator,
10631     "",
10632     VOIDmode,
10633     0,
10634     0
10635   },
10636   {
10637     register_operand,
10638     "c",
10639     BImode,
10640     0,
10641     1
10642   },
10643   {
10644     gr_register_operand,
10645     "=r",
10646     SImode,
10647     0,
10648     1
10649   },
10650   {
10651     not_postinc_memory_operand,
10652     "+S",
10653     SImode,
10654     0,
10655     1
10656   },
10657   {
10658     gr_register_operand,
10659     "r",
10660     SImode,
10661     0,
10662     1
10663   },
10664   {
10665     ar_ccv_reg_operand,
10666     "",
10667     VOIDmode,
10668     0,
10669     1
10670   },
10671   {
10672     predicate_operator,
10673     "",
10674     VOIDmode,
10675     0,
10676     0
10677   },
10678   {
10679     register_operand,
10680     "c",
10681     BImode,
10682     0,
10683     1
10684   },
10685   {
10686     gr_register_operand,
10687     "=r",
10688     DImode,
10689     0,
10690     1
10691   },
10692   {
10693     not_postinc_memory_operand,
10694     "+S",
10695     DImode,
10696     0,
10697     1
10698   },
10699   {
10700     gr_register_operand,
10701     "r",
10702     DImode,
10703     0,
10704     1
10705   },
10706   {
10707     ar_ccv_reg_operand,
10708     "",
10709     DImode,
10710     0,
10711     1
10712   },
10713   {
10714     predicate_operator,
10715     "",
10716     VOIDmode,
10717     0,
10718     0
10719   },
10720   {
10721     register_operand,
10722     "c",
10723     BImode,
10724     0,
10725     1
10726   },
10727   {
10728     gr_register_operand,
10729     "=r",
10730     SImode,
10731     0,
10732     1
10733   },
10734   {
10735     not_postinc_memory_operand,
10736     "+S",
10737     SImode,
10738     0,
10739     1
10740   },
10741   {
10742     gr_register_operand,
10743     "r",
10744     SImode,
10745     0,
10746     1
10747   },
10748   {
10749     predicate_operator,
10750     "",
10751     VOIDmode,
10752     0,
10753     0
10754   },
10755   {
10756     register_operand,
10757     "c",
10758     BImode,
10759     0,
10760     1
10761   },
10762   {
10763     gr_register_operand,
10764     "=r",
10765     DImode,
10766     0,
10767     1
10768   },
10769   {
10770     not_postinc_memory_operand,
10771     "+S",
10772     DImode,
10773     0,
10774     1
10775   },
10776   {
10777     gr_register_operand,
10778     "r",
10779     DImode,
10780     0,
10781     1
10782   },
10783   {
10784     predicate_operator,
10785     "",
10786     VOIDmode,
10787     0,
10788     0
10789   },
10790   {
10791     register_operand,
10792     "c",
10793     BImode,
10794     0,
10795     1
10796   },
10797   {
10798     gr_register_operand,
10799     "=r",
10800     DImode,
10801     0,
10802     1
10803   },
10804   {
10805     gr_register_operand,
10806     "r",
10807     SImode,
10808     0,
10809     1
10810   },
10811   {
10812     predicate_operator,
10813     "",
10814     VOIDmode,
10815     0,
10816     0
10817   },
10818   {
10819     register_operand,
10820     "c",
10821     BImode,
10822     0,
10823     1
10824   },
10825   {
10826     gr_register_operand,
10827     "=r",
10828     DImode,
10829     0,
10830     1
10831   },
10832   {
10833     basereg_operand,
10834     "r",
10835     SImode,
10836     0,
10837     1
10838   },
10839   {
10840     gr_reg_or_14bit_operand,
10841     "rI",
10842     SImode,
10843     0,
10844     1
10845   },
10846   {
10847     predicate_operator,
10848     "",
10849     VOIDmode,
10850     0,
10851     0
10852   },
10853   {
10854     register_operand,
10855     "c",
10856     BImode,
10857     0,
10858     1
10859   },
10860   {
10861     gr_register_operand,
10862     "=r",
10863     DImode,
10864     0,
10865     1
10866   },
10867   {
10868     gr_register_operand,
10869     "r",
10870     SImode,
10871     0,
10872     1
10873   },
10874   {
10875     basereg_operand,
10876     "r",
10877     SImode,
10878     0,
10879     1
10880   },
10881   {
10882     predicate_operator,
10883     "",
10884     VOIDmode,
10885     0,
10886     0
10887   },
10888   {
10889     register_operand,
10890     "c",
10891     BImode,
10892     0,
10893     1
10894   },
10895 };
10896 
10897 
10898 
10899 const struct insn_data insn_data[] = 
10900 {
10901   {
10902     "*movcci",
10903     (const PTR) output_0,
10904     0,
10905     &operand_data[1],
10906     2,
10907     0,
10908     3,
10909     2
10910   },
10911   {
10912     "movbi",
10913     (const PTR) output_1,
10914     (insn_gen_fn) gen_movbi,
10915     &operand_data[3],
10916     2,
10917     0,
10918     9,
10919     2
10920   },
10921   {
10922     "*movqi_internal",
10923     (const PTR) output_2,
10924     0,
10925     &operand_data[5],
10926     2,
10927     0,
10928     7,
10929     2
10930   },
10931   {
10932     "*movhi_internal",
10933     (const PTR) output_3,
10934     0,
10935     &operand_data[7],
10936     2,
10937     0,
10938     7,
10939     2
10940   },
10941   {
10942     "movsi_symbolic",
10943     (const PTR) output_4,
10944     (insn_gen_fn) gen_movsi_symbolic,
10945     &operand_data[9],
10946     3,
10947     0,
10948     1,
10949     3
10950   },
10951   {
10952     "*movsi_internal",
10953     (const PTR) output_5,
10954     0,
10955     &operand_data[12],
10956     2,
10957     0,
10958     10,
10959     2
10960   },
10961   {
10962     "movdi_symbolic",
10963     (const PTR) output_6,
10964     (insn_gen_fn) gen_movdi_symbolic,
10965     &operand_data[14],
10966     3,
10967     0,
10968     1,
10969     3
10970   },
10971   {
10972     "*movdi_internal",
10973     (const PTR) output_7,
10974     0,
10975     &operand_data[17],
10976     2,
10977     0,
10978     18,
10979     3
10980   },
10981   {
10982     "*load_fptr_internal1",
10983     "addl %0 = @ltoff(@fptr(%1)), gp",
10984     0,
10985     &operand_data[19],
10986     2,
10987     0,
10988     1,
10989     1
10990   },
10991   {
10992     "load_gprel",
10993     "addl %0 = @gprel(%1), gp",
10994     (insn_gen_fn) gen_load_gprel,
10995     &operand_data[21],
10996     2,
10997     0,
10998     1,
10999     1
11000   },
11001   {
11002     "gprel64_offset",
11003     "movl %0 = @gprel(%1)",
11004     (insn_gen_fn) gen_gprel64_offset,
11005     &operand_data[23],
11006     2,
11007     0,
11008     1,
11009     1
11010   },
11011   {
11012     "*load_symptr_high",
11013     (const PTR) output_11,
11014     0,
11015     &operand_data[25],
11016     3,
11017     0,
11018     1,
11019     3
11020   },
11021   {
11022     "*load_symptr_low",
11023     (const PTR) output_12,
11024     0,
11025     &operand_data[28],
11026     3,
11027     0,
11028     1,
11029     3
11030   },
11031   {
11032     "load_ltoff_dtpmod",
11033     "addl %0 = @ltoff(@dtpmod(%1)), gp",
11034     (insn_gen_fn) gen_load_ltoff_dtpmod,
11035     &operand_data[23],
11036     2,
11037     0,
11038     1,
11039     1
11040   },
11041   {
11042     "load_ltoff_dtprel",
11043     "addl %0 = @ltoff(@dtprel(%1)), gp",
11044     (insn_gen_fn) gen_load_ltoff_dtprel,
11045     &operand_data[23],
11046     2,
11047     0,
11048     1,
11049     1
11050   },
11051   {
11052     "*load_dtprel64",
11053     "movl %0 = @dtprel(%1)",
11054     0,
11055     &operand_data[23],
11056     2,
11057     0,
11058     1,
11059     1
11060   },
11061   {
11062     "*load_dtprel22",
11063     "addl %0 = @dtprel(%1), r0",
11064     0,
11065     &operand_data[23],
11066     2,
11067     0,
11068     1,
11069     1
11070   },
11071   {
11072     "*add_dtprel14",
11073     "adds %0 = @dtprel(%2), %1",
11074     0,
11075     &operand_data[31],
11076     3,
11077     0,
11078     1,
11079     1
11080   },
11081   {
11082     "*add_dtprel22",
11083     "addl %0 = @dtprel(%2), %1",
11084     0,
11085     &operand_data[34],
11086     3,
11087     0,
11088     1,
11089     1
11090   },
11091   {
11092     "load_ltoff_tprel",
11093     "addl %0 = @ltoff(@tprel(%1)), gp",
11094     (insn_gen_fn) gen_load_ltoff_tprel,
11095     &operand_data[23],
11096     2,
11097     0,
11098     1,
11099     1
11100   },
11101   {
11102     "*load_tprel64",
11103     "movl %0 = @tprel(%1)",
11104     0,
11105     &operand_data[23],
11106     2,
11107     0,
11108     1,
11109     1
11110   },
11111   {
11112     "*load_tprel22",
11113     "addl %0 = @tprel(%1), r0",
11114     0,
11115     &operand_data[23],
11116     2,
11117     0,
11118     1,
11119     1
11120   },
11121   {
11122     "*add_tprel14",
11123     "adds %0 = @tprel(%2), %1",
11124     0,
11125     &operand_data[31],
11126     3,
11127     0,
11128     1,
11129     1
11130   },
11131   {
11132     "*add_tprel22",
11133     "addl %0 = @tprel(%2), %1",
11134     0,
11135     &operand_data[34],
11136     3,
11137     0,
11138     1,
11139     1
11140   },
11141   {
11142     "*movti_internal",
11143     "#",
11144     0,
11145     &operand_data[37],
11146     3,
11147     0,
11148     3,
11149     1
11150   },
11151   {
11152     "*movti_internal_reg",
11153     "#",
11154     0,
11155     &operand_data[40],
11156     2,
11157     0,
11158     1,
11159     1
11160   },
11161   {
11162     "*movsf_internal",
11163     (const PTR) output_26,
11164     0,
11165     &operand_data[42],
11166     2,
11167     0,
11168     8,
11169     2
11170   },
11171   {
11172     "*movdf_internal",
11173     (const PTR) output_27,
11174     0,
11175     &operand_data[44],
11176     2,
11177     0,
11178     8,
11179     2
11180   },
11181   {
11182     "*movtf_internal",
11183     (const PTR) output_28,
11184     0,
11185     &operand_data[46],
11186     2,
11187     0,
11188     3,
11189     2
11190   },
11191   {
11192     "extendqidi2",
11193     "sxt1 %0 = %1",
11194     (insn_gen_fn) gen_extendqidi2,
11195     &operand_data[48],
11196     2,
11197     0,
11198     1,
11199     1
11200   },
11201   {
11202     "extendhidi2",
11203     "sxt2 %0 = %1",
11204     (insn_gen_fn) gen_extendhidi2,
11205     &operand_data[50],
11206     2,
11207     0,
11208     1,
11209     1
11210   },
11211   {
11212     "extendsidi2",
11213     (const PTR) output_31,
11214     (insn_gen_fn) gen_extendsidi2,
11215     &operand_data[52],
11216     2,
11217     0,
11218     2,
11219     2
11220   },
11221   {
11222     "zero_extendqidi2",
11223     (const PTR) output_32,
11224     (insn_gen_fn) gen_zero_extendqidi2,
11225     &operand_data[54],
11226     2,
11227     0,
11228     2,
11229     2
11230   },
11231   {
11232     "zero_extendhidi2",
11233     (const PTR) output_33,
11234     (insn_gen_fn) gen_zero_extendhidi2,
11235     &operand_data[56],
11236     2,
11237     0,
11238     2,
11239     2
11240   },
11241   {
11242     "zero_extendsidi2",
11243     (const PTR) output_34,
11244     (insn_gen_fn) gen_zero_extendsidi2,
11245     &operand_data[58],
11246     2,
11247     0,
11248     3,
11249     2
11250   },
11251   {
11252     "extendsfdf2",
11253     "fnorm.d %0 = %1",
11254     (insn_gen_fn) gen_extendsfdf2,
11255     &operand_data[60],
11256     2,
11257     0,
11258     1,
11259     1
11260   },
11261   {
11262     "extendsftf2",
11263     "fnorm %0 = %1",
11264     (insn_gen_fn) gen_extendsftf2,
11265     &operand_data[62],
11266     2,
11267     0,
11268     1,
11269     1
11270   },
11271   {
11272     "extenddftf2",
11273     "fnorm %0 = %1",
11274     (insn_gen_fn) gen_extenddftf2,
11275     &operand_data[64],
11276     2,
11277     0,
11278     1,
11279     1
11280   },
11281   {
11282     "truncdfsf2",
11283     "fnorm.s %0 = %1",
11284     (insn_gen_fn) gen_truncdfsf2,
11285     &operand_data[66],
11286     2,
11287     0,
11288     1,
11289     1
11290   },
11291   {
11292     "trunctfsf2",
11293     "fnorm.s %0 = %1",
11294     (insn_gen_fn) gen_trunctfsf2,
11295     &operand_data[68],
11296     2,
11297     0,
11298     1,
11299     1
11300   },
11301   {
11302     "trunctfdf2",
11303     "fnorm.d %0 = %1",
11304     (insn_gen_fn) gen_trunctfdf2,
11305     &operand_data[70],
11306     2,
11307     0,
11308     1,
11309     1
11310   },
11311   {
11312     "floatditf2",
11313     "fcvt.xf %0 = %1",
11314     (insn_gen_fn) gen_floatditf2,
11315     &operand_data[72],
11316     2,
11317     0,
11318     1,
11319     1
11320   },
11321   {
11322     "fix_truncsfdi2",
11323     "fcvt.fx.trunc %0 = %1",
11324     (insn_gen_fn) gen_fix_truncsfdi2,
11325     &operand_data[74],
11326     2,
11327     0,
11328     1,
11329     1
11330   },
11331   {
11332     "fix_truncdfdi2",
11333     "fcvt.fx.trunc %0 = %1",
11334     (insn_gen_fn) gen_fix_truncdfdi2,
11335     &operand_data[76],
11336     2,
11337     0,
11338     1,
11339     1
11340   },
11341   {
11342     "fix_trunctfdi2",
11343     "fcvt.fx.trunc %0 = %1",
11344     (insn_gen_fn) gen_fix_trunctfdi2,
11345     &operand_data[78],
11346     2,
11347     0,
11348     1,
11349     1
11350   },
11351   {
11352     "fix_trunctfdi2_alts",
11353     "fcvt.fx.trunc.s%2 %0 = %1",
11354     (insn_gen_fn) gen_fix_trunctfdi2_alts,
11355     &operand_data[78],
11356     3,
11357     0,
11358     1,
11359     1
11360   },
11361   {
11362     "floatunsdisf2",
11363     "fcvt.xuf.s %0 = %1",
11364     (insn_gen_fn) gen_floatunsdisf2,
11365     &operand_data[81],
11366     2,
11367     0,
11368     1,
11369     1
11370   },
11371   {
11372     "floatunsdidf2",
11373     "fcvt.xuf.d %0 = %1",
11374     (insn_gen_fn) gen_floatunsdidf2,
11375     &operand_data[83],
11376     2,
11377     0,
11378     1,
11379     1
11380   },
11381   {
11382     "floatunsditf2",
11383     "fcvt.xuf %0 = %1",
11384     (insn_gen_fn) gen_floatunsditf2,
11385     &operand_data[72],
11386     2,
11387     0,
11388     1,
11389     1
11390   },
11391   {
11392     "fixuns_truncsfdi2",
11393     "fcvt.fxu.trunc %0 = %1",
11394     (insn_gen_fn) gen_fixuns_truncsfdi2,
11395     &operand_data[74],
11396     2,
11397     0,
11398     1,
11399     1
11400   },
11401   {
11402     "fixuns_truncdfdi2",
11403     "fcvt.fxu.trunc %0 = %1",
11404     (insn_gen_fn) gen_fixuns_truncdfdi2,
11405     &operand_data[76],
11406     2,
11407     0,
11408     1,
11409     1
11410   },
11411   {
11412     "fixuns_trunctfdi2",
11413     "fcvt.fxu.trunc %0 = %1",
11414     (insn_gen_fn) gen_fixuns_trunctfdi2,
11415     &operand_data[78],
11416     2,
11417     0,
11418     1,
11419     1
11420   },
11421   {
11422     "fixuns_trunctfdi2_alts",
11423     "fcvt.fxu.trunc.s%2 %0 = %1",
11424     (insn_gen_fn) gen_fixuns_trunctfdi2_alts,
11425     &operand_data[78],
11426     3,
11427     0,
11428     1,
11429     1
11430   },
11431   {
11432     "extv",
11433     "extr %0 = %1, %3, %2",
11434     (insn_gen_fn) gen_extv,
11435     &operand_data[85],
11436     4,
11437     0,
11438     1,
11439     1
11440   },
11441   {
11442     "extzv",
11443     "extr.u %0 = %1, %3, %2",
11444     (insn_gen_fn) gen_extzv,
11445     &operand_data[85],
11446     4,
11447     0,
11448     1,
11449     1
11450   },
11451   {
11452     "*insv_internal",
11453     "dep %0 = %3, %0, %2, %1",
11454     0,
11455     &operand_data[89],
11456     4,
11457     0,
11458     1,
11459     1
11460   },
11461   {
11462     "*depz_internal",
11463     (const PTR) output_56,
11464     0,
11465     &operand_data[85],
11466     4,
11467     0,
11468     1,
11469     3
11470   },
11471   {
11472     "shift_mix4left",
11473     "#",
11474     (insn_gen_fn) gen_shift_mix4left,
11475     &operand_data[93],
11476     3,
11477     0,
11478     1,
11479     1
11480   },
11481   {
11482     "*mix4left",
11483     "mix4.l %0 = %0, %r1",
11484     0,
11485     &operand_data[93],
11486     2,
11487     0,
11488     1,
11489     1
11490   },
11491   {
11492     "mix4right",
11493     "mix4.r %0 = %r1, %0",
11494     (insn_gen_fn) gen_mix4right,
11495     &operand_data[96],
11496     2,
11497     0,
11498     1,
11499     1
11500   },
11501   {
11502     "*mix4right_3op",
11503     "mix4.r %0 = %2, %1",
11504     0,
11505     &operand_data[98],
11506     3,
11507     0,
11508     1,
11509     1
11510   },
11511   {
11512     "andbi3",
11513     (const PTR) output_61,
11514     (insn_gen_fn) gen_andbi3,
11515     &operand_data[101],
11516     3,
11517     0,
11518     3,
11519     2
11520   },
11521   {
11522     "*andcmbi3",
11523     (const PTR) output_62,
11524     0,
11525     &operand_data[104],
11526     3,
11527     0,
11528     3,
11529     2
11530   },
11531   {
11532     "iorbi3",
11533     (const PTR) output_63,
11534     (insn_gen_fn) gen_iorbi3,
11535     &operand_data[101],
11536     3,
11537     0,
11538     3,
11539     2
11540   },
11541   {
11542     "*iorcmbi3",
11543     (const PTR) output_64,
11544     0,
11545     &operand_data[107],
11546     3,
11547     0,
11548     2,
11549     2
11550   },
11551   {
11552     "one_cmplbi2",
11553     (const PTR) output_65,
11554     (insn_gen_fn) gen_one_cmplbi2,
11555     &operand_data[110],
11556     3,
11557     0,
11558     4,
11559     2
11560   },
11561   {
11562     "*cmpsi_and_0",
11563     "cmp4.%C4.and.orcm %0, %I0 = %3, %r2",
11564     0,
11565     &operand_data[113],
11566     5,
11567     0,
11568     1,
11569     1
11570   },
11571   {
11572     "*cmpsi_and_1",
11573     "cmp4.%C3.and.orcm %0, %I0 = r0, %2",
11574     0,
11575     &operand_data[118],
11576     4,
11577     0,
11578     1,
11579     1
11580   },
11581   {
11582     "*cmpsi_andnot_0",
11583     "cmp4.%C4.or.andcm %I0, %0 = %3, %r2",
11584     0,
11585     &operand_data[113],
11586     5,
11587     0,
11588     1,
11589     1
11590   },
11591   {
11592     "*cmpsi_andnot_1",
11593     "cmp4.%C3.or.andcm %I0, %0 = r0, %2",
11594     0,
11595     &operand_data[118],
11596     4,
11597     0,
11598     1,
11599     1
11600   },
11601   {
11602     "*cmpdi_and_0",
11603     "cmp.%C4.and.orcm %0, %I0 = %3, %2",
11604     0,
11605     &operand_data[122],
11606     5,
11607     0,
11608     1,
11609     1
11610   },
11611   {
11612     "*cmpdi_and_1",
11613     "cmp.%C3.and.orcm %0, %I0 = r0, %2",
11614     0,
11615     &operand_data[127],
11616     4,
11617     0,
11618     1,
11619     1
11620   },
11621   {
11622     "*cmpdi_andnot_0",
11623     "cmp.%C4.or.andcm %I0, %0 = %3, %2",
11624     0,
11625     &operand_data[122],
11626     5,
11627     0,
11628     1,
11629     1
11630   },
11631   {
11632     "*cmpdi_andnot_1",
11633     "cmp.%C3.or.andcm %I0, %0 = r0, %2",
11634     0,
11635     &operand_data[127],
11636     4,
11637     0,
11638     1,
11639     1
11640   },
11641   {
11642     "*tbit_and_0",
11643     "tbit.nz.and.orcm %0, %I0 = %1, 0",
11644     0,
11645     &operand_data[131],
11646     3,
11647     0,
11648     1,
11649     1
11650   },
11651   {
11652     "*tbit_and_1",
11653     "tbit.z.and.orcm %0, %I0 = %1, 0",
11654     0,
11655     &operand_data[131],
11656     3,
11657     0,
11658     1,
11659     1
11660   },
11661   {
11662     "*tbit_and_2",
11663     "tbit.nz.and.orcm %0, %I0 = %1, %2",
11664     0,
11665     &operand_data[134],
11666     4,
11667     0,
11668     1,
11669     1
11670   },
11671   {
11672     "*tbit_and_3",
11673     "tbit.z.and.orcm %0, %I0 = %1, %2",
11674     0,
11675     &operand_data[134],
11676     4,
11677     0,
11678     1,
11679     1
11680   },
11681   {
11682     "*cmpsi_or_0",
11683     "cmp4.%C4.or.andcm %0, %I0 = %3, %r2",
11684     0,
11685     &operand_data[113],
11686     5,
11687     0,
11688     1,
11689     1
11690   },
11691   {
11692     "*cmpsi_or_1",
11693     "cmp4.%C3.or.andcm %0, %I0 = r0, %2",
11694     0,
11695     &operand_data[118],
11696     4,
11697     0,
11698     1,
11699     1
11700   },
11701   {
11702     "*cmpsi_orcm_0",
11703     "cmp4.%C4.and.orcm %I0, %0 = %3, %r2",
11704     0,
11705     &operand_data[113],
11706     5,
11707     0,
11708     1,
11709     1
11710   },
11711   {
11712     "*cmpsi_orcm_1",
11713     "cmp4.%C3.and.orcm %I0, %0 = r0, %2",
11714     0,
11715     &operand_data[118],
11716     4,
11717     0,
11718     1,
11719     1
11720   },
11721   {
11722     "*cmpdi_or_0",
11723     "cmp.%C4.or.andcm %0, %I0 = %3, %2",
11724     0,
11725     &operand_data[122],
11726     5,
11727     0,
11728     1,
11729     1
11730   },
11731   {
11732     "*cmpdi_or_1",
11733     "cmp.%C3.or.andcm %0, %I0 = r0, %2",
11734     0,
11735     &operand_data[127],
11736     4,
11737     0,
11738     1,
11739     1
11740   },
11741   {
11742     "*cmpdi_orcm_0",
11743     "cmp.%C4.and.orcm %I0, %0 = %3, %2",
11744     0,
11745     &operand_data[122],
11746     5,
11747     0,
11748     1,
11749     1
11750   },
11751   {
11752     "*cmpdi_orcm_1",
11753     "cmp.%C3.and.orcm %I0, %0 = r0, %2",
11754     0,
11755     &operand_data[127],
11756     4,
11757     0,
11758     1,
11759     1
11760   },
11761   {
11762     "*tbit_or_0",
11763     "tbit.nz.or.andcm %0, %I0 = %1, 0",
11764     0,
11765     &operand_data[131],
11766     3,
11767     0,
11768     1,
11769     1
11770   },
11771   {
11772     "*tbit_or_1",
11773     "tbit.z.or.andcm %0, %I0 = %1, 0",
11774     0,
11775     &operand_data[131],
11776     3,
11777     0,
11778     1,
11779     1
11780   },
11781   {
11782     "*tbit_or_2",
11783     "tbit.nz.or.andcm %0, %I0 = %1, %2",
11784     0,
11785     &operand_data[134],
11786     4,
11787     0,
11788     1,
11789     1
11790   },
11791   {
11792     "*tbit_or_3",
11793     "tbit.z.or.andcm %0, %I0 = %1, %2",
11794     0,
11795     &operand_data[134],
11796     4,
11797     0,
11798     1,
11799     1
11800   },
11801   {
11802     "mulhi3",
11803     "pmpy2.r %0 = %1, %2",
11804     (insn_gen_fn) gen_mulhi3,
11805     &operand_data[138],
11806     3,
11807     0,
11808     1,
11809     1
11810   },
11811   {
11812     "addsi3",
11813     (const PTR) output_91,
11814     (insn_gen_fn) gen_addsi3,
11815     &operand_data[141],
11816     3,
11817     0,
11818     3,
11819     2
11820   },
11821   {
11822     "*addsi3_plus1",
11823     "add %0 = %1, %2, 1",
11824     0,
11825     &operand_data[144],
11826     3,
11827     0,
11828     1,
11829     1
11830   },
11831   {
11832     "*addsi3_plus1_alt",
11833     "add %0 = %1, %1, 1",
11834     0,
11835     &operand_data[144],
11836     2,
11837     0,
11838     1,
11839     1
11840   },
11841   {
11842     "*addsi3_shladd",
11843     "shladd %0 = %1, %S2, %3",
11844     0,
11845     &operand_data[147],
11846     4,
11847     0,
11848     1,
11849     1
11850   },
11851   {
11852     "subsi3",
11853     "sub %0 = %1, %2",
11854     (insn_gen_fn) gen_subsi3,
11855     &operand_data[151],
11856     3,
11857     0,
11858     1,
11859     1
11860   },
11861   {
11862     "*subsi3_minus1",
11863     "sub %0 = %2, %1, 1",
11864     0,
11865     &operand_data[144],
11866     3,
11867     0,
11868     1,
11869     1
11870   },
11871   {
11872     "mulsi3",
11873     "xmpy.l %0 = %1, %2",
11874     (insn_gen_fn) gen_mulsi3,
11875     &operand_data[154],
11876     3,
11877     0,
11878     1,
11879     1
11880   },
11881   {
11882     "maddsi4",
11883     "xma.l %0 = %1, %2, %3",
11884     (insn_gen_fn) gen_maddsi4,
11885     &operand_data[154],
11886     4,
11887     0,
11888     1,
11889     1
11890   },
11891   {
11892     "negsi2",
11893     "sub %0 = r0, %1",
11894     (insn_gen_fn) gen_negsi2,
11895     &operand_data[144],
11896     2,
11897     0,
11898     1,
11899     1
11900   },
11901   {
11902     "divsi3_internal",
11903     "#",
11904     (insn_gen_fn) gen_divsi3_internal,
11905     &operand_data[158],
11906     7,
11907     0,
11908     1,
11909     1
11910   },
11911   {
11912     "adddi3",
11913     (const PTR) output_101,
11914     (insn_gen_fn) gen_adddi3,
11915     &operand_data[165],
11916     3,
11917     0,
11918     3,
11919     2
11920   },
11921   {
11922     "*adddi3_plus1",
11923     "add %0 = %1, %2, 1",
11924     0,
11925     &operand_data[168],
11926     3,
11927     0,
11928     1,
11929     1
11930   },
11931   {
11932     "*adddi3_plus1_alt",
11933     "add %0 = %1, %1, 1",
11934     0,
11935     &operand_data[85],
11936     2,
11937     0,
11938     1,
11939     1
11940   },
11941   {
11942     "subdi3",
11943     "sub %0 = %1, %2",
11944     (insn_gen_fn) gen_subdi3,
11945     &operand_data[171],
11946     3,
11947     0,
11948     1,
11949     1
11950   },
11951   {
11952     "*subdi3_minus1",
11953     "sub %0 = %2, %1, 1",
11954     0,
11955     &operand_data[168],
11956     3,
11957     0,
11958     1,
11959     1
11960   },
11961   {
11962     "muldi3",
11963     "xmpy.l %0 = %1, %2",
11964     (insn_gen_fn) gen_muldi3,
11965     &operand_data[174],
11966     3,
11967     0,
11968     1,
11969     1
11970   },
11971   {
11972     "madddi4",
11973     "xma.l %0 = %1, %2, %3",
11974     (insn_gen_fn) gen_madddi4,
11975     &operand_data[174],
11976     5,
11977     0,
11978     1,
11979     1
11980   },
11981   {
11982     "*madddi4_elim",
11983     "#",
11984     0,
11985     &operand_data[179],
11986     6,
11987     0,
11988     1,
11989     1
11990   },
11991   {
11992     "smuldi3_highpart",
11993     "xmpy.h %0 = %1, %2",
11994     (insn_gen_fn) gen_smuldi3_highpart,
11995     &operand_data[185],
11996     3,
11997     0,
11998     1,
11999     1
12000   },
12001   {
12002     "umuldi3_highpart",
12003     "xmpy.hu %0 = %1, %2",
12004     (insn_gen_fn) gen_umuldi3_highpart,
12005     &operand_data[185],
12006     3,
12007     0,
12008     1,
12009     1
12010   },
12011   {
12012     "negdi2",
12013     "sub %0 = r0, %1",
12014     (insn_gen_fn) gen_negdi2,
12015     &operand_data[85],
12016     2,
12017     0,
12018     1,
12019     1
12020   },
12021   {
12022     "*popcnt",
12023     "popcnt %0 = %1",
12024     0,
12025     &operand_data[85],
12026     2,
12027     0,
12028     1,
12029     1
12030   },
12031   {
12032     "divdi3_internal_lat",
12033     "#",
12034     (insn_gen_fn) gen_divdi3_internal_lat,
12035     &operand_data[188],
12036     7,
12037     0,
12038     1,
12039     1
12040   },
12041   {
12042     "divdi3_internal_thr",
12043     "#",
12044     (insn_gen_fn) gen_divdi3_internal_thr,
12045     &operand_data[195],
12046     6,
12047     0,
12048     1,
12049     1
12050   },
12051   {
12052     "addsf3",
12053     "fadd.s %0 = %1, %F2",
12054     (insn_gen_fn) gen_addsf3,
12055     &operand_data[201],
12056     3,
12057     0,
12058     1,
12059     1
12060   },
12061   {
12062     "subsf3",
12063     "fsub.s %0 = %F1, %F2",
12064     (insn_gen_fn) gen_subsf3,
12065     &operand_data[204],
12066     3,
12067     0,
12068     1,
12069     1
12070   },
12071   {
12072     "mulsf3",
12073     "fmpy.s %0 = %1, %2",
12074     (insn_gen_fn) gen_mulsf3,
12075     &operand_data[207],
12076     3,
12077     0,
12078     1,
12079     1
12080   },
12081   {
12082     "abssf2",
12083     "fabs %0 = %1",
12084     (insn_gen_fn) gen_abssf2,
12085     &operand_data[210],
12086     2,
12087     0,
12088     1,
12089     1
12090   },
12091   {
12092     "negsf2",
12093     "fneg %0 = %1",
12094     (insn_gen_fn) gen_negsf2,
12095     &operand_data[210],
12096     2,
12097     0,
12098     1,
12099     1
12100   },
12101   {
12102     "*nabssf2",
12103     "fnegabs %0 = %1",
12104     0,
12105     &operand_data[210],
12106     2,
12107     0,
12108     1,
12109     1
12110   },
12111   {
12112     "minsf3",
12113     "fmin %0 = %1, %F2",
12114     (insn_gen_fn) gen_minsf3,
12115     &operand_data[210],
12116     3,
12117     0,
12118     1,
12119     1
12120   },
12121   {
12122     "maxsf3",
12123     "fmax %0 = %1, %F2",
12124     (insn_gen_fn) gen_maxsf3,
12125     &operand_data[210],
12126     3,
12127     0,
12128     1,
12129     1
12130   },
12131   {
12132     "*maddsf4",
12133     "fma.s %0 = %1, %2, %F3",
12134     0,
12135     &operand_data[213],
12136     4,
12137     0,
12138     1,
12139     1
12140   },
12141   {
12142     "*msubsf4",
12143     "fms.s %0 = %1, %2, %F3",
12144     0,
12145     &operand_data[213],
12146     4,
12147     0,
12148     1,
12149     1
12150   },
12151   {
12152     "*nmulsf3",
12153     "fnmpy.s %0 = %1, %2",
12154     0,
12155     &operand_data[213],
12156     3,
12157     0,
12158     1,
12159     1
12160   },
12161   {
12162     "*nmaddsf4",
12163     "fnma.s %0 = %1, %2, %F3",
12164     0,
12165     &operand_data[213],
12166     4,
12167     0,
12168     1,
12169     1
12170   },
12171   {
12172     "divsf3_internal_lat",
12173     "#",
12174     (insn_gen_fn) gen_divsf3_internal_lat,
12175     &operand_data[217],
12176     6,
12177     0,
12178     1,
12179     1
12180   },
12181   {
12182     "divsf3_internal_thr",
12183     "#",
12184     (insn_gen_fn) gen_divsf3_internal_thr,
12185     &operand_data[217],
12186     6,
12187     0,
12188     1,
12189     1
12190   },
12191   {
12192     "adddf3",
12193     "fadd.d %0 = %1, %F2",
12194     (insn_gen_fn) gen_adddf3,
12195     &operand_data[223],
12196     3,
12197     0,
12198     1,
12199     1
12200   },
12201   {
12202     "*adddf3_trunc",
12203     "fadd.s %0 = %1, %F2",
12204     0,
12205     &operand_data[226],
12206     3,
12207     0,
12208     1,
12209     1
12210   },
12211   {
12212     "subdf3",
12213     "fsub.d %0 = %F1, %F2",
12214     (insn_gen_fn) gen_subdf3,
12215     &operand_data[229],
12216     3,
12217     0,
12218     1,
12219     1
12220   },
12221   {
12222     "*subdf3_trunc",
12223     "fsub.s %0 = %F1, %F2",
12224     0,
12225     &operand_data[232],
12226     3,
12227     0,
12228     1,
12229     1
12230   },
12231   {
12232     "muldf3",
12233     "fmpy.d %0 = %1, %2",
12234     (insn_gen_fn) gen_muldf3,
12235     &operand_data[235],
12236     3,
12237     0,
12238     1,
12239     1
12240   },
12241   {
12242     "*muldf3_trunc",
12243     "fmpy.s %0 = %1, %2",
12244     0,
12245     &operand_data[238],
12246     3,
12247     0,
12248     1,
12249     1
12250   },
12251   {
12252     "absdf2",
12253     "fabs %0 = %1",
12254     (insn_gen_fn) gen_absdf2,
12255     &operand_data[235],
12256     2,
12257     0,
12258     1,
12259     1
12260   },
12261   {
12262     "negdf2",
12263     "fneg %0 = %1",
12264     (insn_gen_fn) gen_negdf2,
12265     &operand_data[235],
12266     2,
12267     0,
12268     1,
12269     1
12270   },
12271   {
12272     "*nabsdf2",
12273     "fnegabs %0 = %1",
12274     0,
12275     &operand_data[235],
12276     2,
12277     0,
12278     1,
12279     1
12280   },
12281   {
12282     "mindf3",
12283     "fmin %0 = %1, %F2",
12284     (insn_gen_fn) gen_mindf3,
12285     &operand_data[241],
12286     3,
12287     0,
12288     1,
12289     1
12290   },
12291   {
12292     "maxdf3",
12293     "fmax %0 = %1, %F2",
12294     (insn_gen_fn) gen_maxdf3,
12295     &operand_data[241],
12296     3,
12297     0,
12298     1,
12299     1
12300   },
12301   {
12302     "*madddf4",
12303     "fma.d %0 = %1, %2, %F3",
12304     0,
12305     &operand_data[244],
12306     4,
12307     0,
12308     1,
12309     1
12310   },
12311   {
12312     "*madddf4_trunc",
12313     "fma.s %0 = %1, %2, %F3",
12314     0,
12315     &operand_data[248],
12316     4,
12317     0,
12318     1,
12319     1
12320   },
12321   {
12322     "*msubdf4",
12323     "fms.d %0 = %1, %2, %F3",
12324     0,
12325     &operand_data[244],
12326     4,
12327     0,
12328     1,
12329     1
12330   },
12331   {
12332     "*msubdf4_trunc",
12333     "fms.s %0 = %1, %2, %F3",
12334     0,
12335     &operand_data[248],
12336     4,
12337     0,
12338     1,
12339     1
12340   },
12341   {
12342     "*nmuldf3",
12343     "fnmpy.d %0 = %1, %2",
12344     0,
12345     &operand_data[235],
12346     3,
12347     0,
12348     1,
12349     1
12350   },
12351   {
12352     "*nmuldf3_trunc",
12353     "fnmpy.s %0 = %1, %2",
12354     0,
12355     &operand_data[238],
12356     3,
12357     0,
12358     1,
12359     1
12360   },
12361   {
12362     "*nmadddf4",
12363     "fnma.d %0 = %1, %2, %F3",
12364     0,
12365     &operand_data[244],
12366     4,
12367     0,
12368     1,
12369     1
12370   },
12371   {
12372     "*nmadddf4_alts",
12373     "fnma.d.s%4 %0 = %1, %2, %F3",
12374     0,
12375     &operand_data[252],
12376     5,
12377     0,
12378     1,
12379     1
12380   },
12381   {
12382     "*nmadddf4_trunc",
12383     "fnma.s %0 = %1, %2, %F3",
12384     0,
12385     &operand_data[248],
12386     4,
12387     0,
12388     1,
12389     1
12390   },
12391   {
12392     "divdf3_internal_lat",
12393     "#",
12394     (insn_gen_fn) gen_divdf3_internal_lat,
12395     &operand_data[257],
12396     7,
12397     0,
12398     1,
12399     1
12400   },
12401   {
12402     "divdf3_internal_thr",
12403     "#",
12404     (insn_gen_fn) gen_divdf3_internal_thr,
12405     &operand_data[264],
12406     6,
12407     0,
12408     1,
12409     1
12410   },
12411   {
12412     "addtf3",
12413     "fadd %0 = %F1, %F2",
12414     (insn_gen_fn) gen_addtf3,
12415     &operand_data[270],
12416     3,
12417     0,
12418     1,
12419     1
12420   },
12421   {
12422     "*addtf3_truncsf",
12423     "fadd.s %0 = %F1, %F2",
12424     0,
12425     &operand_data[273],
12426     3,
12427     0,
12428     1,
12429     1
12430   },
12431   {
12432     "*addtf3_truncdf",
12433     "fadd.d %0 = %F1, %F2",
12434     0,
12435     &operand_data[276],
12436     3,
12437     0,
12438     1,
12439     1
12440   },
12441   {
12442     "subtf3",
12443     "fsub %0 = %F1, %F2",
12444     (insn_gen_fn) gen_subtf3,
12445     &operand_data[270],
12446     3,
12447     0,
12448     1,
12449     1
12450   },
12451   {
12452     "*subtf3_truncsf",
12453     "fsub.s %0 = %F1, %F2",
12454     0,
12455     &operand_data[273],
12456     3,
12457     0,
12458     1,
12459     1
12460   },
12461   {
12462     "*subtf3_truncdf",
12463     "fsub.d %0 = %F1, %F2",
12464     0,
12465     &operand_data[276],
12466     3,
12467     0,
12468     1,
12469     1
12470   },
12471   {
12472     "multf3",
12473     "fmpy %0 = %F1, %F2",
12474     (insn_gen_fn) gen_multf3,
12475     &operand_data[270],
12476     3,
12477     0,
12478     1,
12479     1
12480   },
12481   {
12482     "*multf3_truncsf",
12483     "fmpy.s %0 = %F1, %F2",
12484     0,
12485     &operand_data[273],
12486     3,
12487     0,
12488     1,
12489     1
12490   },
12491   {
12492     "*multf3_truncdf",
12493     "fmpy.d %0 = %F1, %F2",
12494     0,
12495     &operand_data[276],
12496     3,
12497     0,
12498     1,
12499     1
12500   },
12501   {
12502     "*multf3_alts",
12503     "fmpy.s%3 %0 = %F1, %F2",
12504     0,
12505     &operand_data[279],
12506     4,
12507     0,
12508     1,
12509     1
12510   },
12511   {
12512     "*multf3_truncsf_alts",
12513     "fmpy.s.s%3 %0 = %F1, %F2",
12514     0,
12515     &operand_data[283],
12516     4,
12517     0,
12518     1,
12519     1
12520   },
12521   {
12522     "*multf3_truncdf_alts",
12523     "fmpy.d.s%3 %0 = %F1, %F2",
12524     0,
12525     &operand_data[287],
12526     4,
12527     0,
12528     1,
12529     1
12530   },
12531   {
12532     "abstf2",
12533     "fabs %0 = %F1",
12534     (insn_gen_fn) gen_abstf2,
12535     &operand_data[270],
12536     2,
12537     0,
12538     1,
12539     1
12540   },
12541   {
12542     "negtf2",
12543     "fneg %0 = %F1",
12544     (insn_gen_fn) gen_negtf2,
12545     &operand_data[270],
12546     2,
12547     0,
12548     1,
12549     1
12550   },
12551   {
12552     "*nabstf2",
12553     "fnegabs %0 = %F1",
12554     0,
12555     &operand_data[270],
12556     2,
12557     0,
12558     1,
12559     1
12560   },
12561   {
12562     "mintf3",
12563     "fmin %0 = %F1, %F2",
12564     (insn_gen_fn) gen_mintf3,
12565     &operand_data[270],
12566     3,
12567     0,
12568     1,
12569     1
12570   },
12571   {
12572     "maxtf3",
12573     "fmax %0 = %F1, %F2",
12574     (insn_gen_fn) gen_maxtf3,
12575     &operand_data[270],
12576     3,
12577     0,
12578     1,
12579     1
12580   },
12581   {
12582     "*maddtf4",
12583     "fma %0 = %F1, %F2, %F3",
12584     0,
12585     &operand_data[291],
12586     4,
12587     0,
12588     1,
12589     1
12590   },
12591   {
12592     "*maddtf4_truncsf",
12593     "fma.s %0 = %F1, %F2, %F3",
12594     0,
12595     &operand_data[295],
12596     4,
12597     0,
12598     1,
12599     1
12600   },
12601   {
12602     "*maddtf4_truncdf",
12603     "fma.d %0 = %F1, %F2, %F3",
12604     0,
12605     &operand_data[299],
12606     4,
12607     0,
12608     1,
12609     1
12610   },
12611   {
12612     "*maddtf4_alts",
12613     "fma.s%4 %0 = %F1, %F2, %F3",
12614     0,
12615     &operand_data[303],
12616     5,
12617     0,
12618     1,
12619     1
12620   },
12621   {
12622     "*maddtf4_alts_truncdf",
12623     "fma.d.s%4 %0 = %F1, %F2, %F3",
12624     0,
12625     &operand_data[308],
12626     5,
12627     0,
12628     1,
12629     1
12630   },
12631   {
12632     "*msubtf4",
12633     "fms %0 = %F1, %F2, %F3",
12634     0,
12635     &operand_data[291],
12636     4,
12637     0,
12638     1,
12639     1
12640   },
12641   {
12642     "*msubtf4_truncsf",
12643     "fms.s %0 = %F1, %F2, %F3",
12644     0,
12645     &operand_data[295],
12646     4,
12647     0,
12648     1,
12649     1
12650   },
12651   {
12652     "*msubtf4_truncdf",
12653     "fms.d %0 = %F1, %F2, %F3",
12654     0,
12655     &operand_data[299],
12656     4,
12657     0,
12658     1,
12659     1
12660   },
12661   {
12662     "*nmultf3",
12663     "fnmpy %0 = %F1, %F2",
12664     0,
12665     &operand_data[270],
12666     3,
12667     0,
12668     1,
12669     1
12670   },
12671   {
12672     "*nmultf3_truncsf",
12673     "fnmpy.s %0 = %F1, %F2",
12674     0,
12675     &operand_data[273],
12676     3,
12677     0,
12678     1,
12679     1
12680   },
12681   {
12682     "*nmultf3_truncdf",
12683     "fnmpy.d %0 = %F1, %F2",
12684     0,
12685     &operand_data[276],
12686     3,
12687     0,
12688     1,
12689     1
12690   },
12691   {
12692     "*nmaddtf4",
12693     "fnma %0 = %F1, %F2, %F3",
12694     0,
12695     &operand_data[291],
12696     4,
12697     0,
12698     1,
12699     1
12700   },
12701   {
12702     "*nmaddtf4_truncsf",
12703     "fnma.s %0 = %F1, %F2, %F3",
12704     0,
12705     &operand_data[295],
12706     4,
12707     0,
12708     1,
12709     1
12710   },
12711   {
12712     "*nmaddtf4_truncdf",
12713     "fnma.d %0 = %F1, %F2, %F3",
12714     0,
12715     &operand_data[299],
12716     4,
12717     0,
12718     1,
12719     1
12720   },
12721   {
12722     "*nmaddtf4_alts",
12723     "fnma.s%4 %0 = %F1, %F2, %F3",
12724     0,
12725     &operand_data[303],
12726     5,
12727     0,
12728     1,
12729     1
12730   },
12731   {
12732     "*nmaddtf4_truncdf_alts",
12733     "fnma.d.s%4 %0 = %F1, %F2, %F3",
12734     0,
12735     &operand_data[308],
12736     5,
12737     0,
12738     1,
12739     1
12740   },
12741   {
12742     "divtf3_internal_lat",
12743     "#",
12744     (insn_gen_fn) gen_divtf3_internal_lat,
12745     &operand_data[313],
12746     8,
12747     0,
12748     1,
12749     1
12750   },
12751   {
12752     "divtf3_internal_thr",
12753     "#",
12754     (insn_gen_fn) gen_divtf3_internal_thr,
12755     &operand_data[321],
12756     6,
12757     0,
12758     1,
12759     1
12760   },
12761   {
12762     "*recip_approx",
12763     "frcpa.s%4 %0, %1 = %2, %3",
12764     0,
12765     &operand_data[327],
12766     5,
12767     1,
12768     1,
12769     1
12770   },
12771   {
12772     "*ashlsi3_internal",
12773     (const PTR) output_187,
12774     0,
12775     &operand_data[332],
12776     3,
12777     0,
12778     3,
12779     2
12780   },
12781   {
12782     "*rotrsi3_internal",
12783     "#",
12784     0,
12785     &operand_data[335],
12786     3,
12787     0,
12788     1,
12789     1
12790   },
12791   {
12792     "*rotlsi3_internal",
12793     "#",
12794     0,
12795     &operand_data[338],
12796     3,
12797     0,
12798     1,
12799     1
12800   },
12801   {
12802     "ashldi3",
12803     (const PTR) output_190,
12804     (insn_gen_fn) gen_ashldi3,
12805     &operand_data[341],
12806     3,
12807     0,
12808     3,
12809     2
12810   },
12811   {
12812     "*shladd",
12813     "shladd %0 = %1, %S2, %3",
12814     0,
12815     &operand_data[344],
12816     4,
12817     0,
12818     1,
12819     1
12820   },
12821   {
12822     "*shladd_elim",
12823     (const PTR) output_192,
12824     0,
12825     &operand_data[348],
12826     5,
12827     0,
12828     1,
12829     3
12830   },
12831   {
12832     "ashrdi3",
12833     (const PTR) output_193,
12834     (insn_gen_fn) gen_ashrdi3,
12835     &operand_data[353],
12836     3,
12837     0,
12838     2,
12839     2
12840   },
12841   {
12842     "lshrdi3",
12843     (const PTR) output_194,
12844     (insn_gen_fn) gen_lshrdi3,
12845     &operand_data[353],
12846     3,
12847     0,
12848     2,
12849     2
12850   },
12851   {
12852     "*rotrdi3_internal",
12853     "shrp %0 = %1, %1, %2",
12854     0,
12855     &operand_data[356],
12856     3,
12857     0,
12858     1,
12859     1
12860   },
12861   {
12862     "*rotldi3_internal",
12863     "shrp %0 = %1, %1, %e2",
12864     0,
12865     &operand_data[356],
12866     3,
12867     0,
12868     1,
12869     1
12870   },
12871   {
12872     "one_cmplsi2",
12873     "andcm %0 = -1, %1",
12874     (insn_gen_fn) gen_one_cmplsi2,
12875     &operand_data[144],
12876     2,
12877     0,
12878     1,
12879     1
12880   },
12881   {
12882     "anddi3",
12883     (const PTR) output_198,
12884     (insn_gen_fn) gen_anddi3,
12885     &operand_data[359],
12886     3,
12887     0,
12888     2,
12889     2
12890   },
12891   {
12892     "*andnot",
12893     (const PTR) output_199,
12894     0,
12895     &operand_data[362],
12896     3,
12897     0,
12898     2,
12899     2
12900   },
12901   {
12902     "iordi3",
12903     (const PTR) output_200,
12904     (insn_gen_fn) gen_iordi3,
12905     &operand_data[359],
12906     3,
12907     0,
12908     2,
12909     2
12910   },
12911   {
12912     "xordi3",
12913     (const PTR) output_201,
12914     (insn_gen_fn) gen_xordi3,
12915     &operand_data[359],
12916     3,
12917     0,
12918     2,
12919     2
12920   },
12921   {
12922     "one_cmpldi2",
12923     "andcm %0 = -1, %1",
12924     (insn_gen_fn) gen_one_cmpldi2,
12925     &operand_data[85],
12926     2,
12927     0,
12928     1,
12929     1
12930   },
12931   {
12932     "*cmpsi_normal",
12933     "cmp4.%C1 %0, %I0 = %3, %2",
12934     0,
12935     &operand_data[365],
12936     4,
12937     0,
12938     1,
12939     1
12940   },
12941   {
12942     "*cmpsi_adjusted",
12943     "cmp4.%C1 %0, %I0 = %r3, %2",
12944     0,
12945     &operand_data[369],
12946     4,
12947     0,
12948     1,
12949     1
12950   },
12951   {
12952     "*cmpdi_normal",
12953     "cmp.%C1 %0, %I0 = %3, %r2",
12954     0,
12955     &operand_data[373],
12956     4,
12957     0,
12958     1,
12959     1
12960   },
12961   {
12962     "*cmpdi_adjusted",
12963     "cmp.%C1 %0, %I0 = %r3, %2",
12964     0,
12965     &operand_data[377],
12966     4,
12967     0,
12968     1,
12969     1
12970   },
12971   {
12972     "*cmpsf_internal",
12973     "fcmp.%D1 %0, %I0 = %F2, %F3",
12974     0,
12975     &operand_data[381],
12976     4,
12977     0,
12978     1,
12979     1
12980   },
12981   {
12982     "*cmpdf_internal",
12983     "fcmp.%D1 %0, %I0 = %F2, %F3",
12984     0,
12985     &operand_data[385],
12986     4,
12987     0,
12988     1,
12989     1
12990   },
12991   {
12992     "*cmptf_internal",
12993     "fcmp.%D1 %0, %I0 = %F2, %F3",
12994     0,
12995     &operand_data[389],
12996     4,
12997     0,
12998     1,
12999     1
13000   },
13001   {
13002     "*bit_zero",
13003     "tbit.z %0, %I0 = %1, %2",
13004     0,
13005     &operand_data[393],
13006     3,
13007     0,
13008     1,
13009     1
13010   },
13011   {
13012     "*bit_one",
13013     "tbit.nz %0, %I0 = %1, %2",
13014     0,
13015     &operand_data[393],
13016     3,
13017     0,
13018     1,
13019     1
13020   },
13021   {
13022     "*br_true",
13023     "(%J0) br.cond%+ %l2",
13024     0,
13025     &operand_data[396],
13026     3,
13027     0,
13028     1,
13029     1
13030   },
13031   {
13032     "*br_false",
13033     "(%j0) br.cond%+ %l2",
13034     0,
13035     &operand_data[396],
13036     3,
13037     0,
13038     1,
13039     1
13040   },
13041   {
13042     "doloop_end_internal",
13043     "br.cloop.sptk.few %l1",
13044     (insn_gen_fn) gen_doloop_end_internal,
13045     &operand_data[399],
13046     2,
13047     4,
13048     0,
13049     1
13050   },
13051   {
13052     "*sne_internal",
13053     "#",
13054     0,
13055     &operand_data[401],
13056     2,
13057     0,
13058     1,
13059     1
13060   },
13061   {
13062     "*seq_internal",
13063     "#",
13064     0,
13065     &operand_data[401],
13066     2,
13067     0,
13068     1,
13069     1
13070   },
13071   {
13072     "*cmovdi_internal",
13073     (const PTR) output_217,
13074     0,
13075     &operand_data[403],
13076     5,
13077     0,
13078     15,
13079     3
13080   },
13081   {
13082     "*absdi2_internal",
13083     "#",
13084     0,
13085     &operand_data[408],
13086     5,
13087     0,
13088     2,
13089     1
13090   },
13091   {
13092     "*cmovsi_internal",
13093     (const PTR) output_219,
13094     0,
13095     &operand_data[413],
13096     5,
13097     0,
13098     9,
13099     3
13100   },
13101   {
13102     "*abssi2_internal",
13103     "#",
13104     0,
13105     &operand_data[418],
13106     5,
13107     0,
13108     2,
13109     1
13110   },
13111   {
13112     "*cond_opsi2_internal",
13113     "#",
13114     0,
13115     &operand_data[423],
13116     7,
13117     0,
13118     1,
13119     1
13120   },
13121   {
13122     "*cond_opsi2_internal_b",
13123     "#",
13124     0,
13125     &operand_data[423],
13126     7,
13127     0,
13128     1,
13129     1
13130   },
13131   {
13132     "call_nogp",
13133     "br.call%+.many %1 = %0",
13134     (insn_gen_fn) gen_call_nogp,
13135     &operand_data[430],
13136     2,
13137     0,
13138     2,
13139     1
13140   },
13141   {
13142     "call_value_nogp",
13143     "br.call%+.many %2 = %1",
13144     (insn_gen_fn) gen_call_value_nogp,
13145     &operand_data[432],
13146     3,
13147     0,
13148     2,
13149     1
13150   },
13151   {
13152     "sibcall_nogp",
13153     "br%+.many %0",
13154     (insn_gen_fn) gen_sibcall_nogp,
13155     &operand_data[430],
13156     1,
13157     0,
13158     2,
13159     1
13160   },
13161   {
13162     "call_gp",
13163     "#",
13164     (insn_gen_fn) gen_call_gp,
13165     &operand_data[435],
13166     4,
13167     0,
13168     2,
13169     1
13170   },
13171   {
13172     "call_value_gp",
13173     "#",
13174     (insn_gen_fn) gen_call_value_gp,
13175     &operand_data[439],
13176     5,
13177     0,
13178     2,
13179     1
13180   },
13181   {
13182     "sibcall_gp",
13183     "#",
13184     (insn_gen_fn) gen_sibcall_gp,
13185     &operand_data[444],
13186     3,
13187     0,
13188     2,
13189     1
13190   },
13191   {
13192     "return_internal",
13193     "br.ret.sptk.many %0",
13194     (insn_gen_fn) gen_return_internal,
13195     &operand_data[447],
13196     1,
13197     0,
13198     1,
13199     1
13200   },
13201   {
13202     "return",
13203     "br.ret.sptk.many rp",
13204     (insn_gen_fn) gen_return,
13205     &operand_data[0],
13206     0,
13207     0,
13208     0,
13209     1
13210   },
13211   {
13212     "*return_true",
13213     "(%J0) br.ret%+.many rp",
13214     0,
13215     &operand_data[396],
13216     2,
13217     0,
13218     1,
13219     1
13220   },
13221   {
13222     "*return_false",
13223     "(%j0) br.ret%+.many rp",
13224     0,
13225     &operand_data[396],
13226     2,
13227     0,
13228     1,
13229     1
13230   },
13231   {
13232     "jump",
13233     "br %l0",
13234     (insn_gen_fn) gen_jump,
13235     &operand_data[398],
13236     1,
13237     0,
13238     0,
13239     1
13240   },
13241   {
13242     "indirect_jump",
13243     "br %0",
13244     (insn_gen_fn) gen_indirect_jump,
13245     &operand_data[447],
13246     1,
13247     0,
13248     1,
13249     1
13250   },
13251   {
13252     "*tablejump_internal",
13253     "br %0",
13254     0,
13255     &operand_data[447],
13256     2,
13257     0,
13258     1,
13259     1
13260   },
13261   {
13262     "prologue_allocate_stack",
13263     (const PTR) output_236,
13264     (insn_gen_fn) gen_prologue_allocate_stack,
13265     &operand_data[449],
13266     4,
13267     1,
13268     3,
13269     2
13270   },
13271   {
13272     "epilogue_deallocate_stack",
13273     "mov %0 = %1",
13274     (insn_gen_fn) gen_epilogue_deallocate_stack,
13275     &operand_data[453],
13276     2,
13277     2,
13278     1,
13279     1
13280   },
13281   {
13282     "prologue_use",
13283     "",
13284     (insn_gen_fn) gen_prologue_use,
13285     &operand_data[455],
13286     1,
13287     0,
13288     0,
13289     1
13290   },
13291   {
13292     "alloc",
13293     "alloc %0 = ar.pfs, %1, %2, %3, %4",
13294     (insn_gen_fn) gen_alloc,
13295     &operand_data[456],
13296     5,
13297     0,
13298     1,
13299     1
13300   },
13301   {
13302     "gr_spill_internal",
13303     (const PTR) output_240,
13304     (insn_gen_fn) gen_gr_spill_internal,
13305     &operand_data[461],
13306     4,
13307     0,
13308     1,
13309     3
13310   },
13311   {
13312     "gr_restore_internal",
13313     (const PTR) output_241,
13314     (insn_gen_fn) gen_gr_restore_internal,
13315     &operand_data[465],
13316     4,
13317     0,
13318     1,
13319     3
13320   },
13321   {
13322     "fr_spill",
13323     "stf.spill %0 = %1%P0",
13324     (insn_gen_fn) gen_fr_spill,
13325     &operand_data[469],
13326     2,
13327     0,
13328     1,
13329     1
13330   },
13331   {
13332     "fr_restore",
13333     "ldf.fill %0 = %1%P1",
13334     (insn_gen_fn) gen_fr_restore,
13335     &operand_data[471],
13336     2,
13337     0,
13338     1,
13339     1
13340   },
13341   {
13342     "bsp_value",
13343     (const PTR) output_244,
13344     (insn_gen_fn) gen_bsp_value,
13345     &operand_data[14],
13346     1,
13347     0,
13348     1,
13349     3
13350   },
13351   {
13352     "set_bsp",
13353     "flushrs\n\
13354   mov r19=ar.rsc\n\
13355   ;;\n\
13356   and r19=0x1c,r19\n\
13357   ;;\n\
13358   mov ar.rsc=r19\n\
13359   ;;\n\
13360   mov ar.bspstore=%0\n\
13361   ;;\n\
13362   or r19=0x3,r19\n\
13363   ;;\n\
13364   loadrs\n\
13365   invala\n\
13366   ;;\n\
13367   mov ar.rsc=r19",
13368     (insn_gen_fn) gen_set_bsp,
13369     &operand_data[29],
13370     1,
13371     0,
13372     1,
13373     1
13374   },
13375   {
13376     "flushrs",
13377     ";;\n\tflushrs\n\t;;",
13378     (insn_gen_fn) gen_flushrs,
13379     &operand_data[0],
13380     0,
13381     0,
13382     0,
13383     1
13384   },
13385   {
13386     "nop",
13387     "nop 0",
13388     (insn_gen_fn) gen_nop,
13389     &operand_data[0],
13390     0,
13391     0,
13392     0,
13393     1
13394   },
13395   {
13396     "nop_m",
13397     "nop.m 0",
13398     (insn_gen_fn) gen_nop_m,
13399     &operand_data[0],
13400     0,
13401     0,
13402     0,
13403     1
13404   },
13405   {
13406     "nop_i",
13407     "nop.i 0",
13408     (insn_gen_fn) gen_nop_i,
13409     &operand_data[0],
13410     0,
13411     0,
13412     0,
13413     1
13414   },
13415   {
13416     "nop_f",
13417     "nop.f 0",
13418     (insn_gen_fn) gen_nop_f,
13419     &operand_data[0],
13420     0,
13421     0,
13422     0,
13423     1
13424   },
13425   {
13426     "nop_b",
13427     "nop.b 0",
13428     (insn_gen_fn) gen_nop_b,
13429     &operand_data[0],
13430     0,
13431     0,
13432     0,
13433     1
13434   },
13435   {
13436     "nop_x",
13437     "",
13438     (insn_gen_fn) gen_nop_x,
13439     &operand_data[0],
13440     0,
13441     0,
13442     0,
13443     1
13444   },
13445   {
13446     "bundle_selector",
13447     (const PTR) output_253,
13448     (insn_gen_fn) gen_bundle_selector,
13449     &operand_data[473],
13450     1,
13451     0,
13452     0,
13453     3
13454   },
13455   {
13456     "blockage",
13457     "",
13458     (insn_gen_fn) gen_blockage,
13459     &operand_data[0],
13460     0,
13461     0,
13462     0,
13463     1
13464   },
13465   {
13466     "insn_group_barrier",
13467     ";;",
13468     (insn_gen_fn) gen_insn_group_barrier,
13469     &operand_data[473],
13470     1,
13471     0,
13472     0,
13473     1
13474   },
13475   {
13476     "*trap",
13477     "break %0",
13478     0,
13479     &operand_data[473],
13480     1,
13481     0,
13482     0,
13483     1
13484   },
13485   {
13486     "*conditional_trap",
13487     "(%J0) break %2",
13488     0,
13489     &operand_data[474],
13490     3,
13491     0,
13492     1,
13493     1
13494   },
13495   {
13496     "break_f",
13497     "break.f 0",
13498     (insn_gen_fn) gen_break_f,
13499     &operand_data[0],
13500     0,
13501     0,
13502     0,
13503     1
13504   },
13505   {
13506     "prefetch",
13507     (const PTR) output_259,
13508     (insn_gen_fn) gen_prefetch,
13509     &operand_data[477],
13510     3,
13511     0,
13512     1,
13513     3
13514   },
13515   {
13516     "builtin_setjmp_receiver",
13517     "#",
13518     (insn_gen_fn) gen_builtin_setjmp_receiver,
13519     &operand_data[480],
13520     1,
13521     0,
13522     0,
13523     1
13524   },
13525   {
13526     "*mf_internal",
13527     "mf",
13528     0,
13529     &operand_data[481],
13530     2,
13531     0,
13532     0,
13533     1
13534   },
13535   {
13536     "fetchadd_acq_si",
13537     "fetchadd4.acq %0 = %1, %2",
13538     (insn_gen_fn) gen_fetchadd_acq_si,
13539     &operand_data[483],
13540     3,
13541     2,
13542     1,
13543     1
13544   },
13545   {
13546     "fetchadd_acq_di",
13547     "fetchadd8.acq %0 = %1, %2",
13548     (insn_gen_fn) gen_fetchadd_acq_di,
13549     &operand_data[486],
13550     3,
13551     2,
13552     1,
13553     1
13554   },
13555   {
13556     "cmpxchg_acq_si",
13557     "cmpxchg4.acq %0 = %1, %2, %3",
13558     (insn_gen_fn) gen_cmpxchg_acq_si,
13559     &operand_data[489],
13560     4,
13561     2,
13562     1,
13563     1
13564   },
13565   {
13566     "cmpxchg_acq_di",
13567     "cmpxchg8.acq %0 = %1, %2, %3",
13568     (insn_gen_fn) gen_cmpxchg_acq_di,
13569     &operand_data[493],
13570     4,
13571     2,
13572     1,
13573     1
13574   },
13575   {
13576     "xchgsi",
13577     "xchg4 %0 = %1, %2",
13578     (insn_gen_fn) gen_xchgsi,
13579     &operand_data[489],
13580     3,
13581     1,
13582     1,
13583     1
13584   },
13585   {
13586     "xchgdi",
13587     "xchg8 %0 = %1, %2",
13588     (insn_gen_fn) gen_xchgdi,
13589     &operand_data[493],
13590     3,
13591     1,
13592     1,
13593     1
13594   },
13595   {
13596     "pred_rel_mutex",
13597     ".pred.rel.mutex %0, %I0",
13598     (insn_gen_fn) gen_pred_rel_mutex,
13599     &operand_data[497],
13600     1,
13601     1,
13602     1,
13603     1
13604   },
13605   {
13606     "safe_across_calls_all",
13607     ".pred.safe_across_calls p1-p63",
13608     (insn_gen_fn) gen_safe_across_calls_all,
13609     &operand_data[0],
13610     0,
13611     0,
13612     0,
13613     1
13614   },
13615   {
13616     "safe_across_calls_normal",
13617     (const PTR) output_270,
13618     (insn_gen_fn) gen_safe_across_calls_normal,
13619     &operand_data[0],
13620     0,
13621     0,
13622     0,
13623     3
13624   },
13625   {
13626     "ptr_extend",
13627     "addp4 %0 = 0,%1",
13628     (insn_gen_fn) gen_ptr_extend,
13629     &operand_data[98],
13630     2,
13631     0,
13632     1,
13633     1
13634   },
13635   {
13636     "*ptr_extend_plus_1",
13637     "addp4 %0 = %2, %1",
13638     0,
13639     &operand_data[498],
13640     3,
13641     0,
13642     1,
13643     1
13644   },
13645   {
13646     "*ptr_extend_plus_2",
13647     "addp4 %0 = %1, %2",
13648     0,
13649     &operand_data[501],
13650     3,
13651     0,
13652     1,
13653     1
13654   },
13655   {
13656     "*ptr_extend_plus_2+1",
13657     0,
13658     0,
13659     &operand_data[504],
13660     2,
13661     0,
13662     0,
13663     0
13664   },
13665   {
13666     "movqi-1",
13667     0,
13668     0,
13669     &operand_data[504],
13670     2,
13671     0,
13672     0,
13673     0
13674   },
13675   {
13676     "movqi",
13677     0,
13678     (insn_gen_fn) gen_movqi,
13679     &operand_data[506],
13680     2,
13681     0,
13682     0,
13683     0
13684   },
13685   {
13686     "movhi",
13687     0,
13688     (insn_gen_fn) gen_movhi,
13689     &operand_data[508],
13690     2,
13691     0,
13692     0,
13693     0
13694   },
13695   {
13696     "movsi",
13697     0,
13698     (insn_gen_fn) gen_movsi,
13699     &operand_data[510],
13700     2,
13701     0,
13702     0,
13703     0
13704   },
13705   {
13706     "movsi+1",
13707     0,
13708     0,
13709     &operand_data[512],
13710     3,
13711     0,
13712     0,
13713     0
13714   },
13715   {
13716     "movdi",
13717     0,
13718     (insn_gen_fn) gen_movdi,
13719     &operand_data[515],
13720     2,
13721     0,
13722     0,
13723     0
13724   },
13725   {
13726     "movdi+1",
13727     0,
13728     0,
13729     &operand_data[517],
13730     3,
13731     0,
13732     0,
13733     0
13734   },
13735   {
13736     "load_fptr-1",
13737     0,
13738     0,
13739     &operand_data[517],
13740     2,
13741     0,
13742     0,
13743     0
13744   },
13745   {
13746     "load_fptr",
13747     0,
13748     (insn_gen_fn) gen_load_fptr,
13749     &operand_data[520],
13750     2,
13751     2,
13752     0,
13753     0
13754   },
13755   {
13756     "load_gprel64",
13757     0,
13758     (insn_gen_fn) gen_load_gprel64,
13759     &operand_data[517],
13760     2,
13761     4,
13762     0,
13763     0
13764   },
13765   {
13766     "load_symptr",
13767     0,
13768     (insn_gen_fn) gen_load_symptr,
13769     &operand_data[522],
13770     3,
13771     3,
13772     0,
13773     0
13774   },
13775   {
13776     "load_dtprel",
13777     0,
13778     (insn_gen_fn) gen_load_dtprel,
13779     &operand_data[517],
13780     2,
13781     0,
13782     0,
13783     0
13784   },
13785   {
13786     "add_dtprel",
13787     0,
13788     (insn_gen_fn) gen_add_dtprel,
13789     &operand_data[524],
13790     3,
13791     0,
13792     0,
13793     0
13794   },
13795   {
13796     "load_tprel",
13797     0,
13798     (insn_gen_fn) gen_load_tprel,
13799     &operand_data[517],
13800     2,
13801     0,
13802     0,
13803     0
13804   },
13805   {
13806     "add_tprel",
13807     0,
13808     (insn_gen_fn) gen_add_tprel,
13809     &operand_data[524],
13810     3,
13811     0,
13812     0,
13813     0
13814   },
13815   {
13816     "movti",
13817     0,
13818     (insn_gen_fn) gen_movti,
13819     &operand_data[527],
13820     3,
13821     0,
13822     0,
13823     0
13824   },
13825   {
13826     "movti+1",
13827     0,
13828     0,
13829     &operand_data[530],
13830     3,
13831     0,
13832     0,
13833     0
13834   },
13835   {
13836     "reload_inti-1",
13837     0,
13838     0,
13839     &operand_data[533],
13840     2,
13841     0,
13842     0,
13843     0
13844   },
13845   {
13846     "reload_inti",
13847     0,
13848     (insn_gen_fn) gen_reload_inti,
13849     &operand_data[535],
13850     3,
13851     0,
13852     1,
13853     0
13854   },
13855   {
13856     "reload_outti",
13857     0,
13858     (insn_gen_fn) gen_reload_outti,
13859     &operand_data[538],
13860     3,
13861     0,
13862     1,
13863     0
13864   },
13865   {
13866     "movsf",
13867     0,
13868     (insn_gen_fn) gen_movsf,
13869     &operand_data[541],
13870     2,
13871     0,
13872     0,
13873     0
13874   },
13875   {
13876     "movdf",
13877     0,
13878     (insn_gen_fn) gen_movdf,
13879     &operand_data[543],
13880     2,
13881     0,
13882     0,
13883     0
13884   },
13885   {
13886     "movtf",
13887     0,
13888     (insn_gen_fn) gen_movtf,
13889     &operand_data[545],
13890     2,
13891     0,
13892     0,
13893     0
13894   },
13895   {
13896     "insv",
13897     0,
13898     (insn_gen_fn) gen_insv,
13899     &operand_data[547],
13900     4,
13901     0,
13902     0,
13903     0
13904   },
13905   {
13906     "insv+1",
13907     0,
13908     0,
13909     &operand_data[551],
13910     3,
13911     0,
13912     0,
13913     0
13914   },
13915   {
13916     "insv+2",
13917     0,
13918     0,
13919     &operand_data[551],
13920     3,
13921     0,
13922     0,
13923     0
13924   },
13925   {
13926     "insv+3",
13927     0,
13928     0,
13929     &operand_data[554],
13930     3,
13931     0,
13932     0,
13933     0
13934   },
13935   {
13936     "insv+4",
13937     0,
13938     0,
13939     &operand_data[554],
13940     3,
13941     0,
13942     0,
13943     0
13944   },
13945   {
13946     "insv+5",
13947     0,
13948     0,
13949     &operand_data[554],
13950     3,
13951     0,
13952     0,
13953     0
13954   },
13955   {
13956     "insv+6",
13957     0,
13958     0,
13959     &operand_data[554],
13960     3,
13961     0,
13962     0,
13963     0
13964   },
13965   {
13966     "insv+7",
13967     0,
13968     0,
13969     &operand_data[555],
13970     3,
13971     0,
13972     0,
13973     0
13974   },
13975   {
13976     "abssi2-6",
13977     0,
13978     0,
13979     &operand_data[555],
13980     3,
13981     0,
13982     0,
13983     0
13984   },
13985   {
13986     "abssi2-5",
13987     0,
13988     0,
13989     &operand_data[558],
13990     4,
13991     0,
13992     0,
13993     0
13994   },
13995   {
13996     "abssi2-4",
13997     0,
13998     0,
13999     &operand_data[558],
14000     4,
14001     0,
14002     0,
14003     0
14004   },
14005   {
14006     "abssi2-3",
14007     0,
14008     0,
14009     &operand_data[558],
14010     4,
14011     0,
14012     0,
14013     0
14014   },
14015   {
14016     "abssi2-2",
14017     0,
14018     0,
14019     &operand_data[558],
14020     4,
14021     0,
14022     0,
14023     0
14024   },
14025   {
14026     "abssi2-1",
14027     0,
14028     0,
14029     &operand_data[562],
14030     7,
14031     0,
14032     0,
14033     0
14034   },
14035   {
14036     "abssi2",
14037     0,
14038     (insn_gen_fn) gen_abssi2,
14039     &operand_data[569],
14040     2,
14041     4,
14042     0,
14043     0
14044   },
14045   {
14046     "sminsi3",
14047     0,
14048     (insn_gen_fn) gen_sminsi3,
14049     &operand_data[569],
14050     3,
14051     4,
14052     0,
14053     0
14054   },
14055   {
14056     "smaxsi3",
14057     0,
14058     (insn_gen_fn) gen_smaxsi3,
14059     &operand_data[569],
14060     3,
14061     4,
14062     0,
14063     0
14064   },
14065   {
14066     "uminsi3",
14067     0,
14068     (insn_gen_fn) gen_uminsi3,
14069     &operand_data[569],
14070     3,
14071     4,
14072     0,
14073     0
14074   },
14075   {
14076     "umaxsi3",
14077     0,
14078     (insn_gen_fn) gen_umaxsi3,
14079     &operand_data[569],
14080     3,
14081     4,
14082     0,
14083     0
14084   },
14085   {
14086     "divsi3",
14087     0,
14088     (insn_gen_fn) gen_divsi3,
14089     &operand_data[572],
14090     3,
14091     0,
14092     0,
14093     0
14094   },
14095   {
14096     "modsi3",
14097     0,
14098     (insn_gen_fn) gen_modsi3,
14099     &operand_data[572],
14100     3,
14101     0,
14102     0,
14103     0
14104   },
14105   {
14106     "udivsi3",
14107     0,
14108     (insn_gen_fn) gen_udivsi3,
14109     &operand_data[572],
14110     3,
14111     0,
14112     0,
14113     0
14114   },
14115   {
14116     "umodsi3",
14117     0,
14118     (insn_gen_fn) gen_umodsi3,
14119     &operand_data[572],
14120     3,
14121     0,
14122     0,
14123     0
14124   },
14125   {
14126     "umodsi3+1",
14127     0,
14128     0,
14129     &operand_data[575],
14130     7,
14131     0,
14132     0,
14133     0
14134   },
14135   {
14136     "absdi2-1",
14137     0,
14138     0,
14139     &operand_data[582],
14140     6,
14141     0,
14142     0,
14143     0
14144   },
14145   {
14146     "absdi2",
14147     0,
14148     (insn_gen_fn) gen_absdi2,
14149     &operand_data[588],
14150     2,
14151     4,
14152     0,
14153     0
14154   },
14155   {
14156     "smindi3",
14157     0,
14158     (insn_gen_fn) gen_smindi3,
14159     &operand_data[588],
14160     3,
14161     4,
14162     0,
14163     0
14164   },
14165   {
14166     "smaxdi3",
14167     0,
14168     (insn_gen_fn) gen_smaxdi3,
14169     &operand_data[588],
14170     3,
14171     4,
14172     0,
14173     0
14174   },
14175   {
14176     "umindi3",
14177     0,
14178     (insn_gen_fn) gen_umindi3,
14179     &operand_data[588],
14180     3,
14181     4,
14182     0,
14183     0
14184   },
14185   {
14186     "umaxdi3",
14187     0,
14188     (insn_gen_fn) gen_umaxdi3,
14189     &operand_data[588],
14190     3,
14191     4,
14192     0,
14193     0
14194   },
14195   {
14196     "ffsdi2",
14197     0,
14198     (insn_gen_fn) gen_ffsdi2,
14199     &operand_data[588],
14200     2,
14201     12,
14202     0,
14203     0
14204   },
14205   {
14206     "divdi3",
14207     0,
14208     (insn_gen_fn) gen_divdi3,
14209     &operand_data[591],
14210     3,
14211     0,
14212     0,
14213     0
14214   },
14215   {
14216     "moddi3",
14217     0,
14218     (insn_gen_fn) gen_moddi3,
14219     &operand_data[591],
14220     3,
14221     0,
14222     0,
14223     0
14224   },
14225   {
14226     "udivdi3",
14227     0,
14228     (insn_gen_fn) gen_udivdi3,
14229     &operand_data[591],
14230     3,
14231     0,
14232     0,
14233     0
14234   },
14235   {
14236     "umoddi3",
14237     0,
14238     (insn_gen_fn) gen_umoddi3,
14239     &operand_data[591],
14240     3,
14241     0,
14242     0,
14243     0
14244   },
14245   {
14246     "umoddi3+1",
14247     0,
14248     0,
14249     &operand_data[594],
14250     7,
14251     0,
14252     0,
14253     0
14254   },
14255   {
14256     "divsf3-1",
14257     0,
14258     0,
14259     &operand_data[576],
14260     6,
14261     0,
14262     0,
14263     0
14264   },
14265   {
14266     "divsf3",
14267     0,
14268     (insn_gen_fn) gen_divsf3,
14269     &operand_data[601],
14270     3,
14271     0,
14272     0,
14273     0
14274   },
14275   {
14276     "divsf3+1",
14277     0,
14278     0,
14279     &operand_data[601],
14280     6,
14281     0,
14282     0,
14283     0
14284   },
14285   {
14286     "divdf3-1",
14287     0,
14288     0,
14289     &operand_data[601],
14290     6,
14291     0,
14292     0,
14293     0
14294   },
14295   {
14296     "divdf3",
14297     0,
14298     (insn_gen_fn) gen_divdf3,
14299     &operand_data[607],
14300     3,
14301     0,
14302     0,
14303     0
14304   },
14305   {
14306     "divdf3+1",
14307     0,
14308     0,
14309     &operand_data[607],
14310     7,
14311     0,
14312     0,
14313     0
14314   },
14315   {
14316     "divtf3-1",
14317     0,
14318     0,
14319     &operand_data[614],
14320     6,
14321     0,
14322     0,
14323     0
14324   },
14325   {
14326     "divtf3",
14327     0,
14328     (insn_gen_fn) gen_divtf3,
14329     &operand_data[575],
14330     3,
14331     0,
14332     0,
14333     0
14334   },
14335   {
14336     "divtf3+1",
14337     0,
14338     0,
14339     &operand_data[620],
14340     8,
14341     0,
14342     0,
14343     0
14344   },
14345   {
14346     "ashlsi3-1",
14347     0,
14348     0,
14349     &operand_data[576],
14350     6,
14351     0,
14352     0,
14353     0
14354   },
14355   {
14356     "ashlsi3",
14357     0,
14358     (insn_gen_fn) gen_ashlsi3,
14359     &operand_data[628],
14360     3,
14361     0,
14362     0,
14363     0
14364   },
14365   {
14366     "ashrsi3",
14367     0,
14368     (insn_gen_fn) gen_ashrsi3,
14369     &operand_data[628],
14370     3,
14371     0,
14372     0,
14373     0
14374   },
14375   {
14376     "lshrsi3",
14377     0,
14378     (insn_gen_fn) gen_lshrsi3,
14379     &operand_data[628],
14380     3,
14381     0,
14382     0,
14383     0
14384   },
14385   {
14386     "rotrsi3",
14387     0,
14388     (insn_gen_fn) gen_rotrsi3,
14389     &operand_data[628],
14390     3,
14391     0,
14392     0,
14393     0
14394   },
14395   {
14396     "rotrsi3+1",
14397     0,
14398     0,
14399     &operand_data[631],
14400     3,
14401     0,
14402     0,
14403     0
14404   },
14405   {
14406     "rotlsi3",
14407     0,
14408     (insn_gen_fn) gen_rotlsi3,
14409     &operand_data[628],
14410     3,
14411     0,
14412     0,
14413     0
14414   },
14415   {
14416     "rotlsi3+1",
14417     0,
14418     0,
14419     &operand_data[634],
14420     3,
14421     0,
14422     0,
14423     0
14424   },
14425   {
14426     "rotrdi3-1",
14427     0,
14428     0,
14429     &operand_data[637],
14430     5,
14431     0,
14432     0,
14433     0
14434   },
14435   {
14436     "rotrdi3",
14437     0,
14438     (insn_gen_fn) gen_rotrdi3,
14439     &operand_data[642],
14440     3,
14441     0,
14442     0,
14443     0
14444   },
14445   {
14446     "rotldi3",
14447     0,
14448     (insn_gen_fn) gen_rotldi3,
14449     &operand_data[642],
14450     3,
14451     0,
14452     0,
14453     0
14454   },
14455   {
14456     "cmpbi",
14457     0,
14458     (insn_gen_fn) gen_cmpbi,
14459     &operand_data[645],
14460     2,
14461     0,
14462     0,
14463     0
14464   },
14465   {
14466     "cmpsi",
14467     0,
14468     (insn_gen_fn) gen_cmpsi,
14469     &operand_data[647],
14470     2,
14471     0,
14472     0,
14473     0
14474   },
14475   {
14476     "cmpdi",
14477     0,
14478     (insn_gen_fn) gen_cmpdi,
14479     &operand_data[649],
14480     2,
14481     0,
14482     0,
14483     0
14484   },
14485   {
14486     "cmpsf",
14487     0,
14488     (insn_gen_fn) gen_cmpsf,
14489     &operand_data[651],
14490     2,
14491     0,
14492     0,
14493     0
14494   },
14495   {
14496     "cmpdf",
14497     0,
14498     (insn_gen_fn) gen_cmpdf,
14499     &operand_data[653],
14500     2,
14501     0,
14502     0,
14503     0
14504   },
14505   {
14506     "cmptf",
14507     0,
14508     (insn_gen_fn) gen_cmptf,
14509     &operand_data[655],
14510     2,
14511     0,
14512     0,
14513     0
14514   },
14515   {
14516     "beq",
14517     0,
14518     (insn_gen_fn) gen_beq,
14519     &operand_data[398],
14520     1,
14521     1,
14522     0,
14523     0
14524   },
14525   {
14526     "bne",
14527     0,
14528     (insn_gen_fn) gen_bne,
14529     &operand_data[398],
14530     1,
14531     1,
14532     0,
14533     0
14534   },
14535   {
14536     "blt",
14537     0,
14538     (insn_gen_fn) gen_blt,
14539     &operand_data[398],
14540     1,
14541     1,
14542     0,
14543     0
14544   },
14545   {
14546     "ble",
14547     0,
14548     (insn_gen_fn) gen_ble,
14549     &operand_data[398],
14550     1,
14551     1,
14552     0,
14553     0
14554   },
14555   {
14556     "bgt",
14557     0,
14558     (insn_gen_fn) gen_bgt,
14559     &operand_data[398],
14560     1,
14561     1,
14562     0,
14563     0
14564   },
14565   {
14566     "bge",
14567     0,
14568     (insn_gen_fn) gen_bge,
14569     &operand_data[398],
14570     1,
14571     1,
14572     0,
14573     0
14574   },
14575   {
14576     "bltu",
14577     0,
14578     (insn_gen_fn) gen_bltu,
14579     &operand_data[398],
14580     1,
14581     1,
14582     0,
14583     0
14584   },
14585   {
14586     "bleu",
14587     0,
14588     (insn_gen_fn) gen_bleu,
14589     &operand_data[398],
14590     1,
14591     1,
14592     0,
14593     0
14594   },
14595   {
14596     "bgtu",
14597     0,
14598     (insn_gen_fn) gen_bgtu,
14599     &operand_data[398],
14600     1,
14601     1,
14602     0,
14603     0
14604   },
14605   {
14606     "bgeu",
14607     0,
14608     (insn_gen_fn) gen_bgeu,
14609     &operand_data[398],
14610     1,
14611     1,
14612     0,
14613     0
14614   },
14615   {
14616     "bunordered",
14617     0,
14618     (insn_gen_fn) gen_bunordered,
14619     &operand_data[398],
14620     1,
14621     1,
14622     0,
14623     0
14624   },
14625   {
14626     "bordered",
14627     0,
14628     (insn_gen_fn) gen_bordered,
14629     &operand_data[398],
14630     1,
14631     1,
14632     0,
14633     0
14634   },
14635   {
14636     "doloop_end",
14637     0,
14638     (insn_gen_fn) gen_doloop_end,
14639     &operand_data[657],
14640     5,
14641     0,
14642     0,
14643     0
14644   },
14645   {
14646     "seq",
14647     0,
14648     (insn_gen_fn) gen_seq,
14649     &operand_data[547],
14650     1,
14651     1,
14652     0,
14653     0
14654   },
14655   {
14656     "sne",
14657     0,
14658     (insn_gen_fn) gen_sne,
14659     &operand_data[547],
14660     1,
14661     1,
14662     0,
14663     0
14664   },
14665   {
14666     "slt",
14667     0,
14668     (insn_gen_fn) gen_slt,
14669     &operand_data[547],
14670     1,
14671     1,
14672     0,
14673     0
14674   },
14675   {
14676     "sle",
14677     0,
14678     (insn_gen_fn) gen_sle,
14679     &operand_data[547],
14680     1,
14681     1,
14682     0,
14683     0
14684   },
14685   {
14686     "sgt",
14687     0,
14688     (insn_gen_fn) gen_sgt,
14689     &operand_data[547],
14690     1,
14691     1,
14692     0,
14693     0
14694   },
14695   {
14696     "sge",
14697     0,
14698     (insn_gen_fn) gen_sge,
14699     &operand_data[547],
14700     1,
14701     1,
14702     0,
14703     0
14704   },
14705   {
14706     "sltu",
14707     0,
14708     (insn_gen_fn) gen_sltu,
14709     &operand_data[547],
14710     1,
14711     1,
14712     0,
14713     0
14714   },
14715   {
14716     "sleu",
14717     0,
14718     (insn_gen_fn) gen_sleu,
14719     &operand_data[547],
14720     1,
14721     1,
14722     0,
14723     0
14724   },
14725   {
14726     "sgtu",
14727     0,
14728     (insn_gen_fn) gen_sgtu,
14729     &operand_data[547],
14730     1,
14731     1,
14732     0,
14733     0
14734   },
14735   {
14736     "sgeu",
14737     0,
14738     (insn_gen_fn) gen_sgeu,
14739     &operand_data[547],
14740     1,
14741     1,
14742     0,
14743     0
14744   },
14745   {
14746     "sunordered",
14747     0,
14748     (insn_gen_fn) gen_sunordered,
14749     &operand_data[547],
14750     1,
14751     1,
14752     0,
14753     0
14754   },
14755   {
14756     "sordered",
14757     0,
14758     (insn_gen_fn) gen_sordered,
14759     &operand_data[547],
14760     1,
14761     1,
14762     0,
14763     0
14764   },
14765   {
14766     "sordered+1",
14767     0,
14768     0,
14769     &operand_data[662],
14770     2,
14771     0,
14772     0,
14773     0
14774   },
14775   {
14776     "sordered+2",
14777     0,
14778     0,
14779     &operand_data[662],
14780     2,
14781     0,
14782     0,
14783     0
14784   },
14785   {
14786     "sordered+3",
14787     0,
14788     0,
14789     &operand_data[664],
14790     5,
14791     0,
14792     0,
14793     0
14794   },
14795   {
14796     "sordered+4",
14797     0,
14798     0,
14799     &operand_data[669],
14800     5,
14801     0,
14802     0,
14803     0
14804   },
14805   {
14806     "sordered+5",
14807     0,
14808     0,
14809     &operand_data[669],
14810     5,
14811     0,
14812     0,
14813     0
14814   },
14815   {
14816     "call-4",
14817     0,
14818     0,
14819     &operand_data[674],
14820     5,
14821     0,
14822     0,
14823     0
14824   },
14825   {
14826     "call-3",
14827     0,
14828     0,
14829     &operand_data[674],
14830     5,
14831     0,
14832     0,
14833     0
14834   },
14835   {
14836     "call-2",
14837     0,
14838     0,
14839     &operand_data[679],
14840     7,
14841     0,
14842     0,
14843     0
14844   },
14845   {
14846     "call-1",
14847     0,
14848     0,
14849     &operand_data[679],
14850     7,
14851     0,
14852     0,
14853     0
14854   },
14855   {
14856     "call",
14857     0,
14858     (insn_gen_fn) gen_call,
14859     &operand_data[686],
14860     4,
14861     0,
14862     0,
14863     0
14864   },
14865   {
14866     "sibcall",
14867     0,
14868     (insn_gen_fn) gen_sibcall,
14869     &operand_data[686],
14870     4,
14871     0,
14872     0,
14873     0
14874   },
14875   {
14876     "call_value",
14877     0,
14878     (insn_gen_fn) gen_call_value,
14879     &operand_data[689],
14880     5,
14881     0,
14882     0,
14883     0
14884   },
14885   {
14886     "sibcall_value",
14887     0,
14888     (insn_gen_fn) gen_sibcall_value,
14889     &operand_data[689],
14890     5,
14891     0,
14892     0,
14893     0
14894   },
14895   {
14896     "untyped_call",
14897     0,
14898     (insn_gen_fn) gen_untyped_call,
14899     &operand_data[657],
14900     3,
14901     0,
14902     0,
14903     0
14904   },
14905   {
14906     "untyped_call+1",
14907     0,
14908     0,
14909     &operand_data[694],
14910     4,
14911     0,
14912     0,
14913     0
14914   },
14915   {
14916     "untyped_call+2",
14917     0,
14918     0,
14919     &operand_data[694],
14920     4,
14921     0,
14922     0,
14923     0
14924   },
14925   {
14926     "untyped_call+3",
14927     0,
14928     0,
14929     &operand_data[698],
14930     5,
14931     0,
14932     0,
14933     0
14934   },
14935   {
14936     "tablejump-2",
14937     0,
14938     0,
14939     &operand_data[698],
14940     5,
14941     0,
14942     0,
14943     0
14944   },
14945   {
14946     "tablejump-1",
14947     0,
14948     0,
14949     &operand_data[703],
14950     3,
14951     0,
14952     0,
14953     0
14954   },
14955   {
14956     "tablejump",
14957     0,
14958     (insn_gen_fn) gen_tablejump,
14959     &operand_data[706],
14960     2,
14961     0,
14962     0,
14963     0
14964   },
14965   {
14966     "prologue",
14967     0,
14968     (insn_gen_fn) gen_prologue,
14969     &operand_data[0],
14970     0,
14971     0,
14972     0,
14973     0
14974   },
14975   {
14976     "epilogue",
14977     0,
14978     (insn_gen_fn) gen_epilogue,
14979     &operand_data[0],
14980     0,
14981     0,
14982     0,
14983     0
14984   },
14985   {
14986     "sibcall_epilogue",
14987     0,
14988     (insn_gen_fn) gen_sibcall_epilogue,
14989     &operand_data[0],
14990     0,
14991     0,
14992     0,
14993     0
14994   },
14995   {
14996     "gr_spill",
14997     0,
14998     (insn_gen_fn) gen_gr_spill,
14999     &operand_data[461],
15000     3,
15001     1,
15002     1,
15003     0
15004   },
15005   {
15006     "gr_restore",
15007     0,
15008     (insn_gen_fn) gen_gr_restore,
15009     &operand_data[465],
15010     3,
15011     1,
15012     1,
15013     0
15014   },
15015   {
15016     "trap",
15017     0,
15018     (insn_gen_fn) gen_trap,
15019     &operand_data[0],
15020     0,
15021     0,
15022     0,
15023     0
15024   },
15025   {
15026     "conditional_trap",
15027     0,
15028     (insn_gen_fn) gen_conditional_trap,
15029     &operand_data[657],
15030     2,
15031     0,
15032     0,
15033     0
15034   },
15035   {
15036     "save_stack_nonlocal",
15037     0,
15038     (insn_gen_fn) gen_save_stack_nonlocal,
15039     &operand_data[708],
15040     2,
15041     0,
15042     0,
15043     0
15044   },
15045   {
15046     "nonlocal_goto",
15047     0,
15048     (insn_gen_fn) gen_nonlocal_goto,
15049     &operand_data[710],
15050     4,
15051     0,
15052     0,
15053     0
15054   },
15055   {
15056     "nonlocal_goto+1",
15057     0,
15058     0,
15059     &operand_data[480],
15060     1,
15061     0,
15062     0,
15063     0
15064   },
15065   {
15066     "eh_epilogue",
15067     0,
15068     (insn_gen_fn) gen_eh_epilogue,
15069     &operand_data[714],
15070     3,
15071     0,
15072     1,
15073     0
15074   },
15075   {
15076     "restore_stack_nonlocal",
15077     0,
15078     (insn_gen_fn) gen_restore_stack_nonlocal,
15079     &operand_data[717],
15080     2,
15081     0,
15082     0,
15083     0
15084   },
15085   {
15086     "mf",
15087     0,
15088     (insn_gen_fn) gen_mf,
15089     &operand_data[0],
15090     0,
15091     2,
15092     0,
15093     0
15094   },
15095   {
15096     "mf+1",
15097     (const PTR) output_418,
15098     0,
15099     &operand_data[719],
15100     4,
15101     0,
15102     9,
15103     2
15104   },
15105   {
15106     "mf+2",
15107     (const PTR) output_419,
15108     0,
15109     &operand_data[723],
15110     4,
15111     0,
15112     7,
15113     2
15114   },
15115   {
15116     "mf+3",
15117     (const PTR) output_420,
15118     0,
15119     &operand_data[727],
15120     4,
15121     0,
15122     7,
15123     2
15124   },
15125   {
15126     "mf+4",
15127     (const PTR) output_421,
15128     0,
15129     &operand_data[731],
15130     5,
15131     0,
15132     1,
15133     3
15134   },
15135   {
15136     "mf+5",
15137     (const PTR) output_422,
15138     0,
15139     &operand_data[736],
15140     4,
15141     0,
15142     10,
15143     2
15144   },
15145   {
15146     "mf+6",
15147     (const PTR) output_423,
15148     0,
15149     &operand_data[740],
15150     5,
15151     0,
15152     1,
15153     3
15154   },
15155   {
15156     "mf+7",
15157     (const PTR) output_424,
15158     0,
15159     &operand_data[745],
15160     4,
15161     0,
15162     18,
15163     3
15164   },
15165   {
15166     "mf+8",
15167     "(%J2) addl %0 = @ltoff(@fptr(%1)), gp",
15168     0,
15169     &operand_data[749],
15170     4,
15171     0,
15172     1,
15173     1
15174   },
15175   {
15176     "mf+9",
15177     "(%J2) addl %0 = @gprel(%1), gp",
15178     0,
15179     &operand_data[753],
15180     4,
15181     0,
15182     1,
15183     1
15184   },
15185   {
15186     "mf+10",
15187     "(%J2) movl %0 = @gprel(%1)",
15188     0,
15189     &operand_data[757],
15190     4,
15191     0,
15192     1,
15193     1
15194   },
15195   {
15196     "mf+11",
15197     (const PTR) output_428,
15198     0,
15199     &operand_data[761],
15200     5,
15201     0,
15202     1,
15203     3
15204   },
15205   {
15206     "mf+12",
15207     (const PTR) output_429,
15208     0,
15209     &operand_data[766],
15210     5,
15211     0,
15212     1,
15213     3
15214   },
15215   {
15216     "mf+13",
15217     "(%J2) addl %0 = @ltoff(@dtpmod(%1)), gp",
15218     0,
15219     &operand_data[757],
15220     4,
15221     0,
15222     1,
15223     1
15224   },
15225   {
15226     "mf+14",
15227     "(%J2) addl %0 = @ltoff(@dtprel(%1)), gp",
15228     0,
15229     &operand_data[757],
15230     4,
15231     0,
15232     1,
15233     1
15234   },
15235   {
15236     "mf+15",
15237     "(%J2) movl %0 = @dtprel(%1)",
15238     0,
15239     &operand_data[757],
15240     4,
15241     0,
15242     1,
15243     1
15244   },
15245   {
15246     "mf+16",
15247     "(%J2) addl %0 = @dtprel(%1), r0",
15248     0,
15249     &operand_data[757],
15250     4,
15251     0,
15252     1,
15253     1
15254   },
15255   {
15256     "mf+17",
15257     "(%J3) adds %0 = @dtprel(%2), %1",
15258     0,
15259     &operand_data[771],
15260     5,
15261     0,
15262     1,
15263     1
15264   },
15265   {
15266     "mf+18",
15267     "(%J3) addl %0 = @dtprel(%2), %1",
15268     0,
15269     &operand_data[776],
15270     5,
15271     0,
15272     1,
15273     1
15274   },
15275   {
15276     "mf+19",
15277     "(%J2) addl %0 = @ltoff(@tprel(%1)), gp",
15278     0,
15279     &operand_data[757],
15280     4,
15281     0,
15282     1,
15283     1
15284   },
15285   {
15286     "mf+20",
15287     "(%J2) movl %0 = @tprel(%1)",
15288     0,
15289     &operand_data[757],
15290     4,
15291     0,
15292     1,
15293     1
15294   },
15295   {
15296     "mf+21",
15297     "(%J2) addl %0 = @tprel(%1), r0",
15298     0,
15299     &operand_data[757],
15300     4,
15301     0,
15302     1,
15303     1
15304   },
15305   {
15306     "mf+22",
15307     "(%J3) adds %0 = @tprel(%2), %1",
15308     0,
15309     &operand_data[771],
15310     5,
15311     0,
15312     1,
15313     1
15314   },
15315   {
15316     "mf+23",
15317     "(%J3) addl %0 = @tprel(%2), %1",
15318     0,
15319     &operand_data[776],
15320     5,
15321     0,
15322     1,
15323     1
15324   },
15325   {
15326     "mf+24",
15327     (const PTR) output_441,
15328     0,
15329     &operand_data[781],
15330     4,
15331     0,
15332     8,
15333     2
15334   },
15335   {
15336     "mf+25",
15337     (const PTR) output_442,
15338     0,
15339     &operand_data[785],
15340     4,
15341     0,
15342     8,
15343     2
15344   },
15345   {
15346     "mf+26",
15347     (const PTR) output_443,
15348     0,
15349     &operand_data[789],
15350     4,
15351     0,
15352     3,
15353     2
15354   },
15355   {
15356     "mf+27",
15357     "(%J2) sxt1 %0 = %1",
15358     0,
15359     &operand_data[793],
15360     4,
15361     0,
15362     1,
15363     1
15364   },
15365   {
15366     "mf+28",
15367     "(%J2) sxt2 %0 = %1",
15368     0,
15369     &operand_data[797],
15370     4,
15371     0,
15372     1,
15373     1
15374   },
15375   {
15376     "mf+29",
15377     (const PTR) output_446,
15378     0,
15379     &operand_data[801],
15380     4,
15381     0,
15382     2,
15383     2
15384   },
15385   {
15386     "mf+30",
15387     (const PTR) output_447,
15388     0,
15389     &operand_data[805],
15390     4,
15391     0,
15392     2,
15393     2
15394   },
15395   {
15396     "mf+31",
15397     (const PTR) output_448,
15398     0,
15399     &operand_data[809],
15400     4,
15401     0,
15402     2,
15403     2
15404   },
15405   {
15406     "mf+32",
15407     (const PTR) output_449,
15408     0,
15409     &operand_data[813],
15410     4,
15411     0,
15412     3,
15413     2
15414   },
15415   {
15416     "mf+33",
15417     "(%J2) fnorm.d %0 = %1",
15418     0,
15419     &operand_data[817],
15420     4,
15421     0,
15422     1,
15423     1
15424   },
15425   {
15426     "mf+34",
15427     "(%J2) fnorm %0 = %1",
15428     0,
15429     &operand_data[821],
15430     4,
15431     0,
15432     1,
15433     1
15434   },
15435   {
15436     "mf+35",
15437     "(%J2) fnorm %0 = %1",
15438     0,
15439     &operand_data[825],
15440     4,
15441     0,
15442     1,
15443     1
15444   },
15445   {
15446     "mf+36",
15447     "(%J2) fnorm.s %0 = %1",
15448     0,
15449     &operand_data[829],
15450     4,
15451     0,
15452     1,
15453     1
15454   },
15455   {
15456     "mf+37",
15457     "(%J2) fnorm.s %0 = %1",
15458     0,
15459     &operand_data[833],
15460     4,
15461     0,
15462     1,
15463     1
15464   },
15465   {
15466     "mf+38",
15467     "(%J2) fnorm.d %0 = %1",
15468     0,
15469     &operand_data[837],
15470     4,
15471     0,
15472     1,
15473     1
15474   },
15475   {
15476     "mf+39",
15477     "(%J2) fcvt.xf %0 = %1",
15478     0,
15479     &operand_data[841],
15480     4,
15481     0,
15482     1,
15483     1
15484   },
15485   {
15486     "mf+40",
15487     "(%J2) fcvt.fx.trunc %0 = %1",
15488     0,
15489     &operand_data[845],
15490     4,
15491     0,
15492     1,
15493     1
15494   },
15495   {
15496     "mf+41",
15497     "(%J2) fcvt.fx.trunc %0 = %1",
15498     0,
15499     &operand_data[849],
15500     4,
15501     0,
15502     1,
15503     1
15504   },
15505   {
15506     "mf+42",
15507     "(%J2) fcvt.fx.trunc %0 = %1",
15508     0,
15509     &operand_data[853],
15510     4,
15511     0,
15512     1,
15513     1
15514   },
15515   {
15516     "mf+43",
15517     "(%J3) fcvt.fx.trunc.s%2 %0 = %1",
15518     0,
15519     &operand_data[857],
15520     5,
15521     0,
15522     1,
15523     1
15524   },
15525   {
15526     "mf+44",
15527     "(%J2) fcvt.xuf.s %0 = %1",
15528     0,
15529     &operand_data[862],
15530     4,
15531     0,
15532     1,
15533     1
15534   },
15535   {
15536     "mf+45",
15537     "(%J2) fcvt.xuf.d %0 = %1",
15538     0,
15539     &operand_data[866],
15540     4,
15541     0,
15542     1,
15543     1
15544   },
15545   {
15546     "mf+46",
15547     "(%J2) fcvt.xuf %0 = %1",
15548     0,
15549     &operand_data[841],
15550     4,
15551     0,
15552     1,
15553     1
15554   },
15555   {
15556     "mf+47",
15557     "(%J2) fcvt.fxu.trunc %0 = %1",
15558     0,
15559     &operand_data[845],
15560     4,
15561     0,
15562     1,
15563     1
15564   },
15565   {
15566     "mf+48",
15567     "(%J2) fcvt.fxu.trunc %0 = %1",
15568     0,
15569     &operand_data[849],
15570     4,
15571     0,
15572     1,
15573     1
15574   },
15575   {
15576     "mf+49",
15577     "(%J2) fcvt.fxu.trunc %0 = %1",
15578     0,
15579     &operand_data[853],
15580     4,
15581     0,
15582     1,
15583     1
15584   },
15585   {
15586     "mf+50",
15587     "(%J3) fcvt.fxu.trunc.s%2 %0 = %1",
15588     0,
15589     &operand_data[857],
15590     5,
15591     0,
15592     1,
15593     1
15594   },
15595   {
15596     "mf+51",
15597     "(%J4) extr %0 = %1, %3, %2",
15598     0,
15599     &operand_data[870],
15600     6,
15601     0,
15602     1,
15603     1
15604   },
15605   {
15606     "mf+52",
15607     "(%J4) extr.u %0 = %1, %3, %2",
15608     0,
15609     &operand_data[870],
15610     6,
15611     0,
15612     1,
15613     1
15614   },
15615   {
15616     "mf+53",
15617     "(%J4) dep %0 = %3, %0, %2, %1",
15618     0,
15619     &operand_data[876],
15620     6,
15621     0,
15622     1,
15623     1
15624   },
15625   {
15626     "mf+54",
15627     (const PTR) output_471,
15628     0,
15629     &operand_data[870],
15630     6,
15631     0,
15632     1,
15633     3
15634   },
15635   {
15636     "mf+55",
15637     "(%J3) #",
15638     0,
15639     &operand_data[882],
15640     5,
15641     0,
15642     1,
15643     1
15644   },
15645   {
15646     "mf+56",
15647     "(%J2) mix4.l %0 = %0, %r1",
15648     0,
15649     &operand_data[887],
15650     4,
15651     0,
15652     1,
15653     1
15654   },
15655   {
15656     "mf+57",
15657     "(%J2) mix4.r %0 = %r1, %0",
15658     0,
15659     &operand_data[891],
15660     4,
15661     0,
15662     1,
15663     1
15664   },
15665   {
15666     "mf+58",
15667     "(%J3) mix4.r %0 = %2, %1",
15668     0,
15669     &operand_data[895],
15670     5,
15671     0,
15672     1,
15673     1
15674   },
15675   {
15676     "mf+59",
15677     (const PTR) output_476,
15678     0,
15679     &operand_data[900],
15680     5,
15681     0,
15682     3,
15683     2
15684   },
15685   {
15686     "mf+60",
15687     (const PTR) output_477,
15688     0,
15689     &operand_data[905],
15690     5,
15691     0,
15692     3,
15693     2
15694   },
15695   {
15696     "mf+61",
15697     (const PTR) output_478,
15698     0,
15699     &operand_data[900],
15700     5,
15701     0,
15702     3,
15703     2
15704   },
15705   {
15706     "mf+62",
15707     (const PTR) output_479,
15708     0,
15709     &operand_data[910],
15710     5,
15711     0,
15712     2,
15713     2
15714   },
15715   {
15716     "mf+63",
15717     (const PTR) output_480,
15718     0,
15719     &operand_data[915],
15720     5,
15721     0,
15722     4,
15723     2
15724   },
15725   {
15726     "mf+64",
15727     "(%J5) cmp4.%C4.and.orcm %0, %I0 = %3, %r2",
15728     0,
15729     &operand_data[920],
15730     7,
15731     0,
15732     1,
15733     1
15734   },
15735   {
15736     "mf+65",
15737     "(%J4) cmp4.%C3.and.orcm %0, %I0 = r0, %2",
15738     0,
15739     &operand_data[927],
15740     6,
15741     0,
15742     1,
15743     1
15744   },
15745   {
15746     "mf+66",
15747     "(%J5) cmp4.%C4.or.andcm %I0, %0 = %3, %r2",
15748     0,
15749     &operand_data[920],
15750     7,
15751     0,
15752     1,
15753     1
15754   },
15755   {
15756     "mf+67",
15757     "(%J4) cmp4.%C3.or.andcm %I0, %0 = r0, %2",
15758     0,
15759     &operand_data[927],
15760     6,
15761     0,
15762     1,
15763     1
15764   },
15765   {
15766     "mf+68",
15767     "(%J5) cmp.%C4.and.orcm %0, %I0 = %3, %2",
15768     0,
15769     &operand_data[933],
15770     7,
15771     0,
15772     1,
15773     1
15774   },
15775   {
15776     "mf+69",
15777     "(%J4) cmp.%C3.and.orcm %0, %I0 = r0, %2",
15778     0,
15779     &operand_data[940],
15780     6,
15781     0,
15782     1,
15783     1
15784   },
15785   {
15786     "mf+70",
15787     "(%J5) cmp.%C4.or.andcm %I0, %0 = %3, %2",
15788     0,
15789     &operand_data[933],
15790     7,
15791     0,
15792     1,
15793     1
15794   },
15795   {
15796     "mf+71",
15797     "(%J4) cmp.%C3.or.andcm %I0, %0 = r0, %2",
15798     0,
15799     &operand_data[940],
15800     6,
15801     0,
15802     1,
15803     1
15804   },
15805   {
15806     "mf+72",
15807     "(%J3) tbit.nz.and.orcm %0, %I0 = %1, 0",
15808     0,
15809     &operand_data[946],
15810     5,
15811     0,
15812     1,
15813     1
15814   },
15815   {
15816     "mf+73",
15817     "(%J3) tbit.z.and.orcm %0, %I0 = %1, 0",
15818     0,
15819     &operand_data[946],
15820     5,
15821     0,
15822     1,
15823     1
15824   },
15825   {
15826     "mf+74",
15827     "(%J4) tbit.nz.and.orcm %0, %I0 = %1, %2",
15828     0,
15829     &operand_data[951],
15830     6,
15831     0,
15832     1,
15833     1
15834   },
15835   {
15836     "mf+75",
15837     "(%J4) tbit.z.and.orcm %0, %I0 = %1, %2",
15838     0,
15839     &operand_data[951],
15840     6,
15841     0,
15842     1,
15843     1
15844   },
15845   {
15846     "mf+76",
15847     "(%J5) cmp4.%C4.or.andcm %0, %I0 = %3, %r2",
15848     0,
15849     &operand_data[920],
15850     7,
15851     0,
15852     1,
15853     1
15854   },
15855   {
15856     "mf+77",
15857     "(%J4) cmp4.%C3.or.andcm %0, %I0 = r0, %2",
15858     0,
15859     &operand_data[927],
15860     6,
15861     0,
15862     1,
15863     1
15864   },
15865   {
15866     "mf+78",
15867     "(%J5) cmp4.%C4.and.orcm %I0, %0 = %3, %r2",
15868     0,
15869     &operand_data[920],
15870     7,
15871     0,
15872     1,
15873     1
15874   },
15875   {
15876     "mf+79",
15877     "(%J4) cmp4.%C3.and.orcm %I0, %0 = r0, %2",
15878     0,
15879     &operand_data[927],
15880     6,
15881     0,
15882     1,
15883     1
15884   },
15885   {
15886     "mf+80",
15887     "(%J5) cmp.%C4.or.andcm %0, %I0 = %3, %2",
15888     0,
15889     &operand_data[933],
15890     7,
15891     0,
15892     1,
15893     1
15894   },
15895   {
15896     "mf+81",
15897     "(%J4) cmp.%C3.or.andcm %0, %I0 = r0, %2",
15898     0,
15899     &operand_data[940],
15900     6,
15901     0,
15902     1,
15903     1
15904   },
15905   {
15906     "mf+82",
15907     "(%J5) cmp.%C4.and.orcm %I0, %0 = %3, %2",
15908     0,
15909     &operand_data[933],
15910     7,
15911     0,
15912     1,
15913     1
15914   },
15915   {
15916     "mf+83",
15917     "(%J4) cmp.%C3.and.orcm %I0, %0 = r0, %2",
15918     0,
15919     &operand_data[940],
15920     6,
15921     0,
15922     1,
15923     1
15924   },
15925   {
15926     "mf+84",
15927     "(%J3) tbit.nz.or.andcm %0, %I0 = %1, 0",
15928     0,
15929     &operand_data[946],
15930     5,
15931     0,
15932     1,
15933     1
15934   },
15935   {
15936     "mf+85",
15937     "(%J3) tbit.z.or.andcm %0, %I0 = %1, 0",
15938     0,
15939     &operand_data[946],
15940     5,
15941     0,
15942     1,
15943     1
15944   },
15945   {
15946     "mf+86",
15947     "(%J4) tbit.nz.or.andcm %0, %I0 = %1, %2",
15948     0,
15949     &operand_data[951],
15950     6,
15951     0,
15952     1,
15953     1
15954   },
15955   {
15956     "mf+87",
15957     "(%J4) tbit.z.or.andcm %0, %I0 = %1, %2",
15958     0,
15959     &operand_data[951],
15960     6,
15961     0,
15962     1,
15963     1
15964   },
15965   {
15966     "mf+88",
15967     "(%J3) pmpy2.r %0 = %1, %2",
15968     0,
15969     &operand_data[957],
15970     5,
15971     0,
15972     1,
15973     1
15974   },
15975   {
15976     "mf+89",
15977     (const PTR) output_506,
15978     0,
15979     &operand_data[962],
15980     5,
15981     0,
15982     3,
15983     2
15984   },
15985   {
15986     "mf+90",
15987     "(%J3) add %0 = %1, %2, 1",
15988     0,
15989     &operand_data[967],
15990     5,
15991     0,
15992     1,
15993     1
15994   },
15995   {
15996     "mf+91",
15997     "(%J2) add %0 = %1, %1, 1",
15998     0,
15999     &operand_data[972],
16000     4,
16001     0,
16002     1,
16003     1
16004   },
16005   {
16006     "mf+92",
16007     "(%J4) shladd %0 = %1, %S2, %3",
16008     0,
16009     &operand_data[976],
16010     6,
16011     0,
16012     1,
16013     1
16014   },
16015   {
16016     "mf+93",
16017     "(%J3) sub %0 = %1, %2",
16018     0,
16019     &operand_data[982],
16020     5,
16021     0,
16022     1,
16023     1
16024   },
16025   {
16026     "mf+94",
16027     "(%J3) sub %0 = %2, %1, 1",
16028     0,
16029     &operand_data[967],
16030     5,
16031     0,
16032     1,
16033     1
16034   },
16035   {
16036     "mf+95",
16037     "(%J3) xmpy.l %0 = %1, %2",
16038     0,
16039     &operand_data[987],
16040     5,
16041     0,
16042     1,
16043     1
16044   },
16045   {
16046     "mf+96",
16047     "(%J4) xma.l %0 = %1, %2, %3",
16048     0,
16049     &operand_data[992],
16050     6,
16051     0,
16052     1,
16053     1
16054   },
16055   {
16056     "mf+97",
16057     "(%J2) sub %0 = r0, %1",
16058     0,
16059     &operand_data[972],
16060     4,
16061     0,
16062     1,
16063     1
16064   },
16065   {
16066     "mf+98",
16067     (const PTR) output_515,
16068     0,
16069     &operand_data[998],
16070     5,
16071     0,
16072     3,
16073     2
16074   },
16075   {
16076     "mf+99",
16077     "(%J3) add %0 = %1, %2, 1",
16078     0,
16079     &operand_data[1003],
16080     5,
16081     0,
16082     1,
16083     1
16084   },
16085   {
16086     "mf+100",
16087     "(%J2) add %0 = %1, %1, 1",
16088     0,
16089     &operand_data[1008],
16090     4,
16091     0,
16092     1,
16093     1
16094   },
16095   {
16096     "mf+101",
16097     "(%J3) sub %0 = %1, %2",
16098     0,
16099     &operand_data[1012],
16100     5,
16101     0,
16102     1,
16103     1
16104   },
16105   {
16106     "mf+102",
16107     "(%J3) sub %0 = %2, %1, 1",
16108     0,
16109     &operand_data[1003],
16110     5,
16111     0,
16112     1,
16113     1
16114   },
16115   {
16116     "mf+103",
16117     "(%J3) xmpy.l %0 = %1, %2",
16118     0,
16119     &operand_data[1017],
16120     5,
16121     0,
16122     1,
16123     1
16124   },
16125   {
16126     "mf+104",
16127     "(%J5) xma.l %0 = %1, %2, %3",
16128     0,
16129     &operand_data[1022],
16130     7,
16131     0,
16132     1,
16133     1
16134   },
16135   {
16136     "mf+105",
16137     "(%J6) #",
16138     0,
16139     &operand_data[1029],
16140     8,
16141     0,
16142     1,
16143     1
16144   },
16145   {
16146     "mf+106",
16147     "(%J3) xmpy.h %0 = %1, %2",
16148     0,
16149     &operand_data[1037],
16150     5,
16151     0,
16152     1,
16153     1
16154   },
16155   {
16156     "mf+107",
16157     "(%J3) xmpy.hu %0 = %1, %2",
16158     0,
16159     &operand_data[1037],
16160     5,
16161     0,
16162     1,
16163     1
16164   },
16165   {
16166     "mf+108",
16167     "(%J2) sub %0 = r0, %1",
16168     0,
16169     &operand_data[1008],
16170     4,
16171     0,
16172     1,
16173     1
16174   },
16175   {
16176     "mf+109",
16177     "(%J2) popcnt %0 = %1",
16178     0,
16179     &operand_data[1008],
16180     4,
16181     0,
16182     1,
16183     1
16184   },
16185   {
16186     "mf+110",
16187     "(%J3) fadd.s %0 = %1, %F2",
16188     0,
16189     &operand_data[1042],
16190     5,
16191     0,
16192     1,
16193     1
16194   },
16195   {
16196     "mf+111",
16197     "(%J3) fsub.s %0 = %F1, %F2",
16198     0,
16199     &operand_data[1047],
16200     5,
16201     0,
16202     1,
16203     1
16204   },
16205   {
16206     "mf+112",
16207     "(%J3) fmpy.s %0 = %1, %2",
16208     0,
16209     &operand_data[1052],
16210     5,
16211     0,
16212     1,
16213     1
16214   },
16215   {
16216     "mf+113",
16217     "(%J2) fabs %0 = %1",
16218     0,
16219     &operand_data[1057],
16220     4,
16221     0,
16222     1,
16223     1
16224   },
16225   {
16226     "mf+114",
16227     "(%J2) fneg %0 = %1",
16228     0,
16229     &operand_data[1057],
16230     4,
16231     0,
16232     1,
16233     1
16234   },
16235   {
16236     "mf+115",
16237     "(%J2) fnegabs %0 = %1",
16238     0,
16239     &operand_data[1057],
16240     4,
16241     0,
16242     1,
16243     1
16244   },
16245   {
16246     "mf+116",
16247     "(%J3) fmin %0 = %1, %F2",
16248     0,
16249     &operand_data[1061],
16250     5,
16251     0,
16252     1,
16253     1
16254   },
16255   {
16256     "mf+117",
16257     "(%J3) fmax %0 = %1, %F2",
16258     0,
16259     &operand_data[1061],
16260     5,
16261     0,
16262     1,
16263     1
16264   },
16265   {
16266     "mf+118",
16267     "(%J4) fma.s %0 = %1, %2, %F3",
16268     0,
16269     &operand_data[1066],
16270     6,
16271     0,
16272     1,
16273     1
16274   },
16275   {
16276     "mf+119",
16277     "(%J4) fms.s %0 = %1, %2, %F3",
16278     0,
16279     &operand_data[1066],
16280     6,
16281     0,
16282     1,
16283     1
16284   },
16285   {
16286     "mf+120",
16287     "(%J3) fnmpy.s %0 = %1, %2",
16288     0,
16289     &operand_data[1072],
16290     5,
16291     0,
16292     1,
16293     1
16294   },
16295   {
16296     "mf+121",
16297     "(%J4) fnma.s %0 = %1, %2, %F3",
16298     0,
16299     &operand_data[1066],
16300     6,
16301     0,
16302     1,
16303     1
16304   },
16305   {
16306     "mf+122",
16307     "(%J3) fadd.d %0 = %1, %F2",
16308     0,
16309     &operand_data[1077],
16310     5,
16311     0,
16312     1,
16313     1
16314   },
16315   {
16316     "mf+123",
16317     "(%J3) fadd.s %0 = %1, %F2",
16318     0,
16319     &operand_data[1082],
16320     5,
16321     0,
16322     1,
16323     1
16324   },
16325   {
16326     "mf+124",
16327     "(%J3) fsub.d %0 = %F1, %F2",
16328     0,
16329     &operand_data[1087],
16330     5,
16331     0,
16332     1,
16333     1
16334   },
16335   {
16336     "mf+125",
16337     "(%J3) fsub.s %0 = %F1, %F2",
16338     0,
16339     &operand_data[1092],
16340     5,
16341     0,
16342     1,
16343     1
16344   },
16345   {
16346     "mf+126",
16347     "(%J3) fmpy.d %0 = %1, %2",
16348     0,
16349     &operand_data[1097],
16350     5,
16351     0,
16352     1,
16353     1
16354   },
16355   {
16356     "mf+127",
16357     "(%J3) fmpy.s %0 = %1, %2",
16358     0,
16359     &operand_data[1102],
16360     5,
16361     0,
16362     1,
16363     1
16364   },
16365   {
16366     "mf+128",
16367     "(%J2) fabs %0 = %1",
16368     0,
16369     &operand_data[1107],
16370     4,
16371     0,
16372     1,
16373     1
16374   },
16375   {
16376     "mf+129",
16377     "(%J2) fneg %0 = %1",
16378     0,
16379     &operand_data[1107],
16380     4,
16381     0,
16382     1,
16383     1
16384   },
16385   {
16386     "mf+130",
16387     "(%J2) fnegabs %0 = %1",
16388     0,
16389     &operand_data[1107],
16390     4,
16391     0,
16392     1,
16393     1
16394   },
16395   {
16396     "mf+131",
16397     "(%J3) fmin %0 = %1, %F2",
16398     0,
16399     &operand_data[1111],
16400     5,
16401     0,
16402     1,
16403     1
16404   },
16405   {
16406     "mf+132",
16407     "(%J3) fmax %0 = %1, %F2",
16408     0,
16409     &operand_data[1111],
16410     5,
16411     0,
16412     1,
16413     1
16414   },
16415   {
16416     "mf+133",
16417     "(%J4) fma.d %0 = %1, %2, %F3",
16418     0,
16419     &operand_data[1116],
16420     6,
16421     0,
16422     1,
16423     1
16424   },
16425   {
16426     "mf+134",
16427     "(%J4) fma.s %0 = %1, %2, %F3",
16428     0,
16429     &operand_data[1122],
16430     6,
16431     0,
16432     1,
16433     1
16434   },
16435   {
16436     "mf+135",
16437     "(%J4) fms.d %0 = %1, %2, %F3",
16438     0,
16439     &operand_data[1116],
16440     6,
16441     0,
16442     1,
16443     1
16444   },
16445   {
16446     "mf+136",
16447     "(%J4) fms.s %0 = %1, %2, %F3",
16448     0,
16449     &operand_data[1122],
16450     6,
16451     0,
16452     1,
16453     1
16454   },
16455   {
16456     "mf+137",
16457     "(%J3) fnmpy.d %0 = %1, %2",
16458     0,
16459     &operand_data[1097],
16460     5,
16461     0,
16462     1,
16463     1
16464   },
16465   {
16466     "mf+138",
16467     "(%J3) fnmpy.s %0 = %1, %2",
16468     0,
16469     &operand_data[1102],
16470     5,
16471     0,
16472     1,
16473     1
16474   },
16475   {
16476     "mf+139",
16477     "(%J4) fnma.d %0 = %1, %2, %F3",
16478     0,
16479     &operand_data[1116],
16480     6,
16481     0,
16482     1,
16483     1
16484   },
16485   {
16486     "mf+140",
16487     "(%J5) fnma.d.s%4 %0 = %1, %2, %F3",
16488     0,
16489     &operand_data[1128],
16490     7,
16491     0,
16492     1,
16493     1
16494   },
16495   {
16496     "mf+141",
16497     "(%J4) fnma.s %0 = %1, %2, %F3",
16498     0,
16499     &operand_data[1122],
16500     6,
16501     0,
16502     1,
16503     1
16504   },
16505   {
16506     "mf+142",
16507     "(%J3) fadd %0 = %F1, %F2",
16508     0,
16509     &operand_data[1135],
16510     5,
16511     0,
16512     1,
16513     1
16514   },
16515   {
16516     "mf+143",
16517     "(%J3) fadd.s %0 = %F1, %F2",
16518     0,
16519     &operand_data[1140],
16520     5,
16521     0,
16522     1,
16523     1
16524   },
16525   {
16526     "mf+144",
16527     "(%J3) fadd.d %0 = %F1, %F2",
16528     0,
16529     &operand_data[1145],
16530     5,
16531     0,
16532     1,
16533     1
16534   },
16535   {
16536     "mf+145",
16537     "(%J3) fsub %0 = %F1, %F2",
16538     0,
16539     &operand_data[1135],
16540     5,
16541     0,
16542     1,
16543     1
16544   },
16545   {
16546     "mf+146",
16547     "(%J3) fsub.s %0 = %F1, %F2",
16548     0,
16549     &operand_data[1140],
16550     5,
16551     0,
16552     1,
16553     1
16554   },
16555   {
16556     "mf+147",
16557     "(%J3) fsub.d %0 = %F1, %F2",
16558     0,
16559     &operand_data[1145],
16560     5,
16561     0,
16562     1,
16563     1
16564   },
16565   {
16566     "mf+148",
16567     "(%J3) fmpy %0 = %F1, %F2",
16568     0,
16569     &operand_data[1135],
16570     5,
16571     0,
16572     1,
16573     1
16574   },
16575   {
16576     "mf+149",
16577     "(%J3) fmpy.s %0 = %F1, %F2",
16578     0,
16579     &operand_data[1140],
16580     5,
16581     0,
16582     1,
16583     1
16584   },
16585   {
16586     "mf+150",
16587     "(%J3) fmpy.d %0 = %F1, %F2",
16588     0,
16589     &operand_data[1145],
16590     5,
16591     0,
16592     1,
16593     1
16594   },
16595   {
16596     "mf+151",
16597     "(%J4) fmpy.s%3 %0 = %F1, %F2",
16598     0,
16599     &operand_data[1150],
16600     6,
16601     0,
16602     1,
16603     1
16604   },
16605   {
16606     "mf+152",
16607     "(%J4) fmpy.s.s%3 %0 = %F1, %F2",
16608     0,
16609     &operand_data[1156],
16610     6,
16611     0,
16612     1,
16613     1
16614   },
16615   {
16616     "mf+153",
16617     "(%J4) fmpy.d.s%3 %0 = %F1, %F2",
16618     0,
16619     &operand_data[1162],
16620     6,
16621     0,
16622     1,
16623     1
16624   },
16625   {
16626     "mf+154",
16627     "(%J2) fabs %0 = %F1",
16628     0,
16629     &operand_data[1168],
16630     4,
16631     0,
16632     1,
16633     1
16634   },
16635   {
16636     "mf+155",
16637     "(%J2) fneg %0 = %F1",
16638     0,
16639     &operand_data[1168],
16640     4,
16641     0,
16642     1,
16643     1
16644   },
16645   {
16646     "mf+156",
16647     "(%J2) fnegabs %0 = %F1",
16648     0,
16649     &operand_data[1168],
16650     4,
16651     0,
16652     1,
16653     1
16654   },
16655   {
16656     "mf+157",
16657     "(%J3) fmin %0 = %F1, %F2",
16658     0,
16659     &operand_data[1135],
16660     5,
16661     0,
16662     1,
16663     1
16664   },
16665   {
16666     "mf+158",
16667     "(%J3) fmax %0 = %F1, %F2",
16668     0,
16669     &operand_data[1135],
16670     5,
16671     0,
16672     1,
16673     1
16674   },
16675   {
16676     "mf+159",
16677     "(%J4) fma %0 = %F1, %F2, %F3",
16678     0,
16679     &operand_data[1172],
16680     6,
16681     0,
16682     1,
16683     1
16684   },
16685   {
16686     "mf+160",
16687     "(%J4) fma.s %0 = %F1, %F2, %F3",
16688     0,
16689     &operand_data[1178],
16690     6,
16691     0,
16692     1,
16693     1
16694   },
16695   {
16696     "mf+161",
16697     "(%J4) fma.d %0 = %F1, %F2, %F3",
16698     0,
16699     &operand_data[1184],
16700     6,
16701     0,
16702     1,
16703     1
16704   },
16705   {
16706     "mf+162",
16707     "(%J5) fma.s%4 %0 = %F1, %F2, %F3",
16708     0,
16709     &operand_data[1190],
16710     7,
16711     0,
16712     1,
16713     1
16714   },
16715   {
16716     "mf+163",
16717     "(%J5) fma.d.s%4 %0 = %F1, %F2, %F3",
16718     0,
16719     &operand_data[1197],
16720     7,
16721     0,
16722     1,
16723     1
16724   },
16725   {
16726     "mf+164",
16727     "(%J4) fms %0 = %F1, %F2, %F3",
16728     0,
16729     &operand_data[1172],
16730     6,
16731     0,
16732     1,
16733     1
16734   },
16735   {
16736     "mf+165",
16737     "(%J4) fms.s %0 = %F1, %F2, %F3",
16738     0,
16739     &operand_data[1178],
16740     6,
16741     0,
16742     1,
16743     1
16744   },
16745   {
16746     "mf+166",
16747     "(%J4) fms.d %0 = %F1, %F2, %F3",
16748     0,
16749     &operand_data[1184],
16750     6,
16751     0,
16752     1,
16753     1
16754   },
16755   {
16756     "mf+167",
16757     "(%J3) fnmpy %0 = %F1, %F2",
16758     0,
16759     &operand_data[1135],
16760     5,
16761     0,
16762     1,
16763     1
16764   },
16765   {
16766     "mf+168",
16767     "(%J3) fnmpy.s %0 = %F1, %F2",
16768     0,
16769     &operand_data[1140],
16770     5,
16771     0,
16772     1,
16773     1
16774   },
16775   {
16776     "mf+169",
16777     "(%J3) fnmpy.d %0 = %F1, %F2",
16778     0,
16779     &operand_data[1145],
16780     5,
16781     0,
16782     1,
16783     1
16784   },
16785   {
16786     "mf+170",
16787     "(%J4) fnma %0 = %F1, %F2, %F3",
16788     0,
16789     &operand_data[1172],
16790     6,
16791     0,
16792     1,
16793     1
16794   },
16795   {
16796     "mf+171",
16797     "(%J4) fnma.s %0 = %F1, %F2, %F3",
16798     0,
16799     &operand_data[1178],
16800     6,
16801     0,
16802     1,
16803     1
16804   },
16805   {
16806     "mf+172",
16807     "(%J4) fnma.d %0 = %F1, %F2, %F3",
16808     0,
16809     &operand_data[1184],
16810     6,
16811     0,
16812     1,
16813     1
16814   },
16815   {
16816     "mf+173",
16817     "(%J5) fnma.s%4 %0 = %F1, %F2, %F3",
16818     0,
16819     &operand_data[1190],
16820     7,
16821     0,
16822     1,
16823     1
16824   },
16825   {
16826     "mf+174",
16827     "(%J5) fnma.d.s%4 %0 = %F1, %F2, %F3",
16828     0,
16829     &operand_data[1197],
16830     7,
16831     0,
16832     1,
16833     1
16834   },
16835   {
16836     "mf+175",
16837     (const PTR) output_592,
16838     0,
16839     &operand_data[1204],
16840     5,
16841     0,
16842     3,
16843     2
16844   },
16845   {
16846     "mf+176",
16847     "(%J3) #",
16848     0,
16849     &operand_data[1209],
16850     5,
16851     0,
16852     1,
16853     1
16854   },
16855   {
16856     "mf+177",
16857     "(%J3) #",
16858     0,
16859     &operand_data[1214],
16860     5,
16861     0,
16862     1,
16863     1
16864   },
16865   {
16866     "mf+178",
16867     (const PTR) output_595,
16868     0,
16869     &operand_data[1219],
16870     5,
16871     0,
16872     3,
16873     2
16874   },
16875   {
16876     "mf+179",
16877     "(%J4) shladd %0 = %1, %S2, %3",
16878     0,
16879     &operand_data[1224],
16880     6,
16881     0,
16882     1,
16883     1
16884   },
16885   {
16886     "mf+180",
16887     (const PTR) output_597,
16888     0,
16889     &operand_data[1230],
16890     7,
16891     0,
16892     1,
16893     3
16894   },
16895   {
16896     "mf+181",
16897     (const PTR) output_598,
16898     0,
16899     &operand_data[1237],
16900     5,
16901     0,
16902     2,
16903     2
16904   },
16905   {
16906     "mf+182",
16907     (const PTR) output_599,
16908     0,
16909     &operand_data[1237],
16910     5,
16911     0,
16912     2,
16913     2
16914   },
16915   {
16916     "mf+183",
16917     "(%J3) shrp %0 = %1, %1, %2",
16918     0,
16919     &operand_data[1242],
16920     5,
16921     0,
16922     1,
16923     1
16924   },
16925   {
16926     "mf+184",
16927     "(%J3) shrp %0 = %1, %1, %e2",
16928     0,
16929     &operand_data[1242],
16930     5,
16931     0,
16932     1,
16933     1
16934   },
16935   {
16936     "mf+185",
16937     "(%J2) andcm %0 = -1, %1",
16938     0,
16939     &operand_data[972],
16940     4,
16941     0,
16942     1,
16943     1
16944   },
16945   {
16946     "mf+186",
16947     (const PTR) output_603,
16948     0,
16949     &operand_data[1247],
16950     5,
16951     0,
16952     2,
16953     2
16954   },
16955   {
16956     "mf+187",
16957     (const PTR) output_604,
16958     0,
16959     &operand_data[1252],
16960     5,
16961     0,
16962     2,
16963     2
16964   },
16965   {
16966     "mf+188",
16967     (const PTR) output_605,
16968     0,
16969     &operand_data[1247],
16970     5,
16971     0,
16972     2,
16973     2
16974   },
16975   {
16976     "mf+189",
16977     (const PTR) output_606,
16978     0,
16979     &operand_data[1247],
16980     5,
16981     0,
16982     2,
16983     2
16984   },
16985   {
16986     "mf+190",
16987     "(%J2) andcm %0 = -1, %1",
16988     0,
16989     &operand_data[1008],
16990     4,
16991     0,
16992     1,
16993     1
16994   },
16995   {
16996     "mf+191",
16997     "(%J4) cmp4.%C1 %0, %I0 = %3, %2",
16998     0,
16999     &operand_data[1257],
17000     6,
17001     0,
17002     1,
17003     1
17004   },
17005   {
17006     "mf+192",
17007     "(%J4) cmp4.%C1 %0, %I0 = %r3, %2",
17008     0,
17009     &operand_data[1263],
17010     6,
17011     0,
17012     1,
17013     1
17014   },
17015   {
17016     "mf+193",
17017     "(%J4) cmp.%C1 %0, %I0 = %3, %r2",
17018     0,
17019     &operand_data[1269],
17020     6,
17021     0,
17022     1,
17023     1
17024   },
17025   {
17026     "mf+194",
17027     "(%J4) cmp.%C1 %0, %I0 = %r3, %2",
17028     0,
17029     &operand_data[1275],
17030     6,
17031     0,
17032     1,
17033     1
17034   },
17035   {
17036     "mf+195",
17037     "(%J4) fcmp.%D1 %0, %I0 = %F2, %F3",
17038     0,
17039     &operand_data[1281],
17040     6,
17041     0,
17042     1,
17043     1
17044   },
17045   {
17046     "mf+196",
17047     "(%J4) fcmp.%D1 %0, %I0 = %F2, %F3",
17048     0,
17049     &operand_data[1287],
17050     6,
17051     0,
17052     1,
17053     1
17054   },
17055   {
17056     "mf+197",
17057     "(%J4) fcmp.%D1 %0, %I0 = %F2, %F3",
17058     0,
17059     &operand_data[1293],
17060     6,
17061     0,
17062     1,
17063     1
17064   },
17065   {
17066     "mf+198",
17067     "(%J3) tbit.z %0, %I0 = %1, %2",
17068     0,
17069     &operand_data[393],
17070     5,
17071     0,
17072     1,
17073     1
17074   },
17075   {
17076     "mf+199",
17077     "(%J3) tbit.nz %0, %I0 = %1, %2",
17078     0,
17079     &operand_data[393],
17080     5,
17081     0,
17082     1,
17083     1
17084   },
17085   {
17086     "mf+200",
17087     "(%J2) #",
17088     0,
17089     &operand_data[1299],
17090     4,
17091     0,
17092     1,
17093     1
17094   },
17095   {
17096     "mf+201",
17097     "(%J2) #",
17098     0,
17099     &operand_data[1299],
17100     4,
17101     0,
17102     1,
17103     1
17104   },
17105   {
17106     "mf+202",
17107     "(%J2) br.call%+.many %1 = %0",
17108     0,
17109     &operand_data[1303],
17110     4,
17111     0,
17112     2,
17113     1
17114   },
17115   {
17116     "mf+203",
17117     "(%J3) br.call%+.many %2 = %1",
17118     0,
17119     &operand_data[1307],
17120     5,
17121     0,
17122     2,
17123     1
17124   },
17125   {
17126     "mf+204",
17127     "(%J1) br%+.many %0",
17128     0,
17129     &operand_data[1312],
17130     3,
17131     0,
17132     2,
17133     1
17134   },
17135   {
17136     "mf+205",
17137     "(%J4) #",
17138     0,
17139     &operand_data[1315],
17140     6,
17141     0,
17142     2,
17143     1
17144   },
17145   {
17146     "mf+206",
17147     "(%J5) #",
17148     0,
17149     &operand_data[1321],
17150     7,
17151     0,
17152     2,
17153     1
17154   },
17155   {
17156     "mf+207",
17157     "(%J3) #",
17158     0,
17159     &operand_data[1328],
17160     5,
17161     0,
17162     2,
17163     1
17164   },
17165   {
17166     "mf+208",
17167     "(%J1) br.ret.sptk.many %0",
17168     0,
17169     &operand_data[1333],
17170     3,
17171     0,
17172     1,
17173     1
17174   },
17175   {
17176     "mf+209",
17177     "(%J0) br.ret.sptk.many rp",
17178     0,
17179     &operand_data[396],
17180     2,
17181     0,
17182     1,
17183     1
17184   },
17185   {
17186     "mf+210",
17187     "(%J1) br %l0",
17188     0,
17189     &operand_data[1336],
17190     3,
17191     0,
17192     1,
17193     1
17194   },
17195   {
17196     "mf+211",
17197     "(%J1) br %0",
17198     0,
17199     &operand_data[1333],
17200     3,
17201     0,
17202     1,
17203     1
17204   },
17205   {
17206     "mf+212",
17207     "(%J2) br %0",
17208     0,
17209     &operand_data[1339],
17210     4,
17211     0,
17212     1,
17213     1
17214   },
17215   {
17216     "mf+213",
17217     (const PTR) output_630,
17218     0,
17219     &operand_data[1343],
17220     6,
17221     1,
17222     3,
17223     2
17224   },
17225   {
17226     "mf+214",
17227     "(%J2) mov %0 = %1",
17228     0,
17229     &operand_data[1349],
17230     4,
17231     2,
17232     1,
17233     1
17234   },
17235   {
17236     "mf+215",
17237     (const PTR) output_632,
17238     0,
17239     &operand_data[1353],
17240     6,
17241     0,
17242     1,
17243     3
17244   },
17245   {
17246     "mf+216",
17247     (const PTR) output_633,
17248     0,
17249     &operand_data[1359],
17250     6,
17251     0,
17252     1,
17253     3
17254   },
17255   {
17256     "mf+217",
17257     "(%J2) stf.spill %0 = %1%P0",
17258     0,
17259     &operand_data[1365],
17260     4,
17261     0,
17262     1,
17263     1
17264   },
17265   {
17266     "mf+218",
17267     "(%J2) ldf.fill %0 = %1%P1",
17268     0,
17269     &operand_data[1369],
17270     4,
17271     0,
17272     1,
17273     1
17274   },
17275   {
17276     "mf+219",
17277     (const PTR) output_636,
17278     0,
17279     &operand_data[1373],
17280     3,
17281     0,
17282     1,
17283     3
17284   },
17285   {
17286     "mf+220",
17287     "(%J0) nop 0",
17288     0,
17289     &operand_data[396],
17290     2,
17291     0,
17292     1,
17293     1
17294   },
17295   {
17296     "mf+221",
17297     "(%J0) nop.m 0",
17298     0,
17299     &operand_data[396],
17300     2,
17301     0,
17302     1,
17303     1
17304   },
17305   {
17306     "mf+222",
17307     "(%J0) nop.i 0",
17308     0,
17309     &operand_data[396],
17310     2,
17311     0,
17312     1,
17313     1
17314   },
17315   {
17316     "mf+223",
17317     "(%J0) nop.f 0",
17318     0,
17319     &operand_data[396],
17320     2,
17321     0,
17322     1,
17323     1
17324   },
17325   {
17326     "mf+224",
17327     "(%J0) nop.b 0",
17328     0,
17329     &operand_data[396],
17330     2,
17331     0,
17332     1,
17333     1
17334   },
17335   {
17336     "mf+225",
17337     "(%J0) ",
17338     0,
17339     &operand_data[396],
17340     2,
17341     0,
17342     1,
17343     1
17344   },
17345   {
17346     "mf+226",
17347     "(%J1) break %0",
17348     0,
17349     &operand_data[473],
17350     3,
17351     0,
17352     1,
17353     1
17354   },
17355   {
17356     "mf+227",
17357     "(%J0) break.f 0",
17358     0,
17359     &operand_data[396],
17360     2,
17361     0,
17362     1,
17363     1
17364   },
17365   {
17366     "mf+228",
17367     (const PTR) output_645,
17368     0,
17369     &operand_data[1376],
17370     5,
17371     0,
17372     1,
17373     3
17374   },
17375   {
17376     "mf+229",
17377     "(%J1) #",
17378     0,
17379     &operand_data[1381],
17380     3,
17381     0,
17382     1,
17383     1
17384   },
17385   {
17386     "mf+230",
17387     "(%J2) mf",
17388     0,
17389     &operand_data[1384],
17390     4,
17391     0,
17392     1,
17393     1
17394   },
17395   {
17396     "mf+231",
17397     "(%J3) fetchadd4.acq %0 = %1, %2",
17398     0,
17399     &operand_data[1388],
17400     5,
17401     2,
17402     1,
17403     1
17404   },
17405   {
17406     "mf+232",
17407     "(%J3) fetchadd8.acq %0 = %1, %2",
17408     0,
17409     &operand_data[1393],
17410     5,
17411     2,
17412     1,
17413     1
17414   },
17415   {
17416     "mf+233",
17417     "(%J4) cmpxchg4.acq %0 = %1, %2, %3",
17418     0,
17419     &operand_data[1398],
17420     6,
17421     2,
17422     1,
17423     1
17424   },
17425   {
17426     "mf+234",
17427     "(%J4) cmpxchg8.acq %0 = %1, %2, %3",
17428     0,
17429     &operand_data[1404],
17430     6,
17431     2,
17432     1,
17433     1
17434   },
17435   {
17436     "mf+235",
17437     "(%J3) xchg4 %0 = %1, %2",
17438     0,
17439     &operand_data[1410],
17440     5,
17441     1,
17442     1,
17443     1
17444   },
17445   {
17446     "mf+236",
17447     "(%J3) xchg8 %0 = %1, %2",
17448     0,
17449     &operand_data[1415],
17450     5,
17451     1,
17452     1,
17453     1
17454   },
17455   {
17456     "mf+237",
17457     "(%J2) addp4 %0 = 0,%1",
17458     0,
17459     &operand_data[1420],
17460     4,
17461     0,
17462     1,
17463     1
17464   },
17465   {
17466     "mf+238",
17467     "(%J3) addp4 %0 = %2, %1",
17468     0,
17469     &operand_data[1424],
17470     5,
17471     0,
17472     1,
17473     1
17474   },
17475   {
17476     "mf+239",
17477     "(%J3) addp4 %0 = %1, %2",
17478     0,
17479     &operand_data[1429],
17480     5,
17481     0,
17482     1,
17483     1
17484   },
17485 };
17486 
17487 
17488 const char *
17489 get_insn_name (code)
17490      int code;
17491 {
17492   return insn_data[code].name;
17493 }