osprey-gcc/gcc/config/i386/i386.h File Reference

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Data Types

type  processor_costs
type  ix86_args

Defines

#define TARGET_CPU_DEFAULT   0
#define MASK_80387   0x00000001
#define MASK_RTD   0x00000002
#define MASK_ALIGN_DOUBLE   0x00000004
#define MASK_SVR3_SHLIB   0x00000008
#define MASK_IEEE_FP   0x00000010
#define MASK_FLOAT_RETURNS   0x00000020
#define MASK_NO_FANCY_MATH_387   0x00000040
#define MASK_OMIT_LEAF_FRAME_POINTER   0x080
#define MASK_STACK_PROBE   0x00000100
#define MASK_NO_ALIGN_STROPS   0x00000200
#define MASK_INLINE_ALL_STROPS   0x00000400
#define MASK_NO_PUSH_ARGS   0x00000800
#define MASK_ACCUMULATE_OUTGOING_ARGS   0x00001000
#define MASK_MMX   0x00002000
#define MASK_SSE   0x00004000
#define MASK_SSE2   0x00008000
#define MASK_SSE3   0x00010000
#define MASK_3DNOW   0x00020000
#define MASK_3DNOW_A   0x00040000
#define MASK_128BIT_LONG_DOUBLE   0x00080000
#define MASK_64BIT   0x00100000
#define MASK_MS_BITFIELD_LAYOUT   0x00200000
#define MASK_TLS_DIRECT_SEG_REFS   0x00400000
#define MASK_NO_RED_ZONE   0x04000000
#define TARGET_80387   (target_flags & MASK_80387)
#define TARGET_RTD   (target_flags & MASK_RTD)
#define TARGET_ALIGN_DOUBLE   (target_flags & MASK_ALIGN_DOUBLE)
#define TARGET_PUSH_ARGS   (!(target_flags & MASK_NO_PUSH_ARGS))
#define TARGET_ACCUMULATE_OUTGOING_ARGS   (target_flags & MASK_ACCUMULATE_OUTGOING_ARGS)
#define TARGET_SVR3_SHLIB   (target_flags & MASK_SVR3_SHLIB)
#define TARGET_IEEE_FP   (target_flags & MASK_IEEE_FP)
#define TARGET_FLOAT_RETURNS_IN_80387   (target_flags & MASK_FLOAT_RETURNS)
#define TARGET_128BIT_LONG_DOUBLE   (target_flags & MASK_128BIT_LONG_DOUBLE)
#define TARGET_NO_FANCY_MATH_387   (target_flags & MASK_NO_FANCY_MATH_387)
#define TARGET_USE_FANCY_MATH_387   (! TARGET_NO_FANCY_MATH_387)
#define TARGET_OMIT_LEAF_FRAME_POINTER   (target_flags & MASK_OMIT_LEAF_FRAME_POINTER)
#define TARGET_DEBUG_ADDR   (ix86_debug_addr_string != 0)
#define TARGET_DEBUG_ARG   (ix86_debug_arg_string != 0)
#define TARGET_64BIT   0
#define HAS_LONG_COND_BRANCH   1
#define HAS_LONG_UNCOND_BRANCH   1
#define TARGET_TLS_DIRECT_SEG_REFS   (target_flags & MASK_TLS_DIRECT_SEG_REFS)
#define TARGET_386   (ix86_tune == PROCESSOR_I386)
#define TARGET_486   (ix86_tune == PROCESSOR_I486)
#define TARGET_PENTIUM   (ix86_tune == PROCESSOR_PENTIUM)
#define TARGET_PENTIUMPRO   (ix86_tune == PROCESSOR_PENTIUMPRO)
#define TARGET_K6   (ix86_tune == PROCESSOR_K6)
#define TARGET_ATHLON   (ix86_tune == PROCESSOR_ATHLON)
#define TARGET_PENTIUM4   (ix86_tune == PROCESSOR_PENTIUM4)
#define TARGET_K8   (ix86_tune == PROCESSOR_K8)
#define TARGET_ATHLON_K8   (TARGET_K8 || TARGET_ATHLON)
#define TARGET_NOCONA   (ix86_tune == PROCESSOR_NOCONA)
#define TUNEMASK   (1 << ix86_tune)
#define TARGET_USE_LEAVE   (x86_use_leave & TUNEMASK)
#define TARGET_PUSH_MEMORY   (x86_push_memory & TUNEMASK)
#define TARGET_ZERO_EXTEND_WITH_AND   (x86_zero_extend_with_and & TUNEMASK)
#define TARGET_USE_BIT_TEST   (x86_use_bit_test & TUNEMASK)
#define TARGET_UNROLL_STRLEN   (x86_unroll_strlen & TUNEMASK)
#define TARGET_CMOVE   ((x86_cmove & (1 << ix86_arch)) || TARGET_SSE)
#define TARGET_DEEP_BRANCH_PREDICTION   (x86_deep_branch & TUNEMASK)
#define TARGET_BRANCH_PREDICTION_HINTS   (x86_branch_hints & TUNEMASK)
#define TARGET_DOUBLE_WITH_ADD   (x86_double_with_add & TUNEMASK)
#define TARGET_USE_SAHF   ((x86_use_sahf & TUNEMASK) && !TARGET_64BIT)
#define TARGET_MOVX   (x86_movx & TUNEMASK)
#define TARGET_PARTIAL_REG_STALL   (x86_partial_reg_stall & TUNEMASK)
#define TARGET_USE_LOOP   (x86_use_loop & TUNEMASK)
#define TARGET_USE_FIOP   (x86_use_fiop & TUNEMASK)
#define TARGET_USE_MOV0   (x86_use_mov0 & TUNEMASK)
#define TARGET_USE_CLTD   (x86_use_cltd & TUNEMASK)
#define TARGET_SPLIT_LONG_MOVES   (x86_split_long_moves & TUNEMASK)
#define TARGET_READ_MODIFY_WRITE   (x86_read_modify_write & TUNEMASK)
#define TARGET_READ_MODIFY   (x86_read_modify & TUNEMASK)
#define TARGET_PROMOTE_QImode   (x86_promote_QImode & TUNEMASK)
#define TARGET_FAST_PREFIX   (x86_fast_prefix & TUNEMASK)
#define TARGET_SINGLE_STRINGOP   (x86_single_stringop & TUNEMASK)
#define TARGET_QIMODE_MATH   (x86_qimode_math & TUNEMASK)
#define TARGET_HIMODE_MATH   (x86_himode_math & TUNEMASK)
#define TARGET_PROMOTE_QI_REGS   (x86_promote_qi_regs & TUNEMASK)
#define TARGET_PROMOTE_HI_REGS   (x86_promote_hi_regs & TUNEMASK)
#define TARGET_ADD_ESP_4   (x86_add_esp_4 & TUNEMASK)
#define TARGET_ADD_ESP_8   (x86_add_esp_8 & TUNEMASK)
#define TARGET_SUB_ESP_4   (x86_sub_esp_4 & TUNEMASK)
#define TARGET_SUB_ESP_8   (x86_sub_esp_8 & TUNEMASK)
#define TARGET_INTEGER_DFMODE_MOVES   (x86_integer_DFmode_moves & TUNEMASK)
#define TARGET_PARTIAL_REG_DEPENDENCY   (x86_partial_reg_dependency & TUNEMASK)
#define TARGET_SSE_PARTIAL_REG_DEPENDENCY   (x86_sse_partial_reg_dependency & TUNEMASK)
#define TARGET_SSE_SPLIT_REGS   (x86_sse_split_regs & TUNEMASK)
#define TARGET_SSE_TYPELESS_STORES   (x86_sse_typeless_stores & TUNEMASK)
#define TARGET_SSE_LOAD0_BY_PXOR   (x86_sse_load0_by_pxor & TUNEMASK)
#define TARGET_MEMORY_MISMATCH_STALL   (x86_memory_mismatch_stall & TUNEMASK)
#define TARGET_PROLOGUE_USING_MOVE   (x86_prologue_using_move & TUNEMASK)
#define TARGET_EPILOGUE_USING_MOVE   (x86_epilogue_using_move & TUNEMASK)
#define TARGET_DECOMPOSE_LEA   (x86_decompose_lea & TUNEMASK)
#define TARGET_PREFETCH_SSE   (x86_prefetch_sse)
#define TARGET_SHIFT1   (x86_shift1 & TUNEMASK)
#define TARGET_USE_FFREEP   (x86_use_ffreep & TUNEMASK)
#define TARGET_REP_MOVL_OPTIMAL   (x86_rep_movl_optimal & TUNEMASK)
#define TARGET_INTER_UNIT_MOVES   (x86_inter_unit_moves & TUNEMASK)
#define TARGET_FOUR_JUMP_LIMIT   (x86_four_jump_limit & TUNEMASK)
#define TARGET_SCHEDULE   (x86_schedule & TUNEMASK)
#define TARGET_USE_BT   (x86_use_bt & TUNEMASK)
#define TARGET_STACK_PROBE   (target_flags & MASK_STACK_PROBE)
#define TARGET_ALIGN_STRINGOPS   (!(target_flags & MASK_NO_ALIGN_STROPS))
#define TARGET_INLINE_ALL_STRINGOPS   (target_flags & MASK_INLINE_ALL_STROPS)
#define ASSEMBLER_DIALECT   (ix86_asm_dialect)
#define TARGET_SSE   ((target_flags & MASK_SSE) != 0)
#define TARGET_SSE2   ((target_flags & MASK_SSE2) != 0)
#define TARGET_SSE3   ((target_flags & MASK_SSE3) != 0)
#define TARGET_SSE_MATH   ((ix86_fpmath & FPMATH_SSE) != 0)
#define TARGET_MIX_SSE_I387
#define TARGET_MMX   ((target_flags & MASK_MMX) != 0)
#define TARGET_3DNOW   ((target_flags & MASK_3DNOW) != 0)
#define TARGET_3DNOW_A   ((target_flags & MASK_3DNOW_A) != 0)
#define TARGET_RED_ZONE   (!(target_flags & MASK_NO_RED_ZONE))
#define TARGET_USE_MS_BITFIELD_LAYOUT   (target_flags & MASK_MS_BITFIELD_LAYOUT)
#define TARGET_GNU_TLS   (ix86_tls_dialect == TLS_DIALECT_GNU)
#define TARGET_SUN_TLS   (ix86_tls_dialect == TLS_DIALECT_SUN)
#define TARGET_SWITCHES
#define TARGET_64BIT_DEFAULT   0
#define TARGET_TLS_DIRECT_SEG_REFS_DEFAULT   0
#define TARGET_DEFAULT   0
#define TARGET_MACHO   0
#define TARGET_96_ROUND_53_LONG_DOUBLE   0
#define TARGET_OPTIONS
#define OVERRIDE_OPTIONS   override_options ()
#define SUBTARGET_SWITCHES
#define SUBTARGET_OPTIONS
#define OPTIMIZATION_OPTIONS(LEVEL, SIZE)   optimization_options ((LEVEL), (SIZE))
#define OPTION_DEFAULT_SPECS
#define CC1_CPU_SPEC   "\%{!mtune*: \%{m386:mtune=i386 \%n`-m386' is deprecated. Use `-march=i386' or `-mtune=i386' instead.\n} \%{m486:-mtune=i486 \%n`-m486' is deprecated. Use `-march=i486' or `-mtune=i486' instead.\n} \%{mpentium:-mtune=pentium \%n`-mpentium' is deprecated. Use `-march=pentium' or `-mtune=pentium' instead.\n} \%{mpentiumpro:-mtune=pentiumpro \%n`-mpentiumpro' is deprecated. Use `-march=pentiumpro' or `-mtune=pentiumpro' instead.\n} \%{mcpu=*:-mtune=%* \%n`-mcpu=' is deprecated. Use `-mtune=' or '-march=' instead.\n}} \%<mcpu=* \%{mintel-syntax:-masm=intel \%n`-mintel-syntax' is deprecated. Use `-masm=intel' instead.\n} \%{mno-intel-syntax:-masm=att \%n`-mno-intel-syntax' is deprecated. Use `-masm=att' instead.\n}"
#define TARGET_CPU_CPP_BUILTINS()
#define TARGET_CPU_DEFAULT_i386   0
#define TARGET_CPU_DEFAULT_i486   1
#define TARGET_CPU_DEFAULT_pentium   2
#define TARGET_CPU_DEFAULT_pentium_mmx   3
#define TARGET_CPU_DEFAULT_pentiumpro   4
#define TARGET_CPU_DEFAULT_pentium2   5
#define TARGET_CPU_DEFAULT_pentium3   6
#define TARGET_CPU_DEFAULT_pentium4   7
#define TARGET_CPU_DEFAULT_k6   8
#define TARGET_CPU_DEFAULT_k6_2   9
#define TARGET_CPU_DEFAULT_k6_3   10
#define TARGET_CPU_DEFAULT_athlon   11
#define TARGET_CPU_DEFAULT_athlon_sse   12
#define TARGET_CPU_DEFAULT_k8   13
#define TARGET_CPU_DEFAULT_pentium_m   14
#define TARGET_CPU_DEFAULT_prescott   15
#define TARGET_CPU_DEFAULT_nocona   16
#define TARGET_CPU_DEFAULT_NAMES
#define CC1_SPEC   "%(cc1_cpu) "
#define EXTRA_SPECS
#define LONG_DOUBLE_TYPE_SIZE   80
#define TARGET_FLT_EVAL_METHOD   (TARGET_MIX_SSE_I387 ? -1 : TARGET_SSE_MATH ? 0 : 2)
#define SHORT_TYPE_SIZE   16
#define INT_TYPE_SIZE   32
#define FLOAT_TYPE_SIZE   32
#define LONG_TYPE_SIZE   BITS_PER_WORD
#define DOUBLE_TYPE_SIZE   64
#define LONG_LONG_TYPE_SIZE   64
#define MAX_BITS_PER_WORD   32
#define BITS_BIG_ENDIAN   0
#define BYTES_BIG_ENDIAN   0
#define WORDS_BIG_ENDIAN   0
#define UNITS_PER_WORD   (TARGET_64BIT ? 8 : 4)
#define MIN_UNITS_PER_WORD   4
#define PARM_BOUNDARY   BITS_PER_WORD
#define STACK_BOUNDARY   BITS_PER_WORD
#define PREFERRED_STACK_BOUNDARY   ix86_preferred_stack_boundary
#define FORCE_PREFERRED_STACK_BOUNDARY_IN_MAIN   (ix86_preferred_stack_boundary > STACK_BOUNDARY && !TARGET_64BIT)
#define FUNCTION_BOUNDARY   8
#define TARGET_PTRMEMFUNC_VBIT_LOCATION   ptrmemfunc_vbit_in_pfn
#define EMPTY_FIELD_BOUNDARY   BITS_PER_WORD
#define BIGGEST_ALIGNMENT   128
#define ALIGN_MODE_128(MODE)   ((MODE) == XFmode || (MODE) == TFmode || SSE_REG_MODE_P (MODE))
#define ADJUST_FIELD_ALIGN(FIELD, COMPUTED)   x86_field_alignment (FIELD, COMPUTED)
#define CONSTANT_ALIGNMENT(EXP, ALIGN)   ix86_constant_alignment ((EXP), (ALIGN))
#define DATA_ALIGNMENT(TYPE, ALIGN)   ix86_data_alignment ((TYPE), (ALIGN))
#define LOCAL_ALIGNMENT(TYPE, ALIGN)   ix86_local_alignment ((TYPE), (ALIGN))
#define FUNCTION_ARG_BOUNDARY(MODE, TYPE)   ix86_function_arg_boundary ((MODE), (TYPE))
#define STRICT_ALIGNMENT   0
#define PCC_BITFIELD_TYPE_MATTERS   1
#define STACK_REGS
#define IS_STACK_MODE(MODE)   ((MODE) == DFmode || (MODE) == SFmode || (MODE) == XFmode) \
#define FIRST_PSEUDO_REGISTER   53
#define DWARF_FRAME_REGISTERS   17
#define FIXED_REGISTERS
#define CALL_USED_REGISTERS
#define REG_ALLOC_ORDER
#define ORDER_REGS_FOR_LOCAL_ALLOC   x86_order_regs_for_local_alloc ()
#define CONDITIONAL_REGISTER_USAGE
#define HARD_REGNO_NREGS(REGNO, MODE)
#define VALID_SSE2_REG_MODE(MODE)
#define VALID_SSE_REG_MODE(MODE)
#define VALID_MMX_REG_MODE_3DNOW(MODE)   ((MODE) == V2SFmode || (MODE) == SFmode)
#define VALID_MMX_REG_MODE(MODE)
#define UNITS_PER_SIMD_WORD   (TARGET_SSE ? 16 : 0)
#define VALID_FP_MODE_P(MODE)
#define VALID_INT_MODE_P(MODE)
#define SSE_REG_MODE_P(MODE)
#define HARD_REGNO_MODE_OK(REGNO, MODE)   ix86_hard_regno_mode_ok ((REGNO), (MODE))
#define MODES_TIEABLE_P(MODE1, MODE2)   ix86_modes_tieable_p (MODE1, MODE2)
#define AVOID_CCMODE_COPIES
#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE)
#define STACK_POINTER_REGNUM   7
#define HARD_FRAME_POINTER_REGNUM   6
#define FRAME_POINTER_REGNUM   20
#define FIRST_FLOAT_REG   8
#define FIRST_STACK_REG   FIRST_FLOAT_REG
#define LAST_STACK_REG   (FIRST_FLOAT_REG + 7)
#define FIRST_SSE_REG   (FRAME_POINTER_REGNUM + 1)
#define LAST_SSE_REG   (FIRST_SSE_REG + 7)
#define FIRST_MMX_REG   (LAST_SSE_REG + 1)
#define LAST_MMX_REG   (FIRST_MMX_REG + 7)
#define FIRST_REX_INT_REG   (LAST_MMX_REG + 1)
#define LAST_REX_INT_REG   (FIRST_REX_INT_REG + 7)
#define FIRST_REX_SSE_REG   (LAST_REX_INT_REG + 1)
#define LAST_REX_SSE_REG   (FIRST_REX_SSE_REG + 7)
#define FRAME_POINTER_REQUIRED   ix86_frame_pointer_required ()
#define SUBTARGET_FRAME_POINTER_REQUIRED   0
#define SETUP_FRAME_ADDRESSES()   ix86_setup_frame_addresses ()
#define ARG_POINTER_REGNUM   16
#define STATIC_CHAIN_REGNUM   (TARGET_64BIT ? FIRST_REX_INT_REG + 10 - 8 : 2)
#define REAL_PIC_OFFSET_TABLE_REGNUM   3
#define PIC_OFFSET_TABLE_REGNUM
#define GOT_SYMBOL_NAME   "_GLOBAL_OFFSET_TABLE_"
#define RETURN_IN_MEMORY(TYPE)   ix86_return_in_memory (TYPE)
#define MS_AGGREGATE_RETURN   0
#define KEEP_AGGREGATE_RETURN_POINTER   0
#define N_REG_CLASSES   ((int) LIM_REG_CLASSES)
#define INTEGER_CLASS_P(CLASS)   reg_class_subset_p ((CLASS), GENERAL_REGS)
#define FLOAT_CLASS_P(CLASS)   reg_class_subset_p ((CLASS), FLOAT_REGS)
#define SSE_CLASS_P(CLASS)   ((CLASS) == SSE_REGS)
#define MMX_CLASS_P(CLASS)   ((CLASS) == MMX_REGS)
#define MAYBE_INTEGER_CLASS_P(CLASS)   reg_classes_intersect_p ((CLASS), GENERAL_REGS)
#define MAYBE_FLOAT_CLASS_P(CLASS)   reg_classes_intersect_p ((CLASS), FLOAT_REGS)
#define MAYBE_SSE_CLASS_P(CLASS)   reg_classes_intersect_p (SSE_REGS, (CLASS))
#define MAYBE_MMX_CLASS_P(CLASS)   reg_classes_intersect_p (MMX_REGS, (CLASS))
#define Q_CLASS_P(CLASS)   reg_class_subset_p ((CLASS), Q_REGS)
#define REG_CLASS_NAMES
#define REG_CLASS_CONTENTS
#define REGNO_REG_CLASS(REGNO)   (regclass_map[REGNO])
#define SMALL_REGISTER_CLASSES   1
#define QI_REG_P(X)   (REG_P (X) && REGNO (X) < 4)
#define GENERAL_REGNO_P(N)   ((N) < 8 || REX_INT_REGNO_P (N))
#define GENERAL_REG_P(X)   (REG_P (X) && GENERAL_REGNO_P (REGNO (X)))
#define ANY_QI_REG_P(X)   (TARGET_64BIT ? GENERAL_REG_P(X) : QI_REG_P (X))
#define NON_QI_REG_P(X)   (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
#define REX_INT_REGNO_P(N)   ((N) >= FIRST_REX_INT_REG && (N) <= LAST_REX_INT_REG)
#define REX_INT_REG_P(X)   (REG_P (X) && REX_INT_REGNO_P (REGNO (X)))
#define FP_REG_P(X)   (REG_P (X) && FP_REGNO_P (REGNO (X)))
#define FP_REGNO_P(N)   ((N) >= FIRST_STACK_REG && (N) <= LAST_STACK_REG)
#define ANY_FP_REG_P(X)   (REG_P (X) && ANY_FP_REGNO_P (REGNO (X)))
#define ANY_FP_REGNO_P(N)   (FP_REGNO_P (N) || SSE_REGNO_P (N))
#define SSE_REGNO_P(N)
#define REX_SSE_REGNO_P(N)   ((N) >= FIRST_REX_SSE_REG && (N) <= LAST_REX_SSE_REG)
#define SSE_REGNO(N)   ((N) < 8 ? FIRST_SSE_REG + (N) : FIRST_REX_SSE_REG + (N) - 8)
#define SSE_REG_P(N)   (REG_P (N) && SSE_REGNO_P (REGNO (N)))
#define SSE_FLOAT_MODE_P(MODE)   ((TARGET_SSE && (MODE) == SFmode) || (TARGET_SSE2 && (MODE) == DFmode))
#define MMX_REGNO_P(N)   ((N) >= FIRST_MMX_REG && (N) <= LAST_MMX_REG)
#define MMX_REG_P(XOP)   (REG_P (XOP) && MMX_REGNO_P (REGNO (XOP)))
#define STACK_REG_P(XOP)
#define NON_STACK_REG_P(XOP)   (REG_P (XOP) && ! STACK_REG_P (XOP))
#define STACK_TOP_P(XOP)   (REG_P (XOP) && REGNO (XOP) == FIRST_STACK_REG)
#define CC_REG_P(X)   (REG_P (X) && CC_REGNO_P (REGNO (X)))
#define CC_REGNO_P(X)   ((X) == FLAGS_REG || (X) == FPSR_REG)
#define INDEX_REG_CLASS   INDEX_REGS
#define BASE_REG_CLASS   GENERAL_REGS
#define REG_CLASS_FROM_LETTER(C)
#define CONST_OK_FOR_LETTER_P(VALUE, C)
#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C)
#define EXTRA_CONSTRAINT(VALUE, D)
#define LIMIT_RELOAD_CLASS(MODE, CLASS)
#define PREFERRED_RELOAD_CLASS(X, CLASS)   ix86_preferred_reload_class ((X), (CLASS))
#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE)   ix86_secondary_memory_needed ((CLASS1), (CLASS2), (MODE), 1)
#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT)
#define CLASS_MAX_NREGS(CLASS, MODE)
#define CLASS_LIKELY_SPILLED_P(CLASS)
#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS)   ix86_cannot_change_mode_class (FROM, TO, CLASS)
#define STACK_GROWS_DOWNWARD
#define FRAME_GROWS_DOWNWARD
#define STARTING_FRAME_OFFSET   0
#define PUSH_ROUNDING(BYTES)
#define ACCUMULATE_OUTGOING_ARGS   TARGET_ACCUMULATE_OUTGOING_ARGS
#define PUSH_ARGS   (TARGET_PUSH_ARGS && !ACCUMULATE_OUTGOING_ARGS)
#define PUSH_ARGS_REVERSED   1
#define FIRST_PARM_OFFSET(FNDECL)   0
#define REG_PARM_STACK_SPACE(FNDECL)   0
#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE)   ix86_return_pops_args ((FUNDECL), (FUNTYPE), (SIZE))
#define FUNCTION_VALUE(VALTYPE, FUNC)   ix86_function_value (VALTYPE)
#define FUNCTION_VALUE_REGNO_P(N)   ix86_function_value_regno_p (N)
#define LIBCALL_VALUE(MODE)   ix86_libcall_value (MODE)
#define APPLY_RESULT_SIZE   (8+108)
#define FUNCTION_ARG_REGNO_P(N)   ix86_function_arg_regno_p (N)
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS)   init_cumulative_args (&(CUM), (FNTYPE), (LIBNAME), (FNDECL))
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)   function_arg_advance (&(CUM), (MODE), (TYPE), (NAMED))
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED)   function_arg (&(CUM), (MODE), (TYPE), (NAMED))
#define EXPAND_BUILTIN_VA_START(VALIST, NEXTARG)   ix86_va_start (VALIST, NEXTARG)
#define TARGET_ASM_FILE_END   ix86_file_end
#define NEED_INDICATE_EXEC_STACK   0
#define FUNCTION_PROFILER(FILE, LABELNO)   x86_function_profiler (FILE, LABELNO)
#define MCOUNT_NAME   "_mcount"
#define PROFILE_COUNT_REGISTER   "edx"
#define EXIT_IGNORE_STACK   1
#define TRAMPOLINE_SIZE   (TARGET_64BIT ? 23 : 10)
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT)   x86_initialize_trampoline ((TRAMP), (FNADDR), (CXT))
#define ELIMINABLE_REGS
#define CAN_ELIMINATE(FROM, TO)   ((TO) == STACK_POINTER_REGNUM ? ! frame_pointer_needed : 1)
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)   ((OFFSET) = ix86_initial_elimination_offset ((FROM), (TO)))
#define REGNO_OK_FOR_INDEX_P(REGNO)
#define REGNO_OK_FOR_BASE_P(REGNO)
#define REGNO_OK_FOR_SIREG_P(REGNO)   ((REGNO) == 4 || reg_renumber[(REGNO)] == 4)
#define REGNO_OK_FOR_DIREG_P(REGNO)   ((REGNO) == 5 || reg_renumber[(REGNO)] == 5)
#define REG_OK_FOR_INDEX_NONSTRICT_P(X)
#define REG_OK_FOR_BASE_NONSTRICT_P(X)
#define REG_OK_FOR_INDEX_STRICT_P(X)   REGNO_OK_FOR_INDEX_P (REGNO (X))
#define REG_OK_FOR_BASE_STRICT_P(X)   REGNO_OK_FOR_BASE_P (REGNO (X))
#define REG_OK_FOR_INDEX_P(X)   REG_OK_FOR_INDEX_NONSTRICT_P (X)
#define REG_OK_FOR_BASE_P(X)   REG_OK_FOR_BASE_NONSTRICT_P (X)
#define MAX_REGS_PER_ADDRESS   2
#define CONSTANT_ADDRESS_P(X)   constant_address_p (X)
#define LEGITIMATE_CONSTANT_P(X)   legitimate_constant_p (X)
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)
#define FIND_BASE_TERM(X)   ix86_find_base_term (X)
#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
#define REWRITE_ADDRESS(X)   rewrite_address (X)
#define LEGITIMATE_PIC_OPERAND_P(X)   legitimate_pic_operand_p (X)
#define SYMBOLIC_CONST(X)
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
#define REGPARM_MAX   (TARGET_64BIT ? 6 : 3)
#define SSE_REGPARM_MAX   (TARGET_64BIT ? 8 : (TARGET_SSE ? 3 : 0))
#define MMX_REGPARM_MAX   (TARGET_64BIT ? 0 : (TARGET_MMX ? 3 : 0))
#define CASE_VECTOR_MODE   (!TARGET_64BIT || flag_pic ? SImode : DImode)
#define DEFAULT_SIGNED_CHAR   1
#define PREFETCH_BLOCK   ix86_cost->prefetch_block
#define SIMULTANEOUS_PREFETCHES   ix86_cost->simultaneous_prefetches
#define MOVE_MAX   16
#define MOVE_MAX_PIECES   (TARGET_64BIT ? 8 : 4)
#define MOVE_RATIO   (optimize_size ? 3 : ix86_cost->move_ratio)
#define CLEAR_RATIO
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC)   1
#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)
#define Pmode   (TARGET_64BIT ? DImode : SImode)
#define FUNCTION_MODE   QImode
#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2)   ix86_register_move_cost ((MODE), (CLASS1), (CLASS2))
#define MEMORY_MOVE_COST(MODE, CLASS, IN)   ix86_memory_move_cost ((MODE), (CLASS), (IN))
#define BRANCH_COST   ix86_branch_cost
#define SLOW_BYTE_ACCESS   0
#define SLOW_SHORT_ACCESS   0
#define NO_FUNCTION_CSE
#define SELECT_CC_MODE(OP, X, Y)   ix86_cc_mode ((OP), (X), (Y))
#define REVERSIBLE_CC_MODE(MODE)   1
#define REVERSE_CONDITION(CODE, MODE)   ix86_reverse_condition ((CODE), (MODE))
#define HI_REGISTER_NAMES
#define REGISTER_NAMES   HI_REGISTER_NAMES
#define ADDITIONAL_REGISTER_NAMES
#define QI_REGISTER_NAMES   {"al", "dl", "cl", "bl", "sil", "dil", "bpl", "spl",}
#define QI_HIGH_REGISTER_NAMES   {"ah", "dh", "ch", "bh", }
#define DBX_REGISTER_NUMBER(N)   (TARGET_64BIT ? dbx64_register_map[(N)] : dbx_register_map[(N)])
#define INCOMING_RETURN_ADDR_RTX   gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM))
#define RETURN_ADDR_RTX(COUNT, FRAME)
#define DWARF_FRAME_RETURN_COLUMN   (TARGET_64BIT ? 16 : 8)
#define INCOMING_FRAME_SP_OFFSET   UNITS_PER_WORD
#define EH_RETURN_DATA_REGNO(N)   ((N) < 2 ? (N) : INVALID_REGNUM)
#define EH_RETURN_STACKADJ_RTX   gen_rtx_REG (Pmode, 2)
#define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL)
#define ASM_OUTPUT_REG_PUSH(FILE, REGNO)
#define ASM_OUTPUT_REG_POP(FILE, REGNO)
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)   ix86_output_addr_vec_elt ((FILE), (VALUE))
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)   ix86_output_addr_diff_elt ((FILE), (VALUE), (REL))
#define JUMP_TABLES_IN_TEXT_SECTION   (!TARGET_64BIT && flag_pic && !HAVE_AS_GOTOFF_IN_DATA)
#define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC)
#define PRINT_OPERAND_PUNCT_VALID_P(CODE)   ((CODE) == '*' || (CODE) == '+' || (CODE) == '&')
#define PRINT_OPERAND(FILE, X, CODE)   print_operand ((FILE), (X), (CODE))
#define PRINT_OPERAND_ADDRESS(FILE, ADDR)   print_operand_address ((FILE), (ADDR))
#define OUTPUT_ADDR_CONST_EXTRA(FILE, X, FAIL)
#define ASM_OPERAND_LETTER   '#'
#define RET   return ""
#define AT_SP(MODE)   (gen_rtx_MEM ((MODE), stack_pointer_rtx))
#define RED_ZONE_SIZE   128
#define RED_ZONE_RESERVE   8
#define OPTIMIZE_MODE_SWITCHING(ENTITY)   ix86_optimize_mode_switching
#define NUM_MODES_FOR_MODE_SWITCHING   { I387_CW_ANY }
#define MODE_NEEDED(ENTITY, I)
#define MODE_PRIORITY_TO_MODE(ENTITY, N)   (N)
#define EMIT_MODE_SET(ENTITY, MODE, HARD_REGS_LIVE)
#define HARD_REGNO_RENAME_OK(SRC, TARGET)   ((SRC) < FIRST_STACK_REG || (SRC) > LAST_STACK_REG)
#define DLL_IMPORT_EXPORT_PREFIX   '#'
#define FASTCALL_PREFIX   '@'
#define ix86_stack_locals   (cfun->machine->stack_locals)
#define ix86_save_varrargs_registers   (cfun->machine->save_varrargs_registers)
#define ix86_optimize_mode_switching   (cfun->machine->optimize_mode_switching)
#define X86_FILE_START_VERSION_DIRECTIVE   false
#define X86_FILE_START_FLTUSED   false

Typedefs

typedef struct ix86_args CUMULATIVE_ARGS

Enumerations

enum  reg_class {
  NO_REGS, R2, R0_1, INDEX_REGS,
  BASE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  LR0_REGS, GENERAL_REGS, BP_REGS, FC_REGS,
  CR_REGS, Q_REGS, SPECIAL_REGS, ACCUM0_REGS,
  ACCUM_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R24_REG, R25_REG, R27_REG,
  GENERAL_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, LPCOUNT_REG, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, FPU_REGS, LO_REGS,
  STACK_REG, BASE_REGS, HI_REGS, CC_REG,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REG, POINTER_X_REGS, POINTER_Y_REGS, POINTER_Z_REGS,
  STACK_REG, BASE_POINTER_REGS, POINTER_REGS, ADDW_REGS,
  SIMPLE_LD_REGS, LD_REGS, NO_LD_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0R1_REGS,
  R2R3_REGS, EXT_LOW_REGS, EXT_REGS, ADDR_REGS,
  INDEX_REGS, BK_REG, SP_REG, RC_REG,
  COUNTER_REGS, INT_REGS, GENERAL_REGS, DP_REG,
  ST_REG, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, S_REGS, INDEX_REGS, SP_REGS,
  A_REGS, SI_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  REPEAT_REGS, CR_REGS, ACCUM_REGS, OTHER_FLAG_REGS,
  F0_REGS, F1_REGS, BR_FLAG_REGS, FLAG_REGS,
  EVEN_REGS, GPR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, A0H_REG, A0L_REG, A0_REG,
  A1H_REG, ACCUM_HIGH_REGS, A1L_REG, ACCUM_LOW_REGS,
  A1_REG, ACCUM_REGS, X_REG, X_OR_ACCUM_LOW_REGS,
  X_OR_ACCUM_REGS, YH_REG, YH_OR_ACCUM_HIGH_REGS, X_OR_YH_REGS,
  YL_REG, YL_OR_ACCUM_LOW_REGS, X_OR_YL_REGS, X_OR_Y_REGS,
  Y_REG, ACCUM_OR_Y_REGS, PH_REG, X_OR_PH_REGS,
  PL_REG, PL_OR_ACCUM_LOW_REGS, X_OR_PL_REGS, YL_OR_PL_OR_ACCUM_LOW_REGS,
  P_REG, ACCUM_OR_P_REGS, YL_OR_P_REGS, ACCUM_LOW_OR_YL_OR_P_REGS,
  Y_OR_P_REGS, ACCUM_Y_OR_P_REGS, NO_FRAME_Y_ADDR_REGS, Y_ADDR_REGS,
  ACCUM_LOW_OR_Y_ADDR_REGS, ACCUM_OR_Y_ADDR_REGS, X_OR_Y_ADDR_REGS, Y_OR_Y_ADDR_REGS,
  P_OR_Y_ADDR_REGS, NON_HIGH_YBASE_ELIGIBLE_REGS, YBASE_ELIGIBLE_REGS, J_REG,
  J_OR_DAU_16_BIT_REGS, BMU_REGS, NOHIGH_NON_ADDR_REGS, NON_ADDR_REGS,
  SLOW_MEM_LOAD_REGS, NOHIGH_NON_YBASE_REGS, NO_ACCUM_NON_YBASE_REGS, NON_YBASE_REGS,
  YBASE_VIRT_REGS, ACCUM_LOW_OR_YBASE_REGS, ACCUM_OR_YBASE_REGS, X_OR_YBASE_REGS,
  Y_OR_YBASE_REGS, ACCUM_LOW_YL_PL_OR_YBASE_REGS, P_OR_YBASE_REGS, ACCUM_Y_P_OR_YBASE_REGS,
  Y_ADDR_OR_YBASE_REGS, YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS, YBASE_OR_YBASE_ELIGIBLE_REGS, NO_HIGH_ALL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG,
  MULTIPLY_64_REG, LOW_REGS, HIGH_REGS, REAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,
  MAC_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ADDR_REGS, DATA_REGS, FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, AREG, DREG,
  CREG, BREG, SIREG, DIREG,
  AD_REGS, Q_REGS, NON_Q_REGS, INDEX_REGS,
  LEGACY_REGS, GENERAL_REGS, FP_TOP_REG, FP_SECOND_REG,
  FLOAT_REGS, SSE_REGS, MMX_REGS, FP_TOP_SSE_REGS,
  FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS, INT_SSE_REGS,
  FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GLOBAL_REGS, LOCAL_REGS, LOCAL_OR_GLOBAL_REGS,
  FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  PR_REGS, BR_REGS, AR_M_REGS, AR_I_REGS,
  ADDL_REGS, GR_REGS, FR_REGS, GR_AND_BR_REGS,
  GR_AND_FR_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  CARRY_REG, ACCUM_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, D_REGS, X_REGS,
  Y_REGS, SP_REGS, DA_REGS, DB_REGS,
  Z_REGS, D8_REGS, Q_REGS, D_OR_X_REGS,
  D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS, A_REGS,
  X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS, A_OR_D_REGS,
  A_OR_SP_REGS, H_REGS, S_REGS, D_OR_S_REGS,
  X_OR_S_REGS, Y_OR_S_REGS, SP_OR_S_REGS, D_OR_X_OR_S_REGS,
  D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS, A_OR_S_REGS, D_OR_A_OR_S_REGS,
  TMP_REGS, D_OR_A_OR_TMP_REGS, G_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, DATA_REGS, ADDR_REGS,
  FP_REGS, GENERAL_REGS, DATA_OR_FP_REGS, ADDR_OR_FP_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, AP_REG,
  XRF_REGS, GENERAL_REGS, AGRF_REGS, XGRF_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, ONLYR1_REGS,
  LRW_REGS, GENERAL_REGS, C_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, REMAINDER_REG,
  HIMULT_REG, SYSTEM_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, DATA_REGS, ADDRESS_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,
  ADDRESS_REGS, SP_REGS, DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,
  EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS,
  SP_OR_ADDRESS_OR_EXTENDED_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, FLOAT_REG0, LONG_FLOAT_REG0,
  FLOAT_REGS, FP_REGS, GEN_AND_FP_REGS, FRAME_POINTER_REG,
  STACK_POINTER_REG, GEN_AND_MEM_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R1_REGS, GENERAL_REGS, FPUPPER_REGS,
  FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,
  FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, MUL_REGS,
  GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS, FPU_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, OUT_REGS,
  STD_REGS, ARG_REGS, SRC_REGS, DST_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0_REGS,
  R15_REGS, BASE_REGS, GENERAL_REGS, FP_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, BASE_REGS,
  GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS, VRSAVE_REGS,
  NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,
  LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,
  CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, ADDR_REGS, GENERAL_REGS,
  FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REGS, PR_REGS,
  T_REGS, MAC_REGS, FPUL_REGS, SIBCALL_REGS,
  GENERAL_REGS, FP0_REGS, FP_REGS, DF_REGS,
  FPSCR_REGS, GENERAL_FP_REGS, TARGET_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, M16_NA_REGS, M16_REGS,
  T_REG, M16_T_REGS, GR_REGS, FP_REGS,
  HI_REG, LO_REG, HILO_REG, MD_REGS,
  COP0_REGS, COP2_REGS, COP3_REGS, HI_AND_GR_REGS,
  LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS,
  COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS,
  ST_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  FPCC_REGS, I64_REGS, GENERAL_REGS, FP_REGS,
  EXTRA_FP_REGS, GENERAL_OR_FP_REGS, GENERAL_OR_EXTRA_FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REGS, R1_REGS,
  TWO_REGS, R2_REGS, EIGHT_REGS, R8_REGS,
  ICALL_REGS, GENERAL_REGS, CARRY_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, BR_REGS, FP_REGS, ACC_REG,
  SP_REG, RL_REGS, GR_REGS, AR_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,
  M16_REGS, T_REG, M16_T_REGS, GR_REGS,
  FP_REGS, HI_REG, LO_REG, HILO_REG,
  MD_REGS, COP0_REGS, COP2_REGS, COP3_REGS,
  HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS,
  COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS,
  ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, M16_NA_REGS, M16_REGS, T_REG,
  M16_T_REGS, GR_REGS, FP_REGS, HI_REG,
  LO_REG, HILO_REG, MD_REGS, COP0_REGS,
  COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,
  HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS,
  COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R2,
  R0_1, INDEX_REGS, BASE_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, LR0_REGS, GENERAL_REGS,
  BP_REGS, FC_REGS, CR_REGS, Q_REGS,
  SPECIAL_REGS, ACCUM0_REGS, ACCUM_REGS, FLOAT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R24_REG,
  R25_REG, R27_REG, GENERAL_REGS, FLOAT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  FPU_REGS, LO_REGS, STACK_REG, BASE_REGS,
  HI_REGS, CC_REG, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REG, POINTER_X_REGS,
  POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG, BASE_POINTER_REGS,
  POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS, LD_REGS,
  NO_LD_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R0R1_REGS, R2R3_REGS, EXT_LOW_REGS,
  EXT_REGS, ADDR_REGS, INDEX_REGS, BK_REG,
  SP_REG, RC_REG, COUNTER_REGS, INT_REGS,
  GENERAL_REGS, DP_REG, ST_REG, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, FLOAT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, S_REGS,
  INDEX_REGS, SP_REGS, A_REGS, SI_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, REPEAT_REGS, CR_REGS,
  ACCUM_REGS, OTHER_FLAG_REGS, F0_REGS, F1_REGS,
  BR_FLAG_REGS, FLAG_REGS, EVEN_REGS, GPR_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, A0H_REG,
  A0L_REG, A0_REG, A1H_REG, ACCUM_HIGH_REGS,
  A1L_REG, ACCUM_LOW_REGS, A1_REG, ACCUM_REGS,
  X_REG, X_OR_ACCUM_LOW_REGS, X_OR_ACCUM_REGS, YH_REG,
  YH_OR_ACCUM_HIGH_REGS, X_OR_YH_REGS, YL_REG, YL_OR_ACCUM_LOW_REGS,
  X_OR_YL_REGS, X_OR_Y_REGS, Y_REG, ACCUM_OR_Y_REGS,
  PH_REG, X_OR_PH_REGS, PL_REG, PL_OR_ACCUM_LOW_REGS,
  X_OR_PL_REGS, YL_OR_PL_OR_ACCUM_LOW_REGS, P_REG, ACCUM_OR_P_REGS,
  YL_OR_P_REGS, ACCUM_LOW_OR_YL_OR_P_REGS, Y_OR_P_REGS, ACCUM_Y_OR_P_REGS,
  NO_FRAME_Y_ADDR_REGS, Y_ADDR_REGS, ACCUM_LOW_OR_Y_ADDR_REGS, ACCUM_OR_Y_ADDR_REGS,
  X_OR_Y_ADDR_REGS, Y_OR_Y_ADDR_REGS, P_OR_Y_ADDR_REGS, NON_HIGH_YBASE_ELIGIBLE_REGS,
  YBASE_ELIGIBLE_REGS, J_REG, J_OR_DAU_16_BIT_REGS, BMU_REGS,
  NOHIGH_NON_ADDR_REGS, NON_ADDR_REGS, SLOW_MEM_LOAD_REGS, NOHIGH_NON_YBASE_REGS,
  NO_ACCUM_NON_YBASE_REGS, NON_YBASE_REGS, YBASE_VIRT_REGS, ACCUM_LOW_OR_YBASE_REGS,
  ACCUM_OR_YBASE_REGS, X_OR_YBASE_REGS, Y_OR_YBASE_REGS, ACCUM_LOW_YL_PL_OR_YBASE_REGS,
  P_OR_YBASE_REGS, ACCUM_Y_P_OR_YBASE_REGS, Y_ADDR_OR_YBASE_REGS, YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS,
  YBASE_OR_YBASE_ELIGIBLE_REGS, NO_HIGH_ALL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, MULTIPLY_32_REG, MULTIPLY_64_REG, LOW_REGS,
  HIGH_REGS, REAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, MAC_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, ADDR_REGS, DATA_REGS,
  FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  AREG, DREG, CREG, BREG,
  SIREG, DIREG, AD_REGS, Q_REGS,
  NON_Q_REGS, INDEX_REGS, LEGACY_REGS, GENERAL_REGS,
  FP_TOP_REG, FP_SECOND_REG, FLOAT_REGS, SSE_REGS,
  MMX_REGS, FP_TOP_SSE_REGS, FP_SECOND_SSE_REGS, FLOAT_SSE_REGS,
  FLOAT_INT_REGS, INT_SSE_REGS, FLOAT_INT_SSE_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, FP_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GLOBAL_REGS,
  LOCAL_REGS, LOCAL_OR_GLOBAL_REGS, FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, PR_REGS, BR_REGS,
  AR_M_REGS, AR_I_REGS, ADDL_REGS, GR_REGS,
  FR_REGS, GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, CARRY_REG, ACCUM_REGS,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  D_REGS, X_REGS, Y_REGS, SP_REGS,
  DA_REGS, DB_REGS, Z_REGS, D8_REGS,
  Q_REGS, D_OR_X_REGS, D_OR_Y_REGS, D_OR_SP_REGS,
  X_OR_Y_REGS, A_REGS, X_OR_SP_REGS, Y_OR_SP_REGS,
  X_OR_Y_OR_D_REGS, A_OR_D_REGS, A_OR_SP_REGS, H_REGS,
  S_REGS, D_OR_S_REGS, X_OR_S_REGS, Y_OR_S_REGS,
  SP_OR_S_REGS, D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS,
  A_OR_S_REGS, D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS,
  G_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  DATA_REGS, ADDR_REGS, FP_REGS, GENERAL_REGS,
  DATA_OR_FP_REGS, ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS,
  AGRF_REGS, XGRF_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, ONLYR1_REGS, LRW_REGS, GENERAL_REGS,
  C_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, REMAINDER_REG, HIMULT_REG, SYSTEM_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,
  ADDRESS_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS,
  DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS, EXTENDED_REGS, DATA_OR_EXTENDED_REGS,
  ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,
  FLOAT_REG0, LONG_FLOAT_REG0, FLOAT_REGS, FP_REGS,
  GEN_AND_FP_REGS, FRAME_POINTER_REG, STACK_POINTER_REG, GEN_AND_MEM_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,
  GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,
  SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R1_REGS, GENERAL_REGS, FPUPPER_REGS, FP_REGS,
  GENERAL_OR_FP_REGS, SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS,
  NO_LOAD_FPU_REGS, FPU_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, OUT_REGS, STD_REGS, ARG_REGS,
  SRC_REGS, DST_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R0_REGS, R15_REGS, BASE_REGS,
  GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, BASE_REGS, GENERAL_REGS, FLOAT_REGS,
  ALTIVEC_REGS, VRSAVE_REGS, NON_SPECIAL_REGS, MQ_REGS,
  LINK_REGS, CTR_REGS, LINK_OR_CTR_REGS, SPECIAL_REGS,
  SPEC_OR_GEN_REGS, CR0_REGS, CR_REGS, NON_FLOAT_REGS,
  XER_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ADDR_REGS, GENERAL_REGS, FP_REGS, ADDR_FP_REGS,
  GENERAL_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REGS, PR_REGS, T_REGS, MAC_REGS,
  FPUL_REGS, SIBCALL_REGS, GENERAL_REGS, FP0_REGS,
  FP_REGS, DF_REGS, FPSCR_REGS, GENERAL_FP_REGS,
  TARGET_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  M16_NA_REGS, M16_REGS, T_REG, M16_T_REGS,
  GR_REGS, FP_REGS, HI_REG, LO_REG,
  HILO_REG, MD_REGS, COP0_REGS, COP2_REGS,
  COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS,
  HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,
  ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, FPCC_REGS, I64_REGS,
  GENERAL_REGS, FP_REGS, EXTRA_FP_REGS, GENERAL_OR_FP_REGS,
  GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REGS, R1_REGS, TWO_REGS, R2_REGS,
  EIGHT_REGS, R8_REGS, ICALL_REGS, GENERAL_REGS,
  CARRY_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, BR_REGS,
  FP_REGS, ACC_REG, SP_REG, RL_REGS,
  GR_REGS, AR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, M16_NA_REGS, M16_REGS, T_REG,
  M16_T_REGS, GR_REGS, FP_REGS, HI_REG,
  LO_REG, HILO_REG, MD_REGS, COP0_REGS,
  COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,
  HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS,
  COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,
  M16_REGS, T_REG, M16_T_REGS, GR_REGS,
  FP_REGS, HI_REG, LO_REG, HILO_REG,
  MD_REGS, COP0_REGS, COP2_REGS, COP3_REGS,
  HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS,
  COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS,
  ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R0_REG, R24_REG, R25_REG,
  R27_REG, GENERAL_REGS, FLOAT_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, FPA_REGS,
  CIRRUS_REGS, VFP_REGS, IWMMXT_GR_REGS, IWMMXT_REGS,
  LO_REGS, STACK_REG, BASE_REGS, HI_REGS,
  CC_REG, VFPCC_REG, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REG, POINTER_X_REGS,
  POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG, BASE_POINTER_REGS,
  POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS, LD_REGS,
  NO_LD_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, IREGS, BREGS, LREGS,
  MREGS, CIRCREGS, DAGREGS, EVEN_AREGS,
  ODD_AREGS, AREGS, CCREGS, EVEN_DREGS,
  ODD_DREGS, DREGS, PREGS_CLOBBERED, PREGS,
  DPREGS, MOST_REGS, PROLOGUE_REGS, NON_A_CC_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0R1_REGS,
  R2R3_REGS, EXT_LOW_REGS, EXT_REGS, ADDR_REGS,
  INDEX_REGS, BK_REG, SP_REG, RC_REG,
  COUNTER_REGS, INT_REGS, GENERAL_REGS, DP_REG,
  ST_REG, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG,
  MULTIPLY_64_REG, LOW_REGS, HIGH_REGS, REAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, ICC_REGS,
  FCC_REGS, CC_REGS, ICR_REGS, FCR_REGS,
  CR_REGS, LCR_REG, LR_REG, GR8_REGS,
  GR9_REGS, GR89_REGS, FDPIC_REGS, FDPIC_FPTR_REGS,
  FDPIC_CALL_REGS, SPR_REGS, QUAD_ACC_REGS, EVEN_ACC_REGS,
  ACC_REGS, ACCG_REGS, QUAD_FPR_REGS, FEVEN_REGS,
  FPR_REGS, QUAD_REGS, EVEN_REGS, GPR_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, COUNTER_REGS,
  SOURCE_REGS, DESTINATION_REGS, GENERAL_REGS, MAC_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, AREG,
  DREG, CREG, BREG, SIREG,
  DIREG, AD_REGS, Q_REGS, NON_Q_REGS,
  INDEX_REGS, LEGACY_REGS, GENERAL_REGS, FP_TOP_REG,
  FP_SECOND_REG, FLOAT_REGS, SSE_REGS, MMX_REGS,
  FP_TOP_SSE_REGS, FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS,
  INT_SSE_REGS, FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, PR_REGS, BR_REGS,
  AR_M_REGS, AR_I_REGS, ADDL_REGS, GR_REGS,
  FR_REGS, GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, DPH_REGS, DPL_REGS,
  DP_REGS, SP_REGS, IPH_REGS, IPL_REGS,
  IP_REGS, DP_SP_REGS, PTR_REGS, NONPTR_REGS,
  NONSP_REGS, GENERAL_REGS, ALL_REGS = GENERAL_REGS, LIM_REG_CLASSES,
  NO_REGS, GR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, CARRY_REG, ACCUM_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, D_REGS,
  X_REGS, Y_REGS, SP_REGS, DA_REGS,
  DB_REGS, Z_REGS, D8_REGS, Q_REGS,
  D_OR_X_REGS, D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS,
  A_REGS, X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS,
  A_OR_D_REGS, A_OR_SP_REGS, H_REGS, S_REGS,
  D_OR_S_REGS, X_OR_S_REGS, Y_OR_S_REGS, Z_OR_S_REGS,
  SP_OR_S_REGS, D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS,
  A_OR_S_REGS, D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS,
  G_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  DATA_REGS, ADDR_REGS, FP_REGS, GENERAL_REGS,
  DATA_OR_FP_REGS, ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, ONLYR1_REGS, LRW_REGS, GENERAL_REGS,
  C_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  M16_NA_REGS, M16_REGS, T_REG, M16_T_REGS,
  PIC_FN_ADDR_REG, LEA_REGS, GR_REGS, FP_REGS,
  HI_REG, LO_REG, MD_REGS, COP0_REGS,
  COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,
  HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,
  ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, REMAINDER_REG,
  HIMULT_REG, SYSTEM_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS,
  DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS, EXTENDED_REGS, DATA_OR_EXTENDED_REGS,
  ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS, FP_REGS,
  FP_ACC_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, FLOAT_REG0, LONG_FLOAT_REG0,
  FLOAT_REGS, LONG_REGS, FP_REGS, GEN_AND_FP_REGS,
  FRAME_POINTER_REG, STACK_POINTER_REG, GEN_AND_MEM_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,
  FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,
  GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,
  SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS,
  FPU_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  BASE_REGS, GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS,
  VRSAVE_REGS, VSCR_REGS, SPE_ACC_REGS, SPEFSCR_REGS,
  NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,
  LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,
  CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, CC_REGS, ADDR_REGS,
  GENERAL_REGS, ACCESS_REGS, ADDR_CC_REGS, GENERAL_CC_REGS,
  FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REGS, PR_REGS,
  T_REGS, MAC_REGS, FPUL_REGS, SIBCALL_REGS,
  GENERAL_REGS, FP0_REGS, FP_REGS, DF_HI_REGS,
  DF_REGS, FPSCR_REGS, GENERAL_FP_REGS, TARGET_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, FPCC_REGS,
  I64_REGS, GENERAL_REGS, FP_REGS, EXTRA_FP_REGS,
  GENERAL_OR_FP_REGS, GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R0_REGS, R1_REGS, TWO_REGS,
  R2_REGS, EIGHT_REGS, R8_REGS, ICALL_REGS,
  GENERAL_REGS, CARRY_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  BR_REGS, FP_REGS, ACC_REG, SP_REG,
  RL_REGS, GR_REGS, AR_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REG, R24_REG,
  R25_REG, R27_REG, GENERAL_REGS, FLOAT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  FPA_REGS, CIRRUS_REGS, VFP_REGS, IWMMXT_GR_REGS,
  IWMMXT_REGS, LO_REGS, STACK_REG, BASE_REGS,
  HI_REGS, CC_REG, VFPCC_REG, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0_REG,
  POINTER_X_REGS, POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG,
  BASE_POINTER_REGS, POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS,
  LD_REGS, NO_LD_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, IREGS, BREGS,
  LREGS, MREGS, CIRCREGS, DAGREGS,
  EVEN_AREGS, ODD_AREGS, AREGS, CCREGS,
  EVEN_DREGS, ODD_DREGS, DREGS, FDPIC_REGS,
  FDPIC_FPTR_REGS, PREGS_CLOBBERED, PREGS, IPREGS,
  DPREGS, MOST_REGS, LT_REGS, LC_REGS,
  LB_REGS, PROLOGUE_REGS, NON_A_CC_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0R1_REGS, R2R3_REGS,
  EXT_LOW_REGS, EXT_REGS, ADDR_REGS, INDEX_REGS,
  BK_REG, SP_REG, RC_REG, COUNTER_REGS,
  INT_REGS, GENERAL_REGS, DP_REG, ST_REG,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, MOF_REGS,
  CC0_REGS, SPECIAL_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, LO_REGS, HI_REGS,
  HILO_REGS, NOSP_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG, MULTIPLY_64_REG,
  LOW_REGS, HIGH_REGS, REAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, ICC_REGS, FCC_REGS,
  CC_REGS, ICR_REGS, FCR_REGS, CR_REGS,
  LCR_REG, LR_REG, GR8_REGS, GR9_REGS,
  GR89_REGS, FDPIC_REGS, FDPIC_FPTR_REGS, FDPIC_CALL_REGS,
  SPR_REGS, QUAD_ACC_REGS, EVEN_ACC_REGS, ACC_REGS,
  ACCG_REGS, QUAD_FPR_REGS, FEVEN_REGS, FPR_REGS,
  QUAD_REGS, EVEN_REGS, GPR_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, COUNTER_REGS, SOURCE_REGS,
  DESTINATION_REGS, GENERAL_REGS, MAC_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, AREG, DREG,
  CREG, BREG, SIREG, DIREG,
  AD_REGS, Q_REGS, NON_Q_REGS, INDEX_REGS,
  LEGACY_REGS, GENERAL_REGS, FP_TOP_REG, FP_SECOND_REG,
  FLOAT_REGS, SSE_REGS, MMX_REGS, FP_TOP_SSE_REGS,
  FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS, INT_SSE_REGS,
  FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  PR_REGS, BR_REGS, AR_M_REGS, AR_I_REGS,
  ADDL_REGS, GR_REGS, FP_REGS, FR_REGS,
  GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, SP_REGS, FB_REGS, SB_REGS,
  CR_REGS, R0_REGS, R1_REGS, R2_REGS,
  R3_REGS, R02_REGS, HL_REGS, QI_REGS,
  R23_REGS, R03_REGS, DI_REGS, A0_REGS,
  A1_REGS, A_REGS, AD_REGS, PS_REGS,
  SI_REGS, HI_REGS, RA_REGS, GENERAL_REGS,
  FLG_REGS, HC_REGS, MEM_REGS, R02_A_MEM_REGS,
  A_HL_MEM_REGS, R1_R3_A_MEM_REGS, R03_MEM_REGS, A_HI_MEM_REGS,
  A_AD_CR_MEM_SI_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  CARRY_REG, ACCUM_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, D_REGS, X_REGS,
  Y_REGS, SP_REGS, DA_REGS, DB_REGS,
  Z_REGS, D8_REGS, Q_REGS, D_OR_X_REGS,
  D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS, A_REGS,
  X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS, A_OR_D_REGS,
  A_OR_SP_REGS, H_REGS, S_REGS, D_OR_S_REGS,
  X_OR_S_REGS, Y_OR_S_REGS, Z_OR_S_REGS, SP_OR_S_REGS,
  D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS, A_OR_S_REGS,
  D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS, G_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,
  ADDR_REGS, FP_REGS, GENERAL_REGS, DATA_OR_FP_REGS,
  ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ONLYR1_REGS, LRW_REGS, GENERAL_REGS, C_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,
  M16_REGS, T_REG, M16_T_REGS, PIC_FN_ADDR_REG,
  V1_REG, LEA_REGS, GR_REGS, FP_REGS,
  HI_REG, LO_REG, MD_REGS, COP0_REGS,
  COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,
  HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,
  ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, DSP_ACC_REGS,
  ACC_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, REMAINDER_REG, HIMULT_REG, SYSTEM_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,
  ADDRESS_REGS, SP_REGS, DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,
  EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS,
  SP_OR_ADDRESS_OR_EXTENDED_REGS, FP_REGS, FP_ACC_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,
  FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,
  GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,
  SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS,
  FPU_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  BASE_REGS, GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS,
  VRSAVE_REGS, VSCR_REGS, SPE_ACC_REGS, SPEFSCR_REGS,
  NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,
  LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,
  CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, CC_REGS, ADDR_REGS,
  GENERAL_REGS, ACCESS_REGS, ADDR_CC_REGS, GENERAL_CC_REGS,
  FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, G16_REGS, G32_REGS,
  T32_REGS, HI_REG, LO_REG, CE_REGS,
  CN_REG, LC_REG, SC_REG, SP_REGS,
  CR_REGS, CP1_REGS, CP2_REGS, CP3_REGS,
  CPA_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REGS, PR_REGS, T_REGS, MAC_REGS,
  FPUL_REGS, SIBCALL_REGS, GENERAL_REGS, FP0_REGS,
  FP_REGS, DF_HI_REGS, DF_REGS, FPSCR_REGS,
  GENERAL_FP_REGS, GENERAL_DF_REGS, TARGET_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, FPCC_REGS, I64_REGS,
  GENERAL_REGS, FP_REGS, EXTRA_FP_REGS, GENERAL_OR_FP_REGS,
  GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REGS, R1_REGS, TWO_REGS, R2_REGS,
  EIGHT_REGS, R8_REGS, ICALL_REGS, GENERAL_REGS,
  CARRY_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, BR_REGS,
  FP_REGS, ACC_REG, SP_REG, RL_REGS,
  GR_REGS, AR_REGS, ALL_REGS, LIM_REG_CLASSES
}
enum  ix86_builtins {
  IX86_BUILTIN_ADDPS, IX86_BUILTIN_ADDSS, IX86_BUILTIN_DIVPS, IX86_BUILTIN_DIVSS,
  IX86_BUILTIN_MULPS, IX86_BUILTIN_MULSS, IX86_BUILTIN_SUBPS, IX86_BUILTIN_SUBSS,
  IX86_BUILTIN_CMPEQPS, IX86_BUILTIN_CMPLTPS, IX86_BUILTIN_CMPLEPS, IX86_BUILTIN_CMPGTPS,
  IX86_BUILTIN_CMPGEPS, IX86_BUILTIN_CMPNEQPS, IX86_BUILTIN_CMPNLTPS, IX86_BUILTIN_CMPNLEPS,
  IX86_BUILTIN_CMPNGTPS, IX86_BUILTIN_CMPNGEPS, IX86_BUILTIN_CMPORDPS, IX86_BUILTIN_CMPUNORDPS,
  IX86_BUILTIN_CMPNEPS, IX86_BUILTIN_CMPEQSS, IX86_BUILTIN_CMPLTSS, IX86_BUILTIN_CMPLESS,
  IX86_BUILTIN_CMPNEQSS, IX86_BUILTIN_CMPNLTSS, IX86_BUILTIN_CMPNLESS, IX86_BUILTIN_CMPORDSS,
  IX86_BUILTIN_CMPUNORDSS, IX86_BUILTIN_CMPNESS, IX86_BUILTIN_COMIEQSS, IX86_BUILTIN_COMILTSS,
  IX86_BUILTIN_COMILESS, IX86_BUILTIN_COMIGTSS, IX86_BUILTIN_COMIGESS, IX86_BUILTIN_COMINEQSS,
  IX86_BUILTIN_UCOMIEQSS, IX86_BUILTIN_UCOMILTSS, IX86_BUILTIN_UCOMILESS, IX86_BUILTIN_UCOMIGTSS,
  IX86_BUILTIN_UCOMIGESS, IX86_BUILTIN_UCOMINEQSS, IX86_BUILTIN_CVTPI2PS, IX86_BUILTIN_CVTPS2PI,
  IX86_BUILTIN_CVTSI2SS, IX86_BUILTIN_CVTSI642SS, IX86_BUILTIN_CVTSS2SI, IX86_BUILTIN_CVTSS2SI64,
  IX86_BUILTIN_CVTTPS2PI, IX86_BUILTIN_CVTTSS2SI, IX86_BUILTIN_CVTTSS2SI64, IX86_BUILTIN_MAXPS,
  IX86_BUILTIN_MAXSS, IX86_BUILTIN_MINPS, IX86_BUILTIN_MINSS, IX86_BUILTIN_LOADAPS,
  IX86_BUILTIN_LOADUPS, IX86_BUILTIN_STOREAPS, IX86_BUILTIN_STOREUPS, IX86_BUILTIN_LOADSS,
  IX86_BUILTIN_STORESS, IX86_BUILTIN_MOVSS, IX86_BUILTIN_MOVHLPS, IX86_BUILTIN_MOVLHPS,
  IX86_BUILTIN_LOADHPS, IX86_BUILTIN_LOADLPS, IX86_BUILTIN_STOREHPS, IX86_BUILTIN_STORELPS,
  IX86_BUILTIN_MASKMOVQ, IX86_BUILTIN_MOVMSKPS, IX86_BUILTIN_PMOVMSKB, IX86_BUILTIN_MOVNTPS,
  IX86_BUILTIN_MOVNTQ, IX86_BUILTIN_LOADDQA, IX86_BUILTIN_LOADDQU, IX86_BUILTIN_STOREDQA,
  IX86_BUILTIN_STOREDQU, IX86_BUILTIN_MOVQ, IX86_BUILTIN_LOADD, IX86_BUILTIN_STORED,
  IX86_BUILTIN_CLRTI, IX86_BUILTIN_PACKSSWB, IX86_BUILTIN_PACKSSDW, IX86_BUILTIN_PACKUSWB,
  IX86_BUILTIN_PADDB, IX86_BUILTIN_PADDW, IX86_BUILTIN_PADDD, IX86_BUILTIN_PADDQ,
  IX86_BUILTIN_PADDSB, IX86_BUILTIN_PADDSW, IX86_BUILTIN_PADDUSB, IX86_BUILTIN_PADDUSW,
  IX86_BUILTIN_PSUBB, IX86_BUILTIN_PSUBW, IX86_BUILTIN_PSUBD, IX86_BUILTIN_PSUBQ,
  IX86_BUILTIN_PSUBSB, IX86_BUILTIN_PSUBSW, IX86_BUILTIN_PSUBUSB, IX86_BUILTIN_PSUBUSW,
  IX86_BUILTIN_PAND, IX86_BUILTIN_PANDN, IX86_BUILTIN_POR, IX86_BUILTIN_PXOR,
  IX86_BUILTIN_PAVGB, IX86_BUILTIN_PAVGW, IX86_BUILTIN_PCMPEQB, IX86_BUILTIN_PCMPEQW,
  IX86_BUILTIN_PCMPEQD, IX86_BUILTIN_PCMPGTB, IX86_BUILTIN_PCMPGTW, IX86_BUILTIN_PCMPGTD,
  IX86_BUILTIN_PEXTRW, IX86_BUILTIN_PINSRW, IX86_BUILTIN_PMADDWD, IX86_BUILTIN_PMAXSW,
  IX86_BUILTIN_PMAXUB, IX86_BUILTIN_PMINSW, IX86_BUILTIN_PMINUB, IX86_BUILTIN_PMULHUW,
  IX86_BUILTIN_PMULHW, IX86_BUILTIN_PMULLW, IX86_BUILTIN_PSADBW, IX86_BUILTIN_PSHUFW,
  IX86_BUILTIN_PSLLW, IX86_BUILTIN_PSLLD, IX86_BUILTIN_PSLLQ, IX86_BUILTIN_PSRAW,
  IX86_BUILTIN_PSRAD, IX86_BUILTIN_PSRLW, IX86_BUILTIN_PSRLD, IX86_BUILTIN_PSRLQ,
  IX86_BUILTIN_PSLLWI, IX86_BUILTIN_PSLLDI, IX86_BUILTIN_PSLLQI, IX86_BUILTIN_PSRAWI,
  IX86_BUILTIN_PSRADI, IX86_BUILTIN_PSRLWI, IX86_BUILTIN_PSRLDI, IX86_BUILTIN_PSRLQI,
  IX86_BUILTIN_PUNPCKHBW, IX86_BUILTIN_PUNPCKHWD, IX86_BUILTIN_PUNPCKHDQ, IX86_BUILTIN_PUNPCKLBW,
  IX86_BUILTIN_PUNPCKLWD, IX86_BUILTIN_PUNPCKLDQ, IX86_BUILTIN_SHUFPS, IX86_BUILTIN_RCPPS,
  IX86_BUILTIN_RCPSS, IX86_BUILTIN_RSQRTPS, IX86_BUILTIN_RSQRTSS, IX86_BUILTIN_SQRTPS,
  IX86_BUILTIN_SQRTSS, IX86_BUILTIN_UNPCKHPS, IX86_BUILTIN_UNPCKLPS, IX86_BUILTIN_ANDPS,
  IX86_BUILTIN_ANDNPS, IX86_BUILTIN_ORPS, IX86_BUILTIN_XORPS, IX86_BUILTIN_EMMS,
  IX86_BUILTIN_LDMXCSR, IX86_BUILTIN_STMXCSR, IX86_BUILTIN_SFENCE, IX86_BUILTIN_FEMMS,
  IX86_BUILTIN_PAVGUSB, IX86_BUILTIN_PF2ID, IX86_BUILTIN_PFACC, IX86_BUILTIN_PFADD,
  IX86_BUILTIN_PFCMPEQ, IX86_BUILTIN_PFCMPGE, IX86_BUILTIN_PFCMPGT, IX86_BUILTIN_PFMAX,
  IX86_BUILTIN_PFMIN, IX86_BUILTIN_PFMUL, IX86_BUILTIN_PFRCP, IX86_BUILTIN_PFRCPIT1,
  IX86_BUILTIN_PFRCPIT2, IX86_BUILTIN_PFRSQIT1, IX86_BUILTIN_PFRSQRT, IX86_BUILTIN_PFSUB,
  IX86_BUILTIN_PFSUBR, IX86_BUILTIN_PI2FD, IX86_BUILTIN_PMULHRW, IX86_BUILTIN_PF2IW,
  IX86_BUILTIN_PFNACC, IX86_BUILTIN_PFPNACC, IX86_BUILTIN_PI2FW, IX86_BUILTIN_PSWAPDSI,
  IX86_BUILTIN_PSWAPDSF, IX86_BUILTIN_SSE_ZERO, IX86_BUILTIN_MMX_ZERO, IX86_BUILTIN_ADDPD,
  IX86_BUILTIN_ADDSD, IX86_BUILTIN_DIVPD, IX86_BUILTIN_DIVSD, IX86_BUILTIN_MULPD,
  IX86_BUILTIN_MULSD, IX86_BUILTIN_SUBPD, IX86_BUILTIN_SUBSD, IX86_BUILTIN_CMPEQPD,
  IX86_BUILTIN_CMPLTPD, IX86_BUILTIN_CMPLEPD, IX86_BUILTIN_CMPGTPD, IX86_BUILTIN_CMPGEPD,
  IX86_BUILTIN_CMPNEQPD, IX86_BUILTIN_CMPNLTPD, IX86_BUILTIN_CMPNLEPD, IX86_BUILTIN_CMPNGTPD,
  IX86_BUILTIN_CMPNGEPD, IX86_BUILTIN_CMPORDPD, IX86_BUILTIN_CMPUNORDPD, IX86_BUILTIN_CMPNEPD,
  IX86_BUILTIN_CMPEQSD, IX86_BUILTIN_CMPLTSD, IX86_BUILTIN_CMPLESD, IX86_BUILTIN_CMPNEQSD,
  IX86_BUILTIN_CMPNLTSD, IX86_BUILTIN_CMPNLESD, IX86_BUILTIN_CMPORDSD, IX86_BUILTIN_CMPUNORDSD,
  IX86_BUILTIN_CMPNESD, IX86_BUILTIN_COMIEQSD, IX86_BUILTIN_COMILTSD, IX86_BUILTIN_COMILESD,
  IX86_BUILTIN_COMIGTSD, IX86_BUILTIN_COMIGESD, IX86_BUILTIN_COMINEQSD, IX86_BUILTIN_UCOMIEQSD,
  IX86_BUILTIN_UCOMILTSD, IX86_BUILTIN_UCOMILESD, IX86_BUILTIN_UCOMIGTSD, IX86_BUILTIN_UCOMIGESD,
  IX86_BUILTIN_UCOMINEQSD, IX86_BUILTIN_MAXPD, IX86_BUILTIN_MAXSD, IX86_BUILTIN_MINPD,
  IX86_BUILTIN_MINSD, IX86_BUILTIN_ANDPD, IX86_BUILTIN_ANDNPD, IX86_BUILTIN_ORPD,
  IX86_BUILTIN_XORPD, IX86_BUILTIN_SQRTPD, IX86_BUILTIN_SQRTSD, IX86_BUILTIN_UNPCKHPD,
  IX86_BUILTIN_UNPCKLPD, IX86_BUILTIN_SHUFPD, IX86_BUILTIN_LOADAPD, IX86_BUILTIN_LOADUPD,
  IX86_BUILTIN_STOREAPD, IX86_BUILTIN_STOREUPD, IX86_BUILTIN_LOADSD, IX86_BUILTIN_STORESD,
  IX86_BUILTIN_MOVSD, IX86_BUILTIN_LOADHPD, IX86_BUILTIN_LOADLPD, IX86_BUILTIN_STOREHPD,
  IX86_BUILTIN_STORELPD, IX86_BUILTIN_CVTDQ2PD, IX86_BUILTIN_CVTDQ2PS, IX86_BUILTIN_CVTPD2DQ,
  IX86_BUILTIN_CVTPD2PI, IX86_BUILTIN_CVTPD2PS, IX86_BUILTIN_CVTTPD2DQ, IX86_BUILTIN_CVTTPD2PI,
  IX86_BUILTIN_CVTPI2PD, IX86_BUILTIN_CVTSI2SD, IX86_BUILTIN_CVTSI642SD, IX86_BUILTIN_CVTSD2SI,
  IX86_BUILTIN_CVTSD2SI64, IX86_BUILTIN_CVTSD2SS, IX86_BUILTIN_CVTSS2SD, IX86_BUILTIN_CVTTSD2SI,
  IX86_BUILTIN_CVTTSD2SI64, IX86_BUILTIN_CVTPS2DQ, IX86_BUILTIN_CVTPS2PD, IX86_BUILTIN_CVTTPS2DQ,
  IX86_BUILTIN_MOVNTI, IX86_BUILTIN_MOVNTPD, IX86_BUILTIN_MOVNTDQ, IX86_BUILTIN_SETPD1,
  IX86_BUILTIN_SETPD, IX86_BUILTIN_CLRPD, IX86_BUILTIN_SETRPD, IX86_BUILTIN_LOADPD1,
  IX86_BUILTIN_LOADRPD, IX86_BUILTIN_STOREPD1, IX86_BUILTIN_STORERPD, IX86_BUILTIN_MASKMOVDQU,
  IX86_BUILTIN_MOVMSKPD, IX86_BUILTIN_PMOVMSKB128, IX86_BUILTIN_MOVQ2DQ, IX86_BUILTIN_MOVDQ2Q,
  IX86_BUILTIN_PACKSSWB128, IX86_BUILTIN_PACKSSDW128, IX86_BUILTIN_PACKUSWB128, IX86_BUILTIN_PADDB128,
  IX86_BUILTIN_PADDW128, IX86_BUILTIN_PADDD128, IX86_BUILTIN_PADDQ128, IX86_BUILTIN_PADDSB128,
  IX86_BUILTIN_PADDSW128, IX86_BUILTIN_PADDUSB128, IX86_BUILTIN_PADDUSW128, IX86_BUILTIN_PSUBB128,
  IX86_BUILTIN_PSUBW128, IX86_BUILTIN_PSUBD128, IX86_BUILTIN_PSUBQ128, IX86_BUILTIN_PSUBSB128,
  IX86_BUILTIN_PSUBSW128, IX86_BUILTIN_PSUBUSB128, IX86_BUILTIN_PSUBUSW128, IX86_BUILTIN_PAND128,
  IX86_BUILTIN_PANDN128, IX86_BUILTIN_POR128, IX86_BUILTIN_PXOR128, IX86_BUILTIN_PAVGB128,
  IX86_BUILTIN_PAVGW128, IX86_BUILTIN_PCMPEQB128, IX86_BUILTIN_PCMPEQW128, IX86_BUILTIN_PCMPEQD128,
  IX86_BUILTIN_PCMPGTB128, IX86_BUILTIN_PCMPGTW128, IX86_BUILTIN_PCMPGTD128, IX86_BUILTIN_PEXTRW128,
  IX86_BUILTIN_PINSRW128, IX86_BUILTIN_PMADDWD128, IX86_BUILTIN_PMAXSW128, IX86_BUILTIN_PMAXUB128,
  IX86_BUILTIN_PMINSW128, IX86_BUILTIN_PMINUB128, IX86_BUILTIN_PMULUDQ, IX86_BUILTIN_PMULUDQ128,
  IX86_BUILTIN_PMULHUW128, IX86_BUILTIN_PMULHW128, IX86_BUILTIN_PMULLW128, IX86_BUILTIN_PSADBW128,
  IX86_BUILTIN_PSHUFHW, IX86_BUILTIN_PSHUFLW, IX86_BUILTIN_PSHUFD, IX86_BUILTIN_PSLLW128,
  IX86_BUILTIN_PSLLD128, IX86_BUILTIN_PSLLQ128, IX86_BUILTIN_PSRAW128, IX86_BUILTIN_PSRAD128,
  IX86_BUILTIN_PSRLW128, IX86_BUILTIN_PSRLD128, IX86_BUILTIN_PSRLQ128, IX86_BUILTIN_PSLLDQI128,
  IX86_BUILTIN_PSLLWI128, IX86_BUILTIN_PSLLDI128, IX86_BUILTIN_PSLLQI128, IX86_BUILTIN_PSRAWI128,
  IX86_BUILTIN_PSRADI128, IX86_BUILTIN_PSRLDQI128, IX86_BUILTIN_PSRLWI128, IX86_BUILTIN_PSRLDI128,
  IX86_BUILTIN_PSRLQI128, IX86_BUILTIN_PUNPCKHBW128, IX86_BUILTIN_PUNPCKHWD128, IX86_BUILTIN_PUNPCKHDQ128,
  IX86_BUILTIN_PUNPCKHQDQ128, IX86_BUILTIN_PUNPCKLBW128, IX86_BUILTIN_PUNPCKLWD128, IX86_BUILTIN_PUNPCKLDQ128,
  IX86_BUILTIN_PUNPCKLQDQ128, IX86_BUILTIN_CLFLUSH, IX86_BUILTIN_MFENCE, IX86_BUILTIN_LFENCE,
  IX86_BUILTIN_ADDSUBPS, IX86_BUILTIN_HADDPS, IX86_BUILTIN_HSUBPS, IX86_BUILTIN_MOVSHDUP,
  IX86_BUILTIN_MOVSLDUP, IX86_BUILTIN_ADDSUBPD, IX86_BUILTIN_HADDPD, IX86_BUILTIN_HSUBPD,
  IX86_BUILTIN_LOADDDUP, IX86_BUILTIN_MOVDDUP, IX86_BUILTIN_LDDQU, IX86_BUILTIN_MONITOR,
  IX86_BUILTIN_MWAIT, IX86_BUILTIN_MAX, IX86_BUILTIN_ADDPS, IX86_BUILTIN_ADDSS,
  IX86_BUILTIN_DIVPS, IX86_BUILTIN_DIVSS, IX86_BUILTIN_MULPS, IX86_BUILTIN_MULSS,
  IX86_BUILTIN_SUBPS, IX86_BUILTIN_SUBSS, IX86_BUILTIN_CMPEQPS, IX86_BUILTIN_CMPLTPS,
  IX86_BUILTIN_CMPLEPS, IX86_BUILTIN_CMPGTPS, IX86_BUILTIN_CMPGEPS, IX86_BUILTIN_CMPNEQPS,
  IX86_BUILTIN_CMPNLTPS, IX86_BUILTIN_CMPNLEPS, IX86_BUILTIN_CMPNGTPS, IX86_BUILTIN_CMPNGEPS,
  IX86_BUILTIN_CMPORDPS, IX86_BUILTIN_CMPUNORDPS, IX86_BUILTIN_CMPNEPS, IX86_BUILTIN_CMPEQSS,
  IX86_BUILTIN_CMPLTSS, IX86_BUILTIN_CMPLESS, IX86_BUILTIN_CMPNEQSS, IX86_BUILTIN_CMPNLTSS,
  IX86_BUILTIN_CMPNLESS, IX86_BUILTIN_CMPORDSS, IX86_BUILTIN_CMPUNORDSS, IX86_BUILTIN_CMPNESS,
  IX86_BUILTIN_COMIEQSS, IX86_BUILTIN_COMILTSS, IX86_BUILTIN_COMILESS, IX86_BUILTIN_COMIGTSS,
  IX86_BUILTIN_COMIGESS, IX86_BUILTIN_COMINEQSS, IX86_BUILTIN_UCOMIEQSS, IX86_BUILTIN_UCOMILTSS,
  IX86_BUILTIN_UCOMILESS, IX86_BUILTIN_UCOMIGTSS, IX86_BUILTIN_UCOMIGESS, IX86_BUILTIN_UCOMINEQSS,
  IX86_BUILTIN_CVTPI2PS, IX86_BUILTIN_CVTPS2PI, IX86_BUILTIN_CVTSI2SS, IX86_BUILTIN_CVTSI642SS,
  IX86_BUILTIN_CVTSS2SI, IX86_BUILTIN_CVTSS2SI64, IX86_BUILTIN_CVTTPS2PI, IX86_BUILTIN_CVTTSS2SI,
  IX86_BUILTIN_CVTTSS2SI64, IX86_BUILTIN_MAXPS, IX86_BUILTIN_MAXSS, IX86_BUILTIN_MINPS,
  IX86_BUILTIN_MINSS, IX86_BUILTIN_LOADAPS, IX86_BUILTIN_LOADUPS, IX86_BUILTIN_STOREAPS,
  IX86_BUILTIN_STOREUPS, IX86_BUILTIN_LOADSS, IX86_BUILTIN_STORESS, IX86_BUILTIN_MOVSS,
  IX86_BUILTIN_MOVHLPS, IX86_BUILTIN_MOVLHPS, IX86_BUILTIN_LOADHPS, IX86_BUILTIN_LOADLPS,
  IX86_BUILTIN_STOREHPS, IX86_BUILTIN_STORELPS, IX86_BUILTIN_MASKMOVQ, IX86_BUILTIN_MOVMSKPS,
  IX86_BUILTIN_PMOVMSKB, IX86_BUILTIN_MOVNTPS, IX86_BUILTIN_MOVNTQ, IX86_BUILTIN_LOADDQA,
  IX86_BUILTIN_LOADDQU, IX86_BUILTIN_STOREDQA, IX86_BUILTIN_STOREDQU, IX86_BUILTIN_MOVQ,
  IX86_BUILTIN_LOADD, IX86_BUILTIN_STORED, IX86_BUILTIN_CLRTI, IX86_BUILTIN_PACKSSWB,
  IX86_BUILTIN_PACKSSDW, IX86_BUILTIN_PACKUSWB, IX86_BUILTIN_PADDB, IX86_BUILTIN_PADDW,
  IX86_BUILTIN_PADDD, IX86_BUILTIN_PADDQ, IX86_BUILTIN_PADDSB, IX86_BUILTIN_PADDSW,
  IX86_BUILTIN_PADDUSB, IX86_BUILTIN_PADDUSW, IX86_BUILTIN_PSUBB, IX86_BUILTIN_PSUBW,
  IX86_BUILTIN_PSUBD, IX86_BUILTIN_PSUBQ, IX86_BUILTIN_PSUBSB, IX86_BUILTIN_PSUBSW,
  IX86_BUILTIN_PSUBUSB, IX86_BUILTIN_PSUBUSW, IX86_BUILTIN_PAND, IX86_BUILTIN_PANDN,
  IX86_BUILTIN_POR, IX86_BUILTIN_PXOR, IX86_BUILTIN_PAVGB, IX86_BUILTIN_PAVGW,
  IX86_BUILTIN_PCMPEQB, IX86_BUILTIN_PCMPEQW, IX86_BUILTIN_PCMPEQD, IX86_BUILTIN_PCMPGTB,
  IX86_BUILTIN_PCMPGTW, IX86_BUILTIN_PCMPGTD, IX86_BUILTIN_PEXTRW, IX86_BUILTIN_PINSRW,
  IX86_BUILTIN_PMADDWD, IX86_BUILTIN_PMAXSW, IX86_BUILTIN_PMAXUB, IX86_BUILTIN_PMINSW,
  IX86_BUILTIN_PMINUB, IX86_BUILTIN_PMULHUW, IX86_BUILTIN_PMULHW, IX86_BUILTIN_PMULLW,
  IX86_BUILTIN_PSADBW, IX86_BUILTIN_PSHUFW, IX86_BUILTIN_PSLLW, IX86_BUILTIN_PSLLD,
  IX86_BUILTIN_PSLLQ, IX86_BUILTIN_PSRAW, IX86_BUILTIN_PSRAD, IX86_BUILTIN_PSRLW,
  IX86_BUILTIN_PSRLD, IX86_BUILTIN_PSRLQ, IX86_BUILTIN_PSLLWI, IX86_BUILTIN_PSLLDI,
  IX86_BUILTIN_PSLLQI, IX86_BUILTIN_PSRAWI, IX86_BUILTIN_PSRADI, IX86_BUILTIN_PSRLWI,
  IX86_BUILTIN_PSRLDI, IX86_BUILTIN_PSRLQI, IX86_BUILTIN_PUNPCKHBW, IX86_BUILTIN_PUNPCKHWD,
  IX86_BUILTIN_PUNPCKHDQ, IX86_BUILTIN_PUNPCKLBW, IX86_BUILTIN_PUNPCKLWD, IX86_BUILTIN_PUNPCKLDQ,
  IX86_BUILTIN_SHUFPS, IX86_BUILTIN_RCPPS, IX86_BUILTIN_RCPSS, IX86_BUILTIN_RSQRTPS,
  IX86_BUILTIN_RSQRTSS, IX86_BUILTIN_SQRTPS, IX86_BUILTIN_SQRTSS, IX86_BUILTIN_UNPCKHPS,
  IX86_BUILTIN_UNPCKLPS, IX86_BUILTIN_ANDPS, IX86_BUILTIN_ANDNPS, IX86_BUILTIN_ORPS,
  IX86_BUILTIN_XORPS, IX86_BUILTIN_EMMS, IX86_BUILTIN_LDMXCSR, IX86_BUILTIN_STMXCSR,
  IX86_BUILTIN_SFENCE, IX86_BUILTIN_FEMMS, IX86_BUILTIN_PAVGUSB, IX86_BUILTIN_PF2ID,
  IX86_BUILTIN_PFACC, IX86_BUILTIN_PFADD, IX86_BUILTIN_PFCMPEQ, IX86_BUILTIN_PFCMPGE,
  IX86_BUILTIN_PFCMPGT, IX86_BUILTIN_PFMAX, IX86_BUILTIN_PFMIN, IX86_BUILTIN_PFMUL,
  IX86_BUILTIN_PFRCP, IX86_BUILTIN_PFRCPIT1, IX86_BUILTIN_PFRCPIT2, IX86_BUILTIN_PFRSQIT1,
  IX86_BUILTIN_PFRSQRT, IX86_BUILTIN_PFSUB, IX86_BUILTIN_PFSUBR, IX86_BUILTIN_PI2FD,
  IX86_BUILTIN_PMULHRW, IX86_BUILTIN_PF2IW, IX86_BUILTIN_PFNACC, IX86_BUILTIN_PFPNACC,
  IX86_BUILTIN_PI2FW, IX86_BUILTIN_PSWAPDSI, IX86_BUILTIN_PSWAPDSF, IX86_BUILTIN_SSE_ZERO,
  IX86_BUILTIN_MMX_ZERO, IX86_BUILTIN_ADDPD, IX86_BUILTIN_ADDSD, IX86_BUILTIN_DIVPD,
  IX86_BUILTIN_DIVSD, IX86_BUILTIN_MULPD, IX86_BUILTIN_MULSD, IX86_BUILTIN_SUBPD,
  IX86_BUILTIN_SUBSD, IX86_BUILTIN_CMPEQPD, IX86_BUILTIN_CMPLTPD, IX86_BUILTIN_CMPLEPD,
  IX86_BUILTIN_CMPGTPD, IX86_BUILTIN_CMPGEPD, IX86_BUILTIN_CMPNEQPD, IX86_BUILTIN_CMPNLTPD,
  IX86_BUILTIN_CMPNLEPD, IX86_BUILTIN_CMPNGTPD, IX86_BUILTIN_CMPNGEPD, IX86_BUILTIN_CMPORDPD,
  IX86_BUILTIN_CMPUNORDPD, IX86_BUILTIN_CMPNEPD, IX86_BUILTIN_CMPEQSD, IX86_BUILTIN_CMPLTSD,
  IX86_BUILTIN_CMPLESD, IX86_BUILTIN_CMPNEQSD, IX86_BUILTIN_CMPNLTSD, IX86_BUILTIN_CMPNLESD,
  IX86_BUILTIN_CMPORDSD, IX86_BUILTIN_CMPUNORDSD, IX86_BUILTIN_CMPNESD, IX86_BUILTIN_COMIEQSD,
  IX86_BUILTIN_COMILTSD, IX86_BUILTIN_COMILESD, IX86_BUILTIN_COMIGTSD, IX86_BUILTIN_COMIGESD,
  IX86_BUILTIN_COMINEQSD, IX86_BUILTIN_UCOMIEQSD, IX86_BUILTIN_UCOMILTSD, IX86_BUILTIN_UCOMILESD,
  IX86_BUILTIN_UCOMIGTSD, IX86_BUILTIN_UCOMIGESD, IX86_BUILTIN_UCOMINEQSD, IX86_BUILTIN_MAXPD,
  IX86_BUILTIN_MAXSD, IX86_BUILTIN_MINPD, IX86_BUILTIN_MINSD, IX86_BUILTIN_ANDPD,
  IX86_BUILTIN_ANDNPD, IX86_BUILTIN_ORPD, IX86_BUILTIN_XORPD, IX86_BUILTIN_SQRTPD,
  IX86_BUILTIN_SQRTSD, IX86_BUILTIN_UNPCKHPD, IX86_BUILTIN_UNPCKLPD, IX86_BUILTIN_SHUFPD,
  IX86_BUILTIN_LOADAPD, IX86_BUILTIN_LOADUPD, IX86_BUILTIN_STOREAPD, IX86_BUILTIN_STOREUPD,
  IX86_BUILTIN_LOADSD, IX86_BUILTIN_STORESD, IX86_BUILTIN_MOVSD, IX86_BUILTIN_LOADHPD,
  IX86_BUILTIN_LOADLPD, IX86_BUILTIN_STOREHPD, IX86_BUILTIN_STORELPD, IX86_BUILTIN_CVTDQ2PD,
  IX86_BUILTIN_CVTDQ2PS, IX86_BUILTIN_CVTPD2DQ, IX86_BUILTIN_CVTPD2PI, IX86_BUILTIN_CVTPD2PS,
  IX86_BUILTIN_CVTTPD2DQ, IX86_BUILTIN_CVTTPD2PI, IX86_BUILTIN_CVTPI2PD, IX86_BUILTIN_CVTSI2SD,
  IX86_BUILTIN_CVTSI642SD, IX86_BUILTIN_CVTSD2SI, IX86_BUILTIN_CVTSD2SI64, IX86_BUILTIN_CVTSD2SS,
  IX86_BUILTIN_CVTSS2SD, IX86_BUILTIN_CVTTSD2SI, IX86_BUILTIN_CVTTSD2SI64, IX86_BUILTIN_CVTPS2DQ,
  IX86_BUILTIN_CVTPS2PD, IX86_BUILTIN_CVTTPS2DQ, IX86_BUILTIN_MOVNTI, IX86_BUILTIN_MOVNTPD,
  IX86_BUILTIN_MOVNTDQ, IX86_BUILTIN_SETPD1, IX86_BUILTIN_SETPD, IX86_BUILTIN_CLRPD,
  IX86_BUILTIN_SETRPD, IX86_BUILTIN_LOADPD1, IX86_BUILTIN_LOADRPD, IX86_BUILTIN_STOREPD1,
  IX86_BUILTIN_STORERPD, IX86_BUILTIN_MASKMOVDQU, IX86_BUILTIN_MOVMSKPD, IX86_BUILTIN_PMOVMSKB128,
  IX86_BUILTIN_MOVQ2DQ, IX86_BUILTIN_MOVDQ2Q, IX86_BUILTIN_PACKSSWB128, IX86_BUILTIN_PACKSSDW128,
  IX86_BUILTIN_PACKUSWB128, IX86_BUILTIN_PADDB128, IX86_BUILTIN_PADDW128, IX86_BUILTIN_PADDD128,
  IX86_BUILTIN_PADDQ128, IX86_BUILTIN_PADDSB128, IX86_BUILTIN_PADDSW128, IX86_BUILTIN_PADDUSB128,
  IX86_BUILTIN_PADDUSW128, IX86_BUILTIN_PSUBB128, IX86_BUILTIN_PSUBW128, IX86_BUILTIN_PSUBD128,
  IX86_BUILTIN_PSUBQ128, IX86_BUILTIN_PSUBSB128, IX86_BUILTIN_PSUBSW128, IX86_BUILTIN_PSUBUSB128,
  IX86_BUILTIN_PSUBUSW128, IX86_BUILTIN_PAND128, IX86_BUILTIN_PANDN128, IX86_BUILTIN_POR128,
  IX86_BUILTIN_PXOR128, IX86_BUILTIN_PAVGB128, IX86_BUILTIN_PAVGW128, IX86_BUILTIN_PCMPEQB128,
  IX86_BUILTIN_PCMPEQW128, IX86_BUILTIN_PCMPEQD128, IX86_BUILTIN_PCMPGTB128, IX86_BUILTIN_PCMPGTW128,
  IX86_BUILTIN_PCMPGTD128, IX86_BUILTIN_PEXTRW128, IX86_BUILTIN_PINSRW128, IX86_BUILTIN_PMADDWD128,
  IX86_BUILTIN_PMAXSW128, IX86_BUILTIN_PMAXUB128, IX86_BUILTIN_PMINSW128, IX86_BUILTIN_PMINUB128,
  IX86_BUILTIN_PMULUDQ, IX86_BUILTIN_PMULUDQ128, IX86_BUILTIN_PMULHUW128, IX86_BUILTIN_PMULHW128,
  IX86_BUILTIN_PMULLW128, IX86_BUILTIN_PSADBW128, IX86_BUILTIN_PSHUFHW, IX86_BUILTIN_PSHUFLW,
  IX86_BUILTIN_PSHUFD, IX86_BUILTIN_PSLLW128, IX86_BUILTIN_PSLLD128, IX86_BUILTIN_PSLLQ128,
  IX86_BUILTIN_PSRAW128, IX86_BUILTIN_PSRAD128, IX86_BUILTIN_PSRLW128, IX86_BUILTIN_PSRLD128,
  IX86_BUILTIN_PSRLQ128, IX86_BUILTIN_PSLLDQI128, IX86_BUILTIN_PSLLWI128, IX86_BUILTIN_PSLLDI128,
  IX86_BUILTIN_PSLLQI128, IX86_BUILTIN_PSRAWI128, IX86_BUILTIN_PSRADI128, IX86_BUILTIN_PSRLDQI128,
  IX86_BUILTIN_PSRLWI128, IX86_BUILTIN_PSRLDI128, IX86_BUILTIN_PSRLQI128, IX86_BUILTIN_PUNPCKHBW128,
  IX86_BUILTIN_PUNPCKHWD128, IX86_BUILTIN_PUNPCKHDQ128, IX86_BUILTIN_PUNPCKHQDQ128, IX86_BUILTIN_PUNPCKLBW128,
  IX86_BUILTIN_PUNPCKLWD128, IX86_BUILTIN_PUNPCKLDQ128, IX86_BUILTIN_PUNPCKLQDQ128, IX86_BUILTIN_CLFLUSH,
  IX86_BUILTIN_MFENCE, IX86_BUILTIN_LFENCE, IX86_BUILTIN_ADDSUBPS, IX86_BUILTIN_HADDPS,
  IX86_BUILTIN_HSUBPS, IX86_BUILTIN_MOVSHDUP, IX86_BUILTIN_MOVSLDUP, IX86_BUILTIN_ADDSUBPD,
  IX86_BUILTIN_HADDPD, IX86_BUILTIN_HSUBPD, IX86_BUILTIN_LOADDDUP, IX86_BUILTIN_MOVDDUP,
  IX86_BUILTIN_LDDQU, IX86_BUILTIN_MONITOR, IX86_BUILTIN_MWAIT, IX86_BUILTIN_MAX,
  IX86_BUILTIN_ADDPS, IX86_BUILTIN_ADDSS, IX86_BUILTIN_DIVPS, IX86_BUILTIN_DIVSS,
  IX86_BUILTIN_MULPS, IX86_BUILTIN_MULSS, IX86_BUILTIN_SUBPS, IX86_BUILTIN_SUBSS,
  IX86_BUILTIN_CMPEQPS, IX86_BUILTIN_CMPLTPS, IX86_BUILTIN_CMPLEPS, IX86_BUILTIN_CMPGTPS,
  IX86_BUILTIN_CMPGEPS, IX86_BUILTIN_CMPNEQPS, IX86_BUILTIN_CMPNLTPS, IX86_BUILTIN_CMPNLEPS,
  IX86_BUILTIN_CMPNGTPS, IX86_BUILTIN_CMPNGEPS, IX86_BUILTIN_CMPORDPS, IX86_BUILTIN_CMPUNORDPS,
  IX86_BUILTIN_CMPNEPS, IX86_BUILTIN_CMPEQSS, IX86_BUILTIN_CMPLTSS, IX86_BUILTIN_CMPLESS,
  IX86_BUILTIN_CMPNEQSS, IX86_BUILTIN_CMPNLTSS, IX86_BUILTIN_CMPNLESS, IX86_BUILTIN_CMPNGTSS,
  IX86_BUILTIN_CMPNGESS, IX86_BUILTIN_CMPORDSS, IX86_BUILTIN_CMPUNORDSS, IX86_BUILTIN_CMPNESS,
  IX86_BUILTIN_COMIEQSS, IX86_BUILTIN_COMILTSS, IX86_BUILTIN_COMILESS, IX86_BUILTIN_COMIGTSS,
  IX86_BUILTIN_COMIGESS, IX86_BUILTIN_COMINEQSS, IX86_BUILTIN_UCOMIEQSS, IX86_BUILTIN_UCOMILTSS,
  IX86_BUILTIN_UCOMILESS, IX86_BUILTIN_UCOMIGTSS, IX86_BUILTIN_UCOMIGESS, IX86_BUILTIN_UCOMINEQSS,
  IX86_BUILTIN_CVTPI2PS, IX86_BUILTIN_CVTPS2PI, IX86_BUILTIN_CVTSI2SS, IX86_BUILTIN_CVTSI642SS,
  IX86_BUILTIN_CVTSS2SI, IX86_BUILTIN_CVTSS2SI64, IX86_BUILTIN_CVTTPS2PI, IX86_BUILTIN_CVTTSS2SI,
  IX86_BUILTIN_CVTTSS2SI64, IX86_BUILTIN_MAXPS, IX86_BUILTIN_MAXSS, IX86_BUILTIN_MINPS,
  IX86_BUILTIN_MINSS, IX86_BUILTIN_LOADUPS, IX86_BUILTIN_STOREUPS, IX86_BUILTIN_MOVSS,
  IX86_BUILTIN_MOVHLPS, IX86_BUILTIN_MOVLHPS, IX86_BUILTIN_LOADHPS, IX86_BUILTIN_LOADLPS,
  IX86_BUILTIN_STOREHPS, IX86_BUILTIN_STORELPS, IX86_BUILTIN_MASKMOVQ, IX86_BUILTIN_MOVMSKPS,
  IX86_BUILTIN_PMOVMSKB, IX86_BUILTIN_MOVNTPS, IX86_BUILTIN_MOVNTQ, IX86_BUILTIN_LOADDQU,
  IX86_BUILTIN_STOREDQU, IX86_BUILTIN_PACKSSWB, IX86_BUILTIN_PACKSSDW, IX86_BUILTIN_PACKUSWB,
  IX86_BUILTIN_PADDB, IX86_BUILTIN_PADDW, IX86_BUILTIN_PADDD, IX86_BUILTIN_PADDQ,
  IX86_BUILTIN_PADDSB, IX86_BUILTIN_PADDSW, IX86_BUILTIN_PADDUSB, IX86_BUILTIN_PADDUSW,
  IX86_BUILTIN_PSUBB, IX86_BUILTIN_PSUBW, IX86_BUILTIN_PSUBD, IX86_BUILTIN_PSUBQ,
  IX86_BUILTIN_PSUBSB, IX86_BUILTIN_PSUBSW, IX86_BUILTIN_PSUBUSB, IX86_BUILTIN_PSUBUSW,
  IX86_BUILTIN_PAND, IX86_BUILTIN_PANDN, IX86_BUILTIN_POR, IX86_BUILTIN_PXOR,
  IX86_BUILTIN_PAVGB, IX86_BUILTIN_PAVGW, IX86_BUILTIN_PCMPEQB, IX86_BUILTIN_PCMPEQW,
  IX86_BUILTIN_PCMPEQD, IX86_BUILTIN_PCMPGTB, IX86_BUILTIN_PCMPGTW, IX86_BUILTIN_PCMPGTD,
  IX86_BUILTIN_PMADDWD, IX86_BUILTIN_PMAXSW, IX86_BUILTIN_PMAXUB, IX86_BUILTIN_PMINSW,
  IX86_BUILTIN_PMINUB, IX86_BUILTIN_PMULHUW, IX86_BUILTIN_PMULHW, IX86_BUILTIN_PMULLW,
  IX86_BUILTIN_PSADBW, IX86_BUILTIN_PSHUFW, IX86_BUILTIN_PSLLW, IX86_BUILTIN_PSLLD,
  IX86_BUILTIN_PSLLQ, IX86_BUILTIN_PSRAW, IX86_BUILTIN_PSRAD, IX86_BUILTIN_PSRLW,
  IX86_BUILTIN_PSRLD, IX86_BUILTIN_PSRLQ, IX86_BUILTIN_PSLLWI, IX86_BUILTIN_PSLLDI,
  IX86_BUILTIN_PSLLQI, IX86_BUILTIN_PSRAWI, IX86_BUILTIN_PSRADI, IX86_BUILTIN_PSRLWI,
  IX86_BUILTIN_PSRLDI, IX86_BUILTIN_PSRLQI, IX86_BUILTIN_PUNPCKHBW, IX86_BUILTIN_PUNPCKHWD,
  IX86_BUILTIN_PUNPCKHDQ, IX86_BUILTIN_PUNPCKLBW, IX86_BUILTIN_PUNPCKLWD, IX86_BUILTIN_PUNPCKLDQ,
  IX86_BUILTIN_SHUFPS, IX86_BUILTIN_RCPPS, IX86_BUILTIN_RCPSS, IX86_BUILTIN_RSQRTPS,
  IX86_BUILTIN_RSQRTSS, IX86_BUILTIN_SQRTPS, IX86_BUILTIN_SQRTSS, IX86_BUILTIN_UNPCKHPS,
  IX86_BUILTIN_UNPCKLPS, IX86_BUILTIN_ANDPS, IX86_BUILTIN_ANDNPS, IX86_BUILTIN_ORPS,
  IX86_BUILTIN_XORPS, IX86_BUILTIN_EMMS, IX86_BUILTIN_LDMXCSR, IX86_BUILTIN_STMXCSR,
  IX86_BUILTIN_SFENCE, IX86_BUILTIN_FEMMS, IX86_BUILTIN_PAVGUSB, IX86_BUILTIN_PF2ID,
  IX86_BUILTIN_PFACC, IX86_BUILTIN_PFADD, IX86_BUILTIN_PFCMPEQ, IX86_BUILTIN_PFCMPGE,
  IX86_BUILTIN_PFCMPGT, IX86_BUILTIN_PFMAX, IX86_BUILTIN_PFMIN, IX86_BUILTIN_PFMUL,
  IX86_BUILTIN_PFRCP, IX86_BUILTIN_PFRCPIT1, IX86_BUILTIN_PFRCPIT2, IX86_BUILTIN_PFRSQIT1,
  IX86_BUILTIN_PFRSQRT, IX86_BUILTIN_PFSUB, IX86_BUILTIN_PFSUBR, IX86_BUILTIN_PI2FD,
  IX86_BUILTIN_PMULHRW, IX86_BUILTIN_PF2IW, IX86_BUILTIN_PFNACC, IX86_BUILTIN_PFPNACC,
  IX86_BUILTIN_PI2FW, IX86_BUILTIN_PSWAPDSI, IX86_BUILTIN_PSWAPDSF, IX86_BUILTIN_ADDPD,
  IX86_BUILTIN_ADDSD, IX86_BUILTIN_DIVPD, IX86_BUILTIN_DIVSD, IX86_BUILTIN_MULPD,
  IX86_BUILTIN_MULSD, IX86_BUILTIN_SUBPD, IX86_BUILTIN_SUBSD, IX86_BUILTIN_CMPEQPD,
  IX86_BUILTIN_CMPLTPD, IX86_BUILTIN_CMPLEPD, IX86_BUILTIN_CMPGTPD, IX86_BUILTIN_CMPGEPD,
  IX86_BUILTIN_CMPNEQPD, IX86_BUILTIN_CMPNLTPD, IX86_BUILTIN_CMPNLEPD, IX86_BUILTIN_CMPNGTPD,
  IX86_BUILTIN_CMPNGEPD, IX86_BUILTIN_CMPORDPD, IX86_BUILTIN_CMPUNORDPD, IX86_BUILTIN_CMPNEPD,
  IX86_BUILTIN_CMPEQSD, IX86_BUILTIN_CMPLTSD, IX86_BUILTIN_CMPLESD, IX86_BUILTIN_CMPNEQSD,
  IX86_BUILTIN_CMPNLTSD, IX86_BUILTIN_CMPNLESD, IX86_BUILTIN_CMPORDSD, IX86_BUILTIN_CMPUNORDSD,
  IX86_BUILTIN_CMPNESD, IX86_BUILTIN_COMIEQSD, IX86_BUILTIN_COMILTSD, IX86_BUILTIN_COMILESD,
  IX86_BUILTIN_COMIGTSD, IX86_BUILTIN_COMIGESD, IX86_BUILTIN_COMINEQSD, IX86_BUILTIN_UCOMIEQSD,
  IX86_BUILTIN_UCOMILTSD, IX86_BUILTIN_UCOMILESD, IX86_BUILTIN_UCOMIGTSD, IX86_BUILTIN_UCOMIGESD,
  IX86_BUILTIN_UCOMINEQSD, IX86_BUILTIN_MAXPD, IX86_BUILTIN_MAXSD, IX86_BUILTIN_MINPD,
  IX86_BUILTIN_MINSD, IX86_BUILTIN_ANDPD, IX86_BUILTIN_ANDNPD, IX86_BUILTIN_ORPD,
  IX86_BUILTIN_XORPD, IX86_BUILTIN_SQRTPD, IX86_BUILTIN_SQRTSD, IX86_BUILTIN_UNPCKHPD,
  IX86_BUILTIN_UNPCKLPD, IX86_BUILTIN_SHUFPD, IX86_BUILTIN_LOADUPD, IX86_BUILTIN_STOREUPD,
  IX86_BUILTIN_MOVSD, IX86_BUILTIN_LOADHPD, IX86_BUILTIN_LOADLPD, IX86_BUILTIN_CVTDQ2PD,
  IX86_BUILTIN_CVTDQ2PS, IX86_BUILTIN_CVTPD2DQ, IX86_BUILTIN_CVTPD2PI, IX86_BUILTIN_CVTPD2PS,
  IX86_BUILTIN_CVTTPD2DQ, IX86_BUILTIN_CVTTPD2PI, IX86_BUILTIN_CVTPI2PD, IX86_BUILTIN_CVTSI2SD,
  IX86_BUILTIN_CVTSI642SD, IX86_BUILTIN_CVTSD2SI, IX86_BUILTIN_CVTSD2SI64, IX86_BUILTIN_CVTSD2SS,
  IX86_BUILTIN_CVTSS2SD, IX86_BUILTIN_CVTTSD2SI, IX86_BUILTIN_CVTTSD2SI64, IX86_BUILTIN_CVTPS2DQ,
  IX86_BUILTIN_CVTPS2PD, IX86_BUILTIN_CVTTPS2DQ, IX86_BUILTIN_MOVNTI, IX86_BUILTIN_MOVNTPD,
  IX86_BUILTIN_MOVNTDQ, IX86_BUILTIN_MASKMOVDQU, IX86_BUILTIN_MOVMSKPD, IX86_BUILTIN_PMOVMSKB128,
  IX86_BUILTIN_PACKSSWB128, IX86_BUILTIN_PACKSSDW128, IX86_BUILTIN_PACKUSWB128, IX86_BUILTIN_PADDB128,
  IX86_BUILTIN_PADDW128, IX86_BUILTIN_PADDD128, IX86_BUILTIN_PADDQ128, IX86_BUILTIN_PADDSB128,
  IX86_BUILTIN_PADDSW128, IX86_BUILTIN_PADDUSB128, IX86_BUILTIN_PADDUSW128, IX86_BUILTIN_PSUBB128,
  IX86_BUILTIN_PSUBW128, IX86_BUILTIN_PSUBD128, IX86_BUILTIN_PSUBQ128, IX86_BUILTIN_PSUBSB128,
  IX86_BUILTIN_PSUBSW128, IX86_BUILTIN_PSUBUSB128, IX86_BUILTIN_PSUBUSW128, IX86_BUILTIN_PAND128,
  IX86_BUILTIN_PANDN128, IX86_BUILTIN_POR128, IX86_BUILTIN_PXOR128, IX86_BUILTIN_PAVGB128,
  IX86_BUILTIN_PAVGW128, IX86_BUILTIN_PCMPEQB128, IX86_BUILTIN_PCMPEQW128, IX86_BUILTIN_PCMPEQD128,
  IX86_BUILTIN_PCMPGTB128, IX86_BUILTIN_PCMPGTW128, IX86_BUILTIN_PCMPGTD128, IX86_BUILTIN_PMADDWD128,
  IX86_BUILTIN_PMAXSW128, IX86_BUILTIN_PMAXUB128, IX86_BUILTIN_PMINSW128, IX86_BUILTIN_PMINUB128,
  IX86_BUILTIN_PMULUDQ, IX86_BUILTIN_PMULUDQ128, IX86_BUILTIN_PMULHUW128, IX86_BUILTIN_PMULHW128,
  IX86_BUILTIN_PMULLW128, IX86_BUILTIN_PSADBW128, IX86_BUILTIN_PSHUFHW, IX86_BUILTIN_PSHUFLW,
  IX86_BUILTIN_PSHUFD, IX86_BUILTIN_PSLLW128, IX86_BUILTIN_PSLLD128, IX86_BUILTIN_PSLLQ128,
  IX86_BUILTIN_PSRAW128, IX86_BUILTIN_PSRAD128, IX86_BUILTIN_PSRLW128, IX86_BUILTIN_PSRLD128,
  IX86_BUILTIN_PSRLQ128, IX86_BUILTIN_PSLLDQI128, IX86_BUILTIN_PSLLWI128, IX86_BUILTIN_PSLLDI128,
  IX86_BUILTIN_PSLLQI128, IX86_BUILTIN_PSRAWI128, IX86_BUILTIN_PSRADI128, IX86_BUILTIN_PSRLDQI128,
  IX86_BUILTIN_PSRLWI128, IX86_BUILTIN_PSRLDI128, IX86_BUILTIN_PSRLQI128, IX86_BUILTIN_PUNPCKHBW128,
  IX86_BUILTIN_PUNPCKHWD128, IX86_BUILTIN_PUNPCKHDQ128, IX86_BUILTIN_PUNPCKHQDQ128, IX86_BUILTIN_PUNPCKLBW128,
  IX86_BUILTIN_PUNPCKLWD128, IX86_BUILTIN_PUNPCKLDQ128, IX86_BUILTIN_PUNPCKLQDQ128, IX86_BUILTIN_CLFLUSH,
  IX86_BUILTIN_MFENCE, IX86_BUILTIN_LFENCE, IX86_BUILTIN_ADDSUBPS, IX86_BUILTIN_HADDPS,
  IX86_BUILTIN_HSUBPS, IX86_BUILTIN_MOVSHDUP, IX86_BUILTIN_MOVSLDUP, IX86_BUILTIN_ADDSUBPD,
  IX86_BUILTIN_HADDPD, IX86_BUILTIN_HSUBPD, IX86_BUILTIN_LDDQU, IX86_BUILTIN_MONITOR,
  IX86_BUILTIN_MWAIT, IX86_BUILTIN_VEC_INIT_V2SI, IX86_BUILTIN_VEC_INIT_V4HI, IX86_BUILTIN_VEC_INIT_V8QI,
  IX86_BUILTIN_VEC_EXT_V2DF, IX86_BUILTIN_VEC_EXT_V2DI, IX86_BUILTIN_VEC_EXT_V4SF, IX86_BUILTIN_VEC_EXT_V4SI,
  IX86_BUILTIN_VEC_EXT_V8HI, IX86_BUILTIN_VEC_EXT_V2SI, IX86_BUILTIN_VEC_EXT_V4HI, IX86_BUILTIN_VEC_SET_V8HI,
  IX86_BUILTIN_VEC_SET_V4HI, IX86_BUILTIN_MAX, IX86_BUILTIN_ADDPS, IX86_BUILTIN_ADDSS,
  IX86_BUILTIN_DIVPS, IX86_BUILTIN_DIVSS, IX86_BUILTIN_MULPS, IX86_BUILTIN_MULSS,
  IX86_BUILTIN_SUBPS, IX86_BUILTIN_SUBSS, IX86_BUILTIN_CMPEQPS, IX86_BUILTIN_CMPLTPS,
  IX86_BUILTIN_CMPLEPS, IX86_BUILTIN_CMPGTPS, IX86_BUILTIN_CMPGEPS, IX86_BUILTIN_CMPNEQPS,
  IX86_BUILTIN_CMPNLTPS, IX86_BUILTIN_CMPNLEPS, IX86_BUILTIN_CMPNGTPS, IX86_BUILTIN_CMPNGEPS,
  IX86_BUILTIN_CMPORDPS, IX86_BUILTIN_CMPUNORDPS, IX86_BUILTIN_CMPEQSS, IX86_BUILTIN_CMPLTSS,
  IX86_BUILTIN_CMPLESS, IX86_BUILTIN_CMPNEQSS, IX86_BUILTIN_CMPNLTSS, IX86_BUILTIN_CMPNLESS,
  IX86_BUILTIN_CMPNGTSS, IX86_BUILTIN_CMPNGESS, IX86_BUILTIN_CMPORDSS, IX86_BUILTIN_CMPUNORDSS,
  IX86_BUILTIN_COMIEQSS, IX86_BUILTIN_COMILTSS, IX86_BUILTIN_COMILESS, IX86_BUILTIN_COMIGTSS,
  IX86_BUILTIN_COMIGESS, IX86_BUILTIN_COMINEQSS, IX86_BUILTIN_UCOMIEQSS, IX86_BUILTIN_UCOMILTSS,
  IX86_BUILTIN_UCOMILESS, IX86_BUILTIN_UCOMIGTSS, IX86_BUILTIN_UCOMIGESS, IX86_BUILTIN_UCOMINEQSS,
  IX86_BUILTIN_CVTPI2PS, IX86_BUILTIN_CVTPS2PI, IX86_BUILTIN_CVTSI2SS, IX86_BUILTIN_CVTSI642SS,
  IX86_BUILTIN_CVTSS2SI, IX86_BUILTIN_CVTSS2SI64, IX86_BUILTIN_CVTTPS2PI, IX86_BUILTIN_CVTTSS2SI,
  IX86_BUILTIN_CVTTSS2SI64, IX86_BUILTIN_MAXPS, IX86_BUILTIN_MAXSS, IX86_BUILTIN_MINPS,
  IX86_BUILTIN_MINSS, IX86_BUILTIN_LOADUPS, IX86_BUILTIN_STOREUPS, IX86_BUILTIN_MOVSS,
  IX86_BUILTIN_MOVHLPS, IX86_BUILTIN_MOVLHPS, IX86_BUILTIN_LOADHPS, IX86_BUILTIN_LOADLPS,
  IX86_BUILTIN_STOREHPS, IX86_BUILTIN_STORELPS, IX86_BUILTIN_MASKMOVQ, IX86_BUILTIN_MOVMSKPS,
  IX86_BUILTIN_PMOVMSKB, IX86_BUILTIN_MOVNTPS, IX86_BUILTIN_MOVNTQ, IX86_BUILTIN_LOADDQU,
  IX86_BUILTIN_STOREDQU, IX86_BUILTIN_PACKSSWB, IX86_BUILTIN_PACKSSDW, IX86_BUILTIN_PACKUSWB,
  IX86_BUILTIN_PADDB, IX86_BUILTIN_PADDW, IX86_BUILTIN_PADDD, IX86_BUILTIN_PADDQ,
  IX86_BUILTIN_PADDSB, IX86_BUILTIN_PADDSW, IX86_BUILTIN_PADDUSB, IX86_BUILTIN_PADDUSW,
  IX86_BUILTIN_PSUBB, IX86_BUILTIN_PSUBW, IX86_BUILTIN_PSUBD, IX86_BUILTIN_PSUBQ,
  IX86_BUILTIN_PSUBSB, IX86_BUILTIN_PSUBSW, IX86_BUILTIN_PSUBUSB, IX86_BUILTIN_PSUBUSW,
  IX86_BUILTIN_PAND, IX86_BUILTIN_PANDN, IX86_BUILTIN_POR, IX86_BUILTIN_PXOR,
  IX86_BUILTIN_PAVGB, IX86_BUILTIN_PAVGW, IX86_BUILTIN_PCMPEQB, IX86_BUILTIN_PCMPEQW,
  IX86_BUILTIN_PCMPEQD, IX86_BUILTIN_PCMPGTB, IX86_BUILTIN_PCMPGTW, IX86_BUILTIN_PCMPGTD,
  IX86_BUILTIN_PMADDWD, IX86_BUILTIN_PMAXSW, IX86_BUILTIN_PMAXUB, IX86_BUILTIN_PMINSW,
  IX86_BUILTIN_PMINUB, IX86_BUILTIN_PMULHUW, IX86_BUILTIN_PMULHW, IX86_BUILTIN_PMULLW,
  IX86_BUILTIN_PSADBW, IX86_BUILTIN_PSHUFW, IX86_BUILTIN_PSLLW, IX86_BUILTIN_PSLLD,
  IX86_BUILTIN_PSLLQ, IX86_BUILTIN_PSRAW, IX86_BUILTIN_PSRAD, IX86_BUILTIN_PSRLW,
  IX86_BUILTIN_PSRLD, IX86_BUILTIN_PSRLQ, IX86_BUILTIN_PSLLWI, IX86_BUILTIN_PSLLDI,
  IX86_BUILTIN_PSLLQI, IX86_BUILTIN_PSRAWI, IX86_BUILTIN_PSRADI, IX86_BUILTIN_PSRLWI,
  IX86_BUILTIN_PSRLDI, IX86_BUILTIN_PSRLQI, IX86_BUILTIN_PUNPCKHBW, IX86_BUILTIN_PUNPCKHWD,
  IX86_BUILTIN_PUNPCKHDQ, IX86_BUILTIN_PUNPCKLBW, IX86_BUILTIN_PUNPCKLWD, IX86_BUILTIN_PUNPCKLDQ,
  IX86_BUILTIN_SHUFPS, IX86_BUILTIN_RCPPS, IX86_BUILTIN_RCPSS, IX86_BUILTIN_RSQRTPS,
  IX86_BUILTIN_RSQRTSS, IX86_BUILTIN_SQRTPS, IX86_BUILTIN_SQRTSS, IX86_BUILTIN_UNPCKHPS,
  IX86_BUILTIN_UNPCKLPS, IX86_BUILTIN_ANDPS, IX86_BUILTIN_ANDNPS, IX86_BUILTIN_ORPS,
  IX86_BUILTIN_XORPS, IX86_BUILTIN_EMMS, IX86_BUILTIN_LDMXCSR, IX86_BUILTIN_STMXCSR,
  IX86_BUILTIN_SFENCE, IX86_BUILTIN_FEMMS, IX86_BUILTIN_PAVGUSB, IX86_BUILTIN_PF2ID,
  IX86_BUILTIN_PFACC, IX86_BUILTIN_PFADD, IX86_BUILTIN_PFCMPEQ, IX86_BUILTIN_PFCMPGE,
  IX86_BUILTIN_PFCMPGT, IX86_BUILTIN_PFMAX, IX86_BUILTIN_PFMIN, IX86_BUILTIN_PFMUL,
  IX86_BUILTIN_PFRCP, IX86_BUILTIN_PFRCPIT1, IX86_BUILTIN_PFRCPIT2, IX86_BUILTIN_PFRSQIT1,
  IX86_BUILTIN_PFRSQRT, IX86_BUILTIN_PFSUB, IX86_BUILTIN_PFSUBR, IX86_BUILTIN_PI2FD,
  IX86_BUILTIN_PMULHRW, IX86_BUILTIN_PF2IW, IX86_BUILTIN_PFNACC, IX86_BUILTIN_PFPNACC,
  IX86_BUILTIN_PI2FW, IX86_BUILTIN_PSWAPDSI, IX86_BUILTIN_PSWAPDSF, IX86_BUILTIN_ADDPD,
  IX86_BUILTIN_ADDSD, IX86_BUILTIN_DIVPD, IX86_BUILTIN_DIVSD, IX86_BUILTIN_MULPD,
  IX86_BUILTIN_MULSD, IX86_BUILTIN_SUBPD, IX86_BUILTIN_SUBSD, IX86_BUILTIN_CMPEQPD,
  IX86_BUILTIN_CMPLTPD, IX86_BUILTIN_CMPLEPD, IX86_BUILTIN_CMPGTPD, IX86_BUILTIN_CMPGEPD,
  IX86_BUILTIN_CMPNEQPD, IX86_BUILTIN_CMPNLTPD, IX86_BUILTIN_CMPNLEPD, IX86_BUILTIN_CMPNGTPD,
  IX86_BUILTIN_CMPNGEPD, IX86_BUILTIN_CMPORDPD, IX86_BUILTIN_CMPUNORDPD, IX86_BUILTIN_CMPNEPD,
  IX86_BUILTIN_CMPEQSD, IX86_BUILTIN_CMPLTSD, IX86_BUILTIN_CMPLESD, IX86_BUILTIN_CMPNEQSD,
  IX86_BUILTIN_CMPNLTSD, IX86_BUILTIN_CMPNLESD, IX86_BUILTIN_CMPORDSD, IX86_BUILTIN_CMPUNORDSD,
  IX86_BUILTIN_CMPNESD, IX86_BUILTIN_COMIEQSD, IX86_BUILTIN_COMILTSD, IX86_BUILTIN_COMILESD,
  IX86_BUILTIN_COMIGTSD, IX86_BUILTIN_COMIGESD, IX86_BUILTIN_COMINEQSD, IX86_BUILTIN_UCOMIEQSD,
  IX86_BUILTIN_UCOMILTSD, IX86_BUILTIN_UCOMILESD, IX86_BUILTIN_UCOMIGTSD, IX86_BUILTIN_UCOMIGESD,
  IX86_BUILTIN_UCOMINEQSD, IX86_BUILTIN_MAXPD, IX86_BUILTIN_MAXSD, IX86_BUILTIN_MINPD,
  IX86_BUILTIN_MINSD, IX86_BUILTIN_ANDPD, IX86_BUILTIN_ANDNPD, IX86_BUILTIN_ORPD,
  IX86_BUILTIN_XORPD, IX86_BUILTIN_SQRTPD, IX86_BUILTIN_SQRTSD, IX86_BUILTIN_UNPCKHPD,
  IX86_BUILTIN_UNPCKLPD, IX86_BUILTIN_SHUFPD, IX86_BUILTIN_LOADUPD, IX86_BUILTIN_STOREUPD,
  IX86_BUILTIN_MOVSD, IX86_BUILTIN_LOADHPD, IX86_BUILTIN_LOADLPD, IX86_BUILTIN_CVTDQ2PD,
  IX86_BUILTIN_CVTDQ2PS, IX86_BUILTIN_CVTPD2DQ, IX86_BUILTIN_CVTPD2PI, IX86_BUILTIN_CVTPD2PS,
  IX86_BUILTIN_CVTTPD2DQ, IX86_BUILTIN_CVTTPD2PI, IX86_BUILTIN_CVTPI2PD, IX86_BUILTIN_CVTSI2SD,
  IX86_BUILTIN_CVTSI642SD, IX86_BUILTIN_CVTSD2SI, IX86_BUILTIN_CVTSD2SI64, IX86_BUILTIN_CVTSD2SS,
  IX86_BUILTIN_CVTSS2SD, IX86_BUILTIN_CVTTSD2SI, IX86_BUILTIN_CVTTSD2SI64, IX86_BUILTIN_CVTPS2DQ,
  IX86_BUILTIN_CVTPS2PD, IX86_BUILTIN_CVTTPS2DQ, IX86_BUILTIN_MOVNTI, IX86_BUILTIN_MOVNTPD,
  IX86_BUILTIN_MOVNTDQ, IX86_BUILTIN_MASKMOVDQU, IX86_BUILTIN_MOVMSKPD, IX86_BUILTIN_PMOVMSKB128,
  IX86_BUILTIN_PACKSSWB128, IX86_BUILTIN_PACKSSDW128, IX86_BUILTIN_PACKUSWB128, IX86_BUILTIN_PADDB128,
  IX86_BUILTIN_PADDW128, IX86_BUILTIN_PADDD128, IX86_BUILTIN_PADDQ128, IX86_BUILTIN_PADDSB128,
  IX86_BUILTIN_PADDSW128, IX86_BUILTIN_PADDUSB128, IX86_BUILTIN_PADDUSW128, IX86_BUILTIN_PSUBB128,
  IX86_BUILTIN_PSUBW128, IX86_BUILTIN_PSUBD128, IX86_BUILTIN_PSUBQ128, IX86_BUILTIN_PSUBSB128,
  IX86_BUILTIN_PSUBSW128, IX86_BUILTIN_PSUBUSB128, IX86_BUILTIN_PSUBUSW128, IX86_BUILTIN_PAND128,
  IX86_BUILTIN_PANDN128, IX86_BUILTIN_POR128, IX86_BUILTIN_PXOR128, IX86_BUILTIN_PAVGB128,
  IX86_BUILTIN_PAVGW128, IX86_BUILTIN_PCMPEQB128, IX86_BUILTIN_PCMPEQW128, IX86_BUILTIN_PCMPEQD128,
  IX86_BUILTIN_PCMPGTB128, IX86_BUILTIN_PCMPGTW128, IX86_BUILTIN_PCMPGTD128, IX86_BUILTIN_PMADDWD128,
  IX86_BUILTIN_PMAXSW128, IX86_BUILTIN_PMAXUB128, IX86_BUILTIN_PMINSW128, IX86_BUILTIN_PMINUB128,
  IX86_BUILTIN_PMULUDQ, IX86_BUILTIN_PMULUDQ128, IX86_BUILTIN_PMULHUW128, IX86_BUILTIN_PMULHW128,
  IX86_BUILTIN_PMULLW128, IX86_BUILTIN_PSADBW128, IX86_BUILTIN_PSHUFHW, IX86_BUILTIN_PSHUFLW,
  IX86_BUILTIN_PSHUFD, IX86_BUILTIN_PSLLW128, IX86_BUILTIN_PSLLD128, IX86_BUILTIN_PSLLQ128,
  IX86_BUILTIN_PSRAW128, IX86_BUILTIN_PSRAD128, IX86_BUILTIN_PSRLW128, IX86_BUILTIN_PSRLD128,
  IX86_BUILTIN_PSRLQ128, IX86_BUILTIN_PSLLDQI128, IX86_BUILTIN_PSLLWI128, IX86_BUILTIN_PSLLDI128,
  IX86_BUILTIN_PSLLQI128, IX86_BUILTIN_PSRAWI128, IX86_BUILTIN_PSRADI128, IX86_BUILTIN_PSRLDQI128,
  IX86_BUILTIN_PSRLWI128, IX86_BUILTIN_PSRLDI128, IX86_BUILTIN_PSRLQI128, IX86_BUILTIN_PUNPCKHBW128,
  IX86_BUILTIN_PUNPCKHWD128, IX86_BUILTIN_PUNPCKHDQ128, IX86_BUILTIN_PUNPCKHQDQ128, IX86_BUILTIN_PUNPCKLBW128,
  IX86_BUILTIN_PUNPCKLWD128, IX86_BUILTIN_PUNPCKLDQ128, IX86_BUILTIN_PUNPCKLQDQ128, IX86_BUILTIN_CLFLUSH,
  IX86_BUILTIN_MFENCE, IX86_BUILTIN_LFENCE, IX86_BUILTIN_ADDSUBPS, IX86_BUILTIN_HADDPS,
  IX86_BUILTIN_HSUBPS, IX86_BUILTIN_MOVSHDUP, IX86_BUILTIN_MOVSLDUP, IX86_BUILTIN_ADDSUBPD,
  IX86_BUILTIN_HADDPD, IX86_BUILTIN_HSUBPD, IX86_BUILTIN_LDDQU, IX86_BUILTIN_MOVNTSS,
  IX86_BUILTIN_MOVNTSD, IX86_BUILTIN_EXTRQI, IX86_BUILTIN_EXTRQ, IX86_BUILTIN_INSERTQI,
  IX86_BUILTIN_INSERTQ, IX86_BUILTIN_MONITOR, IX86_BUILTIN_MWAIT, IX86_BUILTIN_VEC_INIT_V2SI,
  IX86_BUILTIN_VEC_INIT_V4HI, IX86_BUILTIN_VEC_INIT_V8QI, IX86_BUILTIN_VEC_EXT_V2DF, IX86_BUILTIN_VEC_EXT_V2DI,
  IX86_BUILTIN_VEC_EXT_V4SF, IX86_BUILTIN_VEC_EXT_V4SI, IX86_BUILTIN_VEC_EXT_V8HI, IX86_BUILTIN_VEC_EXT_V2SI,
  IX86_BUILTIN_VEC_EXT_V4HI, IX86_BUILTIN_VEC_SET_V8HI, IX86_BUILTIN_VEC_SET_V4HI, IX86_BUILTIN_MAX
}
enum  processor_type {
  PROCESSOR_EV4, PROCESSOR_EV5, PROCESSOR_EV6, PROCESSOR_I386,
  PROCESSOR_I486, PROCESSOR_PENTIUM, PROCESSOR_PENTIUMPRO, PROCESSOR_K6,
  PROCESSOR_ATHLON, PROCESSOR_PENTIUM4, PROCESSOR_max, PROCESSOR_M88100,
  PROCESSOR_M88110, PROCESSOR_M88000, PROCESSOR_700, PROCESSOR_7100,
  PROCESSOR_7100LC, PROCESSOR_7200, PROCESSOR_8000, PROCESSOR_RIOS1,
  PROCESSOR_RIOS2, PROCESSOR_RS64A, PROCESSOR_MPCCORE, PROCESSOR_PPC403,
  PROCESSOR_PPC405, PROCESSOR_PPC601, PROCESSOR_PPC603, PROCESSOR_PPC604,
  PROCESSOR_PPC604e, PROCESSOR_PPC620, PROCESSOR_PPC630, PROCESSOR_PPC750,
  PROCESSOR_PPC7400, PROCESSOR_PPC7450, PROCESSOR_SH1, PROCESSOR_SH2,
  PROCESSOR_SH3, PROCESSOR_SH3E, PROCESSOR_SH4, PROCESSOR_SH5,
  PROCESSOR_DEFAULT, PROCESSOR_R3000, PROCESSOR_R3900, PROCESSOR_R6000,
  PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111, PROCESSOR_R4120,
  PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650, PROCESSOR_R5000,
  PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R8000, PROCESSOR_R4KC,
  PROCESSOR_R5KC, PROCESSOR_R20KC, PROCESSOR_SR71000, PROCESSOR_SB1,
  PROCESSOR_V7, PROCESSOR_CYPRESS, PROCESSOR_V8, PROCESSOR_SUPERSPARC,
  PROCESSOR_SPARCLITE, PROCESSOR_F930, PROCESSOR_F934, PROCESSOR_HYPERSPARC,
  PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET, PROCESSOR_TSC701, PROCESSOR_V9,
  PROCESSOR_ULTRASPARC, PROCESSOR_DEFAULT, PROCESSOR_R3000, PROCESSOR_R3900,
  PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111,
  PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650,
  PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R8000,
  PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC, PROCESSOR_SR71000,
  PROCESSOR_SB1, PROCESSOR_DEFAULT, PROCESSOR_R3000, PROCESSOR_R3900,
  PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111,
  PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650,
  PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R8000,
  PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC, PROCESSOR_SR71000,
  PROCESSOR_SB1, PROCESSOR_EV4, PROCESSOR_EV5, PROCESSOR_EV6,
  PROCESSOR_I386, PROCESSOR_I486, PROCESSOR_PENTIUM, PROCESSOR_PENTIUMPRO,
  PROCESSOR_K6, PROCESSOR_ATHLON, PROCESSOR_PENTIUM4, PROCESSOR_max,
  PROCESSOR_M88100, PROCESSOR_M88110, PROCESSOR_M88000, PROCESSOR_700,
  PROCESSOR_7100, PROCESSOR_7100LC, PROCESSOR_7200, PROCESSOR_8000,
  PROCESSOR_RIOS1, PROCESSOR_RIOS2, PROCESSOR_RS64A, PROCESSOR_MPCCORE,
  PROCESSOR_PPC403, PROCESSOR_PPC405, PROCESSOR_PPC601, PROCESSOR_PPC603,
  PROCESSOR_PPC604, PROCESSOR_PPC604e, PROCESSOR_PPC620, PROCESSOR_PPC630,
  PROCESSOR_PPC750, PROCESSOR_PPC7400, PROCESSOR_PPC7450, PROCESSOR_SH1,
  PROCESSOR_SH2, PROCESSOR_SH3, PROCESSOR_SH3E, PROCESSOR_SH4,
  PROCESSOR_SH5, PROCESSOR_DEFAULT, PROCESSOR_R3000, PROCESSOR_R3900,
  PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111,
  PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650,
  PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R8000,
  PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC, PROCESSOR_SR71000,
  PROCESSOR_SB1, PROCESSOR_V7, PROCESSOR_CYPRESS, PROCESSOR_V8,
  PROCESSOR_SUPERSPARC, PROCESSOR_SPARCLITE, PROCESSOR_F930, PROCESSOR_F934,
  PROCESSOR_HYPERSPARC, PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET, PROCESSOR_TSC701,
  PROCESSOR_V9, PROCESSOR_ULTRASPARC, PROCESSOR_DEFAULT, PROCESSOR_R3000,
  PROCESSOR_R3900, PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100,
  PROCESSOR_R4111, PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600,
  PROCESSOR_R4650, PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500,
  PROCESSOR_R8000, PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC,
  PROCESSOR_SR71000, PROCESSOR_SB1, PROCESSOR_DEFAULT, PROCESSOR_R3000,
  PROCESSOR_R3900, PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100,
  PROCESSOR_R4111, PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600,
  PROCESSOR_R4650, PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500,
  PROCESSOR_R8000, PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC,
  PROCESSOR_SR71000, PROCESSOR_SB1, PROCESSOR_EV4, PROCESSOR_EV5,
  PROCESSOR_EV6, PROCESSOR_MAX, ARM_CORE, PROCESSOR_I386,
  PROCESSOR_I486, PROCESSOR_PENTIUM, PROCESSOR_PENTIUMPRO, PROCESSOR_K6,
  PROCESSOR_ATHLON, PROCESSOR_PENTIUM4, PROCESSOR_K8, PROCESSOR_NOCONA,
  PROCESSOR_max, PROCESSOR_ITANIUM, PROCESSOR_ITANIUM2, PROCESSOR_max,
  PROCESSOR_DEFAULT, PROCESSOR_IQ2000, PROCESSOR_IQ10, PROCESSOR_DEFAULT,
  PROCESSOR_4KC, PROCESSOR_5KC, PROCESSOR_20KC, PROCESSOR_M4K,
  PROCESSOR_R3000, PROCESSOR_R3900, PROCESSOR_R6000, PROCESSOR_R4000,
  PROCESSOR_R4100, PROCESSOR_R4111, PROCESSOR_R4120, PROCESSOR_R4130,
  PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650, PROCESSOR_R5000,
  PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R7000, PROCESSOR_R8000,
  PROCESSOR_R9000, PROCESSOR_SB1, PROCESSOR_SR71000, PROCESSOR_700,
  PROCESSOR_7100, PROCESSOR_7100LC, PROCESSOR_7200, PROCESSOR_7300,
  PROCESSOR_8000, PROCESSOR_RIOS1, PROCESSOR_RIOS2, PROCESSOR_RS64A,
  PROCESSOR_MPCCORE, PROCESSOR_PPC403, PROCESSOR_PPC405, PROCESSOR_PPC440,
  PROCESSOR_PPC601, PROCESSOR_PPC603, PROCESSOR_PPC604, PROCESSOR_PPC604e,
  PROCESSOR_PPC620, PROCESSOR_PPC630, PROCESSOR_PPC750, PROCESSOR_PPC7400,
  PROCESSOR_PPC7450, PROCESSOR_PPC8540, PROCESSOR_POWER4, PROCESSOR_POWER5,
  PROCESSOR_9672_G5, PROCESSOR_9672_G6, PROCESSOR_2064_Z900, PROCESSOR_2084_Z990,
  PROCESSOR_max, PROCESSOR_SH1, PROCESSOR_SH2, PROCESSOR_SH2E,
  PROCESSOR_SH2A, PROCESSOR_SH3, PROCESSOR_SH3E, PROCESSOR_SH4,
  PROCESSOR_SH4A, PROCESSOR_SH5, PROCESSOR_V7, PROCESSOR_CYPRESS,
  PROCESSOR_V8, PROCESSOR_SUPERSPARC, PROCESSOR_SPARCLITE, PROCESSOR_F930,
  PROCESSOR_F934, PROCESSOR_HYPERSPARC, PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET,
  PROCESSOR_TSC701, PROCESSOR_V9, PROCESSOR_ULTRASPARC, PROCESSOR_ULTRASPARC3,
  PROCESSOR_EV4, PROCESSOR_EV5, PROCESSOR_EV6, PROCESSOR_MAX,
  ARM_CORE, PROCESSOR_I386, PROCESSOR_I486, PROCESSOR_PENTIUM,
  PROCESSOR_PENTIUMPRO, PROCESSOR_K6, PROCESSOR_ATHLON, PROCESSOR_PENTIUM4,
  PROCESSOR_K8, PROCESSOR_NOCONA, PROCESSOR_GENERIC32, PROCESSOR_GENERIC64,
  PROCESSOR_AMDFAM10, PROCESSOR_max, PROCESSOR_ITANIUM, PROCESSOR_ITANIUM2,
  PROCESSOR_max, PROCESSOR_DEFAULT, PROCESSOR_IQ2000, PROCESSOR_IQ10,
  PROCESSOR_R3000, PROCESSOR_4KC, PROCESSOR_4KP, PROCESSOR_5KC,
  PROCESSOR_5KF, PROCESSOR_20KC, PROCESSOR_24K, PROCESSOR_24KX,
  PROCESSOR_M4K, PROCESSOR_R3900, PROCESSOR_R6000, PROCESSOR_R4000,
  PROCESSOR_R4100, PROCESSOR_R4111, PROCESSOR_R4120, PROCESSOR_R4130,
  PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650, PROCESSOR_R5000,
  PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R7000, PROCESSOR_R8000,
  PROCESSOR_R9000, PROCESSOR_SB1, PROCESSOR_SB1A, PROCESSOR_SR71000,
  PROCESSOR_MAX, PROCESSOR_MN10300, PROCESSOR_AM33, PROCESSOR_AM33_2,
  PROCESSOR_MS1_64_001, PROCESSOR_MS1_16_002, PROCESSOR_MS1_16_003, PROCESSOR_MS2,
  PROCESSOR_700, PROCESSOR_7100, PROCESSOR_7100LC, PROCESSOR_7200,
  PROCESSOR_7300, PROCESSOR_8000, PROCESSOR_RIOS1, PROCESSOR_RIOS2,
  PROCESSOR_RS64A, PROCESSOR_MPCCORE, PROCESSOR_PPC403, PROCESSOR_PPC405,
  PROCESSOR_PPC440, PROCESSOR_PPC601, PROCESSOR_PPC603, PROCESSOR_PPC604,
  PROCESSOR_PPC604e, PROCESSOR_PPC620, PROCESSOR_PPC630, PROCESSOR_PPC750,
  PROCESSOR_PPC7400, PROCESSOR_PPC7450, PROCESSOR_PPC8540, PROCESSOR_POWER4,
  PROCESSOR_POWER5, PROCESSOR_9672_G5, PROCESSOR_9672_G6, PROCESSOR_2064_Z900,
  PROCESSOR_2084_Z990, PROCESSOR_2094_Z9_109, PROCESSOR_max, PROCESSOR_SH1,
  PROCESSOR_SH2, PROCESSOR_SH2E, PROCESSOR_SH2A, PROCESSOR_SH3,
  PROCESSOR_SH3E, PROCESSOR_SH4, PROCESSOR_SH4A, PROCESSOR_SH5,
  PROCESSOR_V7, PROCESSOR_CYPRESS, PROCESSOR_V8, PROCESSOR_SUPERSPARC,
  PROCESSOR_SPARCLITE, PROCESSOR_F930, PROCESSOR_F934, PROCESSOR_HYPERSPARC,
  PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET, PROCESSOR_TSC701, PROCESSOR_V9,
  PROCESSOR_ULTRASPARC, PROCESSOR_ULTRASPARC3, PROCESSOR_NIAGARA
}
enum  fpmath_unit {
  FPMATH_387 = 1, FPMATH_SSE = 2, FPMATH_387 = 1, FPMATH_SSE = 2,
  FPMATH_387 = 1, FPMATH_SSE = 2, FPMATH_387 = 1, FPMATH_SSE = 2
}
enum  tls_dialect {
  TLS_DIALECT_GNU, TLS_DIALECT_SUN, TLS_DIALECT_GNU, TLS_DIALECT_SUN,
  TLS_DIALECT_GNU, TLS_DIALECT_SUN, TLS_DIALECT_GNU, TLS_DIALECT_GNU2,
  TLS_DIALECT_SUN
}
enum  cmodel {
  CM_32, CM_SMALL, CM_KERNEL, CM_MEDIUM,
  CM_LARGE, CM_SMALL_PIC, CM_32, CM_MEDLOW,
  CM_MEDMID, CM_MEDANY, CM_EMBMEDANY, CM_32,
  CM_SMALL, CM_KERNEL, CM_MEDIUM, CM_LARGE,
  CM_SMALL_PIC, CM_32, CM_MEDLOW, CM_MEDMID,
  CM_MEDANY, CM_EMBMEDANY, CM_32, CM_SMALL,
  CM_KERNEL, CM_MEDIUM, CM_LARGE, CM_SMALL_PIC,
  CM_32, CM_MEDLOW, CM_MEDMID, CM_MEDANY,
  CM_EMBMEDANY, CM_32, CM_SMALL, CM_KERNEL,
  CM_MEDIUM, CM_LARGE, CM_SMALL_PIC, CM_MEDIUM_PIC,
  CM_32, CM_MEDLOW, CM_MEDMID, CM_MEDANY,
  CM_EMBMEDANY
}
enum  asm_dialect {
  ASM_ATT, ASM_INTEL, ASM_ATT, ASM_INTEL,
  ASM_ATT, ASM_INTEL, ASM_ATT, ASM_INTEL
}

Functions/Subroutines

struct machine_function GTY (())

Variables

struct processor_costs * ix86_cost
int target_flags
const int x86_use_leave
const int x86_push_memory
const int x86_zero_extend_with_and
const int x86_use_bit_test
const int x86_cmove
const int x86_deep_branch
const int x86_branch_hints
const int x86_unroll_strlen
const int x86_double_with_add
const int x86_partial_reg_stall
const int x86_movx
const int x86_use_loop
const int x86_use_fiop
const int x86_use_mov0
const int x86_use_cltd
const int x86_read_modify_write
const int x86_read_modify
const int x86_split_long_moves
const int x86_promote_QImode
const int x86_single_stringop
const int x86_fast_prefix
const int x86_himode_math
const int x86_qimode_math
const int x86_promote_qi_regs
const int x86_promote_hi_regs
const int x86_integer_DFmode_moves
const int x86_add_esp_4
const int x86_add_esp_8
const int x86_sub_esp_4
const int x86_sub_esp_8
const int x86_partial_reg_dependency
const int x86_memory_mismatch_stall
const int x86_accumulate_outgoing_args
const int x86_prologue_using_move
const int x86_epilogue_using_move
const int x86_decompose_lea
const int x86_arch_always_fancy_math_387
const int x86_shift1
const int x86_sse_partial_reg_dependency
const int x86_sse_split_regs
const int x86_sse_typeless_stores
const int x86_sse_load0_by_pxor
const int x86_use_ffreep
const int x86_inter_unit_moves
const int x86_schedule
const int x86_use_bt
int x86_prefetch_sse
int const dbx_register_map [FIRST_PSEUDO_REGISTER]
int const dbx64_register_map [FIRST_PSEUDO_REGISTER]
int const svr4_dbx_register_map [FIRST_PSEUDO_REGISTER]
enum processor_type ix86_tune
const char * ix86_tune_string
enum processor_type ix86_arch
const char * ix86_arch_string
enum fpmath_unit ix86_fpmath
const char * ix86_fpmath_string
enum tls_dialect ix86_tls_dialect
const char * ix86_tls_dialect_string
enum cmodel ix86_cmodel
const char * ix86_cmodel_string
const char * ix86_asm_string
enum asm_dialect ix86_asm_dialect
int ix86_regparm
const char * ix86_regparm_string
unsigned int ix86_preferred_stack_boundary
const char * ix86_preferred_stack_boundary_string
int ix86_branch_cost
const char * ix86_branch_cost_string
const char * ix86_debug_arg_string
const char * ix86_debug_addr_string
const char * ix86_align_loops_string
const char * ix86_align_jumps_string
const char * ix86_align_funcs_string
enum reg_class const regclass_map [FIRST_PSEUDO_REGISTER]
rtx ix86_compare_op0
rtx ix86_compare_op1

Define Documentation

#define ACCUMULATE_OUTGOING_ARGS   TARGET_ACCUMULATE_OUTGOING_ARGS

Definition at line 1646 of file i386.h.

#define ADDITIONAL_REGISTER_NAMES

Value:

{ { "eax", 0 }, { "edx", 1 }, { "ecx", 2 }, { "ebx", 3 }, \
  { "esi", 4 }, { "edi", 5 }, { "ebp", 6 }, { "esp", 7 }, \
  { "rax", 0 }, { "rdx", 1 }, { "rcx", 2 }, { "rbx", 3 }, \
  { "rsi", 4 }, { "rdi", 5 }, { "rbp", 6 }, { "rsp", 7 }, \
  { "al", 0 }, { "dl", 1 }, { "cl", 2 }, { "bl", 3 },   \
  { "ah", 0 }, { "dh", 1 }, { "ch", 2 }, { "bh", 3 } }

Definition at line 2653 of file i386.h.

#define ADJUST_FIELD_ALIGN ( FIELD,
COMPUTED   )     x86_field_alignment (FIELD, COMPUTED)

Definition at line 849 of file i386.h.

#define ALIGN_MODE_128 ( MODE   )     ((MODE) == XFmode || (MODE) == TFmode || SSE_REG_MODE_P (MODE))

Definition at line 832 of file i386.h.

#define ANY_FP_REG_P ( X   )     (REG_P (X) && ANY_FP_REGNO_P (REGNO (X)))

Definition at line 1405 of file i386.h.

#define ANY_FP_REGNO_P ( N   )     (FP_REGNO_P (N) || SSE_REGNO_P (N))

Definition at line 1406 of file i386.h.

#define ANY_QI_REG_P ( X   )     (TARGET_64BIT ? GENERAL_REG_P(X) : QI_REG_P (X))

Definition at line 1395 of file i386.h.

#define APPLY_RESULT_SIZE   (8+108)

Definition at line 1711 of file i386.h.

#define ARG_POINTER_REGNUM   16

Definition at line 1200 of file i386.h.

#define ASM_OPERAND_LETTER   '#'

Definition at line 2796 of file i386.h.

#define ASM_OUTPUT_ADDR_DIFF_ELT ( FILE,
BODY,
VALUE,
REL   )     ix86_output_addr_diff_elt ((FILE), (VALUE), (REL))

Definition at line 2749 of file i386.h.

#define ASM_OUTPUT_ADDR_VEC_ELT ( FILE,
VALUE   )     ix86_output_addr_vec_elt ((FILE), (VALUE))

Definition at line 2744 of file i386.h.

#define ASM_OUTPUT_REG_POP ( FILE,
REGNO   ) 

Value:

do {                  \
  if (TARGET_64BIT)             \
    asm_fprintf ((FILE), "\tpop{q}\t%%r%s\n",       \
     reg_names[(REGNO)] + (REX_INT_REGNO_P (REGNO) != 0));  \
  else                  \
    asm_fprintf ((FILE), "\tpop{l}\t%%e%s\n", reg_names[(REGNO)]);  \
} while (0)

Definition at line 2733 of file i386.h.

#define ASM_OUTPUT_REG_PUSH ( FILE,
REGNO   ) 

Value:

do {                  \
  if (TARGET_64BIT)             \
    asm_fprintf ((FILE), "\tpush{q}\t%%r%s\n",        \
     reg_names[(REGNO)] + (REX_INT_REGNO_P (REGNO) != 0));  \
  else                  \
    asm_fprintf ((FILE), "\tpush{l}\t%%e%s\n", reg_names[(REGNO)]); \
} while (0)

Definition at line 2721 of file i386.h.

#define ASM_PREFERRED_EH_DATA_FORMAT ( CODE,
GLOBAL   ) 

Value:

(flag_pic               \
    ? ((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4\
   : DW_EH_PE_absptr)

Definition at line 2713 of file i386.h.

#define ASSEMBLER_DIALECT   (ix86_asm_dialect)

Definition at line 314 of file i386.h.

#define AT_SP ( MODE   )     (gen_rtx_MEM ((MODE), stack_pointer_rtx))

Definition at line 2798 of file i386.h.

#define AVOID_CCMODE_COPIES

Definition at line 1135 of file i386.h.

#define BASE_REG_CLASS   GENERAL_REGS

Definition at line 1440 of file i386.h.

#define BIGGEST_ALIGNMENT   128

Definition at line 829 of file i386.h.

#define BITS_BIG_ENDIAN   0

Definition at line 775 of file i386.h.

#define BRANCH_COST   ix86_branch_cost

Definition at line 2564 of file i386.h.

#define BYTES_BIG_ENDIAN   0

Definition at line 779 of file i386.h.

#define CALL_USED_REGISTERS

Value:

/*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7*/  \
{  1, 1, 1, 0, 3, 3, 0, 1, 1,  1,  1,  1,  1,  1,  1,  1, \
/*arg,flags,fpsr,dir,frame*/          \
     1,   1,   1,  1,    1,         \
/*xmm0,xmm1,xmm2,xmm3,xmm4,xmm5,xmm6,xmm7*/     \
     1,   1,   1,   1,   1,  1,    1,   1,      \
/*mmx0,mmx1,mmx2,mmx3,mmx4,mmx5,mmx6,mmx7*/     \
     1,   1,   1,   1,   1,   1,   1,   1,      \
/*  r8,  r9, r10, r11, r12, r13, r14, r15*/     \
     1,   1,   1,   1,   2,   2,   2,   2,      \
/*xmm8,xmm9,xmm10,xmm11,xmm12,xmm13,xmm14,xmm15*/   \
     1,   1,    1,    1,    1,    1,    1,    1}    \

Definition at line 979 of file i386.h.

#define CAN_ELIMINATE ( FROM,
TO   )     ((TO) == STACK_POINTER_REGNUM ? ! frame_pointer_needed : 1)

Definition at line 1839 of file i386.h.

#define CANNOT_CHANGE_MODE_CLASS ( FROM,
TO,
CLASS   )     ix86_cannot_change_mode_class (FROM, TO, CLASS)

Definition at line 1605 of file i386.h.

#define CASE_VECTOR_MODE   (!TARGET_64BIT || flag_pic ? SImode : DImode)

Definition at line 2467 of file i386.h.

#define CC1_CPU_SPEC   "\%{!mtune*: \%{m386:mtune=i386 \%n`-m386' is deprecated. Use `-march=i386' or `-mtune=i386' instead.\n} \%{m486:-mtune=i486 \%n`-m486' is deprecated. Use `-march=i486' or `-mtune=i486' instead.\n} \%{mpentium:-mtune=pentium \%n`-mpentium' is deprecated. Use `-march=pentium' or `-mtune=pentium' instead.\n} \%{mpentiumpro:-mtune=pentiumpro \%n`-mpentiumpro' is deprecated. Use `-march=pentiumpro' or `-mtune=pentiumpro' instead.\n} \%{mcpu=*:-mtune=%* \%n`-mcpu=' is deprecated. Use `-mtune=' or '-march=' instead.\n}} \%<mcpu=* \%{mintel-syntax:-masm=intel \%n`-mintel-syntax' is deprecated. Use `-masm=intel' instead.\n} \%{mno-intel-syntax:-masm=att \%n`-mno-intel-syntax' is deprecated. Use `-masm=att' instead.\n}"

Definition at line 534 of file i386.h.

#define CC1_SPEC   "%(cc1_cpu) "

Definition at line 726 of file i386.h.

#define CC_REG_P ( X   )     (REG_P (X) && CC_REGNO_P (REGNO (X)))

Definition at line 1434 of file i386.h.

#define CC_REGNO_P ( X   )     ((X) == FLAGS_REG || (X) == FPSR_REG)

Definition at line 1435 of file i386.h.

#define CLASS_LIKELY_SPILLED_P ( CLASS   ) 

Value:

(((CLASS) == AREG)              \
   || ((CLASS) == DREG)             \
   || ((CLASS) == CREG)             \
   || ((CLASS) == BREG)             \
   || ((CLASS) == AD_REGS)            \
   || ((CLASS) == SIREG)            \
   || ((CLASS) == DIREG)            \
   || ((CLASS) == FP_TOP_REG)           \
   || ((CLASS) == FP_SECOND_REG))

Definition at line 1592 of file i386.h.

#define CLASS_MAX_NREGS ( CLASS,
MODE   ) 

Value:

(!MAYBE_INTEGER_CLASS_P (CLASS)         \
  ? (COMPLEX_MODE_P (MODE) ? 2 : 1)         \
  : (((((MODE) == XFmode ? 12 : GET_MODE_SIZE (MODE)))      \
      + UNITS_PER_WORD - 1) / UNITS_PER_WORD))

Definition at line 1570 of file i386.h.

#define CLEAR_RATIO

Value:

(optimize_size ? 2 \
         : ix86_cost->move_ratio > 6 ? 6 : ix86_cost->move_ratio)

Definition at line 2499 of file i386.h.

#define CONDITIONAL_REGISTER_USAGE

Definition at line 1016 of file i386.h.

#define CONST_DOUBLE_OK_FOR_LETTER_P ( VALUE,
C   ) 

Value:

((C) == 'G' ? standard_80387_constant_p (VALUE) \
   : 0)

Definition at line 1504 of file i386.h.

#define CONST_OK_FOR_LETTER_P ( VALUE,
C   ) 

Value:

((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31     \
   : (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63     \
   : (C) == 'K' ? (VALUE) >= -128 && (VALUE) <= 127   \
   : (C) == 'L' ? (VALUE) == 0xff || (VALUE) == 0xffff    \
   : (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3      \
   : (C) == 'N' ? (VALUE) >= 0 && (VALUE) <= 255    \
   : 0)

Definition at line 1490 of file i386.h.

#define CONSTANT_ADDRESS_P ( X   )     constant_address_p (X)

Definition at line 1936 of file i386.h.

#define CONSTANT_ALIGNMENT ( EXP,
ALIGN   )     ix86_constant_alignment ((EXP), (ALIGN))

Definition at line 865 of file i386.h.

#define CRT_CALL_STATIC_FUNCTION ( SECTION_OP,
FUNC   ) 

Value:

asm (SECTION_OP "\n\t"        \
  "call " USER_LABEL_PREFIX #FUNC "\n"    \
  TEXT_SECTION_ASM_OP);

Definition at line 2768 of file i386.h.

#define DATA_ALIGNMENT ( TYPE,
ALIGN   )     ix86_data_alignment ((TYPE), (ALIGN))

Definition at line 879 of file i386.h.

#define DBX_REGISTER_NUMBER ( N   )     (TARGET_64BIT ? dbx64_register_map[(N)] : dbx_register_map[(N)])

Definition at line 2677 of file i386.h.

#define DEFAULT_SIGNED_CHAR   1

Definition at line 2470 of file i386.h.

#define DLL_IMPORT_EXPORT_PREFIX   '#'

Definition at line 2966 of file i386.h.

#define DOUBLE_TYPE_SIZE   64

Definition at line 763 of file i386.h.

#define DWARF_FRAME_REGISTERS   17

Definition at line 939 of file i386.h.

#define DWARF_FRAME_RETURN_COLUMN   (TARGET_64BIT ? 16 : 8)

Definition at line 2695 of file i386.h.

#define EH_RETURN_DATA_REGNO ( N   )     ((N) < 2 ? (N) : INVALID_REGNUM)

Definition at line 2701 of file i386.h.

#define EH_RETURN_STACKADJ_RTX   gen_rtx_REG (Pmode, 2)

Definition at line 2702 of file i386.h.

#define ELIMINABLE_REGS

Value:

{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM},   \
 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},  \
 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},   \
 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}  \

Definition at line 1828 of file i386.h.

#define EMIT_MODE_SET ( ENTITY,
MODE,
HARD_REGS_LIVE   ) 

Value:

((MODE) != I387_CW_ANY && (MODE) != I387_CW_UNINITIALIZED   \
   ? emit_i387_cw_initialization (assign_386_stack_local (HImode, 1), \
          assign_386_stack_local (HImode, 2),   \
          MODE), 0        \
   : 0)

Definition at line 2949 of file i386.h.

#define EMPTY_FIELD_BOUNDARY   BITS_PER_WORD

Definition at line 819 of file i386.h.

#define EXIT_IGNORE_STACK   1

Definition at line 1792 of file i386.h.

#define EXPAND_BUILTIN_VA_START ( VALIST,
NEXTARG   )     ix86_va_start (VALIST, NEXTARG)

Definition at line 1769 of file i386.h.

#define EXTRA_CONSTRAINT ( VALUE,
D   ) 

Value:

((D) == 'e' ? x86_64_immediate_operand (VALUE, VOIDmode)    \
   : (D) == 'Z' ? x86_64_zext_immediate_operand (VALUE, VOIDmode) \
   : (D) == 'C' ? standard_sse_constant_p (VALUE)     \
   : 0)

Definition at line 1520 of file i386.h.

#define EXTRA_SPECS

Value:

{ "cc1_cpu",  CC1_CPU_SPEC },           \
  SUBTARGET_EXTRA_SPECS

Definition at line 743 of file i386.h.

#define FASTCALL_PREFIX   '@'

Definition at line 2968 of file i386.h.

Referenced by gen_stdcall_or_fastcall_suffix(), i386_nlm_encode_section_info(), and i386_pe_output_labelref().

#define FIND_BASE_TERM ( X   )     ix86_find_base_term (X)

Definition at line 1968 of file i386.h.

#define FIRST_FLOAT_REG   8

Definition at line 1166 of file i386.h.

#define FIRST_MMX_REG   (LAST_SSE_REG + 1)

Definition at line 1175 of file i386.h.

#define FIRST_PARM_OFFSET ( FNDECL   )     0

Definition at line 1658 of file i386.h.

#define FIRST_PSEUDO_REGISTER   53

Definition at line 934 of file i386.h.

#define FIRST_REX_INT_REG   (LAST_MMX_REG + 1)

Definition at line 1178 of file i386.h.

#define FIRST_REX_SSE_REG   (LAST_REX_INT_REG + 1)

Definition at line 1181 of file i386.h.

#define FIRST_SSE_REG   (FRAME_POINTER_REGNUM + 1)

Definition at line 1172 of file i386.h.

#define FIRST_STACK_REG   FIRST_FLOAT_REG

Definition at line 1169 of file i386.h.

#define FIXED_REGISTERS

Value:

/*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7*/  \
{  0, 0, 0, 0, 0, 0, 0, 1, 0,  0,  0,  0,  0,  0,  0,  0, \
/*arg,flags,fpsr,dir,frame*/          \
    1,    1,   1,  1,    1,         \
/*xmm0,xmm1,xmm2,xmm3,xmm4,xmm5,xmm6,xmm7*/     \
     0,   0,   0,   0,   0,   0,   0,   0,      \
/*mmx0,mmx1,mmx2,mmx3,mmx4,mmx5,mmx6,mmx7*/     \
     0,   0,   0,   0,   0,   0,   0,   0,      \
/*  r8,  r9, r10, r11, r12, r13, r14, r15*/     \
     2,   2,   2,   2,   2,   2,   2,   2,      \
/*xmm8,xmm9,xmm10,xmm11,xmm12,xmm13,xmm14,xmm15*/   \
     2,   2,    2,    2,    2,    2,    2,    2}

Definition at line 951 of file i386.h.

#define FLOAT_CLASS_P ( CLASS   )     reg_class_subset_p ((CLASS), FLOAT_REGS)

Definition at line 1304 of file i386.h.

#define FLOAT_TYPE_SIZE   32

Definition at line 761 of file i386.h.

#define FORCE_PREFERRED_STACK_BOUNDARY_IN_MAIN   (ix86_preferred_stack_boundary > STACK_BOUNDARY && !TARGET_64BIT)

Definition at line 808 of file i386.h.

#define FP_REG_P ( X   )     (REG_P (X) && FP_REGNO_P (REGNO (X)))

Definition at line 1403 of file i386.h.

#define FP_REGNO_P ( N   )     ((N) >= FIRST_STACK_REG && (N) <= LAST_STACK_REG)

Definition at line 1404 of file i386.h.

#define FRAME_GROWS_DOWNWARD

Definition at line 1618 of file i386.h.

#define FRAME_POINTER_REGNUM   20

Definition at line 1163 of file i386.h.

#define FRAME_POINTER_REQUIRED   ix86_frame_pointer_required ()

Definition at line 1188 of file i386.h.

#define FUNCTION_ARG ( CUM,
MODE,
TYPE,
NAMED   )     function_arg (&(CUM), (MODE), (TYPE), (NAMED))

Definition at line 1765 of file i386.h.

#define FUNCTION_ARG_ADVANCE ( CUM,
MODE,
TYPE,
NAMED   )     function_arg_advance (&(CUM), (MODE), (TYPE), (NAMED))

Definition at line 1749 of file i386.h.

#define FUNCTION_ARG_BOUNDARY ( MODE,
TYPE   )     ix86_function_arg_boundary ((MODE), (TYPE))

Definition at line 897 of file i386.h.

#define FUNCTION_ARG_REGNO_P ( N   )     ix86_function_arg_regno_p (N)

Definition at line 1714 of file i386.h.

#define FUNCTION_BOUNDARY   8

Definition at line 812 of file i386.h.

#define FUNCTION_MODE   QImode

Definition at line 2536 of file i386.h.

#define FUNCTION_PROFILER ( FILE,
LABELNO   )     x86_function_profiler (FILE, LABELNO)

Definition at line 1778 of file i386.h.

#define FUNCTION_VALUE ( VALTYPE,
FUNC   )     ix86_function_value (VALTYPE)

Definition at line 1695 of file i386.h.

#define FUNCTION_VALUE_REGNO_P ( N   )     ix86_function_value_regno_p (N)

Definition at line 1698 of file i386.h.

#define GENERAL_REG_P ( X   )     (REG_P (X) && GENERAL_REGNO_P (REGNO (X)))

Definition at line 1392 of file i386.h.

#define GENERAL_REGNO_P ( N   )     ((N) < 8 || REX_INT_REGNO_P (N))

Definition at line 1389 of file i386.h.

#define GO_IF_LEGITIMATE_ADDRESS ( MODE,
X,
ADDR   ) 

Value:

do {                  \
  if (legitimate_address_p ((MODE), (X), 0))        \
    goto ADDR;                \
} while (0)

Definition at line 1951 of file i386.h.

#define GO_IF_MODE_DEPENDENT_ADDRESS ( ADDR,
LABEL   ) 

Value:

do {              \
 if (GET_CODE (ADDR) == POST_INC      \
     || GET_CODE (ADDR) == POST_DEC)      \
   goto LABEL;            \
} while (0)

Definition at line 2015 of file i386.h.

#define GOT_SYMBOL_NAME   "_GLOBAL_OFFSET_TABLE_"

Definition at line 1223 of file i386.h.

#define HARD_FRAME_POINTER_REGNUM   6

Definition at line 1160 of file i386.h.

#define HARD_REGNO_CALLER_SAVE_MODE ( REGNO,
NREGS,
MODE   ) 

Value:

(CC_REGNO_P (REGNO) ? VOIDmode          \
   : (MODE) == VOIDmode && (NREGS) != 1 ? VOIDmode      \
   : (MODE) == VOIDmode ? choose_hard_reg_mode ((REGNO), (NREGS), false)\
   : (MODE) == HImode && !TARGET_PARTIAL_REG_STALL ? SImode   \
   : (MODE) == QImode && (REGNO) >= 4 && !TARGET_64BIT ? SImode   \
   : (MODE))

Definition at line 1142 of file i386.h.

#define HARD_REGNO_MODE_OK ( REGNO,
MODE   )     ix86_hard_regno_mode_ok ((REGNO), (MODE))

Definition at line 1123 of file i386.h.

#define HARD_REGNO_NREGS ( REGNO,
MODE   ) 

Value:

(FP_REGNO_P (REGNO) || SSE_REGNO_P (REGNO) || MMX_REGNO_P (REGNO) \
   ? (COMPLEX_MODE_P (MODE) ? 2 : 1)          \
   : ((MODE) == XFmode              \
      ? (TARGET_64BIT ? 2 : 3)            \
      : (MODE) == XCmode            \
      ? (TARGET_64BIT ? 4 : 6)            \
      : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))

Definition at line 1075 of file i386.h.

#define HARD_REGNO_RENAME_OK ( SRC,
TARGET   )     ((SRC) < FIRST_STACK_REG || (SRC) > LAST_STACK_REG)

Definition at line 2962 of file i386.h.

#define HAS_LONG_COND_BRANCH   1

Definition at line 217 of file i386.h.

Referenced by fix_edges_for_rarely_executed_code().

#define HAS_LONG_UNCOND_BRANCH   1

Definition at line 218 of file i386.h.

Referenced by fix_edges_for_rarely_executed_code().

#define HI_REGISTER_NAMES

Value:

{"ax","dx","cx","bx","si","di","bp","sp",       \
 "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)",    \
 "argp", "flags", "fpsr", "dirflag", "frame",       \
 "xmm0","xmm1","xmm2","xmm3","xmm4","xmm5","xmm6","xmm7",   \
 "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7" ,   \
 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",      \
 "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15"}

Definition at line 2640 of file i386.h.

#define INCOMING_FRAME_SP_OFFSET   UNITS_PER_WORD

Definition at line 2698 of file i386.h.

#define INCOMING_RETURN_ADDR_RTX   gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM))

Definition at line 2685 of file i386.h.

#define INDEX_REG_CLASS   INDEX_REGS

Definition at line 1439 of file i386.h.

#define INIT_CUMULATIVE_ARGS ( CUM,
FNTYPE,
LIBNAME,
FNDECL,
N_NAMED_ARGS   )     init_cumulative_args (&(CUM), (FNTYPE), (LIBNAME), (FNDECL))

Definition at line 1742 of file i386.h.

#define INITIAL_ELIMINATION_OFFSET ( FROM,
TO,
OFFSET   )     ((OFFSET) = ix86_initial_elimination_offset ((FROM), (TO)))

Definition at line 1845 of file i386.h.

#define INITIALIZE_TRAMPOLINE ( TRAMP,
FNADDR,
CXT   )     x86_initialize_trampoline ((TRAMP), (FNADDR), (CXT))

Definition at line 1812 of file i386.h.

#define INT_TYPE_SIZE   32

Definition at line 760 of file i386.h.

#define INTEGER_CLASS_P ( CLASS   )     reg_class_subset_p ((CLASS), GENERAL_REGS)

Definition at line 1302 of file i386.h.

#define IS_STACK_MODE ( MODE   )     ((MODE) == DFmode || (MODE) == SFmode || (MODE) == XFmode) \

Definition at line 915 of file i386.h.

#define ix86_optimize_mode_switching   (cfun->machine->optimize_mode_switching)

Definition at line 2987 of file i386.h.

#define ix86_save_varrargs_registers   (cfun->machine->save_varrargs_registers)

Definition at line 2986 of file i386.h.

#define ix86_stack_locals   (cfun->machine->stack_locals)

Definition at line 2985 of file i386.h.

#define JUMP_TABLES_IN_TEXT_SECTION   (!TARGET_64BIT && flag_pic && !HAVE_AS_GOTOFF_IN_DATA)

Definition at line 2755 of file i386.h.

#define KEEP_AGGREGATE_RETURN_POINTER   0

Definition at line 1249 of file i386.h.

Referenced by ix86_return_pops_args().

#define LAST_MMX_REG   (FIRST_MMX_REG + 7)

Definition at line 1176 of file i386.h.

#define LAST_REX_INT_REG   (FIRST_REX_INT_REG + 7)

Definition at line 1179 of file i386.h.

#define LAST_REX_SSE_REG   (FIRST_REX_SSE_REG + 7)

Definition at line 1182 of file i386.h.

#define LAST_SSE_REG   (FIRST_SSE_REG + 7)

Definition at line 1173 of file i386.h.

#define LAST_STACK_REG   (FIRST_FLOAT_REG + 7)

Definition at line 1170 of file i386.h.

#define LEGITIMATE_CONSTANT_P ( X   )     legitimate_constant_p (X)

Definition at line 1941 of file i386.h.

#define LEGITIMATE_PIC_OPERAND_P ( X   )     legitimate_pic_operand_p (X)

Definition at line 2004 of file i386.h.

#define LEGITIMIZE_ADDRESS ( X,
OLDX,
MODE,
WIN   ) 

Value:

do {                  \
  (X) = legitimize_address ((X), (OLDX), (MODE));     \
  if (memory_address_p ((MODE), (X)))         \
    goto WIN;               \
} while (0)

Definition at line 1991 of file i386.h.

#define LIBCALL_VALUE ( MODE   )     ix86_libcall_value (MODE)

Definition at line 1704 of file i386.h.

#define LIMIT_RELOAD_CLASS ( MODE,
CLASS   ) 

Value:

((MODE) == QImode && !TARGET_64BIT        \
   && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS   \
       || (CLASS) == LEGACY_REGS || (CLASS) == INDEX_REGS)  \
   ? Q_REGS : (CLASS))

Definition at line 1530 of file i386.h.

#define LOCAL_ALIGNMENT ( TYPE,
ALIGN   )     ix86_local_alignment ((TYPE), (ALIGN))

Definition at line 891 of file i386.h.

#define LONG_DOUBLE_TYPE_SIZE   80

Definition at line 749 of file i386.h.

#define LONG_LONG_TYPE_SIZE   64

Definition at line 764 of file i386.h.

#define LONG_TYPE_SIZE   BITS_PER_WORD

Definition at line 762 of file i386.h.

#define MASK_128BIT_LONG_DOUBLE   0x00080000

Definition at line 131 of file i386.h.

#define MASK_3DNOW   0x00020000

Definition at line 129 of file i386.h.

#define MASK_3DNOW_A   0x00040000

Definition at line 130 of file i386.h.

#define MASK_64BIT   0x00100000

Definition at line 132 of file i386.h.

#define MASK_80387   0x00000001

Definition at line 112 of file i386.h.

#define MASK_ACCUMULATE_OUTGOING_ARGS   0x00001000

Definition at line 124 of file i386.h.

#define MASK_ALIGN_DOUBLE   0x00000004

Definition at line 114 of file i386.h.

#define MASK_FLOAT_RETURNS   0x00000020

Definition at line 117 of file i386.h.

#define MASK_IEEE_FP   0x00000010

Definition at line 116 of file i386.h.

#define MASK_INLINE_ALL_STROPS   0x00000400

Definition at line 122 of file i386.h.

#define MASK_MMX   0x00002000

Definition at line 125 of file i386.h.

#define MASK_MS_BITFIELD_LAYOUT   0x00200000

Definition at line 133 of file i386.h.

#define MASK_NO_ALIGN_STROPS   0x00000200

Definition at line 121 of file i386.h.

#define MASK_NO_FANCY_MATH_387   0x00000040

Definition at line 118 of file i386.h.

#define MASK_NO_PUSH_ARGS   0x00000800

Definition at line 123 of file i386.h.

#define MASK_NO_RED_ZONE   0x04000000

Definition at line 139 of file i386.h.

#define MASK_OMIT_LEAF_FRAME_POINTER   0x080

Definition at line 119 of file i386.h.

#define MASK_RTD   0x00000002

Definition at line 113 of file i386.h.

#define MASK_SSE   0x00004000

Definition at line 126 of file i386.h.

#define MASK_SSE2   0x00008000

Definition at line 127 of file i386.h.

#define MASK_SSE3   0x00010000

Definition at line 128 of file i386.h.

Referenced by ix86_in_large_data_p(), ix86_init_mmx_sse_builtins(), and override_options().

#define MASK_STACK_PROBE   0x00000100

Definition at line 120 of file i386.h.

#define MASK_SVR3_SHLIB   0x00000008

Definition at line 115 of file i386.h.

#define MASK_TLS_DIRECT_SEG_REFS   0x00400000

Definition at line 134 of file i386.h.

#define MAX_BITS_PER_WORD   32

Definition at line 769 of file i386.h.

#define MAX_REGS_PER_ADDRESS   2

Definition at line 1934 of file i386.h.

#define MAYBE_FLOAT_CLASS_P ( CLASS   )     reg_classes_intersect_p ((CLASS), FLOAT_REGS)

Definition at line 1312 of file i386.h.

#define MAYBE_INTEGER_CLASS_P ( CLASS   )     reg_classes_intersect_p ((CLASS), GENERAL_REGS)

Definition at line 1310 of file i386.h.

#define MAYBE_MMX_CLASS_P ( CLASS   )     reg_classes_intersect_p (MMX_REGS, (CLASS))

Definition at line 1316 of file i386.h.

#define MAYBE_SSE_CLASS_P ( CLASS   )     reg_classes_intersect_p (SSE_REGS, (CLASS))

Definition at line 1314 of file i386.h.

#define MCOUNT_NAME   "_mcount"

Definition at line 1780 of file i386.h.

#define MEMORY_MOVE_COST ( MODE,
CLASS,
IN   )     ix86_memory_move_cost ((MODE), (CLASS), (IN))

Definition at line 2558 of file i386.h.

#define MIN_UNITS_PER_WORD   4

Definition at line 791 of file i386.h.

#define MMX_CLASS_P ( CLASS   )     ((CLASS) == MMX_REGS)

Definition at line 1308 of file i386.h.

#define MMX_REG_P ( XOP   )     (REG_P (XOP) && MMX_REGNO_P (REGNO (XOP)))

Definition at line 1423 of file i386.h.

#define MMX_REGNO_P ( N   )     ((N) >= FIRST_MMX_REG && (N) <= LAST_MMX_REG)

Definition at line 1422 of file i386.h.

#define MMX_REGPARM_MAX   (TARGET_64BIT ? 0 : (TARGET_MMX ? 3 : 0))

Definition at line 2462 of file i386.h.

Referenced by init_cumulative_args(), and ix86_function_arg_regno_p().

#define MODE_NEEDED ( ENTITY,
I   ) 

Value:

(GET_CODE (I) == CALL_INSN            \
   || (GET_CODE (I) == INSN && (asm_noperands (PATTERN (I)) >= 0  \
        || GET_CODE (PATTERN (I)) == ASM_INPUT))\
   ? I387_CW_UNINITIALIZED            \
   : recog_memoized (I) < 0           \
   ? I387_CW_ANY              \
   : get_attr_i387_cw (I))

Definition at line 2931 of file i386.h.

#define MODE_PRIORITY_TO_MODE ( ENTITY,
N   )     (N)

Definition at line 2943 of file i386.h.

#define MODES_TIEABLE_P ( MODE1,
MODE2   )     ix86_modes_tieable_p (MODE1, MODE2)

Definition at line 1131 of file i386.h.

#define MOVE_MAX   16

Definition at line 2480 of file i386.h.

#define MOVE_MAX_PIECES   (TARGET_64BIT ? 8 : 4)

Definition at line 2485 of file i386.h.

#define MOVE_RATIO   (optimize_size ? 3 : ix86_cost->move_ratio)

Definition at line 2494 of file i386.h.

#define MS_AGGREGATE_RETURN   0

Definition at line 1246 of file i386.h.

#define N_REG_CLASSES   ((int) LIM_REG_CLASSES)

Definition at line 1300 of file i386.h.

#define NEED_INDICATE_EXEC_STACK   0

Definition at line 1773 of file i386.h.

Referenced by ix86_file_end(), and sparc_file_end().

#define NO_FUNCTION_CSE

Definition at line 2605 of file i386.h.

#define NON_QI_REG_P ( X   )     (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)

Definition at line 1397 of file i386.h.

#define NON_STACK_REG_P ( XOP   )     (REG_P (XOP) && ! STACK_REG_P (XOP))

Definition at line 1430 of file i386.h.

#define NUM_MODES_FOR_MODE_SWITCHING   { I387_CW_ANY }

Definition at line 2918 of file i386.h.

#define OPTIMIZATION_OPTIONS ( LEVEL,
SIZE   )     optimization_options ((LEVEL), (SIZE))

Definition at line 522 of file i386.h.

#define OPTIMIZE_MODE_SWITCHING ( ENTITY   )     ix86_optimize_mode_switching

Definition at line 2908 of file i386.h.

#define OPTION_DEFAULT_SPECS

Value:

{"arch", "%{!march=*:-march=%(VALUE)}"}, \
  {"tune", "%{!mtune=*:%{!mcpu=*:%{!march=*:-mtune=%(VALUE)}}}" }, \
  {"cpu", "%{!mtune=*:%{!mcpu=*:%{!march=*:-mtune=%(VALUE)}}}" }

Definition at line 526 of file i386.h.

#define ORDER_REGS_FOR_LOCAL_ALLOC   x86_order_regs_for_local_alloc ()

Definition at line 1012 of file i386.h.

#define OUTPUT_ADDR_CONST_EXTRA ( FILE,
X,
FAIL   ) 

Value:

do {            \
  if (! output_addr_const_extra (FILE, (X)))  \
    goto FAIL;          \
} while (0);

Definition at line 2787 of file i386.h.

#define OVERRIDE_OPTIONS   override_options ()

Definition at line 515 of file i386.h.

#define PARM_BOUNDARY   BITS_PER_WORD

Definition at line 795 of file i386.h.

#define PCC_BITFIELD_TYPE_MATTERS   1

Definition at line 907 of file i386.h.

#define PIC_OFFSET_TABLE_REGNUM

Value:

(TARGET_64BIT || !flag_pic ? INVALID_REGNUM   \
   : reload_completed ? REGNO (pic_offset_table_rtx)  \
   : REAL_PIC_OFFSET_TABLE_REGNUM)

Definition at line 1218 of file i386.h.

#define Pmode   (TARGET_64BIT ? DImode : SImode)

Definition at line 2531 of file i386.h.

#define PREFERRED_RELOAD_CLASS ( X,
CLASS   )     ix86_preferred_reload_class ((X), (CLASS))

Definition at line 1549 of file i386.h.

#define PREFERRED_STACK_BOUNDARY   ix86_preferred_stack_boundary

Definition at line 802 of file i386.h.

#define PREFETCH_BLOCK   ix86_cost->prefetch_block

Definition at line 2473 of file i386.h.

#define PRINT_OPERAND ( FILE,
X,
CODE   )     print_operand ((FILE), (X), (CODE))

Definition at line 2781 of file i386.h.

#define PRINT_OPERAND_ADDRESS ( FILE,
ADDR   )     print_operand_address ((FILE), (ADDR))

Definition at line 2784 of file i386.h.

#define PRINT_OPERAND_PUNCT_VALID_P ( CODE   )     ((CODE) == '*' || (CODE) == '+' || (CODE) == '&')

Definition at line 2778 of file i386.h.

#define PROFILE_COUNT_REGISTER   "edx"

Definition at line 1782 of file i386.h.

#define PROMOTE_MODE ( MODE,
UNSIGNEDP,
TYPE   ) 

Value:

do {              \
  if (((MODE) == HImode && TARGET_PROMOTE_HI_REGS)  \
      || ((MODE) == QImode && TARGET_PROMOTE_QI_REGS))  \
    (MODE) = SImode;          \
} while (0)

Definition at line 2521 of file i386.h.

#define PUSH_ARGS   (TARGET_PUSH_ARGS && !ACCUMULATE_OUTGOING_ARGS)

Definition at line 1651 of file i386.h.

#define PUSH_ARGS_REVERSED   1

Definition at line 1655 of file i386.h.

#define PUSH_ROUNDING ( BYTES   ) 

Value:

(TARGET_64BIT        \
   ? (((BYTES) + 7) & (-8))  \
   : (((BYTES) + 1) & (-2)))

Definition at line 1635 of file i386.h.

#define Q_CLASS_P ( CLASS   )     reg_class_subset_p ((CLASS), Q_REGS)

Definition at line 1319 of file i386.h.

#define QI_HIGH_REGISTER_NAMES   {"ah", "dh", "ch", "bh", }

Definition at line 2672 of file i386.h.

#define QI_REG_P ( X   )     (REG_P (X) && REGNO (X) < 4)

Definition at line 1386 of file i386.h.

#define QI_REGISTER_NAMES   {"al", "dl", "cl", "bl", "sil", "dil", "bpl", "spl",}

Definition at line 2666 of file i386.h.

#define REAL_PIC_OFFSET_TABLE_REGNUM   3

Definition at line 1216 of file i386.h.

#define RED_ZONE_RESERVE   8

Definition at line 2856 of file i386.h.

#define RED_ZONE_SIZE   128

Definition at line 2854 of file i386.h.

#define REG_ALLOC_ORDER

Value:

{  0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,\
   18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32,  \
   33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,  \
   48, 49, 50, 51, 52 }

Definition at line 1002 of file i386.h.

#define REG_CLASS_CONTENTS

Value:

{     { 0x00,     0x0 },            \
      { 0x01,     0x0 }, { 0x02, 0x0 }, /* AREG, DREG */    \
      { 0x04,     0x0 }, { 0x08, 0x0 }, /* CREG, BREG */    \
      { 0x10,     0x0 }, { 0x20, 0x0 }, /* SIREG, DIREG */    \
      { 0x03,     0x0 },    /* AD_REGS */     \
      { 0x0f,     0x0 },    /* Q_REGS */      \
  { 0x1100f0,  0x1fe0 },    /* NON_Q_REGS */    \
      { 0x7f,  0x1fe0 },    /* INDEX_REGS */    \
  { 0x1100ff,  0x0 },     /* LEGACY_REGS */   \
  { 0x1100ff,  0x1fe0 },    /* GENERAL_REGS */    \
     { 0x100,     0x0 }, { 0x0200, 0x0 },/* FP_TOP_REG, FP_SECOND_REG */\
    { 0xff00,     0x0 },    /* FLOAT_REGS */    \
{ 0x1fe00000,0x1fe000 },    /* SSE_REGS */      \
{ 0xe0000000,    0x1f },    /* MMX_REGS */      \
{ 0x1fe00100,0x1fe000 },    /* FP_TOP_SSE_REG */    \
{ 0x1fe00200,0x1fe000 },    /* FP_SECOND_SSE_REG */   \
{ 0x1fe0ff00,0x1fe000 },    /* FLOAT_SSE_REGS */    \
   { 0x1ffff,  0x1fe0 },    /* FLOAT_INT_REGS */    \
{ 0x1fe100ff,0x1fffe0 },    /* INT_SSE_REGS */    \
{ 0x1fe1ffff,0x1fffe0 },    /* FLOAT_INT_SSE_REGS */  \
{ 0xffffffff,0x1fffff }             \
}

Definition at line 1349 of file i386.h.

#define REG_CLASS_FROM_LETTER ( C   ) 

Value:

((C) == 'r' ? GENERAL_REGS :          \
   (C) == 'R' ? LEGACY_REGS :         \
   (C) == 'q' ? TARGET_64BIT ? GENERAL_REGS : Q_REGS :    \
   (C) == 'Q' ? Q_REGS :          \
   (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387  \
     ? FLOAT_REGS         \
     : NO_REGS) :         \
   (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387  \
     ? FP_TOP_REG         \
     : NO_REGS) :         \
   (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387  \
     ? FP_SECOND_REG        \
     : NO_REGS) :         \
   (C) == 'a' ? AREG :            \
   (C) == 'b' ? BREG :            \
   (C) == 'c' ? CREG :            \
   (C) == 'd' ? DREG :            \
   (C) == 'x' ? TARGET_SSE ? SSE_REGS : NO_REGS :   \
   (C) == 'Y' ? TARGET_SSE2? SSE_REGS : NO_REGS :   \
   (C) == 'y' ? TARGET_MMX ? MMX_REGS : NO_REGS :   \
   (C) == 'A' ? AD_REGS :         \
   (C) == 'D' ? DIREG :           \
   (C) == 'S' ? SIREG :           \
   (C) == 'l' ? INDEX_REGS :          \
   NO_REGS)

Definition at line 1449 of file i386.h.

#define REG_CLASS_NAMES

Value:

{  "NO_REGS",       \
   "AREG", "DREG", "CREG", "BREG",  \
   "SIREG", "DIREG",      \
   "AD_REGS",       \
   "Q_REGS", "NON_Q_REGS",    \
   "INDEX_REGS",      \
   "LEGACY_REGS",     \
   "GENERAL_REGS",      \
   "FP_TOP_REG", "FP_SECOND_REG", \
   "FLOAT_REGS",      \
   "SSE_REGS",        \
   "MMX_REGS",        \
   "FP_TOP_SSE_REGS",     \
   "FP_SECOND_SSE_REGS",    \
   "FLOAT_SSE_REGS",      \
   "FLOAT_INT_REGS",      \
   "INT_SSE_REGS",      \
   "FLOAT_INT_SSE_REGS",    \
   "ALL_REGS" }

Definition at line 1324 of file i386.h.

#define REG_OK_FOR_BASE_NONSTRICT_P ( X   ) 

Value:

(REGNO (X) <= STACK_POINTER_REGNUM          \
   || REGNO (X) == ARG_POINTER_REGNUM         \
   || REGNO (X) == FRAME_POINTER_REGNUM         \
   || (REGNO (X) >= FIRST_REX_INT_REG         \
       && REGNO (X) <= LAST_REX_INT_REG)        \
   || REGNO (X) >= FIRST_PSEUDO_REGISTER)

Definition at line 1902 of file i386.h.

#define REG_OK_FOR_BASE_P ( X   )     REG_OK_FOR_BASE_NONSTRICT_P (X)

Definition at line 1916 of file i386.h.

#define REG_OK_FOR_BASE_STRICT_P ( X   )     REGNO_OK_FOR_BASE_P (REGNO (X))

Definition at line 1912 of file i386.h.

#define REG_OK_FOR_INDEX_NONSTRICT_P ( X   ) 

Value:

(REGNO (X) < STACK_POINTER_REGNUM         \
   || (REGNO (X) >= FIRST_REX_INT_REG         \
       && REGNO (X) <= LAST_REX_INT_REG)        \
   || REGNO (X) >= FIRST_PSEUDO_REGISTER)

Definition at line 1896 of file i386.h.

#define REG_OK_FOR_INDEX_P ( X   )     REG_OK_FOR_INDEX_NONSTRICT_P (X)

Definition at line 1915 of file i386.h.

#define REG_OK_FOR_INDEX_STRICT_P ( X   )     REGNO_OK_FOR_INDEX_P (REGNO (X))

Definition at line 1911 of file i386.h.

#define REG_PARM_STACK_SPACE ( FNDECL   )     0

Definition at line 1669 of file i386.h.

#define REGISTER_MOVE_COST ( MODE,
CLASS1,
CLASS2   )     ix86_register_move_cost ((MODE), (CLASS1), (CLASS2))

Definition at line 2547 of file i386.h.

#define REGISTER_NAMES   HI_REGISTER_NAMES

Definition at line 2649 of file i386.h.

#define REGNO_OK_FOR_BASE_P ( REGNO   ) 

Value:

((REGNO) <= STACK_POINTER_REGNUM          \
   || (REGNO) == ARG_POINTER_REGNUM           \
   || (REGNO) == FRAME_POINTER_REGNUM           \
   || (REGNO >= FIRST_REX_INT_REG         \
       && (REGNO) <= LAST_REX_INT_REG)          \
   || ((unsigned) reg_renumber[(REGNO)] >= FIRST_REX_INT_REG    \
       && (unsigned) reg_renumber[(REGNO)] <= LAST_REX_INT_REG)   \
   || (unsigned) reg_renumber[(REGNO)] <= STACK_POINTER_REGNUM)

Definition at line 1866 of file i386.h.

#define REGNO_OK_FOR_DIREG_P ( REGNO   )     ((REGNO) == 5 || reg_renumber[(REGNO)] == 5)

Definition at line 1878 of file i386.h.

#define REGNO_OK_FOR_INDEX_P ( REGNO   ) 

Value:

((REGNO) < STACK_POINTER_REGNUM           \
   || (REGNO >= FIRST_REX_INT_REG         \
       && (REGNO) <= LAST_REX_INT_REG)          \
   || ((unsigned) reg_renumber[(REGNO)] >= FIRST_REX_INT_REG    \
       && (unsigned) reg_renumber[(REGNO)] <= LAST_REX_INT_REG)   \
   || (unsigned) reg_renumber[(REGNO)] < STACK_POINTER_REGNUM)

Definition at line 1858 of file i386.h.

#define REGNO_OK_FOR_SIREG_P ( REGNO   )     ((REGNO) == 4 || reg_renumber[(REGNO)] == 4)

Definition at line 1876 of file i386.h.

#define REGNO_REG_CLASS ( REGNO   )     (regclass_map[REGNO])

Definition at line 1378 of file i386.h.

#define REGPARM_MAX   (TARGET_64BIT ? 6 : 3)

Definition at line 2458 of file i386.h.

#define RET   return ""

Definition at line 2797 of file i386.h.

#define RETURN_ADDR_RTX ( COUNT,
FRAME   ) 

Value:

((COUNT) == 0                  \
   ? gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, -UNITS_PER_WORD)) \
   : gen_rtx_MEM (Pmode, plus_constant (FRAME, UNITS_PER_WORD)))

Definition at line 2689 of file i386.h.

#define RETURN_IN_MEMORY ( TYPE   )     ix86_return_in_memory (TYPE)

Definition at line 1242 of file i386.h.

#define RETURN_POPS_ARGS ( FUNDECL,
FUNTYPE,
SIZE   )     ix86_return_pops_args ((FUNDECL), (FUNTYPE), (SIZE))

Definition at line 1688 of file i386.h.

#define REVERSE_CONDITION ( CODE,
MODE   )     ix86_reverse_condition ((CODE), (MODE))

Definition at line 2625 of file i386.h.

#define REVERSIBLE_CC_MODE ( MODE   )     1

Definition at line 2621 of file i386.h.

#define REWRITE_ADDRESS ( X   )     rewrite_address (X)

Definition at line 1998 of file i386.h.

#define REX_INT_REG_P ( X   )     (REG_P (X) && REX_INT_REGNO_P (REGNO (X)))

Definition at line 1401 of file i386.h.

#define REX_INT_REGNO_P ( N   )     ((N) >= FIRST_REX_INT_REG && (N) <= LAST_REX_INT_REG)

Definition at line 1400 of file i386.h.

#define REX_SSE_REGNO_P ( N   )     ((N) >= FIRST_REX_SSE_REG && (N) <= LAST_REX_SSE_REG)

Definition at line 1412 of file i386.h.

Referenced by extended_reg_mentioned_1().

#define SECONDARY_MEMORY_NEEDED ( CLASS1,
CLASS2,
MODE   )     ix86_secondary_memory_needed ((CLASS1), (CLASS2), (MODE), 1)

Definition at line 1554 of file i386.h.

#define SECONDARY_OUTPUT_RELOAD_CLASS ( CLASS,
MODE,
OUT   ) 

Value:

(((CLASS) == GENERAL_REGS || (CLASS) == LEGACY_REGS     \
    || (CLASS) == INDEX_REGS) && !TARGET_64BIT && (MODE) == QImode  \
   ? Q_REGS : NO_REGS)

Definition at line 1561 of file i386.h.

#define SELECT_CC_MODE ( OP,
X,
Y   )     ix86_cc_mode ((OP), (X), (Y))

Definition at line 2616 of file i386.h.

 
#define SETUP_FRAME_ADDRESSES (  )     ix86_setup_frame_addresses ()

Definition at line 1197 of file i386.h.

#define SHORT_TYPE_SIZE   16

Definition at line 759 of file i386.h.

#define SIMULTANEOUS_PREFETCHES   ix86_cost->simultaneous_prefetches

Definition at line 2476 of file i386.h.

#define SLOW_BYTE_ACCESS   0

Definition at line 2580 of file i386.h.

#define SLOW_SHORT_ACCESS   0

Definition at line 2583 of file i386.h.

#define SMALL_REGISTER_CLASSES   1

Definition at line 1384 of file i386.h.

#define SSE_CLASS_P ( CLASS   )     ((CLASS) == SSE_REGS)

Definition at line 1306 of file i386.h.

#define SSE_FLOAT_MODE_P ( MODE   )     ((TARGET_SSE && (MODE) == SFmode) || (TARGET_SSE2 && (MODE) == DFmode))

Definition at line 1419 of file i386.h.

#define SSE_REG_MODE_P ( MODE   ) 

Value:

((MODE) == TImode || (MODE) == V16QImode || (MODE) == TFmode    \
   || (MODE) == V8HImode || (MODE) == V2DFmode || (MODE) == V2DImode  \
   || (MODE) == V4SFmode || (MODE) == V4SImode)

Definition at line 1116 of file i386.h.

#define SSE_REG_P ( N   )     (REG_P (N) && SSE_REGNO_P (REGNO (N)))

Definition at line 1417 of file i386.h.

#define SSE_REGNO ( N   )     ((N) < 8 ? FIRST_SSE_REG + (N) : FIRST_REX_SSE_REG + (N) - 8)

Definition at line 1415 of file i386.h.

#define SSE_REGNO_P ( N   ) 

Value:

(((N) >= FIRST_SSE_REG && (N) <= LAST_SSE_REG) \
   || ((N) >= FIRST_REX_SSE_REG && (N) <= LAST_REX_SSE_REG))

Definition at line 1408 of file i386.h.

#define SSE_REGPARM_MAX   (TARGET_64BIT ? 8 : (TARGET_SSE ? 3 : 0))

Definition at line 2460 of file i386.h.

#define STACK_BOUNDARY   BITS_PER_WORD

Definition at line 798 of file i386.h.

#define STACK_GROWS_DOWNWARD

Definition at line 1612 of file i386.h.

#define STACK_POINTER_REGNUM   7

Definition at line 1157 of file i386.h.

#define STACK_REG_P ( XOP   ) 

Value:

(REG_P (XOP) &&           \
   REGNO (XOP) >= FIRST_STACK_REG &&  \
   REGNO (XOP) <= LAST_STACK_REG)

Definition at line 1425 of file i386.h.

#define STACK_REGS

Definition at line 914 of file i386.h.

#define STACK_TOP_P ( XOP   )     (REG_P (XOP) && REGNO (XOP) == FIRST_STACK_REG)

Definition at line 1432 of file i386.h.

#define STARTING_FRAME_OFFSET   0

Definition at line 1624 of file i386.h.

#define STATIC_CHAIN_REGNUM   (TARGET_64BIT ? FIRST_REX_INT_REG + 10 - 8 : 2)

Definition at line 1205 of file i386.h.

#define STRICT_ALIGNMENT   0

Definition at line 902 of file i386.h.

#define SUBTARGET_FRAME_POINTER_REQUIRED   0

Definition at line 1193 of file i386.h.

#define SUBTARGET_OPTIONS

Definition at line 519 of file i386.h.

#define SUBTARGET_SWITCHES

Definition at line 518 of file i386.h.

#define SYMBOLIC_CONST ( X   ) 

Value:

(GET_CODE (X) == SYMBOL_REF           \
   || GET_CODE (X) == LABEL_REF           \
   || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))

Definition at line 2006 of file i386.h.

#define TARGET_128BIT_LONG_DOUBLE   (target_flags & MASK_128BIT_LONG_DOUBLE)

Definition at line 178 of file i386.h.

#define TARGET_386   (ix86_tune == PROCESSOR_I386)

Definition at line 223 of file i386.h.

#define TARGET_3DNOW   ((target_flags & MASK_3DNOW) != 0)

Definition at line 323 of file i386.h.

#define TARGET_3DNOW_A   ((target_flags & MASK_3DNOW_A) != 0)

Definition at line 324 of file i386.h.

#define TARGET_486   (ix86_tune == PROCESSOR_I486)

Definition at line 224 of file i386.h.

#define TARGET_64BIT   0

Definition at line 212 of file i386.h.

#define TARGET_64BIT_DEFAULT   0

Definition at line 444 of file i386.h.

#define TARGET_80387   (target_flags & MASK_80387)

Definition at line 142 of file i386.h.

#define TARGET_96_ROUND_53_LONG_DOUBLE   0

Definition at line 462 of file i386.h.

#define TARGET_ACCUMULATE_OUTGOING_ARGS   (target_flags & MASK_ACCUMULATE_OUTGOING_ARGS)

Definition at line 158 of file i386.h.

#define TARGET_ADD_ESP_4   (x86_add_esp_4 & TUNEMASK)

Definition at line 285 of file i386.h.

#define TARGET_ADD_ESP_8   (x86_add_esp_8 & TUNEMASK)

Definition at line 286 of file i386.h.

#define TARGET_ALIGN_DOUBLE   (target_flags & MASK_ALIGN_DOUBLE)

Definition at line 152 of file i386.h.

#define TARGET_ALIGN_STRINGOPS   (!(target_flags & MASK_NO_ALIGN_STROPS))

Definition at line 311 of file i386.h.

#define TARGET_ASM_FILE_END   ix86_file_end

Definition at line 1772 of file i386.h.

#define TARGET_ATHLON   (ix86_tune == PROCESSOR_ATHLON)

Definition at line 228 of file i386.h.

#define TARGET_ATHLON_K8   (TARGET_K8 || TARGET_ATHLON)

Definition at line 231 of file i386.h.

Referenced by ix86_reorg().

#define TARGET_BRANCH_PREDICTION_HINTS   (x86_branch_hints & TUNEMASK)

Definition at line 266 of file i386.h.

#define TARGET_CMOVE   ((x86_cmove & (1 << ix86_arch)) || TARGET_SSE)

Definition at line 264 of file i386.h.

 
#define TARGET_CPU_CPP_BUILTINS (  ) 

Definition at line 554 of file i386.h.

#define TARGET_CPU_DEFAULT   0

Definition at line 107 of file i386.h.

#define TARGET_CPU_DEFAULT_athlon   11

Definition at line 712 of file i386.h.

#define TARGET_CPU_DEFAULT_athlon_sse   12

Definition at line 713 of file i386.h.

#define TARGET_CPU_DEFAULT_i386   0

Definition at line 701 of file i386.h.

#define TARGET_CPU_DEFAULT_i486   1

Definition at line 702 of file i386.h.

#define TARGET_CPU_DEFAULT_k6   8

Definition at line 709 of file i386.h.

#define TARGET_CPU_DEFAULT_k6_2   9

Definition at line 710 of file i386.h.

#define TARGET_CPU_DEFAULT_k6_3   10

Definition at line 711 of file i386.h.

#define TARGET_CPU_DEFAULT_k8   13

Definition at line 714 of file i386.h.

#define TARGET_CPU_DEFAULT_NAMES

Value:

{"i386", "i486", "pentium", "pentium-mmx",\
          "pentiumpro", "pentium2", "pentium3", \
          "pentium4", "k6", "k6-2", "k6-3",\
          "athlon", "athlon-4", "k8", \
          "pentium-m", "prescott", "nocona"}

Definition at line 719 of file i386.h.

#define TARGET_CPU_DEFAULT_nocona   16

Definition at line 717 of file i386.h.

#define TARGET_CPU_DEFAULT_pentium   2

Definition at line 703 of file i386.h.

#define TARGET_CPU_DEFAULT_pentium2   5

Definition at line 706 of file i386.h.

#define TARGET_CPU_DEFAULT_pentium3   6

Definition at line 707 of file i386.h.

#define TARGET_CPU_DEFAULT_pentium4   7

Definition at line 708 of file i386.h.

#define TARGET_CPU_DEFAULT_pentium_m   14

Definition at line 715 of file i386.h.

#define TARGET_CPU_DEFAULT_pentium_mmx   3

Definition at line 704 of file i386.h.

#define TARGET_CPU_DEFAULT_pentiumpro   4

Definition at line 705 of file i386.h.

#define TARGET_CPU_DEFAULT_prescott   15

Definition at line 716 of file i386.h.

#define TARGET_DEBUG_ADDR   (ix86_debug_addr_string != 0)

Definition at line 192 of file i386.h.

#define TARGET_DEBUG_ARG   (ix86_debug_arg_string != 0)

Definition at line 195 of file i386.h.

#define TARGET_DECOMPOSE_LEA   (x86_decompose_lea & TUNEMASK)

Definition at line 299 of file i386.h.

#define TARGET_DEEP_BRANCH_PREDICTION   (x86_deep_branch & TUNEMASK)

Definition at line 265 of file i386.h.

#define TARGET_DEFAULT   0

Definition at line 453 of file i386.h.

#define TARGET_DOUBLE_WITH_ADD   (x86_double_with_add & TUNEMASK)

Definition at line 267 of file i386.h.

#define TARGET_EPILOGUE_USING_MOVE   (x86_epilogue_using_move & TUNEMASK)

Definition at line 298 of file i386.h.

#define TARGET_FAST_PREFIX   (x86_fast_prefix & TUNEMASK)

Definition at line 279 of file i386.h.

#define TARGET_FLOAT_RETURNS_IN_80387   (target_flags & MASK_FLOAT_RETURNS)

Definition at line 173 of file i386.h.

#define TARGET_FLT_EVAL_METHOD   (TARGET_MIX_SSE_I387 ? -1 : TARGET_SSE_MATH ? 0 : 2)

Definition at line 756 of file i386.h.

#define TARGET_FOUR_JUMP_LIMIT   (x86_four_jump_limit & TUNEMASK)

Definition at line 305 of file i386.h.

Referenced by ix86_reorg().

#define TARGET_GNU_TLS   (ix86_tls_dialect == TLS_DIALECT_GNU)

Definition at line 330 of file i386.h.

#define TARGET_HIMODE_MATH   (x86_himode_math & TUNEMASK)

Definition at line 282 of file i386.h.

#define TARGET_IEEE_FP   (target_flags & MASK_IEEE_FP)

Definition at line 168 of file i386.h.

#define TARGET_INLINE_ALL_STRINGOPS   (target_flags & MASK_INLINE_ALL_STROPS)

Definition at line 312 of file i386.h.

#define TARGET_INTEGER_DFMODE_MOVES   (x86_integer_DFmode_moves & TUNEMASK)

Definition at line 289 of file i386.h.

#define TARGET_INTER_UNIT_MOVES   (x86_inter_unit_moves & TUNEMASK)

Definition at line 304 of file i386.h.

Referenced by ix86_secondary_memory_needed().

#define TARGET_K6   (ix86_tune == PROCESSOR_K6)

Definition at line 227 of file i386.h.

#define TARGET_K8   (ix86_tune == PROCESSOR_K8)

Definition at line 230 of file i386.h.

#define TARGET_MACHO   0

Definition at line 458 of file i386.h.

#define TARGET_MEMORY_MISMATCH_STALL   (x86_memory_mismatch_stall & TUNEMASK)

Definition at line 296 of file i386.h.

#define TARGET_MIX_SSE_I387

Value:

((ix86_fpmath & FPMATH_SSE) \
           && (ix86_fpmath & FPMATH_387))

Definition at line 320 of file i386.h.

#define TARGET_MMX   ((target_flags & MASK_MMX) != 0)

Definition at line 322 of file i386.h.

#define TARGET_MOVX   (x86_movx & TUNEMASK)

Definition at line 269 of file i386.h.

#define TARGET_NO_FANCY_MATH_387   (target_flags & MASK_NO_FANCY_MATH_387)

Definition at line 182 of file i386.h.

#define TARGET_NOCONA   (ix86_tune == PROCESSOR_NOCONA)

Definition at line 232 of file i386.h.

#define TARGET_OMIT_LEAF_FRAME_POINTER   (target_flags & MASK_OMIT_LEAF_FRAME_POINTER)

Definition at line 188 of file i386.h.

#define TARGET_OPTIONS

Definition at line 473 of file i386.h.

#define TARGET_PARTIAL_REG_DEPENDENCY   (x86_partial_reg_dependency & TUNEMASK)

Definition at line 290 of file i386.h.

#define TARGET_PARTIAL_REG_STALL   (x86_partial_reg_stall & TUNEMASK)

Definition at line 270 of file i386.h.

#define TARGET_PENTIUM   (ix86_tune == PROCESSOR_PENTIUM)

Definition at line 225 of file i386.h.

#define TARGET_PENTIUM4   (ix86_tune == PROCESSOR_PENTIUM4)

Definition at line 229 of file i386.h.

#define TARGET_PENTIUMPRO   (ix86_tune == PROCESSOR_PENTIUMPRO)

Definition at line 226 of file i386.h.

#define TARGET_PREFETCH_SSE   (x86_prefetch_sse)

Definition at line 300 of file i386.h.

#define TARGET_PROLOGUE_USING_MOVE   (x86_prologue_using_move & TUNEMASK)

Definition at line 297 of file i386.h.

#define TARGET_PROMOTE_HI_REGS   (x86_promote_hi_regs & TUNEMASK)

Definition at line 284 of file i386.h.

#define TARGET_PROMOTE_QI_REGS   (x86_promote_qi_regs & TUNEMASK)

Definition at line 283 of file i386.h.

#define TARGET_PROMOTE_QImode   (x86_promote_QImode & TUNEMASK)

Definition at line 278 of file i386.h.

#define TARGET_PTRMEMFUNC_VBIT_LOCATION   ptrmemfunc_vbit_in_pfn

Definition at line 815 of file i386.h.

#define TARGET_PUSH_ARGS   (!(target_flags & MASK_NO_PUSH_ARGS))

Definition at line 155 of file i386.h.

#define TARGET_PUSH_MEMORY   (x86_push_memory & TUNEMASK)

Definition at line 258 of file i386.h.

#define TARGET_QIMODE_MATH   (x86_qimode_math & TUNEMASK)

Definition at line 281 of file i386.h.

#define TARGET_READ_MODIFY   (x86_read_modify & TUNEMASK)

Definition at line 277 of file i386.h.

#define TARGET_READ_MODIFY_WRITE   (x86_read_modify_write & TUNEMASK)

Definition at line 276 of file i386.h.

#define TARGET_RED_ZONE   (!(target_flags & MASK_NO_RED_ZONE))

Definition at line 326 of file i386.h.

#define TARGET_REP_MOVL_OPTIMAL   (x86_rep_movl_optimal & TUNEMASK)

Definition at line 303 of file i386.h.

Referenced by ix86_expand_clrmem(), and ix86_expand_movmem().

#define TARGET_RTD   (target_flags & MASK_RTD)

Definition at line 147 of file i386.h.

#define TARGET_SCHEDULE   (x86_schedule & TUNEMASK)

Definition at line 306 of file i386.h.

Referenced by override_options().

#define TARGET_SHIFT1   (x86_shift1 & TUNEMASK)

Definition at line 301 of file i386.h.

#define TARGET_SINGLE_STRINGOP   (x86_single_stringop & TUNEMASK)

Definition at line 280 of file i386.h.

#define TARGET_SPLIT_LONG_MOVES   (x86_split_long_moves & TUNEMASK)

Definition at line 275 of file i386.h.

#define TARGET_SSE   ((target_flags & MASK_SSE) != 0)

Definition at line 316 of file i386.h.

#define TARGET_SSE2   ((target_flags & MASK_SSE2) != 0)

Definition at line 317 of file i386.h.

#define TARGET_SSE3   ((target_flags & MASK_SSE3) != 0)

Definition at line 318 of file i386.h.

Referenced by override_options().

#define TARGET_SSE_LOAD0_BY_PXOR   (x86_sse_load0_by_pxor & TUNEMASK)

Definition at line 295 of file i386.h.

#define TARGET_SSE_MATH   ((ix86_fpmath & FPMATH_SSE) != 0)

Definition at line 319 of file i386.h.

#define TARGET_SSE_PARTIAL_REG_DEPENDENCY   (x86_sse_partial_reg_dependency & TUNEMASK)

Definition at line 291 of file i386.h.

Referenced by ix86_expand_vector_move_misalign().

#define TARGET_SSE_SPLIT_REGS   (x86_sse_split_regs & TUNEMASK)

Definition at line 293 of file i386.h.

Referenced by ix86_expand_vector_move_misalign().

#define TARGET_SSE_TYPELESS_STORES   (x86_sse_typeless_stores & TUNEMASK)

Definition at line 294 of file i386.h.

Referenced by ix86_expand_vector_move_misalign().

#define TARGET_STACK_PROBE   (target_flags & MASK_STACK_PROBE)

Definition at line 309 of file i386.h.

#define TARGET_SUB_ESP_4   (x86_sub_esp_4 & TUNEMASK)

Definition at line 287 of file i386.h.

#define TARGET_SUB_ESP_8   (x86_sub_esp_8 & TUNEMASK)

Definition at line 288 of file i386.h.

#define TARGET_SUN_TLS   (ix86_tls_dialect == TLS_DIALECT_SUN)

Definition at line 331 of file i386.h.

#define TARGET_SVR3_SHLIB   (target_flags & MASK_SVR3_SHLIB)

Definition at line 163 of file i386.h.

#define TARGET_SWITCHES

Definition at line 338 of file i386.h.

#define TARGET_TLS_DIRECT_SEG_REFS   (target_flags & MASK_TLS_DIRECT_SEG_REFS)

Definition at line 221 of file i386.h.

#define TARGET_TLS_DIRECT_SEG_REFS_DEFAULT   0

Definition at line 447 of file i386.h.

#define TARGET_UNROLL_STRLEN   (x86_unroll_strlen & TUNEMASK)

Definition at line 261 of file i386.h.

#define TARGET_USE_BIT_TEST   (x86_use_bit_test & TUNEMASK)

Definition at line 260 of file i386.h.

#define TARGET_USE_BT   (x86_use_bt & TUNEMASK)

Definition at line 307 of file i386.h.

#define TARGET_USE_CLTD   (x86_use_cltd & TUNEMASK)

Definition at line 274 of file i386.h.

#define TARGET_USE_FANCY_MATH_387   (! TARGET_NO_FANCY_MATH_387)

Definition at line 185 of file i386.h.

#define TARGET_USE_FFREEP   (x86_use_ffreep & TUNEMASK)

Definition at line 302 of file i386.h.

Referenced by output_387_ffreep(), output_387_reg_move(), and output_fp_compare().

#define TARGET_USE_FIOP   (x86_use_fiop & TUNEMASK)

Definition at line 272 of file i386.h.

#define TARGET_USE_LEAVE   (x86_use_leave & TUNEMASK)

Definition at line 257 of file i386.h.

#define TARGET_USE_LOOP   (x86_use_loop & TUNEMASK)

Definition at line 271 of file i386.h.

#define TARGET_USE_MOV0   (x86_use_mov0 & TUNEMASK)

Definition at line 273 of file i386.h.

#define TARGET_USE_MS_BITFIELD_LAYOUT   (target_flags & MASK_MS_BITFIELD_LAYOUT)

Definition at line 328 of file i386.h.

#define TARGET_USE_SAHF   ((x86_use_sahf & TUNEMASK) && !TARGET_64BIT)

Definition at line 268 of file i386.h.

#define TARGET_ZERO_EXTEND_WITH_AND   (x86_zero_extend_with_and & TUNEMASK)

Definition at line 259 of file i386.h.

#define TRAMPOLINE_SIZE   (TARGET_64BIT ? 23 : 10)

Definition at line 1806 of file i386.h.

#define TRULY_NOOP_TRUNCATION ( OUTPREC,
INPREC   )     1

Definition at line 2511 of file i386.h.

#define TUNEMASK   (1 << ix86_tune)

Definition at line 234 of file i386.h.

Referenced by ix86_rtx_costs(), override_options(), and standard_80387_constant_p().

#define UNITS_PER_SIMD_WORD   (TARGET_SSE ? 16 : 0)

Definition at line 1101 of file i386.h.

#define UNITS_PER_WORD   (TARGET_64BIT ? 8 : 4)

Definition at line 787 of file i386.h.

#define VALID_FP_MODE_P ( MODE   ) 

Value:

((MODE) == SFmode || (MODE) == DFmode || (MODE) == XFmode   \
     || (MODE) == SCmode || (MODE) == DCmode || (MODE) == XCmode) \

Definition at line 1103 of file i386.h.

#define VALID_INT_MODE_P ( MODE   ) 

Value:

((MODE) == QImode || (MODE) == HImode || (MODE) == SImode   \
     || (MODE) == DImode            \
     || (MODE) == CQImode || (MODE) == CHImode || (MODE) == CSImode \
     || (MODE) == CDImode           \
     || (TARGET_64BIT && ((MODE) == TImode || (MODE) == CTImode   \
         || (MODE) == TFmode || (MODE) == TCmode)))

Definition at line 1107 of file i386.h.

#define VALID_MMX_REG_MODE ( MODE   ) 

Value:

((MODE) == DImode || (MODE) == V8QImode || (MODE) == V4HImode \
     || (MODE) == V2SImode || (MODE) == SImode)

Definition at line 1095 of file i386.h.

#define VALID_MMX_REG_MODE_3DNOW ( MODE   )     ((MODE) == V2SFmode || (MODE) == SFmode)

Definition at line 1092 of file i386.h.

#define VALID_SSE2_REG_MODE ( MODE   ) 

Value:

((MODE) == V16QImode || (MODE) == V8HImode || (MODE) == V2DFmode    \
     || (MODE) == V2DImode || (MODE) == DFmode)

Definition at line 1084 of file i386.h.

#define VALID_SSE_REG_MODE ( MODE   ) 

Value:

((MODE) == TImode || (MODE) == V4SFmode || (MODE) == V4SImode \
     || (MODE) == SFmode || (MODE) == TFmode)

Definition at line 1088 of file i386.h.

#define WORDS_BIG_ENDIAN   0

Definition at line 784 of file i386.h.

#define X86_FILE_START_FLTUSED   false

Definition at line 2991 of file i386.h.

#define X86_FILE_START_VERSION_DIRECTIVE   false

Definition at line 2990 of file i386.h.

Typedef Documentation

typedef struct ix86_args CUMULATIVE_ARGS

Enumeration Type Documentation

enum asm_dialect

Enumerator:
ASM_ATT 
ASM_INTEL 
ASM_ATT 
ASM_INTEL 
ASM_ATT 
ASM_INTEL 
ASM_ATT 
ASM_INTEL 

Definition at line 2858 of file i386.h.

enum cmodel

Enumerator:
CM_32 
CM_SMALL 
CM_KERNEL 
CM_MEDIUM 
CM_LARGE 
CM_SMALL_PIC 
CM_32 
CM_MEDLOW 
CM_MEDMID 
CM_MEDANY 
CM_EMBMEDANY 
CM_32 
CM_SMALL 
CM_KERNEL 
CM_MEDIUM 
CM_LARGE 
CM_SMALL_PIC 
CM_32 
CM_MEDLOW 
CM_MEDMID 
CM_MEDANY 
CM_EMBMEDANY 
CM_32 
CM_SMALL 
CM_KERNEL 
CM_MEDIUM 
CM_LARGE 
CM_SMALL_PIC 
CM_32 
CM_MEDLOW 
CM_MEDMID 
CM_MEDANY 
CM_EMBMEDANY 
CM_32 
CM_SMALL 
CM_KERNEL 
CM_MEDIUM 
CM_LARGE 
CM_SMALL_PIC 
CM_MEDIUM_PIC 
CM_32 
CM_MEDLOW 
CM_MEDMID 
CM_MEDANY 
CM_EMBMEDANY 

Definition at line 2841 of file i386.h.

enum fpmath_unit

Enumerator:
FPMATH_387 
FPMATH_SSE 
FPMATH_387 
FPMATH_SSE 
FPMATH_387 
FPMATH_SSE 
FPMATH_387 
FPMATH_SSE 

Definition at line 2823 of file i386.h.

enum ix86_builtins

Enumerator:
IX86_BUILTIN_ADDPS 
IX86_BUILTIN_ADDSS 
IX86_BUILTIN_DIVPS 
IX86_BUILTIN_DIVSS 
IX86_BUILTIN_MULPS 
IX86_BUILTIN_MULSS 
IX86_BUILTIN_SUBPS 
IX86_BUILTIN_SUBSS 
IX86_BUILTIN_CMPEQPS 
IX86_BUILTIN_CMPLTPS 
IX86_BUILTIN_CMPLEPS 
IX86_BUILTIN_CMPGTPS 
IX86_BUILTIN_CMPGEPS 
IX86_BUILTIN_CMPNEQPS 
IX86_BUILTIN_CMPNLTPS 
IX86_BUILTIN_CMPNLEPS 
IX86_BUILTIN_CMPNGTPS 
IX86_BUILTIN_CMPNGEPS 
IX86_BUILTIN_CMPORDPS 
IX86_BUILTIN_CMPUNORDPS 
IX86_BUILTIN_CMPNEPS 
IX86_BUILTIN_CMPEQSS 
IX86_BUILTIN_CMPLTSS 
IX86_BUILTIN_CMPLESS 
IX86_BUILTIN_CMPNEQSS 
IX86_BUILTIN_CMPNLTSS 
IX86_BUILTIN_CMPNLESS 
IX86_BUILTIN_CMPORDSS 
IX86_BUILTIN_CMPUNORDSS 
IX86_BUILTIN_CMPNESS 
IX86_BUILTIN_COMIEQSS 
IX86_BUILTIN_COMILTSS 
IX86_BUILTIN_COMILESS 
IX86_BUILTIN_COMIGTSS 
IX86_BUILTIN_COMIGESS 
IX86_BUILTIN_COMINEQSS 
IX86_BUILTIN_UCOMIEQSS 
IX86_BUILTIN_UCOMILTSS 
IX86_BUILTIN_UCOMILESS 
IX86_BUILTIN_UCOMIGTSS 
IX86_BUILTIN_UCOMIGESS 
IX86_BUILTIN_UCOMINEQSS 
IX86_BUILTIN_CVTPI2PS 
IX86_BUILTIN_CVTPS2PI 
IX86_BUILTIN_CVTSI2SS 
IX86_BUILTIN_CVTSI642SS 
IX86_BUILTIN_CVTSS2SI 
IX86_BUILTIN_CVTSS2SI64 
IX86_BUILTIN_CVTTPS2PI 
IX86_BUILTIN_CVTTSS2SI 
IX86_BUILTIN_CVTTSS2SI64 
IX86_BUILTIN_MAXPS 
IX86_BUILTIN_MAXSS 
IX86_BUILTIN_MINPS 
IX86_BUILTIN_MINSS 
IX86_BUILTIN_LOADAPS 
IX86_BUILTIN_LOADUPS 
IX86_BUILTIN_STOREAPS 
IX86_BUILTIN_STOREUPS 
IX86_BUILTIN_LOADSS 
IX86_BUILTIN_STORESS 
IX86_BUILTIN_MOVSS 
IX86_BUILTIN_MOVHLPS 
IX86_BUILTIN_MOVLHPS 
IX86_BUILTIN_LOADHPS 
IX86_BUILTIN_LOADLPS 
IX86_BUILTIN_STOREHPS 
IX86_BUILTIN_STORELPS 
IX86_BUILTIN_MASKMOVQ 
IX86_BUILTIN_MOVMSKPS 
IX86_BUILTIN_PMOVMSKB 
IX86_BUILTIN_MOVNTPS 
IX86_BUILTIN_MOVNTQ 
IX86_BUILTIN_LOADDQA 
IX86_BUILTIN_LOADDQU 
IX86_BUILTIN_STOREDQA 
IX86_BUILTIN_STOREDQU 
IX86_BUILTIN_MOVQ 
IX86_BUILTIN_LOADD 
IX86_BUILTIN_STORED 
IX86_BUILTIN_CLRTI 
IX86_BUILTIN_PACKSSWB 
IX86_BUILTIN_PACKSSDW 
IX86_BUILTIN_PACKUSWB 
IX86_BUILTIN_PADDB 
IX86_BUILTIN_PADDW 
IX86_BUILTIN_PADDD 
IX86_BUILTIN_PADDQ 
IX86_BUILTIN_PADDSB 
IX86_BUILTIN_PADDSW 
IX86_BUILTIN_PADDUSB 
IX86_BUILTIN_PADDUSW 
IX86_BUILTIN_PSUBB 
IX86_BUILTIN_PSUBW 
IX86_BUILTIN_PSUBD 
IX86_BUILTIN_PSUBQ 
IX86_BUILTIN_PSUBSB 
IX86_BUILTIN_PSUBSW 
IX86_BUILTIN_PSUBUSB 
IX86_BUILTIN_PSUBUSW 
IX86_BUILTIN_PAND 
IX86_BUILTIN_PANDN 
IX86_BUILTIN_POR 
IX86_BUILTIN_PXOR 
IX86_BUILTIN_PAVGB 
IX86_BUILTIN_PAVGW 
IX86_BUILTIN_PCMPEQB 
IX86_BUILTIN_PCMPEQW 
IX86_BUILTIN_PCMPEQD 
IX86_BUILTIN_PCMPGTB 
IX86_BUILTIN_PCMPGTW 
IX86_BUILTIN_PCMPGTD 
IX86_BUILTIN_PEXTRW 
IX86_BUILTIN_PINSRW 
IX86_BUILTIN_PMADDWD 
IX86_BUILTIN_PMAXSW 
IX86_BUILTIN_PMAXUB 
IX86_BUILTIN_PMINSW 
IX86_BUILTIN_PMINUB 
IX86_BUILTIN_PMULHUW 
IX86_BUILTIN_PMULHW 
IX86_BUILTIN_PMULLW 
IX86_BUILTIN_PSADBW 
IX86_BUILTIN_PSHUFW 
IX86_BUILTIN_PSLLW 
IX86_BUILTIN_PSLLD 
IX86_BUILTIN_PSLLQ 
IX86_BUILTIN_PSRAW 
IX86_BUILTIN_PSRAD 
IX86_BUILTIN_PSRLW 
IX86_BUILTIN_PSRLD 
IX86_BUILTIN_PSRLQ 
IX86_BUILTIN_PSLLWI 
IX86_BUILTIN_PSLLDI 
IX86_BUILTIN_PSLLQI 
IX86_BUILTIN_PSRAWI 
IX86_BUILTIN_PSRADI 
IX86_BUILTIN_PSRLWI 
IX86_BUILTIN_PSRLDI 
IX86_BUILTIN_PSRLQI 
IX86_BUILTIN_PUNPCKHBW 
IX86_BUILTIN_PUNPCKHWD 
IX86_BUILTIN_PUNPCKHDQ 
IX86_BUILTIN_PUNPCKLBW 
IX86_BUILTIN_PUNPCKLWD 
IX86_BUILTIN_PUNPCKLDQ 
IX86_BUILTIN_SHUFPS 
IX86_BUILTIN_RCPPS 
IX86_BUILTIN_RCPSS 
IX86_BUILTIN_RSQRTPS 
IX86_BUILTIN_RSQRTSS 
IX86_BUILTIN_SQRTPS 
IX86_BUILTIN_SQRTSS 
IX86_BUILTIN_UNPCKHPS 
IX86_BUILTIN_UNPCKLPS 
IX86_BUILTIN_ANDPS 
IX86_BUILTIN_ANDNPS 
IX86_BUILTIN_ORPS 
IX86_BUILTIN_XORPS 
IX86_BUILTIN_EMMS 
IX86_BUILTIN_LDMXCSR 
IX86_BUILTIN_STMXCSR 
IX86_BUILTIN_SFENCE 
IX86_BUILTIN_FEMMS 
IX86_BUILTIN_PAVGUSB 
IX86_BUILTIN_PF2ID 
IX86_BUILTIN_PFACC 
IX86_BUILTIN_PFADD 
IX86_BUILTIN_PFCMPEQ 
IX86_BUILTIN_PFCMPGE 
IX86_BUILTIN_PFCMPGT 
IX86_BUILTIN_PFMAX 
IX86_BUILTIN_PFMIN 
IX86_BUILTIN_PFMUL 
IX86_BUILTIN_PFRCP 
IX86_BUILTIN_PFRCPIT1 
IX86_BUILTIN_PFRCPIT2 
IX86_BUILTIN_PFRSQIT1 
IX86_BUILTIN_PFRSQRT 
IX86_BUILTIN_PFSUB 
IX86_BUILTIN_PFSUBR 
IX86_BUILTIN_PI2FD 
IX86_BUILTIN_PMULHRW 
IX86_BUILTIN_PF2IW 
IX86_BUILTIN_PFNACC 
IX86_BUILTIN_PFPNACC 
IX86_BUILTIN_PI2FW 
IX86_BUILTIN_PSWAPDSI 
IX86_BUILTIN_PSWAPDSF 
IX86_BUILTIN_SSE_ZERO 
IX86_BUILTIN_MMX_ZERO 
IX86_BUILTIN_ADDPD 
IX86_BUILTIN_ADDSD 
IX86_BUILTIN_DIVPD 
IX86_BUILTIN_DIVSD 
IX86_BUILTIN_MULPD 
IX86_BUILTIN_MULSD 
IX86_BUILTIN_SUBPD 
IX86_BUILTIN_SUBSD 
IX86_BUILTIN_CMPEQPD 
IX86_BUILTIN_CMPLTPD 
IX86_BUILTIN_CMPLEPD 
IX86_BUILTIN_CMPGTPD 
IX86_BUILTIN_CMPGEPD 
IX86_BUILTIN_CMPNEQPD 
IX86_BUILTIN_CMPNLTPD 
IX86_BUILTIN_CMPNLEPD 
IX86_BUILTIN_CMPNGTPD 
IX86_BUILTIN_CMPNGEPD 
IX86_BUILTIN_CMPORDPD 
IX86_BUILTIN_CMPUNORDPD 
IX86_BUILTIN_CMPNEPD 
IX86_BUILTIN_CMPEQSD 
IX86_BUILTIN_CMPLTSD 
IX86_BUILTIN_CMPLESD 
IX86_BUILTIN_CMPNEQSD 
IX86_BUILTIN_CMPNLTSD 
IX86_BUILTIN_CMPNLESD 
IX86_BUILTIN_CMPORDSD 
IX86_BUILTIN_CMPUNORDSD 
IX86_BUILTIN_CMPNESD 
IX86_BUILTIN_COMIEQSD 
IX86_BUILTIN_COMILTSD 
IX86_BUILTIN_COMILESD 
IX86_BUILTIN_COMIGTSD 
IX86_BUILTIN_COMIGESD 
IX86_BUILTIN_COMINEQSD 
IX86_BUILTIN_UCOMIEQSD 
IX86_BUILTIN_UCOMILTSD 
IX86_BUILTIN_UCOMILESD 
IX86_BUILTIN_UCOMIGTSD 
IX86_BUILTIN_UCOMIGESD 
IX86_BUILTIN_UCOMINEQSD 
IX86_BUILTIN_MAXPD 
IX86_BUILTIN_MAXSD 
IX86_BUILTIN_MINPD 
IX86_BUILTIN_MINSD 
IX86_BUILTIN_ANDPD 
IX86_BUILTIN_ANDNPD 
IX86_BUILTIN_ORPD 
IX86_BUILTIN_XORPD 
IX86_BUILTIN_SQRTPD 
IX86_BUILTIN_SQRTSD 
IX86_BUILTIN_UNPCKHPD 
IX86_BUILTIN_UNPCKLPD 
IX86_BUILTIN_SHUFPD 
IX86_BUILTIN_LOADAPD 
IX86_BUILTIN_LOADUPD 
IX86_BUILTIN_STOREAPD 
IX86_BUILTIN_STOREUPD 
IX86_BUILTIN_LOADSD 
IX86_BUILTIN_STORESD 
IX86_BUILTIN_MOVSD 
IX86_BUILTIN_LOADHPD 
IX86_BUILTIN_LOADLPD 
IX86_BUILTIN_STOREHPD 
IX86_BUILTIN_STORELPD 
IX86_BUILTIN_CVTDQ2PD 
IX86_BUILTIN_CVTDQ2PS 
IX86_BUILTIN_CVTPD2DQ 
IX86_BUILTIN_CVTPD2PI 
IX86_BUILTIN_CVTPD2PS 
IX86_BUILTIN_CVTTPD2DQ 
IX86_BUILTIN_CVTTPD2PI 
IX86_BUILTIN_CVTPI2PD 
IX86_BUILTIN_CVTSI2SD 
IX86_BUILTIN_CVTSI642SD 
IX86_BUILTIN_CVTSD2SI 
IX86_BUILTIN_CVTSD2SI64 
IX86_BUILTIN_CVTSD2SS 
IX86_BUILTIN_CVTSS2SD 
IX86_BUILTIN_CVTTSD2SI 
IX86_BUILTIN_CVTTSD2SI64 
IX86_BUILTIN_CVTPS2DQ 
IX86_BUILTIN_CVTPS2PD 
IX86_BUILTIN_CVTTPS2DQ 
IX86_BUILTIN_MOVNTI 
IX86_BUILTIN_MOVNTPD 
IX86_BUILTIN_MOVNTDQ 
IX86_BUILTIN_SETPD1 
IX86_BUILTIN_SETPD 
IX86_BUILTIN_CLRPD 
IX86_BUILTIN_SETRPD 
IX86_BUILTIN_LOADPD1 
IX86_BUILTIN_LOADRPD 
IX86_BUILTIN_STOREPD1 
IX86_BUILTIN_STORERPD 
IX86_BUILTIN_MASKMOVDQU 
IX86_BUILTIN_MOVMSKPD 
IX86_BUILTIN_PMOVMSKB128 
IX86_BUILTIN_MOVQ2DQ 
IX86_BUILTIN_MOVDQ2Q 
IX86_BUILTIN_PACKSSWB128 
IX86_BUILTIN_PACKSSDW128 
IX86_BUILTIN_PACKUSWB128 
IX86_BUILTIN_PADDB128 
IX86_BUILTIN_PADDW128 
IX86_BUILTIN_PADDD128 
IX86_BUILTIN_PADDQ128 
IX86_BUILTIN_PADDSB128 
IX86_BUILTIN_PADDSW128 
IX86_BUILTIN_PADDUSB128 
IX86_BUILTIN_PADDUSW128 
IX86_BUILTIN_PSUBB128 
IX86_BUILTIN_PSUBW128 
IX86_BUILTIN_PSUBD128 
IX86_BUILTIN_PSUBQ128 
IX86_BUILTIN_PSUBSB128 
IX86_BUILTIN_PSUBSW128 
IX86_BUILTIN_PSUBUSB128 
IX86_BUILTIN_PSUBUSW128 
IX86_BUILTIN_PAND128 
IX86_BUILTIN_PANDN128 
IX86_BUILTIN_POR128 
IX86_BUILTIN_PXOR128 
IX86_BUILTIN_PAVGB128 
IX86_BUILTIN_PAVGW128 
IX86_BUILTIN_PCMPEQB128 
IX86_BUILTIN_PCMPEQW128 
IX86_BUILTIN_PCMPEQD128 
IX86_BUILTIN_PCMPGTB128 
IX86_BUILTIN_PCMPGTW128 
IX86_BUILTIN_PCMPGTD128 
IX86_BUILTIN_PEXTRW128 
IX86_BUILTIN_PINSRW128 
IX86_BUILTIN_PMADDWD128 
IX86_BUILTIN_PMAXSW128 
IX86_BUILTIN_PMAXUB128 
IX86_BUILTIN_PMINSW128 
IX86_BUILTIN_PMINUB128 
IX86_BUILTIN_PMULUDQ 
IX86_BUILTIN_PMULUDQ128 
IX86_BUILTIN_PMULHUW128 
IX86_BUILTIN_PMULHW128 
IX86_BUILTIN_PMULLW128 
IX86_BUILTIN_PSADBW128 
IX86_BUILTIN_PSHUFHW 
IX86_BUILTIN_PSHUFLW 
IX86_BUILTIN_PSHUFD 
IX86_BUILTIN_PSLLW128 
IX86_BUILTIN_PSLLD128 
IX86_BUILTIN_PSLLQ128 
IX86_BUILTIN_PSRAW128 
IX86_BUILTIN_PSRAD128 
IX86_BUILTIN_PSRLW128 
IX86_BUILTIN_PSRLD128 
IX86_BUILTIN_PSRLQ128 
IX86_BUILTIN_PSLLDQI128 
IX86_BUILTIN_PSLLWI128 
IX86_BUILTIN_PSLLDI128 
IX86_BUILTIN_PSLLQI128 
IX86_BUILTIN_PSRAWI128 
IX86_BUILTIN_PSRADI128 
IX86_BUILTIN_PSRLDQI128 
IX86_BUILTIN_PSRLWI128 
IX86_BUILTIN_PSRLDI128 
IX86_BUILTIN_PSRLQI128 
IX86_BUILTIN_PUNPCKHBW128 
IX86_BUILTIN_PUNPCKHWD128 
IX86_BUILTIN_PUNPCKHDQ128 
IX86_BUILTIN_PUNPCKHQDQ128 
IX86_BUILTIN_PUNPCKLBW128 
IX86_BUILTIN_PUNPCKLWD128 
IX86_BUILTIN_PUNPCKLDQ128 
IX86_BUILTIN_PUNPCKLQDQ128 
IX86_BUILTIN_CLFLUSH 
IX86_BUILTIN_MFENCE 
IX86_BUILTIN_LFENCE 
IX86_BUILTIN_ADDSUBPS 
IX86_BUILTIN_HADDPS 
IX86_BUILTIN_HSUBPS 
IX86_BUILTIN_MOVSHDUP 
IX86_BUILTIN_MOVSLDUP 
IX86_BUILTIN_ADDSUBPD 
IX86_BUILTIN_HADDPD 
IX86_BUILTIN_HSUBPD 
IX86_BUILTIN_LOADDDUP 
IX86_BUILTIN_MOVDDUP 
IX86_BUILTIN_LDDQU 
IX86_BUILTIN_MONITOR 
IX86_BUILTIN_MWAIT 
IX86_BUILTIN_MAX 
IX86_BUILTIN_ADDPS 
IX86_BUILTIN_ADDSS 
IX86_BUILTIN_DIVPS 
IX86_BUILTIN_DIVSS 
IX86_BUILTIN_MULPS 
IX86_BUILTIN_MULSS 
IX86_BUILTIN_SUBPS 
IX86_BUILTIN_SUBSS 
IX86_BUILTIN_CMPEQPS 
IX86_BUILTIN_CMPLTPS 
IX86_BUILTIN_CMPLEPS 
IX86_BUILTIN_CMPGTPS 
IX86_BUILTIN_CMPGEPS 
IX86_BUILTIN_CMPNEQPS 
IX86_BUILTIN_CMPNLTPS 
IX86_BUILTIN_CMPNLEPS 
IX86_BUILTIN_CMPNGTPS 
IX86_BUILTIN_CMPNGEPS 
IX86_BUILTIN_CMPORDPS 
IX86_BUILTIN_CMPUNORDPS 
IX86_BUILTIN_CMPNEPS 
IX86_BUILTIN_CMPEQSS 
IX86_BUILTIN_CMPLTSS 
IX86_BUILTIN_CMPLESS 
IX86_BUILTIN_CMPNEQSS 
IX86_BUILTIN_CMPNLTSS 
IX86_BUILTIN_CMPNLESS 
IX86_BUILTIN_CMPORDSS 
IX86_BUILTIN_CMPUNORDSS 
IX86_BUILTIN_CMPNESS 
IX86_BUILTIN_COMIEQSS 
IX86_BUILTIN_COMILTSS 
IX86_BUILTIN_COMILESS 
IX86_BUILTIN_COMIGTSS 
IX86_BUILTIN_COMIGESS 
IX86_BUILTIN_COMINEQSS 
IX86_BUILTIN_UCOMIEQSS 
IX86_BUILTIN_UCOMILTSS 
IX86_BUILTIN_UCOMILESS 
IX86_BUILTIN_UCOMIGTSS 
IX86_BUILTIN_UCOMIGESS 
IX86_BUILTIN_UCOMINEQSS 
IX86_BUILTIN_CVTPI2PS 
IX86_BUILTIN_CVTPS2PI 
IX86_BUILTIN_CVTSI2SS 
IX86_BUILTIN_CVTSI642SS 
IX86_BUILTIN_CVTSS2SI 
IX86_BUILTIN_CVTSS2SI64 
IX86_BUILTIN_CVTTPS2PI 
IX86_BUILTIN_CVTTSS2SI 
IX86_BUILTIN_CVTTSS2SI64 
IX86_BUILTIN_MAXPS 
IX86_BUILTIN_MAXSS 
IX86_BUILTIN_MINPS 
IX86_BUILTIN_MINSS 
IX86_BUILTIN_LOADAPS 
IX86_BUILTIN_LOADUPS 
IX86_BUILTIN_STOREAPS 
IX86_BUILTIN_STOREUPS 
IX86_BUILTIN_LOADSS 
IX86_BUILTIN_STORESS 
IX86_BUILTIN_MOVSS 
IX86_BUILTIN_MOVHLPS 
IX86_BUILTIN_MOVLHPS 
IX86_BUILTIN_LOADHPS 
IX86_BUILTIN_LOADLPS 
IX86_BUILTIN_STOREHPS 
IX86_BUILTIN_STORELPS 
IX86_BUILTIN_MASKMOVQ 
IX86_BUILTIN_MOVMSKPS 
IX86_BUILTIN_PMOVMSKB 
IX86_BUILTIN_MOVNTPS 
IX86_BUILTIN_MOVNTQ 
IX86_BUILTIN_LOADDQA 
IX86_BUILTIN_LOADDQU 
IX86_BUILTIN_STOREDQA 
IX86_BUILTIN_STOREDQU 
IX86_BUILTIN_MOVQ 
IX86_BUILTIN_LOADD 
IX86_BUILTIN_STORED 
IX86_BUILTIN_CLRTI 
IX86_BUILTIN_PACKSSWB 
IX86_BUILTIN_PACKSSDW 
IX86_BUILTIN_PACKUSWB 
IX86_BUILTIN_PADDB 
IX86_BUILTIN_PADDW 
IX86_BUILTIN_PADDD 
IX86_BUILTIN_PADDQ 
IX86_BUILTIN_PADDSB 
IX86_BUILTIN_PADDSW 
IX86_BUILTIN_PADDUSB 
IX86_BUILTIN_PADDUSW 
IX86_BUILTIN_PSUBB 
IX86_BUILTIN_PSUBW 
IX86_BUILTIN_PSUBD 
IX86_BUILTIN_PSUBQ 
IX86_BUILTIN_PSUBSB 
IX86_BUILTIN_PSUBSW 
IX86_BUILTIN_PSUBUSB 
IX86_BUILTIN_PSUBUSW 
IX86_BUILTIN_PAND 
IX86_BUILTIN_PANDN 
IX86_BUILTIN_POR 
IX86_BUILTIN_PXOR 
IX86_BUILTIN_PAVGB 
IX86_BUILTIN_PAVGW 
IX86_BUILTIN_PCMPEQB 
IX86_BUILTIN_PCMPEQW 
IX86_BUILTIN_PCMPEQD 
IX86_BUILTIN_PCMPGTB 
IX86_BUILTIN_PCMPGTW 
IX86_BUILTIN_PCMPGTD 
IX86_BUILTIN_PEXTRW 
IX86_BUILTIN_PINSRW 
IX86_BUILTIN_PMADDWD 
IX86_BUILTIN_PMAXSW 
IX86_BUILTIN_PMAXUB 
IX86_BUILTIN_PMINSW 
IX86_BUILTIN_PMINUB 
IX86_BUILTIN_PMULHUW 
IX86_BUILTIN_PMULHW 
IX86_BUILTIN_PMULLW 
IX86_BUILTIN_PSADBW 
IX86_BUILTIN_PSHUFW 
IX86_BUILTIN_PSLLW 
IX86_BUILTIN_PSLLD 
IX86_BUILTIN_PSLLQ 
IX86_BUILTIN_PSRAW 
IX86_BUILTIN_PSRAD 
IX86_BUILTIN_PSRLW 
IX86_BUILTIN_PSRLD 
IX86_BUILTIN_PSRLQ 
IX86_BUILTIN_PSLLWI 
IX86_BUILTIN_PSLLDI 
IX86_BUILTIN_PSLLQI 
IX86_BUILTIN_PSRAWI 
IX86_BUILTIN_PSRADI 
IX86_BUILTIN_PSRLWI 
IX86_BUILTIN_PSRLDI 
IX86_BUILTIN_PSRLQI 
IX86_BUILTIN_PUNPCKHBW 
IX86_BUILTIN_PUNPCKHWD 
IX86_BUILTIN_PUNPCKHDQ 
IX86_BUILTIN_PUNPCKLBW 
IX86_BUILTIN_PUNPCKLWD 
IX86_BUILTIN_PUNPCKLDQ 
IX86_BUILTIN_SHUFPS 
IX86_BUILTIN_RCPPS 
IX86_BUILTIN_RCPSS 
IX86_BUILTIN_RSQRTPS 
IX86_BUILTIN_RSQRTSS 
IX86_BUILTIN_SQRTPS 
IX86_BUILTIN_SQRTSS 
IX86_BUILTIN_UNPCKHPS 
IX86_BUILTIN_UNPCKLPS 
IX86_BUILTIN_ANDPS 
IX86_BUILTIN_ANDNPS 
IX86_BUILTIN_ORPS 
IX86_BUILTIN_XORPS 
IX86_BUILTIN_EMMS 
IX86_BUILTIN_LDMXCSR 
IX86_BUILTIN_STMXCSR 
IX86_BUILTIN_SFENCE 
IX86_BUILTIN_FEMMS 
IX86_BUILTIN_PAVGUSB 
IX86_BUILTIN_PF2ID 
IX86_BUILTIN_PFACC 
IX86_BUILTIN_PFADD 
IX86_BUILTIN_PFCMPEQ 
IX86_BUILTIN_PFCMPGE 
IX86_BUILTIN_PFCMPGT 
IX86_BUILTIN_PFMAX 
IX86_BUILTIN_PFMIN 
IX86_BUILTIN_PFMUL 
IX86_BUILTIN_PFRCP 
IX86_BUILTIN_PFRCPIT1 
IX86_BUILTIN_PFRCPIT2 
IX86_BUILTIN_PFRSQIT1 
IX86_BUILTIN_PFRSQRT 
IX86_BUILTIN_PFSUB 
IX86_BUILTIN_PFSUBR 
IX86_BUILTIN_PI2FD 
IX86_BUILTIN_PMULHRW 
IX86_BUILTIN_PF2IW 
IX86_BUILTIN_PFNACC 
IX86_BUILTIN_PFPNACC 
IX86_BUILTIN_PI2FW 
IX86_BUILTIN_PSWAPDSI 
IX86_BUILTIN_PSWAPDSF 
IX86_BUILTIN_SSE_ZERO 
IX86_BUILTIN_MMX_ZERO 
IX86_BUILTIN_ADDPD 
IX86_BUILTIN_ADDSD 
IX86_BUILTIN_DIVPD 
IX86_BUILTIN_DIVSD 
IX86_BUILTIN_MULPD 
IX86_BUILTIN_MULSD 
IX86_BUILTIN_SUBPD 
IX86_BUILTIN_SUBSD 
IX86_BUILTIN_CMPEQPD 
IX86_BUILTIN_CMPLTPD 
IX86_BUILTIN_CMPLEPD 
IX86_BUILTIN_CMPGTPD 
IX86_BUILTIN_CMPGEPD 
IX86_BUILTIN_CMPNEQPD 
IX86_BUILTIN_CMPNLTPD 
IX86_BUILTIN_CMPNLEPD 
IX86_BUILTIN_CMPNGTPD 
IX86_BUILTIN_CMPNGEPD 
IX86_BUILTIN_CMPORDPD 
IX86_BUILTIN_CMPUNORDPD 
IX86_BUILTIN_CMPNEPD 
IX86_BUILTIN_CMPEQSD 
IX86_BUILTIN_CMPLTSD 
IX86_BUILTIN_CMPLESD 
IX86_BUILTIN_CMPNEQSD 
IX86_BUILTIN_CMPNLTSD 
IX86_BUILTIN_CMPNLESD 
IX86_BUILTIN_CMPORDSD 
IX86_BUILTIN_CMPUNORDSD 
IX86_BUILTIN_CMPNESD 
IX86_BUILTIN_COMIEQSD 
IX86_BUILTIN_COMILTSD 
IX86_BUILTIN_COMILESD 
IX86_BUILTIN_COMIGTSD 
IX86_BUILTIN_COMIGESD 
IX86_BUILTIN_COMINEQSD 
IX86_BUILTIN_UCOMIEQSD 
IX86_BUILTIN_UCOMILTSD 
IX86_BUILTIN_UCOMILESD 
IX86_BUILTIN_UCOMIGTSD 
IX86_BUILTIN_UCOMIGESD 
IX86_BUILTIN_UCOMINEQSD 
IX86_BUILTIN_MAXPD 
IX86_BUILTIN_MAXSD 
IX86_BUILTIN_MINPD 
IX86_BUILTIN_MINSD 
IX86_BUILTIN_ANDPD 
IX86_BUILTIN_ANDNPD 
IX86_BUILTIN_ORPD 
IX86_BUILTIN_XORPD 
IX86_BUILTIN_SQRTPD 
IX86_BUILTIN_SQRTSD 
IX86_BUILTIN_UNPCKHPD 
IX86_BUILTIN_UNPCKLPD 
IX86_BUILTIN_SHUFPD 
IX86_BUILTIN_LOADAPD 
IX86_BUILTIN_LOADUPD 
IX86_BUILTIN_STOREAPD 
IX86_BUILTIN_STOREUPD 
IX86_BUILTIN_LOADSD 
IX86_BUILTIN_STORESD 
IX86_BUILTIN_MOVSD 
IX86_BUILTIN_LOADHPD 
IX86_BUILTIN_LOADLPD 
IX86_BUILTIN_STOREHPD 
IX86_BUILTIN_STORELPD 
IX86_BUILTIN_CVTDQ2PD 
IX86_BUILTIN_CVTDQ2PS 
IX86_BUILTIN_CVTPD2DQ 
IX86_BUILTIN_CVTPD2PI 
IX86_BUILTIN_CVTPD2PS 
IX86_BUILTIN_CVTTPD2DQ 
IX86_BUILTIN_CVTTPD2PI 
IX86_BUILTIN_CVTPI2PD 
IX86_BUILTIN_CVTSI2SD 
IX86_BUILTIN_CVTSI642SD 
IX86_BUILTIN_CVTSD2SI 
IX86_BUILTIN_CVTSD2SI64 
IX86_BUILTIN_CVTSD2SS 
IX86_BUILTIN_CVTSS2SD 
IX86_BUILTIN_CVTTSD2SI 
IX86_BUILTIN_CVTTSD2SI64 
IX86_BUILTIN_CVTPS2DQ 
IX86_BUILTIN_CVTPS2PD 
IX86_BUILTIN_CVTTPS2DQ 
IX86_BUILTIN_MOVNTI 
IX86_BUILTIN_MOVNTPD 
IX86_BUILTIN_MOVNTDQ 
IX86_BUILTIN_SETPD1 
IX86_BUILTIN_SETPD 
IX86_BUILTIN_CLRPD 
IX86_BUILTIN_SETRPD 
IX86_BUILTIN_LOADPD1 
IX86_BUILTIN_LOADRPD 
IX86_BUILTIN_STOREPD1 
IX86_BUILTIN_STORERPD 
IX86_BUILTIN_MASKMOVDQU 
IX86_BUILTIN_MOVMSKPD 
IX86_BUILTIN_PMOVMSKB128 
IX86_BUILTIN_MOVQ2DQ 
IX86_BUILTIN_MOVDQ2Q 
IX86_BUILTIN_PACKSSWB128 
IX86_BUILTIN_PACKSSDW128 
IX86_BUILTIN_PACKUSWB128 
IX86_BUILTIN_PADDB128 
IX86_BUILTIN_PADDW128 
IX86_BUILTIN_PADDD128 
IX86_BUILTIN_PADDQ128 
IX86_BUILTIN_PADDSB128 
IX86_BUILTIN_PADDSW128 
IX86_BUILTIN_PADDUSB128 
IX86_BUILTIN_PADDUSW128 
IX86_BUILTIN_PSUBB128 
IX86_BUILTIN_PSUBW128 
IX86_BUILTIN_PSUBD128 
IX86_BUILTIN_PSUBQ128 
IX86_BUILTIN_PSUBSB128 
IX86_BUILTIN_PSUBSW128 
IX86_BUILTIN_PSUBUSB128 
IX86_BUILTIN_PSUBUSW128 
IX86_BUILTIN_PAND128 
IX86_BUILTIN_PANDN128 
IX86_BUILTIN_POR128 
IX86_BUILTIN_PXOR128 
IX86_BUILTIN_PAVGB128 
IX86_BUILTIN_PAVGW128 
IX86_BUILTIN_PCMPEQB128 
IX86_BUILTIN_PCMPEQW128 
IX86_BUILTIN_PCMPEQD128 
IX86_BUILTIN_PCMPGTB128 
IX86_BUILTIN_PCMPGTW128 
IX86_BUILTIN_PCMPGTD128 
IX86_BUILTIN_PEXTRW128 
IX86_BUILTIN_PINSRW128 
IX86_BUILTIN_PMADDWD128 
IX86_BUILTIN_PMAXSW128 
IX86_BUILTIN_PMAXUB128 
IX86_BUILTIN_PMINSW128 
IX86_BUILTIN_PMINUB128 
IX86_BUILTIN_PMULUDQ 
IX86_BUILTIN_PMULUDQ128 
IX86_BUILTIN_PMULHUW128 
IX86_BUILTIN_PMULHW128 
IX86_BUILTIN_PMULLW128 
IX86_BUILTIN_PSADBW128 
IX86_BUILTIN_PSHUFHW 
IX86_BUILTIN_PSHUFLW 
IX86_BUILTIN_PSHUFD 
IX86_BUILTIN_PSLLW128 
IX86_BUILTIN_PSLLD128 
IX86_BUILTIN_PSLLQ128 
IX86_BUILTIN_PSRAW128 
IX86_BUILTIN_PSRAD128 
IX86_BUILTIN_PSRLW128 
IX86_BUILTIN_PSRLD128 
IX86_BUILTIN_PSRLQ128 
IX86_BUILTIN_PSLLDQI128 
IX86_BUILTIN_PSLLWI128 
IX86_BUILTIN_PSLLDI128 
IX86_BUILTIN_PSLLQI128 
IX86_BUILTIN_PSRAWI128 
IX86_BUILTIN_PSRADI128 
IX86_BUILTIN_PSRLDQI128 
IX86_BUILTIN_PSRLWI128 
IX86_BUILTIN_PSRLDI128 
IX86_BUILTIN_PSRLQI128 
IX86_BUILTIN_PUNPCKHBW128 
IX86_BUILTIN_PUNPCKHWD128 
IX86_BUILTIN_PUNPCKHDQ128 
IX86_BUILTIN_PUNPCKHQDQ128 
IX86_BUILTIN_PUNPCKLBW128 
IX86_BUILTIN_PUNPCKLWD128 
IX86_BUILTIN_PUNPCKLDQ128 
IX86_BUILTIN_PUNPCKLQDQ128 
IX86_BUILTIN_CLFLUSH 
IX86_BUILTIN_MFENCE 
IX86_BUILTIN_LFENCE 
IX86_BUILTIN_ADDSUBPS 
IX86_BUILTIN_HADDPS 
IX86_BUILTIN_HSUBPS 
IX86_BUILTIN_MOVSHDUP 
IX86_BUILTIN_MOVSLDUP 
IX86_BUILTIN_ADDSUBPD 
IX86_BUILTIN_HADDPD 
IX86_BUILTIN_HSUBPD 
IX86_BUILTIN_LOADDDUP 
IX86_BUILTIN_MOVDDUP 
IX86_BUILTIN_LDDQU 
IX86_BUILTIN_MONITOR 
IX86_BUILTIN_MWAIT 
IX86_BUILTIN_MAX 
IX86_BUILTIN_ADDPS 
IX86_BUILTIN_ADDSS 
IX86_BUILTIN_DIVPS 
IX86_BUILTIN_DIVSS 
IX86_BUILTIN_MULPS 
IX86_BUILTIN_MULSS 
IX86_BUILTIN_SUBPS 
IX86_BUILTIN_SUBSS 
IX86_BUILTIN_CMPEQPS 
IX86_BUILTIN_CMPLTPS 
IX86_BUILTIN_CMPLEPS 
IX86_BUILTIN_CMPGTPS 
IX86_BUILTIN_CMPGEPS 
IX86_BUILTIN_CMPNEQPS 
IX86_BUILTIN_CMPNLTPS 
IX86_BUILTIN_CMPNLEPS 
IX86_BUILTIN_CMPNGTPS 
IX86_BUILTIN_CMPNGEPS 
IX86_BUILTIN_CMPORDPS 
IX86_BUILTIN_CMPUNORDPS 
IX86_BUILTIN_CMPNEPS 
IX86_BUILTIN_CMPEQSS 
IX86_BUILTIN_CMPLTSS 
IX86_BUILTIN_CMPLESS 
IX86_BUILTIN_CMPNEQSS 
IX86_BUILTIN_CMPNLTSS 
IX86_BUILTIN_CMPNLESS 
IX86_BUILTIN_CMPNGTSS 
IX86_BUILTIN_CMPNGESS 
IX86_BUILTIN_CMPORDSS 
IX86_BUILTIN_CMPUNORDSS 
IX86_BUILTIN_CMPNESS 
IX86_BUILTIN_COMIEQSS 
IX86_BUILTIN_COMILTSS 
IX86_BUILTIN_COMILESS 
IX86_BUILTIN_COMIGTSS 
IX86_BUILTIN_COMIGESS 
IX86_BUILTIN_COMINEQSS 
IX86_BUILTIN_UCOMIEQSS 
IX86_BUILTIN_UCOMILTSS 
IX86_BUILTIN_UCOMILESS 
IX86_BUILTIN_UCOMIGTSS 
IX86_BUILTIN_UCOMIGESS 
IX86_BUILTIN_UCOMINEQSS 
IX86_BUILTIN_CVTPI2PS 
IX86_BUILTIN_CVTPS2PI 
IX86_BUILTIN_CVTSI2SS 
IX86_BUILTIN_CVTSI642SS 
IX86_BUILTIN_CVTSS2SI 
IX86_BUILTIN_CVTSS2SI64 
IX86_BUILTIN_CVTTPS2PI 
IX86_BUILTIN_CVTTSS2SI 
IX86_BUILTIN_CVTTSS2SI64 
IX86_BUILTIN_MAXPS 
IX86_BUILTIN_MAXSS 
IX86_BUILTIN_MINPS 
IX86_BUILTIN_MINSS 
IX86_BUILTIN_LOADUPS 
IX86_BUILTIN_STOREUPS 
IX86_BUILTIN_MOVSS 
IX86_BUILTIN_MOVHLPS 
IX86_BUILTIN_MOVLHPS 
IX86_BUILTIN_LOADHPS 
IX86_BUILTIN_LOADLPS 
IX86_BUILTIN_STOREHPS 
IX86_BUILTIN_STORELPS 
IX86_BUILTIN_MASKMOVQ 
IX86_BUILTIN_MOVMSKPS 
IX86_BUILTIN_PMOVMSKB 
IX86_BUILTIN_MOVNTPS 
IX86_BUILTIN_MOVNTQ 
IX86_BUILTIN_LOADDQU 
IX86_BUILTIN_STOREDQU 
IX86_BUILTIN_PACKSSWB 
IX86_BUILTIN_PACKSSDW 
IX86_BUILTIN_PACKUSWB 
IX86_BUILTIN_PADDB 
IX86_BUILTIN_PADDW 
IX86_BUILTIN_PADDD 
IX86_BUILTIN_PADDQ 
IX86_BUILTIN_PADDSB 
IX86_BUILTIN_PADDSW 
IX86_BUILTIN_PADDUSB 
IX86_BUILTIN_PADDUSW 
IX86_BUILTIN_PSUBB 
IX86_BUILTIN_PSUBW 
IX86_BUILTIN_PSUBD 
IX86_BUILTIN_PSUBQ 
IX86_BUILTIN_PSUBSB 
IX86_BUILTIN_PSUBSW 
IX86_BUILTIN_PSUBUSB 
IX86_BUILTIN_PSUBUSW 
IX86_BUILTIN_PAND 
IX86_BUILTIN_PANDN 
IX86_BUILTIN_POR 
IX86_BUILTIN_PXOR 
IX86_BUILTIN_PAVGB 
IX86_BUILTIN_PAVGW 
IX86_BUILTIN_PCMPEQB 
IX86_BUILTIN_PCMPEQW 
IX86_BUILTIN_PCMPEQD 
IX86_BUILTIN_PCMPGTB 
IX86_BUILTIN_PCMPGTW 
IX86_BUILTIN_PCMPGTD 
IX86_BUILTIN_PMADDWD 
IX86_BUILTIN_PMAXSW 
IX86_BUILTIN_PMAXUB 
IX86_BUILTIN_PMINSW 
IX86_BUILTIN_PMINUB 
IX86_BUILTIN_PMULHUW 
IX86_BUILTIN_PMULHW 
IX86_BUILTIN_PMULLW 
IX86_BUILTIN_PSADBW 
IX86_BUILTIN_PSHUFW 
IX86_BUILTIN_PSLLW 
IX86_BUILTIN_PSLLD 
IX86_BUILTIN_PSLLQ 
IX86_BUILTIN_PSRAW 
IX86_BUILTIN_PSRAD 
IX86_BUILTIN_PSRLW 
IX86_BUILTIN_PSRLD 
IX86_BUILTIN_PSRLQ 
IX86_BUILTIN_PSLLWI 
IX86_BUILTIN_PSLLDI 
IX86_BUILTIN_PSLLQI 
IX86_BUILTIN_PSRAWI 
IX86_BUILTIN_PSRADI 
IX86_BUILTIN_PSRLWI 
IX86_BUILTIN_PSRLDI 
IX86_BUILTIN_PSRLQI 
IX86_BUILTIN_PUNPCKHBW 
IX86_BUILTIN_PUNPCKHWD 
IX86_BUILTIN_PUNPCKHDQ 
IX86_BUILTIN_PUNPCKLBW 
IX86_BUILTIN_PUNPCKLWD 
IX86_BUILTIN_PUNPCKLDQ 
IX86_BUILTIN_SHUFPS 
IX86_BUILTIN_RCPPS 
IX86_BUILTIN_RCPSS 
IX86_BUILTIN_RSQRTPS 
IX86_BUILTIN_RSQRTSS 
IX86_BUILTIN_SQRTPS 
IX86_BUILTIN_SQRTSS 
IX86_BUILTIN_UNPCKHPS 
IX86_BUILTIN_UNPCKLPS 
IX86_BUILTIN_ANDPS 
IX86_BUILTIN_ANDNPS 
IX86_BUILTIN_ORPS 
IX86_BUILTIN_XORPS 
IX86_BUILTIN_EMMS 
IX86_BUILTIN_LDMXCSR 
IX86_BUILTIN_STMXCSR 
IX86_BUILTIN_SFENCE 
IX86_BUILTIN_FEMMS 
IX86_BUILTIN_PAVGUSB 
IX86_BUILTIN_PF2ID 
IX86_BUILTIN_PFACC 
IX86_BUILTIN_PFADD 
IX86_BUILTIN_PFCMPEQ 
IX86_BUILTIN_PFCMPGE 
IX86_BUILTIN_PFCMPGT 
IX86_BUILTIN_PFMAX 
IX86_BUILTIN_PFMIN 
IX86_BUILTIN_PFMUL 
IX86_BUILTIN_PFRCP 
IX86_BUILTIN_PFRCPIT1 
IX86_BUILTIN_PFRCPIT2 
IX86_BUILTIN_PFRSQIT1 
IX86_BUILTIN_PFRSQRT 
IX86_BUILTIN_PFSUB 
IX86_BUILTIN_PFSUBR 
IX86_BUILTIN_PI2FD 
IX86_BUILTIN_PMULHRW 
IX86_BUILTIN_PF2IW 
IX86_BUILTIN_PFNACC 
IX86_BUILTIN_PFPNACC 
IX86_BUILTIN_PI2FW 
IX86_BUILTIN_PSWAPDSI 
IX86_BUILTIN_PSWAPDSF 
IX86_BUILTIN_ADDPD 
IX86_BUILTIN_ADDSD 
IX86_BUILTIN_DIVPD 
IX86_BUILTIN_DIVSD 
IX86_BUILTIN_MULPD 
IX86_BUILTIN_MULSD 
IX86_BUILTIN_SUBPD 
IX86_BUILTIN_SUBSD 
IX86_BUILTIN_CMPEQPD 
IX86_BUILTIN_CMPLTPD 
IX86_BUILTIN_CMPLEPD 
IX86_BUILTIN_CMPGTPD 
IX86_BUILTIN_CMPGEPD 
IX86_BUILTIN_CMPNEQPD 
IX86_BUILTIN_CMPNLTPD 
IX86_BUILTIN_CMPNLEPD 
IX86_BUILTIN_CMPNGTPD 
IX86_BUILTIN_CMPNGEPD 
IX86_BUILTIN_CMPORDPD 
IX86_BUILTIN_CMPUNORDPD 
IX86_BUILTIN_CMPNEPD 
IX86_BUILTIN_CMPEQSD 
IX86_BUILTIN_CMPLTSD 
IX86_BUILTIN_CMPLESD 
IX86_BUILTIN_CMPNEQSD 
IX86_BUILTIN_CMPNLTSD 
IX86_BUILTIN_CMPNLESD 
IX86_BUILTIN_CMPORDSD 
IX86_BUILTIN_CMPUNORDSD 
IX86_BUILTIN_CMPNESD 
IX86_BUILTIN_COMIEQSD 
IX86_BUILTIN_COMILTSD 
IX86_BUILTIN_COMILESD 
IX86_BUILTIN_COMIGTSD 
IX86_BUILTIN_COMIGESD 
IX86_BUILTIN_COMINEQSD 
IX86_BUILTIN_UCOMIEQSD 
IX86_BUILTIN_UCOMILTSD 
IX86_BUILTIN_UCOMILESD 
IX86_BUILTIN_UCOMIGTSD 
IX86_BUILTIN_UCOMIGESD 
IX86_BUILTIN_UCOMINEQSD 
IX86_BUILTIN_MAXPD 
IX86_BUILTIN_MAXSD 
IX86_BUILTIN_MINPD 
IX86_BUILTIN_MINSD 
IX86_BUILTIN_ANDPD 
IX86_BUILTIN_ANDNPD 
IX86_BUILTIN_ORPD 
IX86_BUILTIN_XORPD 
IX86_BUILTIN_SQRTPD 
IX86_BUILTIN_SQRTSD 
IX86_BUILTIN_UNPCKHPD 
IX86_BUILTIN_UNPCKLPD 
IX86_BUILTIN_SHUFPD 
IX86_BUILTIN_LOADUPD 
IX86_BUILTIN_STOREUPD 
IX86_BUILTIN_MOVSD 
IX86_BUILTIN_LOADHPD 
IX86_BUILTIN_LOADLPD 
IX86_BUILTIN_CVTDQ2PD 
IX86_BUILTIN_CVTDQ2PS 
IX86_BUILTIN_CVTPD2DQ 
IX86_BUILTIN_CVTPD2PI 
IX86_BUILTIN_CVTPD2PS 
IX86_BUILTIN_CVTTPD2DQ 
IX86_BUILTIN_CVTTPD2PI 
IX86_BUILTIN_CVTPI2PD 
IX86_BUILTIN_CVTSI2SD 
IX86_BUILTIN_CVTSI642SD 
IX86_BUILTIN_CVTSD2SI 
IX86_BUILTIN_CVTSD2SI64 
IX86_BUILTIN_CVTSD2SS 
IX86_BUILTIN_CVTSS2SD 
IX86_BUILTIN_CVTTSD2SI 
IX86_BUILTIN_CVTTSD2SI64 
IX86_BUILTIN_CVTPS2DQ 
IX86_BUILTIN_CVTPS2PD 
IX86_BUILTIN_CVTTPS2DQ 
IX86_BUILTIN_MOVNTI 
IX86_BUILTIN_MOVNTPD 
IX86_BUILTIN_MOVNTDQ 
IX86_BUILTIN_MASKMOVDQU 
IX86_BUILTIN_MOVMSKPD 
IX86_BUILTIN_PMOVMSKB128 
IX86_BUILTIN_PACKSSWB128 
IX86_BUILTIN_PACKSSDW128 
IX86_BUILTIN_PACKUSWB128 
IX86_BUILTIN_PADDB128 
IX86_BUILTIN_PADDW128 
IX86_BUILTIN_PADDD128 
IX86_BUILTIN_PADDQ128 
IX86_BUILTIN_PADDSB128 
IX86_BUILTIN_PADDSW128 
IX86_BUILTIN_PADDUSB128 
IX86_BUILTIN_PADDUSW128 
IX86_BUILTIN_PSUBB128 
IX86_BUILTIN_PSUBW128 
IX86_BUILTIN_PSUBD128 
IX86_BUILTIN_PSUBQ128 
IX86_BUILTIN_PSUBSB128 
IX86_BUILTIN_PSUBSW128 
IX86_BUILTIN_PSUBUSB128 
IX86_BUILTIN_PSUBUSW128 
IX86_BUILTIN_PAND128 
IX86_BUILTIN_PANDN128 
IX86_BUILTIN_POR128 
IX86_BUILTIN_PXOR128 
IX86_BUILTIN_PAVGB128 
IX86_BUILTIN_PAVGW128 
IX86_BUILTIN_PCMPEQB128 
IX86_BUILTIN_PCMPEQW128 
IX86_BUILTIN_PCMPEQD128 
IX86_BUILTIN_PCMPGTB128 
IX86_BUILTIN_PCMPGTW128 
IX86_BUILTIN_PCMPGTD128 
IX86_BUILTIN_PMADDWD128 
IX86_BUILTIN_PMAXSW128 
IX86_BUILTIN_PMAXUB128 
IX86_BUILTIN_PMINSW128 
IX86_BUILTIN_PMINUB128 
IX86_BUILTIN_PMULUDQ 
IX86_BUILTIN_PMULUDQ128 
IX86_BUILTIN_PMULHUW128 
IX86_BUILTIN_PMULHW128 
IX86_BUILTIN_PMULLW128 
IX86_BUILTIN_PSADBW128 
IX86_BUILTIN_PSHUFHW 
IX86_BUILTIN_PSHUFLW 
IX86_BUILTIN_PSHUFD 
IX86_BUILTIN_PSLLW128 
IX86_BUILTIN_PSLLD128 
IX86_BUILTIN_PSLLQ128 
IX86_BUILTIN_PSRAW128 
IX86_BUILTIN_PSRAD128 
IX86_BUILTIN_PSRLW128 
IX86_BUILTIN_PSRLD128 
IX86_BUILTIN_PSRLQ128 
IX86_BUILTIN_PSLLDQI128 
IX86_BUILTIN_PSLLWI128 
IX86_BUILTIN_PSLLDI128 
IX86_BUILTIN_PSLLQI128 
IX86_BUILTIN_PSRAWI128 
IX86_BUILTIN_PSRADI128 
IX86_BUILTIN_PSRLDQI128 
IX86_BUILTIN_PSRLWI128 
IX86_BUILTIN_PSRLDI128 
IX86_BUILTIN_PSRLQI128 
IX86_BUILTIN_PUNPCKHBW128 
IX86_BUILTIN_PUNPCKHWD128 
IX86_BUILTIN_PUNPCKHDQ128 
IX86_BUILTIN_PUNPCKHQDQ128 
IX86_BUILTIN_PUNPCKLBW128 
IX86_BUILTIN_PUNPCKLWD128 
IX86_BUILTIN_PUNPCKLDQ128 
IX86_BUILTIN_PUNPCKLQDQ128 
IX86_BUILTIN_CLFLUSH 
IX86_BUILTIN_MFENCE 
IX86_BUILTIN_LFENCE 
IX86_BUILTIN_ADDSUBPS 
IX86_BUILTIN_HADDPS 
IX86_BUILTIN_HSUBPS 
IX86_BUILTIN_MOVSHDUP 
IX86_BUILTIN_MOVSLDUP 
IX86_BUILTIN_ADDSUBPD 
IX86_BUILTIN_HADDPD 
IX86_BUILTIN_HSUBPD 
IX86_BUILTIN_LDDQU 
IX86_BUILTIN_MONITOR 
IX86_BUILTIN_MWAIT 
IX86_BUILTIN_VEC_INIT_V2SI 
IX86_BUILTIN_VEC_INIT_V4HI 
IX86_BUILTIN_VEC_INIT_V8QI 
IX86_BUILTIN_VEC_EXT_V2DF 
IX86_BUILTIN_VEC_EXT_V2DI 
IX86_BUILTIN_VEC_EXT_V4SF 
IX86_BUILTIN_VEC_EXT_V4SI 
IX86_BUILTIN_VEC_EXT_V8HI 
IX86_BUILTIN_VEC_EXT_V2SI 
IX86_BUILTIN_VEC_EXT_V4HI 
IX86_BUILTIN_VEC_SET_V8HI 
IX86_BUILTIN_VEC_SET_V4HI 
IX86_BUILTIN_MAX 
IX86_BUILTIN_ADDPS 
IX86_BUILTIN_ADDSS 
IX86_BUILTIN_DIVPS 
IX86_BUILTIN_DIVSS 
IX86_BUILTIN_MULPS 
IX86_BUILTIN_MULSS 
IX86_BUILTIN_SUBPS 
IX86_BUILTIN_SUBSS 
IX86_BUILTIN_CMPEQPS 
IX86_BUILTIN_CMPLTPS 
IX86_BUILTIN_CMPLEPS 
IX86_BUILTIN_CMPGTPS 
IX86_BUILTIN_CMPGEPS 
IX86_BUILTIN_CMPNEQPS 
IX86_BUILTIN_CMPNLTPS 
IX86_BUILTIN_CMPNLEPS 
IX86_BUILTIN_CMPNGTPS 
IX86_BUILTIN_CMPNGEPS 
IX86_BUILTIN_CMPORDPS 
IX86_BUILTIN_CMPUNORDPS 
IX86_BUILTIN_CMPEQSS 
IX86_BUILTIN_CMPLTSS 
IX86_BUILTIN_CMPLESS 
IX86_BUILTIN_CMPNEQSS 
IX86_BUILTIN_CMPNLTSS 
IX86_BUILTIN_CMPNLESS 
IX86_BUILTIN_CMPNGTSS 
IX86_BUILTIN_CMPNGESS 
IX86_BUILTIN_CMPORDSS 
IX86_BUILTIN_CMPUNORDSS 
IX86_BUILTIN_COMIEQSS 
IX86_BUILTIN_COMILTSS 
IX86_BUILTIN_COMILESS 
IX86_BUILTIN_COMIGTSS 
IX86_BUILTIN_COMIGESS 
IX86_BUILTIN_COMINEQSS 
IX86_BUILTIN_UCOMIEQSS 
IX86_BUILTIN_UCOMILTSS 
IX86_BUILTIN_UCOMILESS 
IX86_BUILTIN_UCOMIGTSS 
IX86_BUILTIN_UCOMIGESS 
IX86_BUILTIN_UCOMINEQSS 
IX86_BUILTIN_CVTPI2PS 
IX86_BUILTIN_CVTPS2PI 
IX86_BUILTIN_CVTSI2SS 
IX86_BUILTIN_CVTSI642SS 
IX86_BUILTIN_CVTSS2SI 
IX86_BUILTIN_CVTSS2SI64 
IX86_BUILTIN_CVTTPS2PI 
IX86_BUILTIN_CVTTSS2SI 
IX86_BUILTIN_CVTTSS2SI64 
IX86_BUILTIN_MAXPS 
IX86_BUILTIN_MAXSS 
IX86_BUILTIN_MINPS 
IX86_BUILTIN_MINSS 
IX86_BUILTIN_LOADUPS 
IX86_BUILTIN_STOREUPS 
IX86_BUILTIN_MOVSS 
IX86_BUILTIN_MOVHLPS 
IX86_BUILTIN_MOVLHPS 
IX86_BUILTIN_LOADHPS 
IX86_BUILTIN_LOADLPS 
IX86_BUILTIN_STOREHPS 
IX86_BUILTIN_STORELPS 
IX86_BUILTIN_MASKMOVQ 
IX86_BUILTIN_MOVMSKPS 
IX86_BUILTIN_PMOVMSKB 
IX86_BUILTIN_MOVNTPS 
IX86_BUILTIN_MOVNTQ 
IX86_BUILTIN_LOADDQU 
IX86_BUILTIN_STOREDQU 
IX86_BUILTIN_PACKSSWB 
IX86_BUILTIN_PACKSSDW 
IX86_BUILTIN_PACKUSWB 
IX86_BUILTIN_PADDB 
IX86_BUILTIN_PADDW 
IX86_BUILTIN_PADDD 
IX86_BUILTIN_PADDQ 
IX86_BUILTIN_PADDSB 
IX86_BUILTIN_PADDSW 
IX86_BUILTIN_PADDUSB 
IX86_BUILTIN_PADDUSW 
IX86_BUILTIN_PSUBB 
IX86_BUILTIN_PSUBW 
IX86_BUILTIN_PSUBD 
IX86_BUILTIN_PSUBQ 
IX86_BUILTIN_PSUBSB 
IX86_BUILTIN_PSUBSW 
IX86_BUILTIN_PSUBUSB 
IX86_BUILTIN_PSUBUSW 
IX86_BUILTIN_PAND 
IX86_BUILTIN_PANDN 
IX86_BUILTIN_POR 
IX86_BUILTIN_PXOR 
IX86_BUILTIN_PAVGB 
IX86_BUILTIN_PAVGW 
IX86_BUILTIN_PCMPEQB 
IX86_BUILTIN_PCMPEQW 
IX86_BUILTIN_PCMPEQD 
IX86_BUILTIN_PCMPGTB 
IX86_BUILTIN_PCMPGTW 
IX86_BUILTIN_PCMPGTD 
IX86_BUILTIN_PMADDWD 
IX86_BUILTIN_PMAXSW 
IX86_BUILTIN_PMAXUB 
IX86_BUILTIN_PMINSW 
IX86_BUILTIN_PMINUB 
IX86_BUILTIN_PMULHUW 
IX86_BUILTIN_PMULHW 
IX86_BUILTIN_PMULLW 
IX86_BUILTIN_PSADBW 
IX86_BUILTIN_PSHUFW 
IX86_BUILTIN_PSLLW 
IX86_BUILTIN_PSLLD 
IX86_BUILTIN_PSLLQ 
IX86_BUILTIN_PSRAW 
IX86_BUILTIN_PSRAD 
IX86_BUILTIN_PSRLW 
IX86_BUILTIN_PSRLD 
IX86_BUILTIN_PSRLQ 
IX86_BUILTIN_PSLLWI 
IX86_BUILTIN_PSLLDI 
IX86_BUILTIN_PSLLQI 
IX86_BUILTIN_PSRAWI 
IX86_BUILTIN_PSRADI 
IX86_BUILTIN_PSRLWI 
IX86_BUILTIN_PSRLDI 
IX86_BUILTIN_PSRLQI 
IX86_BUILTIN_PUNPCKHBW 
IX86_BUILTIN_PUNPCKHWD 
IX86_BUILTIN_PUNPCKHDQ 
IX86_BUILTIN_PUNPCKLBW 
IX86_BUILTIN_PUNPCKLWD 
IX86_BUILTIN_PUNPCKLDQ 
IX86_BUILTIN_SHUFPS 
IX86_BUILTIN_RCPPS 
IX86_BUILTIN_RCPSS 
IX86_BUILTIN_RSQRTPS 
IX86_BUILTIN_RSQRTSS 
IX86_BUILTIN_SQRTPS 
IX86_BUILTIN_SQRTSS 
IX86_BUILTIN_UNPCKHPS 
IX86_BUILTIN_UNPCKLPS 
IX86_BUILTIN_ANDPS 
IX86_BUILTIN_ANDNPS 
IX86_BUILTIN_ORPS 
IX86_BUILTIN_XORPS 
IX86_BUILTIN_EMMS 
IX86_BUILTIN_LDMXCSR 
IX86_BUILTIN_STMXCSR 
IX86_BUILTIN_SFENCE 
IX86_BUILTIN_FEMMS 
IX86_BUILTIN_PAVGUSB 
IX86_BUILTIN_PF2ID 
IX86_BUILTIN_PFACC 
IX86_BUILTIN_PFADD 
IX86_BUILTIN_PFCMPEQ 
IX86_BUILTIN_PFCMPGE 
IX86_BUILTIN_PFCMPGT 
IX86_BUILTIN_PFMAX 
IX86_BUILTIN_PFMIN 
IX86_BUILTIN_PFMUL 
IX86_BUILTIN_PFRCP 
IX86_BUILTIN_PFRCPIT1 
IX86_BUILTIN_PFRCPIT2 
IX86_BUILTIN_PFRSQIT1 
IX86_BUILTIN_PFRSQRT 
IX86_BUILTIN_PFSUB 
IX86_BUILTIN_PFSUBR 
IX86_BUILTIN_PI2FD 
IX86_BUILTIN_PMULHRW 
IX86_BUILTIN_PF2IW 
IX86_BUILTIN_PFNACC 
IX86_BUILTIN_PFPNACC 
IX86_BUILTIN_PI2FW 
IX86_BUILTIN_PSWAPDSI 
IX86_BUILTIN_PSWAPDSF 
IX86_BUILTIN_ADDPD 
IX86_BUILTIN_ADDSD 
IX86_BUILTIN_DIVPD 
IX86_BUILTIN_DIVSD 
IX86_BUILTIN_MULPD 
IX86_BUILTIN_MULSD 
IX86_BUILTIN_SUBPD 
IX86_BUILTIN_SUBSD 
IX86_BUILTIN_CMPEQPD 
IX86_BUILTIN_CMPLTPD 
IX86_BUILTIN_CMPLEPD 
IX86_BUILTIN_CMPGTPD 
IX86_BUILTIN_CMPGEPD 
IX86_BUILTIN_CMPNEQPD 
IX86_BUILTIN_CMPNLTPD 
IX86_BUILTIN_CMPNLEPD 
IX86_BUILTIN_CMPNGTPD 
IX86_BUILTIN_CMPNGEPD 
IX86_BUILTIN_CMPORDPD 
IX86_BUILTIN_CMPUNORDPD 
IX86_BUILTIN_CMPNEPD 
IX86_BUILTIN_CMPEQSD 
IX86_BUILTIN_CMPLTSD 
IX86_BUILTIN_CMPLESD 
IX86_BUILTIN_CMPNEQSD 
IX86_BUILTIN_CMPNLTSD 
IX86_BUILTIN_CMPNLESD 
IX86_BUILTIN_CMPORDSD 
IX86_BUILTIN_CMPUNORDSD 
IX86_BUILTIN_CMPNESD 
IX86_BUILTIN_COMIEQSD 
IX86_BUILTIN_COMILTSD 
IX86_BUILTIN_COMILESD 
IX86_BUILTIN_COMIGTSD 
IX86_BUILTIN_COMIGESD 
IX86_BUILTIN_COMINEQSD 
IX86_BUILTIN_UCOMIEQSD 
IX86_BUILTIN_UCOMILTSD 
IX86_BUILTIN_UCOMILESD 
IX86_BUILTIN_UCOMIGTSD 
IX86_BUILTIN_UCOMIGESD 
IX86_BUILTIN_UCOMINEQSD 
IX86_BUILTIN_MAXPD 
IX86_BUILTIN_MAXSD 
IX86_BUILTIN_MINPD 
IX86_BUILTIN_MINSD 
IX86_BUILTIN_ANDPD 
IX86_BUILTIN_ANDNPD 
IX86_BUILTIN_ORPD 
IX86_BUILTIN_XORPD 
IX86_BUILTIN_SQRTPD 
IX86_BUILTIN_SQRTSD 
IX86_BUILTIN_UNPCKHPD 
IX86_BUILTIN_UNPCKLPD 
IX86_BUILTIN_SHUFPD 
IX86_BUILTIN_LOADUPD 
IX86_BUILTIN_STOREUPD 
IX86_BUILTIN_MOVSD 
IX86_BUILTIN_LOADHPD 
IX86_BUILTIN_LOADLPD 
IX86_BUILTIN_CVTDQ2PD 
IX86_BUILTIN_CVTDQ2PS 
IX86_BUILTIN_CVTPD2DQ 
IX86_BUILTIN_CVTPD2PI 
IX86_BUILTIN_CVTPD2PS 
IX86_BUILTIN_CVTTPD2DQ 
IX86_BUILTIN_CVTTPD2PI 
IX86_BUILTIN_CVTPI2PD 
IX86_BUILTIN_CVTSI2SD 
IX86_BUILTIN_CVTSI642SD 
IX86_BUILTIN_CVTSD2SI 
IX86_BUILTIN_CVTSD2SI64 
IX86_BUILTIN_CVTSD2SS 
IX86_BUILTIN_CVTSS2SD 
IX86_BUILTIN_CVTTSD2SI 
IX86_BUILTIN_CVTTSD2SI64 
IX86_BUILTIN_CVTPS2DQ 
IX86_BUILTIN_CVTPS2PD 
IX86_BUILTIN_CVTTPS2DQ 
IX86_BUILTIN_MOVNTI 
IX86_BUILTIN_MOVNTPD 
IX86_BUILTIN_MOVNTDQ 
IX86_BUILTIN_MASKMOVDQU 
IX86_BUILTIN_MOVMSKPD 
IX86_BUILTIN_PMOVMSKB128 
IX86_BUILTIN_PACKSSWB128 
IX86_BUILTIN_PACKSSDW128 
IX86_BUILTIN_PACKUSWB128 
IX86_BUILTIN_PADDB128 
IX86_BUILTIN_PADDW128 
IX86_BUILTIN_PADDD128 
IX86_BUILTIN_PADDQ128 
IX86_BUILTIN_PADDSB128 
IX86_BUILTIN_PADDSW128 
IX86_BUILTIN_PADDUSB128 
IX86_BUILTIN_PADDUSW128 
IX86_BUILTIN_PSUBB128 
IX86_BUILTIN_PSUBW128 
IX86_BUILTIN_PSUBD128 
IX86_BUILTIN_PSUBQ128 
IX86_BUILTIN_PSUBSB128 
IX86_BUILTIN_PSUBSW128 
IX86_BUILTIN_PSUBUSB128 
IX86_BUILTIN_PSUBUSW128 
IX86_BUILTIN_PAND128 
IX86_BUILTIN_PANDN128 
IX86_BUILTIN_POR128 
IX86_BUILTIN_PXOR128 
IX86_BUILTIN_PAVGB128 
IX86_BUILTIN_PAVGW128 
IX86_BUILTIN_PCMPEQB128 
IX86_BUILTIN_PCMPEQW128 
IX86_BUILTIN_PCMPEQD128 
IX86_BUILTIN_PCMPGTB128 
IX86_BUILTIN_PCMPGTW128 
IX86_BUILTIN_PCMPGTD128 
IX86_BUILTIN_PMADDWD128 
IX86_BUILTIN_PMAXSW128 
IX86_BUILTIN_PMAXUB128 
IX86_BUILTIN_PMINSW128 
IX86_BUILTIN_PMINUB128 
IX86_BUILTIN_PMULUDQ 
IX86_BUILTIN_PMULUDQ128 
IX86_BUILTIN_PMULHUW128 
IX86_BUILTIN_PMULHW128 
IX86_BUILTIN_PMULLW128 
IX86_BUILTIN_PSADBW128 
IX86_BUILTIN_PSHUFHW 
IX86_BUILTIN_PSHUFLW 
IX86_BUILTIN_PSHUFD 
IX86_BUILTIN_PSLLW128 
IX86_BUILTIN_PSLLD128 
IX86_BUILTIN_PSLLQ128 
IX86_BUILTIN_PSRAW128 
IX86_BUILTIN_PSRAD128 
IX86_BUILTIN_PSRLW128 
IX86_BUILTIN_PSRLD128 
IX86_BUILTIN_PSRLQ128 
IX86_BUILTIN_PSLLDQI128 
IX86_BUILTIN_PSLLWI128 
IX86_BUILTIN_PSLLDI128 
IX86_BUILTIN_PSLLQI128 
IX86_BUILTIN_PSRAWI128 
IX86_BUILTIN_PSRADI128 
IX86_BUILTIN_PSRLDQI128 
IX86_BUILTIN_PSRLWI128 
IX86_BUILTIN_PSRLDI128 
IX86_BUILTIN_PSRLQI128 
IX86_BUILTIN_PUNPCKHBW128 
IX86_BUILTIN_PUNPCKHWD128 
IX86_BUILTIN_PUNPCKHDQ128 
IX86_BUILTIN_PUNPCKHQDQ128 
IX86_BUILTIN_PUNPCKLBW128 
IX86_BUILTIN_PUNPCKLWD128 
IX86_BUILTIN_PUNPCKLDQ128 
IX86_BUILTIN_PUNPCKLQDQ128 
IX86_BUILTIN_CLFLUSH 
IX86_BUILTIN_MFENCE 
IX86_BUILTIN_LFENCE 
IX86_BUILTIN_ADDSUBPS 
IX86_BUILTIN_HADDPS 
IX86_BUILTIN_HSUBPS 
IX86_BUILTIN_MOVSHDUP 
IX86_BUILTIN_MOVSLDUP 
IX86_BUILTIN_ADDSUBPD 
IX86_BUILTIN_HADDPD 
IX86_BUILTIN_HSUBPD 
IX86_BUILTIN_LDDQU 
IX86_BUILTIN_MOVNTSS 
IX86_BUILTIN_MOVNTSD 
IX86_BUILTIN_EXTRQI 
IX86_BUILTIN_EXTRQ 
IX86_BUILTIN_INSERTQI 
IX86_BUILTIN_INSERTQ 
IX86_BUILTIN_MONITOR 
IX86_BUILTIN_MWAIT 
IX86_BUILTIN_VEC_INIT_V2SI 
IX86_BUILTIN_VEC_INIT_V4HI 
IX86_BUILTIN_VEC_INIT_V8QI 
IX86_BUILTIN_VEC_EXT_V2DF 
IX86_BUILTIN_VEC_EXT_V2DI 
IX86_BUILTIN_VEC_EXT_V4SF 
IX86_BUILTIN_VEC_EXT_V4SI 
IX86_BUILTIN_VEC_EXT_V8HI 
IX86_BUILTIN_VEC_EXT_V2SI 
IX86_BUILTIN_VEC_EXT_V4HI 
IX86_BUILTIN_VEC_SET_V8HI 
IX86_BUILTIN_VEC_SET_V4HI 
IX86_BUILTIN_MAX 

Definition at line 2023 of file i386.h.

enum processor_type

Enumerator:
PROCESSOR_EV4 
PROCESSOR_EV5 
PROCESSOR_EV6 
PROCESSOR_I386 
PROCESSOR_I486 
PROCESSOR_PENTIUM 
PROCESSOR_PENTIUMPRO 
PROCESSOR_K6 
PROCESSOR_ATHLON 
PROCESSOR_PENTIUM4 
PROCESSOR_max 
PROCESSOR_M88100 
PROCESSOR_M88110 
PROCESSOR_M88000 
PROCESSOR_700 
PROCESSOR_7100 
PROCESSOR_7100LC 
PROCESSOR_7200 
PROCESSOR_8000 
PROCESSOR_RIOS1 
PROCESSOR_RIOS2 
PROCESSOR_RS64A 
PROCESSOR_MPCCORE 
PROCESSOR_PPC403 
PROCESSOR_PPC405 
PROCESSOR_PPC601 
PROCESSOR_PPC603 
PROCESSOR_PPC604 
PROCESSOR_PPC604e 
PROCESSOR_PPC620 
PROCESSOR_PPC630 
PROCESSOR_PPC750 
PROCESSOR_PPC7400 
PROCESSOR_PPC7450 
PROCESSOR_SH1 
PROCESSOR_SH2 
PROCESSOR_SH3 
PROCESSOR_SH3E 
PROCESSOR_SH4 
PROCESSOR_SH5 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_V7 
PROCESSOR_CYPRESS 
PROCESSOR_V8 
PROCESSOR_SUPERSPARC 
PROCESSOR_SPARCLITE 
PROCESSOR_F930 
PROCESSOR_F934 
PROCESSOR_HYPERSPARC 
PROCESSOR_SPARCLITE86X 
PROCESSOR_SPARCLET 
PROCESSOR_TSC701 
PROCESSOR_V9 
PROCESSOR_ULTRASPARC 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_EV4 
PROCESSOR_EV5 
PROCESSOR_EV6 
PROCESSOR_I386 
PROCESSOR_I486 
PROCESSOR_PENTIUM 
PROCESSOR_PENTIUMPRO 
PROCESSOR_K6 
PROCESSOR_ATHLON 
PROCESSOR_PENTIUM4 
PROCESSOR_max 
PROCESSOR_M88100 
PROCESSOR_M88110 
PROCESSOR_M88000 
PROCESSOR_700 
PROCESSOR_7100 
PROCESSOR_7100LC 
PROCESSOR_7200 
PROCESSOR_8000 
PROCESSOR_RIOS1 
PROCESSOR_RIOS2 
PROCESSOR_RS64A 
PROCESSOR_MPCCORE 
PROCESSOR_PPC403 
PROCESSOR_PPC405 
PROCESSOR_PPC601 
PROCESSOR_PPC603 
PROCESSOR_PPC604 
PROCESSOR_PPC604e 
PROCESSOR_PPC620 
PROCESSOR_PPC630 
PROCESSOR_PPC750 
PROCESSOR_PPC7400 
PROCESSOR_PPC7450 
PROCESSOR_SH1 
PROCESSOR_SH2 
PROCESSOR_SH3 
PROCESSOR_SH3E 
PROCESSOR_SH4 
PROCESSOR_SH5 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_V7 
PROCESSOR_CYPRESS 
PROCESSOR_V8 
PROCESSOR_SUPERSPARC 
PROCESSOR_SPARCLITE 
PROCESSOR_F930 
PROCESSOR_F934 
PROCESSOR_HYPERSPARC 
PROCESSOR_SPARCLITE86X 
PROCESSOR_SPARCLET 
PROCESSOR_TSC701 
PROCESSOR_V9 
PROCESSOR_ULTRASPARC 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_EV4 
PROCESSOR_EV5 
PROCESSOR_EV6 
PROCESSOR_MAX 
ARM_CORE 
PROCESSOR_I386 
PROCESSOR_I486 
PROCESSOR_PENTIUM 
PROCESSOR_PENTIUMPRO 
PROCESSOR_K6 
PROCESSOR_ATHLON 
PROCESSOR_PENTIUM4 
PROCESSOR_K8 
PROCESSOR_NOCONA 
PROCESSOR_max 
PROCESSOR_ITANIUM 
PROCESSOR_ITANIUM2 
PROCESSOR_max 
PROCESSOR_DEFAULT 
PROCESSOR_IQ2000 
PROCESSOR_IQ10 
PROCESSOR_DEFAULT 
PROCESSOR_4KC 
PROCESSOR_5KC 
PROCESSOR_20KC 
PROCESSOR_M4K 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4130 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R7000 
PROCESSOR_R8000 
PROCESSOR_R9000 
PROCESSOR_SB1 
PROCESSOR_SR71000 
PROCESSOR_700 
PROCESSOR_7100 
PROCESSOR_7100LC 
PROCESSOR_7200 
PROCESSOR_7300 
PROCESSOR_8000 
PROCESSOR_RIOS1 
PROCESSOR_RIOS2 
PROCESSOR_RS64A 
PROCESSOR_MPCCORE 
PROCESSOR_PPC403 
PROCESSOR_PPC405 
PROCESSOR_PPC440 
PROCESSOR_PPC601 
PROCESSOR_PPC603 
PROCESSOR_PPC604 
PROCESSOR_PPC604e 
PROCESSOR_PPC620 
PROCESSOR_PPC630 
PROCESSOR_PPC750 
PROCESSOR_PPC7400 
PROCESSOR_PPC7450 
PROCESSOR_PPC8540 
PROCESSOR_POWER4 
PROCESSOR_POWER5 
PROCESSOR_9672_G5 
PROCESSOR_9672_G6 
PROCESSOR_2064_Z900 
PROCESSOR_2084_Z990 
PROCESSOR_max 
PROCESSOR_SH1 
PROCESSOR_SH2 
PROCESSOR_SH2E 
PROCESSOR_SH2A 
PROCESSOR_SH3 
PROCESSOR_SH3E 
PROCESSOR_SH4 
PROCESSOR_SH4A 
PROCESSOR_SH5 
PROCESSOR_V7 
PROCESSOR_CYPRESS 
PROCESSOR_V8 
PROCESSOR_SUPERSPARC 
PROCESSOR_SPARCLITE 
PROCESSOR_F930 
PROCESSOR_F934 
PROCESSOR_HYPERSPARC 
PROCESSOR_SPARCLITE86X 
PROCESSOR_SPARCLET 
PROCESSOR_TSC701 
PROCESSOR_V9 
PROCESSOR_ULTRASPARC 
PROCESSOR_ULTRASPARC3 
PROCESSOR_EV4 
PROCESSOR_EV5 
PROCESSOR_EV6 
PROCESSOR_MAX 
ARM_CORE 
PROCESSOR_I386 
PROCESSOR_I486 
PROCESSOR_PENTIUM 
PROCESSOR_PENTIUMPRO 
PROCESSOR_K6 
PROCESSOR_ATHLON 
PROCESSOR_PENTIUM4 
PROCESSOR_K8 
PROCESSOR_NOCONA 
PROCESSOR_GENERIC32 
PROCESSOR_GENERIC64 
PROCESSOR_AMDFAM10 
PROCESSOR_max 
PROCESSOR_ITANIUM 
PROCESSOR_ITANIUM2 
PROCESSOR_max 
PROCESSOR_DEFAULT 
PROCESSOR_IQ2000 
PROCESSOR_IQ10 
PROCESSOR_R3000 
PROCESSOR_4KC 
PROCESSOR_4KP 
PROCESSOR_5KC 
PROCESSOR_5KF 
PROCESSOR_20KC 
PROCESSOR_24K 
PROCESSOR_24KX 
PROCESSOR_M4K 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4130 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R7000 
PROCESSOR_R8000 
PROCESSOR_R9000 
PROCESSOR_SB1 
PROCESSOR_SB1A 
PROCESSOR_SR71000 
PROCESSOR_MAX 
PROCESSOR_MN10300 
PROCESSOR_AM33 
PROCESSOR_AM33_2 
PROCESSOR_MS1_64_001 
PROCESSOR_MS1_16_002 
PROCESSOR_MS1_16_003 
PROCESSOR_MS2 
PROCESSOR_700 
PROCESSOR_7100 
PROCESSOR_7100LC 
PROCESSOR_7200 
PROCESSOR_7300 
PROCESSOR_8000 
PROCESSOR_RIOS1 
PROCESSOR_RIOS2 
PROCESSOR_RS64A 
PROCESSOR_MPCCORE 
PROCESSOR_PPC403 
PROCESSOR_PPC405 
PROCESSOR_PPC440 
PROCESSOR_PPC601 
PROCESSOR_PPC603 
PROCESSOR_PPC604 
PROCESSOR_PPC604e 
PROCESSOR_PPC620 
PROCESSOR_PPC630 
PROCESSOR_PPC750 
PROCESSOR_PPC7400 
PROCESSOR_PPC7450 
PROCESSOR_PPC8540 
PROCESSOR_POWER4 
PROCESSOR_POWER5 
PROCESSOR_9672_G5 
PROCESSOR_9672_G6 
PROCESSOR_2064_Z900 
PROCESSOR_2084_Z990 
PROCESSOR_2094_Z9_109 
PROCESSOR_max 
PROCESSOR_SH1 
PROCESSOR_SH2 
PROCESSOR_SH2E 
PROCESSOR_SH2A 
PROCESSOR_SH3 
PROCESSOR_SH3E 
PROCESSOR_SH4 
PROCESSOR_SH4A 
PROCESSOR_SH5 
PROCESSOR_V7 
PROCESSOR_CYPRESS 
PROCESSOR_V8 
PROCESSOR_SUPERSPARC 
PROCESSOR_SPARCLITE 
PROCESSOR_F930 
PROCESSOR_F934 
PROCESSOR_HYPERSPARC 
PROCESSOR_SPARCLITE86X 
PROCESSOR_SPARCLET 
PROCESSOR_TSC701 
PROCESSOR_V9 
PROCESSOR_ULTRASPARC 
PROCESSOR_ULTRASPARC3 
PROCESSOR_NIAGARA 

Definition at line 2803 of file i386.h.

enum reg_class

Enumerator:
NO_REGS 
R2 
R0_1 
INDEX_REGS 
BASE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LR0_REGS 
GENERAL_REGS 
BP_REGS 
FC_REGS 
CR_REGS 
Q_REGS 
SPECIAL_REGS 
ACCUM0_REGS 
ACCUM_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R24_REG 
R25_REG 
R27_REG 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LPCOUNT_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPU_REGS 
LO_REGS 
STACK_REG 
BASE_REGS 
HI_REGS 
CC_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
POINTER_X_REGS 
POINTER_Y_REGS 
POINTER_Z_REGS 
STACK_REG 
BASE_POINTER_REGS 
POINTER_REGS 
ADDW_REGS 
SIMPLE_LD_REGS 
LD_REGS 
NO_LD_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0R1_REGS 
R2R3_REGS 
EXT_LOW_REGS 
EXT_REGS 
ADDR_REGS 
INDEX_REGS 
BK_REG 
SP_REG 
RC_REG 
COUNTER_REGS 
INT_REGS 
GENERAL_REGS 
DP_REG 
ST_REG 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
S_REGS 
INDEX_REGS 
SP_REGS 
A_REGS 
SI_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
REPEAT_REGS 
CR_REGS 
ACCUM_REGS 
OTHER_FLAG_REGS 
F0_REGS 
F1_REGS 
BR_FLAG_REGS 
FLAG_REGS 
EVEN_REGS 
GPR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
A0H_REG 
A0L_REG 
A0_REG 
A1H_REG 
ACCUM_HIGH_REGS 
A1L_REG 
ACCUM_LOW_REGS 
A1_REG 
ACCUM_REGS 
X_REG 
X_OR_ACCUM_LOW_REGS 
X_OR_ACCUM_REGS 
YH_REG 
YH_OR_ACCUM_HIGH_REGS 
X_OR_YH_REGS 
YL_REG 
YL_OR_ACCUM_LOW_REGS 
X_OR_YL_REGS 
X_OR_Y_REGS 
Y_REG 
ACCUM_OR_Y_REGS 
PH_REG 
X_OR_PH_REGS 
PL_REG 
PL_OR_ACCUM_LOW_REGS 
X_OR_PL_REGS 
YL_OR_PL_OR_ACCUM_LOW_REGS 
P_REG 
ACCUM_OR_P_REGS 
YL_OR_P_REGS 
ACCUM_LOW_OR_YL_OR_P_REGS 
Y_OR_P_REGS 
ACCUM_Y_OR_P_REGS 
NO_FRAME_Y_ADDR_REGS 
Y_ADDR_REGS 
ACCUM_LOW_OR_Y_ADDR_REGS 
ACCUM_OR_Y_ADDR_REGS 
X_OR_Y_ADDR_REGS 
Y_OR_Y_ADDR_REGS 
P_OR_Y_ADDR_REGS 
NON_HIGH_YBASE_ELIGIBLE_REGS 
YBASE_ELIGIBLE_REGS 
J_REG 
J_OR_DAU_16_BIT_REGS 
BMU_REGS 
NOHIGH_NON_ADDR_REGS 
NON_ADDR_REGS 
SLOW_MEM_LOAD_REGS 
NOHIGH_NON_YBASE_REGS 
NO_ACCUM_NON_YBASE_REGS 
NON_YBASE_REGS 
YBASE_VIRT_REGS 
ACCUM_LOW_OR_YBASE_REGS 
ACCUM_OR_YBASE_REGS 
X_OR_YBASE_REGS 
Y_OR_YBASE_REGS 
ACCUM_LOW_YL_PL_OR_YBASE_REGS 
P_OR_YBASE_REGS 
ACCUM_Y_P_OR_YBASE_REGS 
Y_ADDR_OR_YBASE_REGS 
YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS 
YBASE_OR_YBASE_ELIGIBLE_REGS 
NO_HIGH_ALL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MULTIPLY_32_REG 
MULTIPLY_64_REG 
LOW_REGS 
HIGH_REGS 
REAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
MAC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ADDR_REGS 
DATA_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AREG 
DREG 
CREG 
BREG 
SIREG 
DIREG 
AD_REGS 
Q_REGS 
NON_Q_REGS 
INDEX_REGS 
LEGACY_REGS 
GENERAL_REGS 
FP_TOP_REG 
FP_SECOND_REG 
FLOAT_REGS 
SSE_REGS 
MMX_REGS 
FP_TOP_SSE_REGS 
FP_SECOND_SSE_REGS 
FLOAT_SSE_REGS 
FLOAT_INT_REGS 
INT_SSE_REGS 
FLOAT_INT_SSE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GLOBAL_REGS 
LOCAL_REGS 
LOCAL_OR_GLOBAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
PR_REGS 
BR_REGS 
AR_M_REGS 
AR_I_REGS 
ADDL_REGS 
GR_REGS 
FR_REGS 
GR_AND_BR_REGS 
GR_AND_FR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CARRY_REG 
ACCUM_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
D_REGS 
X_REGS 
Y_REGS 
SP_REGS 
DA_REGS 
DB_REGS 
Z_REGS 
D8_REGS 
Q_REGS 
D_OR_X_REGS 
D_OR_Y_REGS 
D_OR_SP_REGS 
X_OR_Y_REGS 
A_REGS 
X_OR_SP_REGS 
Y_OR_SP_REGS 
X_OR_Y_OR_D_REGS 
A_OR_D_REGS 
A_OR_SP_REGS 
H_REGS 
S_REGS 
D_OR_S_REGS 
X_OR_S_REGS 
Y_OR_S_REGS 
SP_OR_S_REGS 
D_OR_X_OR_S_REGS 
D_OR_Y_OR_S_REGS 
D_OR_SP_OR_S_REGS 
A_OR_S_REGS 
D_OR_A_OR_S_REGS 
TMP_REGS 
D_OR_A_OR_TMP_REGS 
G_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDR_REGS 
FP_REGS 
GENERAL_REGS 
DATA_OR_FP_REGS 
ADDR_OR_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AP_REG 
XRF_REGS 
GENERAL_REGS 
AGRF_REGS 
XGRF_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ONLYR1_REGS 
LRW_REGS 
GENERAL_REGS 
C_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
REMAINDER_REG 
HIMULT_REG 
SYSTEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
SP_REGS 
DATA_OR_ADDRESS_REGS 
SP_OR_ADDRESS_REGS 
EXTENDED_REGS 
DATA_OR_EXTENDED_REGS 
ADDRESS_OR_EXTENDED_REGS 
SP_OR_EXTENDED_REGS 
SP_OR_ADDRESS_OR_EXTENDED_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REG0 
LONG_FLOAT_REG0 
FLOAT_REGS 
FP_REGS 
GEN_AND_FP_REGS 
FRAME_POINTER_REG 
STACK_POINTER_REG 
GEN_AND_MEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MUL_REGS 
GENERAL_REGS 
LOAD_FPU_REGS 
NO_LOAD_FPU_REGS 
FPU_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
OUT_REGS 
STD_REGS 
ARG_REGS 
SRC_REGS 
DST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R15_REGS 
BASE_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BASE_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALTIVEC_REGS 
VRSAVE_REGS 
NON_SPECIAL_REGS 
MQ_REGS 
LINK_REGS 
CTR_REGS 
LINK_OR_CTR_REGS 
SPECIAL_REGS 
SPEC_OR_GEN_REGS 
CR0_REGS 
CR_REGS 
NON_FLOAT_REGS 
XER_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ADDR_REGS 
GENERAL_REGS 
FP_REGS 
ADDR_FP_REGS 
GENERAL_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
PR_REGS 
T_REGS 
MAC_REGS 
FPUL_REGS 
SIBCALL_REGS 
GENERAL_REGS 
FP0_REGS 
FP_REGS 
DF_REGS 
FPSCR_REGS 
GENERAL_FP_REGS 
TARGET_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPCC_REGS 
I64_REGS 
GENERAL_REGS 
FP_REGS 
EXTRA_FP_REGS 
GENERAL_OR_FP_REGS 
GENERAL_OR_EXTRA_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R1_REGS 
TWO_REGS 
R2_REGS 
EIGHT_REGS 
R8_REGS 
ICALL_REGS 
GENERAL_REGS 
CARRY_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BR_REGS 
FP_REGS 
ACC_REG 
SP_REG 
RL_REGS 
GR_REGS 
AR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R2 
R0_1 
INDEX_REGS 
BASE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LR0_REGS 
GENERAL_REGS 
BP_REGS 
FC_REGS 
CR_REGS 
Q_REGS 
SPECIAL_REGS 
ACCUM0_REGS 
ACCUM_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R24_REG 
R25_REG 
R27_REG 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LPCOUNT_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPU_REGS 
LO_REGS 
STACK_REG 
BASE_REGS 
HI_REGS 
CC_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
POINTER_X_REGS 
POINTER_Y_REGS 
POINTER_Z_REGS 
STACK_REG 
BASE_POINTER_REGS 
POINTER_REGS 
ADDW_REGS 
SIMPLE_LD_REGS 
LD_REGS 
NO_LD_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0R1_REGS 
R2R3_REGS 
EXT_LOW_REGS 
EXT_REGS 
ADDR_REGS 
INDEX_REGS 
BK_REG 
SP_REG 
RC_REG 
COUNTER_REGS 
INT_REGS 
GENERAL_REGS 
DP_REG 
ST_REG 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
S_REGS 
INDEX_REGS 
SP_REGS 
A_REGS 
SI_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
REPEAT_REGS 
CR_REGS 
ACCUM_REGS 
OTHER_FLAG_REGS 
F0_REGS 
F1_REGS 
BR_FLAG_REGS 
FLAG_REGS 
EVEN_REGS 
GPR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
A0H_REG 
A0L_REG 
A0_REG 
A1H_REG 
ACCUM_HIGH_REGS 
A1L_REG 
ACCUM_LOW_REGS 
A1_REG 
ACCUM_REGS 
X_REG 
X_OR_ACCUM_LOW_REGS 
X_OR_ACCUM_REGS 
YH_REG 
YH_OR_ACCUM_HIGH_REGS 
X_OR_YH_REGS 
YL_REG 
YL_OR_ACCUM_LOW_REGS 
X_OR_YL_REGS 
X_OR_Y_REGS 
Y_REG 
ACCUM_OR_Y_REGS 
PH_REG 
X_OR_PH_REGS 
PL_REG 
PL_OR_ACCUM_LOW_REGS 
X_OR_PL_REGS 
YL_OR_PL_OR_ACCUM_LOW_REGS 
P_REG 
ACCUM_OR_P_REGS 
YL_OR_P_REGS 
ACCUM_LOW_OR_YL_OR_P_REGS 
Y_OR_P_REGS 
ACCUM_Y_OR_P_REGS 
NO_FRAME_Y_ADDR_REGS 
Y_ADDR_REGS 
ACCUM_LOW_OR_Y_ADDR_REGS 
ACCUM_OR_Y_ADDR_REGS 
X_OR_Y_ADDR_REGS 
Y_OR_Y_ADDR_REGS 
P_OR_Y_ADDR_REGS 
NON_HIGH_YBASE_ELIGIBLE_REGS 
YBASE_ELIGIBLE_REGS 
J_REG 
J_OR_DAU_16_BIT_REGS 
BMU_REGS 
NOHIGH_NON_ADDR_REGS 
NON_ADDR_REGS 
SLOW_MEM_LOAD_REGS 
NOHIGH_NON_YBASE_REGS 
NO_ACCUM_NON_YBASE_REGS 
NON_YBASE_REGS 
YBASE_VIRT_REGS 
ACCUM_LOW_OR_YBASE_REGS 
ACCUM_OR_YBASE_REGS 
X_OR_YBASE_REGS 
Y_OR_YBASE_REGS 
ACCUM_LOW_YL_PL_OR_YBASE_REGS 
P_OR_YBASE_REGS 
ACCUM_Y_P_OR_YBASE_REGS 
Y_ADDR_OR_YBASE_REGS 
YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS 
YBASE_OR_YBASE_ELIGIBLE_REGS 
NO_HIGH_ALL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MULTIPLY_32_REG 
MULTIPLY_64_REG 
LOW_REGS 
HIGH_REGS 
REAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
MAC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ADDR_REGS 
DATA_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AREG 
DREG 
CREG 
BREG 
SIREG 
DIREG 
AD_REGS 
Q_REGS 
NON_Q_REGS 
INDEX_REGS 
LEGACY_REGS 
GENERAL_REGS 
FP_TOP_REG 
FP_SECOND_REG 
FLOAT_REGS 
SSE_REGS 
MMX_REGS 
FP_TOP_SSE_REGS 
FP_SECOND_SSE_REGS 
FLOAT_SSE_REGS 
FLOAT_INT_REGS 
INT_SSE_REGS 
FLOAT_INT_SSE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GLOBAL_REGS 
LOCAL_REGS 
LOCAL_OR_GLOBAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
PR_REGS 
BR_REGS 
AR_M_REGS 
AR_I_REGS 
ADDL_REGS 
GR_REGS 
FR_REGS 
GR_AND_BR_REGS 
GR_AND_FR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CARRY_REG 
ACCUM_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
D_REGS 
X_REGS 
Y_REGS 
SP_REGS 
DA_REGS 
DB_REGS 
Z_REGS 
D8_REGS 
Q_REGS 
D_OR_X_REGS 
D_OR_Y_REGS 
D_OR_SP_REGS 
X_OR_Y_REGS 
A_REGS 
X_OR_SP_REGS 
Y_OR_SP_REGS 
X_OR_Y_OR_D_REGS 
A_OR_D_REGS 
A_OR_SP_REGS 
H_REGS 
S_REGS 
D_OR_S_REGS 
X_OR_S_REGS 
Y_OR_S_REGS 
SP_OR_S_REGS 
D_OR_X_OR_S_REGS 
D_OR_Y_OR_S_REGS 
D_OR_SP_OR_S_REGS 
A_OR_S_REGS 
D_OR_A_OR_S_REGS 
TMP_REGS 
D_OR_A_OR_TMP_REGS 
G_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDR_REGS 
FP_REGS 
GENERAL_REGS 
DATA_OR_FP_REGS 
ADDR_OR_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AP_REG 
XRF_REGS 
GENERAL_REGS 
AGRF_REGS 
XGRF_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ONLYR1_REGS 
LRW_REGS 
GENERAL_REGS 
C_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
REMAINDER_REG 
HIMULT_REG 
SYSTEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
SP_REGS 
DATA_OR_ADDRESS_REGS 
SP_OR_ADDRESS_REGS 
EXTENDED_REGS 
DATA_OR_EXTENDED_REGS 
ADDRESS_OR_EXTENDED_REGS 
SP_OR_EXTENDED_REGS 
SP_OR_ADDRESS_OR_EXTENDED_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REG0 
LONG_FLOAT_REG0 
FLOAT_REGS 
FP_REGS 
GEN_AND_FP_REGS 
FRAME_POINTER_REG 
STACK_POINTER_REG 
GEN_AND_MEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MUL_REGS 
GENERAL_REGS 
LOAD_FPU_REGS 
NO_LOAD_FPU_REGS 
FPU_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
OUT_REGS 
STD_REGS 
ARG_REGS 
SRC_REGS 
DST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R15_REGS 
BASE_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BASE_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALTIVEC_REGS 
VRSAVE_REGS 
NON_SPECIAL_REGS 
MQ_REGS 
LINK_REGS 
CTR_REGS 
LINK_OR_CTR_REGS 
SPECIAL_REGS 
SPEC_OR_GEN_REGS 
CR0_REGS 
CR_REGS 
NON_FLOAT_REGS 
XER_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ADDR_REGS 
GENERAL_REGS 
FP_REGS 
ADDR_FP_REGS 
GENERAL_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
PR_REGS 
T_REGS 
MAC_REGS 
FPUL_REGS 
SIBCALL_REGS 
GENERAL_REGS 
FP0_REGS 
FP_REGS 
DF_REGS 
FPSCR_REGS 
GENERAL_FP_REGS 
TARGET_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPCC_REGS 
I64_REGS 
GENERAL_REGS 
FP_REGS 
EXTRA_FP_REGS 
GENERAL_OR_FP_REGS 
GENERAL_OR_EXTRA_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R1_REGS 
TWO_REGS 
R2_REGS 
EIGHT_REGS 
R8_REGS 
ICALL_REGS 
GENERAL_REGS 
CARRY_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BR_REGS 
FP_REGS 
ACC_REG 
SP_REG 
RL_REGS 
GR_REGS 
AR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
R24_REG 
R25_REG 
R27_REG 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LPCOUNT_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPA_REGS 
CIRRUS_REGS 
VFP_REGS 
IWMMXT_GR_REGS 
IWMMXT_REGS 
LO_REGS 
STACK_REG 
BASE_REGS 
HI_REGS 
CC_REG 
VFPCC_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
POINTER_X_REGS 
POINTER_Y_REGS 
POINTER_Z_REGS 
STACK_REG 
BASE_POINTER_REGS 
POINTER_REGS 
ADDW_REGS 
SIMPLE_LD_REGS 
LD_REGS 
NO_LD_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
IREGS 
BREGS 
LREGS 
MREGS 
CIRCREGS 
DAGREGS 
EVEN_AREGS 
ODD_AREGS 
AREGS 
CCREGS 
EVEN_DREGS 
ODD_DREGS 
DREGS 
PREGS_CLOBBERED 
PREGS 
DPREGS 
MOST_REGS 
PROLOGUE_REGS 
NON_A_CC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0R1_REGS 
R2R3_REGS 
EXT_LOW_REGS 
EXT_REGS 
ADDR_REGS 
INDEX_REGS 
BK_REG 
SP_REG 
RC_REG 
COUNTER_REGS 
INT_REGS 
GENERAL_REGS 
DP_REG 
ST_REG 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MULTIPLY_32_REG 
MULTIPLY_64_REG 
LOW_REGS 
HIGH_REGS 
REAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ICC_REGS 
FCC_REGS 
CC_REGS 
ICR_REGS 
FCR_REGS 
CR_REGS 
LCR_REG 
LR_REG 
GR8_REGS 
GR9_REGS 
GR89_REGS 
FDPIC_REGS 
FDPIC_FPTR_REGS 
FDPIC_CALL_REGS 
SPR_REGS 
QUAD_ACC_REGS 
EVEN_ACC_REGS 
ACC_REGS 
ACCG_REGS 
QUAD_FPR_REGS 
FEVEN_REGS 
FPR_REGS 
QUAD_REGS 
EVEN_REGS 
GPR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
COUNTER_REGS 
SOURCE_REGS 
DESTINATION_REGS 
GENERAL_REGS 
MAC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AREG 
DREG 
CREG 
BREG 
SIREG 
DIREG 
AD_REGS 
Q_REGS 
NON_Q_REGS 
INDEX_REGS 
LEGACY_REGS 
GENERAL_REGS 
FP_TOP_REG 
FP_SECOND_REG 
FLOAT_REGS 
SSE_REGS 
MMX_REGS 
FP_TOP_SSE_REGS 
FP_SECOND_SSE_REGS 
FLOAT_SSE_REGS 
FLOAT_INT_REGS 
INT_SSE_REGS 
FLOAT_INT_SSE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
PR_REGS 
BR_REGS 
AR_M_REGS 
AR_I_REGS 
ADDL_REGS 
GR_REGS 
FR_REGS 
GR_AND_BR_REGS 
GR_AND_FR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DPH_REGS 
DPL_REGS 
DP_REGS 
SP_REGS 
IPH_REGS 
IPL_REGS 
IP_REGS 
DP_SP_REGS 
PTR_REGS 
NONPTR_REGS 
NONSP_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CARRY_REG 
ACCUM_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
D_REGS 
X_REGS 
Y_REGS 
SP_REGS 
DA_REGS 
DB_REGS 
Z_REGS 
D8_REGS 
Q_REGS 
D_OR_X_REGS 
D_OR_Y_REGS 
D_OR_SP_REGS 
X_OR_Y_REGS 
A_REGS 
X_OR_SP_REGS 
Y_OR_SP_REGS 
X_OR_Y_OR_D_REGS 
A_OR_D_REGS 
A_OR_SP_REGS 
H_REGS 
S_REGS 
D_OR_S_REGS 
X_OR_S_REGS 
Y_OR_S_REGS 
Z_OR_S_REGS 
SP_OR_S_REGS 
D_OR_X_OR_S_REGS 
D_OR_Y_OR_S_REGS 
D_OR_SP_OR_S_REGS 
A_OR_S_REGS 
D_OR_A_OR_S_REGS 
TMP_REGS 
D_OR_A_OR_TMP_REGS 
G_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDR_REGS 
FP_REGS 
GENERAL_REGS 
DATA_OR_FP_REGS 
ADDR_OR_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ONLYR1_REGS 
LRW_REGS 
GENERAL_REGS 
C_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
PIC_FN_ADDR_REG 
LEA_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
REMAINDER_REG 
HIMULT_REG 
SYSTEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
SP_REGS 
DATA_OR_ADDRESS_REGS 
SP_OR_ADDRESS_REGS 
EXTENDED_REGS 
DATA_OR_EXTENDED_REGS 
ADDRESS_OR_EXTENDED_REGS 
SP_OR_EXTENDED_REGS 
SP_OR_ADDRESS_OR_EXTENDED_REGS 
FP_REGS 
FP_ACC_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REG0 
LONG_FLOAT_REG0 
FLOAT_REGS 
LONG_REGS 
FP_REGS 
GEN_AND_FP_REGS 
FRAME_POINTER_REG 
STACK_POINTER_REG 
GEN_AND_MEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MUL_REGS 
GENERAL_REGS 
LOAD_FPU_REGS 
NO_LOAD_FPU_REGS 
FPU_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BASE_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALTIVEC_REGS 
VRSAVE_REGS 
VSCR_REGS 
SPE_ACC_REGS 
SPEFSCR_REGS 
NON_SPECIAL_REGS 
MQ_REGS 
LINK_REGS 
CTR_REGS 
LINK_OR_CTR_REGS 
SPECIAL_REGS 
SPEC_OR_GEN_REGS 
CR0_REGS 
CR_REGS 
NON_FLOAT_REGS 
XER_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CC_REGS 
ADDR_REGS 
GENERAL_REGS 
ACCESS_REGS 
ADDR_CC_REGS 
GENERAL_CC_REGS 
FP_REGS 
ADDR_FP_REGS 
GENERAL_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
PR_REGS 
T_REGS 
MAC_REGS 
FPUL_REGS 
SIBCALL_REGS 
GENERAL_REGS 
FP0_REGS 
FP_REGS 
DF_HI_REGS 
DF_REGS 
FPSCR_REGS 
GENERAL_FP_REGS 
TARGET_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPCC_REGS 
I64_REGS 
GENERAL_REGS 
FP_REGS 
EXTRA_FP_REGS 
GENERAL_OR_FP_REGS 
GENERAL_OR_EXTRA_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R1_REGS 
TWO_REGS 
R2_REGS 
EIGHT_REGS 
R8_REGS 
ICALL_REGS 
GENERAL_REGS 
CARRY_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BR_REGS 
FP_REGS 
ACC_REG 
SP_REG 
RL_REGS 
GR_REGS 
AR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
R24_REG 
R25_REG 
R27_REG 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LPCOUNT_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPA_REGS 
CIRRUS_REGS 
VFP_REGS 
IWMMXT_GR_REGS 
IWMMXT_REGS 
LO_REGS 
STACK_REG 
BASE_REGS 
HI_REGS 
CC_REG 
VFPCC_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
POINTER_X_REGS 
POINTER_Y_REGS 
POINTER_Z_REGS 
STACK_REG 
BASE_POINTER_REGS 
POINTER_REGS 
ADDW_REGS 
SIMPLE_LD_REGS 
LD_REGS 
NO_LD_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
IREGS 
BREGS 
LREGS 
MREGS 
CIRCREGS 
DAGREGS 
EVEN_AREGS 
ODD_AREGS 
AREGS 
CCREGS 
EVEN_DREGS 
ODD_DREGS 
DREGS 
FDPIC_REGS 
FDPIC_FPTR_REGS 
PREGS_CLOBBERED 
PREGS 
IPREGS 
DPREGS 
MOST_REGS 
LT_REGS 
LC_REGS 
LB_REGS 
PROLOGUE_REGS 
NON_A_CC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0R1_REGS 
R2R3_REGS 
EXT_LOW_REGS 
EXT_REGS 
ADDR_REGS 
INDEX_REGS 
BK_REG 
SP_REG 
RC_REG 
COUNTER_REGS 
INT_REGS 
GENERAL_REGS 
DP_REG 
ST_REG 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MOF_REGS 
CC0_REGS 
SPECIAL_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LO_REGS 
HI_REGS 
HILO_REGS 
NOSP_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MULTIPLY_32_REG 
MULTIPLY_64_REG 
LOW_REGS 
HIGH_REGS 
REAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ICC_REGS 
FCC_REGS 
CC_REGS 
ICR_REGS 
FCR_REGS 
CR_REGS 
LCR_REG 
LR_REG 
GR8_REGS 
GR9_REGS 
GR89_REGS 
FDPIC_REGS 
FDPIC_FPTR_REGS 
FDPIC_CALL_REGS 
SPR_REGS 
QUAD_ACC_REGS 
EVEN_ACC_REGS 
ACC_REGS 
ACCG_REGS 
QUAD_FPR_REGS 
FEVEN_REGS 
FPR_REGS 
QUAD_REGS 
EVEN_REGS 
GPR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
COUNTER_REGS 
SOURCE_REGS 
DESTINATION_REGS 
GENERAL_REGS 
MAC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AREG 
DREG 
CREG 
BREG 
SIREG 
DIREG 
AD_REGS 
Q_REGS 
NON_Q_REGS 
INDEX_REGS 
LEGACY_REGS 
GENERAL_REGS 
FP_TOP_REG 
FP_SECOND_REG 
FLOAT_REGS 
SSE_REGS 
MMX_REGS 
FP_TOP_SSE_REGS 
FP_SECOND_SSE_REGS 
FLOAT_SSE_REGS 
FLOAT_INT_REGS 
INT_SSE_REGS 
FLOAT_INT_SSE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
PR_REGS 
BR_REGS 
AR_M_REGS 
AR_I_REGS 
ADDL_REGS 
GR_REGS 
FP_REGS 
FR_REGS 
GR_AND_BR_REGS 
GR_AND_FR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
SP_REGS 
FB_REGS 
SB_REGS 
CR_REGS 
R0_REGS 
R1_REGS 
R2_REGS 
R3_REGS 
R02_REGS 
HL_REGS 
QI_REGS 
R23_REGS 
R03_REGS 
DI_REGS 
A0_REGS 
A1_REGS 
A_REGS 
AD_REGS 
PS_REGS 
SI_REGS 
HI_REGS 
RA_REGS 
GENERAL_REGS 
FLG_REGS 
HC_REGS 
MEM_REGS 
R02_A_MEM_REGS 
A_HL_MEM_REGS 
R1_R3_A_MEM_REGS 
R03_MEM_REGS 
A_HI_MEM_REGS 
A_AD_CR_MEM_SI_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CARRY_REG 
ACCUM_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
D_REGS 
X_REGS 
Y_REGS 
SP_REGS 
DA_REGS 
DB_REGS 
Z_REGS 
D8_REGS 
Q_REGS 
D_OR_X_REGS 
D_OR_Y_REGS 
D_OR_SP_REGS 
X_OR_Y_REGS 
A_REGS 
X_OR_SP_REGS 
Y_OR_SP_REGS 
X_OR_Y_OR_D_REGS 
A_OR_D_REGS 
A_OR_SP_REGS 
H_REGS 
S_REGS 
D_OR_S_REGS 
X_OR_S_REGS 
Y_OR_S_REGS 
Z_OR_S_REGS 
SP_OR_S_REGS 
D_OR_X_OR_S_REGS 
D_OR_Y_OR_S_REGS 
D_OR_SP_OR_S_REGS 
A_OR_S_REGS 
D_OR_A_OR_S_REGS 
TMP_REGS 
D_OR_A_OR_TMP_REGS 
G_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDR_REGS 
FP_REGS 
GENERAL_REGS 
DATA_OR_FP_REGS 
ADDR_OR_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ONLYR1_REGS 
LRW_REGS 
GENERAL_REGS 
C_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
PIC_FN_ADDR_REG 
V1_REG 
LEA_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
DSP_ACC_REGS 
ACC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
REMAINDER_REG 
HIMULT_REG 
SYSTEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
SP_REGS 
DATA_OR_ADDRESS_REGS 
SP_OR_ADDRESS_REGS 
EXTENDED_REGS 
DATA_OR_EXTENDED_REGS 
ADDRESS_OR_EXTENDED_REGS 
SP_OR_EXTENDED_REGS 
SP_OR_ADDRESS_OR_EXTENDED_REGS 
FP_REGS 
FP_ACC_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MUL_REGS 
GENERAL_REGS 
LOAD_FPU_REGS 
NO_LOAD_FPU_REGS 
FPU_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BASE_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALTIVEC_REGS 
VRSAVE_REGS 
VSCR_REGS 
SPE_ACC_REGS 
SPEFSCR_REGS 
NON_SPECIAL_REGS 
MQ_REGS 
LINK_REGS 
CTR_REGS 
LINK_OR_CTR_REGS 
SPECIAL_REGS 
SPEC_OR_GEN_REGS 
CR0_REGS 
CR_REGS 
NON_FLOAT_REGS 
XER_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CC_REGS 
ADDR_REGS 
GENERAL_REGS 
ACCESS_REGS 
ADDR_CC_REGS 
GENERAL_CC_REGS 
FP_REGS 
ADDR_FP_REGS 
GENERAL_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
G16_REGS 
G32_REGS 
T32_REGS 
HI_REG 
LO_REG 
CE_REGS 
CN_REG 
LC_REG 
SC_REG 
SP_REGS 
CR_REGS 
CP1_REGS 
CP2_REGS 
CP3_REGS 
CPA_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
PR_REGS 
T_REGS 
MAC_REGS 
FPUL_REGS 
SIBCALL_REGS 
GENERAL_REGS 
FP0_REGS 
FP_REGS 
DF_HI_REGS 
DF_REGS 
FPSCR_REGS 
GENERAL_FP_REGS 
GENERAL_DF_REGS 
TARGET_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPCC_REGS 
I64_REGS 
GENERAL_REGS 
FP_REGS 
EXTRA_FP_REGS 
GENERAL_OR_FP_REGS 
GENERAL_OR_EXTRA_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R1_REGS 
TWO_REGS 
R2_REGS 
EIGHT_REGS 
R8_REGS 
ICALL_REGS 
GENERAL_REGS 
CARRY_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BR_REGS 
FP_REGS 
ACC_REG 
SP_REG 
RL_REGS 
GR_REGS 
AR_REGS 
ALL_REGS 
LIM_REG_CLASSES 

Definition at line 1277 of file i386.h.

enum tls_dialect

Enumerator:
TLS_DIALECT_GNU 
TLS_DIALECT_SUN 
TLS_DIALECT_GNU 
TLS_DIALECT_SUN 
TLS_DIALECT_GNU 
TLS_DIALECT_SUN 
TLS_DIALECT_GNU 
TLS_DIALECT_GNU2 
TLS_DIALECT_SUN 

Definition at line 2832 of file i386.h.

Function Documentation

struct machine_function GTY ( ()   )  [read, write]

Definition at line 2970 of file i386.h.

References machine_function::accesses_prev_frame, optimize_mode_switching(), and use_fast_prologue_epilogue.

Variable Documentation

int const dbx64_register_map[FIRST_PSEUDO_REGISTER]

Definition at line 518 of file i386.c.

int const dbx_register_map[FIRST_PSEUDO_REGISTER]

Definition at line 495 of file i386.c.

const char* ix86_align_funcs_string

Definition at line 710 of file i386.c.

Referenced by override_options().

const char* ix86_align_jumps_string

Definition at line 697 of file i386.c.

Referenced by override_options().

const char* ix86_align_loops_string

Definition at line 694 of file i386.c.

Referenced by override_options().

enum processor_type ix86_arch

Definition at line 675 of file i386.c.

const char* ix86_arch_string

Definition at line 679 of file i386.c.

Referenced by override_options().

enum asm_dialect ix86_asm_dialect

Definition at line 664 of file i386.c.

const char* ix86_asm_string

Definition at line 663 of file i386.c.

Referenced by override_options().

int ix86_branch_cost

Definition at line 706 of file i386.c.

const char* ix86_branch_cost_string

Definition at line 707 of file i386.c.

Referenced by override_options().

enum cmodel ix86_cmodel

Definition at line 661 of file i386.c.

const char* ix86_cmodel_string

Definition at line 659 of file i386.c.

Referenced by override_options().

rtx ix86_compare_op0

Definition at line 597 of file i386.c.

rtx ix86_compare_op1

Definition at line 598 of file i386.c.

struct processor_costs* ix86_cost

Definition at line 401 of file i386.c.

const char* ix86_debug_addr_string

Definition at line 657 of file i386.c.

const char* ix86_debug_arg_string

Definition at line 657 of file i386.c.

enum fpmath_unit ix86_fpmath

Definition at line 670 of file i386.c.

const char* ix86_fpmath_string

Definition at line 680 of file i386.c.

Referenced by override_options().

unsigned int ix86_preferred_stack_boundary

Definition at line 703 of file i386.c.

const char* ix86_preferred_stack_boundary_string

Definition at line 700 of file i386.c.

Referenced by override_options().

int ix86_regparm

Definition at line 689 of file i386.c.

Referenced by init_cumulative_args(), ix86_fntype_regparm(), ix86_function_regparm(), ix86_setup_incoming_varargs(), and override_options().

const char* ix86_regparm_string

Definition at line 683 of file i386.c.

Referenced by override_options().

enum tls_dialect ix86_tls_dialect

Definition at line 667 of file i386.c.

const char* ix86_tls_dialect_string

Definition at line 666 of file i386.c.

Referenced by override_options().

enum processor_type ix86_tune

Definition at line 804 of file i386.c.

const char* ix86_tune_string

Definition at line 809 of file i386.c.

Referenced by override_options().

enum reg_class const regclass_map[FIRST_PSEUDO_REGISTER]

Definition at line 470 of file i386.c.

int const svr4_dbx_register_map[FIRST_PSEUDO_REGISTER]

Definition at line 583 of file i386.c.

int target_flags

Definition at line 35 of file gensupport.c.

const int x86_accumulate_outgoing_args

Definition at line 446 of file i386.c.

const int x86_add_esp_4

Definition at line 441 of file i386.c.

const int x86_add_esp_8

Definition at line 442 of file i386.c.

const int x86_arch_always_fancy_math_387

Definition at line 451 of file i386.c.

const int x86_branch_hints

Definition at line 422 of file i386.c.

const int x86_cmove

Definition at line 419 of file i386.c.

const int x86_decompose_lea

Definition at line 449 of file i386.c.

const int x86_deep_branch

Definition at line 421 of file i386.c.

const int x86_double_with_add

Definition at line 416 of file i386.c.

const int x86_epilogue_using_move

Definition at line 448 of file i386.c.

const int x86_fast_prefix

Definition at line 433 of file i386.c.

const int x86_himode_math

Definition at line 437 of file i386.c.

const int x86_integer_DFmode_moves

Definition at line 443 of file i386.c.

const int x86_inter_unit_moves

Definition at line 581 of file i386.c.

const int x86_memory_mismatch_stall

Definition at line 445 of file i386.c.

const int x86_movx

Definition at line 415 of file i386.c.

const int x86_partial_reg_dependency

Definition at line 444 of file i386.c.

const int x86_partial_reg_stall

Definition at line 424 of file i386.c.

int x86_prefetch_sse

Definition at line 686 of file i386.c.

const int x86_prologue_using_move

Definition at line 447 of file i386.c.

const int x86_promote_hi_regs

Definition at line 438 of file i386.c.

const int x86_promote_qi_regs

Definition at line 436 of file i386.c.

const int x86_promote_QImode

Definition at line 432 of file i386.c.

const int x86_push_memory

Definition at line 413 of file i386.c.

const int x86_qimode_math

Definition at line 435 of file i386.c.

const int x86_read_modify

Definition at line 430 of file i386.c.

const int x86_read_modify_write

Definition at line 429 of file i386.c.

const int x86_schedule

Definition at line 587 of file i386.c.

const int x86_shift1

Definition at line 450 of file i386.c.

const int x86_single_stringop

Definition at line 434 of file i386.c.

const int x86_split_long_moves

Definition at line 431 of file i386.c.

const int x86_sse_load0_by_pxor

Definition at line 575 of file i386.c.

const int x86_sse_partial_reg_dependency

Definition at line 568 of file i386.c.

const int x86_sse_split_regs

Definition at line 573 of file i386.c.

const int x86_sse_typeless_stores

Definition at line 574 of file i386.c.

const int x86_sub_esp_4

Definition at line 439 of file i386.c.

const int x86_sub_esp_8

Definition at line 440 of file i386.c.

const int x86_unroll_strlen

Definition at line 418 of file i386.c.

const int x86_use_bit_test

Definition at line 417 of file i386.c.

const int x86_use_bt

Definition at line 588 of file i386.c.

const int x86_use_cltd

Definition at line 428 of file i386.c.

const int x86_use_ffreep

Definition at line 576 of file i386.c.

const int x86_use_fiop

Definition at line 426 of file i386.c.

const int x86_use_leave

Definition at line 412 of file i386.c.

const int x86_use_loop

Definition at line 425 of file i386.c.

const int x86_use_mov0

Definition at line 427 of file i386.c.

const int x86_zero_extend_with_and

Definition at line 414 of file i386.c.

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