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| #define ABI_32 0 |
Definition at line 89 of file mips.h.
Referenced by build_mips16_call_stub(), compute_frame_size(), function_arg(), function_arg_pass_by_reference(), mips16_fp_args(), mips_arg_info(), mips_asm_file_start(), mips_const_double_ok(), mips_expand_epilogue(), mips_expand_prologue(), mips_file_end(), mips_file_start(), mips_function_value(), mips_handle_option(), mips_legitimate_address_p(), mips_output_aligned_decl_common(), mips_output_external(), mips_output_function_prologue(), mips_return_in_memory(), mips_setup_incoming_varargs(), output_285(), override_options(), recog(), and save_restore_insns().
| #define ABI_64 2 |
Definition at line 91 of file mips.h.
Referenced by add_library_options(), add_special_options(), Check_Target(), function_arg(), get_auto_cpu_name(), get_default_cpu_name(), get_platform_abi(), mips_arg_info(), mips_asm_file_start(), mips_conditional_register_usage(), mips_file_start(), mips_handle_option(), mips_initial_elimination_offset(), mips_output_load_label(), mips_va_arg(), mips_va_start(), output_block_move(), override_options(), print_defaults(), and Process_Targ_Group().
| #define ABI_EABI 3 |
Definition at line 92 of file mips.h.
Referenced by compute_frame_size(), function_arg(), function_arg_advance(), function_arg_partial_nregs(), function_arg_pass_by_reference(), mips_arg_info(), mips_asm_file_start(), mips_build_va_list(), mips_callee_copies(), mips_const_double_ok(), mips_file_start(), mips_function_value(), mips_gimplify_va_arg_expr(), mips_handle_option(), mips_legitimate_address_p(), mips_pad_arg_upward(), mips_pass_by_reference(), mips_setup_incoming_varargs(), mips_va_arg(), mips_va_start(), and override_options().
| #define ABI_MEABI 5 |
Definition at line 104 of file mips.h.
Referenced by function_arg(), function_arg_advance(), function_arg_pass_by_reference(), mips_arg_info(), mips_asm_file_start(), mips_conditional_register_usage(), mips_initial_elimination_offset(), mips_va_start(), output_block_move(), and override_options().
| #define ABI_N32 1 |
Definition at line 90 of file mips.h.
Referenced by Abi_Name(), add_file_args(), add_library_options(), add_special_options(), Check_Target(), find_full_path_of_gcc_file(), function_arg(), get_libgcc_s_name(), get_platform_abi(), Initialize_Targ_Info(), IP_set_target(), IPA_Configure_Target(), mips_arg_info(), mips_asm_file_start(), mips_conditional_register_usage(), mips_file_start(), mips_handle_option(), mips_initial_elimination_offset(), mips_output_load_label(), mips_va_arg(), mips_va_start(), output_block_move(), override_options(), Prepare_Target(), print_defaults(), print_search_path(), Process_Targ_Group(), prof_lib_exists(), run_ld(), save_cpp_output(), set_library_paths(), Set_Target_ABI(), and target_is_native().
| #define ABI_NEEDS_32BIT_REGS (mips_abi == ABI_32) |
| #define ABI_NEEDS_64BIT_REGS |
Value:
Definition at line 786 of file mips.h.
Referenced by mips_parse_cpu(), and override_options().
| #define ABI_O64 4 |
Definition at line 93 of file mips.h.
Referenced by build_mips16_call_stub(), compute_frame_size(), function_arg(), function_arg_pass_by_reference(), mips16_fp_args(), mips_arg_info(), mips_asm_file_start(), mips_const_double_ok(), mips_expand_epilogue(), mips_expand_prologue(), mips_file_start(), mips_function_value(), mips_handle_option(), mips_legitimate_address_p(), mips_output_function_prologue(), mips_pad_arg_upward(), mips_return_in_memory(), mips_setup_incoming_varargs(), output_285(), override_options(), recog(), and save_restore_insns().
| #define ADJUST_INSN_LENGTH | ( | INSN, | |||
| LENGTH | ) | ((LENGTH) = mips_adjust_insn_length ((INSN), (LENGTH))) |
| #define ALL_COP_REG_NUM (COP3_REG_LAST - COP0_REG_FIRST + 1) |
| #define ALL_COP_REG_P | ( | REGNO | ) | ((unsigned int) ((int) (REGNO) - COP0_REG_FIRST) < ALL_COP_REG_NUM) |
Definition at line 1879 of file mips.h.
Referenced by mips_move_1word(), mips_move_2words(), mips_output_move(), and override_options().
| #define ASM_DECLARE_OBJECT_NAME | ( | STREAM, | |||
| NAME, | |||||
| DECL | ) |
Value:
do \ { \ mips_declare_object (STREAM, NAME, "", ":\n", 0); \ } \ while (0)
| #define ASM_FILE_START | ( | STREAM | ) | mips_asm_file_start (STREAM) |
| #define ASM_FORMAT_PRIVATE_NAME | ( | OUTPUT, | |||
| NAME, | |||||
| LABELNO | ) |
| #define ASM_OUTPUT_ADDR_DIFF_ELT | ( | STREAM, | |||
| BODY, | |||||
| VALUE, | |||||
| REL | ) |
Value:
do { \ if (TARGET_MIPS16) \ fprintf (STREAM, "\t.half\t%sL%d-%sL%d\n", \ LOCAL_LABEL_PREFIX, VALUE, LOCAL_LABEL_PREFIX, REL); \ else if (TARGET_EMBEDDED_PIC) \ fprintf (STREAM, "\t%s\t%sL%d-%sLS%d\n", \ Pmode == DImode ? ".dword" : ".word", \ LOCAL_LABEL_PREFIX, VALUE, LOCAL_LABEL_PREFIX, REL); \ else if (mips_abi == ABI_32 || mips_abi == ABI_O64) \ fprintf (STREAM, "\t%s\t%sL%d\n", \ Pmode == DImode ? ".gpdword" : ".gpword", \ LOCAL_LABEL_PREFIX, VALUE); \ else \ fprintf (STREAM, "\t%s\t%sL%d\n", \ Pmode == DImode ? ".dword" : ".word", \ LOCAL_LABEL_PREFIX, VALUE); \ } while (0)
| #define ASM_OUTPUT_ADDR_VEC_ELT | ( | STREAM, | |||
| VALUE | ) |
| #define ASM_OUTPUT_ALIGNED_DECL_COMMON mips_output_aligned_decl_common |
| #define ASM_OUTPUT_CASE_LABEL | ( | FILE, | |||
| PREFIX, | |||||
| NUM, | |||||
| INSN | ) |
Value:
do { \ if (TARGET_EMBEDDED_PIC || TARGET_MIPS16) \ function_section (current_function_decl); \ ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); \ } while (0)
| #define ASM_OUTPUT_EXTERNAL | ( | STREAM, | |||
| DECL, | |||||
| NAME | ) | mips_output_external(STREAM,DECL,NAME) |
| #define ASM_OUTPUT_FILENAME | ( | STREAM, | |||
| NUM_SOURCE_FILENAMES, | |||||
| NAME | ) |
Value:
{ \
const char *p = STRING; \
int size = strlen (p) + 1; \
readonly_data_section (); \
assemble_string (p, size); \
}
| #define ASM_OUTPUT_INTERNAL_LABEL | ( | STREAM, | |||
| PREFIX, | |||||
| NUM | ) | fprintf (STREAM, "%s%s%d:\n", LOCAL_LABEL_PREFIX, PREFIX, NUM) |
| #define ASM_OUTPUT_LABELREF | ( | FILE, | |||
| NAME | ) |
Value:
if (strcmp (NAME, "..CURRENT_FUNCTION") == 0) \ asm_fprintf ((FILE), "%U%s", \ XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0)); \ else \ asm_fprintf ((FILE), "%U%s", (NAME))
| #define ASM_OUTPUT_POOL_EPILOGUE | ( | FILE, | |||
| FNNAME, | |||||
| FNDECL, | |||||
| SIZE | ) | mips_string_length = 0; |
| #define ASM_OUTPUT_REG_POP | ( | STREAM, | |||
| REGNO | ) |
Value:
do \ { \ if (! set_noreorder) \ fprintf (STREAM, "\t.set\tnoreorder\n"); \ \ dslots_load_total++; \ dslots_load_filled++; \ fprintf (STREAM, "\t%s\t%s,0(%s)\n\t%s\t%s,%s,8\n", \ TARGET_64BIT ? "ld" : "lw", \ reg_names[REGNO], \ reg_names[STACK_POINTER_REGNUM], \ TARGET_64BIT ? "daddu" : "addu", \ reg_names[STACK_POINTER_REGNUM], \ reg_names[STACK_POINTER_REGNUM]); \ \ if (! set_noreorder) \ fprintf (STREAM, "\t.set\treorder\n"); \ } \ while (0)
| #define ASM_OUTPUT_REG_PUSH | ( | STREAM, | |||
| REGNO | ) |
Value:
do \ { \ fprintf (STREAM, "\t%s\t%s,%s,8\n\t%s\t%s,0(%s)\n", \ TARGET_64BIT ? "dsubu" : "subu", \ reg_names[STACK_POINTER_REGNUM], \ reg_names[STACK_POINTER_REGNUM], \ TARGET_64BIT ? "sd" : "sw", \ reg_names[REGNO], \ reg_names[STACK_POINTER_REGNUM]); \ } \ while (0)
| #define ASM_OUTPUT_SOURCE_FILENAME | ( | STREAM, | |||
| NAME | ) | mips_output_filename (STREAM, NAME) |
| #define ASM_OUTPUT_SOURCE_LINE | ( | STREAM, | |||
| LINE | ) | mips_output_lineno (STREAM, LINE) |
| #define ASM_SPEC "\%{G*} %(endian_spec) %{mips1} %{mips2} %{mips3} %{mips4} %{mips32} %{mips64}\%{mips16:%{!mno-mips16:-mips16}} %{mno-mips16:-no-mips16} \%(subtarget_asm_optimizing_spec) \%(subtarget_asm_debugging_spec) \%{membedded-pic} \%{mabi=32:-32}%{mabi=n32:-n32}%{mabi=64:-64}%{mabi=n64:-64} \%{mabi=eabi} %{mabi=o64} %{!mabi*: %(asm_abi_default_spec)} \%{mgp32} %{mgp64} %{march=*} \%(target_asm_spec) \%(subtarget_asm_spec)" |
| #define ASM_STABD_OP ((TARGET_GAS) ? "\t.stabd\t" : " #.stabd\t") |
| #define ASM_STABN_OP ((TARGET_GAS) ? "\t.stabn\t" : " #.stabn\t") |
| #define ASM_STABS_OP ((TARGET_GAS) ? "\t.stabs\t" : " #.stabs\t") |
| #define ASSEMBLER_SCRATCH_REGNUM (GP_REG_FIRST + 1) |
| #define BASE_REG_P | ( | regno, | |||
| mode | ) |
Value:
(TARGET_MIPS16 \ ? (M16_REG_P (regno) \ || (regno) == FRAME_POINTER_REGNUM \ || (regno) == ARG_POINTER_REGNUM \ || ((regno) == STACK_POINTER_REGNUM \ && (GET_MODE_SIZE (mode) == 4 \ || GET_MODE_SIZE (mode) == 8))) \ : GP_REG_P (regno))
| #define BITMASK_HIGH (((unsigned long)1) << 31) |
Definition at line 200 of file mips.h.
Referenced by gen_divdi3(), gen_divmoddi4(), gen_divmodsi4(), gen_divsi3(), gen_fixuns_truncdfdi2(), gen_fixuns_truncdfsi2(), gen_fixuns_truncsfdi2(), gen_fixuns_truncsfsi2(), gen_moddi3(), and gen_modsi3().
| #define BITMASK_LOWER16 ((unsigned long)0xffff) |
| #define BITMASK_UPPER16 ((unsigned long)0xffff << 16) |
| #define BRANCH_COST |
Value:
((! TARGET_MIPS16 \ && (TUNE_MIPS4000 || TUNE_MIPS6000)) \ ? 2 : 1)
| #define BUILD_VA_LIST_TYPE | ( | VALIST | ) | (VALIST) = mips_build_va_list () |
| #define CALL_REALLY_USED_REGISTERS |
Value:
{ /* General registers. */ \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, 0, 1, \
/* Floating-point registers. */ \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
/* Others. */ \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, \
/* COP0 registers */ \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
/* COP2 registers */ \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
/* COP3 registers */ \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 \
}
| #define CALL_USED_REGISTERS |
Value:
{ \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, \
/* COP0 registers */ \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
/* COP2 registers */ \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
/* COP3 registers */ \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 \
}
| #define CAN_ELIMINATE | ( | FROM, | |||
| TO | ) |
Value:
(((FROM) == RETURN_ADDRESS_POINTER_REGNUM \ && (((TO) == STACK_POINTER_REGNUM && ! frame_pointer_needed) \ || (TO) == HARD_FRAME_POINTER_REGNUM)) \ || ((FROM) != RETURN_ADDRESS_POINTER_REGNUM \ && ((TO) == HARD_FRAME_POINTER_REGNUM \ || ((TO) == STACK_POINTER_REGNUM && ! frame_pointer_needed \ && ! (TARGET_MIPS16 && TARGET_64BIT) \ && (! TARGET_MIPS16 \ || compute_frame_size (get_frame_size ()) < 32768)))))
| #define CANNOT_CHANGE_MODE_CLASS | ( | FROM, | |||
| TO, | |||||
| CLASS | ) | mips_cannot_change_mode_class (FROM, TO, CLASS) |
| #define CASE_VECTOR_MODE (TARGET_MIPS16 ? HImode : Pmode == DImode ? DImode : SImode) |
| #define CLASS_MAX_NREGS | ( | CLASS, | |||
| MODE | ) | mips_class_max_nregs (CLASS, MODE) |
| #define CONDITIONAL_REGISTER_USAGE mips_conditional_register_usage () |
| #define CONST_DOUBLE_OK_FOR_LETTER_P | ( | VALUE, | |||
| C | ) |
| #define CONST_OK_FOR_LETTER_P | ( | VALUE, | |||
| C | ) |
Value:
((C) == 'I' ? ((unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000) \ : (C) == 'J' ? ((VALUE) == 0) \ : (C) == 'K' ? ((unsigned HOST_WIDE_INT) (VALUE) < 0x10000) \ : (C) == 'L' ? (((VALUE) & 0x0000ffff) == 0 \ && (((VALUE) & ~2147483647) == 0 \ || ((VALUE) & ~2147483647) == ~2147483647)) \ : (C) == 'M' ? ((((VALUE) & ~0x0000ffff) != 0) \ && (((VALUE) & ~0x0000ffff) != ~0x0000ffff) \ && (((VALUE) & 0x0000ffff) != 0 \ || (((VALUE) & ~2147483647) != 0 \ && ((VALUE) & ~2147483647) != ~2147483647))) \ : (C) == 'N' ? ((unsigned HOST_WIDE_INT) ((VALUE) + 0xffff) < 0xffff) \ : (C) == 'O' ? ((unsigned HOST_WIDE_INT) ((VALUE) + 0x4000) < 0x8000) \ : (C) == 'P' ? ((VALUE) != 0 && (((VALUE) & ~0x0000ffff) == 0)) \ : 0)
| #define CONSTANT_ADDRESS_P | ( | X | ) |
| #define CONSTANT_ALIGNMENT | ( | EXP, | |||
| ALIGN | ) |
Value:
((TREE_CODE (EXP) == STRING_CST || TREE_CODE (EXP) == CONSTRUCTOR) \ && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
| #define CONSTANT_POOL_BEFORE_FUNCTION (! TARGET_MIPS16) |
Definition at line 3286 of file mips.h.
Referenced by assemble_end_function(), and assemble_start_function().
| #define COP0_REG_FIRST 80 |
| #define COP0_REG_P | ( | REGNO | ) | ((unsigned int) ((int) (REGNO) - COP0_REG_FIRST) < COP0_REG_NUM) |
| #define COP2_REG_FIRST 112 |
| #define COP2_REG_LAST 143 |
| #define COP2_REG_P | ( | REGNO | ) | ((unsigned int) ((int) (REGNO) - COP2_REG_FIRST) < COP2_REG_NUM) |
| #define COP3_REG_LAST 175 |
| #define COP3_REG_P | ( | REGNO | ) | ((unsigned int) ((int) (REGNO) - COP3_REG_FIRST) < COP3_REG_NUM) |
| #define COP_REG_CLASS_P | ( | CLASS | ) | ((CLASS) == COP0_REGS || (CLASS) == COP2_REGS || (CLASS) == COP3_REGS) |
| #define COPNUM_AS_CHAR_FROM_REGNUM | ( | REGNO | ) |
Value:
(COP0_REG_P (REGNO) ? '0' : COP2_REG_P (REGNO) ? '2' \ : COP3_REG_P (REGNO) ? '3' : '?')
Definition at line 1884 of file mips.h.
Referenced by mips_move_1word(), mips_move_2words(), and mips_output_move().
| #define DBR_OUTPUT_SEQEND | ( | STREAM | ) |
Value:
do \ { \ if (set_nomacro > 0 && --set_nomacro == 0) \ fputs ("\t.set\tmacro\n", STREAM); \ \ if (set_noreorder > 0 && --set_noreorder == 0) \ fputs ("\t.set\treorder\n", STREAM); \ \ dslots_jump_filled++; \ fputs ("\n", STREAM); \ } \ while (0)
| #define DBX_REGISTER_NUMBER | ( | REGNO | ) | mips_dbx_regno[ (REGNO) ] |
| #define DEBUG_REGISTER_NAMES |
Value:
{ \
"$0", "at", "v0", "v1", "a0", "a1", "a2", "a3", \
"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \
"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
"t8", "t9", "k0", "k1", "gp", "sp", "$fp", "ra", \
"$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", \
"$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \
"$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23", \
"$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31", \
"hi", "lo", "accum","$fcc0","$fcc1","$fcc2","$fcc3","$fcc4", \
"$fcc5","$fcc6","$fcc7","$rap", "", "", "", "", \
"$c0r0", "$c0r1", "$c0r2", "$c0r3", "$c0r4", "$c0r5", "$c0r6", "$c0r7",\
"$c0r8", "$c0r9", "$c0r10","$c0r11","$c0r12","$c0r13","$c0r14","$c0r15",\
"$c0r16","$c0r17","$c0r18","$c0r19","$c0r20","$c0r21","$c0r22","$c0r23",\
"$c0r24","$c0r25","$c0r26","$c0r27","$c0r28","$c0r29","$c0r30","$c0r31",\
"$c2r0", "$c2r1", "$c2r2", "$c2r3", "$c2r4", "$c2r5", "$c2r6", "$c2r7",\
"$c2r8", "$c2r9", "$c2r10","$c2r11","$c2r12","$c2r13","$c2r14","$c2r15",\
"$c2r16","$c2r17","$c2r18","$c2r19","$c2r20","$c2r21","$c2r22","$c2r23",\
"$c2r24","$c2r25","$c2r26","$c2r27","$c2r28","$c2r29","$c2r30","$c2r31",\
"$c3r0", "$c3r1", "$c3r2", "$c3r3", "$c3r4", "$c3r5", "$c3r6", "$c3r7",\
"$c3r8", "$c3r9", "$c3r10","$c3r11","$c3r12","$c3r13","$c3r14","$c3r15",\
"$c3r16","$c3r17","$c3r18","$c3r19","$c3r20","$c3r21","$c3r22","$c3r23",\
"$c3r24","$c3r25","$c3r26","$c3r27","$c3r28","$c3r29","$c3r30","$c3r31"\
}
| #define DFMODE_NAN |
| #define DONT_ACCESS_GBLS_AFTER_EPILOGUE |
| #define DWARF_FRAME_REGNUM | ( | REG | ) | (REG == GP_REG_FIRST + 31 ? DWARF_FRAME_RETURN_COLUMN : REG) |
| #define EABI_FLOAT_VARARGS_P (mips_abi == ABI_EABI && UNITS_PER_FPVALUE >= UNITS_PER_DOUBLE) |
Definition at line 2861 of file mips.h.
Referenced by mips_build_builtin_va_list(), mips_build_va_list(), mips_gimplify_va_arg_expr(), mips_setup_incoming_varargs(), mips_va_arg(), and mips_va_start().
| #define EH_RETURN_DATA_REGNO | ( | N | ) | ((N) < (TARGET_MIPS16 ? 2 : 4) ? (N) + GP_ARG_FIRST : INVALID_REGNUM) |
| #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, GP_REG_FIRST + 3) |
| #define ELIMINABLE_REGS |
Value:
{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
{ ARG_POINTER_REGNUM, GP_REG_FIRST + 30}, \
{ ARG_POINTER_REGNUM, GP_REG_FIRST + 17}, \
{ RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
{ RETURN_ADDRESS_POINTER_REGNUM, GP_REG_FIRST + 30}, \
{ RETURN_ADDRESS_POINTER_REGNUM, GP_REG_FIRST + 17}, \
{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
{ FRAME_POINTER_REGNUM, GP_REG_FIRST + 30}, \
{ FRAME_POINTER_REGNUM, GP_REG_FIRST + 17}}
| #define EXPAND_BUILTIN_VA_START | ( | valist, | |||
| nextarg | ) | mips_va_start (valist, nextarg) |
| #define EXTRA_CONSTRAINT | ( | OP, | |||
| CODE | ) |
| #define EXTRA_SECTION_FUNCTIONS |
Value:
void \ sdata_section () \ { \ if (in_section != in_sdata) \ { \ fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \ in_section = in_sdata; \ } \ }
| #define EXTRA_SPECS |
Value:
{ "subtarget_cc1_spec", SUBTARGET_CC1_SPEC }, \
{ "subtarget_cpp_spec", SUBTARGET_CPP_SPEC }, \
{ "mips_as_asm_spec", MIPS_AS_ASM_SPEC }, \
{ "gas_asm_spec", GAS_ASM_SPEC }, \
{ "target_asm_spec", TARGET_ASM_SPEC }, \
{ "subtarget_mips_as_asm_spec", SUBTARGET_MIPS_AS_ASM_SPEC }, \
{ "subtarget_asm_optimizing_spec", SUBTARGET_ASM_OPTIMIZING_SPEC }, \
{ "subtarget_asm_debugging_spec", SUBTARGET_ASM_DEBUGGING_SPEC }, \
{ "mdebug_asm_spec", MDEBUG_ASM_SPEC }, \
{ "subtarget_asm_spec", SUBTARGET_ASM_SPEC }, \
{ "asm_abi_default_spec", ASM_ABI_DEFAULT_SPEC }, \
{ "endian_spec", ENDIAN_SPEC }, \
SUBTARGET_EXTRA_SPECS
| #define FINAL_PRESCAN_INSN | ( | INSN, | |||
| OPVEC, | |||||
| NOPERANDS | ) | final_prescan_insn (INSN, OPVEC, NOPERANDS) |
| #define FIXED_REGISTERS |
Value:
{ \
1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 1, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
/* COP0 registers */ \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
/* COP2 registers */ \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
/* COP3 registers */ \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 \
}
| #define FP_ARG_FIRST (FP_REG_FIRST + 12) |
Definition at line 2632 of file mips.h.
Referenced by function_arg(), mips16_fp_args(), and mips_setup_incoming_varargs().
| #define FP_ARG_LAST (FP_ARG_FIRST + MAX_ARGS_IN_REGISTERS - 1) |
| #define FP_DBX_FIRST ((write_symbols == DBX_DEBUG) ? 38 : 32) |
| #define FP_INC (TARGET_FLOAT64 || TARGET_SINGLE_FLOAT ? 1 : 2) |
Definition at line 1496 of file mips.h.
Referenced by compute_frame_size(), function_arg(), function_arg_advance(), mips_arg_info(), mips_cannot_change_mode_class(), mips_class_max_nregs(), mips_emit_fcc_reload(), mips_for_each_saved_reg(), mips_function_value(), mips_return_fpr_pair(), mips_setup_incoming_varargs(), override_options(), and save_restore_insns().
| #define FP_REG_P | ( | REGNO | ) | ((unsigned int) ((int) (REGNO) - FP_REG_FIRST) < FP_REG_NUM) |
| #define FP_RETURN ((TARGET_SOFT_FLOAT) ? GP_RETURN : (FP_REG_FIRST + 0)) |
Definition at line 2619 of file mips.h.
Referenced by mips_function_value(), and mips_return_fpr_pair().
| #define FPSW_REGNUM ST_REG_FIRST |
Definition at line 1861 of file mips.h.
Referenced by gen_conditional_branch(), mips_emit_compare(), mips_move_1word(), and override_options().
| #define FRAME_POINTER_REQUIRED (current_function_calls_alloca) |
| #define FUNCTION_ARG_BOUNDARY | ( | MODE, | |||
| TYPE | ) |
Value:
(((TYPE) != 0) \ ? ((TYPE_ALIGN(TYPE) <= PARM_BOUNDARY) \ ? PARM_BOUNDARY \ : TYPE_ALIGN(TYPE)) \ : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \ ? PARM_BOUNDARY \ : GET_MODE_ALIGNMENT(MODE)))
| #define FUNCTION_ARG_CALLEE_COPIES | ( | CUM, | |||
| MODE, | |||||
| TYPE, | |||||
| NAMED | ) |
| #define FUNCTION_ARG_PADDING | ( | MODE, | |||
| TYPE | ) |
Value:
(! BYTES_BIG_ENDIAN \ ? upward \ : (((MODE) == BLKmode \ ? ((TYPE) && TREE_CODE (TYPE_SIZE (TYPE)) == INTEGER_CST \ && int_size_in_bytes (TYPE) < (PARM_BOUNDARY / BITS_PER_UNIT))\ : (GET_MODE_BITSIZE (MODE) < PARM_BOUNDARY \ && (mips_abi == ABI_32 \ || mips_abi == ABI_O64 \ || mips_abi == ABI_EABI \ || GET_MODE_CLASS (MODE) == MODE_INT))) \ ? downward : upward))
| #define FUNCTION_ARG_REGNO_P | ( | N | ) |
Value:
((IN_RANGE((N), GP_ARG_FIRST, GP_ARG_LAST) \ || (IN_RANGE((N), FP_ARG_FIRST, FP_ARG_LAST) \ && ((N) % FP_INC == 0) && mips_abi != ABI_O64)) \ && !fixed_regs[N])
| #define FUNCTION_PROFILER | ( | FILE, | |||
| LABELNO | ) |
Value:
{ \
if (TARGET_MIPS16) \
sorry ("mips16 function profiling"); \
fprintf (FILE, "\t.set\tnoat\n"); \
fprintf (FILE, "\tmove\t%s,%s\t\t# save current return address\n", \
reg_names[GP_REG_FIRST + 1], reg_names[GP_REG_FIRST + 31]); \
fprintf (FILE, \
"\t%s\t%s,%s,%d\t\t# _mcount pops 2 words from stack\n", \
TARGET_64BIT ? "dsubu" : "subu", \
reg_names[STACK_POINTER_REGNUM], \
reg_names[STACK_POINTER_REGNUM], \
Pmode == DImode ? 16 : 8); \
fprintf (FILE, "\tjal\t_mcount\n"); \
fprintf (FILE, "\t.set\tat\n"); \
}
| #define FUNCTION_VALUE | ( | VALTYPE, | |||
| FUNC | ) | mips_function_value ((VALTYPE), (FUNC), VOIDmode) |
| #define FUNCTION_VALUE_REGNO_P | ( | N | ) |
| #define GENERATE_BRANCHLIKELY |
Value:
(TARGET_BRANCHLIKELY \ && !TARGET_SR71K \ && !TARGET_MIPS16)
Definition at line 762 of file mips.h.
Referenced by eligible_for_annul_false(), output_71(), and output_85().
| #define GENERATE_MULT3_DI |
Value:
((TARGET_MIPS3900) \ && !TARGET_MIPS16)
Definition at line 775 of file mips.h.
Referenced by eligible_for_annul_false(), eligible_for_delay(), gen_muldi3(), get_attr_can_delay(), insn_default_length(), output_42(), recog_4(), and recog_9().
| #define GENERATE_MULT3_SI |
Value:
((TARGET_MIPS3900 \ || TARGET_MIPS5400 \ || TARGET_MIPS5500 \ || ISA_MIPS32 \ || ISA_MIPS64) \ && !TARGET_MIPS16)
Definition at line 767 of file mips.h.
Referenced by gen_mulsi3(), recog_3(), and recog_9().
| #define GO_DEBUG_RTX | ( | x | ) | debug_rtx(x) |
Definition at line 3073 of file mips.h.
Referenced by iq2000_legitimate_address_p(), and mips_legitimate_address_p().
Value:
{ \
if (mips_legitimate_address_p (MODE, X, 0)) \
goto ADDR; \
}
| #define GO_PRINTF | ( | x | ) | fprintf(stderr, (x)) |
Definition at line 3071 of file mips.h.
Referenced by iq2000_legitimate_address_p(), and mips_legitimate_address_p().
| #define GO_PRINTF2 | ( | x, | |||
| y | ) | fprintf(stderr, (x), (y)) |
Definition at line 3072 of file mips.h.
Referenced by iq2000_legitimate_address_p(), and mips_legitimate_address_p().
| #define GP_ARG_FIRST (GP_REG_FIRST + 4) |
Definition at line 2630 of file mips.h.
Referenced by function_arg(), function_arg_advance(), iq2000_expand_prologue(), iq2000_setup_incoming_varargs(), mips16_fp_args(), mips_expand_prologue(), mips_output_mi_thunk(), mips_setup_incoming_varargs(), order_regs_for_local_alloc(), and xtensa_builtin_saveregs().
| #define GP_ARG_LAST (GP_ARG_FIRST + MAX_ARGS_IN_REGISTERS - 1) |
| #define GP_DBX_FIRST 0 |
| #define GP_REG_FIRST 0 |
Definition at line 1819 of file mips.h.
Referenced by build_mips16_call_stub(), build_mips16_function_stub(), compute_frame_size(), gen_call(), gen_call_value(), gen_movdi(), iq2000_expand_epilogue(), mda_compute_frame_size(), mdx_epilogue(), mdx_prologue(), mips16_constant(), mips16_gp_pseudo_reg(), mips16_optimize_gp(), mips_expand_epilogue(), mips_expand_prologue(), mips_for_each_saved_reg(), mips_frame_set(), mips_global_pointer(), mips_move_1word(), mips_move_2words(), mips_output_function_prologue(), mips_restore_reg(), mips_return_addr(), mips_save_reg(), mips_save_reg_p(), mips_secondary_reload_class(), override_options(), print_operand(), save_restore_insns(), and xtensa_dbx_register_number().
| #define GP_REG_LAST 31 |
Definition at line 1820 of file mips.h.
Referenced by compute_frame_size(), mda_compute_frame_size(), mdx_epilogue(), mdx_prologue(), mips_for_each_saved_reg(), mips_global_pointer(), override_options(), and save_restore_insns().
| #define GP_REG_OR_PSEUDO_NONSTRICT_P | ( | regno, | |||
| mode | ) | (((regno) >= FIRST_PSEUDO_REGISTER) || (BASE_REG_P ((regno), (mode)))) |
Definition at line 3033 of file mips.h.
Referenced by iq2000_reg_mode_ok_for_base_p(), and mips_reg_mode_ok_for_base_p().
| #define GP_REG_OR_PSEUDO_STRICT_P | ( | regno, | |||
| mode | ) |
Value:
BASE_REG_P((regno < FIRST_PSEUDO_REGISTER) ? (int) regno : reg_renumber[regno], \ (mode))
| #define GP_REG_P | ( | REGNO | ) | ((unsigned int) ((int) (REGNO) - GP_REG_FIRST) < GP_REG_NUM) |
Definition at line 1863 of file mips.h.
Referenced by gen_reload_outsi(), iq2000_move_1word(), mips_legitimize_move(), mips_move_1word(), mips_move_2words(), mips_output_move(), mips_regno_mode_ok_for_base_p(), mips_secondary_reload_class(), override_options(), score_hard_regno_mode_ok(), score_regno_mode_ok_for_base_p(), score_secondary_reload_class(), split_1(), split_insns(), xtensa_dbx_register_number(), and xtensa_secondary_reload_class().
| #define GP_RETURN (GP_REG_FIRST + 2) |
Definition at line 2618 of file mips.h.
Referenced by iq2000_function_value(), mips_function_value(), and mips_legitimize_tls_address().
| #define GR_REG_CLASS_P | ( | CLASS | ) |
Value:
((CLASS) == GR_REGS || (CLASS) == M16_REGS || (CLASS) == T_REG \ || (CLASS) == M16_T_REGS || (CLASS) == M16_NA_REGS)
Definition at line 2165 of file mips.h.
Referenced by mips_register_move_cost(), score_register_move_cost(), and score_secondary_reload_class().
| #define HARD_FRAME_POINTER_REGNUM (TARGET_MIPS16 ? GP_REG_FIRST + 17 : GP_REG_FIRST + 30) |
| #define HARD_REGNO_MODE_OK | ( | REGNO, | |||
| MODE | ) | mips_hard_regno_mode_ok[ (int)(MODE) ][ (REGNO) ] |
| #define HARD_REGNO_NREGS | ( | REGNO, | |||
| MODE | ) | mips_hard_regno_nregs (REGNO, MODE) |
| #define HAVE_SQRT_P | ( | ) | (!ISA_MIPS1) |
| #define HI_REGNUM (MD_REG_FIRST + 0) |
Definition at line 1854 of file mips.h.
Referenced by crx_regno_reg_class(), mips_legitimize_move(), mips_subword(), override_options(), and subw().
| #define HILO_REGNUM (MD_REG_FIRST + 2) |
Definition at line 1856 of file mips.h.
Referenced by gen_reload_indi(), gen_reload_outdi(), gen_reload_outsi(), mips_move_1word(), mips_move_2words(), and mips_secondary_reload_class().
| #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (VOIDmode, GP_REG_FIRST + 31) |
| #define INIT_CUMULATIVE_ARGS | ( | CUM, | |||
| FNTYPE, | |||||
| LIBNAME, | |||||
| INDIRECT | ) | init_cumulative_args (&CUM, FNTYPE, LIBNAME) \ |
Value:
{ \
rtx addr = ADDR; \
if (Pmode == DImode) \
{ \
emit_move_insn (gen_rtx_MEM (DImode, plus_constant (addr, 32)), FUNC); \
emit_move_insn (gen_rtx_MEM (DImode, plus_constant (addr, 40)), CHAIN);\
} \
else \
{ \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (addr, 32)), FUNC); \
emit_move_insn (gen_rtx_MEM (SImode, plus_constant (addr, 36)), CHAIN);\
} \
\
/* Flush both caches. We need to flush the data cache in case \
the system has a write-back cache. */ \
/* ??? Should check the return value for errors. */ \
if (mips_cache_flush_func && mips_cache_flush_func[0]) \
emit_library_call (gen_rtx_SYMBOL_REF (Pmode, mips_cache_flush_func), \
0, VOIDmode, 3, addr, Pmode, \
GEN_INT (TRAMPOLINE_SIZE), TYPE_MODE (integer_type_node),\
GEN_INT (3), TYPE_MODE (integer_type_node)); \
}
| #define ISA_HAS_64BIT_REGS |
Value:
(ISA_MIPS3 \ || ISA_MIPS4 \ || ISA_MIPS64)
Definition at line 794 of file mips.h.
Referenced by mips_move_2words(), and override_options().
| #define ISA_HAS_8CC |
Value:
(ISA_MIPS4 \ || ISA_MIPS32 \ || ISA_MIPS64)
Definition at line 816 of file mips.h.
Referenced by gen_conditional_branch(), mips_conditional_register_usage(), mips_emit_compare(), mips_move_1word(), mips_output_move(), override_options(), print_operand(), and recog_5().
| #define ISA_HAS_BRANCHLIKELY |
Value:
(!ISA_MIPS1 \ && !TARGET_MIPS5500)
Definition at line 801 of file mips.h.
Referenced by override_options().
| #define ISA_HAS_CLZ_CLO |
| #define ISA_HAS_COND_TRAP |
Value:
(!ISA_MIPS1 \ && !TARGET_MIPS16)
Definition at line 828 of file mips.h.
Referenced by output_0(), and recog().
| #define ISA_HAS_CONDMOVE |
Value:
((ISA_MIPS4 \ || ISA_MIPS32 \ || ISA_MIPS64) \ && !TARGET_MIPS5500 \ && !TARGET_MIPS16)
Definition at line 805 of file mips.h.
Referenced by recog_1(), recog_2(), recog_3(), and recog_4().
| #define ISA_HAS_DCLZ_DCLO |
| #define ISA_HAS_FP4 |
| #define ISA_HAS_INT_CONDMOVE 0 |
| #define ISA_HAS_MACC |
Value:
(TARGET_MIPS5400 \ || TARGET_MIPS5500 \ || TARGET_SR71K \ )
Definition at line 874 of file mips.h.
Referenced by output_54().
| #define ISA_HAS_MADD_MSUB |
Value:
((ISA_MIPS32 \ || ISA_MIPS64 \ ) && !TARGET_MIPS16)
Definition at line 832 of file mips.h.
Referenced by output_37(), recog_3(), and recog_9().
| #define ISA_HAS_MSAC |
Value:
(TARGET_MIPS5400 \ || TARGET_MIPS5500 \ || TARGET_SR71K \ )
Definition at line 868 of file mips.h.
Referenced by recog_3(), recog_4(), recog_7(), and recog_9().
| #define ISA_HAS_MULHI |
Value:
(TARGET_MIPS5400 \ || TARGET_MIPS5500 \ || TARGET_SR71K \ )
Definition at line 854 of file mips.h.
Referenced by gen_smulsi3_highpart(), gen_umulsi3_highpart(), recog_3(), and recog_9().
| #define ISA_HAS_MULS |
Value:
(TARGET_MIPS5400 \ || TARGET_MIPS5500 \ || TARGET_SR71K \ )
Definition at line 861 of file mips.h.
Referenced by recog_3(), recog_4(), recog_7(), and recog_9().
| #define ISA_HAS_NMADD_NMSUB |
Value:
((ISA_MIPS4 \ || ISA_MIPS64) \ && (!TARGET_MIPS5400 || TARGET_MAD) \ && ! TARGET_MIPS16)
| #define ISA_HAS_PREFETCH |
Value:
((ISA_MIPS4 \ || ISA_MIPS32 \ || ISA_MIPS64) \ && !TARGET_MIPS16)
Definition at line 894 of file mips.h.
Referenced by recog().
| #define ISA_HAS_ROTR_DI |
Value:
(TARGET_64BIT \ && (TARGET_MIPS5400 \ || TARGET_MIPS5500 \ || TARGET_SR71K \ ))
Definition at line 886 of file mips.h.
Referenced by recog_4().
| #define ISA_HAS_ROTR_SI |
Value:
(TARGET_MIPS5400 \ || TARGET_MIPS5500 \ || TARGET_SR71K \ )
Definition at line 880 of file mips.h.
Referenced by recog_3().
| #define ISA_HAS_TRUNC_W (!ISA_MIPS1) |
Definition at line 902 of file mips.h.
Referenced by gen_fix_truncdfsi2(), gen_fix_truncsfsi2(), recog_3(), and recog_6().
| #define LEGITIMATE_CONSTANT_P | ( | X | ) |
Value:
((GET_CODE (X) != CONST_DOUBLE \ || mips_const_double_ok (X, GET_MODE (X))) \ && ! (GET_CODE (X) == CONST \ && ! TARGET_GAS \ && (mips_abi == ABI_N32 \ || mips_abi == ABI_64)) \ && (! TARGET_MIPS16 || mips16_constant (X, GET_MODE (X), 0, 0)))
| #define LIBCALL_VALUE | ( | MODE | ) | mips_function_value (NULL_TREE, NULL, (MODE)) |
| #define LINK_SPEC "\%(endian_spec) \%{G*} %{mips1} %{mips2} %{mips3} %{mips4} %{mips32} %{mips64} \%{bestGnum} %{shared} %{non_shared}" |
| #define LO_REGNUM (MD_REG_FIRST + 1) |
Definition at line 1855 of file mips.h.
Referenced by crx_regno_reg_class(), gen_reload_insi(), gen_reload_outsi(), mips_avoid_hazards(), mips_legitimize_move(), mips_subword(), output_36(), output_42(), override_options(), split_insns(), and subw().
| #define LOAD_EXTEND_OP | ( | MODE | ) |
Value:
(TARGET_64BIT && ((MODE) == SImode || (MODE) == CCmode) \ ? SIGN_EXTEND : ZERO_EXTEND)
| #define M16_REG_P | ( | REGNO | ) | (((REGNO) >= 2 && (REGNO) <= 7) || (REGNO) == 16 || (REGNO) == 17) |
Definition at line 1865 of file mips.h.
Referenced by gen_reload_outdi(), gen_reload_outsi(), mips_regno_mode_ok_for_base_p(), mips_restore_reg(), mips_save_reg(), mips_secondary_reload_class(), peephole(), recog_5(), save_restore_insns(), and split_1().
| #define MACHINE_TYPE "BSD Mips" |
| #define MASK_ABICALLS 0x00000400 |
| #define MASK_BRANCHLIKELY 0x02000000 |
| #define MASK_FLOAT64 0x00000200 |
| #define MASK_GPOPT 0x00000008 |
| #define MASK_LONG64 0x00000002 |
| #define MASK_MIPS16 0x00100000 |
| #define MASK_SINGLE_FLOAT 0x00020000 |
| #define MD_REG_FIRST 64 |
Definition at line 1829 of file mips.h.
Referenced by mips_fill_delay_slot(), and override_options().
| #define MD_REG_P | ( | REGNO | ) | ((unsigned int) ((int) (REGNO) - MD_REG_FIRST) < MD_REG_NUM) |
Definition at line 1869 of file mips.h.
Referenced by mips_legitimize_move(), mips_move_1word(), mips_move_2words(), mips_output_move(), mips_secondary_reload_class(), override_options(), and print_operand().
| #define MEMORY_MOVE_COST | ( | MODE, | |||
| CLASS, | |||||
| TO_P | ) |
Value:
(((TUNE_MIPS4000 || TUNE_MIPS6000) ? 6 : 4) \ + memory_move_secondary_cost ((MODE), (CLASS), (TO_P)))
| #define mips_abicalls_attr ((enum attr_abicalls)mips_abicalls) |
Definition at line 114 of file mips.h.
Referenced by eligible_for_annul_false(), eligible_for_delay(), and num_delay_slots().
| #define MIPS_AS_ASM_SPEC "\%{!.s:-nocpp} %{.s: %{cpp} %{nocpp}} \%{pipe: %e-pipe is not supported} \%{K} %(subtarget_mips_as_asm_spec)" |
| #define MIPS_CPP_SET_PROCESSOR | ( | PREFIX, | |||
| INFO | ) |
Definition at line 83 of file mips.h.
Referenced by adder_unit_ready_cost(), divide_unit_ready_cost(), eligible_for_annul_false(), eligible_for_delay(), function_units_used(), get_attr_can_delay(), get_attr_dslot(), imuldiv_unit_blockage(), imuldiv_unit_conflict_cost(), imuldiv_unit_ready_cost(), insn_alts(), insn_default_latency(), internal_dfa_insn_code(), memory_unit_ready_cost(), mult_unit_ready_cost(), and result_ready_cost().
| #define MIPS_STACK_ALIGN | ( | LOC | ) |
| #define MIPS_TEMP1_REGNUM (GP_REG_FIRST + 12) |
Definition at line 1982 of file mips.h.
Referenced by mips_expand_epilogue(), and mips_expand_prologue().
| #define MIPS_TEMP2_REGNUM (GP_REG_FIRST + 13) |
Definition at line 1983 of file mips.h.
Referenced by mips_add_large_offset_to_sp(), and save_restore_insns().
| #define MODES_TIEABLE_P | ( | MODE1, | |||
| MODE2 | ) |
Value:
((GET_MODE_CLASS (MODE1) == MODE_FLOAT || \ GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \ == (GET_MODE_CLASS (MODE2) == MODE_FLOAT || \ GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
| #define MOVE_MAX (TARGET_64BIT ? 8 : 4) |
| #define MULTILIB_DEFAULTS { MULTILIB_ENDIAN_DEFAULT, MULTILIB_ISA_DEFAULT, MULTILIB_ABI_DEFAULT } |
| #define MUST_PASS_IN_STACK | ( | MODE, | |||
| TYPE | ) |
Value:
((TYPE) != 0 \ && (TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST \ || TREE_ADDRESSABLE (TYPE) \ || ((MODE) == BLKmode \ && mips_abi != ABI_32 && mips_abi != ABI_O64 \ && ! ((TYPE) != 0 && TREE_CODE (TYPE_SIZE (TYPE)) == INTEGER_CST \ && 0 == (int_size_in_bytes (TYPE) \ % (PARM_BOUNDARY / BITS_PER_UNIT))) \ && (FUNCTION_ARG_PADDING (MODE, TYPE) \ == (BYTES_BIG_ENDIAN ? upward : downward)))))
| #define MUST_SAVE_REGISTER | ( | regno | ) |
Value:
((regs_ever_live[regno] && !call_used_regs[regno]) \ || (regno == HARD_FRAME_POINTER_REGNUM && frame_pointer_needed) \ || (regno == (GP_REG_FIRST + 31) && regs_ever_live[GP_REG_FIRST + 31]))
| #define ORDER_REGS_FOR_LOCAL_ALLOC mips_order_regs_for_local_alloc () |
| #define PAD_VARARGS_DOWN |
Value:
(TARGET_64BIT \ || mips_abi == ABI_MEABI \ ? BYTES_BIG_ENDIAN : !BYTES_BIG_ENDIAN)
| #define PARM_BOUNDARY |
| #define PIC_FUNCTION_ADDR_REGNUM (GP_REG_FIRST + 25) |
Definition at line 2003 of file mips.h.
Referenced by mips_emit_loadgp(), mips_extra_live_on_entry(), mips_global_pointer(), mips_output_function_prologue(), mips_output_mi_thunk(), output_298(), output_302(), output_303(), output_306(), output_310(), output_311(), output_313(), and print_operand().
| #define Pmode ((TARGET_LONG64 && TARGET_64BIT) ? DImode : SImode) |
| #define PREFERRED_RELOAD_CLASS | ( | X, | |||
| CLASS | ) |
Value:
((CLASS) != ALL_REGS \ ? (! TARGET_MIPS16 \ ? (CLASS) \ : ((CLASS) != GR_REGS \ ? (CLASS) \ : M16_REGS)) \ : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \ || GET_MODE_CLASS (GET_MODE (X)) == MODE_COMPLEX_FLOAT) \ ? (TARGET_SOFT_FLOAT \ ? (TARGET_MIPS16 ? M16_REGS : GR_REGS) \ : FP_REGS) \ : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_INT \ || GET_MODE (X) == VOIDmode) \ ? (TARGET_MIPS16 ? M16_REGS : GR_REGS) \ : (CLASS))))
| #define PRINT_OPERAND_PUNCT_VALID_P | ( | CODE | ) | mips_print_operand_punct[CODE] |
| #define PROMOTE_MODE | ( | MODE, | |||
| UNSIGNEDP, | |||||
| TYPE | ) |
Value:
if (GET_MODE_CLASS (MODE) == MODE_INT \ && GET_MODE_SIZE (MODE) < 4) \ (MODE) = SImode;
| #define PUT_SDB_BLOCK_END | ( | LINE | ) |
Value:
do { \ extern FILE *asm_out_text_file; \ fprintf (asm_out_text_file, \ "%sLe%d:\n\t%s.bend\t%sLe%d\t%d\n", \ LOCAL_LABEL_PREFIX, \ sdb_label_count, \ (TARGET_GAS) ? "" : "#", \ LOCAL_LABEL_PREFIX, \ sdb_label_count, \ (LINE)); \ sdb_label_count++; \ } while (0)
| #define PUT_SDB_BLOCK_START | ( | LINE | ) |
Value:
do { \ extern FILE *asm_out_text_file; \ fprintf (asm_out_text_file, \ "%sLb%d:\n\t%s.begin\t%sLb%d\t%d\n", \ LOCAL_LABEL_PREFIX, \ sdb_label_count, \ (TARGET_GAS) ? "" : "#", \ LOCAL_LABEL_PREFIX, \ sdb_label_count, \ (LINE)); \ sdb_label_count++; \ } while (0)
| #define PUT_SDB_DEF | ( | a | ) |
Value:
do { \ extern FILE *asm_out_text_file; \ fprintf (asm_out_text_file, "\t%s.def\t", \ (TARGET_GAS) ? "" : "#"); \ ASM_OUTPUT_LABELREF (asm_out_text_file, a); \ fputc (';', asm_out_text_file); \ } while (0)
| #define PUT_SDB_DIM | ( | a | ) |
| #define PUT_SDB_ENDEF |
Value:
do { \ extern FILE *asm_out_text_file; \ fprintf (asm_out_text_file, "\t.endef\n"); \ } while (0)
| #define PUT_SDB_FUNCTION_END | ( | LINE | ) |
Value:
do { \ extern FILE *asm_out_text_file; \ ASM_OUTPUT_SOURCE_LINE (asm_out_text_file, LINE + sdb_begin_function_line); \ } while (0)
| #define PUT_SDB_INT_VAL | ( | a | ) |
Value:
do { \ extern FILE *asm_out_text_file; \ fprintf (asm_out_text_file, "\t.val\t"); \ fprintf (asm_out_text_file, HOST_WIDE_INT_PRINT_DEC, (HOST_WIDE_INT)(a)); \ fprintf (asm_out_text_file, ";"); \ } while (0)
| #define PUT_SDB_LAST_DIM | ( | a | ) |
| #define PUT_SDB_NEXT_DIM | ( | a | ) |
| #define PUT_SDB_PLAIN_DEF | ( | a | ) |
Value:
do { \ extern FILE *asm_out_text_file; \ fprintf (asm_out_text_file, "\t%s.def\t.%s;", \ (TARGET_GAS) ? "" : "#", (a)); \ } while (0)
| #define PUT_SDB_SCL | ( | a | ) |
| #define PUT_SDB_SIZE | ( | a | ) |
Value:
do { \ extern FILE *asm_out_text_file; \ fprintf (asm_out_text_file, "\t.size\t"); \ fprintf (asm_out_text_file, HOST_WIDE_INT_PRINT_DEC, (HOST_WIDE_INT)(a)); \ fprintf (asm_out_text_file, ";"); \ } while (0)
| #define PUT_SDB_SRC_FILE | ( | FILENAME | ) |
Value:
do { \ extern FILE *asm_out_text_file; \ output_file_directive (asm_out_text_file, (FILENAME));\ } while (0)
| #define PUT_SDB_START_DIM |
Value:
do { \ extern FILE *asm_out_text_file; \ fprintf (asm_out_text_file, "\t.dim\t"); \ } while (0)
| #define PUT_SDB_TAG | ( | a | ) |
Value:
do { \ extern FILE *asm_out_text_file; \ fprintf (asm_out_text_file, "\t.tag\t"); \ ASM_OUTPUT_LABELREF (asm_out_text_file, a); \ fputc (';', asm_out_text_file); \ } while (0)
| #define PUT_SDB_TYPE | ( | a | ) |
| #define PUT_SDB_VAL | ( | a | ) |
Value:
do { \ extern FILE *asm_out_text_file; \ fputs ("\t.val\t", asm_out_text_file); \ output_addr_const (asm_out_text_file, (a)); \ fputc (';', asm_out_text_file); \ } while (0)
| #define REG_ALLOC_ORDER |
Value:
{ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, \
16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, \
32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, \
48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, \
64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \
80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, \
96, 97, 98, 99, 100,101,102,103,104,105,106,107,108,109,110,111, \
112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127, \
128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143, \
144,145,146,147,148,149,150,151,152,153,154,155,156,157,158,159, \
160,161,162,163,164,165,166,167,168,169,170,171,172,173,174,175 \
}
| #define REG_CLASS_CONTENTS |
Value:
{ \
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* no registers */ \
{ 0x0003000c, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* mips16 nonarg regs */\
{ 0x000300fc, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* mips16 registers */ \
{ 0x01000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* mips16 T register */ \
{ 0x010300fc, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* mips16 and T regs */ \
{ 0xffffffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* integer registers */ \
{ 0x00000000, 0xffffffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, /* floating registers*/ \
{ 0x00000000, 0x00000000, 0x00000001, 0x00000000, 0x00000000, 0x00000000 }, /* hi register */ \
{ 0x00000000, 0x00000000, 0x00000002, 0x00000000, 0x00000000, 0x00000000 }, /* lo register */ \
{ 0x00000000, 0x00000000, 0x00000004, 0x00000000, 0x00000000, 0x00000000 }, /* hilo register */ \
{ 0x00000000, 0x00000000, 0x00000003, 0x00000000, 0x00000000, 0x00000000 }, /* mul/div registers */ \
{ 0x00000000, 0x00000000, 0xffff0000, 0x0000ffff, 0x00000000, 0x00000000 }, /* cop0 registers */ \
{ 0x00000000, 0x00000000, 0x00000000, 0xffff0000, 0x0000ffff, 0x00000000 }, /* cop2 registers */ \
{ 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffff0000, 0x0000ffff }, /* cop3 registers */ \
{ 0xffffffff, 0x00000000, 0x00000001, 0x00000000, 0x00000000, 0x00000000 }, /* union classes */ \
{ 0xffffffff, 0x00000000, 0x00000002, 0x00000000, 0x00000000, 0x00000000 }, \
{ 0xffffffff, 0x00000000, 0x00000004, 0x00000000, 0x00000000, 0x00000000 }, \
{ 0x00000000, 0xffffffff, 0x00000001, 0x00000000, 0x00000000, 0x00000000 }, \
{ 0xffffffff, 0x00000000, 0xffff0000, 0x0000ffff, 0x00000000, 0x00000000 }, \
{ 0xffffffff, 0x00000000, 0x00000000, 0xffff0000, 0x0000ffff, 0x00000000 }, \
{ 0xffffffff, 0x00000000, 0x00000000, 0x00000000, 0xffff0000, 0x0000ffff }, \
{ 0x00000000, 0x00000000, 0xffff0000, 0xffffffff, 0xffffffff, 0x0000ffff }, \
{ 0xffffffff, 0x00000000, 0xffff0000, 0xffffffff, 0xffffffff, 0x0000ffff }, \
{ 0x00000000, 0x00000000, 0x000007f8, 0x00000000, 0x00000000, 0x00000000 }, /* status registers */ \
{ 0xffffffff, 0xffffffff, 0xffff07ff, 0xffffffff, 0xffffffff, 0x0000ffff } /* all registers */ \
}
| #define REG_CLASS_FROM_LETTER | ( | C | ) | mips_char_to_class[(unsigned char)(C)] |
| #define REG_CLASS_NAMES |
Value:
{ \
"NO_REGS", \
"M16_NA_REGS", \
"M16_REGS", \
"T_REG", \
"M16_T_REGS", \
"GR_REGS", \
"FP_REGS", \
"HI_REG", \
"LO_REG", \
"HILO_REG", \
"MD_REGS", \
/* coprocessor registers */ \
"COP0_REGS", \
"COP2_REGS", \
"COP3_REGS", \
"HI_AND_GR_REGS", \
"LO_AND_GR_REGS", \
"HILO_AND_GR_REGS", \
"HI_AND_FP_REGS", \
"COP0_AND_GR_REGS", \
"COP2_AND_GR_REGS", \
"COP3_AND_GR_REGS", \
"ALL_COP_REGS", \
"ALL_COP_AND_GR_REGS", \
"ST_REGS", \
"ALL_REGS" \
}
| #define REG_PARM_STACK_SPACE | ( | FNDECL | ) |
Value:
((mips_abi == ABI_32 || mips_abi == ABI_O64) \ ? (MAX_ARGS_IN_REGISTERS * UNITS_PER_WORD) - FIRST_PARM_OFFSET (FNDECL) \ : 0)
| #define REGISTER_MOVE_COST | ( | MODE, | |||
| FROM, | |||||
| TO | ) | mips_register_move_cost (MODE, FROM, TO) |
| #define REGISTER_NAMES |
| #define REGNO_MODE_OK_FOR_BASE_P | ( | regno, | |||
| mode | ) | GP_REG_OR_PSEUDO_STRICT_P ((regno), (mode)) |
| #define REGNO_REG_CLASS | ( | REGNO | ) | mips_regno_to_class[ (REGNO) ] |
| #define RETURN_ADDR_RTX | ( | count, | |||
| frame | ) |
Value:
(((count) == 0) \ ? (leaf_function_p () \ ? gen_rtx_REG (Pmode, GP_REG_FIRST + 31) \ : gen_rtx_MEM (Pmode, gen_rtx_REG (Pmode, \ RETURN_ADDRESS_POINTER_REGNUM))) \ : (rtx) 0)
| #define SDB_GENERATE_FAKE | ( | BUFFER, | |||
| NUMBER | ) | sprintf ((BUFFER), ".%dfake", (NUMBER)); |
| #define SET_FILE_NUMBER | ( | ) | ++num_source_filenames |
| #define SETUP_INCOMING_VARARGS | ( | CUM, | |||
| MODE, | |||||
| TYPE, | |||||
| PRETEND_SIZE, | |||||
| NO_RTL | ) |
Value:
(PRETEND_SIZE) = mips_setup_incoming_varargs (&(CUM), (MODE), \ (TYPE), (NO_RTL))
| #define SFMODE_NAN |
| #define SIZE_TYPE (Pmode == DImode ? "long unsigned int" : "unsigned int") |
| #define SMALL_DATA_SECTION sdata_section |
Definition at line 4463 of file mips.h.
Referenced by mips_select_rtx_section(), and mips_select_section().
Definition at line 2255 of file mips.h.
Referenced by iq2000_legitimate_address_p(), iq2000_move_1word(), recog_5(), simple_memory_operand(), and uns_arith_operand().
| #define ST_REG_FIRST 67 |
Definition at line 1833 of file mips.h.
Referenced by mips_conditional_register_usage(), override_options(), and print_operand().
| #define ST_REG_LAST 74 |
| #define ST_REG_P | ( | REGNO | ) | ((unsigned int) ((int) (REGNO) - ST_REG_FIRST) < ST_REG_NUM) |
Definition at line 1871 of file mips.h.
Referenced by fcc_register_operand(), mips_hard_regno_nregs(), mips_move_1word(), mips_output_move(), mips_secondary_reload_class(), override_options(), and print_operand().
| #define STACK_ARGS_ADJUST | ( | SIZE | ) |
Value:
{ \
if (SIZE.constant < 4 * UNITS_PER_WORD) \
SIZE.constant = 4 * UNITS_PER_WORD; \
}
| #define STACK_BOUNDARY |
| #define STARTING_FRAME_OFFSET |
Value:
| #define SUBTARGET_ASM_DEBUGGING_SPEC "\%{g} %{g0} %{g1} %{g2} %{g3} \%{ggdb:-g} %{ggdb0:-g0} %{ggdb1:-g1} %{ggdb2:-g2} %{ggdb3:-g3} \%{gstabs:-g} %{gstabs0:-g0} %{gstabs1:-g1} %{gstabs2:-g2} %{gstabs3:-g3} \%{gstabs+:-g} %{gstabs+0:-g0} %{gstabs+1:-g1} %{gstabs+2:-g2} %{gstabs+3:-g3} \%{gcoff:-g} %{gcoff0:-g0} %{gcoff1:-g1} %{gcoff2:-g2} %{gcoff3:-g3} \%(mdebug_asm_spec)" |
| #define SUBTARGET_ASM_OPTIMIZING_SPEC "\%{noasmopt:-O0} \%{!noasmopt:%{O:-O2} %{O1:-O2} %{O2:-O2} %{O3:-O3}}" |
| #define TARGET_4300_MUL_FIX (target_flags & MASK_4300_MUL_FIX) |
| #define TARGET_64BIT (target_flags & MASK_64BIT) |
| #define TARGET_ABICALLS (target_flags & MASK_ABICALLS) |
Definition at line 294 of file mips.h.
Referenced by compute_frame_size(), mips_asm_file_start(), mips_classify_symbol(), mips_current_loadgp_style(), mips_emit_loadgp(), mips_expand_epilogue(), mips_expand_prologue(), mips_extra_live_on_entry(), mips_file_start(), mips_function_rodata_section(), mips_global_pointer(), mips_in_small_data_p(), mips_legitimize_tls_address(), mips_output_function_prologue(), mips_output_mi_thunk(), mips_restore_gp(), mips_save_reg_p(), override_options(), recog(), recog_6(), recog_8(), recog_9(), and save_restore_insns().
| #define TARGET_ASM_SPEC "\%{!mgas: %(mips_as_asm_spec)} \%{mgas: %(gas_asm_spec)}" |
| #define TARGET_BIG_ENDIAN (target_flags & MASK_BIG_ENDIAN) |
| #define TARGET_BRANCHLIKELY (target_flags & MASK_BRANCHLIKELY) |
| #define TARGET_CHECK_RANGE_DIV (target_flags & MASK_CHECK_RANGE_DIV) |
Definition at line 330 of file mips.h.
Referenced by gen_divdi3(), gen_divmoddi4(), gen_divmodsi4(), gen_divsi3(), gen_moddi3(), and gen_modsi3().
| #define TARGET_DEBUG_A_MODE (target_flags & MASK_DEBUG_A) |
Definition at line 272 of file mips.h.
Referenced by iq2000_legitimate_address_p(), and mips_legitimate_address_p().
| #define TARGET_DEBUG_B_MODE (target_flags & MASK_DEBUG_B) |
Definition at line 273 of file mips.h.
Referenced by iq2000_count_memory_refs(), mips_count_memory_refs(), and mips_legitimate_address_p().
| #define TARGET_DEBUG_C_MODE (target_flags & MASK_DEBUG_C) |
Definition at line 274 of file mips.h.
Referenced by gen_seq(), gen_sge(), gen_sgeu(), gen_sgt(), gen_sgtu(), gen_sle(), gen_sleu(), gen_slt(), gen_sltu(), gen_sne(), and iq2000_fill_delay_slot().
| #define TARGET_DEBUG_D_MODE (target_flags & MASK_DEBUG_D) |
Definition at line 275 of file mips.h.
Referenced by function_arg(), function_arg_advance(), init_cumulative_args(), iq2000_arg_partial_bytes(), split_1(), and split_insns().
| #define TARGET_DEBUG_E_MODE (target_flags & MASK_DEBUG_E) |
Definition at line 276 of file mips.h.
Referenced by function_arg(), function_arg_advance(), function_arg_partial_nregs(), and init_cumulative_args().
| #define TARGET_DEBUG_F_MODE (target_flags & MASK_DEBUG_F) |
| #define TARGET_DEBUG_G_MODE (target_flags & MASK_DEBUG_G) |
| #define TARGET_DEBUG_I_MODE (target_flags & MASK_DEBUG_I) |
| #define TARGET_DEBUG_MODE (target_flags & MASK_DEBUG) |
| #define TARGET_DOUBLE_FLOAT (! TARGET_SINGLE_FLOAT) |
Definition at line 321 of file mips.h.
Referenced by mips_init_libfuncs(), override_options(), recog_1(), recog_2(), recog_3(), recog_4(), recog_5(), and recog_6().
| #define TARGET_EMBEDDED_DATA (target_flags & MASK_EMBEDDED_DATA) |
Definition at line 310 of file mips.h.
Referenced by iq2000_select_section(), mips_encode_section_info(), mips_in_small_data_p(), mips_output_aligned_decl_common(), mips_select_rtx_section(), mips_select_section(), and mips_unique_section().
| #define TARGET_EMBEDDED_PIC (target_flags & MASK_EMBEDDED_PIC) |
Definition at line 305 of file mips.h.
Referenced by gen_movdi(), gen_movsi(), insn_current_length(), mips_encode_section_info(), mips_legitimate_address_p(), mips_select_section(), mips_unique_section(), output_279(), override_options(), recog_5(), recog_6(), and recog_8().
| #define TARGET_FILE_SWITCHING (TARGET_GP_OPT && ! TARGET_GAS && ! TARGET_MIPS16) |
Definition at line 337 of file mips.h.
Referenced by mips_asm_file_end(), mips_asm_file_start(), and mips_output_function_epilogue().
| #define TARGET_FLOAT64 (target_flags & MASK_FLOAT64) |
| #define TARGET_FUSED_MADD (! (target_flags & MASK_NO_FUSED_MADD)) |
| #define TARGET_GAS (target_flags & MASK_GAS) |
| #define TARGET_GP_OPT (target_flags & MASK_GPOPT) |
Definition at line 285 of file mips.h.
Referenced by mips_declare_object(), mips_encode_section_info(), mips_output_external(), simple_memory_operand(), and VPARAMS().
| #define TARGET_INT64 (target_flags & MASK_INT64) |
| #define TARGET_LONG64 (target_flags & MASK_LONG64) |
| #define TARGET_LONG_CALLS (target_flags & MASK_LONG_CALLS) |
| #define TARGET_MAD (target_flags & MASK_MAD) |
Definition at line 323 of file mips.h.
Referenced by gen_mulsi3(), output_34(), output_54(), recog_3(), recog_4(), recog_6(), recog_7(), recog_8(), and recog_9().
| #define TARGET_MEMCPY (target_flags & MASK_MEMCPY) |
| #define TARGET_MIPS16 (target_flags & MASK_MIPS16) |
Definition at line 346 of file mips.h.
Referenced by arith_operand(), build_mips16_call_stub(), compute_frame_size(), double_memory_operand(), function_arg(), gen_adddi3(), gen_addsi3(), gen_anddi3(), gen_andsi3(), gen_ashldi3(), gen_ashlsi3(), gen_ashrdi3(), gen_ashrsi3(), gen_call(), gen_call_value(), gen_conditional_branch(), gen_div_trap(), gen_int_relational(), gen_iorsi3(), gen_lshrdi3(), gen_lshrsi3(), gen_movdi(), gen_movhi(), gen_movqi(), gen_movsi(), gen_muldi3(), gen_mulsi3(), gen_reload_insi(), gen_reload_outdi(), gen_reload_outsi(), gen_seq(), gen_sge(), gen_sgeu(), gen_sgt(), gen_sgtu(), gen_sle(), gen_sleu(), gen_slt(), gen_sltu(), gen_subsi3(), gen_tablejump(), gen_zero_extendhidi2(), gen_zero_extendhisi2(), gen_zero_extendqidi2(), gen_zero_extendqihi2(), gen_zero_extendqisi2(), gen_zero_extendsidi2(), machine_dependent_reorg(), mips16_unextended_reference_p(), mips_add_offset(), mips_address_insns(), mips_adjust_insn_length(), mips_asm_file_start(), mips_can_use_return_insn(), mips_cannot_force_const_mem(), mips_classify_address(), mips_classify_symbol(), mips_conditional_register_usage(), mips_const_double_ok(), mips_const_insns(), mips_debugger_offset(), mips_encode_section_info(), mips_expand_call(), mips_expand_epilogue(), mips_expand_prologue(), mips_file_start(), mips_init_libfuncs(), mips_initial_elimination_offset(), mips_legitimate_address_p(), mips_legitimize_const_move(), mips_move_1word(), mips_move_2words(), mips_order_regs_for_local_alloc(), mips_output_division(), mips_output_function_prologue(), mips_output_mi_thunk(), mips_output_move(), mips_preferred_reload_class(), mips_register_move_cost(), mips_regno_mode_ok_for_base_p(), mips_relational_operand_ok_p(), mips_reorg(), mips_restore_reg(), mips_rtx_costs(), mips_save_reg(), mips_save_reg_p(), mips_secondary_reload_class(), mips_select_rtx_section(), mips_select_section(), mips_split_symbol(), mips_symbol_insns(), mips_symbolic_address_p(), mips_unique_section(), mips_use_blocks_for_constant_p(), movdi_operand(), move_operand(), output_0(), output_116(), output_117(), output_118(), output_121(), output_91(), output_96(), output_97(), output_block_move(), override_options(), peephole(), print_operand(), print_operand_address(), recog(), recog_1(), recog_2(), recog_3(), recog_4(), recog_5(), recog_6(), recog_7(), recog_8(), recog_9(), reg_or_0_operand(), save_restore_insns(), simple_memory_operand(), split_1(), and split_insns().
| #define TARGET_MIPS3900 (mips_arch == PROCESSOR_R3900) |
| #define TARGET_MIPS4000 (mips_arch == PROCESSOR_R4000) |
Definition at line 358 of file mips.h.
Referenced by gen_muldi3(), gen_mulsi3(), recog_3(), recog_4(), recog_7(), recog_8(), and recog_9().
| #define TARGET_MIPS4300 (mips_arch == PROCESSOR_R4300) |
Definition at line 361 of file mips.h.
Referenced by gen_muldf3(), gen_mulsf3(), recog_1(), and recog_2().
| #define TARGET_MIPS5400 (mips_arch == PROCESSOR_R5400) |
Definition at line 364 of file mips.h.
Referenced by output_34(), output_37(), recog_3(), and recog_9().
| #define TARGET_MIPS5500 (mips_arch == PROCESSOR_R5500) |
Definition at line 365 of file mips.h.
Referenced by output_34(), output_37(), output_46(), output_54(), recog_3(), and recog_9().
| #define TARGET_MIPS_AS (!TARGET_GAS) |
| #define TARGET_NAME_REGS (target_flags & MASK_NAME_REGS) |
| #define TARGET_NO_CHECK_ZERO_DIV (target_flags & MASK_NO_CHECK_ZERO_DIV) |
Definition at line 329 of file mips.h.
Referenced by gen_divdi3(), gen_divmoddi4(), gen_divmodsi4(), gen_divsi3(), gen_moddi3(), gen_modsi3(), gen_udivdi3(), gen_udivmoddi4(), gen_udivmodsi4(), gen_udivsi3(), gen_umoddi3(), and gen_umodsi3().
| #define TARGET_OPTIONS |
Value:
{ \
SUBTARGET_TARGET_OPTIONS \
{ "tune=", &mips_tune_string, \
N_("Specify CPU for scheduling purposes")}, \
{ "arch=", &mips_arch_string, \
N_("Specify CPU for code generation purposes")}, \
{ "abi=", &mips_abi_string, \
N_("Specify an ABI")}, \
{ "ips", &mips_isa_string, \
N_("Specify a Standard MIPS ISA")}, \
{ "entry", &mips_entry_string, \
N_("Use mips16 entry/exit psuedo ops")}, \
{ "no-mips16", &mips_no_mips16_string, \
N_("Don't use MIPS16 instructions")}, \
{ "no-flush-func", &mips_cache_flush_func, \
N_("Don't call any cache flush functions")}, \
{ "flush-func=", &mips_cache_flush_func, \
N_("Specify cache flush function")}, \
}
| #define TARGET_PTRMEMFUNC_VBIT_LOCATION ptrmemfunc_vbit_in_delta |
| #define TARGET_SINGLE_FLOAT (target_flags & MASK_SINGLE_FLOAT) |
Definition at line 320 of file mips.h.
Referenced by build_mips16_call_stub(), compute_frame_size(), function_arg(), function_arg_advance(), mips_build_va_list(), mips_can_use_return_insn(), mips_for_each_saved_reg(), mips_function_value(), mips_setup_incoming_varargs(), mips_va_arg(), mips_va_start(), override_options(), recog_1(), and save_restore_insns().
| #define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT) |
| #define TARGET_SPLIT_ADDRESSES (target_flags & MASK_SPLIT_ADDR) |
| #define TARGET_SR71K (mips_arch == PROCESSOR_SR71000) |
Definition at line 367 of file mips.h.
Referenced by output_217(), output_218(), and output_block_move().
| #define TARGET_STATS (target_flags & MASK_STATS) |
Definition at line 288 of file mips.h.
Referenced by final_prescan_insn(), iq2000_move_1word(), mips_move_1word(), mips_move_2words(), mips_output_function_epilogue(), output_153(), output_154(), output_155(), output_156(), output_block_move(), and print_operand().
| #define TARGET_UNINIT_CONST_IN_RODATA (target_flags & MASK_UNINIT_CONST_IN_RODATA) |
| #define TARGET_VERSION_INTERNAL | ( | STREAM | ) | fprintf (STREAM, " %s %s", MIPS_VERSION, MACHINE_TYPE) |
| #define TEXT_SECTION | ( | ) |
Value:
do { \ extern FILE *asm_out_text_file; \ if (TARGET_FILE_SWITCHING) \ asm_out_file = asm_out_text_file; \ fputs (TEXT_SECTION_ASM_OP, asm_out_file); \ fputc ('\n', asm_out_file); \ } while (0)
| #define TRAMPOLINE_TEMPLATE | ( | STREAM | ) |
Value:
{ \
fprintf (STREAM, "\t.word\t0x03e00821\t\t# move $1,$31\n"); \
fprintf (STREAM, "\t.word\t0x04110001\t\t# bgezal $0,.+8\n"); \
fprintf (STREAM, "\t.word\t0x00000000\t\t# nop\n"); \
if (Pmode == DImode) \
{ \
fprintf (STREAM, "\t.word\t0xdfe30014\t\t# ld $3,20($31)\n"); \
fprintf (STREAM, "\t.word\t0xdfe2001c\t\t# ld $2,28($31)\n"); \
} \
else \
{ \
fprintf (STREAM, "\t.word\t0x8fe30014\t\t# lw $3,20($31)\n"); \
fprintf (STREAM, "\t.word\t0x8fe20018\t\t# lw $2,24($31)\n"); \
} \
fprintf (STREAM, "\t.word\t0x0060c821\t\t# move $25,$3 (abicalls)\n"); \
fprintf (STREAM, "\t.word\t0x00600008\t\t# jr $3\n"); \
fprintf (STREAM, "\t.word\t0x0020f821\t\t# move $31,$1\n"); \
if (Pmode == DImode) \
{ \
fprintf (STREAM, "\t.dword\t0x00000000\t\t# <function address>\n"); \
fprintf (STREAM, "\t.dword\t0x00000000\t\t# <static chain value>\n"); \
} \
else \
{ \
fprintf (STREAM, "\t.word\t0x00000000\t\t# <function address>\n"); \
fprintf (STREAM, "\t.word\t0x00000000\t\t# <static chain value>\n"); \
} \
}
| #define TRULY_NOOP_TRUNCATION | ( | OUTPREC, | |||
| INPREC | ) | (TARGET_64BIT ? ((INPREC) <= 32 || (OUTPREC) > 32) : 1) |
| #define TUNE_MIPS3000 (mips_tune == PROCESSOR_R3000) |
| #define TUNE_MIPS3900 (mips_tune == PROCESSOR_R3900) |
| #define TUNE_MIPS5000 (mips_tune == PROCESSOR_R5000) |
| #define TUNE_MIPS5400 (mips_tune == PROCESSOR_R5400) |
| #define TUNE_MIPS5500 (mips_tune == PROCESSOR_R5500) |
| #define TUNE_MIPS6000 (mips_tune == PROCESSOR_R6000) |
| #define TUNE_SB1 (mips_tune == PROCESSOR_SB1) |
Definition at line 377 of file mips.h.
Referenced by mips_multipass_dfa_lookahead(), mips_rtx_costs(), and override_options().
| #define UNITS_PER_DOUBLE (TYPE_PRECISION (double_type_node) / BITS_PER_UNIT) |
| #define UNITS_PER_FPREG (TARGET_FLOAT64 ? 8 : 4) |
Definition at line 1492 of file mips.h.
Referenced by compute_frame_size(), iq2000_setup_incoming_varargs(), mips_emit_frame_related_store(), mips_fill_delay_slot(), mips_hard_regno_nregs(), mips_setup_incoming_varargs(), mips_va_start(), override_options(), and save_restore_insns().
| #define UNITS_PER_FPVALUE (TARGET_SOFT_FLOAT ? 0 : (LONG_DOUBLE_TYPE_SIZE / BITS_PER_UNIT)) |
Definition at line 1504 of file mips.h.
Referenced by build_mips16_call_stub(), compute_frame_size(), mips_arg_info(), mips_can_use_return_insn(), mips_gimplify_va_arg_expr(), mips_save_reg_p(), mips_setup_incoming_varargs(), mips_va_start(), and override_options().
| #define UNITS_PER_HWFPVALUE (TARGET_SOFT_FLOAT ? 0 : FP_INC * UNITS_PER_FPREG) |
Definition at line 1500 of file mips.h.
Referenced by mips_arg_info(), mips_function_value(), mips_gimplify_va_arg_expr(), mips_setup_incoming_varargs(), mips_va_arg(), and save_restore_insns().
| #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4) |
| typedef struct mips_args CUMULATIVE_ARGS |
| enum block_move_type |
| enum cmp_type |
| enum delay_type |
| enum mips_abicalls_type |
| enum processor_type |
| enum reg_class |
Definition at line 77 of file cplus-dem.c.
| char* asm_file_name |
| enum cmp_type branch_type |
| char call_used_regs[] |
Definition at line 94 of file regclass.c.
Referenced by _reg_unused_after(), aggregate_value_p(), alpha_sa_mask(), alpha_sa_size(), arm_compute_initial_elimination_offset(), arm_compute_save_reg0_reg12_mask(), arm_expand_prologue(), arm_get_frame_offsets(), arm_get_vfp_saved_size(), arm_output_epilogue(), arm_override_options(), avr_output_function_epilogue(), avr_output_function_prologue(), avr_regs_to_save(), block_alloc(), c4x_expand_epilogue(), c4x_expand_prologue(), c4x_isr_reg_used_p(), c4x_null_epilogue_p(), calc_live_regs(), clipper_frame_size(), clipper_output_function_epilogue(), clipper_output_function_prologue(), clobbered_register(), compute_frame_size(), compute_register_save_size(), compute_vrsave_mask(), cris_conditional_register_usage(), cris_initial_frame_pointer_offset(), cris_reg_saved_in_regsave_area(), cris_simple_epilogue(), cris_target_asm_function_epilogue(), cris_target_asm_function_prologue(), crx_compute_save_regs(), cselib_process_insn(), d30v_stack_info(), df_record_entry_block_defs(), dsp16xx_call_saved_register(), dw2_build_landing_pads(), elxsi_output_function_epilogue(), elxsi_output_function_prologue(), emit_safe_across_calls(), expand_epilogue(), expand_interrupt_handler_epilogue(), expand_interrupt_handler_prologue(), expand_prologue(), final_start_function(), find_equiv_reg(), find_gr_spill(), find_next_ref(), find_reg(), first_reg_to_save(), fix_range(), fix_register(), fixup_match_2(), fp_regs_to_save(), frv_conditional_register_usage(), frv_stack_info(), function_epilogue(), function_prologue(), generate_set_vrsave(), global_alloc(), global_conflicts(), globalize_reg(), GTY(), hppa_expand_epilogue(), hppa_expand_prologue(), i860_output_function_epilogue(), i860_output_function_prologue(), i960_function_name_declare(), i960_output_function_prologue(), ia64_compute_frame_size(), incoming_reg(), init_caller_save(), init_reg_sets(), init_reg_sets_1(), initial_elimination_offset(), ip2k_init_elim_offset(), ix86_save_reg(), live_in_edge(), loop_invariant_p(), m32c_conditional_register_usage(), m68hc11_conditional_register_usage(), m68hc11_initial_elimination_offset(), m68hc11_total_frame_size(), m68k_output_function_epilogue(), m68k_output_function_prologue(), m68k_save_reg(), m88k_layout_frame(), mark_set_resources(), migrate_btr_defs(), mips_conditional_register_usage(), mips_global_pointer(), mips_save_reg_p(), mmix_conditional_register_usage(), mmix_expand_epilogue(), mmix_expand_prologue(), mmix_initial_elimination_offset(), mmix_local_regno(), mmix_reorg(), mmix_target_asm_function_epilogue(), mmix_target_asm_function_prologue(), mmix_use_simple_return(), mn10300_get_live_callee_saved_regs(), n_dregs_to_save(), n_pregs_to_save(), n_regs_saved_by_prologue(), need_to_save(), next_scratch_gr_reg(), ns32k_output_function_epilogue(), ns32k_output_function_prologue(), output_tst(), pdp11_output_function_epilogue(), pdp11_output_function_prologue(), recompute_gain_for_pattern_seq(), reg_set_between_after_reload_p(), reg_unused_after(), reg_used_between_after_reload_p(), regrename_optimize(), reload(), reload_combine(), reload_cse_move2add(), restore_regs(), rs6000_conditional_register_usage(), rs6000_emit_epilogue(), rs6000_emit_prologue(), s390_call_saved_register_used(), s390_conditional_register_usage(), save_or_restore_regs(), save_regs(), saved_regs_mentioned(), score_save_reg_p(), sequent_regs_live(), setup_save_areas(), sh_media_register_for_return(), sh_output_mi_thunk(), sparc_compute_frame_size(), sparc_flat_compute_frame_size(), thumb_compute_save_reg_mask(), thumb_expand_epilogue(), thumb_expand_prologue(), thumb_output_function_prologue(), thumb_unexpanded_epilogue(), total_frame_size(), use_return_insn(), valid_initial_value_p(), vax_output_function_prologue(), we32k_output_function_epilogue(), we32k_output_function_prologue(), x86_order_regs_for_local_alloc(), and xstormy16_epilogue_uses().
| const char* current_function_file |
| int g_switch_set |
| int g_switch_value |
| int inside_function |
| int may_call_alloca |
| const char* mips_abi_string |
| enum processor_type mips_arch |
Definition at line 308 of file mips.c.
Referenced by mips_file_start(), mips_set_architecture(), and override_options().
| const char* mips_arch_string |
| const char* mips_cache_flush_func |
| enum reg_class mips_char_to_class[256] |
| int mips_dbx_regno[] |
| int mips_entry |
| const char* mips_entry_string |
| char mips_hard_regno_mode_ok[][FIRST_PSEUDO_REGISTER] |
| const char* mips_isa_string |
| const char* mips_no_mips16_string |
| char mips_print_operand_punct[256] |
| char mips_reg_names[][8] |
| enum reg_class mips_regno_to_class[] |
Definition at line 231 of file mips.c.
Referenced by mips_classify_symbol(), mips_file_start(), mips_in_small_data_p(), mips_select_rtx_section(), and override_options().
| enum processor_type mips_tune |
| const char* mips_tune_string |
| char** save_argv |
Definition at line 207 of file sgi_cmd_line.cxx.
| int sdb_label_count |
| int set_nomacro |
| int set_noreorder |
| int set_volatile |
| int sym_lineno |
| int target_flags |
Definition at line 35 of file gensupport.c.
1.5.6