Open64: osprey/cygnus/include/opcode/avr.h Source File

00001 /*
00002  * Copyright 2003, 2004, 2005, 2006 PathScale, Inc.  All Rights Reserved.
00003  */
00004 
00005 /* Opcode table for the Atmel AVR micro controllers.
00006 
00007    Copyright 2000, 2001, 2004 Free Software Foundation, Inc.
00008    Contributed by Denis Chertykov <denisc@overta.ru>
00009    
00010    This program is free software; you can redistribute it and/or modify
00011    it under the terms of the GNU General Public License as published by
00012    the Free Software Foundation; either version 2, or (at your option)
00013    any later version.
00014 
00015    This program is distributed in the hope that it will be useful,
00016    but WITHOUT ANY WARRANTY; without even the implied warranty of
00017    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00018    GNU General Public License for more details.
00019 
00020    You should have received a copy of the GNU General Public License
00021    along with this program; if not, write to the Free Software
00022    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
00023 
00024 #define AVR_ISA_1200  0x0001 /* in the beginning there was ... */
00025 #define AVR_ISA_LPM   0x0002 /* device has LPM */
00026 #define AVR_ISA_LPMX  0x0004 /* device has LPM Rd,Z[+] */
00027 #define AVR_ISA_SRAM  0x0008 /* device has SRAM (LD, ST, PUSH, POP, ...) */
00028 #define AVR_ISA_MEGA  0x0020 /* device has >8K program memory (JMP and CALL
00029         supported, no 8K wrap on RJMP and RCALL) */
00030 #define AVR_ISA_MUL   0x0040 /* device has new core (MUL, FMUL, ...) */
00031 #define AVR_ISA_ELPM  0x0080 /* device has >64K program memory (ELPM) */
00032 #define AVR_ISA_ELPMX 0x0100 /* device has ELPM Rd,Z[+] */
00033 #define AVR_ISA_SPM   0x0200 /* device can program itself */
00034 #define AVR_ISA_BRK   0x0400 /* device has BREAK (on-chip debug) */
00035 #define AVR_ISA_EIND  0x0800 /* device has >128K program memory (none yet) */
00036 #define AVR_ISA_MOVW  0x1000 /* device has MOVW */
00037 
00038 #define AVR_ISA_TINY1 (AVR_ISA_1200 | AVR_ISA_LPM)
00039 #define AVR_ISA_2xxx (AVR_ISA_TINY1 | AVR_ISA_SRAM)
00040 #define AVR_ISA_TINY2 (AVR_ISA_2xxx | AVR_ISA_MOVW | AVR_ISA_LPMX | \
00041                        AVR_ISA_SPM | AVR_ISA_BRK)
00042 #define AVR_ISA_M8   (AVR_ISA_2xxx | AVR_ISA_MUL | AVR_ISA_MOVW | \
00043                       AVR_ISA_LPMX | AVR_ISA_SPM)
00044 #define AVR_ISA_M603 (AVR_ISA_2xxx | AVR_ISA_MEGA)
00045 #define AVR_ISA_M103 (AVR_ISA_M603 | AVR_ISA_ELPM)
00046 #define AVR_ISA_M161 (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_MOVW | \
00047                       AVR_ISA_LPMX | AVR_ISA_SPM)
00048 #define AVR_ISA_94K  (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_MOVW | AVR_ISA_LPMX)
00049 #define AVR_ISA_M323 (AVR_ISA_M161 | AVR_ISA_BRK)
00050 #define AVR_ISA_M128 (AVR_ISA_M323 | AVR_ISA_ELPM | AVR_ISA_ELPMX)
00051 
00052 #define AVR_ISA_ALL   0xFFFF
00053 
00054 #define REGISTER_P(x) ((x) == 'r'   \
00055            || (x) == 'd'    \
00056            || (x) == 'w'    \
00057            || (x) == 'a'    \
00058            || (x) == 'v')
00059 
00060 /* Undefined combination of operands - does the register
00061    operand overlap with pre-decremented or post-incremented
00062    pointer register (like ld r31,Z+)?  */
00063 #define AVR_UNDEF_P(x) (((x) & 0xFFED) == 0x91E5 ||   \
00064   ((x) & 0xFDEF) == 0x91AD || ((x) & 0xFDEF) == 0x91AE || \
00065   ((x) & 0xFDEF) == 0x91C9 || ((x) & 0xFDEF) == 0x91CA || \
00066   ((x) & 0xFDEF) == 0x91E1 || ((x) & 0xFDEF) == 0x91E2)
00067 
00068 /* Is this a skip instruction {cpse,sbic,sbis,sbrc,sbrs}?  */
00069 #define AVR_SKIP_P(x) (((x) & 0xFC00) == 0x1000 ||    \
00070   ((x) & 0xFD00) == 0x9900 || ((x) & 0xFC08) == 0xFC00)
00071 
00072 /* Is this `ldd r,b+0' or `std b+0,r' (b={Y,Z}, disassembled as
00073    `ld r,b' or `st b,r' respectively - next opcode entry)?  */
00074 #define AVR_DISP0_P(x) (((x) & 0xFC07) == 0x8000)
00075 
00076 /* constraint letters
00077    r - any register
00078    d - `ldi' register (r16-r31)
00079    v - `movw' even register (r0, r2, ..., r28, r30)
00080    a - `fmul' register (r16-r23)
00081    w - `adiw' register (r24,r26,r28,r30)
00082    e - pointer registers (X,Y,Z)
00083    b - base pointer register and displacement ([YZ]+disp)
00084    z - Z pointer register (for [e]lpm Rd,Z[+])
00085    M - immediate value from 0 to 255
00086    n - immediate value from 0 to 255 ( n = ~M ). Relocation impossible
00087    s - immediate value from 0 to 7
00088    P - Port address value from 0 to 63. (in, out)
00089    p - Port address value from 0 to 31. (cbi, sbi, sbic, sbis)
00090    K - immediate value from 0 to 63 (used in `adiw', `sbiw')
00091    i - immediate value
00092    l - signed pc relative offset from -64 to 63
00093    L - signed pc relative offset from -2048 to 2047
00094    h - absolute code address (call, jmp)
00095    S - immediate value from 0 to 7 (S = s << 4)
00096    ? - use this opcode entry if no parameters, else use next opcode entry
00097 
00098    Order is important - some binary opcodes have more than one name,
00099    the disassembler will only see the first match.
00100 
00101    Remaining undefined opcodes (1699 total - some of them might work
00102    as normal instructions if not all of the bits are decoded):
00103 
00104     0x0001...0x00ff    (255) (known to be decoded as `nop' by the old core)
00105    "100100xxxxxxx011"  (128) 0x9[0-3][0-9a-f][3b]
00106    "100100xxxxxx1000"   (64) 0x9[0-3][0-9a-f]8
00107    "1001001xxxxx01xx"  (128) 0x9[23][0-9a-f][4-7]
00108    "1001010xxxxx0100"   (32) 0x9[45][0-9a-f]4
00109    "1001010x001x1001"    (4) 0x9[45][23]9
00110    "1001010x01xx1001"    (8) 0x9[45][4-7]9
00111    "1001010x1xxx1001"   (16) 0x9[45][8-9a-f]9
00112    "1001010xxxxx1011"   (32) 0x9[45][0-9a-f]b
00113    "10010101001x1000"    (2) 0x95[23]8
00114    "1001010101xx1000"    (4) 0x95[4-7]8
00115    "1001010110111000"    (1) 0x95b8
00116    "1001010111111000"    (1) 0x95f8 (`espm' removed in databook update)
00117    "11111xxxxxxx1xxx" (1024) 0xf[8-9a-f][0-9a-f][8-9a-f]
00118  */
00119 
00120 AVR_INSN (clc,  "",    "1001010010001000", 1, AVR_ISA_1200, 0x9488)
00121 AVR_INSN (clh,  "",    "1001010011011000", 1, AVR_ISA_1200, 0x94d8)
00122 AVR_INSN (cli,  "",    "1001010011111000", 1, AVR_ISA_1200, 0x94f8)
00123 AVR_INSN (cln,  "",    "1001010010101000", 1, AVR_ISA_1200, 0x94a8)
00124 AVR_INSN (cls,  "",    "1001010011001000", 1, AVR_ISA_1200, 0x94c8)
00125 AVR_INSN (clt,  "",    "1001010011101000", 1, AVR_ISA_1200, 0x94e8)
00126 AVR_INSN (clv,  "",    "1001010010111000", 1, AVR_ISA_1200, 0x94b8)
00127 AVR_INSN (clz,  "",    "1001010010011000", 1, AVR_ISA_1200, 0x9498)
00128 
00129 AVR_INSN (sec,  "",    "1001010000001000", 1, AVR_ISA_1200, 0x9408)
00130 AVR_INSN (seh,  "",    "1001010001011000", 1, AVR_ISA_1200, 0x9458)
00131 AVR_INSN (sei,  "",    "1001010001111000", 1, AVR_ISA_1200, 0x9478)
00132 AVR_INSN (sen,  "",    "1001010000101000", 1, AVR_ISA_1200, 0x9428)
00133 AVR_INSN (ses,  "",    "1001010001001000", 1, AVR_ISA_1200, 0x9448)
00134 AVR_INSN (set,  "",    "1001010001101000", 1, AVR_ISA_1200, 0x9468)
00135 AVR_INSN (sev,  "",    "1001010000111000", 1, AVR_ISA_1200, 0x9438)
00136 AVR_INSN (sez,  "",    "1001010000011000", 1, AVR_ISA_1200, 0x9418)
00137 
00138    /* Same as {cl,se}[chinstvz] above.  */
00139 AVR_INSN (bclr, "S",   "100101001SSS1000", 1, AVR_ISA_1200, 0x9488)
00140 AVR_INSN (bset, "S",   "100101000SSS1000", 1, AVR_ISA_1200, 0x9408)
00141 
00142 AVR_INSN (icall,"",    "1001010100001001", 1, AVR_ISA_2xxx, 0x9509)
00143 AVR_INSN (ijmp, "",    "1001010000001001", 1, AVR_ISA_2xxx, 0x9409)
00144 
00145 AVR_INSN (lpm,  "?",   "1001010111001000", 1, AVR_ISA_TINY1,0x95c8)
00146 AVR_INSN (lpm,  "r,z", "1001000ddddd010+", 1, AVR_ISA_LPMX, 0x9004)
00147 AVR_INSN (elpm, "?",   "1001010111011000", 1, AVR_ISA_ELPM, 0x95d8)
00148 AVR_INSN (elpm, "r,z", "1001000ddddd011+", 1, AVR_ISA_ELPMX,0x9006)
00149 
00150 AVR_INSN (nop,  "",    "0000000000000000", 1, AVR_ISA_1200, 0x0000)
00151 AVR_INSN (ret,  "",    "1001010100001000", 1, AVR_ISA_1200, 0x9508)
00152 AVR_INSN (reti, "",    "1001010100011000", 1, AVR_ISA_1200, 0x9518)
00153 AVR_INSN (sleep,"",    "1001010110001000", 1, AVR_ISA_1200, 0x9588)
00154 AVR_INSN (break,"",    "1001010110011000", 1, AVR_ISA_BRK,  0x9598)
00155 AVR_INSN (wdr,  "",    "1001010110101000", 1, AVR_ISA_1200, 0x95a8)
00156 AVR_INSN (spm,  "",    "1001010111101000", 1, AVR_ISA_SPM,  0x95e8)
00157 
00158 AVR_INSN (adc,  "r,r", "000111rdddddrrrr", 1, AVR_ISA_1200, 0x1c00)
00159 AVR_INSN (add,  "r,r", "000011rdddddrrrr", 1, AVR_ISA_1200, 0x0c00)
00160 AVR_INSN (and,  "r,r", "001000rdddddrrrr", 1, AVR_ISA_1200, 0x2000)
00161 AVR_INSN (cp,   "r,r", "000101rdddddrrrr", 1, AVR_ISA_1200, 0x1400)
00162 AVR_INSN (cpc,  "r,r", "000001rdddddrrrr", 1, AVR_ISA_1200, 0x0400)
00163 AVR_INSN (cpse, "r,r", "000100rdddddrrrr", 1, AVR_ISA_1200, 0x1000)
00164 AVR_INSN (eor,  "r,r", "001001rdddddrrrr", 1, AVR_ISA_1200, 0x2400)
00165 AVR_INSN (mov,  "r,r", "001011rdddddrrrr", 1, AVR_ISA_1200, 0x2c00)
00166 AVR_INSN (mul,  "r,r", "100111rdddddrrrr", 1, AVR_ISA_MUL,  0x9c00)
00167 AVR_INSN (or,   "r,r", "001010rdddddrrrr", 1, AVR_ISA_1200, 0x2800)
00168 AVR_INSN (sbc,  "r,r", "000010rdddddrrrr", 1, AVR_ISA_1200, 0x0800)
00169 AVR_INSN (sub,  "r,r", "000110rdddddrrrr", 1, AVR_ISA_1200, 0x1800)
00170 
00171    /* Shorthand for {eor,add,adc,and} r,r above.  */
00172 AVR_INSN (clr,  "r=r", "001001rdddddrrrr", 1, AVR_ISA_1200, 0x2400)
00173 AVR_INSN (lsl,  "r=r", "000011rdddddrrrr", 1, AVR_ISA_1200, 0x0c00)
00174 AVR_INSN (rol,  "r=r", "000111rdddddrrrr", 1, AVR_ISA_1200, 0x1c00)
00175 AVR_INSN (tst,  "r=r", "001000rdddddrrrr", 1, AVR_ISA_1200, 0x2000)
00176 
00177 AVR_INSN (andi, "d,M", "0111KKKKddddKKKK", 1, AVR_ISA_1200, 0x7000)
00178   /*XXX special case*/
00179 AVR_INSN (cbr,  "d,n", "0111KKKKddddKKKK", 1, AVR_ISA_1200, 0x7000)
00180 
00181 AVR_INSN (ldi,  "d,M", "1110KKKKddddKKKK", 1, AVR_ISA_1200, 0xe000)
00182 AVR_INSN (ser,  "d",   "11101111dddd1111", 1, AVR_ISA_1200, 0xef0f)
00183 
00184 AVR_INSN (ori,  "d,M", "0110KKKKddddKKKK", 1, AVR_ISA_1200, 0x6000)
00185 AVR_INSN (sbr,  "d,M", "0110KKKKddddKKKK", 1, AVR_ISA_1200, 0x6000)
00186 
00187 AVR_INSN (cpi,  "d,M", "0011KKKKddddKKKK", 1, AVR_ISA_1200, 0x3000)
00188 AVR_INSN (sbci, "d,M", "0100KKKKddddKKKK", 1, AVR_ISA_1200, 0x4000)
00189 AVR_INSN (subi, "d,M", "0101KKKKddddKKKK", 1, AVR_ISA_1200, 0x5000)
00190 
00191 AVR_INSN (sbrc, "r,s", "1111110rrrrr0sss", 1, AVR_ISA_1200, 0xfc00)
00192 AVR_INSN (sbrs, "r,s", "1111111rrrrr0sss", 1, AVR_ISA_1200, 0xfe00)
00193 AVR_INSN (bld,  "r,s", "1111100ddddd0sss", 1, AVR_ISA_1200, 0xf800)
00194 AVR_INSN (bst,  "r,s", "1111101ddddd0sss", 1, AVR_ISA_1200, 0xfa00)
00195 
00196 AVR_INSN (in,   "r,P", "10110PPdddddPPPP", 1, AVR_ISA_1200, 0xb000)
00197 AVR_INSN (out,  "P,r", "10111PPrrrrrPPPP", 1, AVR_ISA_1200, 0xb800)
00198 
00199 AVR_INSN (adiw, "w,K", "10010110KKddKKKK", 1, AVR_ISA_2xxx, 0x9600)
00200 AVR_INSN (sbiw, "w,K", "10010111KKddKKKK", 1, AVR_ISA_2xxx, 0x9700)
00201 
00202 AVR_INSN (cbi,  "p,s", "10011000pppppsss", 1, AVR_ISA_1200, 0x9800)
00203 AVR_INSN (sbi,  "p,s", "10011010pppppsss", 1, AVR_ISA_1200, 0x9a00)
00204 AVR_INSN (sbic, "p,s", "10011001pppppsss", 1, AVR_ISA_1200, 0x9900)
00205 AVR_INSN (sbis, "p,s", "10011011pppppsss", 1, AVR_ISA_1200, 0x9b00)
00206 
00207 AVR_INSN (brcc, "l",   "111101lllllll000", 1, AVR_ISA_1200, 0xf400)
00208 AVR_INSN (brcs, "l",   "111100lllllll000", 1, AVR_ISA_1200, 0xf000)
00209 AVR_INSN (breq, "l",   "111100lllllll001", 1, AVR_ISA_1200, 0xf001)
00210 AVR_INSN (brge, "l",   "111101lllllll100", 1, AVR_ISA_1200, 0xf404)
00211 AVR_INSN (brhc, "l",   "111101lllllll101", 1, AVR_ISA_1200, 0xf405)
00212 AVR_INSN (brhs, "l",   "111100lllllll101", 1, AVR_ISA_1200, 0xf005)
00213 AVR_INSN (brid, "l",   "111101lllllll111", 1, AVR_ISA_1200, 0xf407)
00214 AVR_INSN (brie, "l",   "111100lllllll111", 1, AVR_ISA_1200, 0xf007)
00215 AVR_INSN (brlo, "l",   "111100lllllll000", 1, AVR_ISA_1200, 0xf000)
00216 AVR_INSN (brlt, "l",   "111100lllllll100", 1, AVR_ISA_1200, 0xf004)
00217 AVR_INSN (brmi, "l",   "111100lllllll010", 1, AVR_ISA_1200, 0xf002)
00218 AVR_INSN (brne, "l",   "111101lllllll001", 1, AVR_ISA_1200, 0xf401)
00219 AVR_INSN (brpl, "l",   "111101lllllll010", 1, AVR_ISA_1200, 0xf402)
00220 AVR_INSN (brsh, "l",   "111101lllllll000", 1, AVR_ISA_1200, 0xf400)
00221 AVR_INSN (brtc, "l",   "111101lllllll110", 1, AVR_ISA_1200, 0xf406)
00222 AVR_INSN (brts, "l",   "111100lllllll110", 1, AVR_ISA_1200, 0xf006)
00223 AVR_INSN (brvc, "l",   "111101lllllll011", 1, AVR_ISA_1200, 0xf403)
00224 AVR_INSN (brvs, "l",   "111100lllllll011", 1, AVR_ISA_1200, 0xf003)
00225 
00226    /* Same as br?? above.  */
00227 AVR_INSN (brbc, "s,l", "111101lllllllsss", 1, AVR_ISA_1200, 0xf400)
00228 AVR_INSN (brbs, "s,l", "111100lllllllsss", 1, AVR_ISA_1200, 0xf000)
00229 
00230 AVR_INSN (rcall, "L",  "1101LLLLLLLLLLLL", 1, AVR_ISA_1200, 0xd000)
00231 AVR_INSN (rjmp,  "L",  "1100LLLLLLLLLLLL", 1, AVR_ISA_1200, 0xc000)
00232 
00233 AVR_INSN (call, "h",   "1001010hhhhh111h", 2, AVR_ISA_MEGA, 0x940e)
00234 AVR_INSN (jmp,  "h",   "1001010hhhhh110h", 2, AVR_ISA_MEGA, 0x940c)
00235 
00236 AVR_INSN (asr,  "r",   "1001010rrrrr0101", 1, AVR_ISA_1200, 0x9405)
00237 AVR_INSN (com,  "r",   "1001010rrrrr0000", 1, AVR_ISA_1200, 0x9400)
00238 AVR_INSN (dec,  "r",   "1001010rrrrr1010", 1, AVR_ISA_1200, 0x940a)
00239 AVR_INSN (inc,  "r",   "1001010rrrrr0011", 1, AVR_ISA_1200, 0x9403)
00240 AVR_INSN (lsr,  "r",   "1001010rrrrr0110", 1, AVR_ISA_1200, 0x9406)
00241 AVR_INSN (neg,  "r",   "1001010rrrrr0001", 1, AVR_ISA_1200, 0x9401)
00242 AVR_INSN (pop,  "r",   "1001000rrrrr1111", 1, AVR_ISA_2xxx, 0x900f)
00243 AVR_INSN (push, "r",   "1001001rrrrr1111", 1, AVR_ISA_2xxx, 0x920f)
00244 AVR_INSN (ror,  "r",   "1001010rrrrr0111", 1, AVR_ISA_1200, 0x9407)
00245 AVR_INSN (swap, "r",   "1001010rrrrr0010", 1, AVR_ISA_1200, 0x9402)
00246 
00247    /* Known to be decoded as `nop' by the old core.  */
00248 AVR_INSN (movw, "v,v", "00000001ddddrrrr", 1, AVR_ISA_MOVW, 0x0100)
00249 AVR_INSN (muls, "d,d", "00000010ddddrrrr", 1, AVR_ISA_MUL,  0x0200)
00250 AVR_INSN (mulsu,"a,a", "000000110ddd0rrr", 1, AVR_ISA_MUL,  0x0300)
00251 AVR_INSN (fmul, "a,a", "000000110ddd1rrr", 1, AVR_ISA_MUL,  0x0308)
00252 AVR_INSN (fmuls,"a,a", "000000111ddd0rrr", 1, AVR_ISA_MUL,  0x0380)
00253 AVR_INSN (fmulsu,"a,a","000000111ddd1rrr", 1, AVR_ISA_MUL,  0x0388)
00254 
00255 AVR_INSN (sts,  "i,r", "1001001ddddd0000", 2, AVR_ISA_2xxx, 0x9200)
00256 AVR_INSN (lds,  "r,i", "1001000ddddd0000", 2, AVR_ISA_2xxx, 0x9000)
00257 
00258    /* Special case for b+0, `e' must be next entry after `b',
00259       b={Y=1,Z=0}, ee={X=11,Y=10,Z=00}, !=1 if -e or e+ or X.  */
00260 AVR_INSN (ldd,  "r,b", "10o0oo0dddddbooo", 1, AVR_ISA_2xxx, 0x8000)
00261 AVR_INSN (ld,   "r,e", "100!000dddddee-+", 1, AVR_ISA_1200, 0x8000)
00262 AVR_INSN (std,  "b,r", "10o0oo1rrrrrbooo", 1, AVR_ISA_2xxx, 0x8200)
00263 AVR_INSN (st,   "e,r", "100!001rrrrree-+", 1, AVR_ISA_1200, 0x8200)
00264 
00265    /* These are for devices that don't exist yet
00266       (>128K program memory, PC = EIND:Z).  */
00267 AVR_INSN (eicall, "",  "1001010100011001", 1, AVR_ISA_EIND, 0x9519)
00268 AVR_INSN (eijmp, "",   "1001010000011001", 1, AVR_ISA_EIND, 0x9419)
00269