00001
00002
00003
00004
00005
00006
00007
00008
00009
00010
00011
00012
00013
00014
00015
00016
00017
00018
00019
00020
00021
00022
00023
00024
00025
00026
00027
00028
00029
00030
00031
00032
00033
00034
00035
00036
00037
00038
00039
00040
00041
00042
00043
00044
00045
00046
00047
00048
00049
00050
00051
00052
00053
00054
00055
00056
00057
00058
00059
00060 #define INCLUDING_IN_REGISTER
00061
00062 #include <vector>
00063 #include <utility>
00064 #include "defs.h"
00065 #include "errors.h"
00066 #include "tracing.h"
00067 #include "mempool.h"
00068 #include "config.h"
00069 #include "glob.h"
00070 #include "util.h"
00071 #include "calls.h"
00072 #include "data_layout.h"
00073 #include "tn.h"
00074 #include "targ_sim.h"
00075 #include "op.h"
00076
00077 #include "targ_isa_registers.h"
00078 #include "targ_abi_properties.h"
00079 #include "targ_isa_operands.h"
00080
00081 #include "register.h"
00082 #include "cgtarget.h"
00083
00084
00085
00086
00087
00088
00089
00090
00091
00092
00093
00094 #define FRAME_POINTER_REQUIRED_FOR_PU \
00095 (Current_PU_Stack_Model != SMODEL_SMALL || PUSH_FRAME_POINTER_ON_STACK)
00096
00097
00098
00099
00100
00101
00102
00103
00104 REGISTER_SUBCLASS_INFO REGISTER_SUBCLASS_info[ISA_REGISTER_SUBCLASS_MAX + 1];
00105 ISA_REGISTER_CLASS REGISTER_CLASS_vec[ISA_REGISTER_CLASS_MAX + 1];
00106 REGISTER_CLASS_INFO REGISTER_CLASS_info[ISA_REGISTER_CLASS_MAX + 1];
00107 CLASS_REG_PAIR CLASS_REG_PAIR_zero;
00108 CLASS_REG_PAIR CLASS_REG_PAIR_ep;
00109 CLASS_REG_PAIR CLASS_REG_PAIR_gp;
00110 CLASS_REG_PAIR CLASS_REG_PAIR_sp;
00111 CLASS_REG_PAIR CLASS_REG_PAIR_fp;
00112 CLASS_REG_PAIR CLASS_REG_PAIR_ra;
00113 CLASS_REG_PAIR CLASS_REG_PAIR_v0;
00114 CLASS_REG_PAIR CLASS_REG_PAIR_static_link;
00115 CLASS_REG_PAIR CLASS_REG_PAIR_pfs;
00116 CLASS_REG_PAIR CLASS_REG_PAIR_lc;
00117 CLASS_REG_PAIR CLASS_REG_PAIR_ec;
00118 CLASS_REG_PAIR CLASS_REG_PAIR_true;
00119 CLASS_REG_PAIR CLASS_REG_PAIR_fzero;
00120 CLASS_REG_PAIR CLASS_REG_PAIR_fone;
00121 #ifdef TARG_X8664
00122 CLASS_REG_PAIR CLASS_REG_PAIR_f0;
00123 #endif
00124 #ifdef TARG_IA64
00125 CLASS_REG_PAIR CLASS_REG_PAIR_tp;
00126 #endif
00127 #if defined(TARG_SL)
00128 CLASS_REG_PAIR CLASS_REG_PAIR_k0;
00129 CLASS_REG_PAIR CLASS_REG_PAIR_k1;
00130 CLASS_REG_PAIR CLASS_REG_PAIR_ja;
00131 CLASS_REG_PAIR CLASS_REG_PAIR_lc0;
00132 CLASS_REG_PAIR CLASS_REG_PAIR_lc1;
00133 CLASS_REG_PAIR CLASS_REG_PAIR_lc2;
00134 CLASS_REG_PAIR CLASS_REG_PAIR_lc3;
00135 CLASS_REG_PAIR CLASS_REG_PAIR_hi;
00136 CLASS_REG_PAIR CLASS_REG_PAIR_acc0;
00137 CLASS_REG_PAIR CLASS_REG_PAIR_acc1;
00138 CLASS_REG_PAIR CLASS_REG_PAIR_acc2;
00139 CLASS_REG_PAIR CLASS_REG_PAIR_acc3;
00140 CLASS_REG_PAIR CLASS_REG_PAIR_add0;
00141 CLASS_REG_PAIR CLASS_REG_PAIR_add1;
00142 CLASS_REG_PAIR CLASS_REG_PAIR_add2;
00143 CLASS_REG_PAIR CLASS_REG_PAIR_add3;
00144 CLASS_REG_PAIR CLASS_REG_PAIR_add4;
00145 CLASS_REG_PAIR CLASS_REG_PAIR_add5;
00146 CLASS_REG_PAIR CLASS_REG_PAIR_add6;
00147 CLASS_REG_PAIR CLASS_REG_PAIR_add7;
00148 CLASS_REG_PAIR CLASS_REG_PAIR_addsize0;
00149 CLASS_REG_PAIR CLASS_REG_PAIR_addsize1;
00150 CLASS_REG_PAIR CLASS_REG_PAIR_addsize2;
00151 CLASS_REG_PAIR CLASS_REG_PAIR_addsize3;
00152 CLASS_REG_PAIR CLASS_REG_PAIR_addsize4;
00153 CLASS_REG_PAIR CLASS_REG_PAIR_addsize5;
00154 CLASS_REG_PAIR CLASS_REG_PAIR_addsize6;
00155 CLASS_REG_PAIR CLASS_REG_PAIR_addsize7;
00156
00157 CLASS_REG_PAIR CLASS_REG_PAIR_c2acc;
00158 CLASS_REG_PAIR CLASS_REG_PAIR_c2cond;
00159 CLASS_REG_PAIR CLASS_REG_PAIR_c2mvsel;
00160 CLASS_REG_PAIR CLASS_REG_PAIR_c2vlcs;
00161 CLASS_REG_PAIR CLASS_REG_PAIR_c2movpat;
00162 #endif
00163
00164 const CLASS_REG_PAIR CLASS_REG_PAIR_undef =
00165 {CREATE_CLASS_N_REG(ISA_REGISTER_CLASS_UNDEFINED,REGISTER_UNDEFINED)};
00166
00167 #if ISA_REGISTER_MAX >= 64
00168 const REGISTER_SET REGISTER_SET_EMPTY_SET = { 0 };
00169 #endif
00170
00171
00172
00173 enum {
00174 AS_default = 0,
00175 AS_allocatable = 1,
00176 AS_not_allocatable = 2
00177 };
00178
00179 static mUINT8 reg_alloc_status[ISA_REGISTER_CLASS_MAX + 1][REGISTER_MAX + 1];
00180
00181
00182 static vector< pair< ISA_REGISTER_CLASS, REGISTER> > dont_allocate_these_registers;
00183 static vector< pair< ISA_REGISTER_CLASS, REGISTER> > dont_allocate_these_registers_in_pu;
00184
00185
00186
00187
00188
00189
00190
00191
00192
00193
00194 void Set_CLASS_REG_PAIR(CLASS_REG_PAIR& rp, ISA_REGISTER_CLASS rclass, REGISTER reg)
00195 {
00196 rp.class_reg.rclass = rclass;
00197 rp.class_reg.reg = reg;
00198 }
00199
00200
00201
00202
00203
00204
00205
00206
00207
00208
00209 REGISTER_SET
00210 REGISTER_SET_Range(UINT low, UINT high)
00211 {
00212 #if ISA_REGISTER_MAX < 64
00213 Is_True(low >= REGISTER_MIN && low <= high && high <= REGISTER_MAX,
00214 ("REGISTER_SET_Range: bad range specification"));
00215
00216 UINT leading_zeros = (sizeof(REGISTER_SET_WORD) * 8) - high;
00217 UINT trailing_zeros = low - REGISTER_MIN;
00218 return ((REGISTER_SET_WORD)-1 << (leading_zeros + trailing_zeros))
00219 >> leading_zeros;
00220 #else
00221 INT i;
00222 REGISTER_SET set;
00223 for (i = 0; i <= MAX_REGISTER_SET_IDX; ++i) {
00224 UINT this_low = (i * 64) + REGISTER_MIN;
00225 UINT this_high = this_low + 63;
00226 if (low > this_high || high < this_low) {
00227 set.v[i] = 0;
00228 } else {
00229 UINT leading_zeros = high > this_high ? 0 : this_high - high;
00230 UINT trailing_zeros = low < this_low ? 0 : low - this_low;
00231 set.v[i] = ((REGISTER_SET_WORD)-1 << (leading_zeros + trailing_zeros))
00232 >> leading_zeros;
00233 }
00234 }
00235 return set;
00236 #endif
00237 }
00238
00239
00240
00241
00242
00243
00244
00245
00246
00247
00248
00249
00250
00251
00252
00253
00254
00255
00256
00257
00258 static void
00259 Initialize_Register_Class(
00260 ISA_REGISTER_CLASS rclass
00261 )
00262 {
00263 INT32 i;
00264 const ISA_REGISTER_CLASS_INFO *icinfo = ISA_REGISTER_CLASS_Info(rclass);
00265 const char *rcname = ISA_REGISTER_CLASS_INFO_Name(icinfo);
00266 INT bit_size = ISA_REGISTER_CLASS_INFO_Bit_Size(icinfo);
00267 INT first_isa_reg = ISA_REGISTER_CLASS_INFO_First_Reg(icinfo);
00268 INT last_isa_reg = ISA_REGISTER_CLASS_INFO_Last_Reg(icinfo);
00269 INT register_count = last_isa_reg - first_isa_reg + 1;
00270 REGISTER_SET allocatable = REGISTER_SET_EMPTY_SET;
00271 REGISTER_SET caller = REGISTER_SET_EMPTY_SET;
00272 REGISTER_SET callee = REGISTER_SET_EMPTY_SET;
00273 REGISTER_SET func_argument = REGISTER_SET_EMPTY_SET;
00274 REGISTER_SET func_value = REGISTER_SET_EMPTY_SET;
00275 REGISTER_SET shrink_wrap = REGISTER_SET_EMPTY_SET;
00276 REGISTER_SET stacked = REGISTER_SET_EMPTY_SET;
00277 REGISTER_SET rotating = REGISTER_SET_EMPTY_SET;
00278
00279
00280
00281
00282
00283
00284
00285 FmtAssert(rclass >= ISA_REGISTER_CLASS_MIN && rclass <= ISA_REGISTER_CLASS_MAX,
00286 ("invalide register class %d", (INT)rclass));
00287 FmtAssert((sizeof(REGISTER_SET) * 8) >= register_count,
00288 ("REGISTER_SET type cannot represent all registers in "
00289 "the class %s", rcname));
00290
00291 REGISTER_CLASS_name(rclass) = rcname;
00292
00293
00294
00295 for ( i = 0; i < register_count; ++i ) {
00296 INT isa_reg = i + first_isa_reg;
00297 REGISTER reg = i + REGISTER_MIN;
00298 BOOL is_allocatable = ABI_PROPERTY_Is_allocatable(rclass, isa_reg);
00299 INT alloc_status = reg_alloc_status[rclass][reg];
00300
00301
00302
00303
00304 if ( register_count <= 1 ) is_allocatable = FALSE;
00305
00306 switch ( alloc_status ) {
00307 case AS_allocatable:
00308 is_allocatable = TRUE;
00309 break;
00310 case AS_not_allocatable:
00311 is_allocatable = FALSE;
00312 break;
00313 case AS_default:
00314 break;
00315 default:
00316 Is_True(FALSE, ("unhandled allocations status: %d", alloc_status));
00317 }
00318
00319 #ifdef TARG_IA64
00320
00321
00322
00323
00324
00325
00326
00327
00328
00329
00330
00331
00332
00333 if (rclass==ISA_REGISTER_CLASS_branch && reg==1)
00334 is_allocatable = FALSE;
00335 #endif
00336
00337 if ( is_allocatable ) {
00338 allocatable = REGISTER_SET_Union1(allocatable,reg);
00339 #ifdef ABI_PROPERTY_global_ptr
00340 if ( ABI_PROPERTY_Is_global_ptr(rclass, isa_reg) ) {
00341 if ( GP_Is_Preserved ) {
00342
00343 } else if ( Is_Caller_Save_GP ) {
00344
00345 caller = REGISTER_SET_Union1(caller, reg);
00346 } else {
00347
00348 callee = REGISTER_SET_Union1(callee, reg);
00349 }
00350 }
00351 else
00352 #endif
00353 {
00354 #ifdef ABI_PROPERTY_callee // has calling convention
00355 if ( ABI_PROPERTY_Is_callee(rclass, isa_reg) ) {
00356 callee = REGISTER_SET_Union1(callee, reg);
00357 shrink_wrap = REGISTER_SET_Union1(shrink_wrap, reg);
00358 }
00359 if ( ABI_PROPERTY_Is_caller(rclass, isa_reg) )
00360 caller = REGISTER_SET_Union1(caller, reg);
00361 if ( ABI_PROPERTY_Is_func_arg(rclass, isa_reg) )
00362 func_argument = REGISTER_SET_Union1(func_argument, reg);
00363 if ( ABI_PROPERTY_Is_func_val(rclass, isa_reg) )
00364 func_value = REGISTER_SET_Union1(func_value, reg);
00365 #endif
00366 #if defined(TARG_MIPS) || defined(TARG_IA64)
00367 if ( ABI_PROPERTY_Is_ret_addr(rclass, isa_reg) )
00368 shrink_wrap = REGISTER_SET_Union1(shrink_wrap, reg);
00369 #endif
00370
00371 #ifdef ABI_PROPERTY_stacked
00372 if ( ABI_PROPERTY_Is_stacked(rclass, isa_reg) )
00373 stacked = REGISTER_SET_Union1(stacked, reg);
00374 #endif
00375 #if 0 // These code has been removed from PSC 3.2
00376 if( ABI_PROPERTY_Is_eight_bit_reg(rclass, isa_reg) ){
00377 eight_bit_regs = REGISTER_SET_Union1( eight_bit_regs, reg );
00378 }
00379 #endif
00380 }
00381 }
00382
00383 #ifdef TARG_X8664
00384
00385 if (bit_size == 64 &&
00386 Is_Target_32bit() &&
00387 rclass != ISA_REGISTER_CLASS_float) {
00388 bit_size = 32;
00389 }
00390 #endif
00391 REGISTER_bit_size(rclass, reg) = bit_size;
00392 REGISTER_machine_id(rclass, reg) = isa_reg;
00393 REGISTER_allocatable(rclass, reg) = is_allocatable;
00394 #if !defined(TARG_NVISA) //
00395 REGISTER_name(rclass, reg) = ISA_REGISTER_CLASS_INFO_Reg_Name(icinfo, isa_reg);
00396 #endif
00397
00398 #ifdef ABI_PROPERTY_frame_ptr
00399 if ( ABI_PROPERTY_Is_frame_ptr(rclass, isa_reg) ) {
00400 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_fp, reg);
00401 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_fp, rclass);
00402 }
00403 #endif
00404 #ifdef ABI_PROPERTY_static_link
00405 else if ( ABI_PROPERTY_Is_static_link(rclass, isa_reg) ) {
00406 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_static_link, reg);
00407 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_static_link, rclass);
00408 }
00409 #endif
00410 #if defined(TARG_MIPS) || defined(TARG_IA64)
00411 else if ( ABI_PROPERTY_Is_global_ptr(rclass, isa_reg) ) {
00412 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_gp, reg);
00413 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_gp, rclass);
00414 }
00415 else if ( ABI_PROPERTY_Is_ret_addr(rclass, isa_reg) ) {
00416 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_ra, reg);
00417 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_ra, rclass);
00418 }
00419 #endif
00420 #ifdef TARG_IA64
00421 else if ( ABI_PROPERTY_Is_thread_ptr(rclass, isa_reg) ) {
00422 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_tp, reg);
00423 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_tp, rclass);
00424 }
00425 #endif
00426 #ifdef ABI_PROPERTY_stack_ptr
00427 else if ( ABI_PROPERTY_Is_stack_ptr(rclass, isa_reg) ) {
00428 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_sp, reg);
00429 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_sp, rclass);
00430 }
00431 #endif
00432 #if defined(TARG_MIPS) || defined(TARG_IA64)
00433 else if ( ABI_PROPERTY_Is_entry_ptr(rclass, isa_reg) ) {
00434 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_ep, reg);
00435 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_ep, rclass);
00436 }
00437 else if ( ABI_PROPERTY_Is_zero(rclass, isa_reg) ) {
00438 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_zero, reg);
00439 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_zero, rclass);
00440 }
00441 #ifdef TARG_SL
00442 else if ( ABI_PROPERTY_Is_tmp1(rclass, isa_reg) ) {
00443 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_k0, reg);
00444 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_k0, rclass);
00445 }
00446 else if ( ABI_PROPERTY_Is_tmp2(rclass, isa_reg) ) {
00447 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_k1, reg);
00448 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_k1, rclass);
00449 }
00450
00451 else if ( ABI_PROPERTY_Is_jump_addr(rclass, isa_reg) ) {
00452 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_ja, reg);
00453 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_ja, rclass);
00454 }
00455
00456 else if (ABI_PROPERTY_Is_loopcount0(rclass, isa_reg)) {
00457 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_lc0, reg);
00458 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_lc0, rclass);
00459 }
00460 else if (ABI_PROPERTY_Is_loopcount1(rclass, isa_reg)) {
00461 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_lc1, reg);
00462 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_lc1, rclass);
00463 }
00464 else if (ABI_PROPERTY_Is_loopcount2(rclass, isa_reg)) {
00465 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_lc2, reg);
00466 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_lc2, rclass);
00467 }
00468 else if (ABI_PROPERTY_Is_loopcount3(rclass, isa_reg)) {
00469 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_lc3, reg);
00470 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_lc3, rclass);
00471 }
00472 else if (ABI_PROPERTY_Is_hi_reg(rclass, isa_reg)) {
00473 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_hi, reg);
00474 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_hi, rclass);
00475 }
00476 else if (ABI_PROPERTY_Is_acc0(rclass, isa_reg)) {
00477 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_acc0, reg);
00478 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_acc0, rclass);
00479 }
00480 else if (ABI_PROPERTY_Is_acc1(rclass, isa_reg)) {
00481 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_acc1, reg);
00482 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_acc1, rclass);
00483 }
00484 else if (ABI_PROPERTY_Is_acc2(rclass, isa_reg)) {
00485 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_acc2, reg);
00486 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_acc2, rclass);
00487 }
00488 else if (ABI_PROPERTY_Is_acc3(rclass, isa_reg)) {
00489 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_acc3, reg);
00490 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_acc3, rclass);
00491 }
00492 else if (ABI_PROPERTY_Is_add0(rclass, isa_reg)) {
00493 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_add0, reg);
00494 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_add0, rclass);
00495 }
00496 else if (ABI_PROPERTY_Is_add1(rclass, isa_reg)) {
00497 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_add1, reg);
00498 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_add1, rclass);
00499 }
00500 else if (ABI_PROPERTY_Is_add2(rclass, isa_reg)) {
00501 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_add2, reg);
00502 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_add2, rclass);
00503 }
00504 else if (ABI_PROPERTY_Is_add3(rclass, isa_reg)) {
00505 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_add3, reg);
00506 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_add3, rclass);
00507 }
00508 else if (ABI_PROPERTY_Is_add4(rclass, isa_reg)) {
00509 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_add4, reg);
00510 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_add4, rclass);
00511 }
00512 else if (ABI_PROPERTY_Is_add5(rclass, isa_reg)) {
00513 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_add5, reg);
00514 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_add5, rclass);
00515 }
00516 else if (ABI_PROPERTY_Is_add6(rclass, isa_reg)) {
00517 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_add6, reg);
00518 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_add6, rclass);
00519 }
00520 else if (ABI_PROPERTY_Is_add7(rclass, isa_reg)) {
00521 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_add7, reg);
00522 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_add7, rclass);
00523 }
00524 else if (ABI_PROPERTY_Is_addrsize0(rclass, isa_reg)) {
00525 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_addsize0, reg);
00526 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_addsize0, rclass);
00527 }
00528 else if (ABI_PROPERTY_Is_addrsize1(rclass, isa_reg)) {
00529 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_addsize1, reg);
00530 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_addsize1, rclass);
00531 }
00532 else if (ABI_PROPERTY_Is_addrsize2(rclass, isa_reg)) {
00533 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_addsize2, reg);
00534 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_addsize2, rclass);
00535 }
00536 else if (ABI_PROPERTY_Is_addrsize3(rclass, isa_reg)) {
00537 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_addsize3, reg);
00538 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_addsize3, rclass);
00539 }
00540 else if (ABI_PROPERTY_Is_addrsize4(rclass, isa_reg)) {
00541 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_addsize4, reg);
00542 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_addsize4, rclass);
00543 }
00544 else if (ABI_PROPERTY_Is_addrsize5(rclass, isa_reg)) {
00545 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_addsize5, reg);
00546 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_addsize5, rclass);
00547 }
00548 else if (ABI_PROPERTY_Is_addrsize6(rclass, isa_reg)) {
00549 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_addsize6, reg);
00550 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_addsize6, rclass);
00551 }
00552 else if (ABI_PROPERTY_Is_addrsize7(rclass, isa_reg)) {
00553 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_addsize7, reg);
00554 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_addsize7, rclass);
00555 }
00556 else if (ABI_PROPERTY_Is_c2acc(rclass, isa_reg)) {
00557 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_c2acc, reg);
00558 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_c2acc, rclass);
00559 }
00560 else if (ABI_PROPERTY_Is_c2cond(rclass, isa_reg)) {
00561 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_c2cond, reg);
00562 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_c2cond, rclass);
00563 }
00564 else if (ABI_PROPERTY_Is_c2mvsel(rclass, isa_reg)) {
00565 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_c2mvsel, reg);
00566 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_c2mvsel, rclass);
00567 }
00568 else if (ABI_PROPERTY_Is_c2vlcs(rclass, isa_reg)) {
00569 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_c2vlcs, reg);
00570 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_c2vlcs, rclass);
00571 }
00572 else if (ABI_PROPERTY_Is_c2movpat(rclass, isa_reg)) {
00573 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_c2movpat, reg);
00574 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_c2movpat, rclass);
00575 }
00576 #endif // TARG_SL
00577
00578 #endif // TARG_MIPS
00579 #ifdef TARG_IA64
00580 else if ( ABI_PROPERTY_Is_prev_funcstate(rclass, isa_reg) ) {
00581 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_pfs, reg);
00582 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_pfs, rclass);
00583 }
00584 else if ( ABI_PROPERTY_Is_loop_count(rclass, isa_reg) ) {
00585 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_lc, reg);
00586 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_lc, rclass);
00587 }
00588 else if ( ABI_PROPERTY_Is_epilog_count(rclass, isa_reg) ) {
00589 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_ec, reg);
00590 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_ec, rclass);
00591 }
00592 else if ( ABI_PROPERTY_Is_true_predicate(rclass, isa_reg) ) {
00593 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_true, reg);
00594 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_true, rclass);
00595 }
00596 else if ( ABI_PROPERTY_Is_fzero(rclass, isa_reg) ) {
00597 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_fzero, reg);
00598 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_fzero, rclass);
00599 }
00600 else if ( ABI_PROPERTY_Is_fone(rclass, isa_reg) ) {
00601 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_fone, reg);
00602 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_fone, rclass);
00603 }
00604 #endif
00605 }
00606
00607 REGISTER_CLASS_universe(rclass) =
00608 REGISTER_SET_Range(REGISTER_MIN, REGISTER_MIN + register_count - 1);
00609 REGISTER_CLASS_allocatable(rclass) = allocatable;
00610 REGISTER_CLASS_callee_saves(rclass) = callee;
00611 REGISTER_CLASS_caller_saves(rclass) = caller;
00612 REGISTER_CLASS_function_argument(rclass) = func_argument;
00613 REGISTER_CLASS_function_value(rclass) = func_value;
00614 REGISTER_CLASS_shrink_wrap(rclass) = shrink_wrap;
00615 REGISTER_CLASS_register_count(rclass) = register_count;
00616 REGISTER_CLASS_stacked(rclass) = stacked;
00617 REGISTER_CLASS_rotating(rclass) = rotating;
00618 REGISTER_CLASS_can_store(rclass)
00619 = ISA_REGISTER_CLASS_INFO_Can_Store(icinfo);
00620 REGISTER_CLASS_multiple_save(rclass)
00621 = ISA_REGISTER_CLASS_INFO_Multiple_Save(icinfo);
00622
00623
00624
00625
00626
00627
00628
00629 if ( rclass == ISA_REGISTER_CLASS_integer ) {
00630 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_v0, REGISTER_SET_Choose(func_value));
00631 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_v0, rclass);
00632 }
00633 #ifdef TARG_X8664
00634 if ( rclass == ISA_REGISTER_CLASS_float ) {
00635 Set_CLASS_REG_PAIR_reg(CLASS_REG_PAIR_f0, REGISTER_SET_Choose(func_value));
00636 Set_CLASS_REG_PAIR_rclass(CLASS_REG_PAIR_f0, rclass);
00637 }
00638 #endif
00639
00640 }
00641
00642
00643
00644
00645
00646
00647
00648
00649
00650
00651 static void
00652 Initialize_Register_Subclasses(void)
00653 {
00654 ISA_REGISTER_SUBCLASS sc;
00655
00656 for (sc = (ISA_REGISTER_SUBCLASS)0;
00657 sc <= ISA_REGISTER_SUBCLASS_MAX;
00658 sc = (ISA_REGISTER_SUBCLASS)(sc + 1))
00659 {
00660 INT i;
00661 ISA_REGISTER_CLASS rc;
00662 REGISTER_SET members = REGISTER_SET_EMPTY_SET;
00663 const ISA_REGISTER_SUBCLASS_INFO *scinfo = ISA_REGISTER_SUBCLASS_Info(sc);
00664 INT count = ISA_REGISTER_SUBCLASS_INFO_Count(scinfo);
00665
00666 for (i = 0; i < count; ++i) {
00667 INT isa_reg = ISA_REGISTER_SUBCLASS_INFO_Member(scinfo, i);
00668 const char *reg_name = ISA_REGISTER_SUBCLASS_INFO_Reg_Name(scinfo, i);
00669 REGISTER reg = (REGISTER)(isa_reg + REGISTER_MIN);
00670 members = REGISTER_SET_Union1(members, reg);
00671 REGISTER_SUBCLASS_reg_name(sc, reg) = reg_name;
00672 }
00673 rc = ISA_REGISTER_SUBCLASS_INFO_Class(scinfo);
00674 members = REGISTER_SET_Intersection(members, REGISTER_CLASS_universe(rc));
00675
00676 REGISTER_SUBCLASS_members(sc) = members;
00677 REGISTER_SUBCLASS_name(sc) = ISA_REGISTER_SUBCLASS_INFO_Name(scinfo);
00678 REGISTER_SUBCLASS_register_class(sc) = rc;
00679 }
00680 }
00681
00682
00683
00684
00685
00686
00687
00688
00689
00690
00691 void
00692 REGISTER_Begin(void)
00693 {
00694 ISA_REGISTER_CLASS rclass;
00695
00696
00697
00698 FOR_ALL_ISA_REGISTER_CLASS( rclass ) {
00699 Initialize_Register_Class(rclass);
00700 #ifdef HAS_STACKED_REGISTERS
00701 REGISTER_Init_Stacked(rclass);
00702 #endif
00703 }
00704 Initialize_Register_Subclasses();
00705 Init_Mtype_RegClass_Map();
00706 }
00707
00708 struct Dont_Allocate_Dreg
00709 {
00710 inline void operator() (UINT32, ST_ATTR *st_attr) const {
00711 if (ST_ATTR_kind (*st_attr) != ST_ATTR_DEDICATED_REGISTER)
00712 return;
00713 PREG_NUM preg = ST_ATTR_reg_id(*st_attr);
00714 ISA_REGISTER_CLASS rclass;
00715 REGISTER reg;
00716 CGTARG_Preg_Register_And_Class(preg, &rclass, ®);
00717 REGISTER_Set_Allocatable (rclass, reg, FALSE );
00718 }
00719 };
00720
00721
00722
00723
00724
00725
00726
00727
00728
00729 extern void
00730 REGISTER_Pu_Begin(void)
00731 {
00732 ISA_REGISTER_CLASS rclass;
00733
00734 #ifdef TARG_X8664
00735 const TN* ebx_tn = Ebx_TN();
00736 #endif
00737
00738
00739
00740
00741
00742 FOR_ALL_ISA_REGISTER_CLASS( rclass ) {
00743 REGISTER reg;
00744 BOOL re_init = FALSE;
00745
00746 for ( reg = REGISTER_MIN;
00747 reg <= REGISTER_CLASS_last_register(rclass);
00748 reg++
00749 ) {
00750 if ( reg_alloc_status[rclass][reg] != AS_default) {
00751 reg_alloc_status[rclass][reg] = AS_default;
00752 re_init = TRUE;
00753 }
00754 }
00755
00756 #ifdef TARG_X8664
00757
00758
00759
00760 if( Is_Target_32bit() &&
00761 Gen_PIC_Shared &&
00762 rclass == TN_register_class(ebx_tn) ){
00763 reg_alloc_status[rclass][TN_register(ebx_tn)] = AS_not_allocatable;
00764 re_init = TRUE;
00765 }
00766 #endif
00767
00768 if ( re_init ) Initialize_Register_Class(rclass);
00769
00770
00771 REGISTER_CLASS_rotating(rclass) = REGISTER_SET_EMPTY_SET;
00772
00773 #ifdef HAS_STACKED_REGISTERS
00774 REGISTER_Init_Stacked(rclass);
00775 #endif
00776 }
00777
00778
00779 vector< pair< ISA_REGISTER_CLASS, REGISTER > >::iterator r;
00780 for (r = dont_allocate_these_registers.begin();
00781 r != dont_allocate_these_registers.end();
00782 ++r)
00783 {
00784 REGISTER_Set_Allocatable ((*r).first, (*r).second, FALSE );
00785 }
00786
00787 if ( ST_ATTR_Table_Size (CURRENT_SYMTAB)) {
00788 For_all (St_Attr_Table, CURRENT_SYMTAB,
00789 Dont_Allocate_Dreg());
00790 }
00791
00792 if ( Get_Trace(TP_CG, 0x10) ) REGISTER_CLASS_Trace_All();
00793 }
00794
00795
00796 extern void
00797 REGISTER_Reset_FP (void)
00798 {
00799 ISA_REGISTER_CLASS rclass;
00800 #ifndef TARG_X8664
00801 if (FRAME_POINTER_REQUIRED_FOR_PU && FP_TN != NULL)
00802 #else
00803 if (Current_PU_Stack_Model != SMODEL_SMALL || Opt_Level == 0)
00804 #endif
00805 {
00806 rclass = TN_register_class(FP_TN);
00807 reg_alloc_status[rclass][TN_register(FP_TN)] = AS_not_allocatable;
00808 Initialize_Register_Class(rclass);
00809 }
00810 }
00811
00812
00813
00814
00815
00816
00817
00818
00819
00820
00821
00822
00823
00824
00825
00826
00827
00828
00829
00830
00831 REGISTER_SET
00832 REGISTER_SET_Difference_Range(
00833 REGISTER_SET set,
00834 REGISTER low,
00835 REGISTER high
00836 )
00837 {
00838 return REGISTER_SET_Difference(set, REGISTER_SET_Range(low, high));
00839 }
00840
00841
00842
00843
00844
00845
00846
00847
00848
00849
00850
00851 inline REGISTER REGISTER_SET_Choose_Engine(
00852 REGISTER_SET set
00853 )
00854 {
00855 INT i = 0;
00856 do {
00857 REGISTER_SET_WORD w = REGISTER_SET_ELEM(set, i);
00858 INT regbase = REGISTER_MIN + (i * sizeof(REGISTER_SET_WORD) * 8);
00859 do {
00860 REGISTER_SET_WORD lowb = w & 0xff;
00861 if ( lowb ) return regbase + UINT8_least_sig_one[lowb];
00862 } while (regbase += 8, w >>= 8);
00863 } while (++i <= MAX_REGISTER_SET_IDX);
00864 return REGISTER_UNDEFINED;
00865 }
00866
00867
00868
00869
00870
00871
00872
00873
00874
00875
00876 extern REGISTER
00877 REGISTER_SET_Choose(
00878 REGISTER_SET set
00879 )
00880 {
00881 return REGISTER_SET_Choose_Engine(set);
00882 }
00883
00884
00885
00886
00887
00888
00889
00890
00891
00892
00893
00894 extern REGISTER
00895 REGISTER_SET_Choose_Range(
00896 REGISTER_SET set,
00897 REGISTER low,
00898 REGISTER high
00899 )
00900 {
00901 if (low > REGISTER_MAX) {
00902 return REGISTER_UNDEFINED;
00903 } else {
00904 REGISTER_SET temp;
00905 temp = REGISTER_SET_Intersection(set, REGISTER_SET_Range(low, high));
00906 return REGISTER_SET_Choose_Engine(temp);
00907 }
00908 }
00909
00910
00911
00912
00913
00914
00915
00916
00917
00918
00919 extern REGISTER
00920 REGISTER_SET_Choose_Next(
00921 REGISTER_SET set,
00922 REGISTER reg
00923 )
00924 {
00925 if ( reg >= REGISTER_MAX ) {
00926 return REGISTER_UNDEFINED;
00927 } else {
00928 REGISTER_SET temp;
00929 temp = REGISTER_SET_Difference(set, REGISTER_SET_Range(REGISTER_MIN, reg));
00930 return REGISTER_SET_Choose_Engine(temp);
00931 }
00932 }
00933
00934
00935
00936
00937
00938
00939
00940
00941
00942
00943 extern REGISTER
00944 REGISTER_SET_Choose_Intersection(
00945 REGISTER_SET set1,
00946 REGISTER_SET set2
00947 )
00948 {
00949 REGISTER_SET set = REGISTER_SET_Intersection(set1, set2);
00950 return REGISTER_SET_Choose(set);
00951 }
00952
00953
00954
00955
00956
00957
00958
00959
00960
00961
00962 extern INT32
00963 REGISTER_SET_Size(
00964 REGISTER_SET set
00965 )
00966 {
00967 INT32 size = 0;
00968 INT i = 0;
00969 do {
00970 REGISTER_SET_WORD w = REGISTER_SET_ELEM(set, i);
00971 do {
00972 size += UINT8_pop_count[w & 0xff];
00973 } while (w >>= 8);
00974 } while (++i <= MAX_REGISTER_SET_IDX);
00975 return size;
00976 }
00977
00978
00979
00980
00981
00982
00983
00984
00985
00986
00987 extern void
00988 REGISTER_SET_Print(
00989 REGISTER_SET regset,
00990 FILE *f
00991 )
00992 {
00993 REGISTER i;
00994 const char *sep = "";
00995
00996 fprintf(f, "[");
00997 for ( i = REGISTER_SET_Choose(regset);
00998 i != REGISTER_UNDEFINED;
00999 i = REGISTER_SET_Choose_Next(regset,i)
01000 ) {
01001 fprintf(f, "%s%d", sep, i);
01002 sep = ",";
01003 }
01004
01005 fprintf(f, "]");
01006 }
01007
01008
01009
01010
01011
01012
01013
01014
01015
01016
01017
01018
01019
01020
01021
01022
01023
01024
01025 extern void
01026 REGISTER_CLASS_OP_Update_Mapping(
01027 OP *op
01028 )
01029 {
01030 INT32 i;
01031 const ISA_OPERAND_INFO *oinfo = ISA_OPERAND_Info(OP_code(op));
01032
01033 for (i = OP_results(op) - 1; i >= 0; --i) {
01034 TN *tn = OP_result(op,i);
01035
01036 if ( TN_is_register(tn)
01037 && TN_register_class(tn) == ISA_REGISTER_CLASS_UNDEFINED
01038 ) {
01039 const ISA_OPERAND_VALTYP *otype = ISA_OPERAND_INFO_Result(oinfo, i);
01040 ISA_REGISTER_CLASS rclass = ISA_OPERAND_VALTYP_Register_Class(otype);
01041 Set_TN_register_class(tn, rclass);
01042 }
01043 }
01044
01045 for ( i = OP_opnds(op) - 1; i >= 0; --i ) {
01046 TN *tn = OP_opnd(op,i);
01047
01048 if ( TN_is_register(tn)
01049 && TN_register_class(tn) == ISA_REGISTER_CLASS_UNDEFINED
01050 ) {
01051 const ISA_OPERAND_VALTYP *otype = ISA_OPERAND_INFO_Operand(oinfo, i);
01052 ISA_REGISTER_CLASS rclass = ISA_OPERAND_VALTYP_Register_Class(otype);
01053 Set_TN_register_class(tn, rclass);
01054 }
01055 }
01056 }
01057
01058
01059
01060
01061
01062
01063
01064
01065
01066
01067
01068
01069
01070
01071
01072
01073
01074
01075
01076 extern void
01077 REGISTER_Print(
01078 ISA_REGISTER_CLASS rclass,
01079 REGISTER reg,
01080 FILE *f
01081 )
01082 {
01083 fprintf(f, REGISTER_name(rclass, reg));
01084 }
01085
01086
01087
01088
01089
01090
01091
01092
01093
01094 extern void
01095 CLASS_REG_PAIR_Print(
01096 CLASS_REG_PAIR crp,
01097 FILE *f
01098 )
01099 {
01100 REGISTER_Print(CLASS_REG_PAIR_rclass(crp), CLASS_REG_PAIR_reg(crp),f);
01101 }
01102
01103
01104
01105
01106
01107
01108
01109
01110
01111
01112 void
01113 REGISTER_Set_Allocatable(
01114 ISA_REGISTER_CLASS rclass,
01115 REGISTER reg,
01116 BOOL is_allocatable
01117 )
01118 {
01119 INT prev_status = reg_alloc_status[rclass][reg];
01120 INT new_status = is_allocatable ? AS_allocatable : AS_not_allocatable;
01121
01122 if ( prev_status != new_status ) {
01123 reg_alloc_status[rclass][reg] = new_status;
01124
01125 Initialize_Register_Class(rclass);
01126 }
01127 }
01128
01129
01130
01131
01132
01133
01134
01135
01136
01137
01138
01139 #define TRUE_FALSE(b) ((b) ? "true" : "false")
01140
01141
01142
01143
01144
01145
01146
01147
01148
01149
01150 static void
01151 REGISTER_SET_Print_Name(
01152 ISA_REGISTER_CLASS rclass,
01153 REGISTER_SET regset,
01154 FILE *f
01155 )
01156 {
01157 REGISTER i;
01158 const char *sep = "";
01159
01160 fprintf(f, "[");
01161 for ( i = REGISTER_SET_Choose(regset);
01162 i != REGISTER_UNDEFINED;
01163 i = REGISTER_SET_Choose_Next(regset,i)
01164 ) {
01165 fprintf(f, "%s%s",sep,REGISTER_name(rclass,i));
01166 sep = ",";
01167 }
01168
01169 fprintf(f, "]");
01170 }
01171
01172
01173
01174
01175
01176
01177
01178
01179
01180
01181 extern void REGISTER_Trace(
01182 ISA_REGISTER_CLASS rclass,
01183 REGISTER reg
01184 )
01185 {
01186 if ( reg < REGISTER_MIN
01187 || reg > REGISTER_CLASS_last_register(rclass) ) return;
01188
01189 fprintf(TFile, " reg %2d:"
01190 " name=%-5s"
01191 " bit-size=%-3d"
01192 " mach-id=%-2d"
01193 " allocatable=%-5s\n",
01194 reg,
01195 REGISTER_name(rclass, reg),
01196 REGISTER_bit_size(rclass, reg),
01197 REGISTER_machine_id(rclass, reg),
01198 TRUE_FALSE(REGISTER_allocatable(rclass, reg)));
01199 }
01200
01201
01202
01203
01204
01205
01206
01207
01208
01209
01210 extern void REGISTER_CLASS_Trace(
01211 ISA_REGISTER_CLASS rclass
01212 )
01213 {
01214 REGISTER reg;
01215 REGISTER_SET set;
01216
01217 fprintf(TFile, "register class %d (%s) register-count=%d can-store=%s\n",
01218 rclass, REGISTER_CLASS_name(rclass),
01219 REGISTER_CLASS_register_count(rclass),
01220 TRUE_FALSE(REGISTER_CLASS_can_store(rclass)));
01221
01222 for ( reg = REGISTER_MIN; reg <= REGISTER_MAX; reg++ ) {
01223 REGISTER_Trace(rclass, reg);
01224 }
01225
01226 fprintf(TFile, "\n universe: ");
01227 REGISTER_SET_Print(REGISTER_CLASS_universe(rclass), TFile);
01228 fprintf(TFile, "\n");
01229
01230 set = REGISTER_CLASS_allocatable(rclass);
01231 if ( !REGISTER_SET_EmptyP(set) ) {
01232 fprintf(TFile, " allocatable: ");
01233 REGISTER_SET_Print(set, TFile);
01234 fprintf(TFile, "\n");
01235 }
01236
01237 set = REGISTER_CLASS_callee_saves(rclass);
01238 if ( !REGISTER_SET_EmptyP(set) ) {
01239 fprintf(TFile, " callee_saves: ");
01240 REGISTER_SET_Print(set, TFile);
01241 fprintf(TFile, "\n");
01242 }
01243
01244 set = REGISTER_CLASS_caller_saves(rclass);
01245 if ( !REGISTER_SET_EmptyP(set) ) {
01246 fprintf(TFile, " caller_saves: ");
01247 REGISTER_SET_Print(set, TFile);
01248 fprintf(TFile, "\n");
01249 }
01250
01251 set = REGISTER_CLASS_function_argument(rclass);
01252 if ( !REGISTER_SET_EmptyP(set) ) {
01253 fprintf(TFile, " function_argument: ");
01254 REGISTER_SET_Print(set, TFile);
01255 fprintf(TFile, "\n");
01256 }
01257
01258 set = REGISTER_CLASS_function_value(rclass);
01259 if ( !REGISTER_SET_EmptyP(set) ) {
01260 fprintf(TFile, " function_value: ");
01261 REGISTER_SET_Print(set, TFile);
01262 fprintf(TFile, "\n");
01263 }
01264
01265 set = REGISTER_CLASS_shrink_wrap(rclass);
01266 if ( !REGISTER_SET_EmptyP(set) ) {
01267 fprintf(TFile, " shrink_wrap: ");
01268 REGISTER_SET_Print(set, TFile);
01269 fprintf(TFile, "\n");
01270 }
01271
01272 fprintf(TFile, "\n universe: ");
01273 REGISTER_SET_Print_Name(rclass, REGISTER_CLASS_universe(rclass), TFile);
01274 fprintf(TFile, "\n");
01275
01276 set = REGISTER_CLASS_allocatable(rclass);
01277 if ( !REGISTER_SET_EmptyP(set) ) {
01278 fprintf(TFile, " allocatable: ");
01279 REGISTER_SET_Print_Name(rclass, set, TFile);
01280 fprintf(TFile, "\n");
01281 }
01282
01283 set = REGISTER_CLASS_callee_saves(rclass);
01284 if ( !REGISTER_SET_EmptyP(set) ) {
01285 fprintf(TFile, " callee_saves: ");
01286 REGISTER_SET_Print_Name(rclass, set, TFile);
01287 fprintf(TFile, "\n");
01288 }
01289
01290 set = REGISTER_CLASS_caller_saves(rclass);
01291 if ( !REGISTER_SET_EmptyP(set) ) {
01292 fprintf(TFile, " caller_saves: ");
01293 REGISTER_SET_Print_Name(rclass, set, TFile);
01294 fprintf(TFile, "\n");
01295 }
01296
01297 set = REGISTER_CLASS_function_argument(rclass);
01298 if ( !REGISTER_SET_EmptyP(set) ) {
01299 fprintf(TFile, " function_argument: ");
01300 REGISTER_SET_Print_Name(rclass, set, TFile);
01301 fprintf(TFile, "\n");
01302 }
01303
01304 set = REGISTER_CLASS_function_value(rclass);
01305 if ( !REGISTER_SET_EmptyP(set) ) {
01306 fprintf(TFile, " function_value: ");
01307 REGISTER_SET_Print_Name(rclass, set, TFile);
01308 fprintf(TFile, "\n");
01309 }
01310
01311 set = REGISTER_CLASS_shrink_wrap(rclass);
01312 if ( !REGISTER_SET_EmptyP(set) ) {
01313 fprintf(TFile, " shrink_wrap: ");
01314 REGISTER_SET_Print_Name(rclass, set, TFile);
01315 fprintf(TFile, "\n");
01316 }
01317 }
01318
01319
01320
01321
01322
01323
01324
01325
01326
01327
01328 extern void
01329 REGISTER_CLASS_Trace_All(void)
01330 {
01331 ISA_REGISTER_CLASS rclass;
01332
01333 fprintf(TFile, "\n%s"
01334 " REGISTERs and ISA_REGISTER_CLASSes for PU \"%s\"\n"
01335 "%s",
01336 DBar, Cur_PU_Name, DBar);
01337
01338 FOR_ALL_ISA_REGISTER_CLASS( rclass ) {
01339 fprintf(TFile, "\n");
01340 REGISTER_CLASS_Trace(rclass);
01341 }
01342 }
01343
01344
01345 void
01346 Set_Register_Never_Allocatable (char *regname)
01347 {
01348 ISA_REGISTER_CLASS rclass;
01349 REGISTER reg;
01350 switch (regname[0]) {
01351 case 'r':
01352 rclass = ISA_REGISTER_CLASS_integer;
01353 break;
01354 #if !defined(TARG_SL)
01355 case 'f':
01356 rclass = ISA_REGISTER_CLASS_float;
01357 break;
01358 #endif
01359 default:
01360 FmtAssert(FALSE, ("unexpected reg letter %c", regname[0]));
01361 }
01362 reg = REGISTER_MIN + atoi(regname+1);
01363 FmtAssert(reg <= REGISTER_CLASS_last_register(rclass),
01364 ("%s is not a valid register", regname));
01365 dont_allocate_these_registers.push_back( pair< ISA_REGISTER_CLASS, REGISTER>( rclass, reg ));
01366 }
01367
01368
01369 void
01370 Set_Register_Never_Allocatable (PREG_NUM preg)
01371 {
01372 ISA_REGISTER_CLASS rclass;
01373 REGISTER reg;
01374 CGTARG_Preg_Register_And_Class(preg, &rclass, ®);
01375 dont_allocate_these_registers.push_back( pair< ISA_REGISTER_CLASS, REGISTER>( rclass, reg ));
01376 }
01377
