Open64: osprey/be/cg/cg_spill.cxx Source File

00001 /*
00002  * Copyright 2003, 2004, 2005, 2006 PathScale, Inc.  All Rights Reserved.
00003  */
00004 
00005 /*
00006 
00007   Copyright (C) 2000, 2001 Silicon Graphics, Inc.  All Rights Reserved.
00008 
00009   This program is free software; you can redistribute it and/or modify it
00010   under the terms of version 2 of the GNU General Public License as
00011   published by the Free Software Foundation.
00012 
00013   This program is distributed in the hope that it would be useful, but
00014   WITHOUT ANY WARRANTY; without even the implied warranty of
00015   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
00016 
00017   Further, this software is distributed without any warranty that it is
00018   free of the rightful claim of any third person regarding infringement 
00019   or the like.  Any license provided herein, whether implied or 
00020   otherwise, applies only to this software file.  Patent licenses, if 
00021   any, provided herein do not apply to combinations of this program with 
00022   other software, or any other product whatsoever.  
00023 
00024   You should have received a copy of the GNU General Public License along
00025   with this program; if not, write the Free Software Foundation, Inc., 59
00026   Temple Place - Suite 330, Boston MA 02111-1307, USA.
00027 
00028   Contact information:  Silicon Graphics, Inc., 1600 Amphitheatre Pky,
00029   Mountain View, CA 94043, or:
00030 
00031   http://www.sgi.com
00032 
00033   For further information regarding this notice, see:
00034 
00035   http://oss.sgi.com/projects/GenInfo/NoticeExplan
00036 
00037 */
00038 
00039 
00040 /* =======================================================================
00041  * =======================================================================
00042  *
00043  *  Module: cg_spill.c
00044  *  $Revision: 1.20 $
00045  *  $Date: 05/12/05 08:59:04-08:00 $
00046  *  $Author: bos@eng-24.pathscale.com $
00047  *  $Source: /scratch/mee/2.4-65/kpro64-pending/be/cg/SCCS/s.cg_spill.cxx $
00048  *
00049  *  Description:
00050  *  ============
00051  *
00052  *  Routines for handling spills.
00053  *
00054  * =======================================================================
00055  * =======================================================================
00056  */
00057 
00058 #include "defs.h"
00059 #include "tracing.h"
00060 #include "errors.h"
00061 #include "erglob.h"
00062 #include "ercg.h"
00063 #include "glob.h"
00064 #include "config.h"
00065 #include "xstats.h"
00066 #include "bitset.h"
00067 #include "wn.h"
00068 #include "ir_reader.h"
00069 #include "cgir.h"
00070 #include "const.h"  /* needed to manipulate target/host consts */
00071 #include "targ_const.h" /* needed to manipulate target/host consts */
00072 #include "targ_isa_lits.h"
00073 #include "cg_flags.h"
00074 #include "register.h"
00075 #include "stblock.h"
00076 #include "st_list.h"
00077 #include "cgexp.h"
00078 #include "cg_spill.h"
00079 #include "cgprep.h"
00080 #include "cg_loop.h"
00081 #include "data_layout.h"
00082 #include "cg.h"
00083 #include "gra.h"
00084 #include "opt_alias_interface.h"
00085 #include "cgtarget.h"
00086 #include "targ_proc_properties.h"
00087 #include "tag.h"
00088 
00089 #ifdef TARG_IA64
00090 #define TRACE_REMAT 0x2
00091 #endif
00092 #ifdef KEY
00093 static SPILL_SYM_INFO_MAP spill_sym_info_map;
00094 static void CGSPILL_Record_Spill (ST *spill_loc, OP *spill_op);
00095 void CGSPILL_Inc_Restore_Count (ST *spill_loc);
00096 #endif
00097 
00098 static BOOL Trace_Remat; /* Trace rematerialization */
00099 static BOOL Trace_GRA_spill_placement;
00100 static const char *Remat_Phase;
00101 static char *Remat_PU;
00102 
00103 static MEM_POOL spill_id_pool;  /* Pool for allocation of spill ID bit vectors
00104          */
00105 static BOOL spill_id_pool_inited; /* True after we've inited the spill ID
00106          * pool.
00107          */
00108 static BS **spill_ids;    /* Array of spill ID bit vectors.
00109          * Indexed by symbol table level.
00110          */
00111 static INT max_spill_level; /* Max symbol table level of any spill
00112          * encountered.
00113          */
00114 
00115 /* Spill location symbol name roots for the various clients:
00116  */
00117 #define SYM_ROOT_GRA  "gra_spill" /* Global Register Allocator */
00118 #define SYM_ROOT_LGRA "lgra_spill"  /* Global Register Spilled by LRA */
00119 #define SYM_ROOT_LCL  "lcl_spill" /* TN Localization phase */
00120 #define SYM_ROOT_LRA  "lra_spill" /* Local Register Allocator */
00121 #define SYM_ROOT_SWP  "swp_spill" /* Software Pipeliner */
00122 
00123 
00124 /*  Local type LOCAL_SPILLS
00125  *
00126  *      Used to keep track of local spill locations, both free for use 
00127  *      and those that are already allocated.  Access only through the 
00128  *      functions provided.
00129  *
00130  *      It has the following fields:
00131  *
00132  *      TY_IDX   mem_type
00133  *
00134  *    The type used to generate the spill locations.
00135  *
00136  *          ST_LIST *free
00137  *
00138  *              List of STs describing free spill locations (not yet used
00139  *              in this local block/loop).
00140  *
00141  *          ST_LIST *used
00142  *
00143  *              List of STs that are being used in the current block/loop
00144  *    as spill locations.
00145  *
00146  */
00147 typedef struct local_spills {
00148   TY_IDX   mem_type;
00149   ST_LIST *free;
00150   ST_LIST *used;
00151 } LOCAL_SPILLS;
00152 
00153 #define LOCAL_SPILLS_mem_type(x)  ((x)->mem_type)
00154 #define LOCAL_SPILLS_free(x)      ((x)->free)
00155 #define LOCAL_SPILLS_used(x)      ((x)->used)
00156 
00157 
00158 /* One for each kind of spill location: */
00159 static LOCAL_SPILLS lra_float_spills, lra_int_spills;
00160 static LOCAL_SPILLS swp_float_spills, swp_int_spills;
00161 
00162 #ifdef TARG_X8664
00163 static LOCAL_SPILLS lra_sse2_spills;
00164 static LOCAL_SPILLS lra_x87_spills;
00165 static LOCAL_SPILLS lra_mmx_spills;
00166 #endif /* TARG_X8664 */
00167 
00168 #ifdef KEY
00169 static LOCAL_SPILLS lra_float32_spills;
00170 static LOCAL_SPILLS lra_int32_spills;
00171 #endif
00172 
00173 /*
00174  * only rematerialize LDID's homeable by gra if spilling in service
00175  * to gra.
00176  */
00177 #define Can_Rematerialize_TN(tn, cl) \
00178 (TN_is_rematerializable(tn) || (TN_is_gra_homeable(tn) && cl == CGSPILL_GRA))
00179 
00180 #ifdef TARG_IA64
00181 void
00182 ld_2_ld_fill (OPS *ops, BOOL force=FALSE) {
00183 
00184   BOOL ld_is_last_op = TRUE ;
00185 
00186   OP * op = OPS_last(ops);
00187 
00188   if (!OP_load (op)) {
00189     if (OP_code(op) == TOP_cmp_i_ne || OP_code(op) == TOP_mov_t_br) {
00190       op = OP_prev(op); ld_is_last_op = FALSE ;
00191     } else 
00192       op = NULL ;
00193   }
00194 
00195   if (!op) return ;
00196 
00197   switch (OP_code(op)) {
00198   case TOP_ld1:
00199   case TOP_ld2:
00200   case TOP_ld4:
00201   case TOP_ld8:
00202       if (!TN_is_take_nat(OP_result(op,0)) && !force) break; 
00203       OPS_Remove_Op (ops,op);
00204       op = Mk_OP(TOP_ld8_fill, OP_result(op,0), 
00205                  OP_opnd(op,OP_find_opnd_use(op,OU_predicate)),
00206                  Gen_Enum_TN(ECV_ldhint),
00207                  OP_opnd(op,OP_find_opnd_use(op,OU_base)));
00208 
00209       if (ld_is_last_op || (OPS_length(ops) == 1)) 
00210         OPS_Append_Op (ops,op);
00211       else
00212         OPS_Insert_Op_Before (ops, OPS_last(ops),op);
00213     
00214   }
00215 }
00216 
00217 void 
00218 st_2_st_spill (OPS * ops, BOOL force=FALSE) {
00219  
00220   OP * op = OPS_last(ops) ;
00221   TN *tn = OP_opnd(op,OP_find_opnd_use(op,OU_storeval));
00222   switch (OP_code(op)) {
00223   case TOP_st1:
00224   case TOP_st2:
00225   case TOP_st4:
00226   case TOP_st8:
00227       if (!TN_is_take_nat(tn) && !force) break; 
00228       OPS_Remove_Op (ops,op); 
00229       op = Mk_OP(TOP_st8_spill, /* op code */
00230                  OP_opnd(op,OP_find_opnd_use(op,OU_predicate)), /* guarded predicate */
00231                  Gen_Enum_TN(ECV_sthint), /* hint */
00232                  OP_opnd(op,OP_find_opnd_use(op,OU_base)),
00233                  OP_opnd(op,OP_find_opnd_use(op,OU_storeval)));
00234       OPS_Append_Op (ops,op);
00235     
00236     break ;
00237   case TOP_stfs:
00238   case TOP_stfd:
00239   case TOP_stfe:
00240     break ;
00241   }
00242 }
00243 #endif
00244 
00245 /* =======================================================================
00246  *
00247  *  LOCAL_SPILLS_Reset
00248  *
00249  *  Reset the free list so that all the allocated spill locations are
00250  *  available.
00251  *
00252  * =======================================================================
00253  */
00254 static void
00255 LOCAL_SPILLS_Reset( LOCAL_SPILLS *slc)
00256 {
00257   ST_LIST *stlist;
00258 
00259   if (LOCAL_SPILLS_free(slc) == NULL) {
00260     LOCAL_SPILLS_free(slc) = LOCAL_SPILLS_used(slc);
00261   }
00262   else {
00263     for (stlist = LOCAL_SPILLS_free(slc); 
00264    ST_LIST_rest(stlist) != NULL;
00265    stlist = ST_LIST_rest(stlist));
00266     ST_LIST_rest(stlist) = LOCAL_SPILLS_used(slc);
00267   }
00268   LOCAL_SPILLS_used(slc) = NULL;
00269 }
00270 
00271 
00272 /* =======================================================================
00273  *
00274  *  Gen_Spill_Symbol
00275  *
00276  *  Return a spill symbol of type <ty> and allocate it to memory. Use 
00277  *  the <root> as the prefix of the temporary name.
00278  *
00279  * =======================================================================
00280  */
00281 static ST *
00282 Gen_Spill_Symbol (TY_IDX ty, const char *root)
00283 {
00284   ST *st;
00285 
00286   st = Gen_Temp_Symbol (ty, root);
00287   ++Spill_Var_Cnt;
00288   Allocate_Temp_To_Memory (st);
00289 
00290   /* Remember the ID of this spill location.
00291    */
00292   if (CG_opt_level > 0) {
00293     INT level = ST_level(st);
00294 
00295     if (!spill_id_pool_inited) {
00296       MEM_POOL_Initialize(&spill_id_pool, "cg_spill_symbol_id_bit_set", FALSE);
00297       spill_id_pool_inited = TRUE;
00298     }
00299 
00300     if (spill_ids == NULL) MEM_POOL_Push(&spill_id_pool);
00301 
00302     if (level > max_spill_level) {
00303       spill_ids = TYPE_MEM_POOL_REALLOC_N(BS *, 
00304             &spill_id_pool,
00305             spill_ids,
00306             max_spill_level+1,
00307             level+1);
00308       bzero(spill_ids + max_spill_level + 1, 
00309       (level - max_spill_level) * sizeof(*spill_ids));
00310       max_spill_level = level;
00311     }
00312 
00313     if (spill_ids[level] == NULL) {
00314       spill_ids[level] = BS_Create_Empty(ST_index(st), &spill_id_pool);
00315     }
00316 
00317     spill_ids[level] = BS_Union1D(spill_ids[level], ST_index(st), &spill_id_pool);
00318   }
00319 
00320   return st;
00321 }
00322 
00323 
00324 /* =======================================================================
00325  *
00326  *  LOCAL_SPILLS_Get_Spill_Location
00327  *
00328  *  Return a ST representing a spill location.  If one is availble on the
00329  *  given 'slc', it is allocated.  Otherwise a new one is generated. The 
00330  *  allocated spill location is added to the 'slc's used list.
00331  *
00332  * =======================================================================
00333  */
00334 static ST *
00335 LOCAL_SPILLS_Get_Spill_Location (LOCAL_SPILLS *slc, const char *root)
00336 {
00337   ST *result;
00338 
00339   if ( LOCAL_SPILLS_free(slc) != NULL ) {
00340     ST_LIST *stl = LOCAL_SPILLS_free(slc);
00341     /* Remove the first entry in the free list and add it to the used list */
00342     LOCAL_SPILLS_free(slc) = ST_LIST_rest(stl);
00343     ST_LIST_rest(stl) = LOCAL_SPILLS_used(slc);
00344     LOCAL_SPILLS_used(slc) = stl;
00345     result = ST_LIST_first(stl);
00346   }
00347   else {
00348     result = Gen_Spill_Symbol (LOCAL_SPILLS_mem_type(slc), root);
00349     LOCAL_SPILLS_used(slc) = ST_LIST_Push( result, LOCAL_SPILLS_used(slc),
00350                                                  &MEM_pu_pool);
00351   }
00352   return result;
00353 }
00354 
00355 
00356 /* =======================================================================
00357  *
00358  *  Check_Phase_And_PU
00359  *
00360  *  See if we've changed phases or PUs since the last time we were called.
00361  *  If we have, print a message announcing the new phase and PU.
00362  *
00363  * =======================================================================
00364  */
00365 static void
00366 Check_Phase_And_PU(void)
00367 {
00368   const char *cur_phase = Get_Error_Phase();
00369   if (Cur_PU_Name != Remat_PU || cur_phase != Remat_Phase) {
00370     fprintf(TFile, "\n<Rematerialize> PU: %s, Phase: %s\n", Cur_PU_Name,
00371       cur_phase);
00372     Remat_Phase = cur_phase;
00373     Remat_PU = Cur_PU_Name;
00374   }
00375 }
00376 
00377 
00378 /* =======================================================================
00379  *
00380  *  CGSPILL_Reset_Local_Spills
00381  *
00382  *  See interface description.
00383  *
00384  * =======================================================================
00385  */
00386 void
00387 CGSPILL_Reset_Local_Spills (void)
00388 {
00389   LOCAL_SPILLS_Reset(&lra_float_spills);
00390   LOCAL_SPILLS_Reset(&lra_int_spills);
00391   LOCAL_SPILLS_Reset(&swp_float_spills);
00392   LOCAL_SPILLS_Reset(&swp_int_spills);
00393 #ifdef TARG_X8664
00394   LOCAL_SPILLS_Reset(&lra_sse2_spills);
00395   LOCAL_SPILLS_Reset(&lra_x87_spills);
00396   LOCAL_SPILLS_Reset(&lra_mmx_spills);
00397 #endif /* TARG_X8664 */
00398 
00399 #ifdef KEY
00400   LOCAL_SPILLS_Reset(&lra_float32_spills);
00401   LOCAL_SPILLS_Reset(&lra_int32_spills);
00402 #endif
00403 }
00404 
00405 
00406 /* =======================================================================
00407  *
00408  *  CGSPILL_Initialize_For_PU
00409  *
00410  *  See interface description.
00411  *
00412  * =======================================================================
00413  */
00414 void
00415 CGSPILL_Initialize_For_PU(void)
00416 {
00417   LOCAL_SPILLS *slc;
00418   slc = &lra_int_spills;
00419   LOCAL_SPILLS_mem_type(slc) = Spill_Int_Type;
00420   LOCAL_SPILLS_free(slc) = NULL;
00421   LOCAL_SPILLS_used(slc) = NULL;
00422   slc = &lra_float_spills;
00423   LOCAL_SPILLS_mem_type(slc) = Spill_Float_Type;
00424   LOCAL_SPILLS_free(slc) = NULL;
00425   LOCAL_SPILLS_used(slc) = NULL;
00426   slc = &swp_int_spills;
00427   LOCAL_SPILLS_mem_type(slc) = Spill_Int_Type;
00428   LOCAL_SPILLS_free(slc) = NULL;
00429   LOCAL_SPILLS_used(slc) = NULL;
00430   slc = &swp_float_spills;
00431   LOCAL_SPILLS_mem_type(slc) = Spill_Float_Type;
00432   LOCAL_SPILLS_free(slc) = NULL;
00433   LOCAL_SPILLS_used(slc) = NULL;
00434 #ifdef TARG_X8664
00435   slc = &lra_sse2_spills;
00436   LOCAL_SPILLS_mem_type(slc) = Quad_Type;
00437   LOCAL_SPILLS_free(slc) = NULL;
00438   LOCAL_SPILLS_used(slc) = NULL;
00439 
00440   slc = &lra_x87_spills;
00441   LOCAL_SPILLS_mem_type(slc) = MTYPE_To_TY( MTYPE_FQ );
00442   LOCAL_SPILLS_free(slc) = NULL;
00443   LOCAL_SPILLS_used(slc) = NULL;
00444 
00445   slc = &lra_mmx_spills;
00446   LOCAL_SPILLS_mem_type(slc) = MTYPE_To_TY( MTYPE_M8I1 );
00447   LOCAL_SPILLS_free(slc) = NULL;
00448   LOCAL_SPILLS_used(slc) = NULL;
00449 #endif /* TARG_X8664 */
00450 
00451 #ifdef KEY
00452   slc = &lra_int32_spills;
00453   LOCAL_SPILLS_mem_type(slc) = Spill_Int32_Type;
00454   LOCAL_SPILLS_free(slc) = NULL;
00455   LOCAL_SPILLS_used(slc) = NULL;
00456 
00457   slc = &lra_float32_spills;
00458   LOCAL_SPILLS_mem_type(slc) = Spill_Float32_Type;
00459   LOCAL_SPILLS_free(slc) = NULL;
00460   LOCAL_SPILLS_used(slc) = NULL;
00461 
00462   spill_sym_info_map.clear();
00463 #endif // KEY
00464 
00465   Trace_Remat = Get_Trace(TP_CG, 4);
00466   Trace_GRA_spill_placement = Get_Trace(TP_GRA, 0x2000);
00467   Remat_Phase = NULL;
00468   Remat_PU = NULL;
00469 
00470   spill_ids = NULL;
00471   max_spill_level = -1;
00472 }
00473 
00474 
00475 /* =======================================================================
00476  *
00477  *  CGSPILL_Finalize_For_PU
00478  *
00479  *  See interface description.
00480  *
00481  * =======================================================================
00482  */
00483 void
00484 CGSPILL_Finalize_For_PU(void)
00485 {
00486   if (spill_ids) MEM_POOL_Pop(&spill_id_pool);
00487 }
00488 
00489 
00490 /* ====================================================================
00491  *
00492  *  CGSPILL_TN_Can_Be_Spilled
00493  *
00494  *  See interface description.
00495  *
00496  * ==================================================================== 
00497  */
00498 BOOL
00499 CGSPILL_TN_Can_Be_Spilled ( const TN* tn )
00500 {
00501   Is_True( TN_register_class(tn) != ISA_REGISTER_CLASS_UNDEFINED,
00502              ("Trying to spill TN%d with undefined register class",
00503               TN_number(tn)) );
00504 
00505   // even if ! REGISTER_CLASS_can_store,
00506   // may still be possible to store because of special-case code
00507   // in cgtarg_load_from_memory
00508   return TRUE;
00509 }
00510 
00511   
00512 /* ====================================================================
00513  *
00514  *  CGSPILL_Get_TN_Spill_Location
00515  *
00516  *  See interface description.
00517  *
00518  * ==================================================================== 
00519  */
00520 ST *
00521 CGSPILL_Get_TN_Spill_Location (TN *tn, CGSPILL_CLIENT client)
00522 {
00523   ST *mem_location;
00524   LOCAL_SPILLS *slc;
00525 
00526   if ( ! CGSPILL_TN_Can_Be_Spilled(tn) ) {
00527     /* say what register we're trying to spill */
00528     ErrMsg(EC_Ill_Reg_Spill1, REGISTER_name(TN_register_class(tn), 0));
00529     /* suggest a reduced optimization level */
00530     ErrMsg(EC_Ill_Reg_Spill2b, CG_opt_level-1);
00531     /* above error message aborts, so we don't get here */
00532   }
00533 
00534   /* only gra can home such tn's.  this should either occur in SWP
00535    * (with a dup'd tn), or in LRA (after gra, so we don't care if
00536    * the attributes are reset ... CGSPILL_LGRA is used when spilling
00537    * globals from within LRA).
00538    */
00539   if (TN_is_gra_homeable(tn) && client != CGSPILL_GRA) {
00540     if (client != CGSPILL_SWP && client != CGSPILL_LRA &&
00541   client != CGSPILL_LGRA) {
00542       DevWarn("CGSPILL_Get_TN_Spill_Location: turning off gra homing for client other than SWP or LRA for TN%d.\n", TN_number(tn));
00543     }
00544     Reset_TN_is_gra_homeable(tn);
00545     Set_TN_home(tn, NULL);
00546   }
00547 
00548   if (   Can_Rematerialize_TN(tn, client) && client != CGSPILL_SWP) {
00549     if (Trace_Remat) {
00550       #pragma mips_frequency_hint NEVER
00551       Check_Phase_And_PU();
00552       fprintf(TFile, "<Rematerialize> Suppressing allocation of spill "
00553          "loc for rematerializable TN%d.\n", TN_number(tn));
00554     }
00555     return (ST *)TN_home(tn);
00556   }
00557 
00558   switch (client) {
00559   case CGSPILL_GRA:
00560   case CGSPILL_LCL:
00561   case CGSPILL_LGRA:
00562     mem_location = TN_spill(tn);
00563     if (mem_location == NULL) {
00564       const char *root;
00565       TY_IDX mem_type = TN_is_float(tn) || TN_is_fcc_register(tn) ? 
00566             Spill_Float_Type : Spill_Int_Type;
00567 #ifdef TARG_X8664
00568       /* bug#1741
00569    For -m32, the size of long double is 96-bit long.
00570        */
00571       if( TN_size(tn) == 16 || TN_size(tn) == 12 ){
00572   mem_type = TN_register_class(tn) == ISA_REGISTER_CLASS_x87
00573     ? MTYPE_To_TY( MTYPE_FQ ) : Quad_Type;
00574       }
00575       // MMX
00576       if (TN_register_class(tn) == ISA_REGISTER_CLASS_mmx) {
00577   mem_type = MTYPE_To_TY(MTYPE_M8I1);
00578       }
00579 #endif /* TARG_X8664 */
00580 
00581 #ifdef KEY
00582       if( CG_min_spill_loc_size && TN_size(tn) <= 4 ){
00583   mem_type = TN_is_float(tn) ? Spill_Float32_Type : Spill_Int32_Type;
00584       }
00585 #if defined(TARG_SL)
00586       if (TN_size(tn) <= MTYPE_byte_size(TY_mtype(mem_type)))
00587         DevWarn("TN size is larger than the size of spill type.") ;
00588 #endif
00589 #endif
00590 
00591       if (client == CGSPILL_GRA) {
00592   root = SYM_ROOT_GRA;
00593       } else if (client == CGSPILL_LGRA) {
00594   root = SYM_ROOT_LGRA;
00595       } else {
00596   root = SYM_ROOT_LCL;
00597       }
00598       mem_location = Gen_Spill_Symbol (mem_type, root);
00599       Set_TN_spill(tn, mem_location);
00600     }
00601     break;
00602   case CGSPILL_LRA:
00603     mem_location = TN_spill (tn);
00604     if (mem_location == NULL) {
00605       slc = TN_is_float(tn) || TN_is_fcc_register(tn) ?
00606         &lra_float_spills : &lra_int_spills;
00607 #ifdef TARG_X8664
00608       if (TN_register_class(tn) == ISA_REGISTER_CLASS_mmx) {  // MMX
00609   slc = &lra_mmx_spills;
00610       } else if( TN_size(tn) == 16 || TN_size(tn) == 12 ){
00611   slc = TN_register_class(tn) == ISA_REGISTER_CLASS_x87
00612     ? &lra_x87_spills : &lra_sse2_spills;
00613       }
00614 #endif /* TARG_X8664 */
00615 
00616 #ifdef KEY
00617       if( CG_min_spill_loc_size && TN_size(tn) <= 4 ){
00618   slc = TN_is_float(tn) ? &lra_float32_spills : &lra_int32_spills;
00619       }
00620 #endif
00621 
00622       mem_location = LOCAL_SPILLS_Get_Spill_Location (slc, SYM_ROOT_LRA);
00623       Set_TN_spill(tn, mem_location);
00624     }
00625     break;
00626   case CGSPILL_SWP:
00627     FmtAssert(!TN_is_fcc_register(tn), ("SWP attempted to spill an fcc register"));
00628     slc = TN_is_float(tn) ? &swp_float_spills : &swp_int_spills;
00629     mem_location = LOCAL_SPILLS_Get_Spill_Location (slc, SYM_ROOT_SWP);
00630     break;
00631   }
00632 
00633   return mem_location;
00634 }
00635 
00636 
00637 /* ====================================================================
00638  *
00639  *  CGSPILL_Is_Spill_Location
00640  *
00641  *  See interface description.
00642  *
00643  * ==================================================================== 
00644  */
00645 BOOL
00646 CGSPILL_Is_Spill_Location (ST *mem_loc)
00647 {
00648   return    mem_loc 
00649    && ST_level(mem_loc) <= max_spill_level
00650    && spill_ids
00651    && spill_ids[ST_level(mem_loc)]
00652    && BS_MemberP(spill_ids[ST_level(mem_loc)], ST_index(mem_loc));
00653 }
00654 
00655 
00656 /* ====================================================================
00657  *
00658  *  CGSPILL_OP_Spill_Location
00659  *
00660  *  See interface description.
00661  *
00662  * ==================================================================== 
00663  */
00664 ST *
00665 CGSPILL_OP_Spill_Location (OP *op)
00666 {
00667   ST *mem_loc = NULL;
00668 
00669   if (spill_ids) {
00670     TN *spill_tn = NULL;
00671 
00672     if (OP_load(op) && (OP_results(op) == 1)
00673 #ifdef TARG_IA64
00674   && OP_spill_restore(op)
00675 #endif
00676   ) {
00677       spill_tn = OP_result(op,0);
00678     } else if (OP_store(op)
00679 #ifdef TARG_IA64
00680          && OP_spill_restore(op)
00681 #endif
00682          ) {
00683       spill_tn = OP_opnd(op,TOP_Find_Operand_Use(OP_code(op), OU_storeval));
00684     }
00685 #ifdef KEY
00686     if( spill_tn != NULL &&
00687   TN_has_spill( spill_tn ) ){
00688       INT n = TOP_Find_Operand_Use( OP_code(op), OU_offset );
00689       if( n >= 0 ){
00690   TN* ctn = OP_opnd( op, n );
00691   if ( TN_is_constant(ctn) && TN_is_symbol(ctn) &&
00692        TN_var(ctn) == TN_spill(spill_tn))
00693     mem_loc = TN_spill( ctn );
00694       }
00695     }
00696 #else
00697     if (spill_tn) mem_loc = TN_spill(spill_tn);
00698 #endif
00699 
00700     if (mem_loc &&
00701   (ST_level(mem_loc) > max_spill_level ||
00702    spill_ids[ST_level(mem_loc)] == NULL ||
00703    !BS_MemberP(spill_ids[ST_level(mem_loc)], ST_index(mem_loc)))
00704     ) {
00705       mem_loc = NULL;
00706     }
00707   }
00708 
00709   return mem_loc;
00710 }
00711 
00712 /* ======================================================================
00713  *
00714  * CGSPILL_Cost_Estimate
00715  *
00716  * See interface description
00717  *
00718  * ======================================================================*/
00719 void 
00720 CGSPILL_Cost_Estimate (TN *tn, ST *mem_loc, 
00721            float *store_cost, float *restore_cost,
00722            CGSPILL_CLIENT client)
00723 {
00724   /* TODO: more accurate instruction counts for the rematerializable TNs,
00725    * TODO: target/type dependent cost estimates
00726    * TODO: count memory references for the restores in rematerializable TNs
00727    */
00728   if (Can_Rematerialize_TN(tn, client))
00729   {
00730     WN *home = TN_home(tn);
00731     OPS OPs  = OPS_EMPTY;
00732     TN  *result = tn;
00733 
00734     *store_cost = 0.0F;
00735 
00736     switch (WN_operator(home))
00737     {
00738     case OPR_LDID:
00739       {
00740   OPCODE opcode = WN_opcode(home);
00741   Exp_Load (OPCODE_rtype(opcode), OPCODE_desc(opcode), tn, WN_st(home),
00742       WN_offset(home), &OPs, V_NONE);
00743 #ifdef TARG_IA64
00744         ld_2_ld_fill (&OPs) ;
00745 #endif
00746   *restore_cost = OPS_length(&OPs);
00747   *store_cost = *restore_cost;
00748       }
00749       break;
00750     case OPR_LDA:
00751       Exp_Lda(  WN_rtype(home),
00752     result,
00753     WN_st(home),
00754     WN_lda_offset(home),
00755     OPERATOR_UNKNOWN,
00756     &OPs
00757 #ifdef TARG_SL
00758                 , WN_is_internal_mem_ofst(home)
00759 #endif
00760     );
00761       *restore_cost = OPS_length(&OPs);
00762       break; 
00763     case OPR_INTCONST:
00764       *restore_cost = 1.0F;
00765       if (!CGTARG_Can_Load_Immediate_In_Single_Instruction (WN_const_val(home)))
00766   *restore_cost += 1.0F;
00767       break;
00768     case OPR_CONST:
00769       Exp_OP1 (WN_opcode(home), result, Gen_Symbol_TN(WN_st(home),0,0), &OPs);
00770       *restore_cost = OPS_length(&OPs) + .25F;
00771       break;
00772     }
00773   }
00774   else
00775   {
00776     *store_cost = CGSPILL_DEFAULT_STORE_COST;
00777     *restore_cost = CGSPILL_DEFAULT_RESTORE_COST;
00778     if (   mem_loc
00779   && !CGTARG_Can_Load_Immediate_In_Single_Instruction(ST_ofst(mem_loc)))
00780     {
00781       *store_cost += 2.0F;
00782       *restore_cost += 2.0F;
00783     }
00784   }
00785 
00786   if (Trace_Remat)
00787   {
00788     #pragma mips_frequency_hint NEVER
00789     fprintf(TFile, "<Rematerialize> CGSPILL_Cost_Estimate for rematerializable TN%d (store_cost=%f) (restore_cost=%f)\n", TN_number(tn), *store_cost, *restore_cost);
00790   }
00791 }
00792 
00793 
00794 /* ======================================================================
00795  *
00796  * CGSPILL_Load_From_Memory
00797  *
00798  * See interface description
00799  *
00800  * ======================================================================*/
00801 void
00802 CGSPILL_Load_From_Memory (TN *tn, ST *mem_loc, OPS *ops, CGSPILL_CLIENT client,
00803         BB *bb)
00804 {
00805   INT32 max_sdata_save = Max_Sdata_Elt_Size;
00806 
00807   /* hack to prevent use of gp in loading constant in prolog and epilog
00808    * before/after gp setup/restore.  NULL bb if no possibility of spilling
00809    * in prolog or epilog (used in swp calls).
00810    */
00811   if (bb && (BB_entry(bb) || BB_exit(bb))) {
00812     Max_Sdata_Elt_Size = 0;
00813   }
00814   if (   Can_Rematerialize_TN(tn, client)
00815       && ((WN *)mem_loc == TN_home(tn))
00816   ) {
00817     WN *home = TN_home(tn);
00818     OPCODE opcode;
00819     OPERATOR opr;
00820     TN *const_tn;
00821 
00822     FmtAssert (home != NULL, 
00823         ("No home for rematerializable TN%d", TN_number(tn)));
00824     FmtAssert((WN *)mem_loc == TN_home(tn),
00825         ("Rematerializable TN%d has a spill loc", TN_number(tn)));
00826     opcode = WN_opcode (home);
00827     opr = OPCODE_operator(opcode);
00828     /* make sure st is allocated. */
00829     if (OPCODE_has_sym(opcode) && WN_st(home) != NULL) {
00830       Allocate_Object (WN_st(home));
00831     }
00832     switch (opr) {
00833     case OPR_LDID:
00834       /* homing load */
00835       Exp_Load (OPCODE_rtype(opcode), OPCODE_desc(opcode), tn,
00836     WN_st(home), WN_offset(home), ops, V_NONE);
00837       if (Trace_Remat && !TN_is_gra_homeable(tn)) {
00838 #pragma mips_frequency_hint NEVER
00839   fprintf(TFile, "<Rematerialize> LDID for rematerializeable TN%d\n",
00840     TN_number(tn));
00841       }
00842       break;
00843     case OPR_LDA:
00844       Exp_Lda (OPCODE_rtype(opcode), tn, WN_st(home), WN_lda_offset(home),
00845          OPERATOR_UNKNOWN, ops
00846 #ifdef TARG_SL
00847          , WN_is_internal_mem_ofst(home)
00848 #endif
00849          );
00850       break;
00851     case OPR_CONST:
00852 #ifdef TARG_X8664
00853     if (OPCODE_rtype(opcode) == MTYPE_V16F4 ||
00854   OPCODE_rtype(opcode) == MTYPE_V16F8 ||
00855   OPCODE_rtype(opcode) == MTYPE_V16I1 ||
00856   OPCODE_rtype(opcode) == MTYPE_V16I2 ||
00857   OPCODE_rtype(opcode) == MTYPE_V16I4 ||
00858   OPCODE_rtype(opcode) == MTYPE_V16I8) {
00859       TCON then = ST_tcon_val(WN_st(home));
00860       TCON now  = Create_Simd_Const (OPCODE_rtype(opcode), then);
00861       ST *sym = New_Const_Sym (Enter_tcon (now), 
00862              Be_Type_Tbl(OPCODE_rtype(opcode)));
00863       Allocate_Object(sym);
00864       Exp_OP1 (opcode, tn, Gen_Symbol_TN (sym, 0, 0), ops);
00865     } else
00866 #endif
00867       Exp_OP1 (opcode, tn, Gen_Symbol_TN(WN_st(home),0,0), ops);
00868       break;
00869     case OPR_INTCONST:
00870       switch (opcode) {
00871       case OPC_I8INTCONST:
00872       case OPC_U8INTCONST:
00873 #if defined(EMULATE_LONGLONG) && !defined(TARG_SL)
00874         {
00875           extern TN *Gen_Literal_TN_Pair(UINT64);
00876           const_tn = Gen_Literal_TN_Pair((UINT64) WN_const_val(home));
00877         }
00878 #else
00879   const_tn = Gen_Literal_TN (WN_const_val(home), 8);
00880 #endif
00881   break;
00882       case OPC_I4INTCONST:
00883   const_tn = Gen_Literal_TN ((INT32) WN_const_val(home), 4);
00884   break;
00885       case OPC_U4INTCONST:
00886 #ifdef TARG_X8664
00887   /* Opteron will zero-out the higher 32-bit. (bug#3387) */
00888   const_tn = Gen_Literal_TN ((UINT32) WN_const_val(home), 4);
00889 #else
00890   /* even for U4 we sign-extend the value
00891    * so it matches what we want register to look like */
00892   const_tn = Gen_Literal_TN ((INT32) WN_const_val(home), 4);
00893 #endif // TARG_X8664
00894   break;
00895       default:
00896   ErrMsg (EC_Unimplemented,
00897     "CGSPILL_Restore: cannot handle WHIRL node");
00898       }
00899       Exp_OP1 (opcode, tn, const_tn, ops);
00900       break;
00901     default:
00902       ErrMsg (EC_Unimplemented, "CGSPILL_Restore: cannot handle WHIRL node");
00903     }
00904 
00905     if (Trace_Remat) {
00906       #pragma mips_frequency_hint NEVER
00907       Check_Phase_And_PU();
00908       fprintf(TFile, "<Rematerialize> rematerializing TN%d:\n", TN_number(tn));
00909       Print_OPS(ops);
00910     }
00911   } else {
00912 
00913     /* Must actually load it from memory
00914      */
00915     CGTARG_Load_From_Memory(tn, mem_loc, ops);
00916 #ifdef TARG_IA64
00917     ld_2_ld_fill (ops);
00918 #endif
00919 #ifdef KEY
00920     CGSPILL_Inc_Restore_Count(mem_loc);
00921 #endif
00922   }
00923   Max_Sdata_Elt_Size = max_sdata_save;
00924 #ifdef TARG_IA64
00925   if(ops->last)
00926    Set_OP_spill_restore(ops->last);
00927 #endif
00928 }
00929 
00930 
00931 /* ======================================================================
00932  *
00933  * CGSPILL_Store_To_Memory
00934  *
00935  * See interface description
00936  *
00937  * ======================================================================*/
00938 void 
00939 CGSPILL_Store_To_Memory (TN *src_tn, ST *mem_loc, OPS *ops,
00940        CGSPILL_CLIENT client, BB *bb)
00941 {
00942   INT32 max_sdata_save = Max_Sdata_Elt_Size;
00943 
00944   /* hack to prevent use of gp in loading constant in prolog and epilog
00945    * before/after gp setup/restore.  NULL bb if no possibility of spilling
00946    * in prolog or epilog (used in swp calls).
00947    */
00948   if (bb && (BB_entry(bb) || BB_exit(bb))) {
00949     Max_Sdata_Elt_Size = 0;
00950   }
00951 
00952   /* Don't need to store back a rematerializable constant
00953    */
00954   if (   Can_Rematerialize_TN(src_tn, client)
00955       && ((WN *)mem_loc == TN_home(src_tn))
00956   ) {
00957     WN *home = TN_home(src_tn);
00958     if (WN_operator(home) == OPR_LDID) {
00959       Exp_Store (OPCODE_desc(WN_opcode(home)), src_tn, WN_st(home),
00960      WN_offset(home), ops, V_NONE);
00961 #ifdef TARG_IA64
00962       st_2_st_spill (ops) ;
00963 #endif
00964     } else if (Trace_Remat) {
00965 #pragma mips_frequency_hint NEVER
00966       Check_Phase_And_PU();
00967       fprintf(TFile, "<Rematerialize> Suppressing spill of rematerializable "
00968          "TN%d.\n", TN_number(src_tn));
00969     }
00970 #ifdef TARG_IA64
00971     if(ops->last)
00972      Set_OP_spill_restore(ops->last);
00973 #endif
00974 #ifdef KEY
00975     // Looks like a bug in the Open64 compiler. 
00976     // In the case of entry/exit BBs, the Max_Sdata_Elt_Size might get
00977     // reset and never set back if the next return is executed.
00978     Max_Sdata_Elt_Size = max_sdata_save;  
00979 #endif
00980     return;
00981   }
00982 
00983   CGTARG_Store_To_Memory(src_tn, mem_loc, ops);
00984 #ifdef TARG_IA64
00985   st_2_st_spill (ops);
00986 #endif
00987   Max_Sdata_Elt_Size = max_sdata_save;
00988 #ifdef TARG_IA64
00989   if(ops->last)
00990    Set_OP_spill_restore(ops->last);
00991 #endif
00992 
00993 #ifdef KEY
00994   CGSPILL_Record_Spill(mem_loc, OPS_last(ops));
00995 #endif
00996 }
00997 
00998 
00999 /* ======================================================================
01000  * 
01001  * Find_Last_Copy
01002  *
01003  * Find the last copy in the block following the stack adjustment (i.e.
01004  * save tn copies).
01005  *
01006  * ====================================================================== */
01007 static OP* Find_Last_Copy(BB *bb)
01008 {
01009   OP *last_copy_op;
01010 
01011   if (BB_handler(bb)) {
01012     if (!GRA_Spill_Around_Save_TN_Copies()) {
01013       return NULL;
01014     }
01015     last_copy_op = BB_first_op(bb);
01016   } else {
01017     last_copy_op = BB_entry_sp_adj_op(bb);
01018   }
01019   if (last_copy_op && GRA_Spill_Around_Save_TN_Copies()) {
01020     OP *tmp_op;
01021     for (tmp_op = OP_next(last_copy_op); tmp_op;
01022    tmp_op = OP_next(tmp_op)) {
01023       if (OP_copy(tmp_op) && TN_is_save_reg(OP_result(tmp_op,0))) {
01024   last_copy_op = tmp_op;
01025       }
01026     }
01027   }
01028   return last_copy_op;
01029 }
01030 
01031 
01032 /* ======================================================================
01033  * 
01034  * Find_First_Copy
01035  *
01036  * Find the first copy in the block preceeding the stack adjustment (i.e.
01037  * save tn copies).
01038  *
01039  * ====================================================================== */
01040 static OP* Find_First_Copy(BB *bb)
01041 {
01042   OP *first_copy_op = BB_exit_sp_adj_op(bb);
01043   if (first_copy_op && GRA_Spill_Around_Save_TN_Copies()) {
01044     OP *tmp_op;
01045     for (tmp_op = OP_prev(first_copy_op); tmp_op;
01046    tmp_op = OP_prev(tmp_op)) {
01047       if (OP_copy(tmp_op) && TN_is_save_reg(OP_opnd(tmp_op, OP_COPY_OPND))) {
01048   first_copy_op = tmp_op;
01049       }
01050     }
01051   }
01052   return first_copy_op;
01053 }
01054 
01055 /* ======================================================================
01056  *
01057  * CGSPILL_Prepend_Ops
01058  *
01059  * See interface description
01060  *
01061  * ======================================================================*/
01062 void
01063 CGSPILL_Prepend_Ops (BB *bb, OPS *ops)
01064 {
01065   if (OPS_first(ops) == NULL) return;
01066 
01067 #if 0
01068   OP *op;
01069   SRCPOS srcpos = 0;
01070   /* want ops srcpos associated with beginning of bb */
01071   srcpos = BB_first_op(bb) ? OP_srcpos(BB_first_op(bb)) 
01072   : OP_srcpos(BB_last_op(BB_prev(bb)));
01073   FOR_ALL_OPS_OPs(ops, op) OP_srcpos(op) = srcpos;
01074 #endif
01075 
01076   Reset_BB_scheduled (bb);
01077 
01078   if (BB_entry(bb)) {
01079     OP *last_copy = Find_Last_Copy(bb);
01080     if (last_copy) {
01081       BB_Insert_Ops_After (bb, last_copy, ops);
01082     } else {
01083       BB_Prepend_Ops(bb, ops);
01084     }
01085     return;
01086   }
01087 
01088   if (Is_Caller_Save_GP && PU_Has_Calls && !Constant_GP) {
01089     OP *op;
01090     ISA_REGISTER_CLASS cl = TN_register_class(GP_TN);
01091     REGISTER reg = TN_register(GP_TN);
01092 
01093     FOR_ALL_OPS_OPs(ops, op) {
01094       if (OP_Refs_Reg(op, cl, reg)) {
01095         // The new code uses GP.  Determine where it is reset.
01096 
01097         for (OP *bb_op = BB_first_op(bb); bb_op != NULL; bb_op = OP_next(bb_op)) {
01098           if (OP_Defs_Reg(bb_op, cl, reg)) {
01099             BB_Insert_Ops_After (bb, bb_op, ops);
01100             return;
01101           }
01102         }
01103 
01104         break;
01105       }
01106     }
01107 
01108   }
01109 
01110   BB_Prepend_Ops (bb, ops);
01111 }
01112 
01113 
01114 /* ======================================================================
01115  *
01116  * CGSPILL_Insert_Ops_Before
01117  *
01118  * See interface description
01119  *
01120  * ======================================================================*/
01121 void
01122 CGSPILL_Insert_Ops_Before (BB *bb, OP *point, OPS *ops)
01123 {
01124   OP *op;
01125 #if Is_True_On
01126   /* Assert that if BB_entry, point is not before SP adjustment. */
01127   if (BB_entry(bb) && !BB_handler(bb)) {
01128     FmtAssert (OP_Follows(point, BB_entry_sp_adj_op(bb)),
01129          ("cannot insert spill ops before SP adjust"));
01130   }
01131 #endif
01132   if (BB_exit(bb)) {
01133     /* check if the <point> is after the SP adjustment OP. If it is,
01134      * change the point to be the SP adjustment OP.
01135      */
01136     OP *first_copy = Find_First_Copy(bb);
01137     if (OP_Follows(point, first_copy)) point = first_copy;
01138   }
01139   else {
01140     OP *prev_op = OP_prev (point);
01141     if (prev_op != NULL && OP_xfer(prev_op)) {
01142       point = prev_op;
01143     }
01144   }
01145   /* inserting ops before, but want ops associated with srcpos of point */
01146   FOR_ALL_OPS_OPs(ops, op) OP_srcpos(op) = OP_srcpos(point);
01147   BB_Insert_Ops_Before (bb, point, ops);
01148   Reset_BB_scheduled (bb);
01149 }
01150 
01151 /* ======================================================================
01152  *
01153  * Is_Aliased_With_Home
01154  *
01155  * Determine if an op is an aliased memory reference with the home 
01156  * location of tn.
01157  *
01158  * ======================================================================*/
01159 static BOOL Is_Aliased_With_Home(TN *tn, OP* op)
01160 {
01161   if (OP_store(op) || OP_load(op)) {
01162     WN *wn = Get_WN_From_Memory_OP(op);
01163     if (wn != NULL) {
01164       ALIAS_RESULT alias = Aliased(Alias_Manager, TN_home(tn), wn);
01165       return alias == SAME_LOCATION;
01166     }
01167   }
01168   return FALSE;
01169 }
01170 
01171 /* ======================================================================
01172  *
01173  * CGSPILL_Insert_Ops_Before_First_Use
01174  *
01175  * See interface description
01176  *
01177  * ======================================================================*/
01178 void
01179 CGSPILL_Insert_Ops_Before_First_Use (TN *tn, BB *bb, OPS *ops)
01180 {
01181   OP *op;
01182 
01183   for (op = BB_first_op(bb); op != NULL; op = OP_next(op)) {
01184     INT i;
01185     for (i = 0; i < OP_opnds(op); i++) {
01186       if (OP_opnd(op,i) == tn || 
01187     (TN_is_gra_homeable(tn) && Is_Aliased_With_Home(tn, op))) {
01188   CGSPILL_Insert_Ops_Before(bb, op, ops);
01189   if (Trace_GRA_spill_placement) {
01190     #pragma mips_frequency_hint NEVER
01191     fprintf(TFile, "<gra> moving spill load of TN%d before first ",
01192       TN_number(tn));
01193     fprintf(TFile, "use in BB%d\n", BB_id(bb));
01194   }
01195   return;
01196       }
01197     }
01198     for (i = 0; i < OP_results(op); i++) {
01199       if (OP_result(op,i) == tn) {
01200   if (OP_cond_def(op)) {
01201     CGSPILL_Insert_Ops_Before(bb, op, ops);
01202     if (Trace_GRA_spill_placement) {
01203       #pragma mips_frequency_hint NEVER
01204       fprintf(TFile, "<gra> moving spill load of TN%d before first cond_def",
01205         TN_number(tn));
01206       fprintf(TFile, "use in BB%d\n", BB_id(bb));
01207     }
01208     return;
01209   }
01210   else {
01211     // the spill reload is redundant.  don't do it.
01212     if (Trace_GRA_spill_placement) {
01213       #pragma mips_frequency_hint NEVER
01214       fprintf(TFile, "<gra> not adding redundant spill load of TN%d to ",
01215         TN_number(tn));
01216       fprintf(TFile,"bottom of BB%d\n ", BB_id(bb));
01217     }
01218     return;
01219   }
01220       }
01221     }
01222   }
01223 
01224   //
01225   // use not found.  put it at the bottom of the block.
01226   //
01227   CGSPILL_Append_Ops(bb, ops);
01228   if (Trace_GRA_spill_placement) {
01229     #pragma mips_frequency_hint NEVER
01230     fprintf(TFile, "<gra> moving spill load of TN%d to bottom of BB%d\n ",
01231       TN_number(tn), BB_id(bb));
01232   }
01233 
01234 }
01235 
01236 /* ======================================================================
01237  *
01238  * Rename_Opnds
01239  *
01240  * Rename each occurance of <old> with <new> in the operands of <op>
01241  *
01242  * ======================================================================*/
01243 static void
01244 Rename_Opnds( OP* op, TN* old_tn, TN* new_tn )
01245 {
01246   INT i;
01247 
01248   for (i = OP_opnds(op) - 1; i >= 0; --i) {
01249     if (OP_opnd(op,i) == old_tn) 
01250       Set_OP_opnd(op,i,new_tn);
01251   }
01252 }
01253   
01254 
01255 /* ======================================================================
01256  *
01257  * OP_Refs_TN_Reg
01258  *
01259  * Does <op> have an operand TN allocated to the same register as <tn>?
01260  * If so, return the operand TN by reference in <dep_tn>.
01261  *
01262  * ======================================================================*/
01263 static BOOL
01264 OP_Refs_TN_Reg( OP* op, TN* tn, TN** dep_tn )
01265 {
01266   if ( TN_is_constant(tn) || TN_is_const_reg(tn) )
01267     return FALSE;
01268   else {
01269     INT i;
01270     REGISTER reg = TN_register(tn);
01271     ISA_REGISTER_CLASS reg_class = TN_register_class(tn);
01272   
01273     if ( reg == REGISTER_UNDEFINED )
01274       return FALSE;
01275 
01276     for ( i = OP_opnds(op) - 1; i >= 0; --i ) {
01277       TN* opnd = OP_opnd(op,i);
01278 
01279       if ( ! (TN_is_constant(opnd) || TN_is_const_reg(opnd)) ) {
01280         REGISTER opnd_reg = TN_register(opnd);
01281         ISA_REGISTER_CLASS opnd_reg_class = TN_register_class(opnd);
01282 
01283         if ( opnd_reg_class == reg_class
01284              && opnd_reg == reg
01285         ) {
01286           *dep_tn = opnd;
01287           return TRUE;
01288         }
01289       }
01290     }
01291 
01292     return FALSE;
01293   }
01294 }
01295 
01296 
01297 /* ======================================================================
01298  * Fix_Xfer_Dependences
01299  *
01300  * We are about to append <ops> to <bb>, a block ending in a branch.  We can't
01301  * actually append <ops>, we have to put them in front of the branch.  But
01302  * what if they define a TN that the branch uses?  This function check for
01303  * this situation.  For each operand of the branch that is defined in <ops>, a
01304  * copy is made into a temp just above the branch and the reference in the
01305  * branch is renamed to use the temp.  After this transformation, it is safe
01306  * to insert OPs just above the branch.
01307  *
01308  * We also check for the case TN is different but the assigned register
01309  * is the same.
01310  * ======================================================================*/
01311 static void
01312 Fix_Xfer_Dependences (BB* bb, OPS* ops)
01313 {
01314   OP* op;
01315   OP* xfer_op = BB_last_op(bb);
01316 
01317   Is_True(OP_xfer(xfer_op),("Expecting a xfer op as last in block"));
01318 
01319   /* if an OP in <ops> writes a TN used in the branch instruction, we'll
01320    * have to use a temp to hold the branch operand:
01321    */
01322   FOR_ALL_OPS_OPs_FWD(ops,op) {
01323     INT i;
01324     for (i = 0; i < OP_results(op); ++i) {
01325       TN *dep_tn = OP_result(op,i);
01326 
01327       if (    OP_Refs_TN (xfer_op, dep_tn)
01328            || OP_Refs_TN_Reg (xfer_op, OP_result(op,i), &dep_tn)
01329       ) {
01330         OPS copy_ops = OPS_EMPTY;
01331         TN* tmp_tn = Dup_TN_Even_If_Dedicated (dep_tn);
01332 
01333         Exp_COPY (tmp_tn, dep_tn, &copy_ops);
01334         BB_Insert_Ops_Before (bb, xfer_op, &copy_ops);
01335         Rename_Opnds (xfer_op, dep_tn, tmp_tn);
01336       }
01337     }
01338   }
01339 }
01340 
01341 
01342 /* ======================================================================
01343  *
01344  * CGSPILL_Append_Ops
01345  *
01346  * See interface description
01347  *
01348  * ======================================================================*/
01349 void
01350 CGSPILL_Append_Ops (BB *bb, OPS *ops)
01351 {
01352   OP *before_point = NULL;
01353   BOOL after_tagged_op = FALSE;
01354   LABEL_IDX tag_idx = 0;
01355 
01356   OP *orig_last_op;
01357   OP *new_last_op;
01358 
01359   if (BB_exit(bb)) {
01360     before_point = Find_First_Copy(bb);
01361     /* check if sp_adj is in delay slot */
01362     if (OP_prev(before_point) != NULL && OP_xfer(OP_prev(before_point))) {
01363   before_point = OP_prev(before_point);
01364     }
01365   }  else {
01366     OP *last_op;
01367 
01368     if (PROC_has_branch_delay_slot())
01369       BB_Move_Delay_Slot_Op (bb);
01370     last_op = BB_last_op (bb);
01371     if (last_op != NULL && OP_xfer(last_op)) {
01372       Fix_Xfer_Dependences (bb, ops);
01373       before_point = BB_last_op(bb);
01374     }
01375 
01376 #ifdef TARG_SL //adjust before_point if the bb has c2_joint instruction
01377   if(last_op != NULL) {
01378     OP* tmp;
01379     FOR_ALL_BB_OPs_REV(bb, tmp)
01380     {
01381        if(OP_code(tmp) == TOP_c2_joint  || OP_code(tmp) == TOP_loop )
01382        {
01383           before_point = tmp;
01384      break;
01385    }
01386     }
01387   }
01388 #endif 
01389 
01390 #ifdef TARG_X8664
01391     else if (last_op != NULL && OP_code(last_op) == TOP_savexmms)
01392       before_point = BB_last_op(bb);
01393 #endif
01394   }
01395 
01396   if (before_point != NULL) {
01397     BB_Insert_Ops_Before (bb, before_point, ops);
01398   }
01399    else {
01400     BB_Append_Ops (bb, ops);
01401   }
01402   Reset_BB_scheduled (bb);
01403 }
01404 
01405 
01406 /* ======================================================================
01407  *
01408  * CGSPILL_Insert_Ops_After
01409  *
01410  * See interface description
01411  *
01412  * ======================================================================*/
01413 void
01414 CGSPILL_Insert_Ops_After (BB *bb, OP *point, OPS *ops)
01415 {
01416   OP *op;
01417 #if Is_True_On
01418   /* Assert that if BB_exit(bb), then point is not after SP adjust. */
01419   if (BB_exit(bb)) {
01420     FmtAssert (OP_Follows(BB_exit_sp_adj_op(bb), point),
01421          ("cannot insert spill ops after SP adjust"));
01422   }
01423   /* Assert that <point> is not a branch or a delay slot instruction */
01424   if (OP_xfer(point) || 
01425       (OP_prev(point) != NULL && OP_xfer(OP_prev(point))))
01426   {
01427     FmtAssert (FALSE, ("Cannot insert spill ops after branch."));
01428   }
01429 #endif
01430   if (BB_entry(bb)) {
01431     /* check if the <point> is before the SP adjustment OP. If it is,
01432      * change the point to be the SP adjustment OP.
01433      */
01434     OP *last_copy = Find_Last_Copy(bb);
01435     if (last_copy && OP_Follows(last_copy, point)) point = last_copy;
01436   }
01437   /* inserting ops before, but want ops associated with srcpos of point */
01438   FOR_ALL_OPS_OPs(ops, op) OP_srcpos(op) = OP_srcpos(point);
01439   BB_Insert_Ops_After (bb, point, ops);
01440   Reset_BB_scheduled (bb);
01441 }
01442 
01443 /* ======================================================================
01444  *
01445  * CGSPILL_Insert_Ops_After_Last_Def
01446  *
01447  * See interface description
01448  *
01449  * ======================================================================*/
01450 void
01451 CGSPILL_Insert_Ops_After_Last_Def (TN *tn, BB *bb, OPS *ops)
01452 {
01453   OP *op;
01454   INT i;
01455 
01456   for (op = BB_last_op(bb); op != NULL; op = OP_prev(op)) {
01457     for (i = 0; i < OP_results(op); ++i) {
01458       if (OP_result(op,i) == tn) goto found_def;
01459     }
01460     if (TN_is_gra_homeable(tn) && Is_Aliased_With_Home(tn, op)) break;
01461   }
01462 found_def:
01463   
01464   //
01465   // def not found.  put spill at top of block.
01466   //
01467   if (op == NULL) {
01468     CGSPILL_Prepend_Ops(bb, ops);
01469     if (Trace_GRA_spill_placement) {
01470       #pragma mips_frequency_hint NEVER
01471       fprintf(TFile, "<gra> moving spill store of TN%d to top of BB%d\n ",
01472         TN_number(tn), BB_id(bb));
01473     }
01474   } else if (op == BB_last_op(bb)) {
01475     // line info of spilled op
01476     OP *tmp;
01477     FOR_ALL_OPS_OPs(ops, tmp) {
01478       if (OP_srcpos(tmp) == 0) 
01479         OP_srcpos(tmp) = OP_srcpos(op);
01480     }
01481     //
01482     // we do some fancy footwork if we're spilling the delay slot
01483     // instruction.  let CGSPILL_Append_Ops handle it.
01484     //
01485     CGSPILL_Append_Ops(bb, ops);
01486   } else {
01487     CGSPILL_Insert_Ops_After(bb, op, ops);
01488     if (Trace_GRA_spill_placement) {
01489       #pragma mips_frequency_hint NEVER
01490       fprintf(TFile, "<gra> moving spill store of TN%d before last ",
01491         TN_number(tn));
01492       fprintf(TFile, "def in BB%d\n", BB_id(bb));
01493     }
01494     
01495   }
01496 }
01497 
01498 /* ======================================================================
01499  *
01500  * CGSPILL_Force_Rematerialization_For_BB
01501  *
01502  * See interface description
01503  *
01504  * ======================================================================*/
01505 void
01506 CGSPILL_Force_Rematerialization_For_BB(BB *bb)
01507 {
01508   OP *op;
01509 
01510   if (!CGSPILL_Rematerialize_Constants) return;
01511 
01512   FOR_ALL_BB_OPs(bb, op) {
01513     INT k;
01514 
01515     for (k = 0; k < OP_opnds(op); k++) {
01516       TN *tn = OP_opnd(op, k);
01517       if (TN_is_rematerializable(tn)) {
01518   OP *new_op;
01519   OPS ops = OPS_EMPTY;
01520   TN *new_tn = Dup_TN(tn);
01521   CGSPILL_Load_From_Memory(new_tn, (ST *)TN_home(new_tn), &ops,
01522          CGSPILL_LCL, bb);
01523 
01524         if (Is_CG_LOOP_Op(op)) {
01525     FOR_ALL_OPS_OPs(&ops, new_op) {
01526       CGPREP_Init_Op(new_op);
01527       CG_LOOP_Init_Op(new_op);
01528           }
01529   }
01530   CGSPILL_Insert_Ops_Before(bb, op, &ops);
01531   // if (CG_DEP_Has_Graph(bb)) {
01532   //  FOR_ALL_OPS_OPs(&ops, new_op) {
01533   //    CG_DEP_Op_Added(new_op);
01534   //  }
01535   // }
01536 
01537   Reset_TN_is_rematerializable(new_tn);
01538   Set_TN_home(new_tn, NULL);
01539 
01540   Set_OP_opnd(op, k, new_tn);
01541   // if (CG_DEP_Has_Graph(bb)) {
01542   //  CG_DEP_Op_Opnd_Changed(op, k, tn);
01543   // }
01544       }
01545     }
01546   }
01547 }
01548 
01549 
01550 /* ======================================================================
01551  *
01552  * CGSPILL_Force_Rematerialization
01553  *
01554  * See interface description
01555  *
01556  * ======================================================================*/
01557 void
01558 CGSPILL_Force_Rematerialization(void)
01559 {
01560   BB *bb;
01561 
01562   if (!CGSPILL_Rematerialize_Constants) return;
01563 
01564   if (Trace_Remat) {
01565     #pragma mips_frequency_hint NEVER
01566     fprintf ( TFile, "\n%s%s\tIR before CGSPILL_Force_Rematerialization\n%s%s\n",
01567               DBar, DBar, DBar, DBar );
01568     for (bb = REGION_First_BB; bb; bb = BB_next(bb)) Print_BB(bb);
01569     fprintf ( TFile, "%s%s\n", DBar, DBar );
01570   }
01571 
01572   for (bb = REGION_First_BB; bb; bb = BB_next(bb)) {
01573     RID *rid = BB_rid(bb);
01574     if (!rid || !RID_has_reg_alloc(rid)) {
01575       CGSPILL_Force_Rematerialization_For_BB(bb);
01576     }
01577   }
01578 
01579   if (Trace_Remat) {
01580     #pragma mips_frequency_hint NEVER
01581     fprintf ( TFile, "\n%s%s\tIR after CGSPILL_Force_Rematerialization\n%s%s\n",
01582               DBar, DBar, DBar, DBar );
01583     for (bb = REGION_First_BB; bb; bb = BB_next(bb)) Print_BB(bb);
01584     fprintf ( TFile, "%s%s\n", DBar, DBar );
01585   }
01586 }
01587 
01588 
01589 /* ======================================================================
01590  *
01591  * CGSPILL_Attach_Lda_Remat
01592  *
01593  * See interface description
01594  *
01595  * ======================================================================*/
01596 void CGSPILL_Attach_Lda_Remat(TN *tn, TYPE_ID typ, INT64 offset, ST *st)
01597 {
01598   if (CGSPILL_Rematerialize_Constants) {
01599     OPCODE opc = OPCODE_make_op(OPR_LDA, typ, MTYPE_V);
01600     WN *wn = WN_CreateLda(opc, offset, (TY_IDX) NULL, st);
01601     if (wn) {
01602       Set_TN_is_rematerializable(tn);
01603       Set_TN_home(tn, wn);
01604     }
01605   }
01606 }
01607 
01608 
01609 /* ======================================================================
01610  *
01611  * CGSPILL_Attach_Intconst_Remat
01612  *
01613  * See interface description
01614  *
01615  * ======================================================================*/
01616 void CGSPILL_Attach_Intconst_Remat(TN *tn, INT64 val)
01617 {
01618   if (CGSPILL_Rematerialize_Constants) {
01619     WN *wn = WN_CreateIntconst(OPC_I8INTCONST, val);
01620     if (wn) {
01621       Set_TN_is_rematerializable(tn);
01622       Set_TN_home(tn, wn);
01623     }
01624   }
01625 }
01626 
01627 
01628 /* ======================================================================
01629  *
01630  * CGSPILL_Attach_Floatconst_Remat
01631  *
01632  * See interface description
01633  *
01634  * ======================================================================*/
01635 void CGSPILL_Attach_Floatconst_Remat(TN *tn, TYPE_ID typ, double val)
01636 {
01637   TCON tcon = Host_To_Targ_Float(typ, val);
01638   ST *st = New_Const_Sym(Enter_tcon(tcon), Be_Type_Tbl(TCON_ty(tcon)));
01639   CGSPILL_Attach_Const_Remat(tn, typ, st);
01640 }
01641 
01642 
01643 /* ======================================================================
01644  *
01645  * CGSPILL_Attach_Const_Remat
01646  *
01647  * See interface description
01648  *
01649  * ======================================================================*/
01650 void CGSPILL_Attach_Const_Remat(TN *tn, TYPE_ID typ, ST *st)
01651 {
01652   if (CGSPILL_Rematerialize_Constants) {
01653     OPCODE opc = OPCODE_make_op(OPR_CONST, typ, MTYPE_V);
01654     WN *wn = WN_CreateConst(opc, st);
01655     if (wn) {
01656       Set_TN_is_rematerializable(tn);
01657       Set_TN_home(tn, wn);
01658     }
01659   }
01660 }
01661 
01662 
01663 #ifdef KEY
01664 // Record that SPILL_OP is associated with SPILL_LOC.
01665 void
01666 CGSPILL_Record_Spill (ST *spill_loc, OP *spill_op)
01667 {
01668   SPILL_SYM_INFO &info = spill_sym_info_map[ST_IDX((INTPTR)spill_loc)];
01669 
01670   // Don't keep track of more than one spill.
01671   info.Set_Spill_Op(info.Spill_Count() == 0 ? spill_op : NULL);
01672   info.Inc_Spill_Count();
01673 }
01674 
01675 
01676 void
01677 CGSPILL_Inc_Restore_Count (ST *spill_loc)
01678 {
01679   SPILL_SYM_INFO &info = spill_sym_info_map[ST_IDX((INTPTR)spill_loc)];
01680   info.Inc_Restore_Count();
01681 }
01682 
01683 
01684 SPILL_SYM_INFO &
01685 CGSPILL_Get_Spill_Sym_Info (ST *spill_loc)
01686 {
01687   return spill_sym_info_map[ST_IDX((INTPTR)spill_loc)];
01688 }
01689 #endif