Open64: osprey/kg++fe/gnu/ia64/insn-emit.c Source File

00001 /* Generated automatically by the program `genemit'
00002 from the machine description file `md'.  */
00003 
00004 #include "config.h"
00005 #include "system.h"
00006 #include "rtl.h"
00007 #include "tm_p.h"
00008 #include "function.h"
00009 #include "expr.h"
00010 #include "optabs.h"
00011 #include "real.h"
00012 #include "flags.h"
00013 #include "output.h"
00014 #include "insn-config.h"
00015 #include "hard-reg-set.h"
00016 #include "recog.h"
00017 #include "resource.h"
00018 #include "reload.h"
00019 #include "toplev.h"
00020 #include "ggc.h"
00021 
00022 #define FAIL return (end_sequence (), _val)
00023 #define DONE return (_val = get_insns (), end_sequence (), _val)
00024 
00025 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:241 */
00026 rtx
00027 gen_movbi (operand0, operand1)
00028      rtx operand0;
00029      rtx operand1;
00030 {
00031   return gen_rtx_SET (VOIDmode,
00032   operand0,
00033   operand1);
00034 }
00035 
00036 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:350 */
00037 rtx
00038 gen_movsi_symbolic (operand0, operand1)
00039      rtx operand0;
00040      rtx operand1;
00041 {
00042   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
00043     gen_rtx_SET (VOIDmode,
00044   operand0,
00045   operand1),
00046     gen_rtx_CLOBBER (VOIDmode,
00047   gen_rtx_SCRATCH (DImode)),
00048     gen_rtx_USE (VOIDmode,
00049   gen_rtx_REG (DImode,
00050   1))));
00051 }
00052 
00053 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:402 */
00054 rtx
00055 gen_movdi_symbolic (operand0, operand1)
00056      rtx operand0;
00057      rtx operand1;
00058 {
00059   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
00060     gen_rtx_SET (VOIDmode,
00061   operand0,
00062   operand1),
00063     gen_rtx_CLOBBER (VOIDmode,
00064   gen_rtx_SCRATCH (DImode)),
00065     gen_rtx_USE (VOIDmode,
00066   gen_rtx_REG (DImode,
00067   1))));
00068 }
00069 
00070 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:483 */
00071 rtx
00072 gen_load_gprel (operand0, operand1)
00073      rtx operand0;
00074      rtx operand1;
00075 {
00076   return gen_rtx_SET (VOIDmode,
00077   operand0,
00078   gen_rtx_PLUS (DImode,
00079   gen_rtx_REG (DImode,
00080   1),
00081   operand1));
00082 }
00083 
00084 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:490 */
00085 rtx
00086 gen_gprel64_offset (operand0, operand1)
00087      rtx operand0;
00088      rtx operand1;
00089 {
00090   return gen_rtx_SET (VOIDmode,
00091   operand0,
00092   gen_rtx_MINUS (DImode,
00093   operand1,
00094   gen_rtx_REG (DImode,
00095   1)));
00096 }
00097 
00098 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:545 */
00099 rtx
00100 gen_load_ltoff_dtpmod (operand0, operand1)
00101      rtx operand0;
00102      rtx operand1;
00103 {
00104   return gen_rtx_SET (VOIDmode,
00105   operand0,
00106   gen_rtx_PLUS (DImode,
00107   gen_rtx_REG (DImode,
00108   1),
00109   gen_rtx_UNSPEC (DImode,
00110   gen_rtvec (1,
00111     operand1),
00112   0)));
00113 }
00114 
00115 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:554 */
00116 rtx
00117 gen_load_ltoff_dtprel (operand0, operand1)
00118      rtx operand0;
00119      rtx operand1;
00120 {
00121   return gen_rtx_SET (VOIDmode,
00122   operand0,
00123   gen_rtx_PLUS (DImode,
00124   gen_rtx_REG (DImode,
00125   1),
00126   gen_rtx_UNSPEC (DImode,
00127   gen_rtvec (1,
00128     operand1),
00129   1)));
00130 }
00131 
00132 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:612 */
00133 rtx
00134 gen_load_ltoff_tprel (operand0, operand1)
00135      rtx operand0;
00136      rtx operand1;
00137 {
00138   return gen_rtx_SET (VOIDmode,
00139   operand0,
00140   gen_rtx_PLUS (DImode,
00141   gen_rtx_REG (DImode,
00142   1),
00143   gen_rtx_UNSPEC (DImode,
00144   gen_rtvec (1,
00145     operand1),
00146   3)));
00147 }
00148 
00149 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:931 */
00150 rtx
00151 gen_extendqidi2 (operand0, operand1)
00152      rtx operand0;
00153      rtx operand1;
00154 {
00155   return gen_rtx_SET (VOIDmode,
00156   operand0,
00157   gen_rtx_SIGN_EXTEND (DImode,
00158   operand1));
00159 }
00160 
00161 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:938 */
00162 rtx
00163 gen_extendhidi2 (operand0, operand1)
00164      rtx operand0;
00165      rtx operand1;
00166 {
00167   return gen_rtx_SET (VOIDmode,
00168   operand0,
00169   gen_rtx_SIGN_EXTEND (DImode,
00170   operand1));
00171 }
00172 
00173 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:945 */
00174 rtx
00175 gen_extendsidi2 (operand0, operand1)
00176      rtx operand0;
00177      rtx operand1;
00178 {
00179   return gen_rtx_SET (VOIDmode,
00180   operand0,
00181   gen_rtx_SIGN_EXTEND (DImode,
00182   operand1));
00183 }
00184 
00185 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:956 */
00186 rtx
00187 gen_zero_extendqidi2 (operand0, operand1)
00188      rtx operand0;
00189      rtx operand1;
00190 {
00191   return gen_rtx_SET (VOIDmode,
00192   operand0,
00193   gen_rtx_ZERO_EXTEND (DImode,
00194   operand1));
00195 }
00196 
00197 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:965 */
00198 rtx
00199 gen_zero_extendhidi2 (operand0, operand1)
00200      rtx operand0;
00201      rtx operand1;
00202 {
00203   return gen_rtx_SET (VOIDmode,
00204   operand0,
00205   gen_rtx_ZERO_EXTEND (DImode,
00206   operand1));
00207 }
00208 
00209 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:974 */
00210 rtx
00211 gen_zero_extendsidi2 (operand0, operand1)
00212      rtx operand0;
00213      rtx operand1;
00214 {
00215   return gen_rtx_SET (VOIDmode,
00216   operand0,
00217   gen_rtx_ZERO_EXTEND (DImode,
00218   operand1));
00219 }
00220 
00221 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1001 */
00222 rtx
00223 gen_extendsfdf2 (operand0, operand1)
00224      rtx operand0;
00225      rtx operand1;
00226 {
00227   return gen_rtx_SET (VOIDmode,
00228   operand0,
00229   gen_rtx_FLOAT_EXTEND (DFmode,
00230   operand1));
00231 }
00232 
00233 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1008 */
00234 rtx
00235 gen_extendsftf2 (operand0, operand1)
00236      rtx operand0;
00237      rtx operand1;
00238 {
00239   return gen_rtx_SET (VOIDmode,
00240   operand0,
00241   gen_rtx_FLOAT_EXTEND (TFmode,
00242   operand1));
00243 }
00244 
00245 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1015 */
00246 rtx
00247 gen_extenddftf2 (operand0, operand1)
00248      rtx operand0;
00249      rtx operand1;
00250 {
00251   return gen_rtx_SET (VOIDmode,
00252   operand0,
00253   gen_rtx_FLOAT_EXTEND (TFmode,
00254   operand1));
00255 }
00256 
00257 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1022 */
00258 rtx
00259 gen_truncdfsf2 (operand0, operand1)
00260      rtx operand0;
00261      rtx operand1;
00262 {
00263   return gen_rtx_SET (VOIDmode,
00264   operand0,
00265   gen_rtx_FLOAT_TRUNCATE (SFmode,
00266   operand1));
00267 }
00268 
00269 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1029 */
00270 rtx
00271 gen_trunctfsf2 (operand0, operand1)
00272      rtx operand0;
00273      rtx operand1;
00274 {
00275   return gen_rtx_SET (VOIDmode,
00276   operand0,
00277   gen_rtx_FLOAT_TRUNCATE (SFmode,
00278   operand1));
00279 }
00280 
00281 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1036 */
00282 rtx
00283 gen_trunctfdf2 (operand0, operand1)
00284      rtx operand0;
00285      rtx operand1;
00286 {
00287   return gen_rtx_SET (VOIDmode,
00288   operand0,
00289   gen_rtx_FLOAT_TRUNCATE (DFmode,
00290   operand1));
00291 }
00292 
00293 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1045 */
00294 rtx
00295 gen_floatditf2 (operand0, operand1)
00296      rtx operand0;
00297      rtx operand1;
00298 {
00299   return gen_rtx_SET (VOIDmode,
00300   operand0,
00301   gen_rtx_FLOAT (TFmode,
00302   operand1));
00303 }
00304 
00305 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1053 */
00306 rtx
00307 gen_floatdidf2 (operand0, operand1)
00308      rtx operand0;
00309      rtx operand1;
00310 {
00311   return gen_rtx_SET (VOIDmode,
00312   operand0,
00313   gen_rtx_FLOAT (DFmode,
00314   operand1));
00315 }
00316 
00317 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1061 */
00318 rtx
00319 gen_floatdisf2 (operand0, operand1)
00320      rtx operand0;
00321      rtx operand1;
00322 {
00323   return gen_rtx_SET (VOIDmode,
00324   operand0,
00325   gen_rtx_FLOAT (SFmode,
00326   operand1));
00327 }
00328 
00329 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1068 */
00330 rtx
00331 gen_fix_truncsfdi2 (operand0, operand1)
00332      rtx operand0;
00333      rtx operand1;
00334 {
00335   return gen_rtx_SET (VOIDmode,
00336   operand0,
00337   gen_rtx_FIX (DImode,
00338   operand1));
00339 }
00340 
00341 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1075 */
00342 rtx
00343 gen_fix_truncdfdi2 (operand0, operand1)
00344      rtx operand0;
00345      rtx operand1;
00346 {
00347   return gen_rtx_SET (VOIDmode,
00348   operand0,
00349   gen_rtx_FIX (DImode,
00350   operand1));
00351 }
00352 
00353 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1082 */
00354 rtx
00355 gen_fix_trunctfdi2 (operand0, operand1)
00356      rtx operand0;
00357      rtx operand1;
00358 {
00359   return gen_rtx_SET (VOIDmode,
00360   operand0,
00361   gen_rtx_FIX (DImode,
00362   operand1));
00363 }
00364 
00365 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1089 */
00366 rtx
00367 gen_fix_trunctfdi2_alts (operand0, operand1, operand2)
00368      rtx operand0;
00369      rtx operand1;
00370      rtx operand2;
00371 {
00372   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
00373     gen_rtx_SET (VOIDmode,
00374   operand0,
00375   gen_rtx_FIX (DImode,
00376   operand1)),
00377     gen_rtx_USE (VOIDmode,
00378   operand2)));
00379 }
00380 
00381 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1099 */
00382 rtx
00383 gen_floatunsdisf2 (operand0, operand1)
00384      rtx operand0;
00385      rtx operand1;
00386 {
00387   return gen_rtx_SET (VOIDmode,
00388   operand0,
00389   gen_rtx_UNSIGNED_FLOAT (SFmode,
00390   operand1));
00391 }
00392 
00393 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1106 */
00394 rtx
00395 gen_floatunsdidf2 (operand0, operand1)
00396      rtx operand0;
00397      rtx operand1;
00398 {
00399   return gen_rtx_SET (VOIDmode,
00400   operand0,
00401   gen_rtx_UNSIGNED_FLOAT (DFmode,
00402   operand1));
00403 }
00404 
00405 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1113 */
00406 rtx
00407 gen_floatunsditf2 (operand0, operand1)
00408      rtx operand0;
00409      rtx operand1;
00410 {
00411   return gen_rtx_SET (VOIDmode,
00412   operand0,
00413   gen_rtx_UNSIGNED_FLOAT (TFmode,
00414   operand1));
00415 }
00416 
00417 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1120 */
00418 rtx
00419 gen_fixuns_truncsfdi2 (operand0, operand1)
00420      rtx operand0;
00421      rtx operand1;
00422 {
00423   return gen_rtx_SET (VOIDmode,
00424   operand0,
00425   gen_rtx_UNSIGNED_FIX (DImode,
00426   operand1));
00427 }
00428 
00429 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1127 */
00430 rtx
00431 gen_fixuns_truncdfdi2 (operand0, operand1)
00432      rtx operand0;
00433      rtx operand1;
00434 {
00435   return gen_rtx_SET (VOIDmode,
00436   operand0,
00437   gen_rtx_UNSIGNED_FIX (DImode,
00438   operand1));
00439 }
00440 
00441 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1134 */
00442 rtx
00443 gen_fixuns_trunctfdi2 (operand0, operand1)
00444      rtx operand0;
00445      rtx operand1;
00446 {
00447   return gen_rtx_SET (VOIDmode,
00448   operand0,
00449   gen_rtx_UNSIGNED_FIX (DImode,
00450   operand1));
00451 }
00452 
00453 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1141 */
00454 rtx
00455 gen_fixuns_trunctfdi2_alts (operand0, operand1, operand2)
00456      rtx operand0;
00457      rtx operand1;
00458      rtx operand2;
00459 {
00460   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
00461     gen_rtx_SET (VOIDmode,
00462   operand0,
00463   gen_rtx_UNSIGNED_FIX (DImode,
00464   operand1)),
00465     gen_rtx_USE (VOIDmode,
00466   operand2)));
00467 }
00468 
00469 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1155 */
00470 rtx
00471 gen_extv (operand0, operand1, operand2, operand3)
00472      rtx operand0;
00473      rtx operand1;
00474      rtx operand2;
00475      rtx operand3;
00476 {
00477   return gen_rtx_SET (VOIDmode,
00478   operand0,
00479   gen_rtx_SIGN_EXTRACT (DImode,
00480   operand1,
00481   operand2,
00482   operand3));
00483 }
00484 
00485 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1164 */
00486 rtx
00487 gen_extzv (operand0, operand1, operand2, operand3)
00488      rtx operand0;
00489      rtx operand1;
00490      rtx operand2;
00491      rtx operand3;
00492 {
00493   return gen_rtx_SET (VOIDmode,
00494   operand0,
00495   gen_rtx_ZERO_EXTRACT (DImode,
00496   operand1,
00497   operand2,
00498   operand3));
00499 }
00500 
00501 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1281 */
00502 rtx
00503 gen_shift_mix4left (operand0, operand1, operand2)
00504      rtx operand0;
00505      rtx operand1;
00506      rtx operand2;
00507 {
00508   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
00509     gen_rtx_SET (VOIDmode,
00510   gen_rtx_ZERO_EXTRACT (DImode,
00511   operand0,
00512   GEN_INT (32L),
00513   const0_rtx),
00514   operand1),
00515     gen_rtx_CLOBBER (VOIDmode,
00516   operand2)));
00517 }
00518 
00519 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1321 */
00520 rtx
00521 gen_mix4right (operand0, operand1)
00522      rtx operand0;
00523      rtx operand1;
00524 {
00525   return gen_rtx_SET (VOIDmode,
00526   gen_rtx_ZERO_EXTRACT (DImode,
00527   operand0,
00528   GEN_INT (32L),
00529   GEN_INT (32L)),
00530   operand1);
00531 }
00532 
00533 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1348 */
00534 rtx
00535 gen_andbi3 (operand0, operand1, operand2)
00536      rtx operand0;
00537      rtx operand1;
00538      rtx operand2;
00539 {
00540   return gen_rtx_SET (VOIDmode,
00541   operand0,
00542   gen_rtx_AND (BImode,
00543   operand1,
00544   operand2));
00545 }
00546 
00547 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1384 */
00548 rtx
00549 gen_iorbi3 (operand0, operand1, operand2)
00550      rtx operand0;
00551      rtx operand1;
00552      rtx operand2;
00553 {
00554   return gen_rtx_SET (VOIDmode,
00555   operand0,
00556   gen_rtx_IOR (BImode,
00557   operand1,
00558   operand2));
00559 }
00560 
00561 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1419 */
00562 rtx
00563 gen_one_cmplbi2 (operand0, operand1)
00564      rtx operand0;
00565      rtx operand1;
00566 {
00567   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
00568     gen_rtx_SET (VOIDmode,
00569   operand0,
00570   gen_rtx_NOT (BImode,
00571   operand1)),
00572     gen_rtx_CLOBBER (VOIDmode,
00573   gen_rtx_SCRATCH (BImode))));
00574 }
00575 
00576 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1861 */
00577 rtx
00578 gen_mulhi3 (operand0, operand1, operand2)
00579      rtx operand0;
00580      rtx operand1;
00581      rtx operand2;
00582 {
00583   return gen_rtx_SET (VOIDmode,
00584   operand0,
00585   gen_rtx_MULT (HImode,
00586   operand1,
00587   operand2));
00588 }
00589 
00590 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1876 */
00591 rtx
00592 gen_addsi3 (operand0, operand1, operand2)
00593      rtx operand0;
00594      rtx operand1;
00595      rtx operand2;
00596 {
00597   return gen_rtx_SET (VOIDmode,
00598   operand0,
00599   gen_rtx_PLUS (SImode,
00600   operand1,
00601   operand2));
00602 }
00603 
00604 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1914 */
00605 rtx
00606 gen_subsi3 (operand0, operand1, operand2)
00607      rtx operand0;
00608      rtx operand1;
00609      rtx operand2;
00610 {
00611   return gen_rtx_SET (VOIDmode,
00612   operand0,
00613   gen_rtx_MINUS (SImode,
00614   operand1,
00615   operand2));
00616 }
00617 
00618 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1932 */
00619 rtx
00620 gen_mulsi3 (operand0, operand1, operand2)
00621      rtx operand0;
00622      rtx operand1;
00623      rtx operand2;
00624 {
00625   return gen_rtx_SET (VOIDmode,
00626   operand0,
00627   gen_rtx_MULT (SImode,
00628   operand1,
00629   operand2));
00630 }
00631 
00632 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1940 */
00633 rtx
00634 gen_maddsi4 (operand0, operand1, operand2, operand3)
00635      rtx operand0;
00636      rtx operand1;
00637      rtx operand2;
00638      rtx operand3;
00639 {
00640   return gen_rtx_SET (VOIDmode,
00641   operand0,
00642   gen_rtx_PLUS (SImode,
00643   gen_rtx_MULT (SImode,
00644   operand1,
00645   operand2),
00646   operand3));
00647 }
00648 
00649 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1949 */
00650 rtx
00651 gen_negsi2 (operand0, operand1)
00652      rtx operand0;
00653      rtx operand1;
00654 {
00655   return gen_rtx_SET (VOIDmode,
00656   operand0,
00657   gen_rtx_NEG (SImode,
00658   operand1));
00659 }
00660 
00661 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2120 */
00662 rtx
00663 gen_divsi3_internal (operand0, operand1, operand2, operand3)
00664      rtx operand0;
00665      rtx operand1;
00666      rtx operand2;
00667      rtx operand3;
00668 {
00669   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (5,
00670     gen_rtx_SET (VOIDmode,
00671   operand0,
00672   gen_rtx_FLOAT (TFmode,
00673   gen_rtx_DIV (SImode,
00674   operand1,
00675   operand2))),
00676     gen_rtx_CLOBBER (VOIDmode,
00677   gen_rtx_SCRATCH (TFmode)),
00678     gen_rtx_CLOBBER (VOIDmode,
00679   gen_rtx_SCRATCH (TFmode)),
00680     gen_rtx_CLOBBER (VOIDmode,
00681   gen_rtx_SCRATCH (BImode)),
00682     gen_rtx_USE (VOIDmode,
00683   operand3)));
00684 }
00685 
00686 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2168 */
00687 rtx
00688 gen_adddi3 (operand0, operand1, operand2)
00689      rtx operand0;
00690      rtx operand1;
00691      rtx operand2;
00692 {
00693   return gen_rtx_SET (VOIDmode,
00694   operand0,
00695   gen_rtx_PLUS (DImode,
00696   operand1,
00697   operand2));
00698 }
00699 
00700 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2200 */
00701 rtx
00702 gen_subdi3 (operand0, operand1, operand2)
00703      rtx operand0;
00704      rtx operand1;
00705      rtx operand2;
00706 {
00707   return gen_rtx_SET (VOIDmode,
00708   operand0,
00709   gen_rtx_MINUS (DImode,
00710   operand1,
00711   operand2));
00712 }
00713 
00714 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2218 */
00715 rtx
00716 gen_muldi3 (operand0, operand1, operand2)
00717      rtx operand0;
00718      rtx operand1;
00719      rtx operand2;
00720 {
00721   return gen_rtx_SET (VOIDmode,
00722   operand0,
00723   gen_rtx_MULT (DImode,
00724   operand1,
00725   operand2));
00726 }
00727 
00728 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2237 */
00729 rtx
00730 gen_madddi4 (operand0, operand1, operand2, operand3)
00731      rtx operand0;
00732      rtx operand1;
00733      rtx operand2;
00734      rtx operand3;
00735 {
00736   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
00737     gen_rtx_SET (VOIDmode,
00738   operand0,
00739   gen_rtx_PLUS (DImode,
00740   gen_rtx_MULT (DImode,
00741   operand1,
00742   operand2),
00743   operand3)),
00744     gen_rtx_CLOBBER (VOIDmode,
00745   gen_rtx_SCRATCH (DImode))));
00746 }
00747 
00748 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2284 */
00749 rtx
00750 gen_smuldi3_highpart (operand0, operand1, operand2)
00751      rtx operand0;
00752      rtx operand1;
00753      rtx operand2;
00754 {
00755   return gen_rtx_SET (VOIDmode,
00756   operand0,
00757   gen_rtx_TRUNCATE (DImode,
00758   gen_rtx_LSHIFTRT (TImode,
00759   gen_rtx_MULT (TImode,
00760   gen_rtx_SIGN_EXTEND (TImode,
00761   operand1),
00762   gen_rtx_SIGN_EXTEND (TImode,
00763   operand2)),
00764   GEN_INT (64L))));
00765 }
00766 
00767 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2297 */
00768 rtx
00769 gen_umuldi3_highpart (operand0, operand1, operand2)
00770      rtx operand0;
00771      rtx operand1;
00772      rtx operand2;
00773 {
00774   return gen_rtx_SET (VOIDmode,
00775   operand0,
00776   gen_rtx_TRUNCATE (DImode,
00777   gen_rtx_LSHIFTRT (TImode,
00778   gen_rtx_MULT (TImode,
00779   gen_rtx_ZERO_EXTEND (TImode,
00780   operand1),
00781   gen_rtx_ZERO_EXTEND (TImode,
00782   operand2)),
00783   GEN_INT (64L))));
00784 }
00785 
00786 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2310 */
00787 rtx
00788 gen_negdi2 (operand0, operand1)
00789      rtx operand0;
00790      rtx operand1;
00791 {
00792   return gen_rtx_SET (VOIDmode,
00793   operand0,
00794   gen_rtx_NEG (DImode,
00795   operand1));
00796 }
00797 
00798 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2486 */
00799 rtx
00800 gen_divdi3_internal_lat (operand0, operand1, operand2)
00801      rtx operand0;
00802      rtx operand1;
00803      rtx operand2;
00804 {
00805   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (5,
00806     gen_rtx_SET (VOIDmode,
00807   operand0,
00808   gen_rtx_FLOAT (TFmode,
00809   gen_rtx_DIV (SImode,
00810   operand1,
00811   operand2))),
00812     gen_rtx_CLOBBER (VOIDmode,
00813   gen_rtx_SCRATCH (TFmode)),
00814     gen_rtx_CLOBBER (VOIDmode,
00815   gen_rtx_SCRATCH (TFmode)),
00816     gen_rtx_CLOBBER (VOIDmode,
00817   gen_rtx_SCRATCH (TFmode)),
00818     gen_rtx_CLOBBER (VOIDmode,
00819   gen_rtx_SCRATCH (BImode))));
00820 }
00821 
00822 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2546 */
00823 rtx
00824 gen_divdi3_internal_thr (operand0, operand1, operand2)
00825      rtx operand0;
00826      rtx operand1;
00827      rtx operand2;
00828 {
00829   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (4,
00830     gen_rtx_SET (VOIDmode,
00831   operand0,
00832   gen_rtx_FLOAT (TFmode,
00833   gen_rtx_DIV (SImode,
00834   operand1,
00835   operand2))),
00836     gen_rtx_CLOBBER (VOIDmode,
00837   gen_rtx_SCRATCH (TFmode)),
00838     gen_rtx_CLOBBER (VOIDmode,
00839   gen_rtx_SCRATCH (TFmode)),
00840     gen_rtx_CLOBBER (VOIDmode,
00841   gen_rtx_SCRATCH (BImode))));
00842 }
00843 
00844 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2601 */
00845 rtx
00846 gen_addsf3 (operand0, operand1, operand2)
00847      rtx operand0;
00848      rtx operand1;
00849      rtx operand2;
00850 {
00851   return gen_rtx_SET (VOIDmode,
00852   operand0,
00853   gen_rtx_PLUS (SFmode,
00854   operand1,
00855   operand2));
00856 }
00857 
00858 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2609 */
00859 rtx
00860 gen_subsf3 (operand0, operand1, operand2)
00861      rtx operand0;
00862      rtx operand1;
00863      rtx operand2;
00864 {
00865   return gen_rtx_SET (VOIDmode,
00866   operand0,
00867   gen_rtx_MINUS (SFmode,
00868   operand1,
00869   operand2));
00870 }
00871 
00872 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2617 */
00873 rtx
00874 gen_mulsf3 (operand0, operand1, operand2)
00875      rtx operand0;
00876      rtx operand1;
00877      rtx operand2;
00878 {
00879   return gen_rtx_SET (VOIDmode,
00880   operand0,
00881   gen_rtx_MULT (SFmode,
00882   operand1,
00883   operand2));
00884 }
00885 
00886 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2625 */
00887 rtx
00888 gen_abssf2 (operand0, operand1)
00889      rtx operand0;
00890      rtx operand1;
00891 {
00892   return gen_rtx_SET (VOIDmode,
00893   operand0,
00894   gen_rtx_ABS (SFmode,
00895   operand1));
00896 }
00897 
00898 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2632 */
00899 rtx
00900 gen_negsf2 (operand0, operand1)
00901      rtx operand0;
00902      rtx operand1;
00903 {
00904   return gen_rtx_SET (VOIDmode,
00905   operand0,
00906   gen_rtx_NEG (SFmode,
00907   operand1));
00908 }
00909 
00910 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2646 */
00911 rtx
00912 gen_minsf3 (operand0, operand1, operand2)
00913      rtx operand0;
00914      rtx operand1;
00915      rtx operand2;
00916 {
00917   return gen_rtx_SET (VOIDmode,
00918   operand0,
00919   gen_rtx_SMIN (SFmode,
00920   operand1,
00921   operand2));
00922 }
00923 
00924 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2654 */
00925 rtx
00926 gen_maxsf3 (operand0, operand1, operand2)
00927      rtx operand0;
00928      rtx operand1;
00929      rtx operand2;
00930 {
00931   return gen_rtx_SET (VOIDmode,
00932   operand0,
00933   gen_rtx_SMAX (SFmode,
00934   operand1,
00935   operand2));
00936 }
00937 
00938 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2715 */
00939 rtx
00940 gen_divsf3_internal_lat (operand0, operand1, operand2)
00941      rtx operand0;
00942      rtx operand1;
00943      rtx operand2;
00944 {
00945   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (4,
00946     gen_rtx_SET (VOIDmode,
00947   operand0,
00948   gen_rtx_DIV (SFmode,
00949   operand1,
00950   operand2)),
00951     gen_rtx_CLOBBER (VOIDmode,
00952   gen_rtx_SCRATCH (TFmode)),
00953     gen_rtx_CLOBBER (VOIDmode,
00954   gen_rtx_SCRATCH (TFmode)),
00955     gen_rtx_CLOBBER (VOIDmode,
00956   gen_rtx_SCRATCH (BImode))));
00957 }
00958 
00959 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2772 */
00960 rtx
00961 gen_divsf3_internal_thr (operand0, operand1, operand2)
00962      rtx operand0;
00963      rtx operand1;
00964      rtx operand2;
00965 {
00966   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (4,
00967     gen_rtx_SET (VOIDmode,
00968   operand0,
00969   gen_rtx_DIV (SFmode,
00970   operand1,
00971   operand2)),
00972     gen_rtx_CLOBBER (VOIDmode,
00973   gen_rtx_SCRATCH (TFmode)),
00974     gen_rtx_CLOBBER (VOIDmode,
00975   gen_rtx_SCRATCH (TFmode)),
00976     gen_rtx_CLOBBER (VOIDmode,
00977   gen_rtx_SCRATCH (BImode))));
00978 }
00979 
00980 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2832 */
00981 rtx
00982 gen_adddf3 (operand0, operand1, operand2)
00983      rtx operand0;
00984      rtx operand1;
00985      rtx operand2;
00986 {
00987   return gen_rtx_SET (VOIDmode,
00988   operand0,
00989   gen_rtx_PLUS (DFmode,
00990   operand1,
00991   operand2));
00992 }
00993 
00994 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2849 */
00995 rtx
00996 gen_subdf3 (operand0, operand1, operand2)
00997      rtx operand0;
00998      rtx operand1;
00999      rtx operand2;
01000 {
01001   return gen_rtx_SET (VOIDmode,
01002   operand0,
01003   gen_rtx_MINUS (DFmode,
01004   operand1,
01005   operand2));
01006 }
01007 
01008 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2866 */
01009 rtx
01010 gen_muldf3 (operand0, operand1, operand2)
01011      rtx operand0;
01012      rtx operand1;
01013      rtx operand2;
01014 {
01015   return gen_rtx_SET (VOIDmode,
01016   operand0,
01017   gen_rtx_MULT (DFmode,
01018   operand1,
01019   operand2));
01020 }
01021 
01022 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2883 */
01023 rtx
01024 gen_absdf2 (operand0, operand1)
01025      rtx operand0;
01026      rtx operand1;
01027 {
01028   return gen_rtx_SET (VOIDmode,
01029   operand0,
01030   gen_rtx_ABS (DFmode,
01031   operand1));
01032 }
01033 
01034 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2890 */
01035 rtx
01036 gen_negdf2 (operand0, operand1)
01037      rtx operand0;
01038      rtx operand1;
01039 {
01040   return gen_rtx_SET (VOIDmode,
01041   operand0,
01042   gen_rtx_NEG (DFmode,
01043   operand1));
01044 }
01045 
01046 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2904 */
01047 rtx
01048 gen_mindf3 (operand0, operand1, operand2)
01049      rtx operand0;
01050      rtx operand1;
01051      rtx operand2;
01052 {
01053   return gen_rtx_SET (VOIDmode,
01054   operand0,
01055   gen_rtx_SMIN (DFmode,
01056   operand1,
01057   operand2));
01058 }
01059 
01060 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2912 */
01061 rtx
01062 gen_maxdf3 (operand0, operand1, operand2)
01063      rtx operand0;
01064      rtx operand1;
01065      rtx operand2;
01066 {
01067   return gen_rtx_SET (VOIDmode,
01068   operand0,
01069   gen_rtx_SMAX (DFmode,
01070   operand1,
01071   operand2));
01072 }
01073 
01074 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3024 */
01075 rtx
01076 gen_divdf3_internal_lat (operand0, operand1, operand2)
01077      rtx operand0;
01078      rtx operand1;
01079      rtx operand2;
01080 {
01081   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (5,
01082     gen_rtx_SET (VOIDmode,
01083   operand0,
01084   gen_rtx_DIV (DFmode,
01085   operand1,
01086   operand2)),
01087     gen_rtx_CLOBBER (VOIDmode,
01088   gen_rtx_SCRATCH (TFmode)),
01089     gen_rtx_CLOBBER (VOIDmode,
01090   gen_rtx_SCRATCH (TFmode)),
01091     gen_rtx_CLOBBER (VOIDmode,
01092   gen_rtx_SCRATCH (TFmode)),
01093     gen_rtx_CLOBBER (VOIDmode,
01094   gen_rtx_SCRATCH (BImode))));
01095 }
01096 
01097 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3105 */
01098 rtx
01099 gen_divdf3_internal_thr (operand0, operand1, operand2)
01100      rtx operand0;
01101      rtx operand1;
01102      rtx operand2;
01103 {
01104   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (4,
01105     gen_rtx_SET (VOIDmode,
01106   operand0,
01107   gen_rtx_DIV (DFmode,
01108   operand1,
01109   operand2)),
01110     gen_rtx_CLOBBER (VOIDmode,
01111   gen_rtx_SCRATCH (TFmode)),
01112     gen_rtx_CLOBBER (VOIDmode,
01113   gen_rtx_SCRATCH (DFmode)),
01114     gen_rtx_CLOBBER (VOIDmode,
01115   gen_rtx_SCRATCH (BImode))));
01116 }
01117 
01118 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3177 */
01119 rtx
01120 gen_addtf3 (operand0, operand1, operand2)
01121      rtx operand0;
01122      rtx operand1;
01123      rtx operand2;
01124 {
01125   return gen_rtx_SET (VOIDmode,
01126   operand0,
01127   gen_rtx_PLUS (TFmode,
01128   operand1,
01129   operand2));
01130 }
01131 
01132 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3203 */
01133 rtx
01134 gen_subtf3 (operand0, operand1, operand2)
01135      rtx operand0;
01136      rtx operand1;
01137      rtx operand2;
01138 {
01139   return gen_rtx_SET (VOIDmode,
01140   operand0,
01141   gen_rtx_MINUS (TFmode,
01142   operand1,
01143   operand2));
01144 }
01145 
01146 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3229 */
01147 rtx
01148 gen_multf3 (operand0, operand1, operand2)
01149      rtx operand0;
01150      rtx operand1;
01151      rtx operand2;
01152 {
01153   return gen_rtx_SET (VOIDmode,
01154   operand0,
01155   gen_rtx_MULT (TFmode,
01156   operand1,
01157   operand2));
01158 }
01159 
01160 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3284 */
01161 rtx
01162 gen_abstf2 (operand0, operand1)
01163      rtx operand0;
01164      rtx operand1;
01165 {
01166   return gen_rtx_SET (VOIDmode,
01167   operand0,
01168   gen_rtx_ABS (TFmode,
01169   operand1));
01170 }
01171 
01172 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3291 */
01173 rtx
01174 gen_negtf2 (operand0, operand1)
01175      rtx operand0;
01176      rtx operand1;
01177 {
01178   return gen_rtx_SET (VOIDmode,
01179   operand0,
01180   gen_rtx_NEG (TFmode,
01181   operand1));
01182 }
01183 
01184 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3305 */
01185 rtx
01186 gen_mintf3 (operand0, operand1, operand2)
01187      rtx operand0;
01188      rtx operand1;
01189      rtx operand2;
01190 {
01191   return gen_rtx_SET (VOIDmode,
01192   operand0,
01193   gen_rtx_SMIN (TFmode,
01194   operand1,
01195   operand2));
01196 }
01197 
01198 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3313 */
01199 rtx
01200 gen_maxtf3 (operand0, operand1, operand2)
01201      rtx operand0;
01202      rtx operand1;
01203      rtx operand2;
01204 {
01205   return gen_rtx_SET (VOIDmode,
01206   operand0,
01207   gen_rtx_SMAX (TFmode,
01208   operand1,
01209   operand2));
01210 }
01211 
01212 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3501 */
01213 rtx
01214 gen_divtf3_internal_lat (operand0, operand1, operand2)
01215      rtx operand0;
01216      rtx operand1;
01217      rtx operand2;
01218 {
01219   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (6,
01220     gen_rtx_SET (VOIDmode,
01221   operand0,
01222   gen_rtx_DIV (TFmode,
01223   operand1,
01224   operand2)),
01225     gen_rtx_CLOBBER (VOIDmode,
01226   gen_rtx_SCRATCH (TFmode)),
01227     gen_rtx_CLOBBER (VOIDmode,
01228   gen_rtx_SCRATCH (TFmode)),
01229     gen_rtx_CLOBBER (VOIDmode,
01230   gen_rtx_SCRATCH (TFmode)),
01231     gen_rtx_CLOBBER (VOIDmode,
01232   gen_rtx_SCRATCH (TFmode)),
01233     gen_rtx_CLOBBER (VOIDmode,
01234   gen_rtx_SCRATCH (BImode))));
01235 }
01236 
01237 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3581 */
01238 rtx
01239 gen_divtf3_internal_thr (operand0, operand1, operand2)
01240      rtx operand0;
01241      rtx operand1;
01242      rtx operand2;
01243 {
01244   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (4,
01245     gen_rtx_SET (VOIDmode,
01246   operand0,
01247   gen_rtx_DIV (TFmode,
01248   operand1,
01249   operand2)),
01250     gen_rtx_CLOBBER (VOIDmode,
01251   gen_rtx_SCRATCH (TFmode)),
01252     gen_rtx_CLOBBER (VOIDmode,
01253   gen_rtx_SCRATCH (TFmode)),
01254     gen_rtx_CLOBBER (VOIDmode,
01255   gen_rtx_SCRATCH (BImode))));
01256 }
01257 
01258 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3819 */
01259 rtx
01260 gen_ashldi3 (operand0, operand1, operand2)
01261      rtx operand0;
01262      rtx operand1;
01263      rtx operand2;
01264 {
01265   return gen_rtx_SET (VOIDmode,
01266   operand0,
01267   gen_rtx_ASHIFT (DImode,
01268   operand1,
01269   operand2));
01270 }
01271 
01272 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3864 */
01273 rtx
01274 gen_ashrdi3 (operand0, operand1, operand2)
01275      rtx operand0;
01276      rtx operand1;
01277      rtx operand2;
01278 {
01279   return gen_rtx_SET (VOIDmode,
01280   operand0,
01281   gen_rtx_ASHIFTRT (DImode,
01282   operand1,
01283   operand2));
01284 }
01285 
01286 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3874 */
01287 rtx
01288 gen_lshrdi3 (operand0, operand1, operand2)
01289      rtx operand0;
01290      rtx operand1;
01291      rtx operand2;
01292 {
01293   return gen_rtx_SET (VOIDmode,
01294   operand0,
01295   gen_rtx_LSHIFTRT (DImode,
01296   operand1,
01297   operand2));
01298 }
01299 
01300 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3945 */
01301 rtx
01302 gen_one_cmplsi2 (operand0, operand1)
01303      rtx operand0;
01304      rtx operand1;
01305 {
01306   return gen_rtx_SET (VOIDmode,
01307   operand0,
01308   gen_rtx_NOT (SImode,
01309   operand1));
01310 }
01311 
01312 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3958 */
01313 rtx
01314 gen_anddi3 (operand0, operand1, operand2)
01315      rtx operand0;
01316      rtx operand1;
01317      rtx operand2;
01318 {
01319   return gen_rtx_SET (VOIDmode,
01320   operand0,
01321   gen_rtx_AND (DImode,
01322   operand1,
01323   operand2));
01324 }
01325 
01326 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3978 */
01327 rtx
01328 gen_iordi3 (operand0, operand1, operand2)
01329      rtx operand0;
01330      rtx operand1;
01331      rtx operand2;
01332 {
01333   return gen_rtx_SET (VOIDmode,
01334   operand0,
01335   gen_rtx_IOR (DImode,
01336   operand1,
01337   operand2));
01338 }
01339 
01340 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3988 */
01341 rtx
01342 gen_xordi3 (operand0, operand1, operand2)
01343      rtx operand0;
01344      rtx operand1;
01345      rtx operand2;
01346 {
01347   return gen_rtx_SET (VOIDmode,
01348   operand0,
01349   gen_rtx_XOR (DImode,
01350   operand1,
01351   operand2));
01352 }
01353 
01354 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3998 */
01355 rtx
01356 gen_one_cmpldi2 (operand0, operand1)
01357      rtx operand0;
01358      rtx operand1;
01359 {
01360   return gen_rtx_SET (VOIDmode,
01361   operand0,
01362   gen_rtx_NOT (DImode,
01363   operand1));
01364 }
01365 
01366 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4316 */
01367 rtx
01368 gen_doloop_end_internal (operand0, operand1)
01369      rtx operand0;
01370      rtx operand1;
01371 {
01372   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
01373     gen_rtx_SET (VOIDmode,
01374   pc_rtx,
01375   gen_rtx_IF_THEN_ELSE (VOIDmode,
01376   gen_rtx_NE (VOIDmode,
01377   operand0,
01378   const0_rtx),
01379   gen_rtx_LABEL_REF (VOIDmode,
01380   operand1),
01381   pc_rtx)),
01382     gen_rtx_SET (VOIDmode,
01383   operand0,
01384   gen_rtx_IF_THEN_ELSE (DImode,
01385   gen_rtx_NE (VOIDmode,
01386   operand0,
01387   const0_rtx),
01388   gen_rtx_PLUS (DImode,
01389   operand0,
01390   constm1_rtx),
01391   operand0))));
01392 }
01393 
01394 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4760 */
01395 rtx
01396 gen_call_nogp (operand0, operand1)
01397      rtx operand0;
01398      rtx operand1;
01399 {
01400   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
01401     gen_rtx_CALL (VOIDmode,
01402   gen_rtx_MEM (DImode,
01403   operand0),
01404   const0_rtx),
01405     gen_rtx_CLOBBER (VOIDmode,
01406   operand1)));
01407 }
01408 
01409 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4768 */
01410 rtx
01411 gen_call_value_nogp (operand0, operand1, operand2)
01412      rtx operand0;
01413      rtx operand1;
01414      rtx operand2;
01415 {
01416   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
01417     gen_rtx_SET (VOIDmode,
01418   operand0,
01419   gen_rtx_CALL (VOIDmode,
01420   gen_rtx_MEM (DImode,
01421   operand1),
01422   const0_rtx)),
01423     gen_rtx_CLOBBER (VOIDmode,
01424   operand2)));
01425 }
01426 
01427 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4777 */
01428 rtx
01429 gen_sibcall_nogp (operand0)
01430      rtx operand0;
01431 {
01432   return gen_rtx_CALL (VOIDmode,
01433   gen_rtx_MEM (DImode,
01434   operand0),
01435   const0_rtx);
01436 }
01437 
01438 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4784 */
01439 rtx
01440 gen_call_gp (operand0, operand1)
01441      rtx operand0;
01442      rtx operand1;
01443 {
01444   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (4,
01445     gen_rtx_CALL (VOIDmode,
01446   gen_rtx_MEM (VOIDmode,
01447   operand0),
01448   const1_rtx),
01449     gen_rtx_CLOBBER (VOIDmode,
01450   operand1),
01451     gen_rtx_CLOBBER (VOIDmode,
01452   gen_rtx_SCRATCH (DImode)),
01453     gen_rtx_CLOBBER (VOIDmode,
01454   gen_rtx_SCRATCH (DImode))));
01455 }
01456 
01457 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4824 */
01458 rtx
01459 gen_call_value_gp (operand0, operand1, operand2)
01460      rtx operand0;
01461      rtx operand1;
01462      rtx operand2;
01463 {
01464   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (4,
01465     gen_rtx_SET (VOIDmode,
01466   operand0,
01467   gen_rtx_CALL (VOIDmode,
01468   gen_rtx_MEM (DImode,
01469   operand1),
01470   const1_rtx)),
01471     gen_rtx_CLOBBER (VOIDmode,
01472   operand2),
01473     gen_rtx_CLOBBER (VOIDmode,
01474   gen_rtx_SCRATCH (DImode)),
01475     gen_rtx_CLOBBER (VOIDmode,
01476   gen_rtx_SCRATCH (DImode))));
01477 }
01478 
01479 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4865 */
01480 rtx
01481 gen_sibcall_gp (operand0)
01482      rtx operand0;
01483 {
01484   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3,
01485     gen_rtx_CALL (VOIDmode,
01486   gen_rtx_MEM (DImode,
01487   operand0),
01488   const1_rtx),
01489     gen_rtx_CLOBBER (VOIDmode,
01490   gen_rtx_SCRATCH (DImode)),
01491     gen_rtx_CLOBBER (VOIDmode,
01492   gen_rtx_SCRATCH (DImode))));
01493 }
01494 
01495 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4881 */
01496 rtx
01497 gen_return_internal (operand0)
01498      rtx operand0;
01499 {
01500   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
01501     gen_rtx_RETURN (VOIDmode),
01502     gen_rtx_USE (VOIDmode,
01503   operand0)));
01504 }
01505 
01506 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4888 */
01507 rtx
01508 gen_return ()
01509 {
01510   return gen_rtx_RETURN (VOIDmode);
01511 }
01512 
01513 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4918 */
01514 rtx
01515 gen_jump (operand0)
01516      rtx operand0;
01517 {
01518   return gen_rtx_SET (VOIDmode,
01519   pc_rtx,
01520   gen_rtx_LABEL_REF (VOIDmode,
01521   operand0));
01522 }
01523 
01524 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4924 */
01525 rtx
01526 gen_indirect_jump (operand0)
01527      rtx operand0;
01528 {
01529   return gen_rtx_SET (VOIDmode,
01530   pc_rtx,
01531   operand0);
01532 }
01533 
01534 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5013 */
01535 rtx
01536 gen_prologue_allocate_stack (operand0, operand1, operand2, operand3)
01537      rtx operand0;
01538      rtx operand1;
01539      rtx operand2;
01540      rtx operand3;
01541 {
01542   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
01543     gen_rtx_SET (VOIDmode,
01544   operand0,
01545   gen_rtx_PLUS (DImode,
01546   operand1,
01547   operand2)),
01548     gen_rtx_SET (VOIDmode,
01549   operand3,
01550   operand3)));
01551 }
01552 
01553 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5029 */
01554 rtx
01555 gen_epilogue_deallocate_stack (operand0, operand1)
01556      rtx operand0;
01557      rtx operand1;
01558 {
01559   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
01560     gen_rtx_SET (VOIDmode,
01561   operand0,
01562   operand1),
01563     gen_rtx_SET (VOIDmode,
01564   operand1,
01565   operand1)));
01566 }
01567 
01568 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5039 */
01569 rtx
01570 gen_prologue_use (operand0)
01571      rtx operand0;
01572 {
01573   return gen_rtx_UNSPEC (DImode,
01574   gen_rtvec (1,
01575     operand0),
01576   25);
01577 }
01578 
01579 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5049 */
01580 rtx
01581 gen_alloc (operand0, operand1, operand2, operand3, operand4)
01582      rtx operand0;
01583      rtx operand1;
01584      rtx operand2;
01585      rtx operand3;
01586      rtx operand4;
01587 {
01588   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (5,
01589     gen_rtx_SET (VOIDmode,
01590   operand0,
01591   gen_rtx_UNSPEC_VOLATILE (DImode,
01592   gen_rtvec (1,
01593     const0_rtx),
01594   0)),
01595     gen_rtx_USE (VOIDmode,
01596   operand1),
01597     gen_rtx_USE (VOIDmode,
01598   operand2),
01599     gen_rtx_USE (VOIDmode,
01600   operand3),
01601     gen_rtx_USE (VOIDmode,
01602   operand4)));
01603 }
01604 
01605 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5071 */
01606 rtx
01607 gen_gr_spill_internal (operand0, operand1, operand2, operand3)
01608      rtx operand0;
01609      rtx operand1;
01610      rtx operand2;
01611      rtx operand3;
01612 {
01613   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
01614     gen_rtx_SET (VOIDmode,
01615   operand0,
01616   gen_rtx_UNSPEC (DImode,
01617   gen_rtvec (2,
01618     operand1,
01619     operand2),
01620   10)),
01621     gen_rtx_CLOBBER (VOIDmode,
01622   operand3)));
01623 }
01624 
01625 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5095 */
01626 rtx
01627 gen_gr_restore_internal (operand0, operand1, operand2, operand3)
01628      rtx operand0;
01629      rtx operand1;
01630      rtx operand2;
01631      rtx operand3;
01632 {
01633   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
01634     gen_rtx_SET (VOIDmode,
01635   operand0,
01636   gen_rtx_UNSPEC (DImode,
01637   gen_rtvec (2,
01638     operand1,
01639     operand2),
01640   11)),
01641     gen_rtx_USE (VOIDmode,
01642   operand3)));
01643 }
01644 
01645 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5105 */
01646 rtx
01647 gen_fr_spill (operand0, operand1)
01648      rtx operand0;
01649      rtx operand1;
01650 {
01651   return gen_rtx_SET (VOIDmode,
01652   operand0,
01653   gen_rtx_UNSPEC (TFmode,
01654   gen_rtvec (1,
01655     operand1),
01656   12));
01657 }
01658 
01659 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5113 */
01660 rtx
01661 gen_fr_restore (operand0, operand1)
01662      rtx operand0;
01663      rtx operand1;
01664 {
01665   return gen_rtx_SET (VOIDmode,
01666   operand0,
01667   gen_rtx_UNSPEC (TFmode,
01668   gen_rtvec (1,
01669     operand1),
01670   13));
01671 }
01672 
01673 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5125 */
01674 rtx
01675 gen_bsp_value (operand0)
01676      rtx operand0;
01677 {
01678   return gen_rtx_SET (VOIDmode,
01679   operand0,
01680   gen_rtx_UNSPEC (DImode,
01681   gen_rtvec (1,
01682     const0_rtx),
01683   21));
01684 }
01685 
01686 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5135 */
01687 rtx
01688 gen_set_bsp (operand0)
01689      rtx operand0;
01690 {
01691   return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
01692   gen_rtvec (1,
01693     operand0),
01694   4);
01695 }
01696 
01697 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5161 */
01698 rtx
01699 gen_flushrs ()
01700 {
01701   return gen_rtx_UNSPEC (VOIDmode,
01702   gen_rtvec (1,
01703     const0_rtx),
01704   22);
01705 }
01706 
01707 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5178 */
01708 rtx
01709 gen_nop ()
01710 {
01711   return const0_rtx;
01712 }
01713 
01714 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5184 */
01715 rtx
01716 gen_nop_m ()
01717 {
01718   return const1_rtx;
01719 }
01720 
01721 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5190 */
01722 rtx
01723 gen_nop_i ()
01724 {
01725   return GEN_INT (2L);
01726 }
01727 
01728 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5196 */
01729 rtx
01730 gen_nop_f ()
01731 {
01732   return GEN_INT (3L);
01733 }
01734 
01735 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5202 */
01736 rtx
01737 gen_nop_b ()
01738 {
01739   return GEN_INT (4L);
01740 }
01741 
01742 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5208 */
01743 rtx
01744 gen_nop_x ()
01745 {
01746   return GEN_INT (5L);
01747 }
01748 
01749 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5214 */
01750 rtx
01751 gen_bundle_selector (operand0)
01752      rtx operand0;
01753 {
01754   return gen_rtx_UNSPEC (VOIDmode,
01755   gen_rtvec (1,
01756     operand0),
01757   23);
01758 }
01759 
01760 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5223 */
01761 rtx
01762 gen_blockage ()
01763 {
01764   return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
01765   gen_rtvec (1,
01766     const0_rtx),
01767   1);
01768 }
01769 
01770 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5230 */
01771 rtx
01772 gen_insn_group_barrier (operand0)
01773      rtx operand0;
01774 {
01775   return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
01776   gen_rtvec (1,
01777     operand0),
01778   2);
01779 }
01780 
01781 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5269 */
01782 rtx
01783 gen_break_f ()
01784 {
01785   return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
01786   gen_rtvec (1,
01787     const0_rtx),
01788   3);
01789 }
01790 
01791 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5275 */
01792 rtx
01793 gen_prefetch (operand0, operand1, operand2)
01794      rtx operand0;
01795      rtx operand1;
01796      rtx operand2;
01797 {
01798   return gen_rtx_PREFETCH (VOIDmode,
01799   operand0,
01800   operand1,
01801   operand2);
01802 }
01803 
01804 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5336 */
01805 rtx
01806 gen_builtin_setjmp_receiver (operand0)
01807      rtx operand0;
01808 {
01809   return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
01810   gen_rtvec (1,
01811     operand0),
01812   7);
01813 }
01814 
01815 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5406 */
01816 rtx
01817 gen_fetchadd_acq_si (operand0, operand1, operand2)
01818      rtx operand0;
01819      rtx operand1;
01820      rtx operand2;
01821 {
01822   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
01823     gen_rtx_SET (VOIDmode,
01824   operand0,
01825   operand1),
01826     gen_rtx_SET (VOIDmode,
01827   operand1,
01828   gen_rtx_UNSPEC (SImode,
01829   gen_rtvec (2,
01830     operand1,
01831     operand2),
01832   20))));
01833 }
01834 
01835 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5417 */
01836 rtx
01837 gen_fetchadd_acq_di (operand0, operand1, operand2)
01838      rtx operand0;
01839      rtx operand1;
01840      rtx operand2;
01841 {
01842   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
01843     gen_rtx_SET (VOIDmode,
01844   operand0,
01845   operand1),
01846     gen_rtx_SET (VOIDmode,
01847   operand1,
01848   gen_rtx_UNSPEC (DImode,
01849   gen_rtvec (2,
01850     operand1,
01851     operand2),
01852   20))));
01853 }
01854 
01855 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5428 */
01856 rtx
01857 gen_cmpxchg_acq_si (operand0, operand1, operand2, operand3)
01858      rtx operand0;
01859      rtx operand1;
01860      rtx operand2;
01861      rtx operand3;
01862 {
01863   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
01864     gen_rtx_SET (VOIDmode,
01865   operand0,
01866   operand1),
01867     gen_rtx_SET (VOIDmode,
01868   operand1,
01869   gen_rtx_UNSPEC (SImode,
01870   gen_rtvec (3,
01871     operand1,
01872     operand2,
01873     operand3),
01874   19))));
01875 }
01876 
01877 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5440 */
01878 rtx
01879 gen_cmpxchg_acq_di (operand0, operand1, operand2, operand3)
01880      rtx operand0;
01881      rtx operand1;
01882      rtx operand2;
01883      rtx operand3;
01884 {
01885   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
01886     gen_rtx_SET (VOIDmode,
01887   operand0,
01888   operand1),
01889     gen_rtx_SET (VOIDmode,
01890   operand1,
01891   gen_rtx_UNSPEC (DImode,
01892   gen_rtvec (3,
01893     operand1,
01894     operand2,
01895     operand3),
01896   19))));
01897 }
01898 
01899 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5452 */
01900 rtx
01901 gen_xchgsi (operand0, operand1, operand2)
01902      rtx operand0;
01903      rtx operand1;
01904      rtx operand2;
01905 {
01906   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
01907     gen_rtx_SET (VOIDmode,
01908   operand0,
01909   operand1),
01910     gen_rtx_SET (VOIDmode,
01911   operand1,
01912   operand2)));
01913 }
01914 
01915 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5461 */
01916 rtx
01917 gen_xchgdi (operand0, operand1, operand2)
01918      rtx operand0;
01919      rtx operand1;
01920      rtx operand2;
01921 {
01922   return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
01923     gen_rtx_SET (VOIDmode,
01924   operand0,
01925   operand1),
01926     gen_rtx_SET (VOIDmode,
01927   operand1,
01928   operand2)));
01929 }
01930 
01931 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5479 */
01932 rtx
01933 gen_pred_rel_mutex (operand0)
01934      rtx operand0;
01935 {
01936   return gen_rtx_SET (VOIDmode,
01937   operand0,
01938   gen_rtx_UNSPEC (BImode,
01939   gen_rtvec (1,
01940     operand0),
01941   15));
01942 }
01943 
01944 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5487 */
01945 rtx
01946 gen_safe_across_calls_all ()
01947 {
01948   return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
01949   gen_rtvec (1,
01950     const0_rtx),
01951   5);
01952 }
01953 
01954 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5494 */
01955 rtx
01956 gen_safe_across_calls_normal ()
01957 {
01958   return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
01959   gen_rtvec (1,
01960     const0_rtx),
01961   6);
01962 }
01963 
01964 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5507 */
01965 rtx
01966 gen_ptr_extend (operand0, operand1)
01967      rtx operand0;
01968      rtx operand1;
01969 {
01970   return gen_rtx_SET (VOIDmode,
01971   operand0,
01972   gen_rtx_UNSPEC (DImode,
01973   gen_rtvec (1,
01974     operand1),
01975   24));
01976 }
01977 
01978 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:257 */
01979 extern rtx gen_split_276 PARAMS ((rtx *));
01980 rtx
01981 gen_split_276 (operands)
01982       rtx *operands;
01983 {
01984   rtx operand0;
01985   rtx operand1;
01986   rtx _val = 0;
01987   start_sequence ();
01988 
01989   operand0 = operands[0];
01990   operand1 = operands[1];
01991   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
01992   gen_rtx_NE (VOIDmode,
01993   operand1,
01994   const0_rtx),
01995   gen_rtx_SET (VOIDmode,
01996   operand0,
01997   const1_rtx)));
01998   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
01999   gen_rtx_EQ (VOIDmode,
02000   copy_rtx (operand1),
02001   const0_rtx),
02002   gen_rtx_SET (VOIDmode,
02003   copy_rtx (operand0),
02004   const0_rtx)));
02005   _val = get_insns ();
02006   end_sequence ();
02007   return _val;
02008 }
02009 
02010 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:269 */
02011 extern rtx gen_split_277 PARAMS ((rtx *));
02012 rtx
02013 gen_split_277 (operands)
02014       rtx *operands;
02015 {
02016   rtx operand0;
02017   rtx operand1;
02018   rtx operand2;
02019   rtx operand3;
02020   rtx operand4;
02021   rtx operand5;
02022   rtx _val = 0;
02023   start_sequence ();
02024 operands[2] = gen_rtx_REG (CCImode, REGNO (operands[0]));
02025    operands[3] = gen_rtx_REG (CCImode, REGNO (operands[0]) + 1);
02026    operands[4] = gen_rtx_REG (CCImode, REGNO (operands[1]));
02027    operands[5] = gen_rtx_REG (CCImode, REGNO (operands[1]) + 1);
02028   operand0 = operands[0];
02029   operand1 = operands[1];
02030   operand2 = operands[2];
02031   operand3 = operands[3];
02032   operand4 = operands[4];
02033   operand5 = operands[5];
02034   emit_insn (gen_rtx_SET (VOIDmode,
02035   operand2,
02036   operand4));
02037   emit_insn (gen_rtx_SET (VOIDmode,
02038   operand3,
02039   operand5));
02040   emit_insn (gen_rtx_SET (VOIDmode,
02041   operand0,
02042   gen_rtx_UNSPEC (BImode,
02043   gen_rtvec (1,
02044     copy_rtx (operand0)),
02045   15)));
02046   _val = get_insns ();
02047   end_sequence ();
02048   return _val;
02049 }
02050 
02051 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:283 */
02052 rtx
02053 gen_movqi (operand0, operand1)
02054      rtx operand0;
02055      rtx operand1;
02056 {
02057   rtx _val = 0;
02058   start_sequence ();
02059   {
02060     rtx operands[2];
02061     operands[0] = operand0;
02062     operands[1] = operand1;
02063 {
02064   rtx op1 = ia64_expand_move (operands[0], operands[1]);
02065   if (!op1)
02066     DONE;
02067   operands[1] = op1;
02068 }
02069     operand0 = operands[0];
02070     operand1 = operands[1];
02071   }
02072   emit_insn (gen_rtx_SET (VOIDmode,
02073   operand0,
02074   operand1));
02075   _val = get_insns ();
02076   end_sequence ();
02077   return _val;
02078 }
02079 
02080 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:308 */
02081 rtx
02082 gen_movhi (operand0, operand1)
02083      rtx operand0;
02084      rtx operand1;
02085 {
02086   rtx _val = 0;
02087   start_sequence ();
02088   {
02089     rtx operands[2];
02090     operands[0] = operand0;
02091     operands[1] = operand1;
02092 {
02093   rtx op1 = ia64_expand_move (operands[0], operands[1]);
02094   if (!op1)
02095     DONE;
02096   operands[1] = op1;
02097 }
02098     operand0 = operands[0];
02099     operand1 = operands[1];
02100   }
02101   emit_insn (gen_rtx_SET (VOIDmode,
02102   operand0,
02103   operand1));
02104   _val = get_insns ();
02105   end_sequence ();
02106   return _val;
02107 }
02108 
02109 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:333 */
02110 rtx
02111 gen_movsi (operand0, operand1)
02112      rtx operand0;
02113      rtx operand1;
02114 {
02115   rtx _val = 0;
02116   start_sequence ();
02117   {
02118     rtx operands[2];
02119     operands[0] = operand0;
02120     operands[1] = operand1;
02121 {
02122   rtx op1 = ia64_expand_move (operands[0], operands[1]);
02123   if (!op1)
02124     DONE;
02125   operands[1] = op1;
02126 }
02127     operand0 = operands[0];
02128     operand1 = operands[1];
02129   }
02130   emit_insn (gen_rtx_SET (VOIDmode,
02131   operand0,
02132   operand1));
02133   _val = get_insns ();
02134   end_sequence ();
02135   return _val;
02136 }
02137 
02138 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:350 */
02139 extern rtx gen_split_281 PARAMS ((rtx *));
02140 rtx
02141 gen_split_281 (operands)
02142       rtx *operands ATTRIBUTE_UNUSED;
02143 {
02144   rtx _val = 0;
02145   start_sequence ();
02146 {
02147   rtx scratch = operands[2];
02148   if (!reload_completed)
02149     scratch = gen_reg_rtx (Pmode);
02150   ia64_expand_load_address (operands[0], operands[1], scratch); 
02151   DONE;
02152 }
02153   emit_insn (const0_rtx);
02154   _val = get_insns ();
02155   end_sequence ();
02156   return _val;
02157 }
02158 
02159 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:385 */
02160 rtx
02161 gen_movdi (operand0, operand1)
02162      rtx operand0;
02163      rtx operand1;
02164 {
02165   rtx _val = 0;
02166   start_sequence ();
02167   {
02168     rtx operands[2];
02169     operands[0] = operand0;
02170     operands[1] = operand1;
02171 {
02172   rtx op1 = ia64_expand_move (operands[0], operands[1]);
02173   if (!op1)
02174     DONE;
02175   operands[1] = op1;
02176 }
02177     operand0 = operands[0];
02178     operand1 = operands[1];
02179   }
02180   emit_insn (gen_rtx_SET (VOIDmode,
02181   operand0,
02182   operand1));
02183   _val = get_insns ();
02184   end_sequence ();
02185   return _val;
02186 }
02187 
02188 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:402 */
02189 extern rtx gen_split_283 PARAMS ((rtx *));
02190 rtx
02191 gen_split_283 (operands)
02192       rtx *operands ATTRIBUTE_UNUSED;
02193 {
02194   rtx _val = 0;
02195   start_sequence ();
02196 {
02197   rtx scratch = operands[2];
02198   if (!reload_completed)
02199     scratch = gen_reg_rtx (Pmode);
02200   ia64_expand_load_address (operands[0], operands[1], scratch); 
02201   DONE;
02202 }
02203   emit_insn (const0_rtx);
02204   _val = get_insns ();
02205   end_sequence ();
02206   return _val;
02207 }
02208 
02209 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:455 */
02210 extern rtx gen_split_284 PARAMS ((rtx *));
02211 rtx
02212 gen_split_284 (operands)
02213       rtx *operands ATTRIBUTE_UNUSED;
02214 {
02215   rtx _val = 0;
02216   start_sequence ();
02217 {
02218   ia64_expand_load_address (operands[0], operands[1], NULL_RTX);
02219   DONE;
02220 }
02221   emit_insn (const0_rtx);
02222   _val = get_insns ();
02223   end_sequence ();
02224   return _val;
02225 }
02226 
02227 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:465 */
02228 rtx
02229 gen_load_fptr (operand0, operand1)
02230      rtx operand0;
02231      rtx operand1;
02232 {
02233   rtx operand2;
02234   rtx operand3;
02235   rtx _val = 0;
02236   start_sequence ();
02237   {
02238     rtx operands[4];
02239     operands[0] = operand0;
02240     operands[1] = operand1;
02241 {
02242   operands[2] = no_new_pseudos ? operands[0] : gen_reg_rtx (DImode);
02243   operands[3] = gen_rtx_MEM (DImode, operands[2]);
02244   RTX_UNCHANGING_P (operands[3]) = 1;
02245 }
02246     operand0 = operands[0];
02247     operand1 = operands[1];
02248     operand2 = operands[2];
02249     operand3 = operands[3];
02250   }
02251   emit_insn (gen_rtx_SET (VOIDmode,
02252   operand2,
02253   gen_rtx_PLUS (DImode,
02254   gen_rtx_REG (DImode,
02255   1),
02256   operand1)));
02257   emit_insn (gen_rtx_SET (VOIDmode,
02258   operand0,
02259   operand3));
02260   _val = get_insns ();
02261   end_sequence ();
02262   return _val;
02263 }
02264 
02265 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:497 */
02266 rtx
02267 gen_load_gprel64 (operand0, operand1)
02268      rtx operand0;
02269      rtx operand1;
02270 {
02271   rtx operand2;
02272   rtx operand3;
02273   rtx _val = 0;
02274   start_sequence ();
02275   {
02276     rtx operands[4];
02277     operands[0] = operand0;
02278     operands[1] = operand1;
02279 {
02280   operands[2] = no_new_pseudos ? operands[0] : gen_reg_rtx (DImode);
02281   operands[3] = pic_offset_table_rtx;
02282 }
02283     operand0 = operands[0];
02284     operand1 = operands[1];
02285     operand2 = operands[2];
02286     operand3 = operands[3];
02287   }
02288   emit_insn (gen_rtx_SET (VOIDmode,
02289   operand2,
02290   gen_rtx_MINUS (DImode,
02291   operand1,
02292   operand3)));
02293   emit_insn (gen_rtx_SET (VOIDmode,
02294   operand0,
02295   gen_rtx_PLUS (DImode,
02296   operand3,
02297   operand2)));
02298   _val = get_insns ();
02299   end_sequence ();
02300   return _val;
02301 }
02302 
02303 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:508 */
02304 rtx
02305 gen_load_symptr (operand0, operand1, operand2)
02306      rtx operand0;
02307      rtx operand1;
02308      rtx operand2;
02309 {
02310   rtx operand3;
02311   rtx _val = 0;
02312   start_sequence ();
02313   {
02314     rtx operands[4];
02315     operands[0] = operand0;
02316     operands[1] = operand1;
02317     operands[2] = operand2;
02318 {
02319   operands[3] = pic_offset_table_rtx;
02320 }
02321     operand0 = operands[0];
02322     operand1 = operands[1];
02323     operand2 = operands[2];
02324     operand3 = operands[3];
02325   }
02326   emit_insn (gen_rtx_SET (VOIDmode,
02327   operand2,
02328   gen_rtx_PLUS (DImode,
02329   gen_rtx_HIGH (DImode,
02330   operand1),
02331   operand3)));
02332   emit_insn (gen_rtx_SET (VOIDmode,
02333   operand0,
02334   gen_rtx_LO_SUM (DImode,
02335   operand2,
02336   operand1)));
02337   _val = get_insns ();
02338   end_sequence ();
02339   return _val;
02340 }
02341 
02342 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:563 */
02343 rtx
02344 gen_load_dtprel (operand0, operand1)
02345      rtx operand0;
02346      rtx operand1;
02347 {
02348   return gen_rtx_SET (VOIDmode,
02349   operand0,
02350   gen_rtx_UNSPEC (DImode,
02351   gen_rtvec (1,
02352     operand1),
02353   2));
02354 }
02355 
02356 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:586 */
02357 rtx
02358 gen_add_dtprel (operand0, operand1, operand2)
02359      rtx operand0;
02360      rtx operand1;
02361      rtx operand2;
02362 {
02363   return gen_rtx_SET (VOIDmode,
02364   operand0,
02365   gen_rtx_PLUS (DImode,
02366   operand1,
02367   gen_rtx_UNSPEC (DImode,
02368   gen_rtvec (1,
02369     operand2),
02370   2)));
02371 }
02372 
02373 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:621 */
02374 rtx
02375 gen_load_tprel (operand0, operand1)
02376      rtx operand0;
02377      rtx operand1;
02378 {
02379   return gen_rtx_SET (VOIDmode,
02380   operand0,
02381   gen_rtx_UNSPEC (DImode,
02382   gen_rtvec (1,
02383     operand1),
02384   4));
02385 }
02386 
02387 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:644 */
02388 rtx
02389 gen_add_tprel (operand0, operand1, operand2)
02390      rtx operand0;
02391      rtx operand1;
02392      rtx operand2;
02393 {
02394   return gen_rtx_SET (VOIDmode,
02395   operand0,
02396   gen_rtx_PLUS (DImode,
02397   operand1,
02398   gen_rtx_UNSPEC (DImode,
02399   gen_rtvec (1,
02400     operand2),
02401   4)));
02402 }
02403 
02404 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:672 */
02405 rtx
02406 gen_movti (operand0, operand1)
02407      rtx operand0;
02408      rtx operand1;
02409 {
02410   rtx operand2 ATTRIBUTE_UNUSED;
02411   rtx _val = 0;
02412   start_sequence ();
02413   {
02414     rtx operands[3];
02415     operands[0] = operand0;
02416     operands[1] = operand1;
02417 {
02418   rtx op1 = ia64_expand_move (operands[0], operands[1]);
02419   if (!op1)
02420     DONE;
02421   operands[1] = op1;
02422 }
02423     operand0 = operands[0];
02424     operand1 = operands[1];
02425     operand2 = operands[2];
02426   }
02427   emit (gen_rtx_PARALLEL (VOIDmode,
02428   gen_rtvec (2,
02429     gen_rtx_SET (VOIDmode,
02430   operand0,
02431   operand1),
02432     gen_rtx_CLOBBER (VOIDmode,
02433   gen_rtx_SCRATCH (DImode)))));
02434   _val = get_insns ();
02435   end_sequence ();
02436   return _val;
02437 }
02438 
02439 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:684 */
02440 extern rtx gen_split_293 PARAMS ((rtx *));
02441 rtx
02442 gen_split_293 (operands)
02443       rtx *operands ATTRIBUTE_UNUSED;
02444 {
02445   rtx _val = 0;
02446   start_sequence ();
02447 {
02448   rtx adj1, adj2, in[2], out[2], insn;
02449   int first;
02450 
02451   adj1 = ia64_split_timode (in, operands[1], operands[2]);
02452   adj2 = ia64_split_timode (out, operands[0], operands[2]);
02453 
02454   first = 0;
02455   if (reg_overlap_mentioned_p (out[0], in[1]))
02456     {
02457       if (reg_overlap_mentioned_p (out[1], in[0]))
02458   abort ();
02459       first = 1;
02460     }
02461 
02462   if (adj1 && adj2)
02463     abort ();
02464   if (adj1)
02465     emit_insn (adj1);
02466   if (adj2)
02467     emit_insn (adj2);
02468   insn = emit_insn (gen_rtx_SET (VOIDmode, out[first], in[first]));
02469   if (GET_CODE (out[first]) == MEM
02470       && GET_CODE (XEXP (out[first], 0)) == POST_MODIFY)
02471     REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_INC,
02472             XEXP (XEXP (out[first], 0), 0),
02473             REG_NOTES (insn));
02474   insn = emit_insn (gen_rtx_SET (VOIDmode, out[!first], in[!first]));
02475   if (GET_CODE (out[!first]) == MEM
02476       && GET_CODE (XEXP (out[!first], 0)) == POST_MODIFY)
02477     REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_INC,
02478             XEXP (XEXP (out[!first], 0), 0),
02479             REG_NOTES (insn));
02480   DONE;
02481 }
02482   emit_insn (const0_rtx);
02483   _val = get_insns ();
02484   end_sequence ();
02485   return _val;
02486 }
02487 
02488 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:733 */
02489 extern rtx gen_split_294 PARAMS ((rtx *));
02490 rtx
02491 gen_split_294 (operands)
02492       rtx *operands ATTRIBUTE_UNUSED;
02493 {
02494   rtx _val = 0;
02495   start_sequence ();
02496 {
02497   rtx in[2], out[2];
02498   int first;
02499 
02500   ia64_split_timode (in, operands[1], NULL_RTX);
02501   ia64_split_timode (out, operands[0], NULL_RTX);
02502 
02503   first = 0;
02504   if (reg_overlap_mentioned_p (out[0], in[1]))
02505     {
02506       if (reg_overlap_mentioned_p (out[1], in[0]))
02507   abort ();
02508       first = 1;
02509     }
02510 
02511   emit_insn (gen_rtx_SET (VOIDmode, out[first], in[first]));
02512   emit_insn (gen_rtx_SET (VOIDmode, out[!first], in[!first]));
02513   DONE;
02514 }
02515   emit_insn (const0_rtx);
02516   _val = get_insns ();
02517   end_sequence ();
02518   return _val;
02519 }
02520 
02521 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:762 */
02522 rtx
02523 gen_reload_inti (operand0, operand1, operand2)
02524      rtx operand0;
02525      rtx operand1;
02526      rtx operand2;
02527 {
02528   rtx _val = 0;
02529   start_sequence ();
02530   {
02531     rtx operands[3];
02532     operands[0] = operand0;
02533     operands[1] = operand1;
02534     operands[2] = operand2;
02535 {
02536   unsigned int s_regno = REGNO (operands[2]);
02537   if (s_regno == REGNO (operands[0]))
02538     s_regno += 1;
02539   operands[2] = gen_rtx_REG (DImode, s_regno);
02540 }
02541     operand0 = operands[0];
02542     operand1 = operands[1];
02543     operand2 = operands[2];
02544   }
02545   emit (gen_rtx_PARALLEL (VOIDmode,
02546   gen_rtvec (2,
02547     gen_rtx_SET (VOIDmode,
02548   operand0,
02549   operand1),
02550     gen_rtx_CLOBBER (VOIDmode,
02551   operand2))));
02552   _val = get_insns ();
02553   end_sequence ();
02554   return _val;
02555 }
02556 
02557 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:774 */
02558 rtx
02559 gen_reload_outti (operand0, operand1, operand2)
02560      rtx operand0;
02561      rtx operand1;
02562      rtx operand2;
02563 {
02564   rtx _val = 0;
02565   start_sequence ();
02566   {
02567     rtx operands[3];
02568     operands[0] = operand0;
02569     operands[1] = operand1;
02570     operands[2] = operand2;
02571 {
02572   unsigned int s_regno = REGNO (operands[2]);
02573   if (s_regno == REGNO (operands[1]))
02574     s_regno += 1;
02575   operands[2] = gen_rtx_REG (DImode, s_regno);
02576 }
02577     operand0 = operands[0];
02578     operand1 = operands[1];
02579     operand2 = operands[2];
02580   }
02581   emit (gen_rtx_PARALLEL (VOIDmode,
02582   gen_rtvec (2,
02583     gen_rtx_SET (VOIDmode,
02584   operand0,
02585   operand1),
02586     gen_rtx_CLOBBER (VOIDmode,
02587   operand2))));
02588   _val = get_insns ();
02589   end_sequence ();
02590   return _val;
02591 }
02592 
02593 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:791 */
02594 rtx
02595 gen_movsf (operand0, operand1)
02596      rtx operand0;
02597      rtx operand1;
02598 {
02599   rtx _val = 0;
02600   start_sequence ();
02601   {
02602     rtx operands[2];
02603     operands[0] = operand0;
02604     operands[1] = operand1;
02605 {
02606   rtx op1 = ia64_expand_move (operands[0], operands[1]);
02607   if (!op1)
02608     DONE;
02609   operands[1] = op1;
02610 }
02611     operand0 = operands[0];
02612     operand1 = operands[1];
02613   }
02614   emit_insn (gen_rtx_SET (VOIDmode,
02615   operand0,
02616   operand1));
02617   _val = get_insns ();
02618   end_sequence ();
02619   return _val;
02620 }
02621 
02622 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:817 */
02623 rtx
02624 gen_movdf (operand0, operand1)
02625      rtx operand0;
02626      rtx operand1;
02627 {
02628   rtx _val = 0;
02629   start_sequence ();
02630   {
02631     rtx operands[2];
02632     operands[0] = operand0;
02633     operands[1] = operand1;
02634 {
02635   rtx op1 = ia64_expand_move (operands[0], operands[1]);
02636   if (!op1)
02637     DONE;
02638   operands[1] = op1;
02639 }
02640     operand0 = operands[0];
02641     operand1 = operands[1];
02642   }
02643   emit_insn (gen_rtx_SET (VOIDmode,
02644   operand0,
02645   operand1));
02646   _val = get_insns ();
02647   end_sequence ();
02648   return _val;
02649 }
02650 
02651 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:845 */
02652 rtx
02653 gen_movtf (operand0, operand1)
02654      rtx operand0;
02655      rtx operand1;
02656 {
02657   rtx _val = 0;
02658   start_sequence ();
02659   {
02660     rtx operands[2];
02661     operands[0] = operand0;
02662     operands[1] = operand1;
02663 {
02664   /* We must support TFmode loads into general registers for stdarg/vararg
02665      and unprototyped calls.  We split them into DImode loads for convenience.
02666      We don't need TFmode stores from general regs, because a stdarg/vararg
02667      routine does a block store to memory of unnamed arguments.  */
02668   if (GET_CODE (operands[0]) == REG
02669       && GR_REGNO_P (REGNO (operands[0])))
02670     {
02671       /* We're hoping to transform everything that deals with TFmode
02672    quantities and GR registers early in the compiler.  */
02673       if (no_new_pseudos)
02674   abort ();
02675 
02676       /* Struct to register can just use TImode instead.  */
02677       if ((GET_CODE (operands[1]) == SUBREG
02678      && GET_MODE (SUBREG_REG (operands[1])) == TImode)
02679     || (GET_CODE (operands[1]) == REG
02680         && GR_REGNO_P (REGNO (operands[1]))))
02681   {
02682     emit_move_insn (gen_rtx_REG (TImode, REGNO (operands[0])),
02683         SUBREG_REG (operands[1]));
02684     DONE;
02685   }
02686 
02687       if (GET_CODE (operands[1]) == CONST_DOUBLE)
02688   {
02689     emit_move_insn (gen_rtx_REG (DImode, REGNO (operands[0])),
02690         operand_subword (operands[1], 0, 0, TFmode));
02691     emit_move_insn (gen_rtx_REG (DImode, REGNO (operands[0]) + 1),
02692         operand_subword (operands[1], 1, 0, TFmode));
02693     DONE;
02694   }
02695 
02696       /* If the quantity is in a register not known to be GR, spill it.  */
02697       if (register_operand (operands[1], TFmode))
02698   operands[1] = spill_tfmode_operand (operands[1], 1);
02699 
02700       if (GET_CODE (operands[1]) == MEM)
02701   {
02702     rtx out[2];
02703 
02704     out[WORDS_BIG_ENDIAN] = gen_rtx_REG (DImode, REGNO (operands[0]));
02705     out[!WORDS_BIG_ENDIAN] = gen_rtx_REG (DImode, REGNO (operands[0])+1);
02706 
02707     emit_move_insn (out[0], adjust_address (operands[1], DImode, 0));
02708     emit_move_insn (out[1], adjust_address (operands[1], DImode, 8));
02709     DONE;
02710   }
02711 
02712       abort ();
02713     }
02714 
02715   if (! reload_in_progress && ! reload_completed)
02716     {
02717       operands[0] = spill_tfmode_operand (operands[0], 0);
02718       operands[1] = spill_tfmode_operand (operands[1], 0);
02719 
02720       if (! ia64_move_ok (operands[0], operands[1]))
02721   operands[1] = force_reg (TFmode, operands[1]);
02722     }
02723 }
02724     operand0 = operands[0];
02725     operand1 = operands[1];
02726   }
02727   emit_insn (gen_rtx_SET (VOIDmode,
02728   operand0,
02729   operand1));
02730   _val = get_insns ();
02731   end_sequence ();
02732   return _val;
02733 }
02734 
02735 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1182 */
02736 rtx
02737 gen_insv (operand0, operand1, operand2, operand3)
02738      rtx operand0;
02739      rtx operand1;
02740      rtx operand2;
02741      rtx operand3;
02742 {
02743   rtx _val = 0;
02744   start_sequence ();
02745   {
02746     rtx operands[4];
02747     operands[0] = operand0;
02748     operands[1] = operand1;
02749     operands[2] = operand2;
02750     operands[3] = operand3;
02751 {
02752   int width = INTVAL (operands[1]);
02753   int shift = INTVAL (operands[2]);
02754 
02755   /* If operand[3] is a constant, and isn't 0 or -1, then load it into a
02756      pseudo.  */
02757   if (! register_operand (operands[3], DImode)
02758       && operands[3] != const0_rtx && operands[3] != constm1_rtx)
02759     operands[3] = force_reg (DImode, operands[3]);
02760 
02761   /* If this is a single dep instruction, we have nothing to do.  */
02762   if (! ((register_operand (operands[3], DImode) && width <= 16)
02763    || operands[3] == const0_rtx || operands[3] == constm1_rtx))
02764     {
02765       /* Check for cases that can be implemented with a mix instruction.  */
02766       if (width == 32 && shift == 0)
02767   {
02768     /* Directly generating the mix4left instruction confuses
02769        optimize_bit_field in function.c.  Since this is performing
02770        a useful optimization, we defer generation of the complicated
02771        mix4left RTL to the first splitting phase.  */
02772     rtx tmp = gen_reg_rtx (DImode);
02773     emit_insn (gen_shift_mix4left (operands[0], operands[3], tmp));
02774     DONE;
02775   }
02776       else if (width == 32 && shift == 32)
02777   {
02778     emit_insn (gen_mix4right (operands[0], operands[3]));
02779     DONE;
02780   }
02781 
02782       /* We could handle remaining cases by emitting multiple dep
02783    instructions.
02784 
02785    If we need more than two dep instructions then we lose.  A 6
02786    insn sequence mov mask1,mov mask2,shl;;and,and;;or is better than
02787    mov;;dep,shr;;dep,shr;;dep.  The former can be executed in 3 cycles,
02788    the latter is 6 cycles on an Itanium (TM) processor, because there is
02789    only one function unit that can execute dep and shr immed.
02790 
02791    If we only need two dep instruction, then we still lose.
02792    mov;;dep,shr;;dep is still 4 cycles.  Even if we optimize away
02793    the unnecessary mov, this is still undesirable because it will be
02794    hard to optimize, and it creates unnecessary pressure on the I0
02795    function unit.  */
02796 
02797       FAIL;
02798 
02799 #if 0
02800       /* This code may be useful for other IA-64 processors, so we leave it in
02801    for now.  */
02802       while (width > 16)
02803   {
02804     rtx tmp;
02805 
02806     emit_insn (gen_insv (operands[0], GEN_INT (16), GEN_INT (shift),
02807              operands[3]));
02808     shift += 16;
02809     width -= 16;
02810     tmp = gen_reg_rtx (DImode);
02811     emit_insn (gen_lshrdi3 (tmp, operands[3], GEN_INT (16)));
02812     operands[3] = tmp;
02813   }
02814       operands[1] = GEN_INT (width);
02815       operands[2] = GEN_INT (shift);
02816 #endif
02817     }
02818 }
02819     operand0 = operands[0];
02820     operand1 = operands[1];
02821     operand2 = operands[2];
02822     operand3 = operands[3];
02823   }
02824   emit_insn (gen_rtx_SET (VOIDmode,
02825   gen_rtx_ZERO_EXTRACT (DImode,
02826   operand0,
02827   operand1,
02828   operand2),
02829   operand3));
02830   _val = get_insns ();
02831   end_sequence ();
02832   return _val;
02833 }
02834 
02835 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1290 */
02836 extern rtx gen_split_301 PARAMS ((rtx *));
02837 rtx
02838 gen_split_301 (operands)
02839       rtx *operands;
02840 {
02841   rtx operand0;
02842   rtx operand1;
02843   rtx operand2;
02844   rtx operand3;
02845   rtx _val = 0;
02846   start_sequence ();
02847 operands[3] = operands[2];
02848   operand0 = operands[0];
02849   operand1 = operands[1];
02850   operand2 = operands[2];
02851   operand3 = operands[3];
02852   emit_insn (gen_rtx_SET (VOIDmode,
02853   operand3,
02854   gen_rtx_ASHIFT (DImode,
02855   operand1,
02856   GEN_INT (32L))));
02857   emit_insn (gen_rtx_SET (VOIDmode,
02858   gen_rtx_ZERO_EXTRACT (DImode,
02859   operand0,
02860   GEN_INT (32L),
02861   const0_rtx),
02862   gen_rtx_LSHIFTRT (DImode,
02863   copy_rtx (operand3),
02864   GEN_INT (32L))));
02865   _val = get_insns ();
02866   end_sequence ();
02867   return _val;
02868 }
02869 
02870 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1301 */
02871 extern rtx gen_split_302 PARAMS ((rtx *));
02872 rtx
02873 gen_split_302 (operands)
02874       rtx *operands;
02875 {
02876   rtx operand0;
02877   rtx operand1;
02878   rtx operand2;
02879   rtx operand3;
02880   rtx _val = 0;
02881   start_sequence ();
02882 operands[3] = operands[2];
02883   operand0 = operands[0];
02884   operand1 = operands[1];
02885   operand2 = operands[2];
02886   operand3 = operands[3];
02887   emit_insn (gen_rtx_SET (VOIDmode,
02888   operand3,
02889   gen_rtx_ASHIFT (DImode,
02890   operand1,
02891   GEN_INT (32L))));
02892   emit_insn (gen_rtx_SET (VOIDmode,
02893   gen_rtx_ZERO_EXTRACT (DImode,
02894   operand0,
02895   GEN_INT (32L),
02896   const0_rtx),
02897   gen_rtx_LSHIFTRT (DImode,
02898   copy_rtx (operand3),
02899   GEN_INT (32L))));
02900   _val = get_insns ();
02901   end_sequence ();
02902   return _val;
02903 }
02904 
02905 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1348 */
02906 extern rtx gen_split_303 PARAMS ((rtx *));
02907 rtx
02908 gen_split_303 (operands)
02909       rtx *operands;
02910 {
02911   rtx operand0;
02912   rtx operand1;
02913   rtx operand2;
02914   rtx _val = 0;
02915   start_sequence ();
02916 
02917   operand0 = operands[0];
02918   operand1 = operands[1];
02919   operand2 = operands[2];
02920   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
02921   gen_rtx_EQ (VOIDmode,
02922   operand2,
02923   const0_rtx),
02924   gen_rtx_SET (VOIDmode,
02925   operand0,
02926   gen_rtx_AND (BImode,
02927   gen_rtx_NE (BImode,
02928   const0_rtx,
02929   const0_rtx),
02930   copy_rtx (operand0)))));
02931   _val = get_insns ();
02932   end_sequence ();
02933   return _val;
02934 }
02935 
02936 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1366 */
02937 extern rtx gen_split_304 PARAMS ((rtx *));
02938 rtx
02939 gen_split_304 (operands)
02940       rtx *operands;
02941 {
02942   rtx operand0;
02943   rtx operand1;
02944   rtx _val = 0;
02945   start_sequence ();
02946 
02947   operand0 = operands[0];
02948   operand1 = operands[1];
02949   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
02950   gen_rtx_NE (VOIDmode,
02951   operand1,
02952   const0_rtx),
02953   gen_rtx_SET (VOIDmode,
02954   operand0,
02955   gen_rtx_AND (BImode,
02956   gen_rtx_NE (BImode,
02957   const0_rtx,
02958   const0_rtx),
02959   copy_rtx (operand0)))));
02960   _val = get_insns ();
02961   end_sequence ();
02962   return _val;
02963 }
02964 
02965 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1384 */
02966 extern rtx gen_split_305 PARAMS ((rtx *));
02967 rtx
02968 gen_split_305 (operands)
02969       rtx *operands;
02970 {
02971   rtx operand0;
02972   rtx operand1;
02973   rtx operand2;
02974   rtx _val = 0;
02975   start_sequence ();
02976 
02977   operand0 = operands[0];
02978   operand1 = operands[1];
02979   operand2 = operands[2];
02980   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
02981   gen_rtx_NE (VOIDmode,
02982   operand2,
02983   const0_rtx),
02984   gen_rtx_SET (VOIDmode,
02985   operand0,
02986   gen_rtx_IOR (BImode,
02987   gen_rtx_EQ (BImode,
02988   const0_rtx,
02989   const0_rtx),
02990   copy_rtx (operand0)))));
02991   _val = get_insns ();
02992   end_sequence ();
02993   return _val;
02994 }
02995 
02996 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1402 */
02997 extern rtx gen_split_306 PARAMS ((rtx *));
02998 rtx
02999 gen_split_306 (operands)
03000       rtx *operands;
03001 {
03002   rtx operand0;
03003   rtx operand1;
03004   rtx _val = 0;
03005   start_sequence ();
03006 
03007   operand0 = operands[0];
03008   operand1 = operands[1];
03009   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
03010   gen_rtx_EQ (VOIDmode,
03011   operand1,
03012   const0_rtx),
03013   gen_rtx_SET (VOIDmode,
03014   operand0,
03015   gen_rtx_IOR (BImode,
03016   gen_rtx_EQ (BImode,
03017   const0_rtx,
03018   const0_rtx),
03019   copy_rtx (operand0)))));
03020   _val = get_insns ();
03021   end_sequence ();
03022   return _val;
03023 }
03024 
03025 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1431 */
03026 extern rtx gen_split_307 PARAMS ((rtx *));
03027 rtx
03028 gen_split_307 (operands)
03029       rtx *operands;
03030 {
03031   rtx operand0;
03032   rtx operand1;
03033   rtx operand2;
03034   rtx operand3;
03035   rtx operand4;
03036   rtx _val = 0;
03037   start_sequence ();
03038 operands[3] = gen_rtx_REG (CCImode, REGNO (operands[1]));
03039    operands[4] = gen_rtx_REG (CCImode, REGNO (operands[2]));
03040   operand0 = operands[0];
03041   operand1 = operands[1];
03042   operand2 = operands[2];
03043   operand3 = operands[3];
03044   operand4 = operands[4];
03045   emit_insn (gen_rtx_SET (VOIDmode,
03046   operand4,
03047   operand3));
03048   emit_insn (gen_rtx_SET (VOIDmode,
03049   operand0,
03050   const1_rtx));
03051   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
03052   gen_rtx_NE (VOIDmode,
03053   operand2,
03054   const0_rtx),
03055   gen_rtx_SET (VOIDmode,
03056   copy_rtx (operand0),
03057   const0_rtx)));
03058   emit_insn (gen_rtx_SET (VOIDmode,
03059   copy_rtx (operand0),
03060   gen_rtx_UNSPEC (BImode,
03061   gen_rtvec (1,
03062     copy_rtx (operand0)),
03063   15)));
03064   _val = get_insns ();
03065   end_sequence ();
03066   return _val;
03067 }
03068 
03069 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1446 */
03070 extern rtx gen_split_308 PARAMS ((rtx *));
03071 rtx
03072 gen_split_308 (operands)
03073       rtx *operands;
03074 {
03075   rtx operand0;
03076   rtx operand1;
03077   rtx _val = 0;
03078   start_sequence ();
03079 
03080   operand0 = operands[0];
03081   operand1 = operands[1];
03082   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
03083   gen_rtx_NE (VOIDmode,
03084   operand1,
03085   const0_rtx),
03086   gen_rtx_SET (VOIDmode,
03087   operand0,
03088   const0_rtx)));
03089   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
03090   gen_rtx_EQ (VOIDmode,
03091   copy_rtx (operand1),
03092   const0_rtx),
03093   gen_rtx_SET (VOIDmode,
03094   copy_rtx (operand0),
03095   const1_rtx)));
03096   emit_insn (gen_rtx_SET (VOIDmode,
03097   copy_rtx (operand0),
03098   gen_rtx_UNSPEC (BImode,
03099   gen_rtvec (1,
03100     copy_rtx (operand0)),
03101   15)));
03102   _val = get_insns ();
03103   end_sequence ();
03104   return _val;
03105 }
03106 
03107 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1711 */
03108 extern rtx gen_split_309 PARAMS ((rtx *));
03109 rtx
03110 gen_split_309 (operands)
03111       rtx *operands;
03112 {
03113   rtx operand0;
03114   rtx operand1;
03115   rtx operand2;
03116   rtx operand3;
03117   rtx _val = 0;
03118   start_sequence ();
03119 
03120   operand0 = operands[0];
03121   operand1 = operands[1];
03122   operand2 = operands[2];
03123   operand3 = operands[3];
03124   emit_insn (gen_rtx_SET (VOIDmode,
03125   operand0,
03126   gen_rtx_AND (BImode,
03127   gen_rtx_NE (BImode,
03128   gen_rtx_AND (DImode,
03129   operand3,
03130   const1_rtx),
03131   const0_rtx),
03132   operand2)));
03133   _val = get_insns ();
03134   end_sequence ();
03135   return _val;
03136 }
03137 
03138 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1723 */
03139 extern rtx gen_split_310 PARAMS ((rtx *));
03140 rtx
03141 gen_split_310 (operands)
03142       rtx *operands;
03143 {
03144   rtx operand0;
03145   rtx operand1;
03146   rtx operand2;
03147   rtx operand3;
03148   rtx _val = 0;
03149   start_sequence ();
03150 
03151   operand0 = operands[0];
03152   operand1 = operands[1];
03153   operand2 = operands[2];
03154   operand3 = operands[3];
03155   emit_insn (gen_rtx_SET (VOIDmode,
03156   operand0,
03157   gen_rtx_AND (BImode,
03158   gen_rtx_NE (BImode,
03159   gen_rtx_AND (DImode,
03160   operand3,
03161   const1_rtx),
03162   const0_rtx),
03163   operand2)));
03164   emit (gen_rtx_PARALLEL (VOIDmode,
03165   gen_rtvec (2,
03166     gen_rtx_SET (VOIDmode,
03167   copy_rtx (operand0),
03168   gen_rtx_NOT (BImode,
03169   copy_rtx (operand0))),
03170     gen_rtx_CLOBBER (VOIDmode,
03171   gen_rtx_SCRATCH (VOIDmode)))));
03172   _val = get_insns ();
03173   end_sequence ();
03174   return _val;
03175 }
03176 
03177 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1737 */
03178 extern rtx gen_split_311 PARAMS ((rtx *));
03179 rtx
03180 gen_split_311 (operands)
03181       rtx *operands;
03182 {
03183   rtx operand0;
03184   rtx operand1;
03185   rtx operand2;
03186   rtx operand3;
03187   rtx _val = 0;
03188   start_sequence ();
03189 
03190   operand0 = operands[0];
03191   operand1 = operands[1];
03192   operand2 = operands[2];
03193   operand3 = operands[3];
03194   emit_insn (gen_rtx_SET (VOIDmode,
03195   operand0,
03196   gen_rtx_IOR (BImode,
03197   gen_rtx_NE (BImode,
03198   operand3,
03199   const0_rtx),
03200   operand2)));
03201   _val = get_insns ();
03202   end_sequence ();
03203   return _val;
03204 }
03205 
03206 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1749 */
03207 extern rtx gen_split_312 PARAMS ((rtx *));
03208 rtx
03209 gen_split_312 (operands)
03210       rtx *operands;
03211 {
03212   rtx operand0;
03213   rtx operand1;
03214   rtx operand2;
03215   rtx operand3;
03216   rtx _val = 0;
03217   start_sequence ();
03218 
03219   operand0 = operands[0];
03220   operand1 = operands[1];
03221   operand2 = operands[2];
03222   operand3 = operands[3];
03223   emit_insn (gen_rtx_SET (VOIDmode,
03224   operand0,
03225   gen_rtx_IOR (BImode,
03226   gen_rtx_NE (BImode,
03227   operand3,
03228   const0_rtx),
03229   operand2)));
03230   emit (gen_rtx_PARALLEL (VOIDmode,
03231   gen_rtvec (2,
03232     gen_rtx_SET (VOIDmode,
03233   copy_rtx (operand0),
03234   gen_rtx_NOT (BImode,
03235   copy_rtx (operand0))),
03236     gen_rtx_CLOBBER (VOIDmode,
03237   gen_rtx_SCRATCH (VOIDmode)))));
03238   _val = get_insns ();
03239   end_sequence ();
03240   return _val;
03241 }
03242 
03243 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1838 */
03244 extern rtx gen_peephole2_313 PARAMS ((rtx, rtx *));
03245 rtx
03246 gen_peephole2_313 (curr_insn, operands)
03247      rtx curr_insn ATTRIBUTE_UNUSED;
03248      rtx *operands;
03249 {
03250   rtx operand0;
03251   rtx operand1;
03252   rtx operand2;
03253   rtx operand3;
03254   rtx operand4;
03255   rtx operand5;
03256   rtx operand6;
03257   rtx operand7;
03258   rtx _val = 0;
03259   HARD_REG_SET _regs_allocated;
03260   CLEAR_HARD_REG_SET (_regs_allocated);
03261   start_sequence ();
03262 operands[7] = copy_rtx (operands[1]);
03263   operand0 = operands[0];
03264   operand1 = operands[1];
03265   operand2 = operands[2];
03266   operand3 = operands[3];
03267   operand4 = operands[4];
03268   operand5 = operands[5];
03269   operand6 = operands[6];
03270   operand7 = operands[7];
03271   emit_insn (gen_rtx_SET (VOIDmode,
03272   operand0,
03273   operand1));
03274   emit_insn (gen_rtx_SET (VOIDmode,
03275   operand6,
03276   operand7));
03277   _val = get_insns ();
03278   end_sequence ();
03279   return _val;
03280 }
03281 
03282 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1956 */
03283 rtx
03284 gen_abssi2 (operand0, operand1)
03285      rtx operand0;
03286      rtx operand1;
03287 {
03288   rtx operand2;
03289   rtx _val = 0;
03290   start_sequence ();
03291   {
03292     rtx operands[3];
03293     operands[0] = operand0;
03294     operands[1] = operand1;
03295 { operands[2] = gen_reg_rtx (BImode); }
03296     operand0 = operands[0];
03297     operand1 = operands[1];
03298     operand2 = operands[2];
03299   }
03300   emit_insn (gen_rtx_SET (VOIDmode,
03301   operand2,
03302   gen_rtx_GE (BImode,
03303   operand1,
03304   const0_rtx)));
03305   emit_insn (gen_rtx_SET (VOIDmode,
03306   operand0,
03307   gen_rtx_IF_THEN_ELSE (SImode,
03308   gen_rtx_EQ (VOIDmode,
03309   operand2,
03310   const0_rtx),
03311   gen_rtx_NEG (SImode,
03312   operand1),
03313   operand1)));
03314   _val = get_insns ();
03315   end_sequence ();
03316   return _val;
03317 }
03318 
03319 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1966 */
03320 rtx
03321 gen_sminsi3 (operand0, operand1, operand2)
03322      rtx operand0;
03323      rtx operand1;
03324      rtx operand2;
03325 {
03326   rtx operand3;
03327   rtx _val = 0;
03328   start_sequence ();
03329   {
03330     rtx operands[4];
03331     operands[0] = operand0;
03332     operands[1] = operand1;
03333     operands[2] = operand2;
03334 { operands[3] = gen_reg_rtx (BImode); }
03335     operand0 = operands[0];
03336     operand1 = operands[1];
03337     operand2 = operands[2];
03338     operand3 = operands[3];
03339   }
03340   emit_insn (gen_rtx_SET (VOIDmode,
03341   operand3,
03342   gen_rtx_GE (BImode,
03343   operand1,
03344   operand2)));
03345   emit_insn (gen_rtx_SET (VOIDmode,
03346   operand0,
03347   gen_rtx_IF_THEN_ELSE (SImode,
03348   gen_rtx_NE (VOIDmode,
03349   operand3,
03350   const0_rtx),
03351   operand2,
03352   operand1)));
03353   _val = get_insns ();
03354   end_sequence ();
03355   return _val;
03356 }
03357 
03358 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1976 */
03359 rtx
03360 gen_smaxsi3 (operand0, operand1, operand2)
03361      rtx operand0;
03362      rtx operand1;
03363      rtx operand2;
03364 {
03365   rtx operand3;
03366   rtx _val = 0;
03367   start_sequence ();
03368   {
03369     rtx operands[4];
03370     operands[0] = operand0;
03371     operands[1] = operand1;
03372     operands[2] = operand2;
03373 { operands[3] = gen_reg_rtx (BImode); }
03374     operand0 = operands[0];
03375     operand1 = operands[1];
03376     operand2 = operands[2];
03377     operand3 = operands[3];
03378   }
03379   emit_insn (gen_rtx_SET (VOIDmode,
03380   operand3,
03381   gen_rtx_GE (BImode,
03382   operand1,
03383   operand2)));
03384   emit_insn (gen_rtx_SET (VOIDmode,
03385   operand0,
03386   gen_rtx_IF_THEN_ELSE (SImode,
03387   gen_rtx_NE (VOIDmode,
03388   operand3,
03389   const0_rtx),
03390   operand1,
03391   operand2)));
03392   _val = get_insns ();
03393   end_sequence ();
03394   return _val;
03395 }
03396 
03397 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1986 */
03398 rtx
03399 gen_uminsi3 (operand0, operand1, operand2)
03400      rtx operand0;
03401      rtx operand1;
03402      rtx operand2;
03403 {
03404   rtx operand3;
03405   rtx _val = 0;
03406   start_sequence ();
03407   {
03408     rtx operands[4];
03409     operands[0] = operand0;
03410     operands[1] = operand1;
03411     operands[2] = operand2;
03412 { operands[3] = gen_reg_rtx (BImode); }
03413     operand0 = operands[0];
03414     operand1 = operands[1];
03415     operand2 = operands[2];
03416     operand3 = operands[3];
03417   }
03418   emit_insn (gen_rtx_SET (VOIDmode,
03419   operand3,
03420   gen_rtx_GEU (BImode,
03421   operand1,
03422   operand2)));
03423   emit_insn (gen_rtx_SET (VOIDmode,
03424   operand0,
03425   gen_rtx_IF_THEN_ELSE (SImode,
03426   gen_rtx_NE (VOIDmode,
03427   operand3,
03428   const0_rtx),
03429   operand2,
03430   operand1)));
03431   _val = get_insns ();
03432   end_sequence ();
03433   return _val;
03434 }
03435 
03436 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:1996 */
03437 rtx
03438 gen_umaxsi3 (operand0, operand1, operand2)
03439      rtx operand0;
03440      rtx operand1;
03441      rtx operand2;
03442 {
03443   rtx operand3;
03444   rtx _val = 0;
03445   start_sequence ();
03446   {
03447     rtx operands[4];
03448     operands[0] = operand0;
03449     operands[1] = operand1;
03450     operands[2] = operand2;
03451 { operands[3] = gen_reg_rtx (BImode); }
03452     operand0 = operands[0];
03453     operand1 = operands[1];
03454     operand2 = operands[2];
03455     operand3 = operands[3];
03456   }
03457   emit_insn (gen_rtx_SET (VOIDmode,
03458   operand3,
03459   gen_rtx_GEU (BImode,
03460   operand1,
03461   operand2)));
03462   emit_insn (gen_rtx_SET (VOIDmode,
03463   operand0,
03464   gen_rtx_IF_THEN_ELSE (SImode,
03465   gen_rtx_NE (VOIDmode,
03466   operand3,
03467   const0_rtx),
03468   operand1,
03469   operand2)));
03470   _val = get_insns ();
03471   end_sequence ();
03472   return _val;
03473 }
03474 
03475 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2006 */
03476 rtx
03477 gen_divsi3 (operand0, operand1, operand2)
03478      rtx operand0;
03479      rtx operand1;
03480      rtx operand2;
03481 {
03482   rtx _val = 0;
03483   start_sequence ();
03484   {
03485     rtx operands[3];
03486     operands[0] = operand0;
03487     operands[1] = operand1;
03488     operands[2] = operand2;
03489 {
03490   rtx op1_tf, op2_tf, op0_tf, op0_di, twon34;
03491   REAL_VALUE_TYPE twon34_r;
03492 
03493   op0_tf = gen_reg_rtx (TFmode);
03494   op0_di = gen_reg_rtx (DImode);
03495 
03496   if (CONSTANT_P (operands[1]))
03497     operands[1] = force_reg (SImode, operands[1]);
03498   op1_tf = gen_reg_rtx (TFmode);
03499   expand_float (op1_tf, operands[1], 0);
03500 
03501   if (CONSTANT_P (operands[2]))
03502     operands[2] = force_reg (SImode, operands[2]);
03503   op2_tf = gen_reg_rtx (TFmode);
03504   expand_float (op2_tf, operands[2], 0);
03505 
03506   /* 2^-34 */
03507   real_2expN (&twon34_r, -34);
03508   twon34 = CONST_DOUBLE_FROM_REAL_VALUE (twon34_r, TFmode);
03509   twon34 = force_reg (TFmode, twon34);
03510 
03511   emit_insn (gen_divsi3_internal (op0_tf, op1_tf, op2_tf, twon34));
03512 
03513   emit_insn (gen_fix_trunctfdi2_alts (op0_di, op0_tf, const1_rtx));
03514   emit_move_insn (operands[0], gen_lowpart (SImode, op0_di));
03515   DONE;
03516 }
03517     operand0 = operands[0];
03518     operand1 = operands[1];
03519     operand2 = operands[2];
03520   }
03521   emit_insn (gen_rtx_SET (VOIDmode,
03522   operand0,
03523   gen_rtx_DIV (SImode,
03524   operand1,
03525   operand2)));
03526   _val = get_insns ();
03527   end_sequence ();
03528   return _val;
03529 }
03530 
03531 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2040 */
03532 rtx
03533 gen_modsi3 (operand0, operand1, operand2)
03534      rtx operand0;
03535      rtx operand1;
03536      rtx operand2;
03537 {
03538   rtx _val = 0;
03539   start_sequence ();
03540   {
03541     rtx operands[3];
03542     operands[0] = operand0;
03543     operands[1] = operand1;
03544     operands[2] = operand2;
03545 {
03546   rtx op2_neg, op1_di, div;
03547 
03548   div = gen_reg_rtx (SImode);
03549   emit_insn (gen_divsi3 (div, operands[1], operands[2]));
03550 
03551   op2_neg = expand_unop (SImode, neg_optab, operands[2], NULL_RTX, 0);
03552 
03553   /* This is a trick to get us to reuse the value that we're sure to
03554      have already copied to the FP regs.  */
03555   op1_di = gen_reg_rtx (DImode);
03556   convert_move (op1_di, operands[1], 0);
03557 
03558   emit_insn (gen_maddsi4 (operands[0], div, op2_neg,
03559         gen_lowpart (SImode, op1_di)));
03560   DONE;
03561 }
03562     operand0 = operands[0];
03563     operand1 = operands[1];
03564     operand2 = operands[2];
03565   }
03566   emit_insn (gen_rtx_SET (VOIDmode,
03567   operand0,
03568   gen_rtx_MOD (SImode,
03569   operand1,
03570   operand2)));
03571   _val = get_insns ();
03572   end_sequence ();
03573   return _val;
03574 }
03575 
03576 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2063 */
03577 rtx
03578 gen_udivsi3 (operand0, operand1, operand2)
03579      rtx operand0;
03580      rtx operand1;
03581      rtx operand2;
03582 {
03583   rtx _val = 0;
03584   start_sequence ();
03585   {
03586     rtx operands[3];
03587     operands[0] = operand0;
03588     operands[1] = operand1;
03589     operands[2] = operand2;
03590 {
03591   rtx op1_tf, op2_tf, op0_tf, op0_di, twon34;
03592   REAL_VALUE_TYPE twon34_r;
03593 
03594   op0_tf = gen_reg_rtx (TFmode);
03595   op0_di = gen_reg_rtx (DImode);
03596 
03597   if (CONSTANT_P (operands[1]))
03598     operands[1] = force_reg (SImode, operands[1]);
03599   op1_tf = gen_reg_rtx (TFmode);
03600   expand_float (op1_tf, operands[1], 1);
03601 
03602   if (CONSTANT_P (operands[2]))
03603     operands[2] = force_reg (SImode, operands[2]);
03604   op2_tf = gen_reg_rtx (TFmode);
03605   expand_float (op2_tf, operands[2], 1);
03606 
03607   /* 2^-34 */
03608   real_2expN (&twon34_r, -34);
03609   twon34 = CONST_DOUBLE_FROM_REAL_VALUE (twon34_r, TFmode);
03610   twon34 = force_reg (TFmode, twon34);
03611 
03612   emit_insn (gen_divsi3_internal (op0_tf, op1_tf, op2_tf, twon34));
03613 
03614   emit_insn (gen_fixuns_trunctfdi2_alts (op0_di, op0_tf, const1_rtx));
03615   emit_move_insn (operands[0], gen_lowpart (SImode, op0_di));
03616   DONE;
03617 }
03618     operand0 = operands[0];
03619     operand1 = operands[1];
03620     operand2 = operands[2];
03621   }
03622   emit_insn (gen_rtx_SET (VOIDmode,
03623   operand0,
03624   gen_rtx_UDIV (SImode,
03625   operand1,
03626   operand2)));
03627   _val = get_insns ();
03628   end_sequence ();
03629   return _val;
03630 }
03631 
03632 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2097 */
03633 rtx
03634 gen_umodsi3 (operand0, operand1, operand2)
03635      rtx operand0;
03636      rtx operand1;
03637      rtx operand2;
03638 {
03639   rtx _val = 0;
03640   start_sequence ();
03641   {
03642     rtx operands[3];
03643     operands[0] = operand0;
03644     operands[1] = operand1;
03645     operands[2] = operand2;
03646 {
03647   rtx op2_neg, op1_di, div;
03648 
03649   div = gen_reg_rtx (SImode);
03650   emit_insn (gen_udivsi3 (div, operands[1], operands[2]));
03651 
03652   op2_neg = expand_unop (SImode, neg_optab, operands[2], NULL_RTX, 0);
03653 
03654   /* This is a trick to get us to reuse the value that we're sure to
03655      have already copied to the FP regs.  */
03656   op1_di = gen_reg_rtx (DImode);
03657   convert_move (op1_di, operands[1], 1);
03658 
03659   emit_insn (gen_maddsi4 (operands[0], div, op2_neg,
03660         gen_lowpart (SImode, op1_di)));
03661   DONE;
03662 }
03663     operand0 = operands[0];
03664     operand1 = operands[1];
03665     operand2 = operands[2];
03666   }
03667   emit_insn (gen_rtx_SET (VOIDmode,
03668   operand0,
03669   gen_rtx_UMOD (SImode,
03670   operand1,
03671   operand2)));
03672   _val = get_insns ();
03673   end_sequence ();
03674   return _val;
03675 }
03676 
03677 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2120 */
03678 extern rtx gen_split_323 PARAMS ((rtx *));
03679 rtx
03680 gen_split_323 (operands)
03681       rtx *operands;
03682 {
03683   rtx operand0;
03684   rtx operand1;
03685   rtx operand2;
03686   rtx operand3;
03687   rtx operand4;
03688   rtx operand5;
03689   rtx operand6;
03690   rtx operand7;
03691   rtx _val = 0;
03692   start_sequence ();
03693 operands[7] = CONST1_RTX (TFmode);
03694   operand0 = operands[0];
03695   operand1 = operands[1];
03696   operand2 = operands[2];
03697   operand3 = operands[3];
03698   operand4 = operands[4];
03699   operand5 = operands[5];
03700   operand6 = operands[6];
03701   operand7 = operands[7];
03702   emit (gen_rtx_PARALLEL (VOIDmode,
03703   gen_rtvec (3,
03704     gen_rtx_SET (VOIDmode,
03705   operand0,
03706   gen_rtx_DIV (TFmode,
03707   const1_rtx,
03708   operand2)),
03709     gen_rtx_SET (VOIDmode,
03710   operand6,
03711   gen_rtx_UNSPEC (BImode,
03712   gen_rtvec (2,
03713     operand1,
03714     copy_rtx (operand2)),
03715   14)),
03716     gen_rtx_USE (VOIDmode,
03717   const1_rtx))));
03718   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
03719   gen_rtx_NE (VOIDmode,
03720   copy_rtx (operand6),
03721   const0_rtx),
03722   gen_rtx_PARALLEL (VOIDmode,
03723   gen_rtvec (2,
03724     gen_rtx_SET (VOIDmode,
03725   operand4,
03726   gen_rtx_MULT (TFmode,
03727   copy_rtx (operand1),
03728   copy_rtx (operand0))),
03729     gen_rtx_USE (VOIDmode,
03730   const1_rtx)))));
03731   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
03732   gen_rtx_NE (VOIDmode,
03733   copy_rtx (operand6),
03734   const0_rtx),
03735   gen_rtx_PARALLEL (VOIDmode,
03736   gen_rtvec (2,
03737     gen_rtx_SET (VOIDmode,
03738   operand5,
03739   gen_rtx_PLUS (TFmode,
03740   gen_rtx_NEG (TFmode,
03741   gen_rtx_MULT (TFmode,
03742   copy_rtx (operand2),
03743   copy_rtx (operand0))),
03744   operand7)),
03745     gen_rtx_USE (VOIDmode,
03746   const1_rtx)))));
03747   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
03748   gen_rtx_NE (VOIDmode,
03749   copy_rtx (operand6),
03750   const0_rtx),
03751   gen_rtx_PARALLEL (VOIDmode,
03752   gen_rtvec (2,
03753     gen_rtx_SET (VOIDmode,
03754   copy_rtx (operand4),
03755   gen_rtx_PLUS (TFmode,
03756   gen_rtx_MULT (TFmode,
03757   copy_rtx (operand5),
03758   copy_rtx (operand4)),
03759   copy_rtx (operand4))),
03760     gen_rtx_USE (VOIDmode,
03761   const1_rtx)))));
03762   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
03763   gen_rtx_NE (VOIDmode,
03764   copy_rtx (operand6),
03765   const0_rtx),
03766   gen_rtx_PARALLEL (VOIDmode,
03767   gen_rtvec (2,
03768     gen_rtx_SET (VOIDmode,
03769   copy_rtx (operand5),
03770   gen_rtx_PLUS (TFmode,
03771   gen_rtx_MULT (TFmode,
03772   copy_rtx (operand5),
03773   copy_rtx (operand5)),
03774   operand3)),
03775     gen_rtx_USE (VOIDmode,
03776   const1_rtx)))));
03777   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
03778   gen_rtx_NE (VOIDmode,
03779   copy_rtx (operand6),
03780   const0_rtx),
03781   gen_rtx_PARALLEL (VOIDmode,
03782   gen_rtvec (2,
03783     gen_rtx_SET (VOIDmode,
03784   copy_rtx (operand0),
03785   gen_rtx_PLUS (TFmode,
03786   gen_rtx_MULT (TFmode,
03787   copy_rtx (operand5),
03788   copy_rtx (operand4)),
03789   copy_rtx (operand4))),
03790     gen_rtx_USE (VOIDmode,
03791   const1_rtx)))));
03792   _val = get_insns ();
03793   end_sequence ();
03794   return _val;
03795 }
03796 
03797 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2266 */
03798 extern rtx gen_split_324 PARAMS ((rtx *));
03799 rtx
03800 gen_split_324 (operands)
03801       rtx *operands;
03802 {
03803   rtx operand0;
03804   rtx operand1;
03805   rtx operand2;
03806   rtx operand3;
03807   rtx operand4;
03808   rtx operand5;
03809   rtx _val = 0;
03810   start_sequence ();
03811 
03812   operand0 = operands[0];
03813   operand1 = operands[1];
03814   operand2 = operands[2];
03815   operand3 = operands[3];
03816   operand4 = operands[4];
03817   operand5 = operands[5];
03818   emit (gen_rtx_PARALLEL (VOIDmode,
03819   gen_rtvec (2,
03820     gen_rtx_SET (VOIDmode,
03821   operand5,
03822   gen_rtx_PLUS (DImode,
03823   gen_rtx_MULT (DImode,
03824   operand1,
03825   operand2),
03826   operand3)),
03827     gen_rtx_CLOBBER (VOIDmode,
03828   operand0))));
03829   emit_insn (gen_rtx_SET (VOIDmode,
03830   copy_rtx (operand0),
03831   copy_rtx (operand5)));
03832   emit_insn (gen_rtx_SET (VOIDmode,
03833   copy_rtx (operand0),
03834   gen_rtx_PLUS (DImode,
03835   copy_rtx (operand0),
03836   operand4)));
03837   _val = get_insns ();
03838   end_sequence ();
03839   return _val;
03840 }
03841 
03842 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2317 */
03843 rtx
03844 gen_absdi2 (operand0, operand1)
03845      rtx operand0;
03846      rtx operand1;
03847 {
03848   rtx operand2;
03849   rtx _val = 0;
03850   start_sequence ();
03851   {
03852     rtx operands[3];
03853     operands[0] = operand0;
03854     operands[1] = operand1;
03855 { operands[2] = gen_reg_rtx (BImode); }
03856     operand0 = operands[0];
03857     operand1 = operands[1];
03858     operand2 = operands[2];
03859   }
03860   emit_insn (gen_rtx_SET (VOIDmode,
03861   operand2,
03862   gen_rtx_GE (BImode,
03863   operand1,
03864   const0_rtx)));
03865   emit_insn (gen_rtx_SET (VOIDmode,
03866   operand0,
03867   gen_rtx_IF_THEN_ELSE (DImode,
03868   gen_rtx_EQ (VOIDmode,
03869   operand2,
03870   const0_rtx),
03871   gen_rtx_NEG (DImode,
03872   operand1),
03873   operand1)));
03874   _val = get_insns ();
03875   end_sequence ();
03876   return _val;
03877 }
03878 
03879 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2327 */
03880 rtx
03881 gen_smindi3 (operand0, operand1, operand2)
03882      rtx operand0;
03883      rtx operand1;
03884      rtx operand2;
03885 {
03886   rtx operand3;
03887   rtx _val = 0;
03888   start_sequence ();
03889   {
03890     rtx operands[4];
03891     operands[0] = operand0;
03892     operands[1] = operand1;
03893     operands[2] = operand2;
03894 { operands[3] = gen_reg_rtx (BImode); }
03895     operand0 = operands[0];
03896     operand1 = operands[1];
03897     operand2 = operands[2];
03898     operand3 = operands[3];
03899   }
03900   emit_insn (gen_rtx_SET (VOIDmode,
03901   operand3,
03902   gen_rtx_GE (BImode,
03903   operand1,
03904   operand2)));
03905   emit_insn (gen_rtx_SET (VOIDmode,
03906   operand0,
03907   gen_rtx_IF_THEN_ELSE (DImode,
03908   gen_rtx_NE (VOIDmode,
03909   operand3,
03910   const0_rtx),
03911   operand2,
03912   operand1)));
03913   _val = get_insns ();
03914   end_sequence ();
03915   return _val;
03916 }
03917 
03918 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2337 */
03919 rtx
03920 gen_smaxdi3 (operand0, operand1, operand2)
03921      rtx operand0;
03922      rtx operand1;
03923      rtx operand2;
03924 {
03925   rtx operand3;
03926   rtx _val = 0;
03927   start_sequence ();
03928   {
03929     rtx operands[4];
03930     operands[0] = operand0;
03931     operands[1] = operand1;
03932     operands[2] = operand2;
03933 { operands[3] = gen_reg_rtx (BImode); }
03934     operand0 = operands[0];
03935     operand1 = operands[1];
03936     operand2 = operands[2];
03937     operand3 = operands[3];
03938   }
03939   emit_insn (gen_rtx_SET (VOIDmode,
03940   operand3,
03941   gen_rtx_GE (BImode,
03942   operand1,
03943   operand2)));
03944   emit_insn (gen_rtx_SET (VOIDmode,
03945   operand0,
03946   gen_rtx_IF_THEN_ELSE (DImode,
03947   gen_rtx_NE (VOIDmode,
03948   operand3,
03949   const0_rtx),
03950   operand1,
03951   operand2)));
03952   _val = get_insns ();
03953   end_sequence ();
03954   return _val;
03955 }
03956 
03957 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2347 */
03958 rtx
03959 gen_umindi3 (operand0, operand1, operand2)
03960      rtx operand0;
03961      rtx operand1;
03962      rtx operand2;
03963 {
03964   rtx operand3;
03965   rtx _val = 0;
03966   start_sequence ();
03967   {
03968     rtx operands[4];
03969     operands[0] = operand0;
03970     operands[1] = operand1;
03971     operands[2] = operand2;
03972 { operands[3] = gen_reg_rtx (BImode); }
03973     operand0 = operands[0];
03974     operand1 = operands[1];
03975     operand2 = operands[2];
03976     operand3 = operands[3];
03977   }
03978   emit_insn (gen_rtx_SET (VOIDmode,
03979   operand3,
03980   gen_rtx_GEU (BImode,
03981   operand1,
03982   operand2)));
03983   emit_insn (gen_rtx_SET (VOIDmode,
03984   operand0,
03985   gen_rtx_IF_THEN_ELSE (DImode,
03986   gen_rtx_NE (VOIDmode,
03987   operand3,
03988   const0_rtx),
03989   operand2,
03990   operand1)));
03991   _val = get_insns ();
03992   end_sequence ();
03993   return _val;
03994 }
03995 
03996 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2357 */
03997 rtx
03998 gen_umaxdi3 (operand0, operand1, operand2)
03999      rtx operand0;
04000      rtx operand1;
04001      rtx operand2;
04002 {
04003   rtx operand3;
04004   rtx _val = 0;
04005   start_sequence ();
04006   {
04007     rtx operands[4];
04008     operands[0] = operand0;
04009     operands[1] = operand1;
04010     operands[2] = operand2;
04011 { operands[3] = gen_reg_rtx (BImode); }
04012     operand0 = operands[0];
04013     operand1 = operands[1];
04014     operand2 = operands[2];
04015     operand3 = operands[3];
04016   }
04017   emit_insn (gen_rtx_SET (VOIDmode,
04018   operand3,
04019   gen_rtx_GEU (BImode,
04020   operand1,
04021   operand2)));
04022   emit_insn (gen_rtx_SET (VOIDmode,
04023   operand0,
04024   gen_rtx_IF_THEN_ELSE (DImode,
04025   gen_rtx_NE (VOIDmode,
04026   operand3,
04027   const0_rtx),
04028   operand1,
04029   operand2)));
04030   _val = get_insns ();
04031   end_sequence ();
04032   return _val;
04033 }
04034 
04035 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2367 */
04036 rtx
04037 gen_ffsdi2 (operand0, operand1)
04038      rtx operand0;
04039      rtx operand1;
04040 {
04041   rtx operand2;
04042   rtx operand3;
04043   rtx operand4;
04044   rtx operand5;
04045   rtx operand6;
04046   rtx _val = 0;
04047   start_sequence ();
04048   {
04049     rtx operands[7];
04050     operands[0] = operand0;
04051     operands[1] = operand1;
04052 {
04053   operands[2] = gen_reg_rtx (DImode);
04054   operands[3] = gen_reg_rtx (DImode);
04055   operands[4] = gen_reg_rtx (DImode);
04056   operands[5] = gen_reg_rtx (DImode);
04057   operands[6] = gen_reg_rtx (BImode);
04058 }
04059     operand0 = operands[0];
04060     operand1 = operands[1];
04061     operand2 = operands[2];
04062     operand3 = operands[3];
04063     operand4 = operands[4];
04064     operand5 = operands[5];
04065     operand6 = operands[6];
04066   }
04067   emit_insn (gen_rtx_SET (VOIDmode,
04068   operand6,
04069   gen_rtx_EQ (BImode,
04070   operand1,
04071   const0_rtx)));
04072   emit_insn (gen_rtx_SET (VOIDmode,
04073   operand2,
04074   gen_rtx_PLUS (DImode,
04075   operand1,
04076   constm1_rtx)));
04077   emit_insn (gen_rtx_SET (VOIDmode,
04078   operand5,
04079   const0_rtx));
04080   emit_insn (gen_rtx_SET (VOIDmode,
04081   operand3,
04082   gen_rtx_XOR (DImode,
04083   operand1,
04084   operand2)));
04085   emit_insn (gen_rtx_SET (VOIDmode,
04086   operand4,
04087   gen_rtx_UNSPEC (DImode,
04088   gen_rtvec (1,
04089     operand3),
04090   16)));
04091   emit_insn (gen_rtx_SET (VOIDmode,
04092   operand0,
04093   gen_rtx_IF_THEN_ELSE (DImode,
04094   gen_rtx_NE (VOIDmode,
04095   operand6,
04096   const0_rtx),
04097   operand5,
04098   operand4)));
04099   _val = get_insns ();
04100   end_sequence ();
04101   return _val;
04102 }
04103 
04104 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2394 */
04105 rtx
04106 gen_divdi3 (operand0, operand1, operand2)
04107      rtx operand0;
04108      rtx operand1;
04109      rtx operand2;
04110 {
04111   rtx _val = 0;
04112   start_sequence ();
04113   {
04114     rtx operands[3];
04115     operands[0] = operand0;
04116     operands[1] = operand1;
04117     operands[2] = operand2;
04118 {
04119   rtx op1_tf, op2_tf, op0_tf;
04120 
04121   op0_tf = gen_reg_rtx (TFmode);
04122 
04123   if (CONSTANT_P (operands[1]))
04124     operands[1] = force_reg (DImode, operands[1]);
04125   op1_tf = gen_reg_rtx (TFmode);
04126   expand_float (op1_tf, operands[1], 0);
04127 
04128   if (CONSTANT_P (operands[2]))
04129     operands[2] = force_reg (DImode, operands[2]);
04130   op2_tf = gen_reg_rtx (TFmode);
04131   expand_float (op2_tf, operands[2], 0);
04132 
04133   if (TARGET_INLINE_INT_DIV_LAT)
04134     emit_insn (gen_divdi3_internal_lat (op0_tf, op1_tf, op2_tf));
04135   else
04136     emit_insn (gen_divdi3_internal_thr (op0_tf, op1_tf, op2_tf));
04137 
04138   emit_insn (gen_fix_trunctfdi2_alts (operands[0], op0_tf, const1_rtx));
04139   DONE;
04140 }
04141     operand0 = operands[0];
04142     operand1 = operands[1];
04143     operand2 = operands[2];
04144   }
04145   emit_insn (gen_rtx_SET (VOIDmode,
04146   operand0,
04147   gen_rtx_DIV (DImode,
04148   operand1,
04149   operand2)));
04150   _val = get_insns ();
04151   end_sequence ();
04152   return _val;
04153 }
04154 
04155 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2423 */
04156 rtx
04157 gen_moddi3 (operand0, operand1, operand2)
04158      rtx operand0;
04159      rtx operand1;
04160      rtx operand2;
04161 {
04162   rtx _val = 0;
04163   start_sequence ();
04164   {
04165     rtx operands[3];
04166     operands[0] = operand0;
04167     operands[1] = operand1;
04168     operands[2] = operand2;
04169 {
04170   rtx op2_neg, div;
04171 
04172   div = gen_reg_rtx (DImode);
04173   emit_insn (gen_divdi3 (div, operands[1], operands[2]));
04174 
04175   op2_neg = expand_unop (DImode, neg_optab, operands[2], NULL_RTX, 0);
04176 
04177   emit_insn (gen_madddi4 (operands[0], div, op2_neg, operands[1]));
04178   DONE;
04179 }
04180     operand0 = operands[0];
04181     operand1 = operands[1];
04182     operand2 = operands[2];
04183   }
04184   emit_insn (gen_rtx_SET (VOIDmode,
04185   operand0,
04186   gen_rtx_MOD (SImode,
04187   operand1,
04188   operand2)));
04189   _val = get_insns ();
04190   end_sequence ();
04191   return _val;
04192 }
04193 
04194 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2440 */
04195 rtx
04196 gen_udivdi3 (operand0, operand1, operand2)
04197      rtx operand0;
04198      rtx operand1;
04199      rtx operand2;
04200 {
04201   rtx _val = 0;
04202   start_sequence ();
04203   {
04204     rtx operands[3];
04205     operands[0] = operand0;
04206     operands[1] = operand1;
04207     operands[2] = operand2;
04208 {
04209   rtx op1_tf, op2_tf, op0_tf;
04210 
04211   op0_tf = gen_reg_rtx (TFmode);
04212 
04213   if (CONSTANT_P (operands[1]))
04214     operands[1] = force_reg (DImode, operands[1]);
04215   op1_tf = gen_reg_rtx (TFmode);
04216   expand_float (op1_tf, operands[1], 1);
04217 
04218   if (CONSTANT_P (operands[2]))
04219     operands[2] = force_reg (DImode, operands[2]);
04220   op2_tf = gen_reg_rtx (TFmode);
04221   expand_float (op2_tf, operands[2], 1);
04222 
04223   if (TARGET_INLINE_INT_DIV_LAT)
04224     emit_insn (gen_divdi3_internal_lat (op0_tf, op1_tf, op2_tf));
04225   else
04226     emit_insn (gen_divdi3_internal_thr (op0_tf, op1_tf, op2_tf));
04227 
04228   emit_insn (gen_fixuns_trunctfdi2_alts (operands[0], op0_tf, const1_rtx));
04229   DONE;
04230 }
04231     operand0 = operands[0];
04232     operand1 = operands[1];
04233     operand2 = operands[2];
04234   }
04235   emit_insn (gen_rtx_SET (VOIDmode,
04236   operand0,
04237   gen_rtx_UDIV (DImode,
04238   operand1,
04239   operand2)));
04240   _val = get_insns ();
04241   end_sequence ();
04242   return _val;
04243 }
04244 
04245 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2469 */
04246 rtx
04247 gen_umoddi3 (operand0, operand1, operand2)
04248      rtx operand0;
04249      rtx operand1;
04250      rtx operand2;
04251 {
04252   rtx _val = 0;
04253   start_sequence ();
04254   {
04255     rtx operands[3];
04256     operands[0] = operand0;
04257     operands[1] = operand1;
04258     operands[2] = operand2;
04259 {
04260   rtx op2_neg, div;
04261 
04262   div = gen_reg_rtx (DImode);
04263   emit_insn (gen_udivdi3 (div, operands[1], operands[2]));
04264 
04265   op2_neg = expand_unop (DImode, neg_optab, operands[2], NULL_RTX, 0);
04266 
04267   emit_insn (gen_madddi4 (operands[0], div, op2_neg, operands[1]));
04268   DONE;
04269 }
04270     operand0 = operands[0];
04271     operand1 = operands[1];
04272     operand2 = operands[2];
04273   }
04274   emit_insn (gen_rtx_SET (VOIDmode,
04275   operand0,
04276   gen_rtx_UMOD (DImode,
04277   operand1,
04278   operand2)));
04279   _val = get_insns ();
04280   end_sequence ();
04281   return _val;
04282 }
04283 
04284 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2486 */
04285 extern rtx gen_split_335 PARAMS ((rtx *));
04286 rtx
04287 gen_split_335 (operands)
04288       rtx *operands;
04289 {
04290   rtx operand0;
04291   rtx operand1;
04292   rtx operand2;
04293   rtx operand3;
04294   rtx operand4;
04295   rtx operand5;
04296   rtx operand6;
04297   rtx operand7;
04298   rtx _val = 0;
04299   start_sequence ();
04300 operands[7] = CONST1_RTX (TFmode);
04301   operand0 = operands[0];
04302   operand1 = operands[1];
04303   operand2 = operands[2];
04304   operand3 = operands[3];
04305   operand4 = operands[4];
04306   operand5 = operands[5];
04307   operand6 = operands[6];
04308   operand7 = operands[7];
04309   emit (gen_rtx_PARALLEL (VOIDmode,
04310   gen_rtvec (3,
04311     gen_rtx_SET (VOIDmode,
04312   operand0,
04313   gen_rtx_DIV (TFmode,
04314   const1_rtx,
04315   operand2)),
04316     gen_rtx_SET (VOIDmode,
04317   operand6,
04318   gen_rtx_UNSPEC (BImode,
04319   gen_rtvec (2,
04320     operand1,
04321     copy_rtx (operand2)),
04322   14)),
04323     gen_rtx_USE (VOIDmode,
04324   const1_rtx))));
04325   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04326   gen_rtx_NE (VOIDmode,
04327   copy_rtx (operand6),
04328   const0_rtx),
04329   gen_rtx_PARALLEL (VOIDmode,
04330   gen_rtvec (2,
04331     gen_rtx_SET (VOIDmode,
04332   operand3,
04333   gen_rtx_PLUS (TFmode,
04334   gen_rtx_NEG (TFmode,
04335   gen_rtx_MULT (TFmode,
04336   copy_rtx (operand2),
04337   copy_rtx (operand0))),
04338   operand7)),
04339     gen_rtx_USE (VOIDmode,
04340   const1_rtx)))));
04341   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04342   gen_rtx_NE (VOIDmode,
04343   copy_rtx (operand6),
04344   const0_rtx),
04345   gen_rtx_PARALLEL (VOIDmode,
04346   gen_rtvec (2,
04347     gen_rtx_SET (VOIDmode,
04348   operand4,
04349   gen_rtx_MULT (TFmode,
04350   copy_rtx (operand1),
04351   copy_rtx (operand0))),
04352     gen_rtx_USE (VOIDmode,
04353   const1_rtx)))));
04354   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04355   gen_rtx_NE (VOIDmode,
04356   copy_rtx (operand6),
04357   const0_rtx),
04358   gen_rtx_PARALLEL (VOIDmode,
04359   gen_rtvec (2,
04360     gen_rtx_SET (VOIDmode,
04361   operand5,
04362   gen_rtx_MULT (TFmode,
04363   copy_rtx (operand3),
04364   copy_rtx (operand3))),
04365     gen_rtx_USE (VOIDmode,
04366   const1_rtx)))));
04367   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04368   gen_rtx_NE (VOIDmode,
04369   copy_rtx (operand6),
04370   const0_rtx),
04371   gen_rtx_PARALLEL (VOIDmode,
04372   gen_rtvec (2,
04373     gen_rtx_SET (VOIDmode,
04374   copy_rtx (operand4),
04375   gen_rtx_PLUS (TFmode,
04376   gen_rtx_MULT (TFmode,
04377   copy_rtx (operand3),
04378   copy_rtx (operand4)),
04379   copy_rtx (operand4))),
04380     gen_rtx_USE (VOIDmode,
04381   const1_rtx)))));
04382   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04383   gen_rtx_NE (VOIDmode,
04384   copy_rtx (operand6),
04385   const0_rtx),
04386   gen_rtx_PARALLEL (VOIDmode,
04387   gen_rtvec (2,
04388     gen_rtx_SET (VOIDmode,
04389   copy_rtx (operand0),
04390   gen_rtx_PLUS (TFmode,
04391   gen_rtx_MULT (TFmode,
04392   copy_rtx (operand3),
04393   copy_rtx (operand0)),
04394   copy_rtx (operand0))),
04395     gen_rtx_USE (VOIDmode,
04396   const1_rtx)))));
04397   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04398   gen_rtx_NE (VOIDmode,
04399   copy_rtx (operand6),
04400   const0_rtx),
04401   gen_rtx_PARALLEL (VOIDmode,
04402   gen_rtvec (2,
04403     gen_rtx_SET (VOIDmode,
04404   copy_rtx (operand3),
04405   gen_rtx_PLUS (TFmode,
04406   gen_rtx_MULT (TFmode,
04407   copy_rtx (operand5),
04408   copy_rtx (operand4)),
04409   copy_rtx (operand4))),
04410     gen_rtx_USE (VOIDmode,
04411   const1_rtx)))));
04412   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04413   gen_rtx_NE (VOIDmode,
04414   copy_rtx (operand6),
04415   const0_rtx),
04416   gen_rtx_PARALLEL (VOIDmode,
04417   gen_rtvec (2,
04418     gen_rtx_SET (VOIDmode,
04419   copy_rtx (operand0),
04420   gen_rtx_PLUS (TFmode,
04421   gen_rtx_MULT (TFmode,
04422   copy_rtx (operand5),
04423   copy_rtx (operand0)),
04424   copy_rtx (operand0))),
04425     gen_rtx_USE (VOIDmode,
04426   const1_rtx)))));
04427   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04428   gen_rtx_NE (VOIDmode,
04429   copy_rtx (operand6),
04430   const0_rtx),
04431   gen_rtx_PARALLEL (VOIDmode,
04432   gen_rtvec (2,
04433     gen_rtx_SET (VOIDmode,
04434   copy_rtx (operand4),
04435   gen_rtx_PLUS (TFmode,
04436   gen_rtx_NEG (TFmode,
04437   gen_rtx_MULT (TFmode,
04438   copy_rtx (operand2),
04439   copy_rtx (operand3))),
04440   copy_rtx (operand1))),
04441     gen_rtx_USE (VOIDmode,
04442   const1_rtx)))));
04443   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04444   gen_rtx_NE (VOIDmode,
04445   copy_rtx (operand6),
04446   const0_rtx),
04447   gen_rtx_PARALLEL (VOIDmode,
04448   gen_rtvec (2,
04449     gen_rtx_SET (VOIDmode,
04450   copy_rtx (operand0),
04451   gen_rtx_PLUS (TFmode,
04452   gen_rtx_MULT (TFmode,
04453   copy_rtx (operand4),
04454   copy_rtx (operand0)),
04455   copy_rtx (operand3))),
04456     gen_rtx_USE (VOIDmode,
04457   const1_rtx)))));
04458   _val = get_insns ();
04459   end_sequence ();
04460   return _val;
04461 }
04462 
04463 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2546 */
04464 extern rtx gen_split_336 PARAMS ((rtx *));
04465 rtx
04466 gen_split_336 (operands)
04467       rtx *operands;
04468 {
04469   rtx operand0;
04470   rtx operand1;
04471   rtx operand2;
04472   rtx operand3;
04473   rtx operand4;
04474   rtx operand5;
04475   rtx operand6;
04476   rtx _val = 0;
04477   start_sequence ();
04478 operands[6] = CONST1_RTX (TFmode);
04479   operand0 = operands[0];
04480   operand1 = operands[1];
04481   operand2 = operands[2];
04482   operand3 = operands[3];
04483   operand4 = operands[4];
04484   operand5 = operands[5];
04485   operand6 = operands[6];
04486   emit (gen_rtx_PARALLEL (VOIDmode,
04487   gen_rtvec (3,
04488     gen_rtx_SET (VOIDmode,
04489   operand0,
04490   gen_rtx_DIV (TFmode,
04491   const1_rtx,
04492   operand2)),
04493     gen_rtx_SET (VOIDmode,
04494   operand5,
04495   gen_rtx_UNSPEC (BImode,
04496   gen_rtvec (2,
04497     operand1,
04498     copy_rtx (operand2)),
04499   14)),
04500     gen_rtx_USE (VOIDmode,
04501   const1_rtx))));
04502   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04503   gen_rtx_NE (VOIDmode,
04504   copy_rtx (operand5),
04505   const0_rtx),
04506   gen_rtx_PARALLEL (VOIDmode,
04507   gen_rtvec (2,
04508     gen_rtx_SET (VOIDmode,
04509   operand3,
04510   gen_rtx_PLUS (TFmode,
04511   gen_rtx_NEG (TFmode,
04512   gen_rtx_MULT (TFmode,
04513   copy_rtx (operand2),
04514   copy_rtx (operand0))),
04515   operand6)),
04516     gen_rtx_USE (VOIDmode,
04517   const1_rtx)))));
04518   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04519   gen_rtx_NE (VOIDmode,
04520   copy_rtx (operand5),
04521   const0_rtx),
04522   gen_rtx_PARALLEL (VOIDmode,
04523   gen_rtvec (2,
04524     gen_rtx_SET (VOIDmode,
04525   copy_rtx (operand0),
04526   gen_rtx_PLUS (TFmode,
04527   gen_rtx_MULT (TFmode,
04528   copy_rtx (operand3),
04529   copy_rtx (operand0)),
04530   copy_rtx (operand0))),
04531     gen_rtx_USE (VOIDmode,
04532   const1_rtx)))));
04533   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04534   gen_rtx_NE (VOIDmode,
04535   copy_rtx (operand5),
04536   const0_rtx),
04537   gen_rtx_PARALLEL (VOIDmode,
04538   gen_rtvec (2,
04539     gen_rtx_SET (VOIDmode,
04540   copy_rtx (operand3),
04541   gen_rtx_MULT (TFmode,
04542   copy_rtx (operand3),
04543   copy_rtx (operand3))),
04544     gen_rtx_USE (VOIDmode,
04545   const1_rtx)))));
04546   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04547   gen_rtx_NE (VOIDmode,
04548   copy_rtx (operand5),
04549   const0_rtx),
04550   gen_rtx_PARALLEL (VOIDmode,
04551   gen_rtvec (2,
04552     gen_rtx_SET (VOIDmode,
04553   copy_rtx (operand0),
04554   gen_rtx_PLUS (TFmode,
04555   gen_rtx_MULT (TFmode,
04556   copy_rtx (operand3),
04557   copy_rtx (operand0)),
04558   copy_rtx (operand0))),
04559     gen_rtx_USE (VOIDmode,
04560   const1_rtx)))));
04561   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04562   gen_rtx_NE (VOIDmode,
04563   copy_rtx (operand5),
04564   const0_rtx),
04565   gen_rtx_PARALLEL (VOIDmode,
04566   gen_rtvec (2,
04567     gen_rtx_SET (VOIDmode,
04568   copy_rtx (operand3),
04569   gen_rtx_MULT (TFmode,
04570   copy_rtx (operand0),
04571   copy_rtx (operand1))),
04572     gen_rtx_USE (VOIDmode,
04573   const1_rtx)))));
04574   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04575   gen_rtx_NE (VOIDmode,
04576   copy_rtx (operand5),
04577   const0_rtx),
04578   gen_rtx_PARALLEL (VOIDmode,
04579   gen_rtvec (2,
04580     gen_rtx_SET (VOIDmode,
04581   operand4,
04582   gen_rtx_PLUS (TFmode,
04583   gen_rtx_NEG (TFmode,
04584   gen_rtx_MULT (TFmode,
04585   copy_rtx (operand2),
04586   copy_rtx (operand3))),
04587   copy_rtx (operand1))),
04588     gen_rtx_USE (VOIDmode,
04589   const1_rtx)))));
04590   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04591   gen_rtx_NE (VOIDmode,
04592   copy_rtx (operand5),
04593   const0_rtx),
04594   gen_rtx_PARALLEL (VOIDmode,
04595   gen_rtvec (2,
04596     gen_rtx_SET (VOIDmode,
04597   copy_rtx (operand0),
04598   gen_rtx_PLUS (TFmode,
04599   gen_rtx_MULT (TFmode,
04600   copy_rtx (operand4),
04601   copy_rtx (operand0)),
04602   copy_rtx (operand3))),
04603     gen_rtx_USE (VOIDmode,
04604   const1_rtx)))));
04605   _val = get_insns ();
04606   end_sequence ();
04607   return _val;
04608 }
04609 
04610 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2700 */
04611 rtx
04612 gen_divsf3 (operand0, operand1, operand2)
04613      rtx operand0;
04614      rtx operand1;
04615      rtx operand2;
04616 {
04617   rtx _val = 0;
04618   start_sequence ();
04619   {
04620     rtx operands[3];
04621     operands[0] = operand0;
04622     operands[1] = operand1;
04623     operands[2] = operand2;
04624 {
04625   rtx insn;
04626   if (TARGET_INLINE_FLOAT_DIV_LAT)
04627     insn = gen_divsf3_internal_lat (operands[0], operands[1], operands[2]);
04628   else
04629     insn = gen_divsf3_internal_thr (operands[0], operands[1], operands[2]);
04630   emit_insn (insn);
04631   DONE;
04632 }
04633     operand0 = operands[0];
04634     operand1 = operands[1];
04635     operand2 = operands[2];
04636   }
04637   emit_insn (gen_rtx_SET (VOIDmode,
04638   operand0,
04639   gen_rtx_DIV (SFmode,
04640   operand1,
04641   operand2)));
04642   _val = get_insns ();
04643   end_sequence ();
04644   return _val;
04645 }
04646 
04647 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2715 */
04648 extern rtx gen_split_338 PARAMS ((rtx *));
04649 rtx
04650 gen_split_338 (operands)
04651       rtx *operands;
04652 {
04653   rtx operand0;
04654   rtx operand1;
04655   rtx operand2;
04656   rtx operand3;
04657   rtx operand4;
04658   rtx operand5;
04659   rtx operand6;
04660   rtx operand7;
04661   rtx operand8;
04662   rtx operand9;
04663   rtx operand10;
04664   rtx _val = 0;
04665   start_sequence ();
04666 {
04667   operands[6] = gen_rtx_REG (TFmode, REGNO (operands[0]));
04668   operands[7] = gen_rtx_REG (TFmode, REGNO (operands[1]));
04669   operands[8] = gen_rtx_REG (TFmode, REGNO (operands[2]));
04670   operands[9] = gen_rtx_REG (DFmode, REGNO (operands[0]));
04671   operands[10] = CONST1_RTX (TFmode);
04672 }
04673   operand0 = operands[0];
04674   operand1 = operands[1];
04675   operand2 = operands[2];
04676   operand3 = operands[3];
04677   operand4 = operands[4];
04678   operand5 = operands[5];
04679   operand6 = operands[6];
04680   operand7 = operands[7];
04681   operand8 = operands[8];
04682   operand9 = operands[9];
04683   operand10 = operands[10];
04684   emit (gen_rtx_PARALLEL (VOIDmode,
04685   gen_rtvec (3,
04686     gen_rtx_SET (VOIDmode,
04687   operand6,
04688   gen_rtx_DIV (TFmode,
04689   const1_rtx,
04690   operand8)),
04691     gen_rtx_SET (VOIDmode,
04692   operand5,
04693   gen_rtx_UNSPEC (BImode,
04694   gen_rtvec (2,
04695     operand7,
04696     copy_rtx (operand8)),
04697   14)),
04698     gen_rtx_USE (VOIDmode,
04699   const1_rtx))));
04700   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04701   gen_rtx_NE (VOIDmode,
04702   copy_rtx (operand5),
04703   const0_rtx),
04704   gen_rtx_PARALLEL (VOIDmode,
04705   gen_rtvec (2,
04706     gen_rtx_SET (VOIDmode,
04707   operand3,
04708   gen_rtx_MULT (TFmode,
04709   copy_rtx (operand7),
04710   copy_rtx (operand6))),
04711     gen_rtx_USE (VOIDmode,
04712   const1_rtx)))));
04713   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04714   gen_rtx_NE (VOIDmode,
04715   copy_rtx (operand5),
04716   const0_rtx),
04717   gen_rtx_PARALLEL (VOIDmode,
04718   gen_rtvec (2,
04719     gen_rtx_SET (VOIDmode,
04720   operand4,
04721   gen_rtx_PLUS (TFmode,
04722   gen_rtx_NEG (TFmode,
04723   gen_rtx_MULT (TFmode,
04724   copy_rtx (operand8),
04725   copy_rtx (operand6))),
04726   operand10)),
04727     gen_rtx_USE (VOIDmode,
04728   const1_rtx)))));
04729   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04730   gen_rtx_NE (VOIDmode,
04731   copy_rtx (operand5),
04732   const0_rtx),
04733   gen_rtx_PARALLEL (VOIDmode,
04734   gen_rtvec (2,
04735     gen_rtx_SET (VOIDmode,
04736   copy_rtx (operand3),
04737   gen_rtx_PLUS (TFmode,
04738   gen_rtx_MULT (TFmode,
04739   copy_rtx (operand4),
04740   copy_rtx (operand3)),
04741   copy_rtx (operand3))),
04742     gen_rtx_USE (VOIDmode,
04743   const1_rtx)))));
04744   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04745   gen_rtx_NE (VOIDmode,
04746   copy_rtx (operand5),
04747   const0_rtx),
04748   gen_rtx_PARALLEL (VOIDmode,
04749   gen_rtvec (2,
04750     gen_rtx_SET (VOIDmode,
04751   copy_rtx (operand4),
04752   gen_rtx_MULT (TFmode,
04753   copy_rtx (operand4),
04754   copy_rtx (operand4))),
04755     gen_rtx_USE (VOIDmode,
04756   const1_rtx)))));
04757   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04758   gen_rtx_NE (VOIDmode,
04759   copy_rtx (operand5),
04760   const0_rtx),
04761   gen_rtx_PARALLEL (VOIDmode,
04762   gen_rtvec (2,
04763     gen_rtx_SET (VOIDmode,
04764   copy_rtx (operand3),
04765   gen_rtx_PLUS (TFmode,
04766   gen_rtx_MULT (TFmode,
04767   copy_rtx (operand4),
04768   copy_rtx (operand3)),
04769   copy_rtx (operand3))),
04770     gen_rtx_USE (VOIDmode,
04771   const1_rtx)))));
04772   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04773   gen_rtx_NE (VOIDmode,
04774   copy_rtx (operand5),
04775   const0_rtx),
04776   gen_rtx_PARALLEL (VOIDmode,
04777   gen_rtvec (2,
04778     gen_rtx_SET (VOIDmode,
04779   copy_rtx (operand4),
04780   gen_rtx_MULT (TFmode,
04781   copy_rtx (operand4),
04782   copy_rtx (operand4))),
04783     gen_rtx_USE (VOIDmode,
04784   const1_rtx)))));
04785   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04786   gen_rtx_NE (VOIDmode,
04787   copy_rtx (operand5),
04788   const0_rtx),
04789   gen_rtx_PARALLEL (VOIDmode,
04790   gen_rtvec (2,
04791     gen_rtx_SET (VOIDmode,
04792   operand9,
04793   gen_rtx_FLOAT_TRUNCATE (DFmode,
04794   gen_rtx_PLUS (TFmode,
04795   gen_rtx_MULT (TFmode,
04796   copy_rtx (operand4),
04797   copy_rtx (operand3)),
04798   copy_rtx (operand3)))),
04799     gen_rtx_USE (VOIDmode,
04800   const1_rtx)))));
04801   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04802   gen_rtx_NE (VOIDmode,
04803   copy_rtx (operand5),
04804   const0_rtx),
04805   gen_rtx_SET (VOIDmode,
04806   operand0,
04807   gen_rtx_FLOAT_TRUNCATE (SFmode,
04808   copy_rtx (operand6)))));
04809   _val = get_insns ();
04810   end_sequence ();
04811   return _val;
04812 }
04813 
04814 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:2772 */
04815 extern rtx gen_split_339 PARAMS ((rtx *));
04816 rtx
04817 gen_split_339 (operands)
04818       rtx *operands;
04819 {
04820   rtx operand0;
04821   rtx operand1;
04822   rtx operand2;
04823   rtx operand3;
04824   rtx operand4;
04825   rtx operand5;
04826   rtx operand6;
04827   rtx operand7;
04828   rtx operand8;
04829   rtx operand9;
04830   rtx operand10;
04831   rtx _val = 0;
04832   start_sequence ();
04833 {
04834   operands[6] = gen_rtx_REG (TFmode, REGNO (operands[0]));
04835   operands[7] = gen_rtx_REG (TFmode, REGNO (operands[1]));
04836   operands[8] = gen_rtx_REG (TFmode, REGNO (operands[2]));
04837   operands[9] = gen_rtx_REG (SFmode, REGNO (operands[3]));
04838   operands[10] = CONST1_RTX (TFmode);
04839 }
04840   operand0 = operands[0];
04841   operand1 = operands[1];
04842   operand2 = operands[2];
04843   operand3 = operands[3];
04844   operand4 = operands[4];
04845   operand5 = operands[5];
04846   operand6 = operands[6];
04847   operand7 = operands[7];
04848   operand8 = operands[8];
04849   operand9 = operands[9];
04850   operand10 = operands[10];
04851   emit (gen_rtx_PARALLEL (VOIDmode,
04852   gen_rtvec (3,
04853     gen_rtx_SET (VOIDmode,
04854   operand6,
04855   gen_rtx_DIV (TFmode,
04856   const1_rtx,
04857   operand8)),
04858     gen_rtx_SET (VOIDmode,
04859   operand5,
04860   gen_rtx_UNSPEC (BImode,
04861   gen_rtvec (2,
04862     operand7,
04863     copy_rtx (operand8)),
04864   14)),
04865     gen_rtx_USE (VOIDmode,
04866   const1_rtx))));
04867   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04868   gen_rtx_NE (VOIDmode,
04869   copy_rtx (operand5),
04870   const0_rtx),
04871   gen_rtx_PARALLEL (VOIDmode,
04872   gen_rtvec (2,
04873     gen_rtx_SET (VOIDmode,
04874   operand3,
04875   gen_rtx_PLUS (TFmode,
04876   gen_rtx_NEG (TFmode,
04877   gen_rtx_MULT (TFmode,
04878   copy_rtx (operand8),
04879   copy_rtx (operand6))),
04880   operand10)),
04881     gen_rtx_USE (VOIDmode,
04882   const1_rtx)))));
04883   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04884   gen_rtx_NE (VOIDmode,
04885   copy_rtx (operand5),
04886   const0_rtx),
04887   gen_rtx_PARALLEL (VOIDmode,
04888   gen_rtvec (2,
04889     gen_rtx_SET (VOIDmode,
04890   copy_rtx (operand3),
04891   gen_rtx_PLUS (TFmode,
04892   gen_rtx_MULT (TFmode,
04893   copy_rtx (operand3),
04894   copy_rtx (operand3)),
04895   copy_rtx (operand3))),
04896     gen_rtx_USE (VOIDmode,
04897   const1_rtx)))));
04898   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04899   gen_rtx_NE (VOIDmode,
04900   copy_rtx (operand5),
04901   const0_rtx),
04902   gen_rtx_PARALLEL (VOIDmode,
04903   gen_rtvec (2,
04904     gen_rtx_SET (VOIDmode,
04905   copy_rtx (operand6),
04906   gen_rtx_PLUS (TFmode,
04907   gen_rtx_MULT (TFmode,
04908   copy_rtx (operand3),
04909   copy_rtx (operand6)),
04910   copy_rtx (operand6))),
04911     gen_rtx_USE (VOIDmode,
04912   const1_rtx)))));
04913   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04914   gen_rtx_NE (VOIDmode,
04915   copy_rtx (operand5),
04916   const0_rtx),
04917   gen_rtx_PARALLEL (VOIDmode,
04918   gen_rtvec (2,
04919     gen_rtx_SET (VOIDmode,
04920   operand9,
04921   gen_rtx_FLOAT_TRUNCATE (SFmode,
04922   gen_rtx_MULT (TFmode,
04923   copy_rtx (operand7),
04924   copy_rtx (operand6)))),
04925     gen_rtx_USE (VOIDmode,
04926   const1_rtx)))));
04927   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04928   gen_rtx_NE (VOIDmode,
04929   copy_rtx (operand5),
04930   const0_rtx),
04931   gen_rtx_PARALLEL (VOIDmode,
04932   gen_rtvec (2,
04933     gen_rtx_SET (VOIDmode,
04934   operand4,
04935   gen_rtx_PLUS (TFmode,
04936   gen_rtx_NEG (TFmode,
04937   gen_rtx_MULT (TFmode,
04938   copy_rtx (operand8),
04939   copy_rtx (operand3))),
04940   copy_rtx (operand7))),
04941     gen_rtx_USE (VOIDmode,
04942   const1_rtx)))));
04943   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
04944   gen_rtx_NE (VOIDmode,
04945   copy_rtx (operand5),
04946   const0_rtx),
04947   gen_rtx_SET (VOIDmode,
04948   operand0,
04949   gen_rtx_FLOAT_TRUNCATE (SFmode,
04950   gen_rtx_PLUS (TFmode,
04951   gen_rtx_MULT (TFmode,
04952   copy_rtx (operand4),
04953   copy_rtx (operand6)),
04954   copy_rtx (operand3))))));
04955   _val = get_insns ();
04956   end_sequence ();
04957   return _val;
04958 }
04959 
04960 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3009 */
04961 rtx
04962 gen_divdf3 (operand0, operand1, operand2)
04963      rtx operand0;
04964      rtx operand1;
04965      rtx operand2;
04966 {
04967   rtx _val = 0;
04968   start_sequence ();
04969   {
04970     rtx operands[3];
04971     operands[0] = operand0;
04972     operands[1] = operand1;
04973     operands[2] = operand2;
04974 {
04975   rtx insn;
04976   if (TARGET_INLINE_FLOAT_DIV_LAT)
04977     insn = gen_divdf3_internal_lat (operands[0], operands[1], operands[2]);
04978   else
04979     insn = gen_divdf3_internal_thr (operands[0], operands[1], operands[2]);
04980   emit_insn (insn);
04981   DONE;
04982 }
04983     operand0 = operands[0];
04984     operand1 = operands[1];
04985     operand2 = operands[2];
04986   }
04987   emit_insn (gen_rtx_SET (VOIDmode,
04988   operand0,
04989   gen_rtx_DIV (DFmode,
04990   operand1,
04991   operand2)));
04992   _val = get_insns ();
04993   end_sequence ();
04994   return _val;
04995 }
04996 
04997 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3024 */
04998 extern rtx gen_split_341 PARAMS ((rtx *));
04999 rtx
05000 gen_split_341 (operands)
05001       rtx *operands;
05002 {
05003   rtx operand0;
05004   rtx operand1;
05005   rtx operand2;
05006   rtx operand3;
05007   rtx operand4;
05008   rtx operand5;
05009   rtx operand6;
05010   rtx operand7;
05011   rtx operand8;
05012   rtx operand9;
05013   rtx operand10;
05014   rtx operand11;
05015   rtx operand12;
05016   rtx _val = 0;
05017   start_sequence ();
05018 {
05019   operands[7] = gen_rtx_REG (TFmode, REGNO (operands[0]));
05020   operands[8] = gen_rtx_REG (TFmode, REGNO (operands[1]));
05021   operands[9] = gen_rtx_REG (TFmode, REGNO (operands[2]));
05022   operands[10] = gen_rtx_REG (DFmode, REGNO (operands[3]));
05023   operands[11] = gen_rtx_REG (DFmode, REGNO (operands[5]));
05024   operands[12] = CONST1_RTX (TFmode);
05025 }
05026   operand0 = operands[0];
05027   operand1 = operands[1];
05028   operand2 = operands[2];
05029   operand3 = operands[3];
05030   operand4 = operands[4];
05031   operand5 = operands[5];
05032   operand6 = operands[6];
05033   operand7 = operands[7];
05034   operand8 = operands[8];
05035   operand9 = operands[9];
05036   operand10 = operands[10];
05037   operand11 = operands[11];
05038   operand12 = operands[12];
05039   emit (gen_rtx_PARALLEL (VOIDmode,
05040   gen_rtvec (3,
05041     gen_rtx_SET (VOIDmode,
05042   operand7,
05043   gen_rtx_DIV (TFmode,
05044   const1_rtx,
05045   operand9)),
05046     gen_rtx_SET (VOIDmode,
05047   operand6,
05048   gen_rtx_UNSPEC (BImode,
05049   gen_rtvec (2,
05050     operand8,
05051     copy_rtx (operand9)),
05052   14)),
05053     gen_rtx_USE (VOIDmode,
05054   const1_rtx))));
05055   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05056   gen_rtx_NE (VOIDmode,
05057   copy_rtx (operand6),
05058   const0_rtx),
05059   gen_rtx_PARALLEL (VOIDmode,
05060   gen_rtvec (2,
05061     gen_rtx_SET (VOIDmode,
05062   operand3,
05063   gen_rtx_MULT (TFmode,
05064   copy_rtx (operand8),
05065   copy_rtx (operand7))),
05066     gen_rtx_USE (VOIDmode,
05067   const1_rtx)))));
05068   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05069   gen_rtx_NE (VOIDmode,
05070   copy_rtx (operand6),
05071   const0_rtx),
05072   gen_rtx_PARALLEL (VOIDmode,
05073   gen_rtvec (2,
05074     gen_rtx_SET (VOIDmode,
05075   operand4,
05076   gen_rtx_PLUS (TFmode,
05077   gen_rtx_NEG (TFmode,
05078   gen_rtx_MULT (TFmode,
05079   copy_rtx (operand9),
05080   copy_rtx (operand7))),
05081   operand12)),
05082     gen_rtx_USE (VOIDmode,
05083   const1_rtx)))));
05084   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05085   gen_rtx_NE (VOIDmode,
05086   copy_rtx (operand6),
05087   const0_rtx),
05088   gen_rtx_PARALLEL (VOIDmode,
05089   gen_rtvec (2,
05090     gen_rtx_SET (VOIDmode,
05091   copy_rtx (operand3),
05092   gen_rtx_PLUS (TFmode,
05093   gen_rtx_MULT (TFmode,
05094   copy_rtx (operand4),
05095   copy_rtx (operand3)),
05096   copy_rtx (operand3))),
05097     gen_rtx_USE (VOIDmode,
05098   const1_rtx)))));
05099   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05100   gen_rtx_NE (VOIDmode,
05101   copy_rtx (operand6),
05102   const0_rtx),
05103   gen_rtx_PARALLEL (VOIDmode,
05104   gen_rtvec (2,
05105     gen_rtx_SET (VOIDmode,
05106   operand5,
05107   gen_rtx_MULT (TFmode,
05108   copy_rtx (operand4),
05109   copy_rtx (operand4))),
05110     gen_rtx_USE (VOIDmode,
05111   const1_rtx)))));
05112   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05113   gen_rtx_NE (VOIDmode,
05114   copy_rtx (operand6),
05115   const0_rtx),
05116   gen_rtx_PARALLEL (VOIDmode,
05117   gen_rtvec (2,
05118     gen_rtx_SET (VOIDmode,
05119   copy_rtx (operand7),
05120   gen_rtx_PLUS (TFmode,
05121   gen_rtx_MULT (TFmode,
05122   copy_rtx (operand4),
05123   copy_rtx (operand7)),
05124   copy_rtx (operand7))),
05125     gen_rtx_USE (VOIDmode,
05126   const1_rtx)))));
05127   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05128   gen_rtx_NE (VOIDmode,
05129   copy_rtx (operand6),
05130   const0_rtx),
05131   gen_rtx_PARALLEL (VOIDmode,
05132   gen_rtvec (2,
05133     gen_rtx_SET (VOIDmode,
05134   copy_rtx (operand3),
05135   gen_rtx_PLUS (TFmode,
05136   gen_rtx_MULT (TFmode,
05137   copy_rtx (operand5),
05138   copy_rtx (operand3)),
05139   copy_rtx (operand3))),
05140     gen_rtx_USE (VOIDmode,
05141   const1_rtx)))));
05142   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05143   gen_rtx_NE (VOIDmode,
05144   copy_rtx (operand6),
05145   const0_rtx),
05146   gen_rtx_PARALLEL (VOIDmode,
05147   gen_rtvec (2,
05148     gen_rtx_SET (VOIDmode,
05149   copy_rtx (operand4),
05150   gen_rtx_MULT (TFmode,
05151   copy_rtx (operand5),
05152   copy_rtx (operand5))),
05153     gen_rtx_USE (VOIDmode,
05154   const1_rtx)))));
05155   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05156   gen_rtx_NE (VOIDmode,
05157   copy_rtx (operand6),
05158   const0_rtx),
05159   gen_rtx_PARALLEL (VOIDmode,
05160   gen_rtvec (2,
05161     gen_rtx_SET (VOIDmode,
05162   copy_rtx (operand7),
05163   gen_rtx_PLUS (TFmode,
05164   gen_rtx_MULT (TFmode,
05165   copy_rtx (operand5),
05166   copy_rtx (operand7)),
05167   copy_rtx (operand7))),
05168     gen_rtx_USE (VOIDmode,
05169   const1_rtx)))));
05170   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05171   gen_rtx_NE (VOIDmode,
05172   copy_rtx (operand6),
05173   const0_rtx),
05174   gen_rtx_PARALLEL (VOIDmode,
05175   gen_rtvec (2,
05176     gen_rtx_SET (VOIDmode,
05177   operand10,
05178   gen_rtx_FLOAT_TRUNCATE (DFmode,
05179   gen_rtx_PLUS (TFmode,
05180   gen_rtx_MULT (TFmode,
05181   copy_rtx (operand4),
05182   copy_rtx (operand3)),
05183   copy_rtx (operand3)))),
05184     gen_rtx_USE (VOIDmode,
05185   const1_rtx)))));
05186   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05187   gen_rtx_NE (VOIDmode,
05188   copy_rtx (operand6),
05189   const0_rtx),
05190   gen_rtx_PARALLEL (VOIDmode,
05191   gen_rtvec (2,
05192     gen_rtx_SET (VOIDmode,
05193   copy_rtx (operand7),
05194   gen_rtx_PLUS (TFmode,
05195   gen_rtx_MULT (TFmode,
05196   copy_rtx (operand4),
05197   copy_rtx (operand7)),
05198   copy_rtx (operand7))),
05199     gen_rtx_USE (VOIDmode,
05200   const1_rtx)))));
05201   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05202   gen_rtx_NE (VOIDmode,
05203   copy_rtx (operand6),
05204   const0_rtx),
05205   gen_rtx_PARALLEL (VOIDmode,
05206   gen_rtvec (2,
05207     gen_rtx_SET (VOIDmode,
05208   operand11,
05209   gen_rtx_FLOAT_TRUNCATE (DFmode,
05210   gen_rtx_PLUS (TFmode,
05211   gen_rtx_NEG (TFmode,
05212   gen_rtx_MULT (TFmode,
05213   copy_rtx (operand9),
05214   copy_rtx (operand3))),
05215   copy_rtx (operand8)))),
05216     gen_rtx_USE (VOIDmode,
05217   const1_rtx)))));
05218   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05219   gen_rtx_NE (VOIDmode,
05220   copy_rtx (operand6),
05221   const0_rtx),
05222   gen_rtx_SET (VOIDmode,
05223   operand0,
05224   gen_rtx_FLOAT_TRUNCATE (DFmode,
05225   gen_rtx_PLUS (TFmode,
05226   gen_rtx_MULT (TFmode,
05227   copy_rtx (operand5),
05228   copy_rtx (operand7)),
05229   copy_rtx (operand3))))));
05230   _val = get_insns ();
05231   end_sequence ();
05232   return _val;
05233 }
05234 
05235 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3105 */
05236 extern rtx gen_split_342 PARAMS ((rtx *));
05237 rtx
05238 gen_split_342 (operands)
05239       rtx *operands;
05240 {
05241   rtx operand0;
05242   rtx operand1;
05243   rtx operand2;
05244   rtx operand3;
05245   rtx operand4;
05246   rtx operand5;
05247   rtx operand6;
05248   rtx operand7;
05249   rtx operand8;
05250   rtx operand9;
05251   rtx operand10;
05252   rtx _val = 0;
05253   start_sequence ();
05254 {
05255   operands[6] = gen_rtx_REG (TFmode, REGNO (operands[0]));
05256   operands[7] = gen_rtx_REG (TFmode, REGNO (operands[1]));
05257   operands[8] = gen_rtx_REG (TFmode, REGNO (operands[2]));
05258   operands[9] = gen_rtx_REG (DFmode, REGNO (operands[3]));
05259   operands[10] = CONST1_RTX (TFmode);
05260 }
05261   operand0 = operands[0];
05262   operand1 = operands[1];
05263   operand2 = operands[2];
05264   operand3 = operands[3];
05265   operand4 = operands[4];
05266   operand5 = operands[5];
05267   operand6 = operands[6];
05268   operand7 = operands[7];
05269   operand8 = operands[8];
05270   operand9 = operands[9];
05271   operand10 = operands[10];
05272   emit (gen_rtx_PARALLEL (VOIDmode,
05273   gen_rtvec (3,
05274     gen_rtx_SET (VOIDmode,
05275   operand6,
05276   gen_rtx_DIV (TFmode,
05277   const1_rtx,
05278   operand8)),
05279     gen_rtx_SET (VOIDmode,
05280   operand5,
05281   gen_rtx_UNSPEC (BImode,
05282   gen_rtvec (2,
05283     operand7,
05284     copy_rtx (operand8)),
05285   14)),
05286     gen_rtx_USE (VOIDmode,
05287   const1_rtx))));
05288   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05289   gen_rtx_NE (VOIDmode,
05290   copy_rtx (operand5),
05291   const0_rtx),
05292   gen_rtx_PARALLEL (VOIDmode,
05293   gen_rtvec (2,
05294     gen_rtx_SET (VOIDmode,
05295   operand3,
05296   gen_rtx_PLUS (TFmode,
05297   gen_rtx_NEG (TFmode,
05298   gen_rtx_MULT (TFmode,
05299   copy_rtx (operand8),
05300   copy_rtx (operand6))),
05301   operand10)),
05302     gen_rtx_USE (VOIDmode,
05303   const1_rtx)))));
05304   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05305   gen_rtx_NE (VOIDmode,
05306   copy_rtx (operand5),
05307   const0_rtx),
05308   gen_rtx_PARALLEL (VOIDmode,
05309   gen_rtvec (2,
05310     gen_rtx_SET (VOIDmode,
05311   copy_rtx (operand6),
05312   gen_rtx_PLUS (TFmode,
05313   gen_rtx_MULT (TFmode,
05314   copy_rtx (operand3),
05315   copy_rtx (operand6)),
05316   copy_rtx (operand6))),
05317     gen_rtx_USE (VOIDmode,
05318   const1_rtx)))));
05319   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05320   gen_rtx_NE (VOIDmode,
05321   copy_rtx (operand5),
05322   const0_rtx),
05323   gen_rtx_PARALLEL (VOIDmode,
05324   gen_rtvec (2,
05325     gen_rtx_SET (VOIDmode,
05326   copy_rtx (operand3),
05327   gen_rtx_MULT (TFmode,
05328   copy_rtx (operand3),
05329   copy_rtx (operand3))),
05330     gen_rtx_USE (VOIDmode,
05331   const1_rtx)))));
05332   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05333   gen_rtx_NE (VOIDmode,
05334   copy_rtx (operand5),
05335   const0_rtx),
05336   gen_rtx_PARALLEL (VOIDmode,
05337   gen_rtvec (2,
05338     gen_rtx_SET (VOIDmode,
05339   copy_rtx (operand6),
05340   gen_rtx_PLUS (TFmode,
05341   gen_rtx_MULT (TFmode,
05342   copy_rtx (operand3),
05343   copy_rtx (operand6)),
05344   copy_rtx (operand6))),
05345     gen_rtx_USE (VOIDmode,
05346   const1_rtx)))));
05347   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05348   gen_rtx_NE (VOIDmode,
05349   copy_rtx (operand5),
05350   const0_rtx),
05351   gen_rtx_PARALLEL (VOIDmode,
05352   gen_rtvec (2,
05353     gen_rtx_SET (VOIDmode,
05354   copy_rtx (operand3),
05355   gen_rtx_MULT (TFmode,
05356   copy_rtx (operand3),
05357   copy_rtx (operand3))),
05358     gen_rtx_USE (VOIDmode,
05359   const1_rtx)))));
05360   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05361   gen_rtx_NE (VOIDmode,
05362   copy_rtx (operand5),
05363   const0_rtx),
05364   gen_rtx_PARALLEL (VOIDmode,
05365   gen_rtvec (2,
05366     gen_rtx_SET (VOIDmode,
05367   copy_rtx (operand6),
05368   gen_rtx_PLUS (TFmode,
05369   gen_rtx_MULT (TFmode,
05370   copy_rtx (operand3),
05371   copy_rtx (operand6)),
05372   copy_rtx (operand6))),
05373     gen_rtx_USE (VOIDmode,
05374   const1_rtx)))));
05375   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05376   gen_rtx_NE (VOIDmode,
05377   copy_rtx (operand5),
05378   const0_rtx),
05379   gen_rtx_PARALLEL (VOIDmode,
05380   gen_rtvec (2,
05381     gen_rtx_SET (VOIDmode,
05382   operand9,
05383   gen_rtx_FLOAT_TRUNCATE (DFmode,
05384   gen_rtx_MULT (TFmode,
05385   copy_rtx (operand7),
05386   copy_rtx (operand3)))),
05387     gen_rtx_USE (VOIDmode,
05388   const1_rtx)))));
05389   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05390   gen_rtx_NE (VOIDmode,
05391   copy_rtx (operand5),
05392   const0_rtx),
05393   gen_rtx_PARALLEL (VOIDmode,
05394   gen_rtvec (2,
05395     gen_rtx_SET (VOIDmode,
05396   operand4,
05397   gen_rtx_PLUS (DFmode,
05398   gen_rtx_NEG (DFmode,
05399   gen_rtx_MULT (DFmode,
05400   operand2,
05401   copy_rtx (operand9))),
05402   operand1)),
05403     gen_rtx_USE (VOIDmode,
05404   const1_rtx)))));
05405   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05406   gen_rtx_NE (VOIDmode,
05407   copy_rtx (operand5),
05408   const0_rtx),
05409   gen_rtx_SET (VOIDmode,
05410   operand0,
05411   gen_rtx_PLUS (DFmode,
05412   gen_rtx_MULT (DFmode,
05413   copy_rtx (operand4),
05414   copy_rtx (operand0)),
05415   copy_rtx (operand9)))));
05416   _val = get_insns ();
05417   end_sequence ();
05418   return _val;
05419 }
05420 
05421 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3486 */
05422 rtx
05423 gen_divtf3 (operand0, operand1, operand2)
05424      rtx operand0;
05425      rtx operand1;
05426      rtx operand2;
05427 {
05428   rtx _val = 0;
05429   start_sequence ();
05430   {
05431     rtx operands[3];
05432     operands[0] = operand0;
05433     operands[1] = operand1;
05434     operands[2] = operand2;
05435 {
05436   rtx insn;
05437   if (TARGET_INLINE_FLOAT_DIV_LAT)
05438     insn = gen_divtf3_internal_lat (operands[0], operands[1], operands[2]);
05439   else
05440     insn = gen_divtf3_internal_thr (operands[0], operands[1], operands[2]);
05441   emit_insn (insn);
05442   DONE;
05443 }
05444     operand0 = operands[0];
05445     operand1 = operands[1];
05446     operand2 = operands[2];
05447   }
05448   emit_insn (gen_rtx_SET (VOIDmode,
05449   operand0,
05450   gen_rtx_DIV (TFmode,
05451   operand1,
05452   operand2)));
05453   _val = get_insns ();
05454   end_sequence ();
05455   return _val;
05456 }
05457 
05458 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3501 */
05459 extern rtx gen_split_344 PARAMS ((rtx *));
05460 rtx
05461 gen_split_344 (operands)
05462       rtx *operands;
05463 {
05464   rtx operand0;
05465   rtx operand1;
05466   rtx operand2;
05467   rtx operand3;
05468   rtx operand4;
05469   rtx operand5;
05470   rtx operand6;
05471   rtx operand7;
05472   rtx operand8;
05473   rtx _val = 0;
05474   start_sequence ();
05475 operands[8] = CONST1_RTX (TFmode);
05476   operand0 = operands[0];
05477   operand1 = operands[1];
05478   operand2 = operands[2];
05479   operand3 = operands[3];
05480   operand4 = operands[4];
05481   operand5 = operands[5];
05482   operand6 = operands[6];
05483   operand7 = operands[7];
05484   operand8 = operands[8];
05485   emit (gen_rtx_PARALLEL (VOIDmode,
05486   gen_rtvec (3,
05487     gen_rtx_SET (VOIDmode,
05488   operand0,
05489   gen_rtx_DIV (TFmode,
05490   const1_rtx,
05491   operand2)),
05492     gen_rtx_SET (VOIDmode,
05493   operand7,
05494   gen_rtx_UNSPEC (BImode,
05495   gen_rtvec (2,
05496     operand1,
05497     copy_rtx (operand2)),
05498   14)),
05499     gen_rtx_USE (VOIDmode,
05500   const1_rtx))));
05501   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05502   gen_rtx_NE (VOIDmode,
05503   copy_rtx (operand7),
05504   const0_rtx),
05505   gen_rtx_PARALLEL (VOIDmode,
05506   gen_rtvec (2,
05507     gen_rtx_SET (VOIDmode,
05508   operand3,
05509   gen_rtx_PLUS (TFmode,
05510   gen_rtx_NEG (TFmode,
05511   gen_rtx_MULT (TFmode,
05512   copy_rtx (operand2),
05513   copy_rtx (operand0))),
05514   operand8)),
05515     gen_rtx_USE (VOIDmode,
05516   const1_rtx)))));
05517   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05518   gen_rtx_NE (VOIDmode,
05519   copy_rtx (operand7),
05520   const0_rtx),
05521   gen_rtx_PARALLEL (VOIDmode,
05522   gen_rtvec (2,
05523     gen_rtx_SET (VOIDmode,
05524   operand4,
05525   gen_rtx_MULT (TFmode,
05526   copy_rtx (operand1),
05527   copy_rtx (operand0))),
05528     gen_rtx_USE (VOIDmode,
05529   const1_rtx)))));
05530   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05531   gen_rtx_NE (VOIDmode,
05532   copy_rtx (operand7),
05533   const0_rtx),
05534   gen_rtx_PARALLEL (VOIDmode,
05535   gen_rtvec (2,
05536     gen_rtx_SET (VOIDmode,
05537   operand5,
05538   gen_rtx_MULT (TFmode,
05539   copy_rtx (operand3),
05540   copy_rtx (operand3))),
05541     gen_rtx_USE (VOIDmode,
05542   const1_rtx)))));
05543   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05544   gen_rtx_NE (VOIDmode,
05545   copy_rtx (operand7),
05546   const0_rtx),
05547   gen_rtx_PARALLEL (VOIDmode,
05548   gen_rtvec (2,
05549     gen_rtx_SET (VOIDmode,
05550   operand6,
05551   gen_rtx_PLUS (TFmode,
05552   gen_rtx_MULT (TFmode,
05553   copy_rtx (operand3),
05554   copy_rtx (operand3)),
05555   copy_rtx (operand3))),
05556     gen_rtx_USE (VOIDmode,
05557   const1_rtx)))));
05558   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05559   gen_rtx_NE (VOIDmode,
05560   copy_rtx (operand7),
05561   const0_rtx),
05562   gen_rtx_PARALLEL (VOIDmode,
05563   gen_rtvec (2,
05564     gen_rtx_SET (VOIDmode,
05565   copy_rtx (operand3),
05566   gen_rtx_PLUS (TFmode,
05567   gen_rtx_MULT (TFmode,
05568   copy_rtx (operand5),
05569   copy_rtx (operand5)),
05570   copy_rtx (operand3))),
05571     gen_rtx_USE (VOIDmode,
05572   const1_rtx)))));
05573   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05574   gen_rtx_NE (VOIDmode,
05575   copy_rtx (operand7),
05576   const0_rtx),
05577   gen_rtx_PARALLEL (VOIDmode,
05578   gen_rtvec (2,
05579     gen_rtx_SET (VOIDmode,
05580   copy_rtx (operand5),
05581   gen_rtx_PLUS (TFmode,
05582   gen_rtx_MULT (TFmode,
05583   copy_rtx (operand6),
05584   copy_rtx (operand0)),
05585   copy_rtx (operand0))),
05586     gen_rtx_USE (VOIDmode,
05587   const1_rtx)))));
05588   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05589   gen_rtx_NE (VOIDmode,
05590   copy_rtx (operand7),
05591   const0_rtx),
05592   gen_rtx_PARALLEL (VOIDmode,
05593   gen_rtvec (2,
05594     gen_rtx_SET (VOIDmode,
05595   copy_rtx (operand0),
05596   gen_rtx_PLUS (TFmode,
05597   gen_rtx_MULT (TFmode,
05598   copy_rtx (operand5),
05599   copy_rtx (operand3)),
05600   copy_rtx (operand0))),
05601     gen_rtx_USE (VOIDmode,
05602   const1_rtx)))));
05603   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05604   gen_rtx_NE (VOIDmode,
05605   copy_rtx (operand7),
05606   const0_rtx),
05607   gen_rtx_PARALLEL (VOIDmode,
05608   gen_rtvec (2,
05609     gen_rtx_SET (VOIDmode,
05610   copy_rtx (operand4),
05611   gen_rtx_PLUS (TFmode,
05612   gen_rtx_NEG (TFmode,
05613   gen_rtx_MULT (TFmode,
05614   copy_rtx (operand2),
05615   copy_rtx (operand4))),
05616   copy_rtx (operand1))),
05617     gen_rtx_USE (VOIDmode,
05618   const1_rtx)))));
05619   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05620   gen_rtx_NE (VOIDmode,
05621   copy_rtx (operand7),
05622   const0_rtx),
05623   gen_rtx_PARALLEL (VOIDmode,
05624   gen_rtvec (2,
05625     gen_rtx_SET (VOIDmode,
05626   copy_rtx (operand3),
05627   gen_rtx_PLUS (TFmode,
05628   gen_rtx_MULT (TFmode,
05629   copy_rtx (operand3),
05630   copy_rtx (operand0)),
05631   copy_rtx (operand4))),
05632     gen_rtx_USE (VOIDmode,
05633   const1_rtx)))));
05634   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05635   gen_rtx_NE (VOIDmode,
05636   copy_rtx (operand7),
05637   const0_rtx),
05638   gen_rtx_PARALLEL (VOIDmode,
05639   gen_rtvec (2,
05640     gen_rtx_SET (VOIDmode,
05641   copy_rtx (operand5),
05642   gen_rtx_PLUS (TFmode,
05643   gen_rtx_NEG (TFmode,
05644   gen_rtx_MULT (TFmode,
05645   copy_rtx (operand2),
05646   copy_rtx (operand0))),
05647   copy_rtx (operand8))),
05648     gen_rtx_USE (VOIDmode,
05649   const1_rtx)))));
05650   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05651   gen_rtx_NE (VOIDmode,
05652   copy_rtx (operand7),
05653   const0_rtx),
05654   gen_rtx_PARALLEL (VOIDmode,
05655   gen_rtvec (2,
05656     gen_rtx_SET (VOIDmode,
05657   copy_rtx (operand0),
05658   gen_rtx_PLUS (TFmode,
05659   gen_rtx_MULT (TFmode,
05660   copy_rtx (operand4),
05661   copy_rtx (operand0)),
05662   copy_rtx (operand0))),
05663     gen_rtx_USE (VOIDmode,
05664   const1_rtx)))));
05665   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05666   gen_rtx_NE (VOIDmode,
05667   copy_rtx (operand7),
05668   const0_rtx),
05669   gen_rtx_PARALLEL (VOIDmode,
05670   gen_rtvec (2,
05671     gen_rtx_SET (VOIDmode,
05672   copy_rtx (operand4),
05673   gen_rtx_PLUS (TFmode,
05674   gen_rtx_NEG (TFmode,
05675   gen_rtx_MULT (TFmode,
05676   copy_rtx (operand2),
05677   copy_rtx (operand3))),
05678   copy_rtx (operand1))),
05679     gen_rtx_USE (VOIDmode,
05680   const1_rtx)))));
05681   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05682   gen_rtx_NE (VOIDmode,
05683   copy_rtx (operand7),
05684   const0_rtx),
05685   gen_rtx_SET (VOIDmode,
05686   copy_rtx (operand0),
05687   gen_rtx_PLUS (TFmode,
05688   gen_rtx_MULT (TFmode,
05689   copy_rtx (operand4),
05690   copy_rtx (operand0)),
05691   copy_rtx (operand3)))));
05692   _val = get_insns ();
05693   end_sequence ();
05694   return _val;
05695 }
05696 
05697 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3581 */
05698 extern rtx gen_split_345 PARAMS ((rtx *));
05699 rtx
05700 gen_split_345 (operands)
05701       rtx *operands;
05702 {
05703   rtx operand0;
05704   rtx operand1;
05705   rtx operand2;
05706   rtx operand3;
05707   rtx operand4;
05708   rtx operand5;
05709   rtx operand6;
05710   rtx _val = 0;
05711   start_sequence ();
05712 operands[6] = CONST1_RTX (TFmode);
05713   operand0 = operands[0];
05714   operand1 = operands[1];
05715   operand2 = operands[2];
05716   operand3 = operands[3];
05717   operand4 = operands[4];
05718   operand5 = operands[5];
05719   operand6 = operands[6];
05720   emit (gen_rtx_PARALLEL (VOIDmode,
05721   gen_rtvec (3,
05722     gen_rtx_SET (VOIDmode,
05723   operand0,
05724   gen_rtx_DIV (TFmode,
05725   const1_rtx,
05726   operand2)),
05727     gen_rtx_SET (VOIDmode,
05728   operand5,
05729   gen_rtx_UNSPEC (BImode,
05730   gen_rtvec (2,
05731     operand1,
05732     copy_rtx (operand2)),
05733   14)),
05734     gen_rtx_USE (VOIDmode,
05735   const1_rtx))));
05736   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05737   gen_rtx_NE (VOIDmode,
05738   copy_rtx (operand5),
05739   const0_rtx),
05740   gen_rtx_PARALLEL (VOIDmode,
05741   gen_rtvec (2,
05742     gen_rtx_SET (VOIDmode,
05743   operand3,
05744   gen_rtx_PLUS (TFmode,
05745   gen_rtx_NEG (TFmode,
05746   gen_rtx_MULT (TFmode,
05747   copy_rtx (operand2),
05748   copy_rtx (operand0))),
05749   operand6)),
05750     gen_rtx_USE (VOIDmode,
05751   const1_rtx)))));
05752   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05753   gen_rtx_NE (VOIDmode,
05754   copy_rtx (operand5),
05755   const0_rtx),
05756   gen_rtx_PARALLEL (VOIDmode,
05757   gen_rtvec (2,
05758     gen_rtx_SET (VOIDmode,
05759   operand4,
05760   gen_rtx_PLUS (TFmode,
05761   gen_rtx_MULT (TFmode,
05762   copy_rtx (operand3),
05763   copy_rtx (operand0)),
05764   copy_rtx (operand0))),
05765     gen_rtx_USE (VOIDmode,
05766   const1_rtx)))));
05767   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05768   gen_rtx_NE (VOIDmode,
05769   copy_rtx (operand5),
05770   const0_rtx),
05771   gen_rtx_PARALLEL (VOIDmode,
05772   gen_rtvec (2,
05773     gen_rtx_SET (VOIDmode,
05774   copy_rtx (operand3),
05775   gen_rtx_MULT (TFmode,
05776   copy_rtx (operand3),
05777   copy_rtx (operand3))),
05778     gen_rtx_USE (VOIDmode,
05779   const1_rtx)))));
05780   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05781   gen_rtx_NE (VOIDmode,
05782   copy_rtx (operand5),
05783   const0_rtx),
05784   gen_rtx_PARALLEL (VOIDmode,
05785   gen_rtvec (2,
05786     gen_rtx_SET (VOIDmode,
05787   copy_rtx (operand3),
05788   gen_rtx_PLUS (TFmode,
05789   gen_rtx_MULT (TFmode,
05790   copy_rtx (operand3),
05791   copy_rtx (operand4)),
05792   copy_rtx (operand4))),
05793     gen_rtx_USE (VOIDmode,
05794   const1_rtx)))));
05795   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05796   gen_rtx_NE (VOIDmode,
05797   copy_rtx (operand5),
05798   const0_rtx),
05799   gen_rtx_PARALLEL (VOIDmode,
05800   gen_rtvec (2,
05801     gen_rtx_SET (VOIDmode,
05802   copy_rtx (operand4),
05803   gen_rtx_MULT (TFmode,
05804   copy_rtx (operand1),
05805   copy_rtx (operand0))),
05806     gen_rtx_USE (VOIDmode,
05807   const1_rtx)))));
05808   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05809   gen_rtx_NE (VOIDmode,
05810   copy_rtx (operand5),
05811   const0_rtx),
05812   gen_rtx_PARALLEL (VOIDmode,
05813   gen_rtvec (2,
05814     gen_rtx_SET (VOIDmode,
05815   copy_rtx (operand0),
05816   gen_rtx_PLUS (TFmode,
05817   gen_rtx_NEG (TFmode,
05818   gen_rtx_MULT (TFmode,
05819   copy_rtx (operand2),
05820   copy_rtx (operand3))),
05821   copy_rtx (operand6))),
05822     gen_rtx_USE (VOIDmode,
05823   const1_rtx)))));
05824   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05825   gen_rtx_NE (VOIDmode,
05826   copy_rtx (operand5),
05827   const0_rtx),
05828   gen_rtx_PARALLEL (VOIDmode,
05829   gen_rtvec (2,
05830     gen_rtx_SET (VOIDmode,
05831   copy_rtx (operand0),
05832   gen_rtx_PLUS (TFmode,
05833   gen_rtx_MULT (TFmode,
05834   copy_rtx (operand0),
05835   copy_rtx (operand3)),
05836   copy_rtx (operand3))),
05837     gen_rtx_USE (VOIDmode,
05838   const1_rtx)))));
05839   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05840   gen_rtx_NE (VOIDmode,
05841   copy_rtx (operand5),
05842   const0_rtx),
05843   gen_rtx_PARALLEL (VOIDmode,
05844   gen_rtvec (2,
05845     gen_rtx_SET (VOIDmode,
05846   copy_rtx (operand3),
05847   gen_rtx_PLUS (TFmode,
05848   gen_rtx_NEG (TFmode,
05849   gen_rtx_MULT (TFmode,
05850   copy_rtx (operand2),
05851   copy_rtx (operand4))),
05852   copy_rtx (operand1))),
05853     gen_rtx_USE (VOIDmode,
05854   const1_rtx)))));
05855   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05856   gen_rtx_NE (VOIDmode,
05857   copy_rtx (operand5),
05858   const0_rtx),
05859   gen_rtx_PARALLEL (VOIDmode,
05860   gen_rtvec (2,
05861     gen_rtx_SET (VOIDmode,
05862   copy_rtx (operand3),
05863   gen_rtx_PLUS (TFmode,
05864   gen_rtx_MULT (TFmode,
05865   copy_rtx (operand3),
05866   copy_rtx (operand0)),
05867   copy_rtx (operand4))),
05868     gen_rtx_USE (VOIDmode,
05869   const1_rtx)))));
05870   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05871   gen_rtx_NE (VOIDmode,
05872   copy_rtx (operand5),
05873   const0_rtx),
05874   gen_rtx_PARALLEL (VOIDmode,
05875   gen_rtvec (2,
05876     gen_rtx_SET (VOIDmode,
05877   copy_rtx (operand4),
05878   gen_rtx_PLUS (TFmode,
05879   gen_rtx_NEG (TFmode,
05880   gen_rtx_MULT (TFmode,
05881   copy_rtx (operand2),
05882   copy_rtx (operand0))),
05883   copy_rtx (operand6))),
05884     gen_rtx_USE (VOIDmode,
05885   const1_rtx)))));
05886   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05887   gen_rtx_NE (VOIDmode,
05888   copy_rtx (operand5),
05889   const0_rtx),
05890   gen_rtx_PARALLEL (VOIDmode,
05891   gen_rtvec (2,
05892     gen_rtx_SET (VOIDmode,
05893   copy_rtx (operand0),
05894   gen_rtx_PLUS (TFmode,
05895   gen_rtx_MULT (TFmode,
05896   copy_rtx (operand4),
05897   copy_rtx (operand0)),
05898   copy_rtx (operand0))),
05899     gen_rtx_USE (VOIDmode,
05900   const1_rtx)))));
05901   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05902   gen_rtx_NE (VOIDmode,
05903   copy_rtx (operand5),
05904   const0_rtx),
05905   gen_rtx_PARALLEL (VOIDmode,
05906   gen_rtvec (2,
05907     gen_rtx_SET (VOIDmode,
05908   copy_rtx (operand4),
05909   gen_rtx_PLUS (TFmode,
05910   gen_rtx_NEG (TFmode,
05911   gen_rtx_MULT (TFmode,
05912   copy_rtx (operand2),
05913   copy_rtx (operand3))),
05914   copy_rtx (operand1))),
05915     gen_rtx_USE (VOIDmode,
05916   const1_rtx)))));
05917   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
05918   gen_rtx_NE (VOIDmode,
05919   copy_rtx (operand5),
05920   const0_rtx),
05921   gen_rtx_SET (VOIDmode,
05922   copy_rtx (operand0),
05923   gen_rtx_PLUS (TFmode,
05924   gen_rtx_MULT (TFmode,
05925   copy_rtx (operand4),
05926   copy_rtx (operand0)),
05927   copy_rtx (operand3)))));
05928   _val = get_insns ();
05929   end_sequence ();
05930   return _val;
05931 }
05932 
05933 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3680 */
05934 rtx
05935 gen_ashlsi3 (operand0, operand1, operand2)
05936      rtx operand0;
05937      rtx operand1;
05938      rtx operand2;
05939 {
05940   rtx _val = 0;
05941   start_sequence ();
05942   {
05943     rtx operands[3];
05944     operands[0] = operand0;
05945     operands[1] = operand1;
05946     operands[2] = operand2;
05947 {
05948   if (GET_CODE (operands[2]) != CONST_INT)
05949     {
05950       /* Why oh why didn't Intel arrange for SHIFT_COUNT_TRUNCATED?  Now
05951    we've got to get rid of stray bits outside the SImode register.  */
05952       rtx subshift = gen_reg_rtx (DImode);
05953       emit_insn (gen_zero_extendsidi2 (subshift, operands[2]));
05954       operands[2] = subshift;
05955     }
05956 }
05957     operand0 = operands[0];
05958     operand1 = operands[1];
05959     operand2 = operands[2];
05960   }
05961   emit_insn (gen_rtx_SET (VOIDmode,
05962   operand0,
05963   gen_rtx_ASHIFT (SImode,
05964   operand1,
05965   operand2)));
05966   _val = get_insns ();
05967   end_sequence ();
05968   return _val;
05969 }
05970 
05971 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3707 */
05972 rtx
05973 gen_ashrsi3 (operand0, operand1, operand2)
05974      rtx operand0;
05975      rtx operand1;
05976      rtx operand2;
05977 {
05978   rtx _val = 0;
05979   start_sequence ();
05980   {
05981     rtx operands[3];
05982     operands[0] = operand0;
05983     operands[1] = operand1;
05984     operands[2] = operand2;
05985 {
05986   rtx subtarget = gen_reg_rtx (DImode);
05987   if (GET_CODE (operands[2]) == CONST_INT)
05988     emit_insn (gen_extv (subtarget, gen_lowpart (DImode, operands[1]),
05989        GEN_INT (32 - INTVAL (operands[2])), operands[2]));
05990   else
05991     {
05992       rtx subshift = gen_reg_rtx (DImode);
05993       emit_insn (gen_extendsidi2 (subtarget, operands[1]));
05994       emit_insn (gen_zero_extendsidi2 (subshift, operands[2]));
05995       emit_insn (gen_ashrdi3 (subtarget, subtarget, subshift));
05996     }
05997   emit_move_insn (gen_lowpart (DImode, operands[0]), subtarget);
05998   DONE;
05999 }
06000     operand0 = operands[0];
06001     operand1 = operands[1];
06002     operand2 = operands[2];
06003   }
06004   emit_insn (gen_rtx_SET (VOIDmode,
06005   operand0,
06006   gen_rtx_ASHIFTRT (SImode,
06007   operand1,
06008   operand2)));
06009   _val = get_insns ();
06010   end_sequence ();
06011   return _val;
06012 }
06013 
06014 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3728 */
06015 rtx
06016 gen_lshrsi3 (operand0, operand1, operand2)
06017      rtx operand0;
06018      rtx operand1;
06019      rtx operand2;
06020 {
06021   rtx _val = 0;
06022   start_sequence ();
06023   {
06024     rtx operands[3];
06025     operands[0] = operand0;
06026     operands[1] = operand1;
06027     operands[2] = operand2;
06028 {
06029   rtx subtarget = gen_reg_rtx (DImode);
06030   if (GET_CODE (operands[2]) == CONST_INT)
06031     emit_insn (gen_extzv (subtarget, gen_lowpart (DImode, operands[1]),
06032         GEN_INT (32 - INTVAL (operands[2])), operands[2]));
06033   else
06034     {
06035       rtx subshift = gen_reg_rtx (DImode);
06036       emit_insn (gen_zero_extendsidi2 (subtarget, operands[1]));
06037       emit_insn (gen_zero_extendsidi2 (subshift, operands[2]));
06038       emit_insn (gen_lshrdi3 (subtarget, subtarget, subshift));
06039     }
06040   emit_move_insn (gen_lowpart (DImode, operands[0]), subtarget);
06041   DONE;
06042 }
06043     operand0 = operands[0];
06044     operand1 = operands[1];
06045     operand2 = operands[2];
06046   }
06047   emit_insn (gen_rtx_SET (VOIDmode,
06048   operand0,
06049   gen_rtx_LSHIFTRT (SImode,
06050   operand1,
06051   operand2)));
06052   _val = get_insns ();
06053   end_sequence ();
06054   return _val;
06055 }
06056 
06057 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3753 */
06058 rtx
06059 gen_rotrsi3 (operand0, operand1, operand2)
06060      rtx operand0;
06061      rtx operand1;
06062      rtx operand2;
06063 {
06064   rtx _val = 0;
06065   start_sequence ();
06066   {
06067     rtx operands[3];
06068     operands[0] = operand0;
06069     operands[1] = operand1;
06070     operands[2] = operand2;
06071 {
06072   if (GET_MODE (operands[2]) != VOIDmode)
06073     {
06074       rtx tmp = gen_reg_rtx (DImode);
06075       emit_insn (gen_zero_extendsidi2 (tmp, operands[2]));
06076       operands[2] = tmp;
06077     }
06078 }
06079     operand0 = operands[0];
06080     operand1 = operands[1];
06081     operand2 = operands[2];
06082   }
06083   emit_insn (gen_rtx_SET (VOIDmode,
06084   operand0,
06085   gen_rtx_ROTATERT (SImode,
06086   operand1,
06087   operand2)));
06088   _val = get_insns ();
06089   end_sequence ();
06090   return _val;
06091 }
06092 
06093 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3767 */
06094 extern rtx gen_split_350 PARAMS ((rtx *));
06095 rtx
06096 gen_split_350 (operands)
06097       rtx *operands;
06098 {
06099   rtx operand0;
06100   rtx operand1;
06101   rtx operand2;
06102   rtx operand3;
06103   rtx _val = 0;
06104   start_sequence ();
06105 operands[3] = gen_rtx_REG (DImode, REGNO (operands[0]));
06106   operand0 = operands[0];
06107   operand1 = operands[1];
06108   operand2 = operands[2];
06109   operand3 = operands[3];
06110   emit_insn (gen_rtx_SET (VOIDmode,
06111   operand3,
06112   gen_rtx_IOR (DImode,
06113   gen_rtx_ZERO_EXTEND (DImode,
06114   operand1),
06115   gen_rtx_ASHIFT (DImode,
06116   gen_rtx_ZERO_EXTEND (DImode,
06117   copy_rtx (operand1)),
06118   GEN_INT (32L)))));
06119   emit_insn (gen_rtx_SET (VOIDmode,
06120   copy_rtx (operand3),
06121   gen_rtx_LSHIFTRT (DImode,
06122   copy_rtx (operand3),
06123   operand2)));
06124   _val = get_insns ();
06125   end_sequence ();
06126   return _val;
06127 }
06128 
06129 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3781 */
06130 rtx
06131 gen_rotlsi3 (operand0, operand1, operand2)
06132      rtx operand0;
06133      rtx operand1;
06134      rtx operand2;
06135 {
06136   rtx _val = 0;
06137   start_sequence ();
06138   {
06139     rtx operands[3];
06140     operands[0] = operand0;
06141     operands[1] = operand1;
06142     operands[2] = operand2;
06143 {
06144   if (! shift_32bit_count_operand (operands[2], SImode))
06145     {
06146       rtx tmp = gen_reg_rtx (SImode);
06147       emit_insn (gen_subsi3 (tmp, GEN_INT (32), operands[2]));
06148       emit_insn (gen_rotrsi3 (operands[0], operands[1], tmp));
06149       DONE;
06150     }
06151 }
06152     operand0 = operands[0];
06153     operand1 = operands[1];
06154     operand2 = operands[2];
06155   }
06156   emit_insn (gen_rtx_SET (VOIDmode,
06157   operand0,
06158   gen_rtx_ROTATE (SImode,
06159   operand1,
06160   operand2)));
06161   _val = get_insns ();
06162   end_sequence ();
06163   return _val;
06164 }
06165 
06166 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3796 */
06167 extern rtx gen_split_352 PARAMS ((rtx *));
06168 rtx
06169 gen_split_352 (operands)
06170       rtx *operands;
06171 {
06172   rtx operand0;
06173   rtx operand1;
06174   rtx operand2;
06175   rtx operand3;
06176   rtx _val = 0;
06177   start_sequence ();
06178 {
06179   operands[3] = gen_rtx_REG (DImode, REGNO (operands[0]));
06180   operands[2] = GEN_INT (32 - INTVAL (operands[2]));
06181 }
06182   operand0 = operands[0];
06183   operand1 = operands[1];
06184   operand2 = operands[2];
06185   operand3 = operands[3];
06186   emit_insn (gen_rtx_SET (VOIDmode,
06187   operand3,
06188   gen_rtx_IOR (DImode,
06189   gen_rtx_ZERO_EXTEND (DImode,
06190   operand1),
06191   gen_rtx_ASHIFT (DImode,
06192   gen_rtx_ZERO_EXTEND (DImode,
06193   copy_rtx (operand1)),
06194   GEN_INT (32L)))));
06195   emit_insn (gen_rtx_SET (VOIDmode,
06196   copy_rtx (operand3),
06197   gen_rtx_LSHIFTRT (DImode,
06198   copy_rtx (operand3),
06199   operand2)));
06200   _val = get_insns ();
06201   end_sequence ();
06202   return _val;
06203 }
06204 
06205 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3849 */
06206 extern rtx gen_split_353 PARAMS ((rtx *));
06207 rtx
06208 gen_split_353 (operands)
06209       rtx *operands;
06210 {
06211   rtx operand0;
06212   rtx operand1;
06213   rtx operand2;
06214   rtx operand3;
06215   rtx operand4;
06216   rtx _val = 0;
06217   start_sequence ();
06218 
06219   operand0 = operands[0];
06220   operand1 = operands[1];
06221   operand2 = operands[2];
06222   operand3 = operands[3];
06223   operand4 = operands[4];
06224   emit_insn (gen_rtx_SET (VOIDmode,
06225   operand0,
06226   gen_rtx_PLUS (DImode,
06227   gen_rtx_MULT (DImode,
06228   operand1,
06229   operand2),
06230   operand3)));
06231   emit_insn (gen_rtx_SET (VOIDmode,
06232   copy_rtx (operand0),
06233   gen_rtx_PLUS (DImode,
06234   copy_rtx (operand0),
06235   operand4)));
06236   _val = get_insns ();
06237   end_sequence ();
06238   return _val;
06239 }
06240 
06241 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3889 */
06242 rtx
06243 gen_rotrdi3 (operand0, operand1, operand2)
06244      rtx operand0;
06245      rtx operand1;
06246      rtx operand2;
06247 {
06248   rtx _val = 0;
06249   start_sequence ();
06250   {
06251     rtx operands[3];
06252     operands[0] = operand0;
06253     operands[1] = operand1;
06254     operands[2] = operand2;
06255 {
06256   if (! shift_count_operand (operands[2], DImode))
06257     FAIL;
06258 }
06259     operand0 = operands[0];
06260     operand1 = operands[1];
06261     operand2 = operands[2];
06262   }
06263   emit_insn (gen_rtx_SET (VOIDmode,
06264   operand0,
06265   gen_rtx_ROTATERT (DImode,
06266   operand1,
06267   operand2)));
06268   _val = get_insns ();
06269   end_sequence ();
06270   return _val;
06271 }
06272 
06273 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:3907 */
06274 rtx
06275 gen_rotldi3 (operand0, operand1, operand2)
06276      rtx operand0;
06277      rtx operand1;
06278      rtx operand2;
06279 {
06280   rtx _val = 0;
06281   start_sequence ();
06282   {
06283     rtx operands[3];
06284     operands[0] = operand0;
06285     operands[1] = operand1;
06286     operands[2] = operand2;
06287 {
06288   if (! shift_count_operand (operands[2], DImode))
06289     FAIL;
06290 }
06291     operand0 = operands[0];
06292     operand1 = operands[1];
06293     operand2 = operands[2];
06294   }
06295   emit_insn (gen_rtx_SET (VOIDmode,
06296   operand0,
06297   gen_rtx_ROTATE (DImode,
06298   operand1,
06299   operand2)));
06300   _val = get_insns ();
06301   end_sequence ();
06302   return _val;
06303 }
06304 
06305 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4011 */
06306 rtx
06307 gen_cmpbi (operand0, operand1)
06308      rtx operand0;
06309      rtx operand1;
06310 {
06311   rtx _val = 0;
06312   start_sequence ();
06313   {
06314     rtx operands[2];
06315     operands[0] = operand0;
06316     operands[1] = operand1;
06317 {
06318   ia64_compare_op0 = operands[0];
06319   ia64_compare_op1 = operands[1];
06320   DONE;
06321 }
06322     operand0 = operands[0];
06323     operand1 = operands[1];
06324   }
06325   emit_insn (gen_rtx_SET (VOIDmode,
06326   cc0_rtx,
06327   gen_rtx_COMPARE (VOIDmode,
06328   operand0,
06329   operand1)));
06330   _val = get_insns ();
06331   end_sequence ();
06332   return _val;
06333 }
06334 
06335 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4022 */
06336 rtx
06337 gen_cmpsi (operand0, operand1)
06338      rtx operand0;
06339      rtx operand1;
06340 {
06341   rtx _val = 0;
06342   start_sequence ();
06343   {
06344     rtx operands[2];
06345     operands[0] = operand0;
06346     operands[1] = operand1;
06347 {
06348   ia64_compare_op0 = operands[0];
06349   ia64_compare_op1 = operands[1];
06350   DONE;
06351 }
06352     operand0 = operands[0];
06353     operand1 = operands[1];
06354   }
06355   emit_insn (gen_rtx_SET (VOIDmode,
06356   cc0_rtx,
06357   gen_rtx_COMPARE (VOIDmode,
06358   operand0,
06359   operand1)));
06360   _val = get_insns ();
06361   end_sequence ();
06362   return _val;
06363 }
06364 
06365 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4033 */
06366 rtx
06367 gen_cmpdi (operand0, operand1)
06368      rtx operand0;
06369      rtx operand1;
06370 {
06371   rtx _val = 0;
06372   start_sequence ();
06373   {
06374     rtx operands[2];
06375     operands[0] = operand0;
06376     operands[1] = operand1;
06377 {
06378   ia64_compare_op0 = operands[0];
06379   ia64_compare_op1 = operands[1];
06380   DONE;
06381 }
06382     operand0 = operands[0];
06383     operand1 = operands[1];
06384   }
06385   emit_insn (gen_rtx_SET (VOIDmode,
06386   cc0_rtx,
06387   gen_rtx_COMPARE (VOIDmode,
06388   operand0,
06389   operand1)));
06390   _val = get_insns ();
06391   end_sequence ();
06392   return _val;
06393 }
06394 
06395 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4044 */
06396 rtx
06397 gen_cmpsf (operand0, operand1)
06398      rtx operand0;
06399      rtx operand1;
06400 {
06401   rtx _val = 0;
06402   start_sequence ();
06403   {
06404     rtx operands[2];
06405     operands[0] = operand0;
06406     operands[1] = operand1;
06407 {
06408   ia64_compare_op0 = operands[0];
06409   ia64_compare_op1 = operands[1];
06410   DONE;
06411 }
06412     operand0 = operands[0];
06413     operand1 = operands[1];
06414   }
06415   emit_insn (gen_rtx_SET (VOIDmode,
06416   cc0_rtx,
06417   gen_rtx_COMPARE (VOIDmode,
06418   operand0,
06419   operand1)));
06420   _val = get_insns ();
06421   end_sequence ();
06422   return _val;
06423 }
06424 
06425 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4055 */
06426 rtx
06427 gen_cmpdf (operand0, operand1)
06428      rtx operand0;
06429      rtx operand1;
06430 {
06431   rtx _val = 0;
06432   start_sequence ();
06433   {
06434     rtx operands[2];
06435     operands[0] = operand0;
06436     operands[1] = operand1;
06437 {
06438   ia64_compare_op0 = operands[0];
06439   ia64_compare_op1 = operands[1];
06440   DONE;
06441 }
06442     operand0 = operands[0];
06443     operand1 = operands[1];
06444   }
06445   emit_insn (gen_rtx_SET (VOIDmode,
06446   cc0_rtx,
06447   gen_rtx_COMPARE (VOIDmode,
06448   operand0,
06449   operand1)));
06450   _val = get_insns ();
06451   end_sequence ();
06452   return _val;
06453 }
06454 
06455 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4066 */
06456 rtx
06457 gen_cmptf (operand0, operand1)
06458      rtx operand0;
06459      rtx operand1;
06460 {
06461   rtx _val = 0;
06462   start_sequence ();
06463   {
06464     rtx operands[2];
06465     operands[0] = operand0;
06466     operands[1] = operand1;
06467 {
06468   ia64_compare_op0 = operands[0];
06469   ia64_compare_op1 = operands[1];
06470   DONE;
06471 }
06472     operand0 = operands[0];
06473     operand1 = operands[1];
06474   }
06475   emit_insn (gen_rtx_SET (VOIDmode,
06476   cc0_rtx,
06477   gen_rtx_COMPARE (VOIDmode,
06478   operand0,
06479   operand1)));
06480   _val = get_insns ();
06481   end_sequence ();
06482   return _val;
06483 }
06484 
06485 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4174 */
06486 rtx
06487 gen_beq (operand0)
06488      rtx operand0;
06489 {
06490   rtx operand1;
06491   rtx _val = 0;
06492   start_sequence ();
06493   {
06494     rtx operands[2];
06495     operands[0] = operand0;
06496 operands[1] = ia64_expand_compare (EQ, VOIDmode);
06497     operand0 = operands[0];
06498     operand1 = operands[1];
06499   }
06500   emit_jump_insn (gen_rtx_SET (VOIDmode,
06501   pc_rtx,
06502   gen_rtx_IF_THEN_ELSE (VOIDmode,
06503   operand1,
06504   gen_rtx_LABEL_REF (VOIDmode,
06505   operand0),
06506   pc_rtx)));
06507   _val = get_insns ();
06508   end_sequence ();
06509   return _val;
06510 }
06511 
06512 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4182 */
06513 rtx
06514 gen_bne (operand0)
06515      rtx operand0;
06516 {
06517   rtx operand1;
06518   rtx _val = 0;
06519   start_sequence ();
06520   {
06521     rtx operands[2];
06522     operands[0] = operand0;
06523 operands[1] = ia64_expand_compare (NE, VOIDmode);
06524     operand0 = operands[0];
06525     operand1 = operands[1];
06526   }
06527   emit_jump_insn (gen_rtx_SET (VOIDmode,
06528   pc_rtx,
06529   gen_rtx_IF_THEN_ELSE (VOIDmode,
06530   operand1,
06531   gen_rtx_LABEL_REF (VOIDmode,
06532   operand0),
06533   pc_rtx)));
06534   _val = get_insns ();
06535   end_sequence ();
06536   return _val;
06537 }
06538 
06539 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4190 */
06540 rtx
06541 gen_blt (operand0)
06542      rtx operand0;
06543 {
06544   rtx operand1;
06545   rtx _val = 0;
06546   start_sequence ();
06547   {
06548     rtx operands[2];
06549     operands[0] = operand0;
06550 operands[1] = ia64_expand_compare (LT, VOIDmode);
06551     operand0 = operands[0];
06552     operand1 = operands[1];
06553   }
06554   emit_jump_insn (gen_rtx_SET (VOIDmode,
06555   pc_rtx,
06556   gen_rtx_IF_THEN_ELSE (VOIDmode,
06557   operand1,
06558   gen_rtx_LABEL_REF (VOIDmode,
06559   operand0),
06560   pc_rtx)));
06561   _val = get_insns ();
06562   end_sequence ();
06563   return _val;
06564 }
06565 
06566 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4198 */
06567 rtx
06568 gen_ble (operand0)
06569      rtx operand0;
06570 {
06571   rtx operand1;
06572   rtx _val = 0;
06573   start_sequence ();
06574   {
06575     rtx operands[2];
06576     operands[0] = operand0;
06577 operands[1] = ia64_expand_compare (LE, VOIDmode);
06578     operand0 = operands[0];
06579     operand1 = operands[1];
06580   }
06581   emit_jump_insn (gen_rtx_SET (VOIDmode,
06582   pc_rtx,
06583   gen_rtx_IF_THEN_ELSE (VOIDmode,
06584   operand1,
06585   gen_rtx_LABEL_REF (VOIDmode,
06586   operand0),
06587   pc_rtx)));
06588   _val = get_insns ();
06589   end_sequence ();
06590   return _val;
06591 }
06592 
06593 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4206 */
06594 rtx
06595 gen_bgt (operand0)
06596      rtx operand0;
06597 {
06598   rtx operand1;
06599   rtx _val = 0;
06600   start_sequence ();
06601   {
06602     rtx operands[2];
06603     operands[0] = operand0;
06604 operands[1] = ia64_expand_compare (GT, VOIDmode);
06605     operand0 = operands[0];
06606     operand1 = operands[1];
06607   }
06608   emit_jump_insn (gen_rtx_SET (VOIDmode,
06609   pc_rtx,
06610   gen_rtx_IF_THEN_ELSE (VOIDmode,
06611   operand1,
06612   gen_rtx_LABEL_REF (VOIDmode,
06613   operand0),
06614   pc_rtx)));
06615   _val = get_insns ();
06616   end_sequence ();
06617   return _val;
06618 }
06619 
06620 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4214 */
06621 rtx
06622 gen_bge (operand0)
06623      rtx operand0;
06624 {
06625   rtx operand1;
06626   rtx _val = 0;
06627   start_sequence ();
06628   {
06629     rtx operands[2];
06630     operands[0] = operand0;
06631 operands[1] = ia64_expand_compare (GE, VOIDmode);
06632     operand0 = operands[0];
06633     operand1 = operands[1];
06634   }
06635   emit_jump_insn (gen_rtx_SET (VOIDmode,
06636   pc_rtx,
06637   gen_rtx_IF_THEN_ELSE (VOIDmode,
06638   operand1,
06639   gen_rtx_LABEL_REF (VOIDmode,
06640   operand0),
06641   pc_rtx)));
06642   _val = get_insns ();
06643   end_sequence ();
06644   return _val;
06645 }
06646 
06647 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4222 */
06648 rtx
06649 gen_bltu (operand0)
06650      rtx operand0;
06651 {
06652   rtx operand1;
06653   rtx _val = 0;
06654   start_sequence ();
06655   {
06656     rtx operands[2];
06657     operands[0] = operand0;
06658 operands[1] = ia64_expand_compare (LTU, VOIDmode);
06659     operand0 = operands[0];
06660     operand1 = operands[1];
06661   }
06662   emit_jump_insn (gen_rtx_SET (VOIDmode,
06663   pc_rtx,
06664   gen_rtx_IF_THEN_ELSE (VOIDmode,
06665   operand1,
06666   gen_rtx_LABEL_REF (VOIDmode,
06667   operand0),
06668   pc_rtx)));
06669   _val = get_insns ();
06670   end_sequence ();
06671   return _val;
06672 }
06673 
06674 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4230 */
06675 rtx
06676 gen_bleu (operand0)
06677      rtx operand0;
06678 {
06679   rtx operand1;
06680   rtx _val = 0;
06681   start_sequence ();
06682   {
06683     rtx operands[2];
06684     operands[0] = operand0;
06685 operands[1] = ia64_expand_compare (LEU, VOIDmode);
06686     operand0 = operands[0];
06687     operand1 = operands[1];
06688   }
06689   emit_jump_insn (gen_rtx_SET (VOIDmode,
06690   pc_rtx,
06691   gen_rtx_IF_THEN_ELSE (VOIDmode,
06692   operand1,
06693   gen_rtx_LABEL_REF (VOIDmode,
06694   operand0),
06695   pc_rtx)));
06696   _val = get_insns ();
06697   end_sequence ();
06698   return _val;
06699 }
06700 
06701 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4238 */
06702 rtx
06703 gen_bgtu (operand0)
06704      rtx operand0;
06705 {
06706   rtx operand1;
06707   rtx _val = 0;
06708   start_sequence ();
06709   {
06710     rtx operands[2];
06711     operands[0] = operand0;
06712 operands[1] = ia64_expand_compare (GTU, VOIDmode);
06713     operand0 = operands[0];
06714     operand1 = operands[1];
06715   }
06716   emit_jump_insn (gen_rtx_SET (VOIDmode,
06717   pc_rtx,
06718   gen_rtx_IF_THEN_ELSE (VOIDmode,
06719   operand1,
06720   gen_rtx_LABEL_REF (VOIDmode,
06721   operand0),
06722   pc_rtx)));
06723   _val = get_insns ();
06724   end_sequence ();
06725   return _val;
06726 }
06727 
06728 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4246 */
06729 rtx
06730 gen_bgeu (operand0)
06731      rtx operand0;
06732 {
06733   rtx operand1;
06734   rtx _val = 0;
06735   start_sequence ();
06736   {
06737     rtx operands[2];
06738     operands[0] = operand0;
06739 operands[1] = ia64_expand_compare (GEU, VOIDmode);
06740     operand0 = operands[0];
06741     operand1 = operands[1];
06742   }
06743   emit_jump_insn (gen_rtx_SET (VOIDmode,
06744   pc_rtx,
06745   gen_rtx_IF_THEN_ELSE (VOIDmode,
06746   operand1,
06747   gen_rtx_LABEL_REF (VOIDmode,
06748   operand0),
06749   pc_rtx)));
06750   _val = get_insns ();
06751   end_sequence ();
06752   return _val;
06753 }
06754 
06755 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4254 */
06756 rtx
06757 gen_bunordered (operand0)
06758      rtx operand0;
06759 {
06760   rtx operand1;
06761   rtx _val = 0;
06762   start_sequence ();
06763   {
06764     rtx operands[2];
06765     operands[0] = operand0;
06766 operands[1] = ia64_expand_compare (UNORDERED, VOIDmode);
06767     operand0 = operands[0];
06768     operand1 = operands[1];
06769   }
06770   emit_jump_insn (gen_rtx_SET (VOIDmode,
06771   pc_rtx,
06772   gen_rtx_IF_THEN_ELSE (VOIDmode,
06773   operand1,
06774   gen_rtx_LABEL_REF (VOIDmode,
06775   operand0),
06776   pc_rtx)));
06777   _val = get_insns ();
06778   end_sequence ();
06779   return _val;
06780 }
06781 
06782 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4262 */
06783 rtx
06784 gen_bordered (operand0)
06785      rtx operand0;
06786 {
06787   rtx operand1;
06788   rtx _val = 0;
06789   start_sequence ();
06790   {
06791     rtx operands[2];
06792     operands[0] = operand0;
06793 operands[1] = ia64_expand_compare (ORDERED, VOIDmode);
06794     operand0 = operands[0];
06795     operand1 = operands[1];
06796   }
06797   emit_jump_insn (gen_rtx_SET (VOIDmode,
06798   pc_rtx,
06799   gen_rtx_IF_THEN_ELSE (VOIDmode,
06800   operand1,
06801   gen_rtx_LABEL_REF (VOIDmode,
06802   operand0),
06803   pc_rtx)));
06804   _val = get_insns ();
06805   end_sequence ();
06806   return _val;
06807 }
06808 
06809 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4300 */
06810 rtx
06811 gen_doloop_end (operand0, operand1, operand2, operand3, operand4)
06812      rtx operand0;
06813      rtx operand1;
06814      rtx operand2;
06815      rtx operand3;
06816      rtx operand4;
06817 {
06818   rtx _val = 0;
06819   start_sequence ();
06820   {
06821     rtx operands[5];
06822     operands[0] = operand0;
06823     operands[1] = operand1;
06824     operands[2] = operand2;
06825     operands[3] = operand3;
06826     operands[4] = operand4;
06827 {
06828   /* Only use cloop on innermost loops.  */
06829   if (INTVAL (operands[3]) > 1)
06830     FAIL;
06831   emit_jump_insn (gen_doloop_end_internal (gen_rtx_REG (DImode, AR_LC_REGNUM),
06832              operands[4]));
06833   DONE;
06834 }
06835     operand0 = operands[0];
06836     operand1 = operands[1];
06837     operand2 = operands[2];
06838     operand3 = operands[3];
06839     operand4 = operands[4];
06840   }
06841   emit_insn (gen_rtx_USE (VOIDmode,
06842   operand0));
06843   emit_insn (gen_rtx_USE (VOIDmode,
06844   operand1));
06845   emit_insn (gen_rtx_USE (VOIDmode,
06846   operand2));
06847   emit_insn (gen_rtx_USE (VOIDmode,
06848   operand3));
06849   emit_insn (gen_rtx_USE (VOIDmode,
06850   operand4));
06851   _val = get_insns ();
06852   end_sequence ();
06853   return _val;
06854 }
06855 
06856 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4335 */
06857 rtx
06858 gen_seq (operand0)
06859      rtx operand0;
06860 {
06861   rtx operand1;
06862   rtx _val = 0;
06863   start_sequence ();
06864   {
06865     rtx operands[2];
06866     operands[0] = operand0;
06867 operands[1] = ia64_expand_compare (EQ, DImode);
06868     operand0 = operands[0];
06869     operand1 = operands[1];
06870   }
06871   emit_insn (gen_rtx_SET (VOIDmode,
06872   operand0,
06873   operand1));
06874   _val = get_insns ();
06875   end_sequence ();
06876   return _val;
06877 }
06878 
06879 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4340 */
06880 rtx
06881 gen_sne (operand0)
06882      rtx operand0;
06883 {
06884   rtx operand1;
06885   rtx _val = 0;
06886   start_sequence ();
06887   {
06888     rtx operands[2];
06889     operands[0] = operand0;
06890 operands[1] = ia64_expand_compare (NE, DImode);
06891     operand0 = operands[0];
06892     operand1 = operands[1];
06893   }
06894   emit_insn (gen_rtx_SET (VOIDmode,
06895   operand0,
06896   operand1));
06897   _val = get_insns ();
06898   end_sequence ();
06899   return _val;
06900 }
06901 
06902 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4345 */
06903 rtx
06904 gen_slt (operand0)
06905      rtx operand0;
06906 {
06907   rtx operand1;
06908   rtx _val = 0;
06909   start_sequence ();
06910   {
06911     rtx operands[2];
06912     operands[0] = operand0;
06913 operands[1] = ia64_expand_compare (LT, DImode);
06914     operand0 = operands[0];
06915     operand1 = operands[1];
06916   }
06917   emit_insn (gen_rtx_SET (VOIDmode,
06918   operand0,
06919   operand1));
06920   _val = get_insns ();
06921   end_sequence ();
06922   return _val;
06923 }
06924 
06925 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4350 */
06926 rtx
06927 gen_sle (operand0)
06928      rtx operand0;
06929 {
06930   rtx operand1;
06931   rtx _val = 0;
06932   start_sequence ();
06933   {
06934     rtx operands[2];
06935     operands[0] = operand0;
06936 operands[1] = ia64_expand_compare (LE, DImode);
06937     operand0 = operands[0];
06938     operand1 = operands[1];
06939   }
06940   emit_insn (gen_rtx_SET (VOIDmode,
06941   operand0,
06942   operand1));
06943   _val = get_insns ();
06944   end_sequence ();
06945   return _val;
06946 }
06947 
06948 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4355 */
06949 rtx
06950 gen_sgt (operand0)
06951      rtx operand0;
06952 {
06953   rtx operand1;
06954   rtx _val = 0;
06955   start_sequence ();
06956   {
06957     rtx operands[2];
06958     operands[0] = operand0;
06959 operands[1] = ia64_expand_compare (GT, DImode);
06960     operand0 = operands[0];
06961     operand1 = operands[1];
06962   }
06963   emit_insn (gen_rtx_SET (VOIDmode,
06964   operand0,
06965   operand1));
06966   _val = get_insns ();
06967   end_sequence ();
06968   return _val;
06969 }
06970 
06971 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4360 */
06972 rtx
06973 gen_sge (operand0)
06974      rtx operand0;
06975 {
06976   rtx operand1;
06977   rtx _val = 0;
06978   start_sequence ();
06979   {
06980     rtx operands[2];
06981     operands[0] = operand0;
06982 operands[1] = ia64_expand_compare (GE, DImode);
06983     operand0 = operands[0];
06984     operand1 = operands[1];
06985   }
06986   emit_insn (gen_rtx_SET (VOIDmode,
06987   operand0,
06988   operand1));
06989   _val = get_insns ();
06990   end_sequence ();
06991   return _val;
06992 }
06993 
06994 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4365 */
06995 rtx
06996 gen_sltu (operand0)
06997      rtx operand0;
06998 {
06999   rtx operand1;
07000   rtx _val = 0;
07001   start_sequence ();
07002   {
07003     rtx operands[2];
07004     operands[0] = operand0;
07005 operands[1] = ia64_expand_compare (LTU, DImode);
07006     operand0 = operands[0];
07007     operand1 = operands[1];
07008   }
07009   emit_insn (gen_rtx_SET (VOIDmode,
07010   operand0,
07011   operand1));
07012   _val = get_insns ();
07013   end_sequence ();
07014   return _val;
07015 }
07016 
07017 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4370 */
07018 rtx
07019 gen_sleu (operand0)
07020      rtx operand0;
07021 {
07022   rtx operand1;
07023   rtx _val = 0;
07024   start_sequence ();
07025   {
07026     rtx operands[2];
07027     operands[0] = operand0;
07028 operands[1] = ia64_expand_compare (LEU, DImode);
07029     operand0 = operands[0];
07030     operand1 = operands[1];
07031   }
07032   emit_insn (gen_rtx_SET (VOIDmode,
07033   operand0,
07034   operand1));
07035   _val = get_insns ();
07036   end_sequence ();
07037   return _val;
07038 }
07039 
07040 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4375 */
07041 rtx
07042 gen_sgtu (operand0)
07043      rtx operand0;
07044 {
07045   rtx operand1;
07046   rtx _val = 0;
07047   start_sequence ();
07048   {
07049     rtx operands[2];
07050     operands[0] = operand0;
07051 operands[1] = ia64_expand_compare (GTU, DImode);
07052     operand0 = operands[0];
07053     operand1 = operands[1];
07054   }
07055   emit_insn (gen_rtx_SET (VOIDmode,
07056   operand0,
07057   operand1));
07058   _val = get_insns ();
07059   end_sequence ();
07060   return _val;
07061 }
07062 
07063 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4380 */
07064 rtx
07065 gen_sgeu (operand0)
07066      rtx operand0;
07067 {
07068   rtx operand1;
07069   rtx _val = 0;
07070   start_sequence ();
07071   {
07072     rtx operands[2];
07073     operands[0] = operand0;
07074 operands[1] = ia64_expand_compare (GEU, DImode);
07075     operand0 = operands[0];
07076     operand1 = operands[1];
07077   }
07078   emit_insn (gen_rtx_SET (VOIDmode,
07079   operand0,
07080   operand1));
07081   _val = get_insns ();
07082   end_sequence ();
07083   return _val;
07084 }
07085 
07086 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4385 */
07087 rtx
07088 gen_sunordered (operand0)
07089      rtx operand0;
07090 {
07091   rtx operand1;
07092   rtx _val = 0;
07093   start_sequence ();
07094   {
07095     rtx operands[2];
07096     operands[0] = operand0;
07097 operands[1] = ia64_expand_compare (UNORDERED, DImode);
07098     operand0 = operands[0];
07099     operand1 = operands[1];
07100   }
07101   emit_insn (gen_rtx_SET (VOIDmode,
07102   operand0,
07103   operand1));
07104   _val = get_insns ();
07105   end_sequence ();
07106   return _val;
07107 }
07108 
07109 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4390 */
07110 rtx
07111 gen_sordered (operand0)
07112      rtx operand0;
07113 {
07114   rtx operand1;
07115   rtx _val = 0;
07116   start_sequence ();
07117   {
07118     rtx operands[2];
07119     operands[0] = operand0;
07120 operands[1] = ia64_expand_compare (ORDERED, DImode);
07121     operand0 = operands[0];
07122     operand1 = operands[1];
07123   }
07124   emit_insn (gen_rtx_SET (VOIDmode,
07125   operand0,
07126   operand1));
07127   _val = get_insns ();
07128   end_sequence ();
07129   return _val;
07130 }
07131 
07132 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4398 */
07133 extern rtx gen_split_387 PARAMS ((rtx *));
07134 rtx
07135 gen_split_387 (operands)
07136       rtx *operands;
07137 {
07138   rtx operand0;
07139   rtx operand1;
07140   rtx _val = 0;
07141   start_sequence ();
07142 
07143   operand0 = operands[0];
07144   operand1 = operands[1];
07145   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
07146   gen_rtx_NE (VOIDmode,
07147   operand1,
07148   const0_rtx),
07149   gen_rtx_SET (VOIDmode,
07150   operand0,
07151   const1_rtx)));
07152   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
07153   gen_rtx_EQ (VOIDmode,
07154   copy_rtx (operand1),
07155   const0_rtx),
07156   gen_rtx_SET (VOIDmode,
07157   copy_rtx (operand0),
07158   const0_rtx)));
07159   _val = get_insns ();
07160   end_sequence ();
07161   return _val;
07162 }
07163 
07164 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4412 */
07165 extern rtx gen_split_388 PARAMS ((rtx *));
07166 rtx
07167 gen_split_388 (operands)
07168       rtx *operands;
07169 {
07170   rtx operand0;
07171   rtx operand1;
07172   rtx _val = 0;
07173   start_sequence ();
07174 
07175   operand0 = operands[0];
07176   operand1 = operands[1];
07177   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
07178   gen_rtx_NE (VOIDmode,
07179   operand1,
07180   const0_rtx),
07181   gen_rtx_SET (VOIDmode,
07182   operand0,
07183   const0_rtx)));
07184   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
07185   gen_rtx_EQ (VOIDmode,
07186   copy_rtx (operand1),
07187   const0_rtx),
07188   gen_rtx_SET (VOIDmode,
07189   copy_rtx (operand0),
07190   const1_rtx)));
07191   _val = get_insns ();
07192   end_sequence ();
07193   return _val;
07194 }
07195 
07196 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4455 */
07197 extern rtx gen_split_389 PARAMS ((rtx *));
07198 rtx
07199 gen_split_389 (operands)
07200       rtx *operands ATTRIBUTE_UNUSED;
07201 {
07202   rtx _val = 0;
07203   start_sequence ();
07204 {
07205   rtx tmp;
07206   int emitted_something;
07207 
07208   emitted_something = 0;
07209   if (! rtx_equal_p (operands[0], operands[2]))
07210     {
07211       tmp = gen_rtx_SET (VOIDmode, operands[0], operands[2]);
07212       tmp = gen_rtx_COND_EXEC (VOIDmode, operands[4], tmp);
07213       emit_insn (tmp);
07214       emitted_something = 1;
07215     }
07216   if (! rtx_equal_p (operands[0], operands[3]))
07217     {
07218       tmp = gen_rtx_fmt_ee (GET_CODE (operands[4]) == NE ? EQ : NE,
07219           VOIDmode, operands[1], const0_rtx);
07220       tmp = gen_rtx_COND_EXEC (VOIDmode, tmp,
07221              gen_rtx_SET (VOIDmode, operands[0],
07222               operands[3]));
07223       emit_insn (tmp);
07224       emitted_something = 1;
07225     }
07226   if (! emitted_something)
07227     emit_note (NULL, NOTE_INSN_DELETED);
07228   DONE;
07229 }
07230   emit_insn (const0_rtx);
07231   _val = get_insns ();
07232   end_sequence ();
07233   return _val;
07234 }
07235 
07236 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4507 */
07237 extern rtx gen_split_390 PARAMS ((rtx *));
07238 rtx
07239 gen_split_390 (operands)
07240       rtx *operands;
07241 {
07242   rtx operand0;
07243   rtx operand1;
07244   rtx operand2;
07245   rtx operand3;
07246   rtx operand4;
07247   rtx _val = 0;
07248   start_sequence ();
07249 
07250   operand0 = operands[0];
07251   operand1 = operands[1];
07252   operand2 = operands[2];
07253   operand3 = operands[3];
07254   operand4 = operands[4];
07255   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
07256   operand4,
07257   gen_rtx_SET (VOIDmode,
07258   operand0,
07259   gen_rtx_NEG (DImode,
07260   operand2))));
07261   _val = get_insns ();
07262   end_sequence ();
07263   return _val;
07264 }
07265 
07266 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4522 */
07267 extern rtx gen_split_391 PARAMS ((rtx *));
07268 rtx
07269 gen_split_391 (operands)
07270       rtx *operands;
07271 {
07272   rtx operand0;
07273   rtx operand1;
07274   rtx operand2;
07275   rtx operand3;
07276   rtx operand4;
07277   rtx operand5;
07278   rtx _val = 0;
07279   start_sequence ();
07280 {
07281   operands[5] = gen_rtx_fmt_ee (GET_CODE (operands[4]) == NE ? EQ : NE,
07282         VOIDmode, operands[1], const0_rtx);
07283 }
07284   operand0 = operands[0];
07285   operand1 = operands[1];
07286   operand2 = operands[2];
07287   operand3 = operands[3];
07288   operand4 = operands[4];
07289   operand5 = operands[5];
07290   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
07291   operand4,
07292   gen_rtx_SET (VOIDmode,
07293   operand0,
07294   gen_rtx_NEG (DImode,
07295   operand2))));
07296   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
07297   operand5,
07298   gen_rtx_SET (VOIDmode,
07299   copy_rtx (operand0),
07300   operand3)));
07301   _val = get_insns ();
07302   end_sequence ();
07303   return _val;
07304 }
07305 
07306 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4574 */
07307 extern rtx gen_split_392 PARAMS ((rtx *));
07308 rtx
07309 gen_split_392 (operands)
07310       rtx *operands;
07311 {
07312   rtx operand0;
07313   rtx operand1;
07314   rtx operand2;
07315   rtx operand3;
07316   rtx operand4;
07317   rtx _val = 0;
07318   start_sequence ();
07319 
07320   operand0 = operands[0];
07321   operand1 = operands[1];
07322   operand2 = operands[2];
07323   operand3 = operands[3];
07324   operand4 = operands[4];
07325   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
07326   operand4,
07327   gen_rtx_SET (VOIDmode,
07328   operand0,
07329   gen_rtx_NEG (SImode,
07330   operand2))));
07331   _val = get_insns ();
07332   end_sequence ();
07333   return _val;
07334 }
07335 
07336 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4589 */
07337 extern rtx gen_split_393 PARAMS ((rtx *));
07338 rtx
07339 gen_split_393 (operands)
07340       rtx *operands;
07341 {
07342   rtx operand0;
07343   rtx operand1;
07344   rtx operand2;
07345   rtx operand3;
07346   rtx operand4;
07347   rtx operand5;
07348   rtx _val = 0;
07349   start_sequence ();
07350 {
07351   operands[5] = gen_rtx_fmt_ee (GET_CODE (operands[4]) == NE ? EQ : NE,
07352         VOIDmode, operands[1], const0_rtx);
07353 }
07354   operand0 = operands[0];
07355   operand1 = operands[1];
07356   operand2 = operands[2];
07357   operand3 = operands[3];
07358   operand4 = operands[4];
07359   operand5 = operands[5];
07360   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
07361   operand4,
07362   gen_rtx_SET (VOIDmode,
07363   operand0,
07364   gen_rtx_NEG (SImode,
07365   operand2))));
07366   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
07367   operand5,
07368   gen_rtx_SET (VOIDmode,
07369   copy_rtx (operand0),
07370   operand3)));
07371   _val = get_insns ();
07372   end_sequence ();
07373   return _val;
07374 }
07375 
07376 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4609 */
07377 extern rtx gen_split_394 PARAMS ((rtx *));
07378 rtx
07379 gen_split_394 (operands)
07380       rtx *operands;
07381 {
07382   rtx operand0;
07383   rtx operand1;
07384   rtx operand2;
07385   rtx operand3;
07386   rtx operand4;
07387   rtx operand5;
07388   rtx operand6;
07389   rtx operand7;
07390   rtx _val = 0;
07391   start_sequence ();
07392 {
07393   operands[7] = gen_rtx_fmt_ee (GET_CODE (operands[6]) == NE ? EQ : NE,
07394         VOIDmode, operands[1], const0_rtx);
07395 }
07396   operand0 = operands[0];
07397   operand1 = operands[1];
07398   operand2 = operands[2];
07399   operand3 = operands[3];
07400   operand4 = operands[4];
07401   operand5 = operands[5];
07402   operand6 = operands[6];
07403   operand7 = operands[7];
07404   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
07405   operand6,
07406   gen_rtx_SET (VOIDmode,
07407   operand0,
07408   gen_rtx (GET_CODE (operand5), SImode,
07409     operand2,
07410     operand4))));
07411   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
07412   operand7,
07413   gen_rtx_SET (VOIDmode,
07414   copy_rtx (operand0),
07415   gen_rtx (GET_CODE (operand5), SImode,
07416     operand3,
07417     copy_rtx (operand4)))));
07418   _val = get_insns ();
07419   end_sequence ();
07420   return _val;
07421 }
07422 
07423 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4636 */
07424 extern rtx gen_split_395 PARAMS ((rtx *));
07425 rtx
07426 gen_split_395 (operands)
07427       rtx *operands;
07428 {
07429   rtx operand0;
07430   rtx operand1;
07431   rtx operand2;
07432   rtx operand3;
07433   rtx operand4;
07434   rtx operand5;
07435   rtx operand6;
07436   rtx operand7;
07437   rtx _val = 0;
07438   start_sequence ();
07439 {
07440   operands[7] = gen_rtx_fmt_ee (GET_CODE (operands[6]) == NE ? EQ : NE,
07441         VOIDmode, operands[1], const0_rtx);
07442 }
07443   operand0 = operands[0];
07444   operand1 = operands[1];
07445   operand2 = operands[2];
07446   operand3 = operands[3];
07447   operand4 = operands[4];
07448   operand5 = operands[5];
07449   operand6 = operands[6];
07450   operand7 = operands[7];
07451   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
07452   operand6,
07453   gen_rtx_SET (VOIDmode,
07454   operand0,
07455   gen_rtx (GET_CODE (operand5), SImode,
07456     operand4,
07457     operand2))));
07458   emit_insn (gen_rtx_COND_EXEC (VOIDmode,
07459   operand7,
07460   gen_rtx_SET (VOIDmode,
07461   copy_rtx (operand0),
07462   gen_rtx (GET_CODE (operand5), SImode,
07463     copy_rtx (operand4),
07464     operand3))));
07465   _val = get_insns ();
07466   end_sequence ();
07467   return _val;
07468 }
07469 
07470 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4679 */
07471 rtx
07472 gen_call (operand0, operand1, operand2, operand3)
07473      rtx operand0;
07474      rtx operand1;
07475      rtx operand2;
07476      rtx operand3;
07477 {
07478   rtx _val = 0;
07479   start_sequence ();
07480   {
07481     rtx operands[4];
07482     operands[0] = operand0;
07483     operands[1] = operand1;
07484     operands[2] = operand2;
07485     operands[3] = operand3;
07486 {
07487   ia64_expand_call (NULL_RTX, operands[0], operands[2], false);
07488   DONE;
07489 }
07490     operand0 = operands[0];
07491     operand1 = operands[1];
07492     operand2 = operands[2];
07493     operand3 = operands[3];
07494   }
07495   emit_insn (gen_rtx_USE (VOIDmode,
07496   operand0));
07497   emit_insn (gen_rtx_USE (VOIDmode,
07498   operand1));
07499   emit_insn (gen_rtx_USE (VOIDmode,
07500   operand2));
07501   emit_insn (gen_rtx_USE (VOIDmode,
07502   operand3));
07503   _val = get_insns ();
07504   end_sequence ();
07505   return _val;
07506 }
07507 
07508 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4690 */
07509 rtx
07510 gen_sibcall (operand0, operand1, operand2, operand3)
07511      rtx operand0;
07512      rtx operand1;
07513      rtx operand2;
07514      rtx operand3;
07515 {
07516   rtx _val = 0;
07517   start_sequence ();
07518   {
07519     rtx operands[4];
07520     operands[0] = operand0;
07521     operands[1] = operand1;
07522     operands[2] = operand2;
07523     operands[3] = operand3;
07524 {
07525   ia64_expand_call (NULL_RTX, operands[0], operands[2], true);
07526   DONE;
07527 }
07528     operand0 = operands[0];
07529     operand1 = operands[1];
07530     operand2 = operands[2];
07531     operand3 = operands[3];
07532   }
07533   emit_insn (gen_rtx_USE (VOIDmode,
07534   operand0));
07535   emit_insn (gen_rtx_USE (VOIDmode,
07536   operand1));
07537   emit_insn (gen_rtx_USE (VOIDmode,
07538   operand2));
07539   emit_insn (gen_rtx_USE (VOIDmode,
07540   operand3));
07541   _val = get_insns ();
07542   end_sequence ();
07543   return _val;
07544 }
07545 
07546 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4708 */
07547 rtx
07548 gen_call_value (operand0, operand1, operand2, operand3, operand4)
07549      rtx operand0;
07550      rtx operand1;
07551      rtx operand2;
07552      rtx operand3;
07553      rtx operand4;
07554 {
07555   rtx _val = 0;
07556   start_sequence ();
07557   {
07558     rtx operands[5];
07559     operands[0] = operand0;
07560     operands[1] = operand1;
07561     operands[2] = operand2;
07562     operands[3] = operand3;
07563     operands[4] = operand4;
07564 {
07565   ia64_expand_call (operands[0], operands[1], operands[3], false);
07566   DONE;
07567 }
07568     operand0 = operands[0];
07569     operand1 = operands[1];
07570     operand2 = operands[2];
07571     operand3 = operands[3];
07572     operand4 = operands[4];
07573   }
07574   emit_insn (gen_rtx_USE (VOIDmode,
07575   operand0));
07576   emit_insn (gen_rtx_USE (VOIDmode,
07577   operand1));
07578   emit_insn (gen_rtx_USE (VOIDmode,
07579   operand2));
07580   emit_insn (gen_rtx_USE (VOIDmode,
07581   operand3));
07582   emit_insn (gen_rtx_USE (VOIDmode,
07583   operand4));
07584   _val = get_insns ();
07585   end_sequence ();
07586   return _val;
07587 }
07588 
07589 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4720 */
07590 rtx
07591 gen_sibcall_value (operand0, operand1, operand2, operand3, operand4)
07592      rtx operand0;
07593      rtx operand1;
07594      rtx operand2;
07595      rtx operand3;
07596      rtx operand4;
07597 {
07598   rtx _val = 0;
07599   start_sequence ();
07600   {
07601     rtx operands[5];
07602     operands[0] = operand0;
07603     operands[1] = operand1;
07604     operands[2] = operand2;
07605     operands[3] = operand3;
07606     operands[4] = operand4;
07607 {
07608   ia64_expand_call (operands[0], operands[1], operands[3], true);
07609   DONE;
07610 }
07611     operand0 = operands[0];
07612     operand1 = operands[1];
07613     operand2 = operands[2];
07614     operand3 = operands[3];
07615     operand4 = operands[4];
07616   }
07617   emit_insn (gen_rtx_USE (VOIDmode,
07618   operand0));
07619   emit_insn (gen_rtx_USE (VOIDmode,
07620   operand1));
07621   emit_insn (gen_rtx_USE (VOIDmode,
07622   operand2));
07623   emit_insn (gen_rtx_USE (VOIDmode,
07624   operand3));
07625   emit_insn (gen_rtx_USE (VOIDmode,
07626   operand4));
07627   _val = get_insns ();
07628   end_sequence ();
07629   return _val;
07630 }
07631 
07632 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4734 */
07633 rtx
07634 gen_untyped_call (operand0, operand1, operand2)
07635      rtx operand0;
07636      rtx operand1;
07637      rtx operand2;
07638 {
07639   rtx _val = 0;
07640   start_sequence ();
07641   {
07642     rtx operands[3];
07643     operands[0] = operand0;
07644     operands[1] = operand1;
07645     operands[2] = operand2;
07646 {
07647   int i;
07648 
07649   emit_call_insn (gen_call (operands[0], const0_rtx, NULL, const0_rtx));
07650 
07651   for (i = 0; i < XVECLEN (operands[2], 0); i++)
07652     {
07653       rtx set = XVECEXP (operands[2], 0, i);
07654       emit_move_insn (SET_DEST (set), SET_SRC (set));
07655     }
07656 
07657   /* The optimizer does not know that the call sets the function value
07658      registers we stored in the result block.  We avoid problems by
07659      claiming that all hard registers are used and clobbered at this
07660      point.  */
07661   emit_insn (gen_blockage ());
07662 
07663   DONE;
07664 }
07665     operand0 = operands[0];
07666     operand1 = operands[1];
07667     operand2 = operands[2];
07668   }
07669   emit_call_insn (gen_rtx_PARALLEL (VOIDmode,
07670   gen_rtvec (3,
07671     gen_rtx_CALL (VOIDmode,
07672   operand0,
07673   const0_rtx),
07674     operand1,
07675     operand2)));
07676   _val = get_insns ();
07677   end_sequence ();
07678   return _val;
07679 }
07680 
07681 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4796 */
07682 extern rtx gen_split_401 PARAMS ((rtx *));
07683 rtx
07684 gen_split_401 (operands)
07685       rtx *operands ATTRIBUTE_UNUSED;
07686 {
07687   rtx _val = 0;
07688   start_sequence ();
07689 {
07690   ia64_split_call (NULL_RTX, operands[0], operands[1], operands[2],
07691        operands[3], true, false);
07692   DONE;
07693 }
07694   emit_insn (const0_rtx);
07695   _val = get_insns ();
07696   end_sequence ();
07697   return _val;
07698 }
07699 
07700 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4810 */
07701 extern rtx gen_split_402 PARAMS ((rtx *));
07702 rtx
07703 gen_split_402 (operands)
07704       rtx *operands ATTRIBUTE_UNUSED;
07705 {
07706   rtx _val = 0;
07707   start_sequence ();
07708 {
07709   ia64_split_call (NULL_RTX, operands[0], operands[1], operands[2],
07710        operands[3], false, false);
07711   DONE;
07712 }
07713   emit_insn (const0_rtx);
07714   _val = get_insns ();
07715   end_sequence ();
07716   return _val;
07717 }
07718 
07719 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4835 */
07720 extern rtx gen_split_403 PARAMS ((rtx *));
07721 rtx
07722 gen_split_403 (operands)
07723       rtx *operands ATTRIBUTE_UNUSED;
07724 {
07725   rtx _val = 0;
07726   start_sequence ();
07727 {
07728   ia64_split_call (operands[0], operands[1], operands[2], operands[3],
07729        operands[4], true, false);
07730   DONE;
07731 }
07732   emit_insn (const0_rtx);
07733   _val = get_insns ();
07734   end_sequence ();
07735   return _val;
07736 }
07737 
07738 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4850 */
07739 extern rtx gen_split_404 PARAMS ((rtx *));
07740 rtx
07741 gen_split_404 (operands)
07742       rtx *operands ATTRIBUTE_UNUSED;
07743 {
07744   rtx _val = 0;
07745   start_sequence ();
07746 {
07747   ia64_split_call (operands[0], operands[1], operands[2], operands[3],
07748        operands[4], false, false);
07749   DONE;
07750 }
07751   emit_insn (const0_rtx);
07752   _val = get_insns ();
07753   end_sequence ();
07754   return _val;
07755 }
07756 
07757 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4865 */
07758 extern rtx gen_split_405 PARAMS ((rtx *));
07759 rtx
07760 gen_split_405 (operands)
07761       rtx *operands ATTRIBUTE_UNUSED;
07762 {
07763   rtx _val = 0;
07764   start_sequence ();
07765 {
07766   ia64_split_call (NULL_RTX, operands[0], NULL_RTX, operands[1],
07767        operands[2], true, true);
07768   DONE;
07769 }
07770   emit_insn (const0_rtx);
07771   _val = get_insns ();
07772   end_sequence ();
07773   return _val;
07774 }
07775 
07776 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4930 */
07777 rtx
07778 gen_tablejump (operand0, operand1)
07779      rtx operand0;
07780      rtx operand1;
07781 {
07782   rtx _val = 0;
07783   start_sequence ();
07784   {
07785     rtx operands[2];
07786     operands[0] = operand0;
07787     operands[1] = operand1;
07788 {
07789   rtx op0 = operands[0];
07790   rtx addr;
07791 
07792   /* ??? Bother -- do_tablejump is "helpful" and pulls the table
07793      element into a register without bothering to see whether that
07794      is necessary given the operand predicate.  Check for MEM just
07795      in case someone fixes this.  */
07796   if (GET_CODE (op0) == MEM)
07797     addr = XEXP (op0, 0);
07798   else
07799     {
07800       /* Otherwise, cheat and guess that the previous insn in the
07801    stream was the memory load.  Grab the address from that.
07802    Note we have to momentarily pop out of the sequence started
07803    by the insn-emit wrapper in order to grab the last insn.  */
07804       rtx last, set;
07805 
07806       end_sequence ();
07807       last = get_last_insn ();
07808       start_sequence ();
07809       set = single_set (last);
07810 
07811       if (! rtx_equal_p (SET_DEST (set), op0)
07812     || GET_CODE (SET_SRC (set)) != MEM)
07813   abort ();
07814       addr = XEXP (SET_SRC (set), 0);
07815       if (rtx_equal_p (addr, op0))
07816   abort ();
07817     }
07818 
07819   /* Jump table elements are stored pc-relative.  That is, a displacement
07820      from the entry to the label.  Thus to convert to an absolute address
07821      we add the address of the memory from which the value is loaded.  */
07822   operands[0] = expand_simple_binop (DImode, PLUS, op0, addr,
07823              NULL_RTX, 1, OPTAB_DIRECT);
07824 }
07825     operand0 = operands[0];
07826     operand1 = operands[1];
07827   }
07828   emit_jump_insn (gen_rtx_PARALLEL (VOIDmode,
07829   gen_rtvec (2,
07830     gen_rtx_SET (VOIDmode,
07831   pc_rtx,
07832   operand0),
07833     gen_rtx_USE (VOIDmode,
07834   gen_rtx_LABEL_REF (VOIDmode,
07835   operand1)))));
07836   _val = get_insns ();
07837   end_sequence ();
07838   return _val;
07839 }
07840 
07841 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4986 */
07842 rtx
07843 gen_prologue ()
07844 {
07845   rtx _val = 0;
07846   start_sequence ();
07847   {
07848 {
07849   ia64_expand_prologue ();
07850   DONE;
07851 }
07852   }
07853   emit_insn (const1_rtx);
07854   _val = get_insns ();
07855   end_sequence ();
07856   return _val;
07857 }
07858 
07859 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:4994 */
07860 rtx
07861 gen_epilogue ()
07862 {
07863   rtx _val = 0;
07864   start_sequence ();
07865   {
07866 {
07867   ia64_expand_epilogue (0);
07868   DONE;
07869 }
07870   }
07871   emit_jump_insn (gen_rtx_RETURN (VOIDmode));
07872   _val = get_insns ();
07873   end_sequence ();
07874   return _val;
07875 }
07876 
07877 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5002 */
07878 rtx
07879 gen_sibcall_epilogue ()
07880 {
07881   rtx _val = 0;
07882   start_sequence ();
07883   {
07884 {
07885   ia64_expand_epilogue (1);
07886   DONE;
07887 }
07888   }
07889   emit_jump_insn (gen_rtx_RETURN (VOIDmode));
07890   _val = get_insns ();
07891   end_sequence ();
07892   return _val;
07893 }
07894 
07895 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5062 */
07896 rtx
07897 gen_gr_spill (operand0, operand1, operand2)
07898      rtx operand0;
07899      rtx operand1;
07900      rtx operand2;
07901 {
07902   rtx operand3;
07903   rtx _val = 0;
07904   start_sequence ();
07905   {
07906     rtx operands[4];
07907     operands[0] = operand0;
07908     operands[1] = operand1;
07909     operands[2] = operand2;
07910 operands[3] = gen_rtx_REG (DImode, AR_UNAT_REGNUM);
07911     operand0 = operands[0];
07912     operand1 = operands[1];
07913     operand2 = operands[2];
07914     operand3 = operands[3];
07915   }
07916   emit (gen_rtx_PARALLEL (VOIDmode,
07917   gen_rtvec (2,
07918     gen_rtx_SET (VOIDmode,
07919   operand0,
07920   gen_rtx_UNSPEC (DImode,
07921   gen_rtvec (2,
07922     operand1,
07923     operand2),
07924   10)),
07925     gen_rtx_CLOBBER (VOIDmode,
07926   operand3))));
07927   _val = get_insns ();
07928   end_sequence ();
07929   return _val;
07930 }
07931 
07932 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5086 */
07933 rtx
07934 gen_gr_restore (operand0, operand1, operand2)
07935      rtx operand0;
07936      rtx operand1;
07937      rtx operand2;
07938 {
07939   rtx operand3;
07940   rtx _val = 0;
07941   start_sequence ();
07942   {
07943     rtx operands[4];
07944     operands[0] = operand0;
07945     operands[1] = operand1;
07946     operands[2] = operand2;
07947 operands[3] = gen_rtx_REG (DImode, AR_UNAT_REGNUM);
07948     operand0 = operands[0];
07949     operand1 = operands[1];
07950     operand2 = operands[2];
07951     operand3 = operands[3];
07952   }
07953   emit (gen_rtx_PARALLEL (VOIDmode,
07954   gen_rtvec (2,
07955     gen_rtx_SET (VOIDmode,
07956   operand0,
07957   gen_rtx_UNSPEC (DImode,
07958   gen_rtvec (2,
07959     operand1,
07960     operand2),
07961   11)),
07962     gen_rtx_USE (VOIDmode,
07963   operand3))));
07964   _val = get_insns ();
07965   end_sequence ();
07966   return _val;
07967 }
07968 
07969 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5238 */
07970 rtx
07971 gen_trap ()
07972 {
07973   return gen_rtx_TRAP_IF (VOIDmode,
07974   const1_rtx,
07975   const0_rtx);
07976 }
07977 
07978 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5252 */
07979 rtx
07980 gen_conditional_trap (operand0, operand1)
07981      rtx operand0;
07982      rtx operand1;
07983 {
07984   rtx _val = 0;
07985   start_sequence ();
07986   {
07987     rtx operands[2];
07988     operands[0] = operand0;
07989     operands[1] = operand1;
07990 {
07991   operands[0] = ia64_expand_compare (GET_CODE (operands[0]), VOIDmode);
07992 }
07993     operand0 = operands[0];
07994     operand1 = operands[1];
07995   }
07996   emit_insn (gen_rtx_TRAP_IF (VOIDmode,
07997   operand0,
07998   operand1));
07999   _val = get_insns ();
08000   end_sequence ();
08001   return _val;
08002 }
08003 
08004 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5308 */
08005 rtx
08006 gen_save_stack_nonlocal (operand0, operand1)
08007      rtx operand0;
08008      rtx operand1;
08009 {
08010   rtx _val = 0;
08011   start_sequence ();
08012   {
08013     rtx operands[2];
08014     operands[0] = operand0;
08015     operands[1] = operand1;
08016 {
08017   emit_library_call (gen_rtx_SYMBOL_REF (Pmode,
08018            "__ia64_save_stack_nonlocal"),
08019          0, VOIDmode, 2, XEXP (operands[0], 0), Pmode,
08020          operands[1], Pmode);
08021   DONE;
08022 }
08023     operand0 = operands[0];
08024     operand1 = operands[1];
08025   }
08026   emit_insn (gen_rtx_USE (VOIDmode,
08027   operand0));
08028   emit_insn (gen_rtx_USE (VOIDmode,
08029   operand1));
08030   _val = get_insns ();
08031   end_sequence ();
08032   return _val;
08033 }
08034 
08035 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5320 */
08036 rtx
08037 gen_nonlocal_goto (operand0, operand1, operand2, operand3)
08038      rtx operand0;
08039      rtx operand1;
08040      rtx operand2;
08041      rtx operand3;
08042 {
08043   rtx _val = 0;
08044   start_sequence ();
08045   {
08046     rtx operands[4];
08047     operands[0] = operand0;
08048     operands[1] = operand1;
08049     operands[2] = operand2;
08050     operands[3] = operand3;
08051 {
08052   emit_library_call (gen_rtx_SYMBOL_REF (Pmode, "__ia64_nonlocal_goto"),
08053          LCT_NORETURN, VOIDmode, 3,
08054          operands[1], Pmode,
08055          copy_to_reg (XEXP (operands[2], 0)), Pmode,
08056          operands[3], Pmode);
08057   emit_barrier ();
08058   DONE;
08059 }
08060     operand0 = operands[0];
08061     operand1 = operands[1];
08062     operand2 = operands[2];
08063     operand3 = operands[3];
08064   }
08065   emit_insn (gen_rtx_USE (VOIDmode,
08066   operand0));
08067   emit_insn (gen_rtx_USE (VOIDmode,
08068   operand1));
08069   emit_insn (gen_rtx_USE (VOIDmode,
08070   operand2));
08071   emit_insn (gen_rtx_USE (VOIDmode,
08072   operand3));
08073   _val = get_insns ();
08074   end_sequence ();
08075   return _val;
08076 }
08077 
08078 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5336 */
08079 extern rtx gen_split_416 PARAMS ((rtx *));
08080 rtx
08081 gen_split_416 (operands)
08082       rtx *operands ATTRIBUTE_UNUSED;
08083 {
08084   rtx _val = 0;
08085   start_sequence ();
08086 {
08087   ia64_reload_gp ();
08088   DONE;
08089 }
08090   emit_insn (const0_rtx);
08091   _val = get_insns ();
08092   end_sequence ();
08093   return _val;
08094 }
08095 
08096 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5347 */
08097 rtx
08098 gen_eh_epilogue (operand0, operand1, operand2)
08099      rtx operand0;
08100      rtx operand1;
08101      rtx operand2;
08102 {
08103   rtx _val = 0;
08104   start_sequence ();
08105   {
08106     rtx operands[3];
08107     operands[0] = operand0;
08108     operands[1] = operand1;
08109     operands[2] = operand2;
08110 {
08111   rtx bsp = gen_rtx_REG (Pmode, 10);
08112   rtx sp = gen_rtx_REG (Pmode, 9);
08113 
08114   if (GET_CODE (operands[0]) != REG || REGNO (operands[0]) != 10)
08115     {
08116       emit_move_insn (bsp, operands[0]);
08117       operands[0] = bsp;
08118     }
08119   if (GET_CODE (operands[2]) != REG || REGNO (operands[2]) != 9)
08120     {
08121       emit_move_insn (sp, operands[2]);
08122       operands[2] = sp;
08123     }
08124   emit_insn (gen_rtx_USE (VOIDmode, sp));
08125   emit_insn (gen_rtx_USE (VOIDmode, bsp));
08126 
08127   cfun->machine->ia64_eh_epilogue_sp = sp;
08128   cfun->machine->ia64_eh_epilogue_bsp = bsp;
08129 }
08130     operand0 = operands[0];
08131     operand1 = operands[1];
08132     operand2 = operands[2];
08133   }
08134   emit_insn (gen_rtx_USE (VOIDmode,
08135   operand0));
08136   emit_insn (gen_rtx_USE (VOIDmode,
08137   operand1));
08138   emit_insn (gen_rtx_USE (VOIDmode,
08139   operand2));
08140   _val = get_insns ();
08141   end_sequence ();
08142   return _val;
08143 }
08144 
08145 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5375 */
08146 rtx
08147 gen_restore_stack_nonlocal (operand0, operand1)
08148      rtx operand0;
08149      rtx operand1;
08150 {
08151   rtx _val = 0;
08152   start_sequence ();
08153   {
08154     rtx operands[2];
08155     operands[0] = operand0;
08156     operands[1] = operand1;
08157 {
08158   emit_library_call (gen_rtx_SYMBOL_REF (Pmode,
08159            "__ia64_restore_stack_nonlocal"),
08160          0, VOIDmode, 1,
08161          copy_to_reg (XEXP (operands[1], 0)), Pmode);
08162   DONE;
08163 }
08164     operand0 = operands[0];
08165     operand1 = operands[1];
08166   }
08167   emit_insn (gen_rtx_USE (VOIDmode,
08168   operand0));
08169   emit_insn (gen_rtx_USE (VOIDmode,
08170   operand1));
08171   _val = get_insns ();
08172   end_sequence ();
08173   return _val;
08174 }
08175 
08176 /* /home/syang/gcc-3.3.1/gcc/config/ia64/ia64.md:5390 */
08177 rtx
08178 gen_mf ()
08179 {
08180   rtx operand0;
08181   rtx _val = 0;
08182   start_sequence ();
08183   {
08184     rtx operands[1];
08185 {
08186   operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (DImode));
08187   MEM_VOLATILE_P (operands[0]) = 1;
08188 }
08189     operand0 = operands[0];
08190   }
08191   emit_insn (gen_rtx_SET (VOIDmode,
08192   gen_rtx_MEM (BLKmode,
08193   operand0),
08194   gen_rtx_UNSPEC (BLKmode,
08195   gen_rtvec (1,
08196     gen_rtx_MEM (BLKmode,
08197   operand0)),
08198   18)));
08199   _val = get_insns ();
08200   end_sequence ();
08201   return _val;
08202 }
08203 
08204 
08205 
08206 void
08207 add_clobbers (pattern, insn_code_number)
08208      rtx pattern ATTRIBUTE_UNUSED;
08209      int insn_code_number;
08210 {
08211   switch (insn_code_number)
08212     {
08213     case 230:
08214       XVECEXP (pattern, 0, 1) = gen_rtx_CLOBBER (VOIDmode,
08215   gen_rtx_SCRATCH (DImode));
08216       XVECEXP (pattern, 0, 2) = gen_rtx_CLOBBER (VOIDmode,
08217   gen_rtx_SCRATCH (DImode));
08218       break;
08219 
08220     case 229:
08221     case 228:
08222       XVECEXP (pattern, 0, 2) = gen_rtx_CLOBBER (VOIDmode,
08223   gen_rtx_SCRATCH (DImode));
08224       XVECEXP (pattern, 0, 3) = gen_rtx_CLOBBER (VOIDmode,
08225   gen_rtx_SCRATCH (DImode));
08226       break;
08227 
08228     case 186:
08229       XVECEXP (pattern, 0, 1) = gen_rtx_CLOBBER (VOIDmode,
08230   gen_rtx_SCRATCH (TFmode));
08231       XVECEXP (pattern, 0, 2) = gen_rtx_CLOBBER (VOIDmode,
08232   gen_rtx_SCRATCH (TFmode));
08233       XVECEXP (pattern, 0, 3) = gen_rtx_CLOBBER (VOIDmode,
08234   gen_rtx_SCRATCH (TFmode));
08235       XVECEXP (pattern, 0, 4) = gen_rtx_CLOBBER (VOIDmode,
08236   gen_rtx_SCRATCH (TFmode));
08237       XVECEXP (pattern, 0, 5) = gen_rtx_CLOBBER (VOIDmode,
08238   gen_rtx_SCRATCH (BImode));
08239       break;
08240 
08241     case 152:
08242       XVECEXP (pattern, 0, 1) = gen_rtx_CLOBBER (VOIDmode,
08243   gen_rtx_SCRATCH (TFmode));
08244       XVECEXP (pattern, 0, 2) = gen_rtx_CLOBBER (VOIDmode,
08245   gen_rtx_SCRATCH (DFmode));
08246       XVECEXP (pattern, 0, 3) = gen_rtx_CLOBBER (VOIDmode,
08247   gen_rtx_SCRATCH (BImode));
08248       break;
08249 
08250     case 187:
08251     case 130:
08252     case 129:
08253     case 116:
08254       XVECEXP (pattern, 0, 1) = gen_rtx_CLOBBER (VOIDmode,
08255   gen_rtx_SCRATCH (TFmode));
08256       XVECEXP (pattern, 0, 2) = gen_rtx_CLOBBER (VOIDmode,
08257   gen_rtx_SCRATCH (TFmode));
08258       XVECEXP (pattern, 0, 3) = gen_rtx_CLOBBER (VOIDmode,
08259   gen_rtx_SCRATCH (BImode));
08260       break;
08261 
08262     case 151:
08263     case 115:
08264       XVECEXP (pattern, 0, 1) = gen_rtx_CLOBBER (VOIDmode,
08265   gen_rtx_SCRATCH (TFmode));
08266       XVECEXP (pattern, 0, 2) = gen_rtx_CLOBBER (VOIDmode,
08267   gen_rtx_SCRATCH (TFmode));
08268       XVECEXP (pattern, 0, 3) = gen_rtx_CLOBBER (VOIDmode,
08269   gen_rtx_SCRATCH (TFmode));
08270       XVECEXP (pattern, 0, 4) = gen_rtx_CLOBBER (VOIDmode,
08271   gen_rtx_SCRATCH (BImode));
08272       break;
08273 
08274     case 67:
08275       XVECEXP (pattern, 0, 1) = gen_rtx_CLOBBER (VOIDmode,
08276   gen_rtx_SCRATCH (BImode));
08277       break;
08278 
08279     case 110:
08280     case 109:
08281     case 24:
08282       XVECEXP (pattern, 0, 1) = gen_rtx_CLOBBER (VOIDmode,
08283   gen_rtx_SCRATCH (DImode));
08284       break;
08285 
08286     default:
08287       abort ();
08288     }
08289 }
08290 
08291 
08292 int
08293 added_clobbers_hard_reg_p (insn_code_number)
08294      int insn_code_number;
08295 {
08296   switch (insn_code_number)
08297     {
08298     case 230:
08299     case 229:
08300     case 228:
08301     case 186:
08302     case 152:
08303     case 187:
08304     case 130:
08305     case 129:
08306     case 116:
08307     case 151:
08308     case 115:
08309     case 67:
08310     case 110:
08311     case 109:
08312     case 24:
08313       return 0;
08314 
08315     default:
08316       abort ();
08317     }
08318 }