osprey-gcc-4.2.0/gcc/config/ia64/ia64.h File Reference

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Data Types

type  ia64_args

Defines

#define TARGET_CPU_CPP_BUILTINS()
#define EXTRA_SPECS
#define CC1_SPEC   "%(cc1_cpu) "
#define ASM_EXTRA_SPEC   ""
#define TARGET_TLS14   (ia64_tls_size == 14)
#define TARGET_TLS22   (ia64_tls_size == 22)
#define TARGET_TLS64   (ia64_tls_size == 64)
#define TARGET_HPUX   0
#define TARGET_HPUX_LD   0
#define TARGET_ILP32   0
#define HAVE_AS_LTOFFX_LDXMOV_RELOCS   0
#define TARGET_DEFAULT   (MASK_DWARF2_ASM)
#define TARGET_CPU_DEFAULT   0
#define OVERRIDE_OPTIONS   ia64_override_options ()
#define CC1_SPEC   "%{G*}"
#define BITS_BIG_ENDIAN   0
#define BYTES_BIG_ENDIAN   (TARGET_BIG_ENDIAN != 0)
#define WORDS_BIG_ENDIAN   (TARGET_BIG_ENDIAN != 0)
#define LIBGCC2_WORDS_BIG_ENDIAN   0
#define UNITS_PER_WORD   8
#define POINTER_SIZE   (TARGET_ILP32 ? 32 : 64)
#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)
#define PARM_BOUNDARY   64
#define STACK_BOUNDARY   128
#define IA64_STACK_ALIGN(LOC)   (((LOC) + 15) & ~15)
#define FUNCTION_BOUNDARY   128
#define BIGGEST_ALIGNMENT   128
#define DATA_ALIGNMENT(TYPE, ALIGN)
#define CONSTANT_ALIGNMENT(EXP, ALIGN)
#define STRICT_ALIGNMENT   1
#define PCC_BITFIELD_TYPE_MATTERS   1
#define MAX_FIXED_MODE_SIZE   GET_MODE_BITSIZE (TImode)
#define TARGET_VTABLE_USES_DESCRIPTORS   (TARGET_ILP32 ? 4 : 2)
#define TARGET_VTABLE_ENTRY_ALIGN   64
#define TARGET_VTABLE_DATA_ENTRY_DISTANCE   (TARGET_ILP32 ? 2 : 1)
#define INT_TYPE_SIZE   32
#define SHORT_TYPE_SIZE   16
#define LONG_TYPE_SIZE   (TARGET_ILP32 ? 32 : 64)
#define LONG_LONG_TYPE_SIZE   64
#define FLOAT_TYPE_SIZE   32
#define DOUBLE_TYPE_SIZE   64
#define LONG_DOUBLE_TYPE_SIZE   (TARGET_HPUX ? 128 : 80)
#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE   80
#define DEFAULT_SIGNED_CHAR   1
#define FIRST_PSEUDO_REGISTER   334
#define ADDL_REGNO_P(REGNO)   ((unsigned HOST_WIDE_INT) (REGNO) <= 3)
#define GR_REGNO_P(REGNO)   ((unsigned HOST_WIDE_INT) (REGNO) <= 127)
#define FR_REGNO_P(REGNO)   ((REGNO) >= 128 && (REGNO) <= 255)
#define FP_REGNO_P(REGNO)   ((REGNO) >= 128 && (REGNO) <= 254 && (REGNO) != 159)
#define PR_REGNO_P(REGNO)   ((REGNO) >= 256 && (REGNO) <= 319)
#define BR_REGNO_P(REGNO)   ((REGNO) >= 320 && (REGNO) <= 327)
#define GENERAL_REGNO_P(REGNO)   (GR_REGNO_P (REGNO) || (REGNO) == FRAME_POINTER_REGNUM)
#define GR_REG(REGNO)   ((REGNO) + 0)
#define FR_REG(REGNO)   ((REGNO) + 128)
#define PR_REG(REGNO)   ((REGNO) + 256)
#define BR_REG(REGNO)   ((REGNO) + 320)
#define OUT_REG(REGNO)   ((REGNO) + 120)
#define IN_REG(REGNO)   ((REGNO) + 112)
#define LOC_REG(REGNO)   ((REGNO) + 32)
#define AR_CCV_REGNUM   329
#define AR_UNAT_REGNUM   330
#define AR_PFS_REGNUM   331
#define AR_LC_REGNUM   332
#define AR_EC_REGNUM   333
#define IN_REGNO_P(REGNO)   ((REGNO) >= IN_REG (0) && (REGNO) <= IN_REG (7))
#define LOC_REGNO_P(REGNO)   ((REGNO) >= LOC_REG (0) && (REGNO) <= LOC_REG (79))
#define OUT_REGNO_P(REGNO)   ((REGNO) >= OUT_REG (0) && (REGNO) <= OUT_REG (7))
#define AR_M_REGNO_P(REGNO)
#define AR_I_REGNO_P(REGNO)
#define AR_REGNO_P(REGNO)
#define R_GR(REGNO)   GR_REG (REGNO)
#define R_FR(REGNO)   FR_REG (REGNO)
#define R_PR(REGNO)   PR_REG (REGNO)
#define R_BR(REGNO)   BR_REG (REGNO)
#define FIXED_REGISTERS
#define CALL_USED_REGISTERS
#define CALL_REALLY_USED_REGISTERS
#define INCOMING_REGNO(OUT)   ((unsigned) ((OUT) - OUT_REG (0)) < 8 ? IN_REG ((OUT) - OUT_REG (0)) : (OUT))
#define OUTGOING_REGNO(IN)   ((unsigned) ((IN) - IN_REG (0)) < 8 ? OUT_REG ((IN) - IN_REG (0)) : (IN))
#define LOCAL_REGNO(REGNO)   (IN_REGNO_P (REGNO) || LOC_REGNO_P (REGNO))
#define SELECT_CC_MODE(OP, X, Y)   CCmode
#define REG_ALLOC_ORDER
#define HARD_REGNO_NREGS(REGNO, MODE)
#define HARD_REGNO_MODE_OK(REGNO, MODE)
#define MODES_TIEABLE_P(MODE1, MODE2)
#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE)
#define GENERAL_REGS   GR_REGS
#define N_REG_CLASSES   ((int) LIM_REG_CLASSES)
#define REG_CLASS_NAMES
#define REG_CLASS_CONTENTS
#define REGNO_REG_CLASS(REGNO)
#define BASE_REG_CLASS   GENERAL_REGS
#define INDEX_REG_CLASS   GENERAL_REGS
#define REG_CLASS_FROM_LETTER(CHAR)
#define REGNO_OK_FOR_BASE_P(REGNO)   (GENERAL_REGNO_P (REGNO) || GENERAL_REGNO_P (reg_renumber[REGNO]))
#define REGNO_OK_FOR_INDEX_P(NUM)   REGNO_OK_FOR_BASE_P (NUM)
#define PREFERRED_RELOAD_CLASS(X, CLASS)   ia64_preferred_reload_class (X, CLASS)
#define SECONDARY_RELOAD_CLASS(CLASS, MODE, X)   ia64_secondary_reload_class (CLASS, MODE, X)
#define CLASS_MAX_NREGS(CLASS, MODE)
#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS)
#define CONST_OK_FOR_I(VALUE)   ((unsigned HOST_WIDE_INT)(VALUE) + 0x2000 < 0x4000)
#define CONST_OK_FOR_J(VALUE)   ((unsigned HOST_WIDE_INT)(VALUE) + 0x200000 < 0x400000)
#define CONST_OK_FOR_K(VALUE)   ((unsigned HOST_WIDE_INT)(VALUE) + 0x80 < 0x100)
#define CONST_OK_FOR_L(VALUE)   ((unsigned HOST_WIDE_INT)(VALUE) + 0x7F < 0x100)
#define CONST_OK_FOR_M(VALUE)   ((unsigned HOST_WIDE_INT)(VALUE) < 0x40)
#define CONST_OK_FOR_N(VALUE)   ((unsigned HOST_WIDE_INT)(VALUE) + 0x100 < 0x200)
#define CONST_OK_FOR_O(VALUE)   ((VALUE) == 0)
#define CONST_OK_FOR_P(VALUE)   ((VALUE) == 0 || (VALUE) == -1)
#define CONST_OK_FOR_LETTER_P(VALUE, C)   ia64_const_ok_for_letter_p (VALUE, C)
#define CONST_DOUBLE_OK_FOR_G(VALUE)
#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C)   ia64_const_double_ok_for_letter_p (VALUE, C)
#define EXTRA_CONSTRAINT(VALUE, C)   ia64_extra_constraint (VALUE, C)
#define EXTRA_MEMORY_CONSTRAINT(C, STR)   ((C) == 'S')
#define STACK_GROWS_DOWNWARD   1
#define FRAME_GROWS_DOWNWARD   0
#define STARTING_FRAME_OFFSET   0
#define STACK_POINTER_OFFSET   16
#define FIRST_PARM_OFFSET(FUNDECL)   0
#define RETURN_ADDR_RTX(COUNT, FRAME)   ia64_return_addr_rtx (COUNT, FRAME)
#define INCOMING_RETURN_ADDR_RTX   gen_rtx_REG (VOIDmode, BR_REG (0))
#define INCOMING_FRAME_SP_OFFSET   STACK_POINTER_OFFSET
#define CFA_FRAME_BASE_OFFSET(FUNDECL)   (-INCOMING_FRAME_SP_OFFSET)
#define STACK_POINTER_REGNUM   12
#define FRAME_POINTER_REGNUM   328
#define HARD_FRAME_POINTER_REGNUM   LOC_REG (79)
#define ARG_POINTER_REGNUM   R_GR(0)
#define INIT_EXPANDERS
#define STATIC_CHAIN_REGNUM   15
#define FRAME_POINTER_REQUIRED   0
#define CAN_DEBUG_WITHOUT_FP
#define ELIMINABLE_REGS
#define CAN_ELIMINATE(FROM, TO)   (TO == BR_REG (0) ? current_function_is_leaf : 1)
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)   ((OFFSET) = ia64_initial_elimination_offset ((FROM), (TO)))
#define ACCUMULATE_OUTGOING_ARGS   1
#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE)   0
#define MAX_ARGUMENT_SLOTS   8
#define MAX_INT_RETURN_SLOTS   4
#define GR_ARG_FIRST   IN_REG (0)
#define GR_RET_FIRST   GR_REG (8)
#define GR_RET_LAST   GR_REG (11)
#define FR_ARG_FIRST   FR_REG (8)
#define FR_RET_FIRST   FR_REG (8)
#define FR_RET_LAST   FR_REG (15)
#define AR_ARG_FIRST   OUT_REG (0)
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED)   ia64_function_arg (&CUM, MODE, TYPE, NAMED, 0)
#define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED)   ia64_function_arg (&CUM, MODE, TYPE, NAMED, 1)
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS)
#define INIT_CUMULATIVE_INCOMING_ARGS(CUM, FNTYPE, LIBNAME)
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)   ia64_function_arg_advance (&CUM, MODE, TYPE, NAMED)
#define FUNCTION_ARG_BOUNDARY(MODE, TYPE)   ia64_function_arg_boundary (MODE, TYPE)
#define FUNCTION_ARG_REGNO_P(REGNO)
#define FUNCTION_VALUE(VALTYPE, FUNC)   ia64_function_value (VALTYPE, FUNC)
#define LIBCALL_VALUE(MODE)
#define FUNCTION_VALUE_REGNO_P(REGNO)
#define DEFAULT_PCC_STRUCT_RETURN   0
#define EXIT_IGNORE_STACK   1
#define EPILOGUE_USES(REGNO)   ia64_epilogue_uses (REGNO)
#define EH_USES(REGNO)   ia64_eh_uses (REGNO)
#define ASM_OUTPUT_FDESC(FILE, DECL, PART)
#define FUNCTION_PROFILER(FILE, LABELNO)   ia64_output_function_profiler(FILE, LABELNO)
#define NO_PROFILE_COUNTERS   1
#define STACK_SAVEAREA_MODE(LEVEL)   ((LEVEL) == SAVE_NONLOCAL ? OImode : Pmode)
#define TRAMPOLINE_SIZE   32
#define TRAMPOLINE_ALIGNMENT   64
#define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, STATIC_CHAIN)   ia64_initialize_trampoline((ADDR), (FNADDR), (STATIC_CHAIN))
#define HAVE_POST_INCREMENT   1
#define HAVE_POST_DECREMENT   1
#define HAVE_POST_MODIFY_DISP   1
#define HAVE_POST_MODIFY_REG   1
#define CONSTANT_ADDRESS_P(X)   0
#define MAX_REGS_PER_ADDRESS   2
#define LEGITIMATE_ADDRESS_REG(X)
#define LEGITIMATE_ADDRESS_DISP(R, X)
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL)
#define REG_OK_FOR_BASE_P(X)   (GENERAL_REGNO_P (REGNO (X)) || (REGNO (X) >= FIRST_PSEUDO_REGISTER))
#define REG_OK_FOR_INDEX_P(X)   REG_OK_FOR_BASE_P (X)
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
#define LEGITIMATE_CONSTANT_P(X)   ia64_legitimate_constant_p (X)
#define REGISTER_MOVE_COST   ia64_register_move_cost
#define MEMORY_MOVE_COST(MODE, CLASS, IN)
#define BRANCH_COST   6
#define SLOW_BYTE_ACCESS   1
#define NO_FUNCTION_CSE
#define TEXT_SECTION_ASM_OP   "\t.text"
#define DATA_SECTION_ASM_OP   "\t.data"
#define BSS_SECTION_ASM_OP   "\t.bss"
#define IA64_DEFAULT_GVALUE   8
#define PIC_OFFSET_TABLE_REGNUM   GR_REG (1)
#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
#define ASM_COMMENT_START   "//"
#define ASM_APP_ON   (TARGET_GNU_AS ? "#APP\n" : "//APP\n")
#define ASM_APP_OFF   (TARGET_GNU_AS ? "#NO_APP\n" : "//NO_APP\n")
#define ASM_OUTPUT_LABEL(STREAM, NAME)
#define GLOBAL_ASM_OP   "\t.global "
#define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME)   ia64_asm_output_external (FILE, DECL, NAME)
#define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM)
#define ASM_PN_FORMAT   (TARGET_GNU_AS ? "%s.%lu" : "%s?%lu")
#define ASM_OUTPUT_DEF(STREAM, NAME, VALUE)
#define REGISTER_NAMES
#define ADDITIONAL_REGISTER_NAMES
#define PRINT_OPERAND(STREAM, X, CODE)   ia64_print_operand (STREAM, X, CODE)
#define PRINT_OPERAND_PUNCT_VALID_P(CODE)   ((CODE) == '+' || (CODE) == ',')
#define PRINT_OPERAND_ADDRESS(STREAM, X)   ia64_print_operand_address (STREAM, X)
#define REGISTER_PREFIX   ""
#define LOCAL_LABEL_PREFIX   "."
#define USER_LABEL_PREFIX   ""
#define IMMEDIATE_PREFIX   ""
#define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL)
#define ADDR_VEC_ALIGN(ADDR_VEC)   3
#define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL)
#define ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX(FILE, ENCODING, SIZE, ADDR, DONE)
#define ASM_NO_SKIP_IN_TEXT   1
#define ASM_OUTPUT_ALIGN(STREAM, POWER)   fprintf (STREAM, "\t.align %d\n", 1<<(POWER))
#define DWARF2_DEBUGGING_INFO   1
#define DWARF2_FRAME_INFO   0
#define DWARF2_ASM_LINE_DEBUG_INFO   (TARGET_DWARF2_ASM)
#define ASM_OUTPUT_DEBUG_LABEL(FILE, PREFIX, NUM)   fprintf (FILE, TARGET_GNU_AS ? "[.%s%d:]\n" : ".%s%d:\n", PREFIX, NUM)
#define ASM_OUTPUT_DWARF_OFFSET(FILE, SIZE, LABEL, SECTION)
#define ASM_OUTPUT_DWARF_PCREL(FILE, SIZE, LABEL)
#define HARD_REGNO_RENAME_OK(REGNO1, REGNO2)   ia64_hard_regno_rename_ok((REGNO1), (REGNO2))
#define SYMBOL_FLAG_SMALL_ADDR   (SYMBOL_FLAG_MACH_DEP << 0)
#define SYMBOL_REF_SMALL_ADDR_P(X)   ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_SMALL_ADDR) != 0)
#define CASE_VECTOR_MODE   ptr_mode
#define CASE_VECTOR_PC_RELATIVE   1
#define WORD_REGISTER_OPERATIONS
#define LOAD_EXTEND_OP(MODE)   ZERO_EXTEND
#define MOVE_MAX   8
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC)   1
#define Pmode   DImode
#define FUNCTION_MODE   Pmode
#define SIMULTANEOUS_PREFETCHES   6
#define PREFETCH_BLOCK   32
#define HANDLE_SYSV_PRAGMA   1
#define MAX_CONDITIONAL_EXECUTE   12
#define TARGET_UNWIND_INFO   1
#define TARGET_UNWIND_TABLES_DEFAULT   true
#define EH_RETURN_DATA_REGNO(N)   ((N) < 4 ? (N) + 15 : INVALID_REGNUM)
#define DONT_USE_BUILTIN_SETJMP
#define PROFILE_BEFORE_PROLOGUE   1
#define TARGET_INIT_LIBFUNCS   ia64_init_libfuncs
#define CPU_UNITS_QUERY   1
#define OPTIMIZATION_OPTIONS(LEVEL, SIZE)   ia64_optimization_options ((LEVEL), (SIZE))

Typedefs

typedef struct ia64_args CUMULATIVE_ARGS

Enumerations

enum  ia64_inline_type { INL_NO = 0, INL_MIN_LAT = 1, INL_MAX_THR = 2 }
enum  processor_type {
  PROCESSOR_EV4, PROCESSOR_EV5, PROCESSOR_EV6, PROCESSOR_I386,
  PROCESSOR_I486, PROCESSOR_PENTIUM, PROCESSOR_PENTIUMPRO, PROCESSOR_K6,
  PROCESSOR_ATHLON, PROCESSOR_PENTIUM4, PROCESSOR_max, PROCESSOR_M88100,
  PROCESSOR_M88110, PROCESSOR_M88000, PROCESSOR_700, PROCESSOR_7100,
  PROCESSOR_7100LC, PROCESSOR_7200, PROCESSOR_8000, PROCESSOR_RIOS1,
  PROCESSOR_RIOS2, PROCESSOR_RS64A, PROCESSOR_MPCCORE, PROCESSOR_PPC403,
  PROCESSOR_PPC405, PROCESSOR_PPC601, PROCESSOR_PPC603, PROCESSOR_PPC604,
  PROCESSOR_PPC604e, PROCESSOR_PPC620, PROCESSOR_PPC630, PROCESSOR_PPC750,
  PROCESSOR_PPC7400, PROCESSOR_PPC7450, PROCESSOR_SH1, PROCESSOR_SH2,
  PROCESSOR_SH3, PROCESSOR_SH3E, PROCESSOR_SH4, PROCESSOR_SH5,
  PROCESSOR_DEFAULT, PROCESSOR_R3000, PROCESSOR_R3900, PROCESSOR_R6000,
  PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111, PROCESSOR_R4120,
  PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650, PROCESSOR_R5000,
  PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R8000, PROCESSOR_R4KC,
  PROCESSOR_R5KC, PROCESSOR_R20KC, PROCESSOR_SR71000, PROCESSOR_SB1,
  PROCESSOR_V7, PROCESSOR_CYPRESS, PROCESSOR_V8, PROCESSOR_SUPERSPARC,
  PROCESSOR_SPARCLITE, PROCESSOR_F930, PROCESSOR_F934, PROCESSOR_HYPERSPARC,
  PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET, PROCESSOR_TSC701, PROCESSOR_V9,
  PROCESSOR_ULTRASPARC, PROCESSOR_DEFAULT, PROCESSOR_R3000, PROCESSOR_R3900,
  PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111,
  PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650,
  PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R8000,
  PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC, PROCESSOR_SR71000,
  PROCESSOR_SB1, PROCESSOR_DEFAULT, PROCESSOR_R3000, PROCESSOR_R3900,
  PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111,
  PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650,
  PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R8000,
  PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC, PROCESSOR_SR71000,
  PROCESSOR_SB1, PROCESSOR_EV4, PROCESSOR_EV5, PROCESSOR_EV6,
  PROCESSOR_I386, PROCESSOR_I486, PROCESSOR_PENTIUM, PROCESSOR_PENTIUMPRO,
  PROCESSOR_K6, PROCESSOR_ATHLON, PROCESSOR_PENTIUM4, PROCESSOR_max,
  PROCESSOR_M88100, PROCESSOR_M88110, PROCESSOR_M88000, PROCESSOR_700,
  PROCESSOR_7100, PROCESSOR_7100LC, PROCESSOR_7200, PROCESSOR_8000,
  PROCESSOR_RIOS1, PROCESSOR_RIOS2, PROCESSOR_RS64A, PROCESSOR_MPCCORE,
  PROCESSOR_PPC403, PROCESSOR_PPC405, PROCESSOR_PPC601, PROCESSOR_PPC603,
  PROCESSOR_PPC604, PROCESSOR_PPC604e, PROCESSOR_PPC620, PROCESSOR_PPC630,
  PROCESSOR_PPC750, PROCESSOR_PPC7400, PROCESSOR_PPC7450, PROCESSOR_SH1,
  PROCESSOR_SH2, PROCESSOR_SH3, PROCESSOR_SH3E, PROCESSOR_SH4,
  PROCESSOR_SH5, PROCESSOR_DEFAULT, PROCESSOR_R3000, PROCESSOR_R3900,
  PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111,
  PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650,
  PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R8000,
  PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC, PROCESSOR_SR71000,
  PROCESSOR_SB1, PROCESSOR_V7, PROCESSOR_CYPRESS, PROCESSOR_V8,
  PROCESSOR_SUPERSPARC, PROCESSOR_SPARCLITE, PROCESSOR_F930, PROCESSOR_F934,
  PROCESSOR_HYPERSPARC, PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET, PROCESSOR_TSC701,
  PROCESSOR_V9, PROCESSOR_ULTRASPARC, PROCESSOR_DEFAULT, PROCESSOR_R3000,
  PROCESSOR_R3900, PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100,
  PROCESSOR_R4111, PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600,
  PROCESSOR_R4650, PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500,
  PROCESSOR_R8000, PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC,
  PROCESSOR_SR71000, PROCESSOR_SB1, PROCESSOR_DEFAULT, PROCESSOR_R3000,
  PROCESSOR_R3900, PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100,
  PROCESSOR_R4111, PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600,
  PROCESSOR_R4650, PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500,
  PROCESSOR_R8000, PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC,
  PROCESSOR_SR71000, PROCESSOR_SB1, PROCESSOR_EV4, PROCESSOR_EV5,
  PROCESSOR_EV6, PROCESSOR_MAX, ARM_CORE, PROCESSOR_I386,
  PROCESSOR_I486, PROCESSOR_PENTIUM, PROCESSOR_PENTIUMPRO, PROCESSOR_K6,
  PROCESSOR_ATHLON, PROCESSOR_PENTIUM4, PROCESSOR_K8, PROCESSOR_NOCONA,
  PROCESSOR_max, PROCESSOR_ITANIUM, PROCESSOR_ITANIUM2, PROCESSOR_max,
  PROCESSOR_DEFAULT, PROCESSOR_IQ2000, PROCESSOR_IQ10, PROCESSOR_DEFAULT,
  PROCESSOR_4KC, PROCESSOR_5KC, PROCESSOR_20KC, PROCESSOR_M4K,
  PROCESSOR_R3000, PROCESSOR_R3900, PROCESSOR_R6000, PROCESSOR_R4000,
  PROCESSOR_R4100, PROCESSOR_R4111, PROCESSOR_R4120, PROCESSOR_R4130,
  PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650, PROCESSOR_R5000,
  PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R7000, PROCESSOR_R8000,
  PROCESSOR_R9000, PROCESSOR_SB1, PROCESSOR_SR71000, PROCESSOR_700,
  PROCESSOR_7100, PROCESSOR_7100LC, PROCESSOR_7200, PROCESSOR_7300,
  PROCESSOR_8000, PROCESSOR_RIOS1, PROCESSOR_RIOS2, PROCESSOR_RS64A,
  PROCESSOR_MPCCORE, PROCESSOR_PPC403, PROCESSOR_PPC405, PROCESSOR_PPC440,
  PROCESSOR_PPC601, PROCESSOR_PPC603, PROCESSOR_PPC604, PROCESSOR_PPC604e,
  PROCESSOR_PPC620, PROCESSOR_PPC630, PROCESSOR_PPC750, PROCESSOR_PPC7400,
  PROCESSOR_PPC7450, PROCESSOR_PPC8540, PROCESSOR_POWER4, PROCESSOR_POWER5,
  PROCESSOR_9672_G5, PROCESSOR_9672_G6, PROCESSOR_2064_Z900, PROCESSOR_2084_Z990,
  PROCESSOR_max, PROCESSOR_SH1, PROCESSOR_SH2, PROCESSOR_SH2E,
  PROCESSOR_SH2A, PROCESSOR_SH3, PROCESSOR_SH3E, PROCESSOR_SH4,
  PROCESSOR_SH4A, PROCESSOR_SH5, PROCESSOR_V7, PROCESSOR_CYPRESS,
  PROCESSOR_V8, PROCESSOR_SUPERSPARC, PROCESSOR_SPARCLITE, PROCESSOR_F930,
  PROCESSOR_F934, PROCESSOR_HYPERSPARC, PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET,
  PROCESSOR_TSC701, PROCESSOR_V9, PROCESSOR_ULTRASPARC, PROCESSOR_ULTRASPARC3,
  PROCESSOR_EV4, PROCESSOR_EV5, PROCESSOR_EV6, PROCESSOR_MAX,
  ARM_CORE, PROCESSOR_I386, PROCESSOR_I486, PROCESSOR_PENTIUM,
  PROCESSOR_PENTIUMPRO, PROCESSOR_K6, PROCESSOR_ATHLON, PROCESSOR_PENTIUM4,
  PROCESSOR_K8, PROCESSOR_NOCONA, PROCESSOR_GENERIC32, PROCESSOR_GENERIC64,
  PROCESSOR_AMDFAM10, PROCESSOR_max, PROCESSOR_ITANIUM, PROCESSOR_ITANIUM2,
  PROCESSOR_max, PROCESSOR_DEFAULT, PROCESSOR_IQ2000, PROCESSOR_IQ10,
  PROCESSOR_R3000, PROCESSOR_4KC, PROCESSOR_4KP, PROCESSOR_5KC,
  PROCESSOR_5KF, PROCESSOR_20KC, PROCESSOR_24K, PROCESSOR_24KX,
  PROCESSOR_M4K, PROCESSOR_R3900, PROCESSOR_R6000, PROCESSOR_R4000,
  PROCESSOR_R4100, PROCESSOR_R4111, PROCESSOR_R4120, PROCESSOR_R4130,
  PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650, PROCESSOR_R5000,
  PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R7000, PROCESSOR_R8000,
  PROCESSOR_R9000, PROCESSOR_SB1, PROCESSOR_SB1A, PROCESSOR_SR71000,
  PROCESSOR_MAX, PROCESSOR_MN10300, PROCESSOR_AM33, PROCESSOR_AM33_2,
  PROCESSOR_MS1_64_001, PROCESSOR_MS1_16_002, PROCESSOR_MS1_16_003, PROCESSOR_MS2,
  PROCESSOR_700, PROCESSOR_7100, PROCESSOR_7100LC, PROCESSOR_7200,
  PROCESSOR_7300, PROCESSOR_8000, PROCESSOR_RIOS1, PROCESSOR_RIOS2,
  PROCESSOR_RS64A, PROCESSOR_MPCCORE, PROCESSOR_PPC403, PROCESSOR_PPC405,
  PROCESSOR_PPC440, PROCESSOR_PPC601, PROCESSOR_PPC603, PROCESSOR_PPC604,
  PROCESSOR_PPC604e, PROCESSOR_PPC620, PROCESSOR_PPC630, PROCESSOR_PPC750,
  PROCESSOR_PPC7400, PROCESSOR_PPC7450, PROCESSOR_PPC8540, PROCESSOR_POWER4,
  PROCESSOR_POWER5, PROCESSOR_9672_G5, PROCESSOR_9672_G6, PROCESSOR_2064_Z900,
  PROCESSOR_2084_Z990, PROCESSOR_2094_Z9_109, PROCESSOR_max, PROCESSOR_SH1,
  PROCESSOR_SH2, PROCESSOR_SH2E, PROCESSOR_SH2A, PROCESSOR_SH3,
  PROCESSOR_SH3E, PROCESSOR_SH4, PROCESSOR_SH4A, PROCESSOR_SH5,
  PROCESSOR_V7, PROCESSOR_CYPRESS, PROCESSOR_V8, PROCESSOR_SUPERSPARC,
  PROCESSOR_SPARCLITE, PROCESSOR_F930, PROCESSOR_F934, PROCESSOR_HYPERSPARC,
  PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET, PROCESSOR_TSC701, PROCESSOR_V9,
  PROCESSOR_ULTRASPARC, PROCESSOR_ULTRASPARC3, PROCESSOR_NIAGARA
}
enum  reg_class {
  NO_REGS, R2, R0_1, INDEX_REGS,
  BASE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  LR0_REGS, GENERAL_REGS, BP_REGS, FC_REGS,
  CR_REGS, Q_REGS, SPECIAL_REGS, ACCUM0_REGS,
  ACCUM_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R24_REG, R25_REG, R27_REG,
  GENERAL_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, LPCOUNT_REG, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, FPU_REGS, LO_REGS,
  STACK_REG, BASE_REGS, HI_REGS, CC_REG,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REG, POINTER_X_REGS, POINTER_Y_REGS, POINTER_Z_REGS,
  STACK_REG, BASE_POINTER_REGS, POINTER_REGS, ADDW_REGS,
  SIMPLE_LD_REGS, LD_REGS, NO_LD_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0R1_REGS,
  R2R3_REGS, EXT_LOW_REGS, EXT_REGS, ADDR_REGS,
  INDEX_REGS, BK_REG, SP_REG, RC_REG,
  COUNTER_REGS, INT_REGS, GENERAL_REGS, DP_REG,
  ST_REG, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, S_REGS, INDEX_REGS, SP_REGS,
  A_REGS, SI_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  REPEAT_REGS, CR_REGS, ACCUM_REGS, OTHER_FLAG_REGS,
  F0_REGS, F1_REGS, BR_FLAG_REGS, FLAG_REGS,
  EVEN_REGS, GPR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, A0H_REG, A0L_REG, A0_REG,
  A1H_REG, ACCUM_HIGH_REGS, A1L_REG, ACCUM_LOW_REGS,
  A1_REG, ACCUM_REGS, X_REG, X_OR_ACCUM_LOW_REGS,
  X_OR_ACCUM_REGS, YH_REG, YH_OR_ACCUM_HIGH_REGS, X_OR_YH_REGS,
  YL_REG, YL_OR_ACCUM_LOW_REGS, X_OR_YL_REGS, X_OR_Y_REGS,
  Y_REG, ACCUM_OR_Y_REGS, PH_REG, X_OR_PH_REGS,
  PL_REG, PL_OR_ACCUM_LOW_REGS, X_OR_PL_REGS, YL_OR_PL_OR_ACCUM_LOW_REGS,
  P_REG, ACCUM_OR_P_REGS, YL_OR_P_REGS, ACCUM_LOW_OR_YL_OR_P_REGS,
  Y_OR_P_REGS, ACCUM_Y_OR_P_REGS, NO_FRAME_Y_ADDR_REGS, Y_ADDR_REGS,
  ACCUM_LOW_OR_Y_ADDR_REGS, ACCUM_OR_Y_ADDR_REGS, X_OR_Y_ADDR_REGS, Y_OR_Y_ADDR_REGS,
  P_OR_Y_ADDR_REGS, NON_HIGH_YBASE_ELIGIBLE_REGS, YBASE_ELIGIBLE_REGS, J_REG,
  J_OR_DAU_16_BIT_REGS, BMU_REGS, NOHIGH_NON_ADDR_REGS, NON_ADDR_REGS,
  SLOW_MEM_LOAD_REGS, NOHIGH_NON_YBASE_REGS, NO_ACCUM_NON_YBASE_REGS, NON_YBASE_REGS,
  YBASE_VIRT_REGS, ACCUM_LOW_OR_YBASE_REGS, ACCUM_OR_YBASE_REGS, X_OR_YBASE_REGS,
  Y_OR_YBASE_REGS, ACCUM_LOW_YL_PL_OR_YBASE_REGS, P_OR_YBASE_REGS, ACCUM_Y_P_OR_YBASE_REGS,
  Y_ADDR_OR_YBASE_REGS, YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS, YBASE_OR_YBASE_ELIGIBLE_REGS, NO_HIGH_ALL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG,
  MULTIPLY_64_REG, LOW_REGS, HIGH_REGS, REAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,
  MAC_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ADDR_REGS, DATA_REGS, FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, AREG, DREG,
  CREG, BREG, SIREG, DIREG,
  AD_REGS, Q_REGS, NON_Q_REGS, INDEX_REGS,
  LEGACY_REGS, GENERAL_REGS, FP_TOP_REG, FP_SECOND_REG,
  FLOAT_REGS, SSE_REGS, MMX_REGS, FP_TOP_SSE_REGS,
  FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS, INT_SSE_REGS,
  FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GLOBAL_REGS, LOCAL_REGS, LOCAL_OR_GLOBAL_REGS,
  FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  PR_REGS, BR_REGS, AR_M_REGS, AR_I_REGS,
  ADDL_REGS, GR_REGS, FR_REGS, GR_AND_BR_REGS,
  GR_AND_FR_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  CARRY_REG, ACCUM_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, D_REGS, X_REGS,
  Y_REGS, SP_REGS, DA_REGS, DB_REGS,
  Z_REGS, D8_REGS, Q_REGS, D_OR_X_REGS,
  D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS, A_REGS,
  X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS, A_OR_D_REGS,
  A_OR_SP_REGS, H_REGS, S_REGS, D_OR_S_REGS,
  X_OR_S_REGS, Y_OR_S_REGS, SP_OR_S_REGS, D_OR_X_OR_S_REGS,
  D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS, A_OR_S_REGS, D_OR_A_OR_S_REGS,
  TMP_REGS, D_OR_A_OR_TMP_REGS, G_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, DATA_REGS, ADDR_REGS,
  FP_REGS, GENERAL_REGS, DATA_OR_FP_REGS, ADDR_OR_FP_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, AP_REG,
  XRF_REGS, GENERAL_REGS, AGRF_REGS, XGRF_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, ONLYR1_REGS,
  LRW_REGS, GENERAL_REGS, C_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, REMAINDER_REG,
  HIMULT_REG, SYSTEM_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, DATA_REGS, ADDRESS_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,
  ADDRESS_REGS, SP_REGS, DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,
  EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS,
  SP_OR_ADDRESS_OR_EXTENDED_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, FLOAT_REG0, LONG_FLOAT_REG0,
  FLOAT_REGS, FP_REGS, GEN_AND_FP_REGS, FRAME_POINTER_REG,
  STACK_POINTER_REG, GEN_AND_MEM_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R1_REGS, GENERAL_REGS, FPUPPER_REGS,
  FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,
  FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, MUL_REGS,
  GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS, FPU_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, OUT_REGS,
  STD_REGS, ARG_REGS, SRC_REGS, DST_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0_REGS,
  R15_REGS, BASE_REGS, GENERAL_REGS, FP_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, BASE_REGS,
  GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS, VRSAVE_REGS,
  NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,
  LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,
  CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, ADDR_REGS, GENERAL_REGS,
  FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REGS, PR_REGS,
  T_REGS, MAC_REGS, FPUL_REGS, SIBCALL_REGS,
  GENERAL_REGS, FP0_REGS, FP_REGS, DF_REGS,
  FPSCR_REGS, GENERAL_FP_REGS, TARGET_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, M16_NA_REGS, M16_REGS,
  T_REG, M16_T_REGS, GR_REGS, FP_REGS,
  HI_REG, LO_REG, HILO_REG, MD_REGS,
  COP0_REGS, COP2_REGS, COP3_REGS, HI_AND_GR_REGS,
  LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS,
  COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS,
  ST_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  FPCC_REGS, I64_REGS, GENERAL_REGS, FP_REGS,
  EXTRA_FP_REGS, GENERAL_OR_FP_REGS, GENERAL_OR_EXTRA_FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REGS, R1_REGS,
  TWO_REGS, R2_REGS, EIGHT_REGS, R8_REGS,
  ICALL_REGS, GENERAL_REGS, CARRY_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, BR_REGS, FP_REGS, ACC_REG,
  SP_REG, RL_REGS, GR_REGS, AR_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,
  M16_REGS, T_REG, M16_T_REGS, GR_REGS,
  FP_REGS, HI_REG, LO_REG, HILO_REG,
  MD_REGS, COP0_REGS, COP2_REGS, COP3_REGS,
  HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS,
  COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS,
  ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, M16_NA_REGS, M16_REGS, T_REG,
  M16_T_REGS, GR_REGS, FP_REGS, HI_REG,
  LO_REG, HILO_REG, MD_REGS, COP0_REGS,
  COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,
  HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS,
  COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R2,
  R0_1, INDEX_REGS, BASE_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, LR0_REGS, GENERAL_REGS,
  BP_REGS, FC_REGS, CR_REGS, Q_REGS,
  SPECIAL_REGS, ACCUM0_REGS, ACCUM_REGS, FLOAT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R24_REG,
  R25_REG, R27_REG, GENERAL_REGS, FLOAT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  FPU_REGS, LO_REGS, STACK_REG, BASE_REGS,
  HI_REGS, CC_REG, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REG, POINTER_X_REGS,
  POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG, BASE_POINTER_REGS,
  POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS, LD_REGS,
  NO_LD_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R0R1_REGS, R2R3_REGS, EXT_LOW_REGS,
  EXT_REGS, ADDR_REGS, INDEX_REGS, BK_REG,
  SP_REG, RC_REG, COUNTER_REGS, INT_REGS,
  GENERAL_REGS, DP_REG, ST_REG, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, FLOAT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, S_REGS,
  INDEX_REGS, SP_REGS, A_REGS, SI_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, REPEAT_REGS, CR_REGS,
  ACCUM_REGS, OTHER_FLAG_REGS, F0_REGS, F1_REGS,
  BR_FLAG_REGS, FLAG_REGS, EVEN_REGS, GPR_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, A0H_REG,
  A0L_REG, A0_REG, A1H_REG, ACCUM_HIGH_REGS,
  A1L_REG, ACCUM_LOW_REGS, A1_REG, ACCUM_REGS,
  X_REG, X_OR_ACCUM_LOW_REGS, X_OR_ACCUM_REGS, YH_REG,
  YH_OR_ACCUM_HIGH_REGS, X_OR_YH_REGS, YL_REG, YL_OR_ACCUM_LOW_REGS,
  X_OR_YL_REGS, X_OR_Y_REGS, Y_REG, ACCUM_OR_Y_REGS,
  PH_REG, X_OR_PH_REGS, PL_REG, PL_OR_ACCUM_LOW_REGS,
  X_OR_PL_REGS, YL_OR_PL_OR_ACCUM_LOW_REGS, P_REG, ACCUM_OR_P_REGS,
  YL_OR_P_REGS, ACCUM_LOW_OR_YL_OR_P_REGS, Y_OR_P_REGS, ACCUM_Y_OR_P_REGS,
  NO_FRAME_Y_ADDR_REGS, Y_ADDR_REGS, ACCUM_LOW_OR_Y_ADDR_REGS, ACCUM_OR_Y_ADDR_REGS,
  X_OR_Y_ADDR_REGS, Y_OR_Y_ADDR_REGS, P_OR_Y_ADDR_REGS, NON_HIGH_YBASE_ELIGIBLE_REGS,
  YBASE_ELIGIBLE_REGS, J_REG, J_OR_DAU_16_BIT_REGS, BMU_REGS,
  NOHIGH_NON_ADDR_REGS, NON_ADDR_REGS, SLOW_MEM_LOAD_REGS, NOHIGH_NON_YBASE_REGS,
  NO_ACCUM_NON_YBASE_REGS, NON_YBASE_REGS, YBASE_VIRT_REGS, ACCUM_LOW_OR_YBASE_REGS,
  ACCUM_OR_YBASE_REGS, X_OR_YBASE_REGS, Y_OR_YBASE_REGS, ACCUM_LOW_YL_PL_OR_YBASE_REGS,
  P_OR_YBASE_REGS, ACCUM_Y_P_OR_YBASE_REGS, Y_ADDR_OR_YBASE_REGS, YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS,
  YBASE_OR_YBASE_ELIGIBLE_REGS, NO_HIGH_ALL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, MULTIPLY_32_REG, MULTIPLY_64_REG, LOW_REGS,
  HIGH_REGS, REAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, MAC_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, ADDR_REGS, DATA_REGS,
  FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  AREG, DREG, CREG, BREG,
  SIREG, DIREG, AD_REGS, Q_REGS,
  NON_Q_REGS, INDEX_REGS, LEGACY_REGS, GENERAL_REGS,
  FP_TOP_REG, FP_SECOND_REG, FLOAT_REGS, SSE_REGS,
  MMX_REGS, FP_TOP_SSE_REGS, FP_SECOND_SSE_REGS, FLOAT_SSE_REGS,
  FLOAT_INT_REGS, INT_SSE_REGS, FLOAT_INT_SSE_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, FP_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GLOBAL_REGS,
  LOCAL_REGS, LOCAL_OR_GLOBAL_REGS, FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, PR_REGS, BR_REGS,
  AR_M_REGS, AR_I_REGS, ADDL_REGS, GR_REGS,
  FR_REGS, GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, CARRY_REG, ACCUM_REGS,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  D_REGS, X_REGS, Y_REGS, SP_REGS,
  DA_REGS, DB_REGS, Z_REGS, D8_REGS,
  Q_REGS, D_OR_X_REGS, D_OR_Y_REGS, D_OR_SP_REGS,
  X_OR_Y_REGS, A_REGS, X_OR_SP_REGS, Y_OR_SP_REGS,
  X_OR_Y_OR_D_REGS, A_OR_D_REGS, A_OR_SP_REGS, H_REGS,
  S_REGS, D_OR_S_REGS, X_OR_S_REGS, Y_OR_S_REGS,
  SP_OR_S_REGS, D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS,
  A_OR_S_REGS, D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS,
  G_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  DATA_REGS, ADDR_REGS, FP_REGS, GENERAL_REGS,
  DATA_OR_FP_REGS, ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS,
  AGRF_REGS, XGRF_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, ONLYR1_REGS, LRW_REGS, GENERAL_REGS,
  C_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, REMAINDER_REG, HIMULT_REG, SYSTEM_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,
  ADDRESS_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS,
  DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS, EXTENDED_REGS, DATA_OR_EXTENDED_REGS,
  ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,
  FLOAT_REG0, LONG_FLOAT_REG0, FLOAT_REGS, FP_REGS,
  GEN_AND_FP_REGS, FRAME_POINTER_REG, STACK_POINTER_REG, GEN_AND_MEM_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,
  GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,
  SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R1_REGS, GENERAL_REGS, FPUPPER_REGS, FP_REGS,
  GENERAL_OR_FP_REGS, SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS,
  NO_LOAD_FPU_REGS, FPU_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, OUT_REGS, STD_REGS, ARG_REGS,
  SRC_REGS, DST_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R0_REGS, R15_REGS, BASE_REGS,
  GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, BASE_REGS, GENERAL_REGS, FLOAT_REGS,
  ALTIVEC_REGS, VRSAVE_REGS, NON_SPECIAL_REGS, MQ_REGS,
  LINK_REGS, CTR_REGS, LINK_OR_CTR_REGS, SPECIAL_REGS,
  SPEC_OR_GEN_REGS, CR0_REGS, CR_REGS, NON_FLOAT_REGS,
  XER_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ADDR_REGS, GENERAL_REGS, FP_REGS, ADDR_FP_REGS,
  GENERAL_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REGS, PR_REGS, T_REGS, MAC_REGS,
  FPUL_REGS, SIBCALL_REGS, GENERAL_REGS, FP0_REGS,
  FP_REGS, DF_REGS, FPSCR_REGS, GENERAL_FP_REGS,
  TARGET_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  M16_NA_REGS, M16_REGS, T_REG, M16_T_REGS,
  GR_REGS, FP_REGS, HI_REG, LO_REG,
  HILO_REG, MD_REGS, COP0_REGS, COP2_REGS,
  COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS,
  HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,
  ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, FPCC_REGS, I64_REGS,
  GENERAL_REGS, FP_REGS, EXTRA_FP_REGS, GENERAL_OR_FP_REGS,
  GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REGS, R1_REGS, TWO_REGS, R2_REGS,
  EIGHT_REGS, R8_REGS, ICALL_REGS, GENERAL_REGS,
  CARRY_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, BR_REGS,
  FP_REGS, ACC_REG, SP_REG, RL_REGS,
  GR_REGS, AR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, M16_NA_REGS, M16_REGS, T_REG,
  M16_T_REGS, GR_REGS, FP_REGS, HI_REG,
  LO_REG, HILO_REG, MD_REGS, COP0_REGS,
  COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,
  HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS,
  COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,
  M16_REGS, T_REG, M16_T_REGS, GR_REGS,
  FP_REGS, HI_REG, LO_REG, HILO_REG,
  MD_REGS, COP0_REGS, COP2_REGS, COP3_REGS,
  HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS,
  COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS,
  ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R0_REG, R24_REG, R25_REG,
  R27_REG, GENERAL_REGS, FLOAT_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, FPA_REGS,
  CIRRUS_REGS, VFP_REGS, IWMMXT_GR_REGS, IWMMXT_REGS,
  LO_REGS, STACK_REG, BASE_REGS, HI_REGS,
  CC_REG, VFPCC_REG, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REG, POINTER_X_REGS,
  POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG, BASE_POINTER_REGS,
  POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS, LD_REGS,
  NO_LD_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, IREGS, BREGS, LREGS,
  MREGS, CIRCREGS, DAGREGS, EVEN_AREGS,
  ODD_AREGS, AREGS, CCREGS, EVEN_DREGS,
  ODD_DREGS, DREGS, PREGS_CLOBBERED, PREGS,
  DPREGS, MOST_REGS, PROLOGUE_REGS, NON_A_CC_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0R1_REGS,
  R2R3_REGS, EXT_LOW_REGS, EXT_REGS, ADDR_REGS,
  INDEX_REGS, BK_REG, SP_REG, RC_REG,
  COUNTER_REGS, INT_REGS, GENERAL_REGS, DP_REG,
  ST_REG, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG,
  MULTIPLY_64_REG, LOW_REGS, HIGH_REGS, REAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, ICC_REGS,
  FCC_REGS, CC_REGS, ICR_REGS, FCR_REGS,
  CR_REGS, LCR_REG, LR_REG, GR8_REGS,
  GR9_REGS, GR89_REGS, FDPIC_REGS, FDPIC_FPTR_REGS,
  FDPIC_CALL_REGS, SPR_REGS, QUAD_ACC_REGS, EVEN_ACC_REGS,
  ACC_REGS, ACCG_REGS, QUAD_FPR_REGS, FEVEN_REGS,
  FPR_REGS, QUAD_REGS, EVEN_REGS, GPR_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, COUNTER_REGS,
  SOURCE_REGS, DESTINATION_REGS, GENERAL_REGS, MAC_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, AREG,
  DREG, CREG, BREG, SIREG,
  DIREG, AD_REGS, Q_REGS, NON_Q_REGS,
  INDEX_REGS, LEGACY_REGS, GENERAL_REGS, FP_TOP_REG,
  FP_SECOND_REG, FLOAT_REGS, SSE_REGS, MMX_REGS,
  FP_TOP_SSE_REGS, FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS,
  INT_SSE_REGS, FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, PR_REGS, BR_REGS,
  AR_M_REGS, AR_I_REGS, ADDL_REGS, GR_REGS,
  FR_REGS, GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, DPH_REGS, DPL_REGS,
  DP_REGS, SP_REGS, IPH_REGS, IPL_REGS,
  IP_REGS, DP_SP_REGS, PTR_REGS, NONPTR_REGS,
  NONSP_REGS, GENERAL_REGS, ALL_REGS = GENERAL_REGS, LIM_REG_CLASSES,
  NO_REGS, GR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, CARRY_REG, ACCUM_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, D_REGS,
  X_REGS, Y_REGS, SP_REGS, DA_REGS,
  DB_REGS, Z_REGS, D8_REGS, Q_REGS,
  D_OR_X_REGS, D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS,
  A_REGS, X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS,
  A_OR_D_REGS, A_OR_SP_REGS, H_REGS, S_REGS,
  D_OR_S_REGS, X_OR_S_REGS, Y_OR_S_REGS, Z_OR_S_REGS,
  SP_OR_S_REGS, D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS,
  A_OR_S_REGS, D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS,
  G_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  DATA_REGS, ADDR_REGS, FP_REGS, GENERAL_REGS,
  DATA_OR_FP_REGS, ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, ONLYR1_REGS, LRW_REGS, GENERAL_REGS,
  C_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  M16_NA_REGS, M16_REGS, T_REG, M16_T_REGS,
  PIC_FN_ADDR_REG, LEA_REGS, GR_REGS, FP_REGS,
  HI_REG, LO_REG, MD_REGS, COP0_REGS,
  COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,
  HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,
  ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, REMAINDER_REG,
  HIMULT_REG, SYSTEM_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS,
  DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS, EXTENDED_REGS, DATA_OR_EXTENDED_REGS,
  ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS, FP_REGS,
  FP_ACC_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, FLOAT_REG0, LONG_FLOAT_REG0,
  FLOAT_REGS, LONG_REGS, FP_REGS, GEN_AND_FP_REGS,
  FRAME_POINTER_REG, STACK_POINTER_REG, GEN_AND_MEM_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,
  FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,
  GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,
  SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS,
  FPU_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  BASE_REGS, GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS,
  VRSAVE_REGS, VSCR_REGS, SPE_ACC_REGS, SPEFSCR_REGS,
  NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,
  LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,
  CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, CC_REGS, ADDR_REGS,
  GENERAL_REGS, ACCESS_REGS, ADDR_CC_REGS, GENERAL_CC_REGS,
  FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REGS, PR_REGS,
  T_REGS, MAC_REGS, FPUL_REGS, SIBCALL_REGS,
  GENERAL_REGS, FP0_REGS, FP_REGS, DF_HI_REGS,
  DF_REGS, FPSCR_REGS, GENERAL_FP_REGS, TARGET_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, FPCC_REGS,
  I64_REGS, GENERAL_REGS, FP_REGS, EXTRA_FP_REGS,
  GENERAL_OR_FP_REGS, GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R0_REGS, R1_REGS, TWO_REGS,
  R2_REGS, EIGHT_REGS, R8_REGS, ICALL_REGS,
  GENERAL_REGS, CARRY_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  BR_REGS, FP_REGS, ACC_REG, SP_REG,
  RL_REGS, GR_REGS, AR_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REG, R24_REG,
  R25_REG, R27_REG, GENERAL_REGS, FLOAT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  FPA_REGS, CIRRUS_REGS, VFP_REGS, IWMMXT_GR_REGS,
  IWMMXT_REGS, LO_REGS, STACK_REG, BASE_REGS,
  HI_REGS, CC_REG, VFPCC_REG, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0_REG,
  POINTER_X_REGS, POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG,
  BASE_POINTER_REGS, POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS,
  LD_REGS, NO_LD_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, IREGS, BREGS,
  LREGS, MREGS, CIRCREGS, DAGREGS,
  EVEN_AREGS, ODD_AREGS, AREGS, CCREGS,
  EVEN_DREGS, ODD_DREGS, DREGS, FDPIC_REGS,
  FDPIC_FPTR_REGS, PREGS_CLOBBERED, PREGS, IPREGS,
  DPREGS, MOST_REGS, LT_REGS, LC_REGS,
  LB_REGS, PROLOGUE_REGS, NON_A_CC_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0R1_REGS, R2R3_REGS,
  EXT_LOW_REGS, EXT_REGS, ADDR_REGS, INDEX_REGS,
  BK_REG, SP_REG, RC_REG, COUNTER_REGS,
  INT_REGS, GENERAL_REGS, DP_REG, ST_REG,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, MOF_REGS,
  CC0_REGS, SPECIAL_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, LO_REGS, HI_REGS,
  HILO_REGS, NOSP_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG, MULTIPLY_64_REG,
  LOW_REGS, HIGH_REGS, REAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, ICC_REGS, FCC_REGS,
  CC_REGS, ICR_REGS, FCR_REGS, CR_REGS,
  LCR_REG, LR_REG, GR8_REGS, GR9_REGS,
  GR89_REGS, FDPIC_REGS, FDPIC_FPTR_REGS, FDPIC_CALL_REGS,
  SPR_REGS, QUAD_ACC_REGS, EVEN_ACC_REGS, ACC_REGS,
  ACCG_REGS, QUAD_FPR_REGS, FEVEN_REGS, FPR_REGS,
  QUAD_REGS, EVEN_REGS, GPR_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, COUNTER_REGS, SOURCE_REGS,
  DESTINATION_REGS, GENERAL_REGS, MAC_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, AREG, DREG,
  CREG, BREG, SIREG, DIREG,
  AD_REGS, Q_REGS, NON_Q_REGS, INDEX_REGS,
  LEGACY_REGS, GENERAL_REGS, FP_TOP_REG, FP_SECOND_REG,
  FLOAT_REGS, SSE_REGS, MMX_REGS, FP_TOP_SSE_REGS,
  FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS, INT_SSE_REGS,
  FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  PR_REGS, BR_REGS, AR_M_REGS, AR_I_REGS,
  ADDL_REGS, GR_REGS, FP_REGS, FR_REGS,
  GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, SP_REGS, FB_REGS, SB_REGS,
  CR_REGS, R0_REGS, R1_REGS, R2_REGS,
  R3_REGS, R02_REGS, HL_REGS, QI_REGS,
  R23_REGS, R03_REGS, DI_REGS, A0_REGS,
  A1_REGS, A_REGS, AD_REGS, PS_REGS,
  SI_REGS, HI_REGS, RA_REGS, GENERAL_REGS,
  FLG_REGS, HC_REGS, MEM_REGS, R02_A_MEM_REGS,
  A_HL_MEM_REGS, R1_R3_A_MEM_REGS, R03_MEM_REGS, A_HI_MEM_REGS,
  A_AD_CR_MEM_SI_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  CARRY_REG, ACCUM_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, D_REGS, X_REGS,
  Y_REGS, SP_REGS, DA_REGS, DB_REGS,
  Z_REGS, D8_REGS, Q_REGS, D_OR_X_REGS,
  D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS, A_REGS,
  X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS, A_OR_D_REGS,
  A_OR_SP_REGS, H_REGS, S_REGS, D_OR_S_REGS,
  X_OR_S_REGS, Y_OR_S_REGS, Z_OR_S_REGS, SP_OR_S_REGS,
  D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS, A_OR_S_REGS,
  D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS, G_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,
  ADDR_REGS, FP_REGS, GENERAL_REGS, DATA_OR_FP_REGS,
  ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ONLYR1_REGS, LRW_REGS, GENERAL_REGS, C_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,
  M16_REGS, T_REG, M16_T_REGS, PIC_FN_ADDR_REG,
  V1_REG, LEA_REGS, GR_REGS, FP_REGS,
  HI_REG, LO_REG, MD_REGS, COP0_REGS,
  COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,
  HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,
  ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, DSP_ACC_REGS,
  ACC_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, REMAINDER_REG, HIMULT_REG, SYSTEM_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,
  ADDRESS_REGS, SP_REGS, DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,
  EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS,
  SP_OR_ADDRESS_OR_EXTENDED_REGS, FP_REGS, FP_ACC_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,
  FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,
  GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,
  SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS,
  FPU_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  BASE_REGS, GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS,
  VRSAVE_REGS, VSCR_REGS, SPE_ACC_REGS, SPEFSCR_REGS,
  NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,
  LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,
  CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, CC_REGS, ADDR_REGS,
  GENERAL_REGS, ACCESS_REGS, ADDR_CC_REGS, GENERAL_CC_REGS,
  FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, G16_REGS, G32_REGS,
  T32_REGS, HI_REG, LO_REG, CE_REGS,
  CN_REG, LC_REG, SC_REG, SP_REGS,
  CR_REGS, CP1_REGS, CP2_REGS, CP3_REGS,
  CPA_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REGS, PR_REGS, T_REGS, MAC_REGS,
  FPUL_REGS, SIBCALL_REGS, GENERAL_REGS, FP0_REGS,
  FP_REGS, DF_HI_REGS, DF_REGS, FPSCR_REGS,
  GENERAL_FP_REGS, GENERAL_DF_REGS, TARGET_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, FPCC_REGS, I64_REGS,
  GENERAL_REGS, FP_REGS, EXTRA_FP_REGS, GENERAL_OR_FP_REGS,
  GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REGS, R1_REGS, TWO_REGS, R2_REGS,
  EIGHT_REGS, R8_REGS, ICALL_REGS, GENERAL_REGS,
  CARRY_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, BR_REGS,
  FP_REGS, ACC_REG, SP_REG, RL_REGS,
  GR_REGS, AR_REGS, ALL_REGS, LIM_REG_CLASSES
}

Functions/Subroutines

struct machine_function GTY (())

Variables

unsigned int ia64_section_threshold
enum processor_type ia64_tune
int ia64_asm_output_label
int ia64_final_schedule

Define Documentation

#define ACCUMULATE_OUTGOING_ARGS   1

Definition at line 1104 of file ia64.h.

#define ADDITIONAL_REGISTER_NAMES

Definition at line 1640 of file ia64.h.

#define ADDL_REGNO_P ( REGNO   )     ((unsigned HOST_WIDE_INT) (REGNO) <= 3)

Definition at line 324 of file ia64.h.

#define ADDR_VEC_ALIGN ( ADDR_VEC   )     3

Definition at line 1789 of file ia64.h.

#define AR_ARG_FIRST   OUT_REG (0)

Definition at line 1123 of file ia64.h.

#define AR_CCV_REGNUM   329

Definition at line 341 of file ia64.h.

#define AR_EC_REGNUM   333

Definition at line 345 of file ia64.h.

#define AR_I_REGNO_P ( REGNO   ) 

Value:

((REGNO) >= AR_PFS_REGNUM \
           && (REGNO) < FIRST_PSEUDO_REGISTER)

Definition at line 353 of file ia64.h.

#define AR_LC_REGNUM   332

Definition at line 344 of file ia64.h.

#define AR_M_REGNO_P ( REGNO   ) 

Value:

((REGNO) == AR_CCV_REGNUM \
           || (REGNO) == AR_UNAT_REGNUM)

Definition at line 351 of file ia64.h.

#define AR_PFS_REGNUM   331

Definition at line 343 of file ia64.h.

#define AR_REGNO_P ( REGNO   ) 

Value:

((REGNO) >= AR_CCV_REGNUM \
         && (REGNO) < FIRST_PSEUDO_REGISTER)

Definition at line 355 of file ia64.h.

#define AR_UNAT_REGNUM   330

Definition at line 342 of file ia64.h.

#define ARG_POINTER_REGNUM   R_GR(0)

Definition at line 1049 of file ia64.h.

#define ASM_APP_OFF   (TARGET_GNU_AS ? "#NO_APP\n" : "//NO_APP\n")

Definition at line 1517 of file ia64.h.

#define ASM_APP_ON   (TARGET_GNU_AS ? "#APP\n" : "//APP\n")

Definition at line 1512 of file ia64.h.

#define ASM_COMMENT_START   "//"

Definition at line 1507 of file ia64.h.

#define ASM_EXTRA_SPEC   ""

Definition at line 55 of file ia64.h.

#define ASM_GENERATE_INTERNAL_LABEL ( LABEL,
PREFIX,
NUM   ) 

Value:

do {                  \
  sprintf (LABEL, "*.%s%d", PREFIX, NUM);       \
} while (0)

Definition at line 1554 of file ia64.h.

#define ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX ( FILE,
ENCODING,
SIZE,
ADDR,
DONE   ) 

Value:

do {                  \
    const char *reltag = NULL;            \
    if (((ENCODING) & 0xF0) == DW_EH_PE_textrel)      \
      reltag = "@segrel(";            \
    else if (((ENCODING) & 0xF0) == DW_EH_PE_datarel)     \
      reltag = "@gprel(";           \
    if (reltag)               \
      {                 \
  fputs (integer_asm_op (SIZE, FALSE), FILE);     \
  fputs (reltag, FILE);           \
  assemble_name (FILE, XSTR (ADDR, 0));       \
  fputc (')', FILE);            \
  goto DONE;              \
      }                 \
  } while (0)

Definition at line 1804 of file ia64.h.

#define ASM_NO_SKIP_IN_TEXT   1

Definition at line 1839 of file ia64.h.

#define ASM_OUTPUT_ADDR_DIFF_ELT ( STREAM,
BODY,
VALUE,
REL   ) 

Value:

do {                \
  if (TARGET_ILP32)           \
    fprintf (STREAM, "\tdata4 @pcrel(.L%d)\n", VALUE);    \
  else                \
    fprintf (STREAM, "\tdata8 @pcrel(.L%d)\n", VALUE);    \
  } while (0)

Definition at line 1779 of file ia64.h.

#define ASM_OUTPUT_ALIGN ( STREAM,
POWER   )     fprintf (STREAM, "\t.align %d\n", 1<<(POWER))

Definition at line 1844 of file ia64.h.

#define ASM_OUTPUT_DEBUG_LABEL ( FILE,
PREFIX,
NUM   )     fprintf (FILE, TARGET_GNU_AS ? "[.%s%d:]\n" : ".%s%d:\n", PREFIX, NUM)

Definition at line 1888 of file ia64.h.

#define ASM_OUTPUT_DEF ( STREAM,
NAME,
VALUE   ) 

Value:

do {                  \
  assemble_name (STREAM, NAME);           \
  fputs (" = ", STREAM);            \
  assemble_name (STREAM, VALUE);          \
  fputc ('\n', STREAM);             \
} while (0)

Definition at line 1566 of file ia64.h.

#define ASM_OUTPUT_DWARF_OFFSET ( FILE,
SIZE,
LABEL,
SECTION   ) 

Value:

do {                \
    fputs (integer_asm_op (SIZE, FALSE), FILE);     \
    fputs ("@secrel(", FILE);         \
    assemble_name (FILE, LABEL);        \
    fputc (')', FILE);            \
  } while (0)

Definition at line 1894 of file ia64.h.

#define ASM_OUTPUT_DWARF_PCREL ( FILE,
SIZE,
LABEL   ) 

Value:

do {              \
    fputs (integer_asm_op (SIZE, FALSE), FILE);   \
    fputs ("@pcrel(", FILE);        \
    assemble_name (FILE, LABEL);      \
    fputc (')', FILE);          \
  } while (0)

Definition at line 1903 of file ia64.h.

#define ASM_OUTPUT_EXTERNAL ( FILE,
DECL,
NAME   )     ia64_asm_output_external (FILE, DECL, NAME)

Definition at line 1548 of file ia64.h.

#define ASM_OUTPUT_FDESC ( FILE,
DECL,
PART   ) 

Value:

do {                  \
  if ((PART) == 0)              \
    {                 \
      if (TARGET_ILP32)             \
        fputs ("\tdata8.ua @iplt(", FILE);        \
      else                \
        fputs ("\tdata16.ua @iplt(", FILE);       \
      mark_decl_referenced (DECL);          \
      assemble_name (FILE, XSTR (XEXP (DECL_RTL (DECL), 0), 0));  \
      fputs (")\n", FILE);            \
      if (TARGET_ILP32)             \
  fputs ("\tdata8.ua 0\n", FILE);         \
    }                 \
} while (0)

Definition at line 1265 of file ia64.h.

#define ASM_OUTPUT_LABEL ( STREAM,
NAME   ) 

Value:

do {                  \
  ia64_asm_output_label = 1;            \
  assemble_name (STREAM, NAME);           \
  fputs (":\n", STREAM);            \
  ia64_asm_output_label = 0;            \
} while (0)

Definition at line 1533 of file ia64.h.

#define ASM_PN_FORMAT   (TARGET_GNU_AS ? "%s.%lu" : "%s?%lu")

Definition at line 1561 of file ia64.h.

#define ASM_PREFERRED_EH_DATA_FORMAT ( CODE,
GLOBAL   ) 

Value:

(((CODE) == 1 ? DW_EH_PE_textrel : DW_EH_PE_datarel)  \
   | ((GLOBAL) ? DW_EH_PE_indirect : 0)     \
   | (TARGET_ILP32 ? DW_EH_PE_udata4 : DW_EH_PE_udata8))

Definition at line 1797 of file ia64.h.

#define BASE_REG_CLASS   GENERAL_REGS

Definition at line 820 of file ia64.h.

#define BIGGEST_ALIGNMENT   128

Definition at line 210 of file ia64.h.

#define BITS_BIG_ENDIAN   0

Definition at line 153 of file ia64.h.

#define BR_REG ( REGNO   )     ((REGNO) + 320)

Definition at line 336 of file ia64.h.

#define BR_REGNO_P ( REGNO   )     ((REGNO) >= 320 && (REGNO) <= 327)

Definition at line 329 of file ia64.h.

#define BRANCH_COST   6

Definition at line 1446 of file ia64.h.

#define BSS_SECTION_ASM_OP   "\t.bss"

Definition at line 1478 of file ia64.h.

#define BYTES_BIG_ENDIAN   (TARGET_BIG_ENDIAN != 0)

Definition at line 155 of file ia64.h.

#define CALL_REALLY_USED_REGISTERS

Value:

{ /* General registers.  */       \
  0, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 1, 1, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
  /* Floating-point registers.  */      \
  0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  /* Predicate registers.  */       \
  0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  /* Branch registers.  */        \
  1, 0, 0, 0, 0, 0, 1, 1,       \
  /*FP CCV UNAT PFS LC EC */        \
     0,  1,   0,  1, 0, 0       \
}

Definition at line 455 of file ia64.h.

#define CALL_USED_REGISTERS

Value:

{ /* General registers.  */       \
  1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
  /* Floating-point registers.  */      \
  1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  /* Predicate registers.  */       \
  1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  /* Branch registers.  */        \
  1, 0, 0, 0, 0, 0, 1, 1,       \
  /*FP CCV UNAT PFS LC EC */        \
     1,  1,   1,  1, 0, 1       \
}

Definition at line 417 of file ia64.h.

#define CAN_DEBUG_WITHOUT_FP

Definition at line 1071 of file ia64.h.

#define CAN_ELIMINATE ( FROM,
TO   )     (TO == BR_REG (0) ? current_function_is_leaf : 1)

Definition at line 1088 of file ia64.h.

#define CANNOT_CHANGE_MODE_CLASS ( FROM,
TO,
CLASS   ) 

Value:

(SCALAR_FLOAT_MODE_P (FROM) != SCALAR_FLOAT_MODE_P (TO) \
   ? reg_classes_intersect_p (CLASS, FR_REGS) : 0)

Definition at line 905 of file ia64.h.

#define CASE_VECTOR_MODE   ptr_mode

Definition at line 1931 of file ia64.h.

#define CASE_VECTOR_PC_RELATIVE   1

Definition at line 1937 of file ia64.h.

#define CC1_SPEC   "%{G*}"

Definition at line 140 of file ia64.h.

#define CC1_SPEC   "%(cc1_cpu) "

Definition at line 140 of file ia64.h.

#define CFA_FRAME_BASE_OFFSET ( FUNDECL   )     (-INCOMING_FRAME_SP_OFFSET)

Definition at line 1024 of file ia64.h.

#define CLASS_MAX_NREGS ( CLASS,
MODE   ) 

Value:

((MODE) == BImode && (CLASS) == PR_REGS ? 2     \
   : (((CLASS) == FR_REGS || (CLASS) == FP_REGS) && (MODE) == XFmode) ? 1 \
   : (((CLASS) == FR_REGS || (CLASS) == FP_REGS) && (MODE) == XCmode) ? 2 \
   : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)

Definition at line 896 of file ia64.h.

#define CONST_DOUBLE_OK_FOR_G ( VALUE   ) 

Value:

((VALUE) == CONST0_RTX (GET_MODE (VALUE)) \
   || (VALUE) == CONST1_RTX (GET_MODE (VALUE)))

Definition at line 939 of file ia64.h.

#define CONST_DOUBLE_OK_FOR_LETTER_P ( VALUE,
C   )     ia64_const_double_ok_for_letter_p (VALUE, C)

Definition at line 943 of file ia64.h.

#define CONST_OK_FOR_I ( VALUE   )     ((unsigned HOST_WIDE_INT)(VALUE) + 0x2000 < 0x4000)

Definition at line 914 of file ia64.h.

#define CONST_OK_FOR_J ( VALUE   )     ((unsigned HOST_WIDE_INT)(VALUE) + 0x200000 < 0x400000)

Definition at line 917 of file ia64.h.

#define CONST_OK_FOR_K ( VALUE   )     ((unsigned HOST_WIDE_INT)(VALUE) + 0x80 < 0x100)

Definition at line 920 of file ia64.h.

#define CONST_OK_FOR_L ( VALUE   )     ((unsigned HOST_WIDE_INT)(VALUE) + 0x7F < 0x100)

Definition at line 922 of file ia64.h.

#define CONST_OK_FOR_LETTER_P ( VALUE,
C   )     ia64_const_ok_for_letter_p (VALUE, C)

Definition at line 932 of file ia64.h.

#define CONST_OK_FOR_M ( VALUE   )     ((unsigned HOST_WIDE_INT)(VALUE) < 0x40)

Definition at line 924 of file ia64.h.

#define CONST_OK_FOR_N ( VALUE   )     ((unsigned HOST_WIDE_INT)(VALUE) + 0x100 < 0x200)

Definition at line 926 of file ia64.h.

#define CONST_OK_FOR_O ( VALUE   )     ((VALUE) == 0)

Definition at line 928 of file ia64.h.

#define CONST_OK_FOR_P ( VALUE   )     ((VALUE) == 0 || (VALUE) == -1)

Definition at line 930 of file ia64.h.

#define CONSTANT_ADDRESS_P ( X   )     0

Definition at line 1351 of file ia64.h.

#define CONSTANT_ALIGNMENT ( EXP,
ALIGN   ) 

Value:

(TREE_CODE (EXP) == STRING_CST  \
   && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))

Definition at line 227 of file ia64.h.

#define CPU_UNITS_QUERY   1

Definition at line 2044 of file ia64.h.

#define DATA_ALIGNMENT ( TYPE,
ALIGN   ) 

Value:

(TREE_CODE (TYPE) == ARRAY_TYPE   \
   && TYPE_MODE (TREE_TYPE (TYPE)) == QImode  \
   && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))

Definition at line 217 of file ia64.h.

#define DATA_SECTION_ASM_OP   "\t.data"

Definition at line 1473 of file ia64.h.

#define DEFAULT_PCC_STRUCT_RETURN   0

Definition at line 1229 of file ia64.h.

#define DEFAULT_SIGNED_CHAR   1

Definition at line 289 of file ia64.h.

#define DONT_USE_BUILTIN_SETJMP

Definition at line 2031 of file ia64.h.

#define DOUBLE_TYPE_SIZE   64

Definition at line 281 of file ia64.h.

#define DWARF2_ASM_LINE_DEBUG_INFO   (TARGET_DWARF2_ASM)

Definition at line 1881 of file ia64.h.

#define DWARF2_DEBUGGING_INFO   1

Definition at line 1873 of file ia64.h.

#define DWARF2_FRAME_INFO   0

Definition at line 1879 of file ia64.h.

#define EH_RETURN_DATA_REGNO ( N   )     ((N) < 4 ? (N) + 15 : INVALID_REGNUM)

Definition at line 2010 of file ia64.h.

#define EH_USES ( REGNO   )     ia64_eh_uses (REGNO)

Definition at line 1261 of file ia64.h.

#define ELIMINABLE_REGS

Value:

{                 \
  {ARG_POINTER_REGNUM,   STACK_POINTER_REGNUM},       \
  {ARG_POINTER_REGNUM,   HARD_FRAME_POINTER_REGNUM},      \
  {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},       \
  {FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},      \
}

Definition at line 1076 of file ia64.h.

#define EPILOGUE_USES ( REGNO   )     ia64_epilogue_uses (REGNO)

Definition at line 1257 of file ia64.h.

#define EXIT_IGNORE_STACK   1

Definition at line 1252 of file ia64.h.

#define EXTRA_CONSTRAINT ( VALUE,
C   )     ia64_extra_constraint (VALUE, C)

Definition at line 950 of file ia64.h.

#define EXTRA_MEMORY_CONSTRAINT ( C,
STR   )     ((C) == 'S')

Definition at line 958 of file ia64.h.

#define EXTRA_SPECS

Value:

{ "asm_extra", ASM_EXTRA_SPEC }, \
  SUBTARGET_EXTRA_SPECS

Definition at line 49 of file ia64.h.

#define FIRST_PARM_OFFSET ( FUNDECL   )     0

Definition at line 982 of file ia64.h.

#define FIRST_PSEUDO_REGISTER   334

Definition at line 321 of file ia64.h.

#define FIXED_REGISTERS

Value:

{ /* General registers.  */       \
  1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  /* Floating-point registers.  */      \
  1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  /* Predicate registers.  */       \
  1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  /* Branch registers.  */        \
  0, 0, 0, 0, 0, 0, 0, 0,       \
  /*FP CCV UNAT PFS LC EC */        \
     1,  1,   1,  1, 0, 1       \
 }

Definition at line 382 of file ia64.h.

#define FLOAT_TYPE_SIZE   32

Definition at line 279 of file ia64.h.

#define FP_REGNO_P ( REGNO   )     ((REGNO) >= 128 && (REGNO) <= 254 && (REGNO) != 159)

Definition at line 327 of file ia64.h.

#define FR_ARG_FIRST   FR_REG (8)

Definition at line 1120 of file ia64.h.

#define FR_REG ( REGNO   )     ((REGNO) + 128)

Definition at line 334 of file ia64.h.

#define FR_REGNO_P ( REGNO   )     ((REGNO) >= 128 && (REGNO) <= 255)

Definition at line 326 of file ia64.h.

#define FR_RET_FIRST   FR_REG (8)

Definition at line 1121 of file ia64.h.

#define FR_RET_LAST   FR_REG (15)

Definition at line 1122 of file ia64.h.

#define FRAME_GROWS_DOWNWARD   0

Definition at line 968 of file ia64.h.

#define FRAME_POINTER_REGNUM   328

Definition at line 1040 of file ia64.h.

#define FRAME_POINTER_REQUIRED   0

Definition at line 1068 of file ia64.h.

#define FUNCTION_ARG ( CUM,
MODE,
TYPE,
NAMED   )     ia64_function_arg (&CUM, MODE, TYPE, NAMED, 0)

Definition at line 1128 of file ia64.h.

#define FUNCTION_ARG_ADVANCE ( CUM,
MODE,
TYPE,
NAMED   )     ia64_function_arg_advance (&CUM, MODE, TYPE, NAMED)

Definition at line 1180 of file ia64.h.

#define FUNCTION_ARG_BOUNDARY ( MODE,
TYPE   )     ia64_function_arg_boundary (MODE, TYPE)

Definition at line 1189 of file ia64.h.

#define FUNCTION_ARG_REGNO_P ( REGNO   ) 

Value:

(((REGNO) >= AR_ARG_FIRST && (REGNO) < (AR_ARG_FIRST + MAX_ARGUMENT_SLOTS)) \
 || ((REGNO) >= FR_ARG_FIRST && (REGNO) < (FR_ARG_FIRST + MAX_ARGUMENT_SLOTS)))

Definition at line 1197 of file ia64.h.

#define FUNCTION_BOUNDARY   128

Definition at line 206 of file ia64.h.

#define FUNCTION_INCOMING_ARG ( CUM,
MODE,
TYPE,
NAMED   )     ia64_function_arg (&CUM, MODE, TYPE, NAMED, 1)

Definition at line 1135 of file ia64.h.

#define FUNCTION_MODE   Pmode

Definition at line 1976 of file ia64.h.

#define FUNCTION_PROFILER ( FILE,
LABELNO   )     ia64_output_function_profiler(FILE, LABELNO)

Definition at line 1287 of file ia64.h.

#define FUNCTION_VALUE ( VALTYPE,
FUNC   )     ia64_function_value (VALTYPE, FUNC)

Definition at line 1206 of file ia64.h.

#define FUNCTION_VALUE_REGNO_P ( REGNO   ) 

Value:

(((REGNO) >= GR_RET_FIRST && (REGNO) <= GR_RET_LAST)    \
   || ((REGNO) >= FR_RET_FIRST && (REGNO) <= FR_RET_LAST))

Definition at line 1222 of file ia64.h.

#define GENERAL_REGNO_P ( REGNO   )     (GR_REGNO_P (REGNO) || (REGNO) == FRAME_POINTER_REGNUM)

Definition at line 330 of file ia64.h.

#define GENERAL_REGS   GR_REGS

Definition at line 732 of file ia64.h.

#define GLOBAL_ASM_OP   "\t.global "

Definition at line 1542 of file ia64.h.

#define GO_IF_LEGITIMATE_ADDRESS ( MODE,
X,
LABEL   ) 

Value:

do {                  \
  if (LEGITIMATE_ADDRESS_REG (X))         \
    goto LABEL;               \
  else if ((GET_CODE (X) == POST_INC || GET_CODE (X) == POST_DEC) \
     && LEGITIMATE_ADDRESS_REG (XEXP (X, 0))      \
     && XEXP (X, 0) != arg_pointer_rtx)       \
    goto LABEL;               \
  else if (GET_CODE (X) == POST_MODIFY          \
     && LEGITIMATE_ADDRESS_REG (XEXP (X, 0))      \
     && XEXP (X, 0) != arg_pointer_rtx        \
     && LEGITIMATE_ADDRESS_DISP (XEXP (X, 0), XEXP (X, 1))) \
    goto LABEL;               \
} while (0)

Definition at line 1374 of file ia64.h.

#define GO_IF_MODE_DEPENDENT_ADDRESS ( ADDR,
LABEL   ) 

Value:

if (GET_CODE (ADDR) == POST_DEC || GET_CODE (ADDR) == POST_INC) \
    goto LABEL;

Definition at line 1409 of file ia64.h.

#define GR_ARG_FIRST   IN_REG (0)

Definition at line 1117 of file ia64.h.

#define GR_REG ( REGNO   )     ((REGNO) + 0)

Definition at line 333 of file ia64.h.

#define GR_REGNO_P ( REGNO   )     ((unsigned HOST_WIDE_INT) (REGNO) <= 127)

Definition at line 325 of file ia64.h.

#define GR_RET_FIRST   GR_REG (8)

Definition at line 1118 of file ia64.h.

#define GR_RET_LAST   GR_REG (11)

Definition at line 1119 of file ia64.h.

#define HANDLE_SYSV_PRAGMA   1

Definition at line 1995 of file ia64.h.

#define HARD_FRAME_POINTER_REGNUM   LOC_REG (79)

Definition at line 1043 of file ia64.h.

#define HARD_REGNO_CALLER_SAVE_MODE ( REGNO,
NREGS,
MODE   ) 

Value:

((FR_REGNO_P (REGNO) && (NREGS) == 1) ? XFmode        \
   : choose_hard_reg_mode ((REGNO), (NREGS), false))

Definition at line 684 of file ia64.h.

#define HARD_REGNO_MODE_OK ( REGNO,
MODE   ) 

Value:

(FR_REGNO_P (REGNO) ?           \
     GET_MODE_CLASS (MODE) != MODE_CC &&      \
     (MODE) != BImode &&          \
     (MODE) != TFmode             \
   : PR_REGNO_P (REGNO) ?         \
     (MODE) == BImode || GET_MODE_CLASS (MODE) == MODE_CC \
   : GR_REGNO_P (REGNO) ?         \
     (MODE) != CCImode && (MODE) != XFmode && (MODE) != XCmode  \
   : AR_REGNO_P (REGNO) ? (MODE) == DImode      \
   : BR_REGNO_P (REGNO) ? (MODE) == DImode      \
   : 0)

Definition at line 652 of file ia64.h.

#define HARD_REGNO_NREGS ( REGNO,
MODE   ) 

Value:

((REGNO) == PR_REG (0) && (MODE) == DImode ? 64     \
   : PR_REGNO_P (REGNO) && (MODE) == BImode ? 2       \
   : PR_REGNO_P (REGNO) && (MODE) == CCImode ? 1      \
   : FR_REGNO_P (REGNO) && (MODE) == XFmode ? 1       \
   : FR_REGNO_P (REGNO) && (MODE) == XCmode ? 2       \
   : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)

Definition at line 640 of file ia64.h.

#define HARD_REGNO_RENAME_OK ( REGNO1,
REGNO2   )     ia64_hard_regno_rename_ok((REGNO1), (REGNO2))

Definition at line 1916 of file ia64.h.

#define HAVE_AS_LTOFFX_LDXMOV_RELOCS   0

Definition at line 82 of file ia64.h.

#define HAVE_POST_DECREMENT   1

Definition at line 1344 of file ia64.h.

#define HAVE_POST_INCREMENT   1

Definition at line 1343 of file ia64.h.

#define HAVE_POST_MODIFY_DISP   1

Definition at line 1345 of file ia64.h.

#define HAVE_POST_MODIFY_REG   1

Definition at line 1346 of file ia64.h.

#define IA64_DEFAULT_GVALUE   8

Definition at line 1480 of file ia64.h.

#define IA64_STACK_ALIGN ( LOC   )     (((LOC) + 15) & ~15)

Definition at line 203 of file ia64.h.

#define IMMEDIATE_PREFIX   ""

Definition at line 1769 of file ia64.h.

#define IN_REG ( REGNO   )     ((REGNO) + 112)

Definition at line 338 of file ia64.h.

#define IN_REGNO_P ( REGNO   )     ((REGNO) >= IN_REG (0) && (REGNO) <= IN_REG (7))

Definition at line 347 of file ia64.h.

#define INCOMING_FRAME_SP_OFFSET   STACK_POINTER_OFFSET

Definition at line 1021 of file ia64.h.

#define INCOMING_REGNO ( OUT   )     ((unsigned) ((OUT) - OUT_REG (0)) < 8 ? IN_REG ((OUT) - OUT_REG (0)) : (OUT))

Definition at line 491 of file ia64.h.

#define INCOMING_RETURN_ADDR_RTX   gen_rtx_REG (VOIDmode, BR_REG (0))

Definition at line 1000 of file ia64.h.

#define INDEX_REG_CLASS   GENERAL_REGS

Definition at line 826 of file ia64.h.

#define INIT_CUMULATIVE_ARGS ( CUM,
FNTYPE,
LIBNAME,
INDIRECT,
N_NAMED_ARGS   ) 

Value:

do {                  \
  (CUM).words = 0;              \
  (CUM).int_regs = 0;             \
  (CUM).fp_regs = 0;              \
  (CUM).prototype = ((FNTYPE) && TYPE_ARG_TYPES (FNTYPE)) || (LIBNAME); \
} while (0)

Definition at line 1153 of file ia64.h.

#define INIT_CUMULATIVE_INCOMING_ARGS ( CUM,
FNTYPE,
LIBNAME   ) 

Value:

do {                  \
  (CUM).words = 0;              \
  (CUM).int_regs = 0;             \
  (CUM).fp_regs = 0;              \
  (CUM).prototype = 1;              \
} while (0)

Definition at line 1167 of file ia64.h.

#define INIT_EXPANDERS

Value:

do {              \
    if (cfun && cfun->emit->regno_pointer_align)  \
      REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = 64;  \
  } while (0)

Definition at line 1053 of file ia64.h.

#define INITIAL_ELIMINATION_OFFSET ( FROM,
TO,
OFFSET   )     ((OFFSET) = ia64_initial_elimination_offset ((FROM), (TO)))

Definition at line 1095 of file ia64.h.

#define INITIALIZE_TRAMPOLINE ( ADDR,
FNADDR,
STATIC_CHAIN   )     ia64_initialize_trampoline((ADDR), (FNADDR), (STATIC_CHAIN))

Definition at line 1336 of file ia64.h.

#define INT_TYPE_SIZE   32

Definition at line 271 of file ia64.h.

#define LEGITIMATE_ADDRESS_DISP ( R,
X   ) 

Value:

(GET_CODE (X) == PLUS             \
   && rtx_equal_p (R, XEXP (X, 0))          \
   && (LEGITIMATE_ADDRESS_REG (XEXP (X, 1))       \
       || (GET_CODE (XEXP (X, 1)) == CONST_INT        \
     && INTVAL (XEXP (X, 1)) >= -256        \
     && INTVAL (XEXP (X, 1)) < 256)))

Definition at line 1366 of file ia64.h.

#define LEGITIMATE_ADDRESS_REG ( X   ) 

Value:

((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X))     \
   || (GET_CODE (X) == SUBREG && GET_CODE (XEXP (X, 0)) == REG    \
       && REG_OK_FOR_BASE_P (XEXP (X, 0))))

Definition at line 1361 of file ia64.h.

#define LEGITIMATE_CONSTANT_P ( X   )     ia64_legitimate_constant_p (X)

Definition at line 1416 of file ia64.h.

#define LIBCALL_VALUE ( MODE   ) 

Value:

gen_rtx_REG (MODE,              \
         (((GET_MODE_CLASS (MODE) == MODE_FLOAT     \
     || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) && \
          (MODE) != TFmode) \
    ? FR_RET_FIRST : GR_RET_FIRST))

Definition at line 1212 of file ia64.h.

#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE   80

Definition at line 287 of file ia64.h.

#define LIBGCC2_WORDS_BIG_ENDIAN   0

Definition at line 165 of file ia64.h.

#define LOAD_EXTEND_OP ( MODE   )     ZERO_EXTEND

Definition at line 1949 of file ia64.h.

#define LOC_REG ( REGNO   )     ((REGNO) + 32)

Definition at line 339 of file ia64.h.

#define LOC_REGNO_P ( REGNO   )     ((REGNO) >= LOC_REG (0) && (REGNO) <= LOC_REG (79))

Definition at line 348 of file ia64.h.

#define LOCAL_LABEL_PREFIX   "."

Definition at line 1767 of file ia64.h.

#define LOCAL_REGNO ( REGNO   )     (IN_REGNO_P (REGNO) || LOC_REGNO_P (REGNO))

Definition at line 506 of file ia64.h.

#define LONG_DOUBLE_TYPE_SIZE   (TARGET_HPUX ? 128 : 80)

Definition at line 284 of file ia64.h.

#define LONG_LONG_TYPE_SIZE   64

Definition at line 277 of file ia64.h.

#define LONG_TYPE_SIZE   (TARGET_ILP32 ? 32 : 64)

Definition at line 275 of file ia64.h.

#define MAX_ARGUMENT_SLOTS   8

Definition at line 1115 of file ia64.h.

#define MAX_CONDITIONAL_EXECUTE   12

Definition at line 2002 of file ia64.h.

#define MAX_FIXED_MODE_SIZE   GET_MODE_BITSIZE (TImode)

Definition at line 246 of file ia64.h.

#define MAX_INT_RETURN_SLOTS   4

Definition at line 1116 of file ia64.h.

#define MAX_REGS_PER_ADDRESS   2

Definition at line 1355 of file ia64.h.

#define MEMORY_MOVE_COST ( MODE,
CLASS,
IN   ) 

Value:

((CLASS) == GENERAL_REGS || (CLASS) == FR_REGS || (CLASS) == FP_REGS \
   || (CLASS) == GR_AND_FR_REGS ? 4 : 10)

Definition at line 1435 of file ia64.h.

#define MODES_TIEABLE_P ( MODE1,
MODE2   ) 

Value:

(GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2) \
   && ((((MODE1) == XFmode) || ((MODE1) == XCmode)) \
       == (((MODE2) == XFmode) || ((MODE2) == XCmode))) \
   && (((MODE1) == BImode) == ((MODE2) == BImode)))

Definition at line 675 of file ia64.h.

#define MOVE_MAX   8

Definition at line 1953 of file ia64.h.

#define N_REG_CLASSES   ((int) LIM_REG_CLASSES)

Definition at line 735 of file ia64.h.

#define NO_FUNCTION_CSE

Definition at line 1460 of file ia64.h.

#define NO_PROFILE_COUNTERS   1

Definition at line 1291 of file ia64.h.

#define OPTIMIZATION_OPTIONS ( LEVEL,
SIZE   )     ia64_optimization_options ((LEVEL), (SIZE))

Definition at line 2047 of file ia64.h.

#define OUT_REG ( REGNO   )     ((REGNO) + 120)

Definition at line 337 of file ia64.h.

#define OUT_REGNO_P ( REGNO   )     ((REGNO) >= OUT_REG (0) && (REGNO) <= OUT_REG (7))

Definition at line 349 of file ia64.h.

#define OUTGOING_REGNO ( IN   )     ((unsigned) ((IN) - IN_REG (0)) < 8 ? OUT_REG ((IN) - IN_REG (0)) : (IN))

Definition at line 499 of file ia64.h.

#define OVERRIDE_OPTIONS   ia64_override_options ()

Definition at line 123 of file ia64.h.

#define PARM_BOUNDARY   64

Definition at line 193 of file ia64.h.

#define PCC_BITFIELD_TYPE_MATTERS   1

Definition at line 240 of file ia64.h.

#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED

Definition at line 1498 of file ia64.h.

#define PIC_OFFSET_TABLE_REGNUM   GR_REG (1)

Definition at line 1493 of file ia64.h.

#define Pmode   DImode

Definition at line 1971 of file ia64.h.

#define POINTER_SIZE   (TARGET_ILP32 ? 32 : 64)

Definition at line 170 of file ia64.h.

#define PR_REG ( REGNO   )     ((REGNO) + 256)

Definition at line 335 of file ia64.h.

#define PR_REGNO_P ( REGNO   )     ((REGNO) >= 256 && (REGNO) <= 319)

Definition at line 328 of file ia64.h.

#define PREFERRED_RELOAD_CLASS ( X,
CLASS   )     ia64_preferred_reload_class (X, CLASS)

Definition at line 861 of file ia64.h.

#define PREFETCH_BLOCK   32

Definition at line 1993 of file ia64.h.

#define PRINT_OPERAND ( STREAM,
X,
CODE   )     ia64_print_operand (STREAM, X, CODE)

Definition at line 1745 of file ia64.h.

#define PRINT_OPERAND_ADDRESS ( STREAM,
X   )     ia64_print_operand_address (STREAM, X)

Definition at line 1760 of file ia64.h.

#define PRINT_OPERAND_PUNCT_VALID_P ( CODE   )     ((CODE) == '+' || (CODE) == ',')

Definition at line 1753 of file ia64.h.

#define PROFILE_BEFORE_PROLOGUE   1

Definition at line 2036 of file ia64.h.

#define PROMOTE_MODE ( MODE,
UNSIGNEDP,
TYPE   ) 

Value:

do                  \
  {                 \
    if (GET_MODE_CLASS (MODE) == MODE_INT       \
  && GET_MODE_SIZE (MODE) < 4)          \
      (MODE) = SImode;              \
  }                 \
while (0)

Definition at line 184 of file ia64.h.

#define R_BR ( REGNO   )     BR_REG (REGNO)

Definition at line 364 of file ia64.h.

#define R_FR ( REGNO   )     FR_REG (REGNO)

Definition at line 362 of file ia64.h.

#define R_GR ( REGNO   )     GR_REG (REGNO)

Definition at line 361 of file ia64.h.

#define R_PR ( REGNO   )     PR_REG (REGNO)

Definition at line 363 of file ia64.h.

#define REG_ALLOC_ORDER

Definition at line 531 of file ia64.h.

#define REG_CLASS_CONTENTS

Definition at line 748 of file ia64.h.

#define REG_CLASS_FROM_LETTER ( CHAR   ) 

Value:

((CHAR) == 'f' ? FR_REGS    \
 : (CHAR) == 'a' ? ADDL_REGS    \
 : (CHAR) == 'b' ? BR_REGS    \
 : (CHAR) == 'c' ? PR_REGS    \
 : (CHAR) == 'd' ? AR_M_REGS    \
 : (CHAR) == 'e' ? AR_I_REGS    \
 : (CHAR) == 'x' ? FP_REGS    \
 : NO_REGS)

Definition at line 834 of file ia64.h.

#define REG_CLASS_NAMES

Value:

{ "NO_REGS", "PR_REGS", "BR_REGS", "AR_M_REGS", "AR_I_REGS", \
  "ADDL_REGS", "GR_REGS", "FP_REGS", "FR_REGS", \
  "GR_AND_BR_REGS", "GR_AND_FR_REGS", "ALL_REGS" }

Definition at line 739 of file ia64.h.

#define REG_OK_FOR_BASE_P ( X   )     (GENERAL_REGNO_P (REGNO (X)) || (REGNO (X) >= FIRST_PSEUDO_REGISTER))

Definition at line 1395 of file ia64.h.

#define REG_OK_FOR_INDEX_P ( X   )     REG_OK_FOR_BASE_P (X)

Definition at line 1402 of file ia64.h.

#define REGISTER_MOVE_COST   ia64_register_move_cost

Definition at line 1431 of file ia64.h.

#define REGISTER_NAMES

Definition at line 1585 of file ia64.h.

#define REGISTER_PREFIX   ""

Definition at line 1766 of file ia64.h.

#define REGNO_OK_FOR_BASE_P ( REGNO   )     (GENERAL_REGNO_P (REGNO) || GENERAL_REGNO_P (reg_renumber[REGNO]))

Definition at line 847 of file ia64.h.

#define REGNO_OK_FOR_INDEX_P ( NUM   )     REGNO_OK_FOR_BASE_P (NUM)

Definition at line 854 of file ia64.h.

#define REGNO_REG_CLASS ( REGNO   ) 

Value:

(ADDL_REGNO_P (REGNO) ? ADDL_REGS \
 : GENERAL_REGNO_P (REGNO) ? GR_REGS  \
 : FR_REGNO_P (REGNO) ? (REGNO) != R_FR (31) \
      && (REGNO) != R_FR(127) ? FP_REGS : FR_REGS \
 : PR_REGNO_P (REGNO) ? PR_REGS   \
 : BR_REGNO_P (REGNO) ? BR_REGS   \
 : AR_M_REGNO_P (REGNO) ? AR_M_REGS \
 : AR_I_REGNO_P (REGNO) ? AR_I_REGS \
 : NO_REGS)

Definition at line 806 of file ia64.h.

#define RETURN_ADDR_RTX ( COUNT,
FRAME   )     ia64_return_addr_rtx (COUNT, FRAME)

Definition at line 992 of file ia64.h.

#define RETURN_POPS_ARGS ( FUNDECL,
FUNTYPE,
STACK_SIZE   )     0

Definition at line 1110 of file ia64.h.

#define SECONDARY_RELOAD_CLASS ( CLASS,
MODE,
X   )     ia64_secondary_reload_class (CLASS, MODE, X)

Definition at line 871 of file ia64.h.

#define SELECT_CC_MODE ( OP,
X,
Y   )     CCmode

Definition at line 511 of file ia64.h.

#define SHORT_TYPE_SIZE   16

Definition at line 273 of file ia64.h.

#define SIMULTANEOUS_PREFETCHES   6

Definition at line 1988 of file ia64.h.

#define SLOW_BYTE_ACCESS   1

Definition at line 1452 of file ia64.h.

#define STACK_BOUNDARY   128

Definition at line 199 of file ia64.h.

#define STACK_GROWS_DOWNWARD   1

Definition at line 964 of file ia64.h.

#define STACK_POINTER_OFFSET   16

Definition at line 978 of file ia64.h.

#define STACK_POINTER_REGNUM   12

Definition at line 1033 of file ia64.h.

#define STACK_SAVEAREA_MODE ( LEVEL   )     ((LEVEL) == SAVE_NONLOCAL ? OImode : Pmode)

Definition at line 1298 of file ia64.h.

#define STARTING_FRAME_OFFSET   0

Definition at line 972 of file ia64.h.

#define STATIC_CHAIN_REGNUM   15

Definition at line 1061 of file ia64.h.

#define STRICT_ALIGNMENT   1

Definition at line 231 of file ia64.h.

#define SYMBOL_FLAG_SMALL_ADDR   (SYMBOL_FLAG_MACH_DEP << 0)

Definition at line 1924 of file ia64.h.

#define SYMBOL_REF_SMALL_ADDR_P ( X   )     ((SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_SMALL_ADDR) != 0)

Definition at line 1925 of file ia64.h.

 
#define TARGET_CPU_CPP_BUILTINS (  ) 

Value:

do {            \
  builtin_assert("cpu=ia64");   \
  builtin_assert("machine=ia64");   \
  builtin_define("__ia64");   \
  builtin_define("__ia64__");   \
  builtin_define("__itanium__");    \
  if (TARGET_BIG_ENDIAN)      \
    builtin_define("__BIG_ENDIAN__"); \
} while (0)

Definition at line 34 of file ia64.h.

#define TARGET_CPU_DEFAULT   0

Definition at line 102 of file ia64.h.

#define TARGET_DEFAULT   (MASK_DWARF2_ASM)

Definition at line 98 of file ia64.h.

#define TARGET_HPUX   0

Definition at line 74 of file ia64.h.

#define TARGET_HPUX_LD   0

Definition at line 75 of file ia64.h.

#define TARGET_ILP32   0

Definition at line 78 of file ia64.h.

#define TARGET_INIT_LIBFUNCS   ia64_init_libfuncs

Definition at line 2040 of file ia64.h.

#define TARGET_TLS14   (ia64_tls_size == 14)

Definition at line 70 of file ia64.h.

#define TARGET_TLS22   (ia64_tls_size == 22)

Definition at line 71 of file ia64.h.

#define TARGET_TLS64   (ia64_tls_size == 64)

Definition at line 72 of file ia64.h.

#define TARGET_UNWIND_INFO   1

Definition at line 2006 of file ia64.h.

#define TARGET_UNWIND_TABLES_DEFAULT   true

Definition at line 2008 of file ia64.h.

#define TARGET_VTABLE_DATA_ENTRY_DISTANCE   (TARGET_ILP32 ? 2 : 1)

Definition at line 267 of file ia64.h.

#define TARGET_VTABLE_ENTRY_ALIGN   64

Definition at line 263 of file ia64.h.

#define TARGET_VTABLE_USES_DESCRIPTORS   (TARGET_ILP32 ? 4 : 2)

Definition at line 258 of file ia64.h.

#define TEXT_SECTION_ASM_OP   "\t.text"

Definition at line 1468 of file ia64.h.

#define TRAMPOLINE_ALIGNMENT   64

Definition at line 1332 of file ia64.h.

#define TRAMPOLINE_SIZE   32

Definition at line 1328 of file ia64.h.

#define TRULY_NOOP_TRUNCATION ( OUTPREC,
INPREC   )     1

Definition at line 1959 of file ia64.h.

#define UNITS_PER_WORD   8

Definition at line 168 of file ia64.h.

#define USER_LABEL_PREFIX   ""

Definition at line 1768 of file ia64.h.

#define WORD_REGISTER_OPERATIONS

Definition at line 1942 of file ia64.h.

#define WORDS_BIG_ENDIAN   (TARGET_BIG_ENDIAN != 0)

Definition at line 160 of file ia64.h.

Typedef Documentation

typedef struct ia64_args CUMULATIVE_ARGS

Enumeration Type Documentation

enum ia64_inline_type

Enumerator:
INL_NO 
INL_MIN_LAT 
INL_MAX_THR 

Definition at line 88 of file ia64.h.

enum processor_type

Enumerator:
PROCESSOR_EV4 
PROCESSOR_EV5 
PROCESSOR_EV6 
PROCESSOR_I386 
PROCESSOR_I486 
PROCESSOR_PENTIUM 
PROCESSOR_PENTIUMPRO 
PROCESSOR_K6 
PROCESSOR_ATHLON 
PROCESSOR_PENTIUM4 
PROCESSOR_max 
PROCESSOR_M88100 
PROCESSOR_M88110 
PROCESSOR_M88000 
PROCESSOR_700 
PROCESSOR_7100 
PROCESSOR_7100LC 
PROCESSOR_7200 
PROCESSOR_8000 
PROCESSOR_RIOS1 
PROCESSOR_RIOS2 
PROCESSOR_RS64A 
PROCESSOR_MPCCORE 
PROCESSOR_PPC403 
PROCESSOR_PPC405 
PROCESSOR_PPC601 
PROCESSOR_PPC603 
PROCESSOR_PPC604 
PROCESSOR_PPC604e 
PROCESSOR_PPC620 
PROCESSOR_PPC630 
PROCESSOR_PPC750 
PROCESSOR_PPC7400 
PROCESSOR_PPC7450 
PROCESSOR_SH1 
PROCESSOR_SH2 
PROCESSOR_SH3 
PROCESSOR_SH3E 
PROCESSOR_SH4 
PROCESSOR_SH5 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_V7 
PROCESSOR_CYPRESS 
PROCESSOR_V8 
PROCESSOR_SUPERSPARC 
PROCESSOR_SPARCLITE 
PROCESSOR_F930 
PROCESSOR_F934 
PROCESSOR_HYPERSPARC 
PROCESSOR_SPARCLITE86X 
PROCESSOR_SPARCLET 
PROCESSOR_TSC701 
PROCESSOR_V9 
PROCESSOR_ULTRASPARC 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_EV4 
PROCESSOR_EV5 
PROCESSOR_EV6 
PROCESSOR_I386 
PROCESSOR_I486 
PROCESSOR_PENTIUM 
PROCESSOR_PENTIUMPRO 
PROCESSOR_K6 
PROCESSOR_ATHLON 
PROCESSOR_PENTIUM4 
PROCESSOR_max 
PROCESSOR_M88100 
PROCESSOR_M88110 
PROCESSOR_M88000 
PROCESSOR_700 
PROCESSOR_7100 
PROCESSOR_7100LC 
PROCESSOR_7200 
PROCESSOR_8000 
PROCESSOR_RIOS1 
PROCESSOR_RIOS2 
PROCESSOR_RS64A 
PROCESSOR_MPCCORE 
PROCESSOR_PPC403 
PROCESSOR_PPC405 
PROCESSOR_PPC601 
PROCESSOR_PPC603 
PROCESSOR_PPC604 
PROCESSOR_PPC604e 
PROCESSOR_PPC620 
PROCESSOR_PPC630 
PROCESSOR_PPC750 
PROCESSOR_PPC7400 
PROCESSOR_PPC7450 
PROCESSOR_SH1 
PROCESSOR_SH2 
PROCESSOR_SH3 
PROCESSOR_SH3E 
PROCESSOR_SH4 
PROCESSOR_SH5 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_V7 
PROCESSOR_CYPRESS 
PROCESSOR_V8 
PROCESSOR_SUPERSPARC 
PROCESSOR_SPARCLITE 
PROCESSOR_F930 
PROCESSOR_F934 
PROCESSOR_HYPERSPARC 
PROCESSOR_SPARCLITE86X 
PROCESSOR_SPARCLET 
PROCESSOR_TSC701 
PROCESSOR_V9 
PROCESSOR_ULTRASPARC 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_EV4 
PROCESSOR_EV5 
PROCESSOR_EV6 
PROCESSOR_MAX 
ARM_CORE 
PROCESSOR_I386 
PROCESSOR_I486 
PROCESSOR_PENTIUM 
PROCESSOR_PENTIUMPRO 
PROCESSOR_K6 
PROCESSOR_ATHLON 
PROCESSOR_PENTIUM4 
PROCESSOR_K8 
PROCESSOR_NOCONA 
PROCESSOR_max 
PROCESSOR_ITANIUM 
PROCESSOR_ITANIUM2 
PROCESSOR_max 
PROCESSOR_DEFAULT 
PROCESSOR_IQ2000 
PROCESSOR_IQ10 
PROCESSOR_DEFAULT 
PROCESSOR_4KC 
PROCESSOR_5KC 
PROCESSOR_20KC 
PROCESSOR_M4K 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4130 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R7000 
PROCESSOR_R8000 
PROCESSOR_R9000 
PROCESSOR_SB1 
PROCESSOR_SR71000 
PROCESSOR_700 
PROCESSOR_7100 
PROCESSOR_7100LC 
PROCESSOR_7200 
PROCESSOR_7300 
PROCESSOR_8000 
PROCESSOR_RIOS1 
PROCESSOR_RIOS2 
PROCESSOR_RS64A 
PROCESSOR_MPCCORE 
PROCESSOR_PPC403 
PROCESSOR_PPC405 
PROCESSOR_PPC440 
PROCESSOR_PPC601 
PROCESSOR_PPC603 
PROCESSOR_PPC604 
PROCESSOR_PPC604e 
PROCESSOR_PPC620 
PROCESSOR_PPC630 
PROCESSOR_PPC750 
PROCESSOR_PPC7400 
PROCESSOR_PPC7450 
PROCESSOR_PPC8540 
PROCESSOR_POWER4 
PROCESSOR_POWER5 
PROCESSOR_9672_G5 
PROCESSOR_9672_G6 
PROCESSOR_2064_Z900 
PROCESSOR_2084_Z990 
PROCESSOR_max 
PROCESSOR_SH1 
PROCESSOR_SH2 
PROCESSOR_SH2E 
PROCESSOR_SH2A 
PROCESSOR_SH3 
PROCESSOR_SH3E 
PROCESSOR_SH4 
PROCESSOR_SH4A 
PROCESSOR_SH5 
PROCESSOR_V7 
PROCESSOR_CYPRESS 
PROCESSOR_V8 
PROCESSOR_SUPERSPARC 
PROCESSOR_SPARCLITE 
PROCESSOR_F930 
PROCESSOR_F934 
PROCESSOR_HYPERSPARC 
PROCESSOR_SPARCLITE86X 
PROCESSOR_SPARCLET 
PROCESSOR_TSC701 
PROCESSOR_V9 
PROCESSOR_ULTRASPARC 
PROCESSOR_ULTRASPARC3 
PROCESSOR_EV4 
PROCESSOR_EV5 
PROCESSOR_EV6 
PROCESSOR_MAX 
ARM_CORE 
PROCESSOR_I386 
PROCESSOR_I486 
PROCESSOR_PENTIUM 
PROCESSOR_PENTIUMPRO 
PROCESSOR_K6 
PROCESSOR_ATHLON 
PROCESSOR_PENTIUM4 
PROCESSOR_K8 
PROCESSOR_NOCONA 
PROCESSOR_GENERIC32 
PROCESSOR_GENERIC64 
PROCESSOR_AMDFAM10 
PROCESSOR_max 
PROCESSOR_ITANIUM 
PROCESSOR_ITANIUM2 
PROCESSOR_max 
PROCESSOR_DEFAULT 
PROCESSOR_IQ2000 
PROCESSOR_IQ10 
PROCESSOR_R3000 
PROCESSOR_4KC 
PROCESSOR_4KP 
PROCESSOR_5KC 
PROCESSOR_5KF 
PROCESSOR_20KC 
PROCESSOR_24K 
PROCESSOR_24KX 
PROCESSOR_M4K 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4130 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R7000 
PROCESSOR_R8000 
PROCESSOR_R9000 
PROCESSOR_SB1 
PROCESSOR_SB1A 
PROCESSOR_SR71000 
PROCESSOR_MAX 
PROCESSOR_MN10300 
PROCESSOR_AM33 
PROCESSOR_AM33_2 
PROCESSOR_MS1_64_001 
PROCESSOR_MS1_16_002 
PROCESSOR_MS1_16_003 
PROCESSOR_MS2 
PROCESSOR_700 
PROCESSOR_7100 
PROCESSOR_7100LC 
PROCESSOR_7200 
PROCESSOR_7300 
PROCESSOR_8000 
PROCESSOR_RIOS1 
PROCESSOR_RIOS2 
PROCESSOR_RS64A 
PROCESSOR_MPCCORE 
PROCESSOR_PPC403 
PROCESSOR_PPC405 
PROCESSOR_PPC440 
PROCESSOR_PPC601 
PROCESSOR_PPC603 
PROCESSOR_PPC604 
PROCESSOR_PPC604e 
PROCESSOR_PPC620 
PROCESSOR_PPC630 
PROCESSOR_PPC750 
PROCESSOR_PPC7400 
PROCESSOR_PPC7450 
PROCESSOR_PPC8540 
PROCESSOR_POWER4 
PROCESSOR_POWER5 
PROCESSOR_9672_G5 
PROCESSOR_9672_G6 
PROCESSOR_2064_Z900 
PROCESSOR_2084_Z990 
PROCESSOR_2094_Z9_109 
PROCESSOR_max 
PROCESSOR_SH1 
PROCESSOR_SH2 
PROCESSOR_SH2E 
PROCESSOR_SH2A 
PROCESSOR_SH3 
PROCESSOR_SH3E 
PROCESSOR_SH4 
PROCESSOR_SH4A 
PROCESSOR_SH5 
PROCESSOR_V7 
PROCESSOR_CYPRESS 
PROCESSOR_V8 
PROCESSOR_SUPERSPARC 
PROCESSOR_SPARCLITE 
PROCESSOR_F930 
PROCESSOR_F934 
PROCESSOR_HYPERSPARC 
PROCESSOR_SPARCLITE86X 
PROCESSOR_SPARCLET 
PROCESSOR_TSC701 
PROCESSOR_V9 
PROCESSOR_ULTRASPARC 
PROCESSOR_ULTRASPARC3 
PROCESSOR_NIAGARA 

Definition at line 109 of file ia64.h.

enum reg_class

Enumerator:
NO_REGS 
R2 
R0_1 
INDEX_REGS 
BASE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LR0_REGS 
GENERAL_REGS 
BP_REGS 
FC_REGS 
CR_REGS 
Q_REGS 
SPECIAL_REGS 
ACCUM0_REGS 
ACCUM_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R24_REG 
R25_REG 
R27_REG 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LPCOUNT_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPU_REGS 
LO_REGS 
STACK_REG 
BASE_REGS 
HI_REGS 
CC_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
POINTER_X_REGS 
POINTER_Y_REGS 
POINTER_Z_REGS 
STACK_REG 
BASE_POINTER_REGS 
POINTER_REGS 
ADDW_REGS 
SIMPLE_LD_REGS 
LD_REGS 
NO_LD_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0R1_REGS 
R2R3_REGS 
EXT_LOW_REGS 
EXT_REGS 
ADDR_REGS 
INDEX_REGS 
BK_REG 
SP_REG 
RC_REG 
COUNTER_REGS 
INT_REGS 
GENERAL_REGS 
DP_REG 
ST_REG 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
S_REGS 
INDEX_REGS 
SP_REGS 
A_REGS 
SI_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
REPEAT_REGS 
CR_REGS 
ACCUM_REGS 
OTHER_FLAG_REGS 
F0_REGS 
F1_REGS 
BR_FLAG_REGS 
FLAG_REGS 
EVEN_REGS 
GPR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
A0H_REG 
A0L_REG 
A0_REG 
A1H_REG 
ACCUM_HIGH_REGS 
A1L_REG 
ACCUM_LOW_REGS 
A1_REG 
ACCUM_REGS 
X_REG 
X_OR_ACCUM_LOW_REGS 
X_OR_ACCUM_REGS 
YH_REG 
YH_OR_ACCUM_HIGH_REGS 
X_OR_YH_REGS 
YL_REG 
YL_OR_ACCUM_LOW_REGS 
X_OR_YL_REGS 
X_OR_Y_REGS 
Y_REG 
ACCUM_OR_Y_REGS 
PH_REG 
X_OR_PH_REGS 
PL_REG 
PL_OR_ACCUM_LOW_REGS 
X_OR_PL_REGS 
YL_OR_PL_OR_ACCUM_LOW_REGS 
P_REG 
ACCUM_OR_P_REGS 
YL_OR_P_REGS 
ACCUM_LOW_OR_YL_OR_P_REGS 
Y_OR_P_REGS 
ACCUM_Y_OR_P_REGS 
NO_FRAME_Y_ADDR_REGS 
Y_ADDR_REGS 
ACCUM_LOW_OR_Y_ADDR_REGS 
ACCUM_OR_Y_ADDR_REGS 
X_OR_Y_ADDR_REGS 
Y_OR_Y_ADDR_REGS 
P_OR_Y_ADDR_REGS 
NON_HIGH_YBASE_ELIGIBLE_REGS 
YBASE_ELIGIBLE_REGS 
J_REG 
J_OR_DAU_16_BIT_REGS 
BMU_REGS 
NOHIGH_NON_ADDR_REGS 
NON_ADDR_REGS 
SLOW_MEM_LOAD_REGS 
NOHIGH_NON_YBASE_REGS 
NO_ACCUM_NON_YBASE_REGS 
NON_YBASE_REGS 
YBASE_VIRT_REGS 
ACCUM_LOW_OR_YBASE_REGS 
ACCUM_OR_YBASE_REGS 
X_OR_YBASE_REGS 
Y_OR_YBASE_REGS 
ACCUM_LOW_YL_PL_OR_YBASE_REGS 
P_OR_YBASE_REGS 
ACCUM_Y_P_OR_YBASE_REGS 
Y_ADDR_OR_YBASE_REGS 
YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS 
YBASE_OR_YBASE_ELIGIBLE_REGS 
NO_HIGH_ALL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MULTIPLY_32_REG 
MULTIPLY_64_REG 
LOW_REGS 
HIGH_REGS 
REAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
MAC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ADDR_REGS 
DATA_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AREG 
DREG 
CREG 
BREG 
SIREG 
DIREG 
AD_REGS 
Q_REGS 
NON_Q_REGS 
INDEX_REGS 
LEGACY_REGS 
GENERAL_REGS 
FP_TOP_REG 
FP_SECOND_REG 
FLOAT_REGS 
SSE_REGS 
MMX_REGS 
FP_TOP_SSE_REGS 
FP_SECOND_SSE_REGS 
FLOAT_SSE_REGS 
FLOAT_INT_REGS 
INT_SSE_REGS 
FLOAT_INT_SSE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GLOBAL_REGS 
LOCAL_REGS 
LOCAL_OR_GLOBAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
PR_REGS 
BR_REGS 
AR_M_REGS 
AR_I_REGS 
ADDL_REGS 
GR_REGS 
FR_REGS 
GR_AND_BR_REGS 
GR_AND_FR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CARRY_REG 
ACCUM_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
D_REGS 
X_REGS 
Y_REGS 
SP_REGS 
DA_REGS 
DB_REGS 
Z_REGS 
D8_REGS 
Q_REGS 
D_OR_X_REGS 
D_OR_Y_REGS 
D_OR_SP_REGS 
X_OR_Y_REGS 
A_REGS 
X_OR_SP_REGS 
Y_OR_SP_REGS 
X_OR_Y_OR_D_REGS 
A_OR_D_REGS 
A_OR_SP_REGS 
H_REGS 
S_REGS 
D_OR_S_REGS 
X_OR_S_REGS 
Y_OR_S_REGS 
SP_OR_S_REGS 
D_OR_X_OR_S_REGS 
D_OR_Y_OR_S_REGS 
D_OR_SP_OR_S_REGS 
A_OR_S_REGS 
D_OR_A_OR_S_REGS 
TMP_REGS 
D_OR_A_OR_TMP_REGS 
G_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDR_REGS 
FP_REGS 
GENERAL_REGS 
DATA_OR_FP_REGS 
ADDR_OR_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AP_REG 
XRF_REGS 
GENERAL_REGS 
AGRF_REGS 
XGRF_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ONLYR1_REGS 
LRW_REGS 
GENERAL_REGS 
C_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
REMAINDER_REG 
HIMULT_REG 
SYSTEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
SP_REGS 
DATA_OR_ADDRESS_REGS 
SP_OR_ADDRESS_REGS 
EXTENDED_REGS 
DATA_OR_EXTENDED_REGS 
ADDRESS_OR_EXTENDED_REGS 
SP_OR_EXTENDED_REGS 
SP_OR_ADDRESS_OR_EXTENDED_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REG0 
LONG_FLOAT_REG0 
FLOAT_REGS 
FP_REGS 
GEN_AND_FP_REGS 
FRAME_POINTER_REG 
STACK_POINTER_REG 
GEN_AND_MEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MUL_REGS 
GENERAL_REGS 
LOAD_FPU_REGS 
NO_LOAD_FPU_REGS 
FPU_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
OUT_REGS 
STD_REGS 
ARG_REGS 
SRC_REGS 
DST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R15_REGS 
BASE_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BASE_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALTIVEC_REGS 
VRSAVE_REGS 
NON_SPECIAL_REGS 
MQ_REGS 
LINK_REGS 
CTR_REGS 
LINK_OR_CTR_REGS 
SPECIAL_REGS 
SPEC_OR_GEN_REGS 
CR0_REGS 
CR_REGS 
NON_FLOAT_REGS 
XER_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ADDR_REGS 
GENERAL_REGS 
FP_REGS 
ADDR_FP_REGS 
GENERAL_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
PR_REGS 
T_REGS 
MAC_REGS 
FPUL_REGS 
SIBCALL_REGS 
GENERAL_REGS 
FP0_REGS 
FP_REGS 
DF_REGS 
FPSCR_REGS 
GENERAL_FP_REGS 
TARGET_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPCC_REGS 
I64_REGS 
GENERAL_REGS 
FP_REGS 
EXTRA_FP_REGS 
GENERAL_OR_FP_REGS 
GENERAL_OR_EXTRA_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R1_REGS 
TWO_REGS 
R2_REGS 
EIGHT_REGS 
R8_REGS 
ICALL_REGS 
GENERAL_REGS 
CARRY_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BR_REGS 
FP_REGS 
ACC_REG 
SP_REG 
RL_REGS 
GR_REGS 
AR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R2 
R0_1 
INDEX_REGS 
BASE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LR0_REGS 
GENERAL_REGS 
BP_REGS 
FC_REGS 
CR_REGS 
Q_REGS 
SPECIAL_REGS 
ACCUM0_REGS 
ACCUM_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R24_REG 
R25_REG 
R27_REG 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LPCOUNT_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPU_REGS 
LO_REGS 
STACK_REG 
BASE_REGS 
HI_REGS 
CC_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
POINTER_X_REGS 
POINTER_Y_REGS 
POINTER_Z_REGS 
STACK_REG 
BASE_POINTER_REGS 
POINTER_REGS 
ADDW_REGS 
SIMPLE_LD_REGS 
LD_REGS 
NO_LD_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0R1_REGS 
R2R3_REGS 
EXT_LOW_REGS 
EXT_REGS 
ADDR_REGS 
INDEX_REGS 
BK_REG 
SP_REG 
RC_REG 
COUNTER_REGS 
INT_REGS 
GENERAL_REGS 
DP_REG 
ST_REG 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
S_REGS 
INDEX_REGS 
SP_REGS 
A_REGS 
SI_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
REPEAT_REGS 
CR_REGS 
ACCUM_REGS 
OTHER_FLAG_REGS 
F0_REGS 
F1_REGS 
BR_FLAG_REGS 
FLAG_REGS 
EVEN_REGS 
GPR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
A0H_REG 
A0L_REG 
A0_REG 
A1H_REG 
ACCUM_HIGH_REGS 
A1L_REG 
ACCUM_LOW_REGS 
A1_REG 
ACCUM_REGS 
X_REG 
X_OR_ACCUM_LOW_REGS 
X_OR_ACCUM_REGS 
YH_REG 
YH_OR_ACCUM_HIGH_REGS 
X_OR_YH_REGS 
YL_REG 
YL_OR_ACCUM_LOW_REGS 
X_OR_YL_REGS 
X_OR_Y_REGS 
Y_REG 
ACCUM_OR_Y_REGS 
PH_REG 
X_OR_PH_REGS 
PL_REG 
PL_OR_ACCUM_LOW_REGS 
X_OR_PL_REGS 
YL_OR_PL_OR_ACCUM_LOW_REGS 
P_REG 
ACCUM_OR_P_REGS 
YL_OR_P_REGS 
ACCUM_LOW_OR_YL_OR_P_REGS 
Y_OR_P_REGS 
ACCUM_Y_OR_P_REGS 
NO_FRAME_Y_ADDR_REGS 
Y_ADDR_REGS 
ACCUM_LOW_OR_Y_ADDR_REGS 
ACCUM_OR_Y_ADDR_REGS 
X_OR_Y_ADDR_REGS 
Y_OR_Y_ADDR_REGS 
P_OR_Y_ADDR_REGS 
NON_HIGH_YBASE_ELIGIBLE_REGS 
YBASE_ELIGIBLE_REGS 
J_REG 
J_OR_DAU_16_BIT_REGS 
BMU_REGS 
NOHIGH_NON_ADDR_REGS 
NON_ADDR_REGS 
SLOW_MEM_LOAD_REGS 
NOHIGH_NON_YBASE_REGS 
NO_ACCUM_NON_YBASE_REGS 
NON_YBASE_REGS 
YBASE_VIRT_REGS 
ACCUM_LOW_OR_YBASE_REGS 
ACCUM_OR_YBASE_REGS 
X_OR_YBASE_REGS 
Y_OR_YBASE_REGS 
ACCUM_LOW_YL_PL_OR_YBASE_REGS 
P_OR_YBASE_REGS 
ACCUM_Y_P_OR_YBASE_REGS 
Y_ADDR_OR_YBASE_REGS 
YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS 
YBASE_OR_YBASE_ELIGIBLE_REGS 
NO_HIGH_ALL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MULTIPLY_32_REG 
MULTIPLY_64_REG 
LOW_REGS 
HIGH_REGS 
REAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
MAC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ADDR_REGS 
DATA_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AREG 
DREG 
CREG 
BREG 
SIREG 
DIREG 
AD_REGS 
Q_REGS 
NON_Q_REGS 
INDEX_REGS 
LEGACY_REGS 
GENERAL_REGS 
FP_TOP_REG 
FP_SECOND_REG 
FLOAT_REGS 
SSE_REGS 
MMX_REGS 
FP_TOP_SSE_REGS 
FP_SECOND_SSE_REGS 
FLOAT_SSE_REGS 
FLOAT_INT_REGS 
INT_SSE_REGS 
FLOAT_INT_SSE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GLOBAL_REGS 
LOCAL_REGS 
LOCAL_OR_GLOBAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
PR_REGS 
BR_REGS 
AR_M_REGS 
AR_I_REGS 
ADDL_REGS 
GR_REGS 
FR_REGS 
GR_AND_BR_REGS 
GR_AND_FR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CARRY_REG 
ACCUM_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
D_REGS 
X_REGS 
Y_REGS 
SP_REGS 
DA_REGS 
DB_REGS 
Z_REGS 
D8_REGS 
Q_REGS 
D_OR_X_REGS 
D_OR_Y_REGS 
D_OR_SP_REGS 
X_OR_Y_REGS 
A_REGS 
X_OR_SP_REGS 
Y_OR_SP_REGS 
X_OR_Y_OR_D_REGS 
A_OR_D_REGS 
A_OR_SP_REGS 
H_REGS 
S_REGS 
D_OR_S_REGS 
X_OR_S_REGS 
Y_OR_S_REGS 
SP_OR_S_REGS 
D_OR_X_OR_S_REGS 
D_OR_Y_OR_S_REGS 
D_OR_SP_OR_S_REGS 
A_OR_S_REGS 
D_OR_A_OR_S_REGS 
TMP_REGS 
D_OR_A_OR_TMP_REGS 
G_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDR_REGS 
FP_REGS 
GENERAL_REGS 
DATA_OR_FP_REGS 
ADDR_OR_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AP_REG 
XRF_REGS 
GENERAL_REGS 
AGRF_REGS 
XGRF_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ONLYR1_REGS 
LRW_REGS 
GENERAL_REGS 
C_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
REMAINDER_REG 
HIMULT_REG 
SYSTEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
SP_REGS 
DATA_OR_ADDRESS_REGS 
SP_OR_ADDRESS_REGS 
EXTENDED_REGS 
DATA_OR_EXTENDED_REGS 
ADDRESS_OR_EXTENDED_REGS 
SP_OR_EXTENDED_REGS 
SP_OR_ADDRESS_OR_EXTENDED_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REG0 
LONG_FLOAT_REG0 
FLOAT_REGS 
FP_REGS 
GEN_AND_FP_REGS 
FRAME_POINTER_REG 
STACK_POINTER_REG 
GEN_AND_MEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MUL_REGS 
GENERAL_REGS 
LOAD_FPU_REGS 
NO_LOAD_FPU_REGS 
FPU_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
OUT_REGS 
STD_REGS 
ARG_REGS 
SRC_REGS 
DST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R15_REGS 
BASE_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BASE_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALTIVEC_REGS 
VRSAVE_REGS 
NON_SPECIAL_REGS 
MQ_REGS 
LINK_REGS 
CTR_REGS 
LINK_OR_CTR_REGS 
SPECIAL_REGS 
SPEC_OR_GEN_REGS 
CR0_REGS 
CR_REGS 
NON_FLOAT_REGS 
XER_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ADDR_REGS 
GENERAL_REGS 
FP_REGS 
ADDR_FP_REGS 
GENERAL_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
PR_REGS 
T_REGS 
MAC_REGS 
FPUL_REGS 
SIBCALL_REGS 
GENERAL_REGS 
FP0_REGS 
FP_REGS 
DF_REGS 
FPSCR_REGS 
GENERAL_FP_REGS 
TARGET_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPCC_REGS 
I64_REGS 
GENERAL_REGS 
FP_REGS 
EXTRA_FP_REGS 
GENERAL_OR_FP_REGS 
GENERAL_OR_EXTRA_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R1_REGS 
TWO_REGS 
R2_REGS 
EIGHT_REGS 
R8_REGS 
ICALL_REGS 
GENERAL_REGS 
CARRY_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BR_REGS 
FP_REGS 
ACC_REG 
SP_REG 
RL_REGS 
GR_REGS 
AR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
R24_REG 
R25_REG 
R27_REG 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LPCOUNT_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPA_REGS 
CIRRUS_REGS 
VFP_REGS 
IWMMXT_GR_REGS 
IWMMXT_REGS 
LO_REGS 
STACK_REG 
BASE_REGS 
HI_REGS 
CC_REG 
VFPCC_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
POINTER_X_REGS 
POINTER_Y_REGS 
POINTER_Z_REGS 
STACK_REG 
BASE_POINTER_REGS 
POINTER_REGS 
ADDW_REGS 
SIMPLE_LD_REGS 
LD_REGS 
NO_LD_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
IREGS 
BREGS 
LREGS 
MREGS 
CIRCREGS 
DAGREGS 
EVEN_AREGS 
ODD_AREGS 
AREGS 
CCREGS 
EVEN_DREGS 
ODD_DREGS 
DREGS 
PREGS_CLOBBERED 
PREGS 
DPREGS 
MOST_REGS 
PROLOGUE_REGS 
NON_A_CC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0R1_REGS 
R2R3_REGS 
EXT_LOW_REGS 
EXT_REGS 
ADDR_REGS 
INDEX_REGS 
BK_REG 
SP_REG 
RC_REG 
COUNTER_REGS 
INT_REGS 
GENERAL_REGS 
DP_REG 
ST_REG 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MULTIPLY_32_REG 
MULTIPLY_64_REG 
LOW_REGS 
HIGH_REGS 
REAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ICC_REGS 
FCC_REGS 
CC_REGS 
ICR_REGS 
FCR_REGS 
CR_REGS 
LCR_REG 
LR_REG 
GR8_REGS 
GR9_REGS 
GR89_REGS 
FDPIC_REGS 
FDPIC_FPTR_REGS 
FDPIC_CALL_REGS 
SPR_REGS 
QUAD_ACC_REGS 
EVEN_ACC_REGS 
ACC_REGS 
ACCG_REGS 
QUAD_FPR_REGS 
FEVEN_REGS 
FPR_REGS 
QUAD_REGS 
EVEN_REGS 
GPR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
COUNTER_REGS 
SOURCE_REGS 
DESTINATION_REGS 
GENERAL_REGS 
MAC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AREG 
DREG 
CREG 
BREG 
SIREG 
DIREG 
AD_REGS 
Q_REGS 
NON_Q_REGS 
INDEX_REGS 
LEGACY_REGS 
GENERAL_REGS 
FP_TOP_REG 
FP_SECOND_REG 
FLOAT_REGS 
SSE_REGS 
MMX_REGS 
FP_TOP_SSE_REGS 
FP_SECOND_SSE_REGS 
FLOAT_SSE_REGS 
FLOAT_INT_REGS 
INT_SSE_REGS 
FLOAT_INT_SSE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
PR_REGS 
BR_REGS 
AR_M_REGS 
AR_I_REGS 
ADDL_REGS 
GR_REGS 
FR_REGS 
GR_AND_BR_REGS 
GR_AND_FR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DPH_REGS 
DPL_REGS 
DP_REGS 
SP_REGS 
IPH_REGS 
IPL_REGS 
IP_REGS 
DP_SP_REGS 
PTR_REGS 
NONPTR_REGS 
NONSP_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CARRY_REG 
ACCUM_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
D_REGS 
X_REGS 
Y_REGS 
SP_REGS 
DA_REGS 
DB_REGS 
Z_REGS 
D8_REGS 
Q_REGS 
D_OR_X_REGS 
D_OR_Y_REGS 
D_OR_SP_REGS 
X_OR_Y_REGS 
A_REGS 
X_OR_SP_REGS 
Y_OR_SP_REGS 
X_OR_Y_OR_D_REGS 
A_OR_D_REGS 
A_OR_SP_REGS 
H_REGS 
S_REGS 
D_OR_S_REGS 
X_OR_S_REGS 
Y_OR_S_REGS 
Z_OR_S_REGS 
SP_OR_S_REGS 
D_OR_X_OR_S_REGS 
D_OR_Y_OR_S_REGS 
D_OR_SP_OR_S_REGS 
A_OR_S_REGS 
D_OR_A_OR_S_REGS 
TMP_REGS 
D_OR_A_OR_TMP_REGS 
G_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDR_REGS 
FP_REGS 
GENERAL_REGS 
DATA_OR_FP_REGS 
ADDR_OR_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ONLYR1_REGS 
LRW_REGS 
GENERAL_REGS 
C_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
PIC_FN_ADDR_REG 
LEA_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
REMAINDER_REG 
HIMULT_REG 
SYSTEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
SP_REGS 
DATA_OR_ADDRESS_REGS 
SP_OR_ADDRESS_REGS 
EXTENDED_REGS 
DATA_OR_EXTENDED_REGS 
ADDRESS_OR_EXTENDED_REGS 
SP_OR_EXTENDED_REGS 
SP_OR_ADDRESS_OR_EXTENDED_REGS 
FP_REGS 
FP_ACC_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REG0 
LONG_FLOAT_REG0 
FLOAT_REGS 
LONG_REGS 
FP_REGS 
GEN_AND_FP_REGS 
FRAME_POINTER_REG 
STACK_POINTER_REG 
GEN_AND_MEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MUL_REGS 
GENERAL_REGS 
LOAD_FPU_REGS 
NO_LOAD_FPU_REGS 
FPU_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BASE_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALTIVEC_REGS 
VRSAVE_REGS 
VSCR_REGS 
SPE_ACC_REGS 
SPEFSCR_REGS 
NON_SPECIAL_REGS 
MQ_REGS 
LINK_REGS 
CTR_REGS 
LINK_OR_CTR_REGS 
SPECIAL_REGS 
SPEC_OR_GEN_REGS 
CR0_REGS 
CR_REGS 
NON_FLOAT_REGS 
XER_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CC_REGS 
ADDR_REGS 
GENERAL_REGS 
ACCESS_REGS 
ADDR_CC_REGS 
GENERAL_CC_REGS 
FP_REGS 
ADDR_FP_REGS 
GENERAL_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
PR_REGS 
T_REGS 
MAC_REGS 
FPUL_REGS 
SIBCALL_REGS 
GENERAL_REGS 
FP0_REGS 
FP_REGS 
DF_HI_REGS 
DF_REGS 
FPSCR_REGS 
GENERAL_FP_REGS 
TARGET_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPCC_REGS 
I64_REGS 
GENERAL_REGS 
FP_REGS 
EXTRA_FP_REGS 
GENERAL_OR_FP_REGS 
GENERAL_OR_EXTRA_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R1_REGS 
TWO_REGS 
R2_REGS 
EIGHT_REGS 
R8_REGS 
ICALL_REGS 
GENERAL_REGS 
CARRY_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BR_REGS 
FP_REGS 
ACC_REG 
SP_REG 
RL_REGS 
GR_REGS 
AR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
R24_REG 
R25_REG 
R27_REG 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LPCOUNT_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPA_REGS 
CIRRUS_REGS 
VFP_REGS 
IWMMXT_GR_REGS 
IWMMXT_REGS 
LO_REGS 
STACK_REG 
BASE_REGS 
HI_REGS 
CC_REG 
VFPCC_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
POINTER_X_REGS 
POINTER_Y_REGS 
POINTER_Z_REGS 
STACK_REG 
BASE_POINTER_REGS 
POINTER_REGS 
ADDW_REGS 
SIMPLE_LD_REGS 
LD_REGS 
NO_LD_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
IREGS 
BREGS 
LREGS 
MREGS 
CIRCREGS 
DAGREGS 
EVEN_AREGS 
ODD_AREGS 
AREGS 
CCREGS 
EVEN_DREGS 
ODD_DREGS 
DREGS 
FDPIC_REGS 
FDPIC_FPTR_REGS 
PREGS_CLOBBERED 
PREGS 
IPREGS 
DPREGS 
MOST_REGS 
LT_REGS 
LC_REGS 
LB_REGS 
PROLOGUE_REGS 
NON_A_CC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0R1_REGS 
R2R3_REGS 
EXT_LOW_REGS 
EXT_REGS 
ADDR_REGS 
INDEX_REGS 
BK_REG 
SP_REG 
RC_REG 
COUNTER_REGS 
INT_REGS 
GENERAL_REGS 
DP_REG 
ST_REG 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MOF_REGS 
CC0_REGS 
SPECIAL_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LO_REGS 
HI_REGS 
HILO_REGS 
NOSP_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MULTIPLY_32_REG 
MULTIPLY_64_REG 
LOW_REGS 
HIGH_REGS 
REAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ICC_REGS 
FCC_REGS 
CC_REGS 
ICR_REGS 
FCR_REGS 
CR_REGS 
LCR_REG 
LR_REG 
GR8_REGS 
GR9_REGS 
GR89_REGS 
FDPIC_REGS 
FDPIC_FPTR_REGS 
FDPIC_CALL_REGS 
SPR_REGS 
QUAD_ACC_REGS 
EVEN_ACC_REGS 
ACC_REGS 
ACCG_REGS 
QUAD_FPR_REGS 
FEVEN_REGS 
FPR_REGS 
QUAD_REGS 
EVEN_REGS 
GPR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
COUNTER_REGS 
SOURCE_REGS 
DESTINATION_REGS 
GENERAL_REGS 
MAC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AREG 
DREG 
CREG 
BREG 
SIREG 
DIREG 
AD_REGS 
Q_REGS 
NON_Q_REGS 
INDEX_REGS 
LEGACY_REGS 
GENERAL_REGS 
FP_TOP_REG 
FP_SECOND_REG 
FLOAT_REGS 
SSE_REGS 
MMX_REGS 
FP_TOP_SSE_REGS 
FP_SECOND_SSE_REGS 
FLOAT_SSE_REGS 
FLOAT_INT_REGS 
INT_SSE_REGS 
FLOAT_INT_SSE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
PR_REGS 
BR_REGS 
AR_M_REGS 
AR_I_REGS 
ADDL_REGS 
GR_REGS 
FP_REGS 
FR_REGS 
GR_AND_BR_REGS 
GR_AND_FR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
SP_REGS 
FB_REGS 
SB_REGS 
CR_REGS 
R0_REGS 
R1_REGS 
R2_REGS 
R3_REGS 
R02_REGS 
HL_REGS 
QI_REGS 
R23_REGS 
R03_REGS 
DI_REGS 
A0_REGS 
A1_REGS 
A_REGS 
AD_REGS 
PS_REGS 
SI_REGS 
HI_REGS 
RA_REGS 
GENERAL_REGS 
FLG_REGS 
HC_REGS 
MEM_REGS 
R02_A_MEM_REGS 
A_HL_MEM_REGS 
R1_R3_A_MEM_REGS 
R03_MEM_REGS 
A_HI_MEM_REGS 
A_AD_CR_MEM_SI_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CARRY_REG 
ACCUM_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
D_REGS 
X_REGS 
Y_REGS 
SP_REGS 
DA_REGS 
DB_REGS 
Z_REGS 
D8_REGS 
Q_REGS 
D_OR_X_REGS 
D_OR_Y_REGS 
D_OR_SP_REGS 
X_OR_Y_REGS 
A_REGS 
X_OR_SP_REGS 
Y_OR_SP_REGS 
X_OR_Y_OR_D_REGS 
A_OR_D_REGS 
A_OR_SP_REGS 
H_REGS 
S_REGS 
D_OR_S_REGS 
X_OR_S_REGS 
Y_OR_S_REGS 
Z_OR_S_REGS 
SP_OR_S_REGS 
D_OR_X_OR_S_REGS 
D_OR_Y_OR_S_REGS 
D_OR_SP_OR_S_REGS 
A_OR_S_REGS 
D_OR_A_OR_S_REGS 
TMP_REGS 
D_OR_A_OR_TMP_REGS 
G_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDR_REGS 
FP_REGS 
GENERAL_REGS 
DATA_OR_FP_REGS 
ADDR_OR_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ONLYR1_REGS 
LRW_REGS 
GENERAL_REGS 
C_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
PIC_FN_ADDR_REG 
V1_REG 
LEA_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
DSP_ACC_REGS 
ACC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
REMAINDER_REG 
HIMULT_REG 
SYSTEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
SP_REGS 
DATA_OR_ADDRESS_REGS 
SP_OR_ADDRESS_REGS 
EXTENDED_REGS 
DATA_OR_EXTENDED_REGS 
ADDRESS_OR_EXTENDED_REGS 
SP_OR_EXTENDED_REGS 
SP_OR_ADDRESS_OR_EXTENDED_REGS 
FP_REGS 
FP_ACC_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MUL_REGS 
GENERAL_REGS 
LOAD_FPU_REGS 
NO_LOAD_FPU_REGS 
FPU_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BASE_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALTIVEC_REGS 
VRSAVE_REGS 
VSCR_REGS 
SPE_ACC_REGS 
SPEFSCR_REGS 
NON_SPECIAL_REGS 
MQ_REGS 
LINK_REGS 
CTR_REGS 
LINK_OR_CTR_REGS 
SPECIAL_REGS 
SPEC_OR_GEN_REGS 
CR0_REGS 
CR_REGS 
NON_FLOAT_REGS 
XER_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CC_REGS 
ADDR_REGS 
GENERAL_REGS 
ACCESS_REGS 
ADDR_CC_REGS 
GENERAL_CC_REGS 
FP_REGS 
ADDR_FP_REGS 
GENERAL_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
G16_REGS 
G32_REGS 
T32_REGS 
HI_REG 
LO_REG 
CE_REGS 
CN_REG 
LC_REG 
SC_REG 
SP_REGS 
CR_REGS 
CP1_REGS 
CP2_REGS 
CP3_REGS 
CPA_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
PR_REGS 
T_REGS 
MAC_REGS 
FPUL_REGS 
SIBCALL_REGS 
GENERAL_REGS 
FP0_REGS 
FP_REGS 
DF_HI_REGS 
DF_REGS 
FPSCR_REGS 
GENERAL_FP_REGS 
GENERAL_DF_REGS 
TARGET_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPCC_REGS 
I64_REGS 
GENERAL_REGS 
FP_REGS 
EXTRA_FP_REGS 
GENERAL_OR_FP_REGS 
GENERAL_OR_EXTRA_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R1_REGS 
TWO_REGS 
R2_REGS 
EIGHT_REGS 
R8_REGS 
ICALL_REGS 
GENERAL_REGS 
CARRY_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BR_REGS 
FP_REGS 
ACC_REG 
SP_REG 
RL_REGS 
GR_REGS 
AR_REGS 
ALL_REGS 
LIM_REG_CLASSES 

Definition at line 715 of file ia64.h.

Function Documentation

struct machine_function GTY ( ()   )  [read, write]

Definition at line 2013 of file ia64.h.

Variable Documentation

int ia64_asm_output_label

Definition at line 52 of file ia64.c.

int ia64_final_schedule

Definition at line 5530 of file ia64.c.

unsigned int ia64_section_threshold

Definition at line 112 of file ia64.c.

Referenced by ia64_in_small_data_p(), ia64_override_options(), ia64_select_rtx_section(), and sdata_symbolic_operand().

enum processor_type ia64_tune

Definition at line 112 of file ia64.c.

Referenced by bundling(), ia64_dfa_new_cycle(), ia64_h_i_d_extended(), ia64_handle_option(), ia64_override_options(), ia64_reorg(), and ia64_sched_reorder2().

Generated on Wed Apr 8 14:55:49 2009 for Open64 by  doxygen 1.5.6