00001 /* Define per-register tables for data flow info and register allocation. 00002 Copyright (C) 1987, 1993, 1994, 1995, 1996, 1997, 1998, 00003 1999, 2000, 2003, 2004 Free Software Foundation, Inc. 00004 00005 This file is part of GCC. 00006 00007 GCC is free software; you can redistribute it and/or modify it under 00008 the terms of the GNU General Public License as published by the Free 00009 Software Foundation; either version 2, or (at your option) any later 00010 version. 00011 00012 GCC is distributed in the hope that it will be useful, but WITHOUT ANY 00013 WARRANTY; without even the implied warranty of MERCHANTABILITY or 00014 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 00015 for more details. 00016 00017 You should have received a copy of the GNU General Public License 00018 along with GCC; see the file COPYING. If not, write to the Free 00019 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 00020 02110-1301, USA. */ 00021 00022 #ifndef GCC_REGS_H 00023 #define GCC_REGS_H 00024 00025 #include "varray.h" 00026 #include "obstack.h" 00027 #include "hard-reg-set.h" 00028 #include "basic-block.h" 00029 00030 #define REG_BYTES(R) mode_size[(int) GET_MODE (R)] 00031 00032 /* When you only have the mode of a pseudo register before it has a hard 00033 register chosen for it, this reports the size of each hard register 00034 a pseudo in such a mode would get allocated to. A target may 00035 override this. */ 00036 00037 #ifndef REGMODE_NATURAL_SIZE 00038 #define REGMODE_NATURAL_SIZE(MODE) UNITS_PER_WORD 00039 #endif 00040 00041 #ifndef SMALL_REGISTER_CLASSES 00042 #define SMALL_REGISTER_CLASSES 0 00043 #endif 00044 00045 /* Maximum register number used in this function, plus one. */ 00046 00047 extern int max_regno; 00048 00049 /* Register information indexed by register number */ 00050 typedef struct reg_info_def 00051 { /* fields set by reg_scan */ 00052 int first_uid; /* UID of first insn to use (REG n) */ 00053 int last_uid; /* UID of last insn to use (REG n) */ 00054 00055 /* fields set by reg_scan & flow_analysis */ 00056 int sets; /* # of times (REG n) is set */ 00057 00058 /* fields set by flow_analysis */ 00059 int refs; /* # of times (REG n) is used or set */ 00060 int freq; /* # estimated frequency (REG n) is used or set */ 00061 int deaths; /* # of times (REG n) dies */ 00062 int live_length; /* # of instructions (REG n) is live */ 00063 int calls_crossed; /* # of calls (REG n) is live across */ 00064 int throw_calls_crossed; /* # of calls that may throw (REG n) is live across */ 00065 int basic_block; /* # of basic blocks (REG n) is used in */ 00066 } reg_info; 00067 00068 typedef reg_info *reg_info_p; 00069 00070 DEF_VEC_P(reg_info_p); 00071 DEF_VEC_ALLOC_P(reg_info_p,heap); 00072 00073 extern VEC(reg_info_p,heap) *reg_n_info; 00074 00075 /* Indexed by n, gives number of times (REG n) is used or set. */ 00076 00077 #define REG_N_REFS(N) (VEC_index (reg_info_p, reg_n_info, N)->refs) 00078 00079 /* Estimate frequency of references to register N. */ 00080 00081 #define REG_FREQ(N) (VEC_index (reg_info_p, reg_n_info, N)->freq) 00082 00083 /* The weights for each insn varries from 0 to REG_FREQ_BASE. 00084 This constant does not need to be high, as in infrequently executed 00085 regions we want to count instructions equivalently to optimize for 00086 size instead of speed. */ 00087 #define REG_FREQ_MAX 1000 00088 00089 /* Compute register frequency from the BB frequency. When optimizing for size, 00090 or profile driven feedback is available and the function is never executed, 00091 frequency is always equivalent. Otherwise rescale the basic block 00092 frequency. */ 00093 #define REG_FREQ_FROM_BB(bb) (optimize_size \ 00094 || (flag_branch_probabilities \ 00095 && !ENTRY_BLOCK_PTR->count) \ 00096 ? REG_FREQ_MAX \ 00097 : ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\ 00098 ? ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\ 00099 : 1) 00100 00101 /* Indexed by n, gives number of times (REG n) is set. 00102 ??? both regscan and flow allocate space for this. We should settle 00103 on just copy. */ 00104 00105 #define REG_N_SETS(N) (VEC_index (reg_info_p, reg_n_info, N)->sets) 00106 00107 /* Indexed by N, gives number of insns in which register N dies. 00108 Note that if register N is live around loops, it can die 00109 in transitions between basic blocks, and that is not counted here. 00110 So this is only a reliable indicator of how many regions of life there are 00111 for registers that are contained in one basic block. */ 00112 00113 #define REG_N_DEATHS(N) (VEC_index (reg_info_p, reg_n_info, N)->deaths) 00114 00115 /* Get the number of consecutive words required to hold pseudo-reg N. */ 00116 00117 #define PSEUDO_REGNO_SIZE(N) \ 00118 ((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1) \ 00119 / UNITS_PER_WORD) 00120 00121 /* Get the number of bytes required to hold pseudo-reg N. */ 00122 00123 #define PSEUDO_REGNO_BYTES(N) \ 00124 GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) 00125 00126 /* Get the machine mode of pseudo-reg N. */ 00127 00128 #define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N]) 00129 00130 /* Indexed by N, gives number of CALL_INSNS across which (REG n) is live. */ 00131 00132 #define REG_N_CALLS_CROSSED(N) \ 00133 (VEC_index (reg_info_p, reg_n_info, N)->calls_crossed) 00134 00135 /* Indexed by N, gives number of CALL_INSNS that may throw, across which 00136 (REG n) is live. */ 00137 00138 #define REG_N_THROWING_CALLS_CROSSED(N) \ 00139 (VEC_index (reg_info_p, reg_n_info, N)->throw_calls_crossed) 00140 00141 /* Total number of instructions at which (REG n) is live. 00142 The larger this is, the less priority (REG n) gets for 00143 allocation in a hard register (in global-alloc). 00144 This is set in flow.c and remains valid for the rest of the compilation 00145 of the function; it is used to control register allocation. 00146 00147 local-alloc.c may alter this number to change the priority. 00148 00149 Negative values are special. 00150 -1 is used to mark a pseudo reg which has a constant or memory equivalent 00151 and is used infrequently enough that it should not get a hard register. 00152 -2 is used to mark a pseudo reg for a parameter, when a frame pointer 00153 is not required. global.c makes an allocno for this but does 00154 not try to assign a hard register to it. */ 00155 00156 #define REG_LIVE_LENGTH(N) \ 00157 (VEC_index (reg_info_p, reg_n_info, N)->live_length) 00158 00159 /* Vector of substitutions of register numbers, 00160 used to map pseudo regs into hardware regs. 00161 00162 This can't be folded into reg_n_info without changing all of the 00163 machine dependent directories, since the reload functions 00164 in the machine dependent files access it. */ 00165 00166 extern short *reg_renumber; 00167 00168 /* Vector indexed by hardware reg saying whether that reg is ever used. */ 00169 00170 extern char regs_ever_live[FIRST_PSEUDO_REGISTER]; 00171 00172 /* Like regs_ever_live, but saying whether reg is set by asm statements. */ 00173 00174 extern char regs_asm_clobbered[FIRST_PSEUDO_REGISTER]; 00175 00176 /* Vector indexed by machine mode saying whether there are regs of that mode. */ 00177 00178 extern bool have_regs_of_mode [MAX_MACHINE_MODE]; 00179 00180 /* For each hard register, the widest mode object that it can contain. 00181 This will be a MODE_INT mode if the register can hold integers. Otherwise 00182 it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the 00183 register. */ 00184 00185 extern enum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER]; 00186 00187 /* Vector indexed by regno; gives uid of first insn using that reg. 00188 This is computed by reg_scan for use by cse and loop. 00189 It is sometimes adjusted for subsequent changes during loop, 00190 but not adjusted by cse even if cse invalidates it. */ 00191 00192 #define REGNO_FIRST_UID(N) (VEC_index (reg_info_p, reg_n_info, N)->first_uid) 00193 00194 /* Vector indexed by regno; gives uid of last insn using that reg. 00195 This is computed by reg_scan for use by cse and loop. 00196 It is sometimes adjusted for subsequent changes during loop, 00197 but not adjusted by cse even if cse invalidates it. 00198 This is harmless since cse won't scan through a loop end. */ 00199 00200 #define REGNO_LAST_UID(N) (VEC_index (reg_info_p, reg_n_info, N)->last_uid) 00201 00202 /* List made of EXPR_LIST rtx's which gives pairs of pseudo registers 00203 that have to go in the same hard reg. */ 00204 extern rtx regs_may_share; 00205 00206 /* Flag set by local-alloc or global-alloc if they decide to allocate 00207 something in a call-clobbered register. */ 00208 00209 extern int caller_save_needed; 00210 00211 /* Predicate to decide whether to give a hard reg to a pseudo which 00212 is referenced REFS times and would need to be saved and restored 00213 around a call CALLS times. */ 00214 00215 #ifndef CALLER_SAVE_PROFITABLE 00216 #define CALLER_SAVE_PROFITABLE(REFS, CALLS) (4 * (CALLS) < (REFS)) 00217 #endif 00218 00219 /* On most machines a register class is likely to be spilled if it 00220 only has one register. */ 00221 #ifndef CLASS_LIKELY_SPILLED_P 00222 #define CLASS_LIKELY_SPILLED_P(CLASS) (reg_class_size[(int) (CLASS)] == 1) 00223 #endif 00224 00225 /* Select a register mode required for caller save of hard regno REGNO. */ 00226 #ifndef HARD_REGNO_CALLER_SAVE_MODE 00227 #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \ 00228 choose_hard_reg_mode (REGNO, NREGS, false) 00229 #endif 00230 00231 /* Registers that get partially clobbered by a call in a given mode. 00232 These must not be call used registers. */ 00233 #ifndef HARD_REGNO_CALL_PART_CLOBBERED 00234 #define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) 0 00235 #endif 00236 00237 /* Allocate reg_n_info tables */ 00238 extern void allocate_reg_info (size_t, int, int); 00239 00240 /* Specify number of hard registers given machine mode occupy. */ 00241 extern unsigned char hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE]; 00242 00243 #endif /* GCC_REGS_H */
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