Open64: osprey/linux/mfef90_includes/sys/fpu.h Source File

00001 /*
00002 
00003   Copyright (C) 2000, 2001 Silicon Graphics, Inc.  All Rights Reserved.
00004 
00005   This program is free software; you can redistribute it and/or modify it
00006   under the terms of version 2 of the GNU General Public License as
00007   published by the Free Software Foundation.
00008 
00009   This program is distributed in the hope that it would be useful, but
00010   WITHOUT ANY WARRANTY; without even the implied warranty of
00011   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
00012 
00013   Further, this software is distributed without any warranty that it is
00014   free of the rightful claim of any third person regarding infringement 
00015   or the like.  Any license provided herein, whether implied or 
00016   otherwise, applies only to this software file.  Patent licenses, if 
00017   any, provided herein do not apply to combinations of this program with 
00018   other software, or any other product whatsoever.  
00019 
00020   You should have received a copy of the GNU General Public License along
00021   with this program; if not, write the Free Software Foundation, Inc., 59
00022   Temple Place - Suite 330, Boston MA 02111-1307, USA.
00023 
00024   Contact information:  Silicon Graphics, Inc., 1600 Amphitheatre Pky,
00025   Mountain View, CA 94043, or:
00026 
00027   http://www.sgi.com
00028 
00029   For further information regarding this notice, see:
00030 
00031   http://oss.sgi.com/projects/GenInfo/NoticeExplan
00032 
00033 */
00034 
00035 
00036 #ifndef __SYS_FPU_H__
00037 #define __SYS_FPU_H__
00038 #ifdef __cplusplus
00039 extern "C" {
00040 #endif
00041 
00042 
00043 /* %Q% %I% %M% */
00044 
00045 #ident "$Revision: 1.1.1.1 $"
00046 
00047 /*
00048  * fpu.h -- fpu specific defines
00049  */
00050 
00051 #if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
00052 /*
00053  * Structure and constant definisions for floating-point instructions.
00054  */
00055 union fpu_instr {
00056   unsigned int instr;
00057 
00058   struct {
00059 #ifdef _MIPSEB
00060     unsigned op : 6;
00061     unsigned base : 5;
00062     unsigned rt : 5;
00063     signed immed : 16;
00064 #endif /* _MIPSEB */
00065 #ifdef _MIPSEL
00066     signed immed : 16;
00067     unsigned rt : 5;
00068     unsigned base : 5;
00069     unsigned op : 6;
00070 #endif /* _MIPSEL */
00071   } itype;
00072 
00073   struct {
00074 #ifdef _MIPSEB
00075     unsigned op : 6;
00076     unsigned sub : 5;
00077     unsigned rt : 5;
00078     unsigned rs : 5;
00079     unsigned : 11;
00080 #endif /* _MIPSEB */
00081 #ifdef _MIPSEL
00082     unsigned : 11;
00083     unsigned rs : 5;
00084     unsigned rt : 5;
00085     unsigned sub : 5;
00086     unsigned op : 6;
00087 #endif /* _MIPSEL */
00088   } mtype;
00089 
00090   struct {
00091 #ifdef _MIPSEB
00092     unsigned op : 6;
00093     unsigned one : 1;
00094     unsigned fmt : 4;
00095     unsigned rt : 5;
00096     unsigned rs : 5;
00097     unsigned rd : 5;
00098     unsigned func : 6;
00099 #endif /* _MIPSEB */
00100 #ifdef _MIPSEL
00101     unsigned func : 6;
00102     unsigned rd : 5;
00103     unsigned rs : 5;
00104     unsigned rt : 5;
00105     unsigned fmt : 4;
00106     unsigned one : 1;
00107     unsigned op : 6;
00108 #endif /* _MIPSEL */
00109   } rtype;
00110 
00111   struct {
00112 #ifdef _MIPSEB
00113     unsigned op : 6;
00114     unsigned rr : 5;
00115     unsigned rt : 5;
00116     unsigned rs : 5;
00117     unsigned rd : 5;
00118     unsigned func : 3;
00119     unsigned fmt : 3;
00120 #endif /* _MIPSEB */
00121 #ifdef _MIPSEL
00122     unsigned fmt : 3;
00123     unsigned func : 3;
00124     unsigned rd : 5;
00125     unsigned rs : 5;
00126     unsigned rt : 5;
00127     unsigned rr : 5;
00128     unsigned op : 6;
00129 #endif /* _MIPSEL */
00130   } r4type;
00131 };
00132 #endif /* _LANGUAGE_C || _LANGUAGE_C_PLUS_PLUS */
00133 
00134 #define FMT_SINGLE  0
00135 #define FMT_DOUBLE  1
00136 #define FMT_EXTENDED  2
00137 #define FMT_QUAD  3
00138 #define FMT_WORD  4
00139 #define FMT_LONGWORD  5
00140 #define FMT_MAX   5
00141 
00142 #define FUNC_ADD  0
00143 #define FUNC_SUB  1
00144 #define FUNC_MUL  2
00145 #define FUNC_DIV  3
00146 
00147 #define FUNC_SQRT 4
00148 #define FUNC_ABS  5
00149 #define FUNC_MOV  6
00150 #define FUNC_NEG  7
00151 
00152 #define FUNC_ROUNDL 0x08
00153 #define FUNC_TRUNCL 0x09
00154 #define FUNC_CEILL  0x0a
00155 #define FUNC_FLOORL 0x0b
00156 
00157 #define FUNC_ROUND  0x0c
00158 #define FUNC_TRUNC  0x0d
00159 #define FUNC_CEIL 0x0e
00160 #define FUNC_FLOOR  0x0f
00161 
00162 #define FUNC_RECIP  0x15
00163 #define FUNC_RSQRT  0x16
00164 
00165 #define FUNC_CVTS 0x20
00166 #define FUNC_CVTD 0x21
00167 #define FUNC_CVTE 0x22
00168 #define FUNC_CVTQ 0x23
00169 #define FUNC_CVTW 0x24
00170 #define FUNC_CVTL 0x25
00171 
00172 /*
00173  * op codes for madd, msub, nmadd, nmsub; notice that these are
00174  * the same as some of the other floating point op codes, however
00175  * they are COP1X functions.  To distinguish them in code, do
00176  * something like adding 64 to the op code.  Then you can do
00177  * a switch statement with cases like
00178  * case FUNC_MADD+64:
00179  */
00180 
00181 #define FUNC_MADD 0x4
00182 #define FUNC_MSUB 0x5
00183 #define FUNC_NMADD  0x6
00184 #define FUNC_NMSUB  0x7
00185 
00186 /*
00187  * The func field of floating-point compare opcodes are FUNC_FC with
00188  * some combination of conditions (COND_*).
00189  */
00190 #define FUNC_FC   0x30
00191 #define COND_UN_MASK  0x1
00192 #define COND_EQ_MASK  0x2
00193 #define COND_LT_MASK  0x4
00194 #define COND_IN_MASK  0x8
00195 
00196 /*
00197  * The _MASK's are used to get a the specified field after it has been
00198  * shifted by _SHIFT and then bit patterns above can be used to test
00199  * the field.  These are useful in assembly code.
00200  */
00201 #define FPU_BASE_SHIFT  21
00202 #define FPU_BASE_MASK 0x1f
00203 #define FPU_FMT_SHIFT 21
00204 #define FPU_FMT_MASK  0xf
00205 #define FPU_RT_SHIFT  16
00206 #define FPU_RT_MASK 0x1f
00207 #define FPU_RT_FPRMASK  0x1e
00208 #define FPU_RS_SHIFT  11
00209 #define FPU_RS_MASK 0x1f
00210 #define FPU_RS_FPRMASK  0x1e
00211 #define FPU_RD_SHIFT  6
00212 #define FPU_RD_MASK 0x1f
00213 #define FPU_RD_FPRMASK  0x1e
00214 
00215 #if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
00216 /*
00217  * These functions are used to get and set the floating-point control
00218  * registers.  They are defined in the library module fp_control.s
00219  */
00220 extern unsigned int get_fpc_csr(void);
00221 extern unsigned int set_fpc_csr(unsigned int);
00222 extern unsigned int get_fpc_irr(void);
00223 extern unsigned int get_fpc_eir(void);
00224 
00225 /*
00226  * Structure and constant definisions for the floating-point control
00227  * implementation and revision register (fpc_irr).
00228  */
00229 union fpc_irr {
00230   unsigned int fi_word;
00231   struct {
00232 #ifdef _MIPSEB
00233     unsigned reserved : 16;
00234     unsigned implementation : 8;
00235     unsigned revision : 8;
00236 #endif /* _MIPSEB */
00237 #ifdef _MIPSEL
00238     unsigned revision : 8;
00239     unsigned implementation : 8;
00240     unsigned reserved : 16;
00241 #endif /* _MIPSEL */
00242   } fi_struct;
00243 };
00244 #endif /* _LANGUAGE_C || _LANGUAGE_C_PLUS_PLUS */
00245 
00246 /*
00247  * Constants for the implementation fieid of the fpc_irr structure for the
00248  * known implementations.
00249  */
00250 #define IMPLEMENTATION_NONE 0 /* software */
00251 #define IMPLEMENTATION_R2360  1 /* board */
00252 #define IMPLEMENTATION_R2010  2 /* chip */
00253 
00254 /*
00255  * The constant IRR_IMP_MASK is to get at the implementation fieid of the
00256  * implementation and revision register.  The other constants (IRR_IMP_*)
00257  * are constants for the known implementations.
00258  */
00259 #define IRR_IMP_MASK    0x0000ff00
00260 
00261 #define IRR_IMP_NONE    0x00000000
00262 #define IRR_IMP_R2360   0x00000100
00263 #define IRR_IMP_R2010   0x00000200
00264 
00265 /*
00266  * Structure and constant definisions for the floating-point control
00267  * control and status register (fpc_csr).
00268  */
00269 #if defined(_LANGUAGE_C) || defined(_LANGUAGE_C_PLUS_PLUS)
00270 union fpc_csr {
00271   unsigned int fc_word;
00272   struct {
00273 #ifdef _MIPSEB
00274     unsigned fcc : 7; /* only used for mips4 */
00275     unsigned flush : 1;
00276     unsigned condition : 1;
00277     unsigned reserved1 : 5;
00278 
00279     unsigned ex_unimplemented : 1;
00280     unsigned ex_invalid : 1;
00281     unsigned ex_divide0 : 1;
00282     unsigned ex_overflow : 1;
00283     unsigned ex_underflow : 1;
00284     unsigned ex_inexact : 1;
00285 
00286     unsigned en_invalid : 1;
00287     unsigned en_divide0 : 1;
00288     unsigned en_overflow : 1;
00289     unsigned en_underflow : 1;
00290     unsigned en_inexact : 1;
00291 
00292     unsigned se_invalid : 1;
00293     unsigned se_divide0 : 1;
00294     unsigned se_overflow : 1;
00295     unsigned se_underflow : 1;
00296     unsigned se_inexact : 1;
00297 
00298     unsigned rounding_mode : 2;
00299 #endif /* _MIPSEB */
00300 #ifdef _MIPSEL
00301     unsigned rounding_mode : 2;
00302 
00303     unsigned se_inexact : 1;
00304     unsigned se_underflow : 1;
00305     unsigned se_overflow : 1;
00306     unsigned se_divide0 : 1;
00307     unsigned se_invalid : 1;
00308 
00309     unsigned en_inexact : 1;
00310     unsigned en_underflow : 1;
00311     unsigned en_overflow : 1;
00312     unsigned en_divide0 : 1;
00313     unsigned en_invalid : 1;
00314 
00315     unsigned ex_inexact : 1;
00316     unsigned ex_underflow : 1;
00317     unsigned ex_overflow : 1;
00318     unsigned ex_divide0 : 1;
00319     unsigned ex_invalid : 1;
00320     unsigned ex_unimplemented : 1;
00321 
00322     unsigned reserved1 : 5;
00323     unsigned condition : 1;
00324     unsigned flush : 1;
00325     unsigned fcc : 7; /* only used for mips4 */
00326 #endif /* _MIPSEL */
00327   } fc_struct;
00328 };
00329 #endif /* _LANGUAGE_C || _LANGUAGE_C_PLUS_PLUS */
00330 
00331 /*
00332  * Constants for the rounding_mode field of the fpc_csr
00333  */
00334 #define ROUND_TO_NEAREST  0
00335 #define ROUND_TO_ZERO   1
00336 #define ROUND_TO_PLUS_INFINITY  2
00337 #define ROUND_TO_MINUS_INFINITY 3
00338 
00339 /* Masks to get at the unimplemented exception */
00340 #define FPCSR_FLUSH_ZERO  0x01000000
00341 #define FPCSR_UNIMP   0x00020000
00342 #define FPCSR_EXCEPTIONS  0x0003f000  /* all exceptions */
00343 #define FPCSR_ENABLES   0x00000f80
00344 #define FPCSR_FLAGS   0x0000007c
00345 
00346 #ifdef _LANGUAGE_ASSEMBLY
00347 /*
00348  * Assembly register names for the floating-point control registers.
00349  */
00350 #define fpc_irr $0
00351 #define fpc_csr $31
00352 
00353 #endif /* _LANGUAGE_ASSEMBLY */
00354 
00355 #ifdef __cplusplus
00356 }
00357 #endif
00358 #endif /* __SYS_FPU_H__ */