osprey-gcc-4.2.0/gcc/config/mt/mt.h File Reference

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Data Types
type	mt_frame_info
Defines
#define	OPTION_DEFAULT_SPECS   {"arch", "%{!march=*:-march=%(VALUE)}" }
#define	ASM_SPEC   "%{march=*} %{!march=*: -march=ms1-16-002}"
#define	LIB_SPEC   "--start-group -lc -lsim --end-group \%{msim: ; \march=ms1-64-001:-T 64-001.ld%s; \march=ms1-16-002:-T 16-002.ld%s; \march=ms1-16-003:-T 16-003.ld%s; \march=ms2:-T ms2.ld%s; \ :-T 16-002.ld}"
#define	STARTFILE_SPEC   "%{msim:crt0.o%s;\march=ms1-64-001:%{!mno-crt0:crt0-64-001.o%s} startup-64-001.o%s; \march=ms1-16-002:%{!mno-crt0:crt0-16-002.o%s} startup-16-002.o%s; \march=ms1-16-003:%{!mno-crt0:crt0-16-003.o%s} startup-16-003.o%s; \march=ms2:%{!mno-crt0:crt0-ms2.o%s} startup-ms2.o%s; \ :%{!mno-crt0:crt0-16-002.o%s} startup-16-002.o%s} \crti.o%s crtbegin.o%s"
#define	ENDFILE_SPEC   "%{msim:exit.o%s; \march=ms1-64-001:exit-64-001.o%s; \march=ms1-16-002:exit-16-002.o%s; \march=ms1-16-003:exit-16-003.o%s; \march=ms2:exit-ms2.o%s; \ :exit-16-002.o%s} \ crtend.o%s crtn.o%s"
#define	TARGET_CPU_CPP_BUILTINS()
#define	TARGET_MS1_64_001   (mt_cpu == PROCESSOR_MS1_64_001)
#define	TARGET_MS1_16_002   (mt_cpu == PROCESSOR_MS1_16_002)
#define	TARGET_MS1_16_003   (mt_cpu == PROCESSOR_MS1_16_003)
#define	TARGET_MS2   (mt_cpu == PROCESSOR_MS2)
#define	TARGET_VERSION   fprintf (stderr, " (mt)");
#define	OVERRIDE_OPTIONS   mt_override_options ()
#define	CAN_DEBUG_WITHOUT_FP   1
#define	BITS_BIG_ENDIAN   0
#define	BYTES_BIG_ENDIAN   1
#define	WORDS_BIG_ENDIAN   1
#define	UNITS_PER_WORD   4
#define	PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)
#define	PARM_BOUNDARY   32
#define	STACK_BOUNDARY   32
#define	FUNCTION_BOUNDARY   32
#define	BIGGEST_ALIGNMENT   32
#define	DATA_ALIGNMENT(TYPE, ALIGN)
#define	CONSTANT_ALIGNMENT(EXP, ALIGN)
#define	STRUCTURE_SIZE_BOUNDARY   32
#define	STRICT_ALIGNMENT   1
#define	PCC_BITFIELD_TYPE_MATTERS   1
#define	INT_TYPE_SIZE   32
#define	SHORT_TYPE_SIZE   16
#define	LONG_TYPE_SIZE   32
#define	LONG_LONG_TYPE_SIZE   64
#define	CHAR_TYPE_SIZE   8
#define	FLOAT_TYPE_SIZE   32
#define	DOUBLE_TYPE_SIZE   64
#define	LONG_DOUBLE_TYPE_SIZE   64
#define	DEFAULT_SIGNED_CHAR   1
#define	GPR_FIRST   0
#define	GPR_LAST   15
#define	GPR_R0   0
#define	GPR_R7   7
#define	GPR_R8   8
#define	GPR_R9   9
#define	GPR_R10   10
#define	GPR_R11   11
#define	GPR_FP   12
#define	GPR_SP   13
#define	GPR_LINK   14
#define	GPR_INTERRUPT_LINK   15
#define	LOOP_FIRST   (GPR_LAST + 1)
#define	LOOP_LAST   (LOOP_FIRST + 3)
#define	SPECIAL_REG_FIRST   (LOOP_LAST + 1)
#define	SPECIAL_REG_LAST   (SPECIAL_REG_FIRST)
#define	ARG_POINTER_REGNUM   (SPECIAL_REG_FIRST + 0)
#define	SPECIAL_REG_P(R)   ((R) == SPECIAL_REG_FIRST)
#define	FIRST_ARG_REGNUM   1
#define	LAST_ARG_REGNUM   4
#define	RETVAL_REGNUM   11
#define	FIRST_PSEUDO_REGISTER   (SPECIAL_REG_LAST + 1)
#define	IS_PSEUDO_P(R)   (REGNO (R) >= FIRST_PSEUDO_REGISTER)
#define	FIXED_REGISTERS
#define	CALL_USED_REGISTERS
#define	HARD_REGNO_NREGS(REGNO, MODE)   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
#define	HARD_REGNO_MODE_OK(REGNO, MODE)   1
#define	MODES_TIEABLE_P(MODE1, MODE2)   1
#define	GENERAL_REGS   ALL_REGS
#define	N_REG_CLASSES   ((int) LIM_REG_CLASSES)
#define	REG_CLASS_NAMES   {"NO_REGS", "ALL_REGS" }
#define	REG_CLASS_CONTENTS
#define	REGNO_REG_CLASS(REGNO)   GENERAL_REGS
#define	BASE_REG_CLASS   GENERAL_REGS
#define	INDEX_REG_CLASS   NO_REGS
#define	REG_CLASS_FROM_LETTER(CHAR)   NO_REGS
#define	REGNO_OK_FOR_BASE_P(NUM)   1
#define	REGNO_OK_FOR_INDEX_P(NUM)   1
#define	PREFERRED_RELOAD_CLASS(X, CLASS)   (CLASS)
#define	SECONDARY_RELOAD_CLASS(CLASS, MODE, X)   mt_secondary_reload_class((CLASS), (MODE), (X))
#define	CLASS_MAX_NREGS(CLASS, MODE)   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
#define	SMALL_INT(X)   ((unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
#define	SMALL_INT_UNSIGNED(X)   ((unsigned HOST_WIDE_INT) (INTVAL (X)) < 0x10000)
#define	CONST_OK_FOR_LETTER_P(VALUE, C)
#define	CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C)   0
#define	MT_MIN_INT   0x80000000
#define	MUST_SAVE_REGISTER(regno)
#define	STACK_GROWS_DOWNWARD   1
#define	STARTING_FRAME_OFFSET   current_function_outgoing_args_size
#define	FIRST_PARM_OFFSET(FUNDECL)   0
#define	RETURN_ADDR_RTX(COUNT, FRAMEADDR)   mt_return_addr_rtx (COUNT)
#define	INCOMING_RETURN_ADDR_RTX   gen_rtx_REG (SImode, GPR_LINK)
#define	INCOMING_FRAME_SP_OFFSET   0
#define	STACK_POINTER_REGNUM   GPR_SP
#define	FRAME_POINTER_REGNUM   GPR_FP
#define	ARG_POINTER_REGNUM   (SPECIAL_REG_FIRST + 0)
#define	STATIC_CHAIN_REGNUM   10
#define	FRAME_POINTER_REQUIRED   0
#define	ELIMINABLE_REGS
#define	CAN_ELIMINATE(FROM, TO)
#define	INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)   (OFFSET) = mt_initial_elimination_offset (FROM, TO)
#define	ACCUMULATE_OUTGOING_ARGS   1
#define	OUTGOING_REG_PARM_STACK_SPACE
#define	MT_NUM_ARG_REGS   4
#define	REG_PARM_STACK_SPACE(FNDECL)   (MT_NUM_ARG_REGS * UNITS_PER_WORD)
#define	STACK_PARMS_IN_REG_PARM_AREA
#define	RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE)   0
#define	FUNCTION_ARG(CUM, MODE, TYPE, NAMED)   mt_function_arg (& (CUM), (MODE), (TYPE), (NAMED), FALSE)
#define	CUMULATIVE_ARGS   int
#define	INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS)   mt_init_cumulative_args (& (CUM), FNTYPE, LIBNAME, FNDECL, FALSE)
#define	FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)   mt_function_arg_advance (&CUM, MODE, TYPE, NAMED)
#define	FUNCTION_ARG_BOUNDARY(MODE, TYPE)   mt_function_arg_boundary (MODE, TYPE)
#define	FUNCTION_ARG_REGNO_P(REGNO)   ((REGNO) >= FIRST_ARG_REGNUM && ((REGNO) <= LAST_ARG_REGNUM))
#define	RETURN_VALUE_REGNUM   RETVAL_REGNUM
#define	FUNCTION_VALUE(VALTYPE, FUNC)   mt_function_value (VALTYPE, TYPE_MODE(VALTYPE), FUNC)
#define	LIBCALL_VALUE(MODE)   mt_function_value (NULL_TREE, MODE, NULL_TREE)
#define	FUNCTION_VALUE_REGNO_P(REGNO)   ((REGNO) == RETURN_VALUE_REGNUM)
#define	RETURN_IN_MEMORY(TYPE)   (int_size_in_bytes (TYPE) > UNITS_PER_WORD)
#define	DEFAULT_PCC_STRUCT_RETURN   0
#define	EXIT_IGNORE_STACK   1
#define	EPILOGUE_USES(REGNO)   mt_epilogue_uses(REGNO)
#define	DELAY_SLOTS_FOR_EPILOGUE   1
#define	ELIGIBLE_FOR_EPILOGUE_DELAY(INSN, N)   0
#define	FUNCTION_PROFILER(FILE, LABELNO)   gcc_unreachable ()
#define	TRAMPOLINE_SIZE   0
#define	INITIALIZE_TRAMPOLINE(ADDR, FNADDR, STATIC_CHAIN)
#define	UCMPSI3_LIBCALL   "__ucmpsi3"
#define	CONSTANT_ADDRESS_P(X)   CONSTANT_P (X)
#define	MAX_REGS_PER_ADDRESS   1
#define	GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)
#define	REG_OK_FOR_BASE_P(X)   mt_reg_ok_for_base_p (X, 0)
#define	REG_OK_FOR_INDEX_P(X)   REG_OK_FOR_BASE_P (X)
#define	LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)   {}
#define	GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
#define	LEGITIMATE_CONSTANT_P(X)   1
#define	MEMORY_MOVE_COST(M, C, I)   10
#define	SLOW_BYTE_ACCESS   1
#define	SLOW_UNALIGNED_ACCESS(MODE, ALIGN)   1
#define	TEXT_SECTION_ASM_OP   ".text"
#define	DATA_SECTION_ASM_OP   ".data"
#define	BSS_SECTION_ASM_OP   "\t.section\t.bss"
#define	ASM_APP_ON   "#APP\n"
#define	ASM_APP_OFF   "#NO_APP\n"
#define	ASM_OUTPUT_CHAR(FILE, VALUE)
#define	ASM_OUTPUT_SHORT(FILE, VALUE)
#define	ASM_OUTPUT_INT(FILE, VALUE)
#define	ASM_OUTPUT_BYTE(STREAM, VALUE)   fprintf (STREAM, "\t%s\t0x%x\n", ASM_BYTE_OP, (VALUE))
#define	GLOBAL_ASM_OP   "\t.globl "
#define	REGISTER_NAMES
#define	ADDITIONAL_REGISTER_NAMES   { { "FP", 12}, {"SP", 13}, {"RA", 14}, {"IRA", 15} }
#define	ASM_OUTPUT_OPCODE(STREAM, PTR)   (PTR) = mt_asm_output_opcode (STREAM, PTR)
#define	FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS)   mt_final_prescan_insn (INSN, OPVEC, NOPERANDS)
#define	PRINT_OPERAND(STREAM, X, CODE)   mt_print_operand (STREAM, X, CODE)
#define	PRINT_OPERAND_PUNCT_VALID_P(CODE)   ((CODE) == '#')
#define	PRINT_OPERAND_ADDRESS(STREAM, X)   mt_print_operand_address (STREAM, X)
#define	REGISTER_PREFIX   "%"
#define	LOCAL_LABEL_PREFIX   "."
#define	USER_LABEL_PREFIX   ""
#define	IMMEDIATE_PREFIX   ""
#define	ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL)   fprintf (STREAM, "\t.word .L%d-.L%d\n", VALUE, REL)
#define	ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)   fprintf (STREAM, "\t.word .L%d\n", VALUE)
#define	DWARF_FRAME_RETURN_COLUMN   DWARF_FRAME_REGNUM (GPR_LINK)
#define	EH_RETURN_DATA_REGNO(N)   ((N) == 0 ? GPR_R7 : (N) == 1 ? GPR_R8 : INVALID_REGNUM)
#define	EH_RETURN_STACKADJ_REGNO   GPR_R11
#define	EH_RETURN_STACKADJ_RTX   gen_rtx_REG (SImode, EH_RETURN_STACKADJ_REGNO)
#define	EH_RETURN_HANDLER_REGNO   GPR_R10
#define	EH_RETURN_HANDLER_RTX   gen_rtx_REG (SImode, EH_RETURN_HANDLER_REGNO)
#define	ASM_OUTPUT_ALIGN(STREAM, POWER)   fprintf ((STREAM), "\t.p2align %d\n", (POWER))
#define	PREFERRED_DEBUGGING_TYPE   DWARF2_DEBUG
#define	DWARF2_ASM_LINE_DEBUG_INFO   1
#define	CASE_VECTOR_MODE   SImode
#define	WORD_REGISTER_OPERATIONS
#define	MOVE_MAX   4
#define	TRULY_NOOP_TRUNCATION(OUTPREC, INPREC)   1
#define	Pmode   SImode
#define	FUNCTION_MODE   QImode
#define	HANDLE_SYSV_PRAGMA   1
#define	ISSUE_RATE   1
Enumerations
enum	processor_type {   PROCESSOR_EV4, PROCESSOR_EV5, PROCESSOR_EV6, PROCESSOR_I386,   PROCESSOR_I486, PROCESSOR_PENTIUM, PROCESSOR_PENTIUMPRO, PROCESSOR_K6,   PROCESSOR_ATHLON, PROCESSOR_PENTIUM4, PROCESSOR_max, PROCESSOR_M88100,   PROCESSOR_M88110, PROCESSOR_M88000, PROCESSOR_700, PROCESSOR_7100,   PROCESSOR_7100LC, PROCESSOR_7200, PROCESSOR_8000, PROCESSOR_RIOS1,   PROCESSOR_RIOS2, PROCESSOR_RS64A, PROCESSOR_MPCCORE, PROCESSOR_PPC403,   PROCESSOR_PPC405, PROCESSOR_PPC601, PROCESSOR_PPC603, PROCESSOR_PPC604,   PROCESSOR_PPC604e, PROCESSOR_PPC620, PROCESSOR_PPC630, PROCESSOR_PPC750,   PROCESSOR_PPC7400, PROCESSOR_PPC7450, PROCESSOR_SH1, PROCESSOR_SH2,   PROCESSOR_SH3, PROCESSOR_SH3E, PROCESSOR_SH4, PROCESSOR_SH5,   PROCESSOR_DEFAULT, PROCESSOR_R3000, PROCESSOR_R3900, PROCESSOR_R6000,   PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111, PROCESSOR_R4120,   PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650, PROCESSOR_R5000,   PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R8000, PROCESSOR_R4KC,   PROCESSOR_R5KC, PROCESSOR_R20KC, PROCESSOR_SR71000, PROCESSOR_SB1,   PROCESSOR_V7, PROCESSOR_CYPRESS, PROCESSOR_V8, PROCESSOR_SUPERSPARC,   PROCESSOR_SPARCLITE, PROCESSOR_F930, PROCESSOR_F934, PROCESSOR_HYPERSPARC,   PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET, PROCESSOR_TSC701, PROCESSOR_V9,   PROCESSOR_ULTRASPARC, PROCESSOR_DEFAULT, PROCESSOR_R3000, PROCESSOR_R3900,   PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111,   PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650,   PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R8000,   PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC, PROCESSOR_SR71000,   PROCESSOR_SB1, PROCESSOR_DEFAULT, PROCESSOR_R3000, PROCESSOR_R3900,   PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111,   PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650,   PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R8000,   PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC, PROCESSOR_SR71000,   PROCESSOR_SB1, PROCESSOR_EV4, PROCESSOR_EV5, PROCESSOR_EV6,   PROCESSOR_I386, PROCESSOR_I486, PROCESSOR_PENTIUM, PROCESSOR_PENTIUMPRO,   PROCESSOR_K6, PROCESSOR_ATHLON, PROCESSOR_PENTIUM4, PROCESSOR_max,   PROCESSOR_M88100, PROCESSOR_M88110, PROCESSOR_M88000, PROCESSOR_700,   PROCESSOR_7100, PROCESSOR_7100LC, PROCESSOR_7200, PROCESSOR_8000,   PROCESSOR_RIOS1, PROCESSOR_RIOS2, PROCESSOR_RS64A, PROCESSOR_MPCCORE,   PROCESSOR_PPC403, PROCESSOR_PPC405, PROCESSOR_PPC601, PROCESSOR_PPC603,   PROCESSOR_PPC604, PROCESSOR_PPC604e, PROCESSOR_PPC620, PROCESSOR_PPC630,   PROCESSOR_PPC750, PROCESSOR_PPC7400, PROCESSOR_PPC7450, PROCESSOR_SH1,   PROCESSOR_SH2, PROCESSOR_SH3, PROCESSOR_SH3E, PROCESSOR_SH4,   PROCESSOR_SH5, PROCESSOR_DEFAULT, PROCESSOR_R3000, PROCESSOR_R3900,   PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111,   PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650,   PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R8000,   PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC, PROCESSOR_SR71000,   PROCESSOR_SB1, PROCESSOR_V7, PROCESSOR_CYPRESS, PROCESSOR_V8,   PROCESSOR_SUPERSPARC, PROCESSOR_SPARCLITE, PROCESSOR_F930, PROCESSOR_F934,   PROCESSOR_HYPERSPARC, PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET, PROCESSOR_TSC701,   PROCESSOR_V9, PROCESSOR_ULTRASPARC, PROCESSOR_DEFAULT, PROCESSOR_R3000,   PROCESSOR_R3900, PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100,   PROCESSOR_R4111, PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600,   PROCESSOR_R4650, PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500,   PROCESSOR_R8000, PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC,   PROCESSOR_SR71000, PROCESSOR_SB1, PROCESSOR_DEFAULT, PROCESSOR_R3000,   PROCESSOR_R3900, PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100,   PROCESSOR_R4111, PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600,   PROCESSOR_R4650, PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500,   PROCESSOR_R8000, PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC,   PROCESSOR_SR71000, PROCESSOR_SB1, PROCESSOR_EV4, PROCESSOR_EV5,   PROCESSOR_EV6, PROCESSOR_MAX, ARM_CORE, PROCESSOR_I386,   PROCESSOR_I486, PROCESSOR_PENTIUM, PROCESSOR_PENTIUMPRO, PROCESSOR_K6,   PROCESSOR_ATHLON, PROCESSOR_PENTIUM4, PROCESSOR_K8, PROCESSOR_NOCONA,   PROCESSOR_max, PROCESSOR_ITANIUM, PROCESSOR_ITANIUM2, PROCESSOR_max,   PROCESSOR_DEFAULT, PROCESSOR_IQ2000, PROCESSOR_IQ10, PROCESSOR_DEFAULT,   PROCESSOR_4KC, PROCESSOR_5KC, PROCESSOR_20KC, PROCESSOR_M4K,   PROCESSOR_R3000, PROCESSOR_R3900, PROCESSOR_R6000, PROCESSOR_R4000,   PROCESSOR_R4100, PROCESSOR_R4111, PROCESSOR_R4120, PROCESSOR_R4130,   PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650, PROCESSOR_R5000,   PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R7000, PROCESSOR_R8000,   PROCESSOR_R9000, PROCESSOR_SB1, PROCESSOR_SR71000, PROCESSOR_700,   PROCESSOR_7100, PROCESSOR_7100LC, PROCESSOR_7200, PROCESSOR_7300,   PROCESSOR_8000, PROCESSOR_RIOS1, PROCESSOR_RIOS2, PROCESSOR_RS64A,   PROCESSOR_MPCCORE, PROCESSOR_PPC403, PROCESSOR_PPC405, PROCESSOR_PPC440,   PROCESSOR_PPC601, PROCESSOR_PPC603, PROCESSOR_PPC604, PROCESSOR_PPC604e,   PROCESSOR_PPC620, PROCESSOR_PPC630, PROCESSOR_PPC750, PROCESSOR_PPC7400,   PROCESSOR_PPC7450, PROCESSOR_PPC8540, PROCESSOR_POWER4, PROCESSOR_POWER5,   PROCESSOR_9672_G5, PROCESSOR_9672_G6, PROCESSOR_2064_Z900, PROCESSOR_2084_Z990,   PROCESSOR_max, PROCESSOR_SH1, PROCESSOR_SH2, PROCESSOR_SH2E,   PROCESSOR_SH2A, PROCESSOR_SH3, PROCESSOR_SH3E, PROCESSOR_SH4,   PROCESSOR_SH4A, PROCESSOR_SH5, PROCESSOR_V7, PROCESSOR_CYPRESS,   PROCESSOR_V8, PROCESSOR_SUPERSPARC, PROCESSOR_SPARCLITE, PROCESSOR_F930,   PROCESSOR_F934, PROCESSOR_HYPERSPARC, PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET,   PROCESSOR_TSC701, PROCESSOR_V9, PROCESSOR_ULTRASPARC, PROCESSOR_ULTRASPARC3,   PROCESSOR_EV4, PROCESSOR_EV5, PROCESSOR_EV6, PROCESSOR_MAX,   ARM_CORE, PROCESSOR_I386, PROCESSOR_I486, PROCESSOR_PENTIUM,   PROCESSOR_PENTIUMPRO, PROCESSOR_K6, PROCESSOR_ATHLON, PROCESSOR_PENTIUM4,   PROCESSOR_K8, PROCESSOR_NOCONA, PROCESSOR_GENERIC32, PROCESSOR_GENERIC64,   PROCESSOR_AMDFAM10, PROCESSOR_max, PROCESSOR_ITANIUM, PROCESSOR_ITANIUM2,   PROCESSOR_max, PROCESSOR_DEFAULT, PROCESSOR_IQ2000, PROCESSOR_IQ10,   PROCESSOR_R3000, PROCESSOR_4KC, PROCESSOR_4KP, PROCESSOR_5KC,   PROCESSOR_5KF, PROCESSOR_20KC, PROCESSOR_24K, PROCESSOR_24KX,   PROCESSOR_M4K, PROCESSOR_R3900, PROCESSOR_R6000, PROCESSOR_R4000,   PROCESSOR_R4100, PROCESSOR_R4111, PROCESSOR_R4120, PROCESSOR_R4130,   PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650, PROCESSOR_R5000,   PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R7000, PROCESSOR_R8000,   PROCESSOR_R9000, PROCESSOR_SB1, PROCESSOR_SB1A, PROCESSOR_SR71000,   PROCESSOR_MAX, PROCESSOR_MN10300, PROCESSOR_AM33, PROCESSOR_AM33_2,   PROCESSOR_MS1_64_001, PROCESSOR_MS1_16_002, PROCESSOR_MS1_16_003, PROCESSOR_MS2,   PROCESSOR_700, PROCESSOR_7100, PROCESSOR_7100LC, PROCESSOR_7200,   PROCESSOR_7300, PROCESSOR_8000, PROCESSOR_RIOS1, PROCESSOR_RIOS2,   PROCESSOR_RS64A, PROCESSOR_MPCCORE, PROCESSOR_PPC403, PROCESSOR_PPC405,   PROCESSOR_PPC440, PROCESSOR_PPC601, PROCESSOR_PPC603, PROCESSOR_PPC604,   PROCESSOR_PPC604e, PROCESSOR_PPC620, PROCESSOR_PPC630, PROCESSOR_PPC750,   PROCESSOR_PPC7400, PROCESSOR_PPC7450, PROCESSOR_PPC8540, PROCESSOR_POWER4,   PROCESSOR_POWER5, PROCESSOR_9672_G5, PROCESSOR_9672_G6, PROCESSOR_2064_Z900,   PROCESSOR_2084_Z990, PROCESSOR_2094_Z9_109, PROCESSOR_max, PROCESSOR_SH1,   PROCESSOR_SH2, PROCESSOR_SH2E, PROCESSOR_SH2A, PROCESSOR_SH3,   PROCESSOR_SH3E, PROCESSOR_SH4, PROCESSOR_SH4A, PROCESSOR_SH5,   PROCESSOR_V7, PROCESSOR_CYPRESS, PROCESSOR_V8, PROCESSOR_SUPERSPARC,   PROCESSOR_SPARCLITE, PROCESSOR_F930, PROCESSOR_F934, PROCESSOR_HYPERSPARC,   PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET, PROCESSOR_TSC701, PROCESSOR_V9,   PROCESSOR_ULTRASPARC, PROCESSOR_ULTRASPARC3, PROCESSOR_NIAGARA }
enum	epilogue_type { EH_EPILOGUE, NORMAL_EPILOGUE }
enum	reg_class {   NO_REGS, R2, R0_1, INDEX_REGS,   BASE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   LR0_REGS, GENERAL_REGS, BP_REGS, FC_REGS,   CR_REGS, Q_REGS, SPECIAL_REGS, ACCUM0_REGS,   ACCUM_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, R24_REG, R25_REG, R27_REG,   GENERAL_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, LPCOUNT_REG, GENERAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, FPU_REGS, LO_REGS,   STACK_REG, BASE_REGS, HI_REGS, CC_REG,   GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   R0_REG, POINTER_X_REGS, POINTER_Y_REGS, POINTER_Z_REGS,   STACK_REG, BASE_POINTER_REGS, POINTER_REGS, ADDW_REGS,   SIMPLE_LD_REGS, LD_REGS, NO_LD_REGS, GENERAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0R1_REGS,   R2R3_REGS, EXT_LOW_REGS, EXT_REGS, ADDR_REGS,   INDEX_REGS, BK_REG, SP_REG, RC_REG,   COUNTER_REGS, INT_REGS, GENERAL_REGS, DP_REG,   ST_REG, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   GENERAL_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, S_REGS, INDEX_REGS, SP_REGS,   A_REGS, SI_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   REPEAT_REGS, CR_REGS, ACCUM_REGS, OTHER_FLAG_REGS,   F0_REGS, F1_REGS, BR_FLAG_REGS, FLAG_REGS,   EVEN_REGS, GPR_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, A0H_REG, A0L_REG, A0_REG,   A1H_REG, ACCUM_HIGH_REGS, A1L_REG, ACCUM_LOW_REGS,   A1_REG, ACCUM_REGS, X_REG, X_OR_ACCUM_LOW_REGS,   X_OR_ACCUM_REGS, YH_REG, YH_OR_ACCUM_HIGH_REGS, X_OR_YH_REGS,   YL_REG, YL_OR_ACCUM_LOW_REGS, X_OR_YL_REGS, X_OR_Y_REGS,   Y_REG, ACCUM_OR_Y_REGS, PH_REG, X_OR_PH_REGS,   PL_REG, PL_OR_ACCUM_LOW_REGS, X_OR_PL_REGS, YL_OR_PL_OR_ACCUM_LOW_REGS,   P_REG, ACCUM_OR_P_REGS, YL_OR_P_REGS, ACCUM_LOW_OR_YL_OR_P_REGS,   Y_OR_P_REGS, ACCUM_Y_OR_P_REGS, NO_FRAME_Y_ADDR_REGS, Y_ADDR_REGS,   ACCUM_LOW_OR_Y_ADDR_REGS, ACCUM_OR_Y_ADDR_REGS, X_OR_Y_ADDR_REGS, Y_OR_Y_ADDR_REGS,   P_OR_Y_ADDR_REGS, NON_HIGH_YBASE_ELIGIBLE_REGS, YBASE_ELIGIBLE_REGS, J_REG,   J_OR_DAU_16_BIT_REGS, BMU_REGS, NOHIGH_NON_ADDR_REGS, NON_ADDR_REGS,   SLOW_MEM_LOAD_REGS, NOHIGH_NON_YBASE_REGS, NO_ACCUM_NON_YBASE_REGS, NON_YBASE_REGS,   YBASE_VIRT_REGS, ACCUM_LOW_OR_YBASE_REGS, ACCUM_OR_YBASE_REGS, X_OR_YBASE_REGS,   Y_OR_YBASE_REGS, ACCUM_LOW_YL_PL_OR_YBASE_REGS, P_OR_YBASE_REGS, ACCUM_Y_P_OR_YBASE_REGS,   Y_ADDR_OR_YBASE_REGS, YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS, YBASE_OR_YBASE_ELIGIBLE_REGS, NO_HIGH_ALL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG,   MULTIPLY_64_REG, LOW_REGS, HIGH_REGS, REAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,   MAC_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   ADDR_REGS, DATA_REGS, FP_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, AREG, DREG,   CREG, BREG, SIREG, DIREG,   AD_REGS, Q_REGS, NON_Q_REGS, INDEX_REGS,   LEGACY_REGS, GENERAL_REGS, FP_TOP_REG, FP_SECOND_REG,   FLOAT_REGS, SSE_REGS, MMX_REGS, FP_TOP_SSE_REGS,   FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS, INT_SSE_REGS,   FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, GLOBAL_REGS, LOCAL_REGS, LOCAL_OR_GLOBAL_REGS,   FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   PR_REGS, BR_REGS, AR_M_REGS, AR_I_REGS,   ADDL_REGS, GR_REGS, FR_REGS, GR_AND_BR_REGS,   GR_AND_FR_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   CARRY_REG, ACCUM_REGS, GENERAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, D_REGS, X_REGS,   Y_REGS, SP_REGS, DA_REGS, DB_REGS,   Z_REGS, D8_REGS, Q_REGS, D_OR_X_REGS,   D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS, A_REGS,   X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS, A_OR_D_REGS,   A_OR_SP_REGS, H_REGS, S_REGS, D_OR_S_REGS,   X_OR_S_REGS, Y_OR_S_REGS, SP_OR_S_REGS, D_OR_X_OR_S_REGS,   D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS, A_OR_S_REGS, D_OR_A_OR_S_REGS,   TMP_REGS, D_OR_A_OR_TMP_REGS, G_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, DATA_REGS, ADDR_REGS,   FP_REGS, GENERAL_REGS, DATA_OR_FP_REGS, ADDR_OR_FP_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, AP_REG,   XRF_REGS, GENERAL_REGS, AGRF_REGS, XGRF_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, ONLYR1_REGS,   LRW_REGS, GENERAL_REGS, C_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, REMAINDER_REG,   HIMULT_REG, SYSTEM_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, DATA_REGS, ADDRESS_REGS, GENERAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,   ADDRESS_REGS, SP_REGS, DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,   EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS,   SP_OR_ADDRESS_OR_EXTENDED_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, GENERAL_REGS, FLOAT_REG0, LONG_FLOAT_REG0,   FLOAT_REGS, FP_REGS, GEN_AND_FP_REGS, FRAME_POINTER_REG,   STACK_POINTER_REG, GEN_AND_MEM_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, R1_REGS, GENERAL_REGS, FPUPPER_REGS,   FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,   FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, MUL_REGS,   GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS, FPU_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, OUT_REGS,   STD_REGS, ARG_REGS, SRC_REGS, DST_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0_REGS,   R15_REGS, BASE_REGS, GENERAL_REGS, FP_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, BASE_REGS,   GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS, VRSAVE_REGS,   NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,   LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,   CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, ADDR_REGS, GENERAL_REGS,   FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R0_REGS, PR_REGS,   T_REGS, MAC_REGS, FPUL_REGS, SIBCALL_REGS,   GENERAL_REGS, FP0_REGS, FP_REGS, DF_REGS,   FPSCR_REGS, GENERAL_FP_REGS, TARGET_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, M16_NA_REGS, M16_REGS,   T_REG, M16_T_REGS, GR_REGS, FP_REGS,   HI_REG, LO_REG, HILO_REG, MD_REGS,   COP0_REGS, COP2_REGS, COP3_REGS, HI_AND_GR_REGS,   LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS,   COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS,   ST_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   FPCC_REGS, I64_REGS, GENERAL_REGS, FP_REGS,   EXTRA_FP_REGS, GENERAL_OR_FP_REGS, GENERAL_OR_EXTRA_FP_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R0_REGS, R1_REGS,   TWO_REGS, R2_REGS, EIGHT_REGS, R8_REGS,   ICALL_REGS, GENERAL_REGS, CARRY_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, BR_REGS, FP_REGS, ACC_REG,   SP_REG, RL_REGS, GR_REGS, AR_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,   M16_REGS, T_REG, M16_T_REGS, GR_REGS,   FP_REGS, HI_REG, LO_REG, HILO_REG,   MD_REGS, COP0_REGS, COP2_REGS, COP3_REGS,   HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS,   COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS,   ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, M16_NA_REGS, M16_REGS, T_REG,   M16_T_REGS, GR_REGS, FP_REGS, HI_REG,   LO_REG, HILO_REG, MD_REGS, COP0_REGS,   COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,   HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS,   COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, R2,   R0_1, INDEX_REGS, BASE_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, LR0_REGS, GENERAL_REGS,   BP_REGS, FC_REGS, CR_REGS, Q_REGS,   SPECIAL_REGS, ACCUM0_REGS, ACCUM_REGS, FLOAT_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, R24_REG,   R25_REG, R27_REG, GENERAL_REGS, FLOAT_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG,   GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   FPU_REGS, LO_REGS, STACK_REG, BASE_REGS,   HI_REGS, CC_REG, GENERAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R0_REG, POINTER_X_REGS,   POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG, BASE_POINTER_REGS,   POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS, LD_REGS,   NO_LD_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, R0R1_REGS, R2R3_REGS, EXT_LOW_REGS,   EXT_REGS, ADDR_REGS, INDEX_REGS, BK_REG,   SP_REG, RC_REG, COUNTER_REGS, INT_REGS,   GENERAL_REGS, DP_REG, ST_REG, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, FLOAT_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, S_REGS,   INDEX_REGS, SP_REGS, A_REGS, SI_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, REPEAT_REGS, CR_REGS,   ACCUM_REGS, OTHER_FLAG_REGS, F0_REGS, F1_REGS,   BR_FLAG_REGS, FLAG_REGS, EVEN_REGS, GPR_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, A0H_REG,   A0L_REG, A0_REG, A1H_REG, ACCUM_HIGH_REGS,   A1L_REG, ACCUM_LOW_REGS, A1_REG, ACCUM_REGS,   X_REG, X_OR_ACCUM_LOW_REGS, X_OR_ACCUM_REGS, YH_REG,   YH_OR_ACCUM_HIGH_REGS, X_OR_YH_REGS, YL_REG, YL_OR_ACCUM_LOW_REGS,   X_OR_YL_REGS, X_OR_Y_REGS, Y_REG, ACCUM_OR_Y_REGS,   PH_REG, X_OR_PH_REGS, PL_REG, PL_OR_ACCUM_LOW_REGS,   X_OR_PL_REGS, YL_OR_PL_OR_ACCUM_LOW_REGS, P_REG, ACCUM_OR_P_REGS,   YL_OR_P_REGS, ACCUM_LOW_OR_YL_OR_P_REGS, Y_OR_P_REGS, ACCUM_Y_OR_P_REGS,   NO_FRAME_Y_ADDR_REGS, Y_ADDR_REGS, ACCUM_LOW_OR_Y_ADDR_REGS, ACCUM_OR_Y_ADDR_REGS,   X_OR_Y_ADDR_REGS, Y_OR_Y_ADDR_REGS, P_OR_Y_ADDR_REGS, NON_HIGH_YBASE_ELIGIBLE_REGS,   YBASE_ELIGIBLE_REGS, J_REG, J_OR_DAU_16_BIT_REGS, BMU_REGS,   NOHIGH_NON_ADDR_REGS, NON_ADDR_REGS, SLOW_MEM_LOAD_REGS, NOHIGH_NON_YBASE_REGS,   NO_ACCUM_NON_YBASE_REGS, NON_YBASE_REGS, YBASE_VIRT_REGS, ACCUM_LOW_OR_YBASE_REGS,   ACCUM_OR_YBASE_REGS, X_OR_YBASE_REGS, Y_OR_YBASE_REGS, ACCUM_LOW_YL_PL_OR_YBASE_REGS,   P_OR_YBASE_REGS, ACCUM_Y_P_OR_YBASE_REGS, Y_ADDR_OR_YBASE_REGS, YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS,   YBASE_OR_YBASE_ELIGIBLE_REGS, NO_HIGH_ALL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, MULTIPLY_32_REG, MULTIPLY_64_REG, LOW_REGS,   HIGH_REGS, REAL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, GENERAL_REGS, MAC_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, ADDR_REGS, DATA_REGS,   FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   AREG, DREG, CREG, BREG,   SIREG, DIREG, AD_REGS, Q_REGS,   NON_Q_REGS, INDEX_REGS, LEGACY_REGS, GENERAL_REGS,   FP_TOP_REG, FP_SECOND_REG, FLOAT_REGS, SSE_REGS,   MMX_REGS, FP_TOP_SSE_REGS, FP_SECOND_SSE_REGS, FLOAT_SSE_REGS,   FLOAT_INT_REGS, INT_SSE_REGS, FLOAT_INT_SSE_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, FP_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, GLOBAL_REGS,   LOCAL_REGS, LOCAL_OR_GLOBAL_REGS, FP_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, PR_REGS, BR_REGS,   AR_M_REGS, AR_I_REGS, ADDL_REGS, GR_REGS,   FR_REGS, GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, CARRY_REG, ACCUM_REGS,   GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   D_REGS, X_REGS, Y_REGS, SP_REGS,   DA_REGS, DB_REGS, Z_REGS, D8_REGS,   Q_REGS, D_OR_X_REGS, D_OR_Y_REGS, D_OR_SP_REGS,   X_OR_Y_REGS, A_REGS, X_OR_SP_REGS, Y_OR_SP_REGS,   X_OR_Y_OR_D_REGS, A_OR_D_REGS, A_OR_SP_REGS, H_REGS,   S_REGS, D_OR_S_REGS, X_OR_S_REGS, Y_OR_S_REGS,   SP_OR_S_REGS, D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS,   A_OR_S_REGS, D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS,   G_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   DATA_REGS, ADDR_REGS, FP_REGS, GENERAL_REGS,   DATA_OR_FP_REGS, ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS,   AGRF_REGS, XGRF_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, ONLYR1_REGS, LRW_REGS, GENERAL_REGS,   C_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   GENERAL_REGS, REMAINDER_REG, HIMULT_REG, SYSTEM_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,   ADDRESS_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS,   DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS, EXTENDED_REGS, DATA_OR_EXTENDED_REGS,   ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS, GENERAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,   FLOAT_REG0, LONG_FLOAT_REG0, FLOAT_REGS, FP_REGS,   GEN_AND_FP_REGS, FRAME_POINTER_REG, STACK_POINTER_REG, GEN_AND_MEM_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,   GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,   SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   R1_REGS, GENERAL_REGS, FPUPPER_REGS, FP_REGS,   GENERAL_OR_FP_REGS, SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS,   NO_LOAD_FPU_REGS, FPU_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, OUT_REGS, STD_REGS, ARG_REGS,   SRC_REGS, DST_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, R0_REGS, R15_REGS, BASE_REGS,   GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, BASE_REGS, GENERAL_REGS, FLOAT_REGS,   ALTIVEC_REGS, VRSAVE_REGS, NON_SPECIAL_REGS, MQ_REGS,   LINK_REGS, CTR_REGS, LINK_OR_CTR_REGS, SPECIAL_REGS,   SPEC_OR_GEN_REGS, CR0_REGS, CR_REGS, NON_FLOAT_REGS,   XER_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   ADDR_REGS, GENERAL_REGS, FP_REGS, ADDR_FP_REGS,   GENERAL_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   R0_REGS, PR_REGS, T_REGS, MAC_REGS,   FPUL_REGS, SIBCALL_REGS, GENERAL_REGS, FP0_REGS,   FP_REGS, DF_REGS, FPSCR_REGS, GENERAL_FP_REGS,   TARGET_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   M16_NA_REGS, M16_REGS, T_REG, M16_T_REGS,   GR_REGS, FP_REGS, HI_REG, LO_REG,   HILO_REG, MD_REGS, COP0_REGS, COP2_REGS,   COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS,   HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,   ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, FPCC_REGS, I64_REGS,   GENERAL_REGS, FP_REGS, EXTRA_FP_REGS, GENERAL_OR_FP_REGS,   GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   R0_REGS, R1_REGS, TWO_REGS, R2_REGS,   EIGHT_REGS, R8_REGS, ICALL_REGS, GENERAL_REGS,   CARRY_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, BR_REGS,   FP_REGS, ACC_REG, SP_REG, RL_REGS,   GR_REGS, AR_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, M16_NA_REGS, M16_REGS, T_REG,   M16_T_REGS, GR_REGS, FP_REGS, HI_REG,   LO_REG, HILO_REG, MD_REGS, COP0_REGS,   COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,   HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS,   COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,   M16_REGS, T_REG, M16_T_REGS, GR_REGS,   FP_REGS, HI_REG, LO_REG, HILO_REG,   MD_REGS, COP0_REGS, COP2_REGS, COP3_REGS,   HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS,   COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS,   ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, R0_REG, R24_REG, R25_REG,   R27_REG, GENERAL_REGS, FLOAT_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG, GENERAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, FPA_REGS,   CIRRUS_REGS, VFP_REGS, IWMMXT_GR_REGS, IWMMXT_REGS,   LO_REGS, STACK_REG, BASE_REGS, HI_REGS,   CC_REG, VFPCC_REG, GENERAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R0_REG, POINTER_X_REGS,   POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG, BASE_POINTER_REGS,   POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS, LD_REGS,   NO_LD_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, IREGS, BREGS, LREGS,   MREGS, CIRCREGS, DAGREGS, EVEN_AREGS,   ODD_AREGS, AREGS, CCREGS, EVEN_DREGS,   ODD_DREGS, DREGS, PREGS_CLOBBERED, PREGS,   DPREGS, MOST_REGS, PROLOGUE_REGS, NON_A_CC_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0R1_REGS,   R2R3_REGS, EXT_LOW_REGS, EXT_REGS, ADDR_REGS,   INDEX_REGS, BK_REG, SP_REG, RC_REG,   COUNTER_REGS, INT_REGS, GENERAL_REGS, DP_REG,   ST_REG, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG,   MULTIPLY_64_REG, LOW_REGS, HIGH_REGS, REAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, ICC_REGS,   FCC_REGS, CC_REGS, ICR_REGS, FCR_REGS,   CR_REGS, LCR_REG, LR_REG, GR8_REGS,   GR9_REGS, GR89_REGS, FDPIC_REGS, FDPIC_FPTR_REGS,   FDPIC_CALL_REGS, SPR_REGS, QUAD_ACC_REGS, EVEN_ACC_REGS,   ACC_REGS, ACCG_REGS, QUAD_FPR_REGS, FEVEN_REGS,   FPR_REGS, QUAD_REGS, EVEN_REGS, GPR_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, COUNTER_REGS,   SOURCE_REGS, DESTINATION_REGS, GENERAL_REGS, MAC_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, AREG,   DREG, CREG, BREG, SIREG,   DIREG, AD_REGS, Q_REGS, NON_Q_REGS,   INDEX_REGS, LEGACY_REGS, GENERAL_REGS, FP_TOP_REG,   FP_SECOND_REG, FLOAT_REGS, SSE_REGS, MMX_REGS,   FP_TOP_SSE_REGS, FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS,   INT_SSE_REGS, FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, PR_REGS, BR_REGS,   AR_M_REGS, AR_I_REGS, ADDL_REGS, GR_REGS,   FR_REGS, GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, DPH_REGS, DPL_REGS,   DP_REGS, SP_REGS, IPH_REGS, IPL_REGS,   IP_REGS, DP_SP_REGS, PTR_REGS, NONPTR_REGS,   NONSP_REGS, GENERAL_REGS, ALL_REGS = GENERAL_REGS, LIM_REG_CLASSES,   NO_REGS, GR_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, CARRY_REG, ACCUM_REGS, GENERAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, D_REGS,   X_REGS, Y_REGS, SP_REGS, DA_REGS,   DB_REGS, Z_REGS, D8_REGS, Q_REGS,   D_OR_X_REGS, D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS,   A_REGS, X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS,   A_OR_D_REGS, A_OR_SP_REGS, H_REGS, S_REGS,   D_OR_S_REGS, X_OR_S_REGS, Y_OR_S_REGS, Z_OR_S_REGS,   SP_OR_S_REGS, D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS,   A_OR_S_REGS, D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS,   G_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   DATA_REGS, ADDR_REGS, FP_REGS, GENERAL_REGS,   DATA_OR_FP_REGS, ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, ONLYR1_REGS, LRW_REGS, GENERAL_REGS,   C_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   M16_NA_REGS, M16_REGS, T_REG, M16_T_REGS,   PIC_FN_ADDR_REG, LEA_REGS, GR_REGS, FP_REGS,   HI_REG, LO_REG, MD_REGS, COP0_REGS,   COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,   HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,   ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, REMAINDER_REG,   HIMULT_REG, SYSTEM_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS,   DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS, EXTENDED_REGS, DATA_OR_EXTENDED_REGS,   ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS, FP_REGS,   FP_ACC_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, GENERAL_REGS, FLOAT_REG0, LONG_FLOAT_REG0,   FLOAT_REGS, LONG_REGS, FP_REGS, GEN_AND_FP_REGS,   FRAME_POINTER_REG, STACK_POINTER_REG, GEN_AND_MEM_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,   FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,   GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,   SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS,   FPU_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   BASE_REGS, GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS,   VRSAVE_REGS, VSCR_REGS, SPE_ACC_REGS, SPEFSCR_REGS,   NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,   LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,   CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, CC_REGS, ADDR_REGS,   GENERAL_REGS, ACCESS_REGS, ADDR_CC_REGS, GENERAL_CC_REGS,   FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R0_REGS, PR_REGS,   T_REGS, MAC_REGS, FPUL_REGS, SIBCALL_REGS,   GENERAL_REGS, FP0_REGS, FP_REGS, DF_HI_REGS,   DF_REGS, FPSCR_REGS, GENERAL_FP_REGS, TARGET_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, FPCC_REGS,   I64_REGS, GENERAL_REGS, FP_REGS, EXTRA_FP_REGS,   GENERAL_OR_FP_REGS, GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, R0_REGS, R1_REGS, TWO_REGS,   R2_REGS, EIGHT_REGS, R8_REGS, ICALL_REGS,   GENERAL_REGS, CARRY_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   BR_REGS, FP_REGS, ACC_REG, SP_REG,   RL_REGS, GR_REGS, AR_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R0_REG, R24_REG,   R25_REG, R27_REG, GENERAL_REGS, FLOAT_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG,   GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   FPA_REGS, CIRRUS_REGS, VFP_REGS, IWMMXT_GR_REGS,   IWMMXT_REGS, LO_REGS, STACK_REG, BASE_REGS,   HI_REGS, CC_REG, VFPCC_REG, GENERAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0_REG,   POINTER_X_REGS, POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG,   BASE_POINTER_REGS, POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS,   LD_REGS, NO_LD_REGS, GENERAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, IREGS, BREGS,   LREGS, MREGS, CIRCREGS, DAGREGS,   EVEN_AREGS, ODD_AREGS, AREGS, CCREGS,   EVEN_DREGS, ODD_DREGS, DREGS, FDPIC_REGS,   FDPIC_FPTR_REGS, PREGS_CLOBBERED, PREGS, IPREGS,   DPREGS, MOST_REGS, LT_REGS, LC_REGS,   LB_REGS, PROLOGUE_REGS, NON_A_CC_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R0R1_REGS, R2R3_REGS,   EXT_LOW_REGS, EXT_REGS, ADDR_REGS, INDEX_REGS,   BK_REG, SP_REG, RC_REG, COUNTER_REGS,   INT_REGS, GENERAL_REGS, DP_REG, ST_REG,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, MOF_REGS,   CC0_REGS, SPECIAL_REGS, GENERAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, LO_REGS, HI_REGS,   HILO_REGS, NOSP_REGS, GENERAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG, MULTIPLY_64_REG,   LOW_REGS, HIGH_REGS, REAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, ICC_REGS, FCC_REGS,   CC_REGS, ICR_REGS, FCR_REGS, CR_REGS,   LCR_REG, LR_REG, GR8_REGS, GR9_REGS,   GR89_REGS, FDPIC_REGS, FDPIC_FPTR_REGS, FDPIC_CALL_REGS,   SPR_REGS, QUAD_ACC_REGS, EVEN_ACC_REGS, ACC_REGS,   ACCG_REGS, QUAD_FPR_REGS, FEVEN_REGS, FPR_REGS,   QUAD_REGS, EVEN_REGS, GPR_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, COUNTER_REGS, SOURCE_REGS,   DESTINATION_REGS, GENERAL_REGS, MAC_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, AREG, DREG,   CREG, BREG, SIREG, DIREG,   AD_REGS, Q_REGS, NON_Q_REGS, INDEX_REGS,   LEGACY_REGS, GENERAL_REGS, FP_TOP_REG, FP_SECOND_REG,   FLOAT_REGS, SSE_REGS, MMX_REGS, FP_TOP_SSE_REGS,   FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS, INT_SSE_REGS,   FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   PR_REGS, BR_REGS, AR_M_REGS, AR_I_REGS,   ADDL_REGS, GR_REGS, FP_REGS, FR_REGS,   GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, GR_REGS, ALL_REGS, LIM_REG_CLASSES,   NO_REGS, SP_REGS, FB_REGS, SB_REGS,   CR_REGS, R0_REGS, R1_REGS, R2_REGS,   R3_REGS, R02_REGS, HL_REGS, QI_REGS,   R23_REGS, R03_REGS, DI_REGS, A0_REGS,   A1_REGS, A_REGS, AD_REGS, PS_REGS,   SI_REGS, HI_REGS, RA_REGS, GENERAL_REGS,   FLG_REGS, HC_REGS, MEM_REGS, R02_A_MEM_REGS,   A_HL_MEM_REGS, R1_R3_A_MEM_REGS, R03_MEM_REGS, A_HI_MEM_REGS,   A_AD_CR_MEM_SI_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   CARRY_REG, ACCUM_REGS, GENERAL_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, D_REGS, X_REGS,   Y_REGS, SP_REGS, DA_REGS, DB_REGS,   Z_REGS, D8_REGS, Q_REGS, D_OR_X_REGS,   D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS, A_REGS,   X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS, A_OR_D_REGS,   A_OR_SP_REGS, H_REGS, S_REGS, D_OR_S_REGS,   X_OR_S_REGS, Y_OR_S_REGS, Z_OR_S_REGS, SP_OR_S_REGS,   D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS, A_OR_S_REGS,   D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS, G_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,   ADDR_REGS, FP_REGS, GENERAL_REGS, DATA_OR_FP_REGS,   ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   ONLYR1_REGS, LRW_REGS, GENERAL_REGS, C_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,   M16_REGS, T_REG, M16_T_REGS, PIC_FN_ADDR_REG,   V1_REG, LEA_REGS, GR_REGS, FP_REGS,   HI_REG, LO_REG, MD_REGS, COP0_REGS,   COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,   HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,   ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, DSP_ACC_REGS,   ACC_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   GENERAL_REGS, REMAINDER_REG, HIMULT_REG, SYSTEM_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,   ADDRESS_REGS, SP_REGS, DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,   EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS,   SP_OR_ADDRESS_OR_EXTENDED_REGS, FP_REGS, FP_ACC_REGS, GENERAL_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,   FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,   GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,   SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS,   FPU_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   BASE_REGS, GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS,   VRSAVE_REGS, VSCR_REGS, SPE_ACC_REGS, SPEFSCR_REGS,   NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,   LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,   CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, CC_REGS, ADDR_REGS,   GENERAL_REGS, ACCESS_REGS, ADDR_CC_REGS, GENERAL_CC_REGS,   FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, G16_REGS, G32_REGS,   T32_REGS, HI_REG, LO_REG, CE_REGS,   CN_REG, LC_REG, SC_REG, SP_REGS,   CR_REGS, CP1_REGS, CP2_REGS, CP3_REGS,   CPA_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   R0_REGS, PR_REGS, T_REGS, MAC_REGS,   FPUL_REGS, SIBCALL_REGS, GENERAL_REGS, FP0_REGS,   FP_REGS, DF_HI_REGS, DF_REGS, FPSCR_REGS,   GENERAL_FP_REGS, GENERAL_DF_REGS, TARGET_REGS, ALL_REGS,   LIM_REG_CLASSES, NO_REGS, FPCC_REGS, I64_REGS,   GENERAL_REGS, FP_REGS, EXTRA_FP_REGS, GENERAL_OR_FP_REGS,   GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   R0_REGS, R1_REGS, TWO_REGS, R2_REGS,   EIGHT_REGS, R8_REGS, ICALL_REGS, GENERAL_REGS,   CARRY_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,   ALL_REGS, LIM_REG_CLASSES, NO_REGS, BR_REGS,   FP_REGS, ACC_REG, SP_REG, RL_REGS,   GR_REGS, AR_REGS, ALL_REGS, LIM_REG_CLASSES }
enum	save_direction { FROM_PROCESSOR_TO_MEM, FROM_MEM_TO_PROCESSOR }
Variables
struct rtx_def *	mt_ucmpsi3_libcall
enum processor_type	mt_cpu
struct mt_frame_info	current_frame_info
struct rtx_def *	mt_compare_op0
struct rtx_def *	mt_compare_op1

---

Define Documentation

#define ACCUMULATE_OUTGOING_ARGS   1

Definition at line 531 of file mt.h.

#define ADDITIONAL_REGISTER_NAMES   { { "FP", 12}, {"SP", 13}, {"RA", 14}, {"IRA", 15} }

Definition at line 737 of file mt.h.

#define ARG_POINTER_REGNUM   (SPECIAL_REG_FIRST + 0)

Definition at line 476 of file mt.h.

#define ARG_POINTER_REGNUM   (SPECIAL_REG_FIRST + 0)

Definition at line 476 of file mt.h.

#define ASM_APP_OFF   "#NO_APP\n"

Definition at line 685 of file mt.h.

#define ASM_APP_ON   "#APP\n"

Definition at line 679 of file mt.h.

#define ASM_OUTPUT_ADDR_DIFF_ELT	(	STREAM,
		BODY,
		VALUE,
		REL		)	fprintf (STREAM, "\t.word .L%d-.L%d\n", VALUE, REL)

Definition at line 784 of file mt.h.

#define ASM_OUTPUT_ADDR_VEC_ELT	(	STREAM,
		VALUE		)	fprintf (STREAM, "\t.word .L%d\n", VALUE)

Definition at line 794 of file mt.h.

#define ASM_OUTPUT_ALIGN	(	STREAM,
		POWER		)	fprintf ((STREAM), "\t.p2align %d\n", (POWER))

Definition at line 809 of file mt.h.

#define ASM_OUTPUT_BYTE	(	STREAM,
		VALUE		)	fprintf (STREAM, "\t%s\t0x%x\n", ASM_BYTE_OP, (VALUE))

Definition at line 722 of file mt.h.

#define ASM_OUTPUT_CHAR	(	FILE,
		VALUE		)

Value:

do              \
    {             \
      fprintf (FILE, "\t.byte\t");      \
      output_addr_const (FILE, (VALUE));    \
      fprintf (FILE, "\n");       \
    }             \
  while (0)

Definition at line 688 of file mt.h.

#define ASM_OUTPUT_INT	(	FILE,
		VALUE		)

Value:

do              \
    {             \
      fprintf (FILE, "\t.word\t");      \
      output_addr_const (FILE, (VALUE));    \
      fprintf (FILE, "\n");       \
    }             \
  while (0)

Definition at line 709 of file mt.h.

#define ASM_OUTPUT_OPCODE	(	STREAM,
		PTR		)	(PTR) = mt_asm_output_opcode (STREAM, PTR)

Definition at line 750 of file mt.h.

#define ASM_OUTPUT_SHORT	(	FILE,
		VALUE		)

Value:

do              \
    {             \
      fprintf (FILE, "\t.hword\t");     \
      output_addr_const (FILE, (VALUE));    \
      fprintf (FILE, "\n");       \
    }             \
  while (0)

Definition at line 698 of file mt.h.

#define ASM_SPEC   "%{march=*} %{!march=*: -march=ms1-16-002}"

Definition at line 49 of file mt.h.

#define BASE_REG_CLASS   GENERAL_REGS

Definition at line 319 of file mt.h.

#define BIGGEST_ALIGNMENT   32

Definition at line 159 of file mt.h.

#define BITS_BIG_ENDIAN   0

Definition at line 106 of file mt.h.

#define BSS_SECTION_ASM_OP   "\t.section\t.bss"

Definition at line 673 of file mt.h.

#define BYTES_BIG_ENDIAN   1

Definition at line 108 of file mt.h.

#define CALL_USED_REGISTERS

Value:

{ 1, 1, 1, 1, 1, 0, 0, 1, \
          1, 1, 1, 1, 1, 1, 1, 1, \
          1, 1, 1, 1, 1     \
        }

Definition at line 276 of file mt.h.

#define CAN_DEBUG_WITHOUT_FP   1

Definition at line 101 of file mt.h.

#define CAN_ELIMINATE	(	FROM,
		TO		)

Value:

((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM   \
  ? ! frame_pointer_needed            \
  : 1)

Definition at line 516 of file mt.h.

#define CASE_VECTOR_MODE   SImode

Definition at line 826 of file mt.h.

#define CHAR_TYPE_SIZE   8

Definition at line 211 of file mt.h.

#define CLASS_MAX_NREGS	(	CLASS,
		MODE		)	((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)

Definition at line 343 of file mt.h.

#define CONST_DOUBLE_OK_FOR_LETTER_P	(	VALUE,
		C		)	0

Definition at line 396 of file mt.h.

#define CONST_OK_FOR_LETTER_P	(	VALUE,
		C		)

Value:

((C) == 'I' ? ((unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000) \
   : (C) == 'J' ? ((VALUE) == 0)          \
   : (C) == 'K' ? ((unsigned HOST_WIDE_INT) (VALUE) < 0x10000)    \
   : (C) == 'L' ? (((VALUE) & 0x0000ffff) == 0        \
       && (((VALUE) & ~2147483647) == 0     \
           || ((VALUE) & ~2147483647) == ~2147483647))  \
   : (C) == 'M' ? ((((VALUE) & ~0x0000ffff) != 0)     \
       && (((VALUE) & ~0x0000ffff) != ~0x0000ffff)    \
       && (((VALUE) & 0x0000ffff) != 0      \
           || (((VALUE) & ~2147483647) != 0     \
         && ((VALUE) & ~2147483647) != ~2147483647))) \
   : (C) == 'N' ? ((unsigned HOST_WIDE_INT) ((VALUE) + 0xffff) < 0xffff) \
   : (C) == 'O' ? ((unsigned HOST_WIDE_INT) ((VALUE) + 0x4000) < 0x8000) \
   : (C) == 'P' ? ((VALUE) != 0 && (((VALUE) & ~0x0000ffff) == 0))  \
   : 0)

Definition at line 377 of file mt.h.

#define CONSTANT_ADDRESS_P

(

X

)

CONSTANT_P (X)

Definition at line 619 of file mt.h.

#define CONSTANT_ALIGNMENT	(	EXP,
		ALIGN		)

Value:

(TREE_CODE (EXP) == STRING_CST  \
   && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))

Definition at line 182 of file mt.h.

#define CUMULATIVE_ARGS   int

Definition at line 557 of file mt.h.

#define DATA_ALIGNMENT	(	TYPE,
		ALIGN		)

Value:

(TREE_CODE (TYPE) == ARRAY_TYPE   \
   && TYPE_MODE (TREE_TYPE (TYPE)) == QImode  \
   && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))

Definition at line 167 of file mt.h.

#define DATA_SECTION_ASM_OP   ".data"

Definition at line 671 of file mt.h.

#define DEFAULT_PCC_STRUCT_RETURN   0

Definition at line 587 of file mt.h.

#define DEFAULT_SIGNED_CHAR   1

Definition at line 219 of file mt.h.

#define DELAY_SLOTS_FOR_EPILOGUE   1

Definition at line 599 of file mt.h.

#define DOUBLE_TYPE_SIZE   64

Definition at line 215 of file mt.h.

#define DWARF2_ASM_LINE_DEBUG_INFO   1

Definition at line 822 of file mt.h.

#define DWARF_FRAME_RETURN_COLUMN   DWARF_FRAME_REGNUM (GPR_LINK)

Definition at line 797 of file mt.h.

#define EH_RETURN_DATA_REGNO

(

N

)

((N) == 0 ? GPR_R7 : (N) == 1 ? GPR_R8 : INVALID_REGNUM)

Definition at line 799 of file mt.h.

#define EH_RETURN_HANDLER_REGNO   GPR_R10

Definition at line 805 of file mt.h.

#define EH_RETURN_HANDLER_RTX   gen_rtx_REG (SImode, EH_RETURN_HANDLER_REGNO)

Definition at line 806 of file mt.h.

#define EH_RETURN_STACKADJ_REGNO   GPR_R11

Definition at line 802 of file mt.h.

#define EH_RETURN_STACKADJ_RTX   gen_rtx_REG (SImode, EH_RETURN_STACKADJ_REGNO)

Definition at line 803 of file mt.h.

#define ELIGIBLE_FOR_EPILOGUE_DELAY	(	INSN,
		N		)	0

Definition at line 603 of file mt.h.

#define ELIMINABLE_REGS

Value:

{                 \
  {ARG_POINTER_REGNUM,   STACK_POINTER_REGNUM},       \
  {ARG_POINTER_REGNUM,   FRAME_POINTER_REGNUM},       \
  {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}        \
}

Definition at line 507 of file mt.h.

#define ENDFILE_SPEC   "%{msim:exit.o%s; \march=ms1-64-001:exit-64-001.o%s; \march=ms1-16-002:exit-16-002.o%s; \march=ms1-16-003:exit-16-003.o%s; \march=ms2:exit-ms2.o%s; \ :exit-16-002.o%s} \ crtend.o%s crtn.o%s"

Definition at line 74 of file mt.h.

#define EPILOGUE_USES

(

REGNO

)

mt_epilogue_uses(REGNO)

Definition at line 595 of file mt.h.

#define EXIT_IGNORE_STACK   1

Definition at line 593 of file mt.h.

#define FINAL_PRESCAN_INSN	(	INSN,
		OPVEC,
		NOPERANDS		)	mt_final_prescan_insn (INSN, OPVEC, NOPERANDS)

Definition at line 753 of file mt.h.

#define FIRST_ARG_REGNUM   1

Definition at line 251 of file mt.h.

#define FIRST_PARM_OFFSET

(

FUNDECL

)

0

Definition at line 446 of file mt.h.

#define FIRST_PSEUDO_REGISTER   (SPECIAL_REG_LAST + 1)

Definition at line 257 of file mt.h.

#define FIXED_REGISTERS

Value:

{ 1, 0, 0, 0, 0, 0, 0, 0, \
        0, 0, 0, 0, 1, 1, 1, 1, \
        1, 1, 1, 1, 1     \
       }

Definition at line 267 of file mt.h.

#define FLOAT_TYPE_SIZE   32

Definition at line 213 of file mt.h.

#define FRAME_POINTER_REGNUM   GPR_FP

Definition at line 472 of file mt.h.

#define FRAME_POINTER_REQUIRED   0

Definition at line 483 of file mt.h.

#define FUNCTION_ARG	(	CUM,
		MODE,
		TYPE,
		NAMED		)	mt_function_arg (& (CUM), (MODE), (TYPE), (NAMED), FALSE)

Definition at line 554 of file mt.h.

#define FUNCTION_ARG_ADVANCE	(	CUM,
		MODE,
		TYPE,
		NAMED		)	mt_function_arg_advance (&CUM, MODE, TYPE, NAMED)

Definition at line 562 of file mt.h.

#define FUNCTION_ARG_BOUNDARY	(	MODE,
		TYPE		)	mt_function_arg_boundary (MODE, TYPE)

Definition at line 565 of file mt.h.

#define FUNCTION_ARG_REGNO_P

(

REGNO

)

((REGNO) >= FIRST_ARG_REGNUM && ((REGNO) <= LAST_ARG_REGNUM))

Definition at line 568 of file mt.h.

#define FUNCTION_BOUNDARY   32

Definition at line 155 of file mt.h.

#define FUNCTION_MODE   QImode

Definition at line 855 of file mt.h.

#define FUNCTION_PROFILER	(	FILE,
		LABELNO		)	gcc_unreachable ()

Definition at line 605 of file mt.h.

#define FUNCTION_VALUE	(	VALTYPE,
		FUNC		)	mt_function_value (VALTYPE, TYPE_MODE(VALTYPE), FUNC)

Definition at line 573 of file mt.h.

#define FUNCTION_VALUE_REGNO_P

(

REGNO

)

((REGNO) == RETURN_VALUE_REGNUM)

Definition at line 579 of file mt.h.

#define GENERAL_REGS   ALL_REGS

Definition at line 302 of file mt.h.

#define GLOBAL_ASM_OP   "\t.globl "

Definition at line 726 of file mt.h.

#define GO_IF_LEGITIMATE_ADDRESS	(	MODE,
		X,
		ADDR		)

Value:

{           \
  if (mt_legitimate_address_p (MODE, X, 0)) \
    goto ADDR;          \
}

Definition at line 633 of file mt.h.

#define GO_IF_MODE_DEPENDENT_ADDRESS	(	ADDR,
		LABEL		)

Definition at line 650 of file mt.h.

#define GPR_FIRST   0

Definition at line 224 of file mt.h.

#define GPR_FP   12

Definition at line 233 of file mt.h.

#define GPR_INTERRUPT_LINK   15

Definition at line 237 of file mt.h.

#define GPR_LAST   15

Definition at line 225 of file mt.h.

#define GPR_LINK   14

Definition at line 235 of file mt.h.

#define GPR_R0   0

Definition at line 227 of file mt.h.

#define GPR_R10   10

Definition at line 231 of file mt.h.

#define GPR_R11   11

Definition at line 232 of file mt.h.

#define GPR_R7   7

Definition at line 228 of file mt.h.

#define GPR_R8   8

Definition at line 229 of file mt.h.

#define GPR_R9   9

Definition at line 230 of file mt.h.

Referenced by mt_emit_save_fp(), mt_emit_save_regs(), mt_expand_epilogue(), and mt_expand_prologue().

#define GPR_SP   13

Definition at line 234 of file mt.h.

#define HANDLE_SYSV_PRAGMA   1

Definition at line 857 of file mt.h.

#define HARD_REGNO_MODE_OK	(	REGNO,
		MODE		)	1

Definition at line 287 of file mt.h.

#define HARD_REGNO_NREGS	(	REGNO,
		MODE		)	((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)

Definition at line 284 of file mt.h.

#define IMMEDIATE_PREFIX   ""

Definition at line 774 of file mt.h.

#define INCOMING_FRAME_SP_OFFSET   0

Definition at line 468 of file mt.h.

#define INCOMING_RETURN_ADDR_RTX   gen_rtx_REG (SImode, GPR_LINK)

Definition at line 458 of file mt.h.

#define INDEX_REG_CLASS   NO_REGS

Definition at line 321 of file mt.h.

#define INIT_CUMULATIVE_ARGS	(	CUM,
		FNTYPE,
		LIBNAME,
		FNDECL,
		N_NAMED_ARGS		)	mt_init_cumulative_args (& (CUM), FNTYPE, LIBNAME, FNDECL, FALSE)

Definition at line 559 of file mt.h.

#define INITIAL_ELIMINATION_OFFSET	(	FROM,
		TO,
		OFFSET		)	(OFFSET) = mt_initial_elimination_offset (FROM, TO)

Definition at line 525 of file mt.h.

#define INITIALIZE_TRAMPOLINE	(	ADDR,
		FNADDR,
		STATIC_CHAIN		)

Definition at line 610 of file mt.h.

#define INT_TYPE_SIZE   32

Definition at line 203 of file mt.h.

#define IS_PSEUDO_P

(

R

)

(REGNO (R) >= FIRST_PSEUDO_REGISTER)

Definition at line 259 of file mt.h.

#define ISSUE_RATE   1

Definition at line 860 of file mt.h.

#define LAST_ARG_REGNUM   4

Definition at line 252 of file mt.h.

#define LEGITIMATE_CONSTANT_P

(

X

)

1

Definition at line 652 of file mt.h.

#define LEGITIMIZE_ADDRESS	(	X,
		OLDX,
		MODE,
		WIN		)	{}

Definition at line 648 of file mt.h.

#define LIB_SPEC   "--start-group -lc -lsim --end-group \%{msim: ; \march=ms1-64-001:-T 64-001.ld%s; \march=ms1-16-002:-T 16-002.ld%s; \march=ms1-16-003:-T 16-003.ld%s; \march=ms2:-T ms2.ld%s; \ :-T 16-002.ld}"

Definition at line 53 of file mt.h.

#define LIBCALL_VALUE

(

MODE

)

mt_function_value (NULL_TREE, MODE, NULL_TREE)

Definition at line 576 of file mt.h.

#define LOCAL_LABEL_PREFIX   "."

Definition at line 772 of file mt.h.

#define LONG_DOUBLE_TYPE_SIZE   64

Definition at line 217 of file mt.h.

#define LONG_LONG_TYPE_SIZE   64

Definition at line 209 of file mt.h.

#define LONG_TYPE_SIZE   32

Definition at line 207 of file mt.h.

#define LOOP_FIRST   (GPR_LAST + 1)

Definition at line 239 of file mt.h.

Referenced by mt_reorg_loops().

#define LOOP_LAST   (LOOP_FIRST + 3)

Definition at line 240 of file mt.h.

#define MAX_REGS_PER_ADDRESS   1

Definition at line 624 of file mt.h.

#define MEMORY_MOVE_COST	(	M,
		C,
		I		)	10

Definition at line 660 of file mt.h.

#define MODES_TIEABLE_P	(	MODE1,
		MODE2		)	1

Definition at line 291 of file mt.h.

#define MOVE_MAX   4

Definition at line 836 of file mt.h.

#define MT_MIN_INT   0x80000000

Definition at line 399 of file mt.h.

Referenced by mt_generate_compare().

#define MT_NUM_ARG_REGS   4

Definition at line 538 of file mt.h.

Referenced by mt_arg_partial_bytes(), mt_function_arg_slotno(), and mt_setup_incoming_varargs().

#define MUST_SAVE_REGISTER

(

regno

)

Value:

(   (regno) != GPR_LINK           \
   && (regno) != GPR_FP             \
   && (regno) != GPR_SP             \
   && (regno) != GPR_R0             \
   &&   (( regs_ever_live [regno] && ! call_used_regs [regno] ) \
       /* Save ira register in an interrupt handler.  */  \
  || (interrupt_handler && (regno) == GPR_INTERRUPT_LINK) \
       /* Save any register used in an interrupt handler.  */ \
  || (interrupt_handler && regs_ever_live [regno])  \
       /* Save call clobbered registers in non-leaf interrupt \
    handlers.  */           \
  || (interrupt_handler && call_used_regs[regno]    \
     && !current_function_is_leaf)      \
  ||(current_function_calls_eh_return     \
     && (regno == GPR_R7 || regno == GPR_R8))   \
  )             \
  )

Definition at line 412 of file mt.h.

#define N_REG_CLASSES   ((int) LIM_REG_CLASSES)

Definition at line 304 of file mt.h.

#define OPTION_DEFAULT_SPECS   {"arch", "%{!march=*:-march=%(VALUE)}" }

Definition at line 43 of file mt.h.

#define OUTGOING_REG_PARM_STACK_SPACE

Definition at line 535 of file mt.h.

#define OVERRIDE_OPTIONS   mt_override_options ()

Definition at line 99 of file mt.h.

#define PARM_BOUNDARY   32

Definition at line 144 of file mt.h.

#define PCC_BITFIELD_TYPE_MATTERS   1

Definition at line 199 of file mt.h.

#define Pmode   SImode

Definition at line 850 of file mt.h.

#define PREFERRED_DEBUGGING_TYPE   DWARF2_DEBUG

Definition at line 812 of file mt.h.

#define PREFERRED_RELOAD_CLASS	(	X,
		CLASS		)	(CLASS)

Definition at line 336 of file mt.h.

#define PRINT_OPERAND	(	STREAM,
		X,
		CODE		)	mt_print_operand (STREAM, X, CODE)

Definition at line 756 of file mt.h.

#define PRINT_OPERAND_ADDRESS	(	STREAM,
		X		)	mt_print_operand_address (STREAM, X)

Definition at line 763 of file mt.h.

#define PRINT_OPERAND_PUNCT_VALID_P

(

CODE

)

((CODE) == '#')

Definition at line 761 of file mt.h.

#define PROMOTE_MODE	(	MODE,
		UNSIGNEDP,
		TYPE		)

Value:

do                \
    {               \
      if (GET_MODE_CLASS (MODE) == MODE_INT     \
    && GET_MODE_SIZE (MODE) < 4)        \
  (MODE) = SImode;          \
    }               \
  while (0)

Definition at line 132 of file mt.h.

#define REG_CLASS_CONTENTS

Value:

{               \
     { 0x0 },             \
     { 0x000fffff },            \
   }

Definition at line 308 of file mt.h.

#define REG_CLASS_FROM_LETTER

(

CHAR

)

NO_REGS

Definition at line 323 of file mt.h.

#define REG_CLASS_NAMES   {"NO_REGS", "ALL_REGS" }

Definition at line 306 of file mt.h.

#define REG_OK_FOR_BASE_P

(

X

)

mt_reg_ok_for_base_p (X, 0)

Definition at line 643 of file mt.h.

#define REG_OK_FOR_INDEX_P

(

X

)

REG_OK_FOR_BASE_P (X)

Definition at line 646 of file mt.h.

#define REG_PARM_STACK_SPACE

(

FNDECL

)

(MT_NUM_ARG_REGS * UNITS_PER_WORD)

Definition at line 542 of file mt.h.

#define REGISTER_NAMES

Value:

{ "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7",     \
  "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15",     \
  "LOOP1", "LOOP2", "LOOP3", "LOOP4", "ap" }

Definition at line 728 of file mt.h.

#define REGISTER_PREFIX   "%"

Definition at line 771 of file mt.h.

#define REGNO_OK_FOR_BASE_P

(

NUM

)

1

Definition at line 325 of file mt.h.

#define REGNO_OK_FOR_INDEX_P

(

NUM

)

1

Definition at line 327 of file mt.h.

#define REGNO_REG_CLASS

(

REGNO

)

GENERAL_REGS

Definition at line 317 of file mt.h.

#define RETURN_ADDR_RTX	(	COUNT,
		FRAMEADDR		)	mt_return_addr_rtx (COUNT)

Definition at line 448 of file mt.h.

#define RETURN_IN_MEMORY

(

TYPE

)

(int_size_in_bytes (TYPE) > UNITS_PER_WORD)

Definition at line 583 of file mt.h.

#define RETURN_POPS_ARGS	(	FUNDECL,
		FUNTYPE,
		STACK_SIZE		)	0

Definition at line 552 of file mt.h.

#define RETURN_VALUE_REGNUM   RETVAL_REGNUM

Definition at line 571 of file mt.h.

#define RETVAL_REGNUM   11

Definition at line 255 of file mt.h.

Referenced by mt_struct_value_rtx().

#define SECONDARY_RELOAD_CLASS	(	CLASS,
		MODE,
		X		)	mt_secondary_reload_class((CLASS), (MODE), (X))

Definition at line 338 of file mt.h.

#define SHORT_TYPE_SIZE   16

Definition at line 205 of file mt.h.

#define SLOW_BYTE_ACCESS   1

Definition at line 665 of file mt.h.

#define SLOW_UNALIGNED_ACCESS	(	MODE,
		ALIGN		)	1

Definition at line 667 of file mt.h.

#define SMALL_INT

(

X

)

((unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)

Definition at line 368 of file mt.h.

#define SMALL_INT_UNSIGNED

(

X

)

((unsigned HOST_WIDE_INT) (INTVAL (X)) < 0x10000)

Definition at line 369 of file mt.h.

#define SPECIAL_REG_FIRST   (LOOP_LAST + 1)

Definition at line 245 of file mt.h.

#define SPECIAL_REG_LAST   (SPECIAL_REG_FIRST)

Definition at line 246 of file mt.h.

#define SPECIAL_REG_P

(

R

)

((R) == SPECIAL_REG_FIRST)

Definition at line 248 of file mt.h.

#define STACK_BOUNDARY   32

Definition at line 152 of file mt.h.

#define STACK_GROWS_DOWNWARD   1

Definition at line 430 of file mt.h.

#define STACK_PARMS_IN_REG_PARM_AREA

Definition at line 546 of file mt.h.

#define STACK_POINTER_REGNUM   GPR_SP

Definition at line 470 of file mt.h.

#define STARTFILE_SPEC   "%{msim:crt0.o%s;\march=ms1-64-001:%{!mno-crt0:crt0-64-001.o%s} startup-64-001.o%s; \march=ms1-16-002:%{!mno-crt0:crt0-16-002.o%s} startup-16-002.o%s; \march=ms1-16-003:%{!mno-crt0:crt0-16-003.o%s} startup-16-003.o%s; \march=ms2:%{!mno-crt0:crt0-ms2.o%s} startup-ms2.o%s; \ :%{!mno-crt0:crt0-16-002.o%s} startup-16-002.o%s} \crti.o%s crtbegin.o%s"

Definition at line 64 of file mt.h.

#define STARTING_FRAME_OFFSET   current_function_outgoing_args_size

Definition at line 439 of file mt.h.

#define STATIC_CHAIN_REGNUM   10

Definition at line 479 of file mt.h.

#define STRICT_ALIGNMENT   1

Definition at line 195 of file mt.h.

#define STRUCTURE_SIZE_BOUNDARY   32

Definition at line 190 of file mt.h.

 

#define TARGET_CPU_CPP_BUILTINS

(

)

Value:

do            \
    {           \
      builtin_define_with_int_value ("__mt__", mt_cpu); \
      builtin_assert ("machine=mt");    \
    }           \
  while (0)

Definition at line 84 of file mt.h.

#define TARGET_MS1_16_002   (mt_cpu == PROCESSOR_MS1_16_002)

Definition at line 93 of file mt.h.

#define TARGET_MS1_16_003   (mt_cpu == PROCESSOR_MS1_16_003)

Definition at line 94 of file mt.h.

#define TARGET_MS1_64_001   (mt_cpu == PROCESSOR_MS1_64_001)

Definition at line 92 of file mt.h.

Referenced by mt_final_prescan_insn().

#define TARGET_MS2   (mt_cpu == PROCESSOR_MS2)

Definition at line 95 of file mt.h.

Referenced by mt_final_prescan_insn(), and mt_machine_reorg().

#define TARGET_VERSION   fprintf (stderr, " (mt)");

Definition at line 97 of file mt.h.

#define TEXT_SECTION_ASM_OP   ".text"

Definition at line 669 of file mt.h.

#define TRAMPOLINE_SIZE   0

Definition at line 608 of file mt.h.

#define TRULY_NOOP_TRUNCATION	(	OUTPREC,
		INPREC		)	1

Definition at line 848 of file mt.h.

#define UCMPSI3_LIBCALL   "__ucmpsi3"

Definition at line 613 of file mt.h.

#define UNITS_PER_WORD   4

Definition at line 112 of file mt.h.

#define USER_LABEL_PREFIX   ""

Definition at line 773 of file mt.h.

#define WORD_REGISTER_OPERATIONS

Definition at line 832 of file mt.h.

#define WORDS_BIG_ENDIAN   1

Definition at line 110 of file mt.h.

---

Enumeration Type Documentation

enum epilogue_type

Enumerator:

EH_EPILOGUE
NORMAL_EPILOGUE

Definition at line 32 of file mt.h.

enum processor_type

Enumerator:

PROCESSOR_EV4
PROCESSOR_EV5
PROCESSOR_EV6
PROCESSOR_I386
PROCESSOR_I486
PROCESSOR_PENTIUM
PROCESSOR_PENTIUMPRO
PROCESSOR_K6
PROCESSOR_ATHLON
PROCESSOR_PENTIUM4
PROCESSOR_max
PROCESSOR_M88100
PROCESSOR_M88110
PROCESSOR_M88000
PROCESSOR_700
PROCESSOR_7100
PROCESSOR_7100LC
PROCESSOR_7200
PROCESSOR_8000
PROCESSOR_RIOS1
PROCESSOR_RIOS2
PROCESSOR_RS64A
PROCESSOR_MPCCORE
PROCESSOR_PPC403
PROCESSOR_PPC405
PROCESSOR_PPC601
PROCESSOR_PPC603
PROCESSOR_PPC604
PROCESSOR_PPC604e
PROCESSOR_PPC620
PROCESSOR_PPC630
PROCESSOR_PPC750
PROCESSOR_PPC7400
PROCESSOR_PPC7450
PROCESSOR_SH1
PROCESSOR_SH2
PROCESSOR_SH3
PROCESSOR_SH3E
PROCESSOR_SH4
PROCESSOR_SH5
PROCESSOR_DEFAULT
PROCESSOR_R3000
PROCESSOR_R3900
PROCESSOR_R6000
PROCESSOR_R4000
PROCESSOR_R4100
PROCESSOR_R4111
PROCESSOR_R4120
PROCESSOR_R4300
PROCESSOR_R4600
PROCESSOR_R4650
PROCESSOR_R5000
PROCESSOR_R5400
PROCESSOR_R5500
PROCESSOR_R8000
PROCESSOR_R4KC
PROCESSOR_R5KC
PROCESSOR_R20KC
PROCESSOR_SR71000
PROCESSOR_SB1
PROCESSOR_V7
PROCESSOR_CYPRESS
PROCESSOR_V8
PROCESSOR_SUPERSPARC
PROCESSOR_SPARCLITE
PROCESSOR_F930
PROCESSOR_F934
PROCESSOR_HYPERSPARC
PROCESSOR_SPARCLITE86X
PROCESSOR_SPARCLET
PROCESSOR_TSC701
PROCESSOR_V9
PROCESSOR_ULTRASPARC
PROCESSOR_DEFAULT
PROCESSOR_R3000
PROCESSOR_R3900
PROCESSOR_R6000
PROCESSOR_R4000
PROCESSOR_R4100
PROCESSOR_R4111
PROCESSOR_R4120
PROCESSOR_R4300
PROCESSOR_R4600
PROCESSOR_R4650
PROCESSOR_R5000
PROCESSOR_R5400
PROCESSOR_R5500
PROCESSOR_R8000
PROCESSOR_R4KC
PROCESSOR_R5KC
PROCESSOR_R20KC
PROCESSOR_SR71000
PROCESSOR_SB1
PROCESSOR_DEFAULT
PROCESSOR_R3000
PROCESSOR_R3900
PROCESSOR_R6000
PROCESSOR_R4000
PROCESSOR_R4100
PROCESSOR_R4111
PROCESSOR_R4120
PROCESSOR_R4300
PROCESSOR_R4600
PROCESSOR_R4650
PROCESSOR_R5000
PROCESSOR_R5400
PROCESSOR_R5500
PROCESSOR_R8000
PROCESSOR_R4KC
PROCESSOR_R5KC
PROCESSOR_R20KC
PROCESSOR_SR71000
PROCESSOR_SB1
PROCESSOR_EV4
PROCESSOR_EV5
PROCESSOR_EV6
PROCESSOR_I386
PROCESSOR_I486
PROCESSOR_PENTIUM
PROCESSOR_PENTIUMPRO
PROCESSOR_K6
PROCESSOR_ATHLON
PROCESSOR_PENTIUM4
PROCESSOR_max
PROCESSOR_M88100
PROCESSOR_M88110
PROCESSOR_M88000
PROCESSOR_700
PROCESSOR_7100
PROCESSOR_7100LC
PROCESSOR_7200
PROCESSOR_8000
PROCESSOR_RIOS1
PROCESSOR_RIOS2
PROCESSOR_RS64A
PROCESSOR_MPCCORE
PROCESSOR_PPC403
PROCESSOR_PPC405
PROCESSOR_PPC601
PROCESSOR_PPC603
PROCESSOR_PPC604
PROCESSOR_PPC604e
PROCESSOR_PPC620
PROCESSOR_PPC630
PROCESSOR_PPC750
PROCESSOR_PPC7400
PROCESSOR_PPC7450
PROCESSOR_SH1
PROCESSOR_SH2
PROCESSOR_SH3
PROCESSOR_SH3E
PROCESSOR_SH4
PROCESSOR_SH5
PROCESSOR_DEFAULT
PROCESSOR_R3000
PROCESSOR_R3900
PROCESSOR_R6000
PROCESSOR_R4000
PROCESSOR_R4100
PROCESSOR_R4111
PROCESSOR_R4120
PROCESSOR_R4300
PROCESSOR_R4600
PROCESSOR_R4650
PROCESSOR_R5000
PROCESSOR_R5400
PROCESSOR_R5500
PROCESSOR_R8000
PROCESSOR_R4KC
PROCESSOR_R5KC
PROCESSOR_R20KC
PROCESSOR_SR71000
PROCESSOR_SB1
PROCESSOR_V7
PROCESSOR_CYPRESS
PROCESSOR_V8
PROCESSOR_SUPERSPARC
PROCESSOR_SPARCLITE
PROCESSOR_F930
PROCESSOR_F934
PROCESSOR_HYPERSPARC
PROCESSOR_SPARCLITE86X
PROCESSOR_SPARCLET
PROCESSOR_TSC701
PROCESSOR_V9
PROCESSOR_ULTRASPARC
PROCESSOR_DEFAULT
PROCESSOR_R3000
PROCESSOR_R3900
PROCESSOR_R6000
PROCESSOR_R4000
PROCESSOR_R4100
PROCESSOR_R4111
PROCESSOR_R4120
PROCESSOR_R4300
PROCESSOR_R4600
PROCESSOR_R4650
PROCESSOR_R5000
PROCESSOR_R5400
PROCESSOR_R5500
PROCESSOR_R8000
PROCESSOR_R4KC
PROCESSOR_R5KC
PROCESSOR_R20KC
PROCESSOR_SR71000
PROCESSOR_SB1
PROCESSOR_DEFAULT
PROCESSOR_R3000
PROCESSOR_R3900
PROCESSOR_R6000
PROCESSOR_R4000
PROCESSOR_R4100
PROCESSOR_R4111
PROCESSOR_R4120
PROCESSOR_R4300
PROCESSOR_R4600
PROCESSOR_R4650
PROCESSOR_R5000
PROCESSOR_R5400
PROCESSOR_R5500
PROCESSOR_R8000
PROCESSOR_R4KC
PROCESSOR_R5KC
PROCESSOR_R20KC
PROCESSOR_SR71000
PROCESSOR_SB1
PROCESSOR_EV4
PROCESSOR_EV5
PROCESSOR_EV6
PROCESSOR_MAX
ARM_CORE
PROCESSOR_I386
PROCESSOR_I486
PROCESSOR_PENTIUM
PROCESSOR_PENTIUMPRO
PROCESSOR_K6
PROCESSOR_ATHLON
PROCESSOR_PENTIUM4
PROCESSOR_K8
PROCESSOR_NOCONA
PROCESSOR_max
PROCESSOR_ITANIUM
PROCESSOR_ITANIUM2
PROCESSOR_max
PROCESSOR_DEFAULT
PROCESSOR_IQ2000
PROCESSOR_IQ10
PROCESSOR_DEFAULT
PROCESSOR_4KC
PROCESSOR_5KC
PROCESSOR_20KC
PROCESSOR_M4K
PROCESSOR_R3000
PROCESSOR_R3900
PROCESSOR_R6000
PROCESSOR_R4000
PROCESSOR_R4100
PROCESSOR_R4111
PROCESSOR_R4120
PROCESSOR_R4130
PROCESSOR_R4300
PROCESSOR_R4600
PROCESSOR_R4650
PROCESSOR_R5000
PROCESSOR_R5400
PROCESSOR_R5500
PROCESSOR_R7000
PROCESSOR_R8000
PROCESSOR_R9000
PROCESSOR_SB1
PROCESSOR_SR71000
PROCESSOR_700
PROCESSOR_7100
PROCESSOR_7100LC
PROCESSOR_7200
PROCESSOR_7300
PROCESSOR_8000
PROCESSOR_RIOS1
PROCESSOR_RIOS2
PROCESSOR_RS64A
PROCESSOR_MPCCORE
PROCESSOR_PPC403
PROCESSOR_PPC405
PROCESSOR_PPC440
PROCESSOR_PPC601
PROCESSOR_PPC603
PROCESSOR_PPC604
PROCESSOR_PPC604e
PROCESSOR_PPC620
PROCESSOR_PPC630
PROCESSOR_PPC750
PROCESSOR_PPC7400
PROCESSOR_PPC7450
PROCESSOR_PPC8540
PROCESSOR_POWER4
PROCESSOR_POWER5
PROCESSOR_9672_G5
PROCESSOR_9672_G6
PROCESSOR_2064_Z900
PROCESSOR_2084_Z990
PROCESSOR_max
PROCESSOR_SH1
PROCESSOR_SH2
PROCESSOR_SH2E
PROCESSOR_SH2A
PROCESSOR_SH3
PROCESSOR_SH3E
PROCESSOR_SH4
PROCESSOR_SH4A
PROCESSOR_SH5
PROCESSOR_V7
PROCESSOR_CYPRESS
PROCESSOR_V8
PROCESSOR_SUPERSPARC
PROCESSOR_SPARCLITE
PROCESSOR_F930
PROCESSOR_F934
PROCESSOR_HYPERSPARC
PROCESSOR_SPARCLITE86X
PROCESSOR_SPARCLET
PROCESSOR_TSC701
PROCESSOR_V9
PROCESSOR_ULTRASPARC
PROCESSOR_ULTRASPARC3
PROCESSOR_EV4
PROCESSOR_EV5
PROCESSOR_EV6
PROCESSOR_MAX
ARM_CORE
PROCESSOR_I386
PROCESSOR_I486
PROCESSOR_PENTIUM
PROCESSOR_PENTIUMPRO
PROCESSOR_K6
PROCESSOR_ATHLON
PROCESSOR_PENTIUM4
PROCESSOR_K8
PROCESSOR_NOCONA
PROCESSOR_GENERIC32
PROCESSOR_GENERIC64
PROCESSOR_AMDFAM10
PROCESSOR_max
PROCESSOR_ITANIUM
PROCESSOR_ITANIUM2
PROCESSOR_max
PROCESSOR_DEFAULT
PROCESSOR_IQ2000
PROCESSOR_IQ10
PROCESSOR_R3000
PROCESSOR_4KC
PROCESSOR_4KP
PROCESSOR_5KC
PROCESSOR_5KF
PROCESSOR_20KC
PROCESSOR_24K
PROCESSOR_24KX
PROCESSOR_M4K
PROCESSOR_R3900
PROCESSOR_R6000
PROCESSOR_R4000
PROCESSOR_R4100
PROCESSOR_R4111
PROCESSOR_R4120
PROCESSOR_R4130
PROCESSOR_R4300
PROCESSOR_R4600
PROCESSOR_R4650
PROCESSOR_R5000
PROCESSOR_R5400
PROCESSOR_R5500
PROCESSOR_R7000
PROCESSOR_R8000
PROCESSOR_R9000
PROCESSOR_SB1
PROCESSOR_SB1A
PROCESSOR_SR71000
PROCESSOR_MAX
PROCESSOR_MN10300
PROCESSOR_AM33
PROCESSOR_AM33_2
PROCESSOR_MS1_64_001
PROCESSOR_MS1_16_002
PROCESSOR_MS1_16_003
PROCESSOR_MS2
PROCESSOR_700
PROCESSOR_7100
PROCESSOR_7100LC
PROCESSOR_7200
PROCESSOR_7300
PROCESSOR_8000
PROCESSOR_RIOS1
PROCESSOR_RIOS2
PROCESSOR_RS64A
PROCESSOR_MPCCORE
PROCESSOR_PPC403
PROCESSOR_PPC405
PROCESSOR_PPC440
PROCESSOR_PPC601
PROCESSOR_PPC603
PROCESSOR_PPC604
PROCESSOR_PPC604e
PROCESSOR_PPC620
PROCESSOR_PPC630
PROCESSOR_PPC750
PROCESSOR_PPC7400
PROCESSOR_PPC7450
PROCESSOR_PPC8540
PROCESSOR_POWER4
PROCESSOR_POWER5
PROCESSOR_9672_G5
PROCESSOR_9672_G6
PROCESSOR_2064_Z900
PROCESSOR_2084_Z990
PROCESSOR_2094_Z9_109
PROCESSOR_max
PROCESSOR_SH1
PROCESSOR_SH2
PROCESSOR_SH2E
PROCESSOR_SH2A
PROCESSOR_SH3
PROCESSOR_SH3E
PROCESSOR_SH4
PROCESSOR_SH4A
PROCESSOR_SH5
PROCESSOR_V7
PROCESSOR_CYPRESS
PROCESSOR_V8
PROCESSOR_SUPERSPARC
PROCESSOR_SPARCLITE
PROCESSOR_F930
PROCESSOR_F934
PROCESSOR_HYPERSPARC
PROCESSOR_SPARCLITE86X
PROCESSOR_SPARCLET
PROCESSOR_TSC701
PROCESSOR_V9
PROCESSOR_ULTRASPARC
PROCESSOR_ULTRASPARC3
PROCESSOR_NIAGARA

Definition at line 24 of file mt.h.

enum reg_class

Enumerator:

NO_REGS
R2
R0_1
INDEX_REGS
BASE_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
LR0_REGS
GENERAL_REGS
BP_REGS
FC_REGS
CR_REGS
Q_REGS
SPECIAL_REGS
ACCUM0_REGS
ACCUM_REGS
FLOAT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R24_REG
R25_REG
R27_REG
GENERAL_REGS
FLOAT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
LPCOUNT_REG
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
FPU_REGS
LO_REGS
STACK_REG
BASE_REGS
HI_REGS
CC_REG
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REG
POINTER_X_REGS
POINTER_Y_REGS
POINTER_Z_REGS
STACK_REG
BASE_POINTER_REGS
POINTER_REGS
ADDW_REGS
SIMPLE_LD_REGS
LD_REGS
NO_LD_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0R1_REGS
R2R3_REGS
EXT_LOW_REGS
EXT_REGS
ADDR_REGS
INDEX_REGS
BK_REG
SP_REG
RC_REG
COUNTER_REGS
INT_REGS
GENERAL_REGS
DP_REG
ST_REG
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
FLOAT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
S_REGS
INDEX_REGS
SP_REGS
A_REGS
SI_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
REPEAT_REGS
CR_REGS
ACCUM_REGS
OTHER_FLAG_REGS
F0_REGS
F1_REGS
BR_FLAG_REGS
FLAG_REGS
EVEN_REGS
GPR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
A0H_REG
A0L_REG
A0_REG
A1H_REG
ACCUM_HIGH_REGS
A1L_REG
ACCUM_LOW_REGS
A1_REG
ACCUM_REGS
X_REG
X_OR_ACCUM_LOW_REGS
X_OR_ACCUM_REGS
YH_REG
YH_OR_ACCUM_HIGH_REGS
X_OR_YH_REGS
YL_REG
YL_OR_ACCUM_LOW_REGS
X_OR_YL_REGS
X_OR_Y_REGS
Y_REG
ACCUM_OR_Y_REGS
PH_REG
X_OR_PH_REGS
PL_REG
PL_OR_ACCUM_LOW_REGS
X_OR_PL_REGS
YL_OR_PL_OR_ACCUM_LOW_REGS
P_REG
ACCUM_OR_P_REGS
YL_OR_P_REGS
ACCUM_LOW_OR_YL_OR_P_REGS
Y_OR_P_REGS
ACCUM_Y_OR_P_REGS
NO_FRAME_Y_ADDR_REGS
Y_ADDR_REGS
ACCUM_LOW_OR_Y_ADDR_REGS
ACCUM_OR_Y_ADDR_REGS
X_OR_Y_ADDR_REGS
Y_OR_Y_ADDR_REGS
P_OR_Y_ADDR_REGS
NON_HIGH_YBASE_ELIGIBLE_REGS
YBASE_ELIGIBLE_REGS
J_REG
J_OR_DAU_16_BIT_REGS
BMU_REGS
NOHIGH_NON_ADDR_REGS
NON_ADDR_REGS
SLOW_MEM_LOAD_REGS
NOHIGH_NON_YBASE_REGS
NO_ACCUM_NON_YBASE_REGS
NON_YBASE_REGS
YBASE_VIRT_REGS
ACCUM_LOW_OR_YBASE_REGS
ACCUM_OR_YBASE_REGS
X_OR_YBASE_REGS
Y_OR_YBASE_REGS
ACCUM_LOW_YL_PL_OR_YBASE_REGS
P_OR_YBASE_REGS
ACCUM_Y_P_OR_YBASE_REGS
Y_ADDR_OR_YBASE_REGS
YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS
YBASE_OR_YBASE_ELIGIBLE_REGS
NO_HIGH_ALL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
MULTIPLY_32_REG
MULTIPLY_64_REG
LOW_REGS
HIGH_REGS
REAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
MAC_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ADDR_REGS
DATA_REGS
FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
AREG
DREG
CREG
BREG
SIREG
DIREG
AD_REGS
Q_REGS
NON_Q_REGS
INDEX_REGS
LEGACY_REGS
GENERAL_REGS
FP_TOP_REG
FP_SECOND_REG
FLOAT_REGS
SSE_REGS
MMX_REGS
FP_TOP_SSE_REGS
FP_SECOND_SSE_REGS
FLOAT_SSE_REGS
FLOAT_INT_REGS
INT_SSE_REGS
FLOAT_INT_SSE_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GLOBAL_REGS
LOCAL_REGS
LOCAL_OR_GLOBAL_REGS
FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
PR_REGS
BR_REGS
AR_M_REGS
AR_I_REGS
ADDL_REGS
GR_REGS
FR_REGS
GR_AND_BR_REGS
GR_AND_FR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
CARRY_REG
ACCUM_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
D_REGS
X_REGS
Y_REGS
SP_REGS
DA_REGS
DB_REGS
Z_REGS
D8_REGS
Q_REGS
D_OR_X_REGS
D_OR_Y_REGS
D_OR_SP_REGS
X_OR_Y_REGS
A_REGS
X_OR_SP_REGS
Y_OR_SP_REGS
X_OR_Y_OR_D_REGS
A_OR_D_REGS
A_OR_SP_REGS
H_REGS
S_REGS
D_OR_S_REGS
X_OR_S_REGS
Y_OR_S_REGS
SP_OR_S_REGS
D_OR_X_OR_S_REGS
D_OR_Y_OR_S_REGS
D_OR_SP_OR_S_REGS
A_OR_S_REGS
D_OR_A_OR_S_REGS
TMP_REGS
D_OR_A_OR_TMP_REGS
G_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDR_REGS
FP_REGS
GENERAL_REGS
DATA_OR_FP_REGS
ADDR_OR_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
AP_REG
XRF_REGS
GENERAL_REGS
AGRF_REGS
XGRF_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ONLYR1_REGS
LRW_REGS
GENERAL_REGS
C_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
REMAINDER_REG
HIMULT_REG
SYSTEM_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDRESS_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDRESS_REGS
SP_REGS
DATA_OR_ADDRESS_REGS
SP_OR_ADDRESS_REGS
EXTENDED_REGS
DATA_OR_EXTENDED_REGS
ADDRESS_OR_EXTENDED_REGS
SP_OR_EXTENDED_REGS
SP_OR_ADDRESS_OR_EXTENDED_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
FLOAT_REG0
LONG_FLOAT_REG0
FLOAT_REGS
FP_REGS
GEN_AND_FP_REGS
FRAME_POINTER_REG
STACK_POINTER_REG
GEN_AND_MEM_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R1_REGS
GENERAL_REGS
FPUPPER_REGS
FP_REGS
GENERAL_OR_FP_REGS
SHIFT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R1_REGS
GENERAL_REGS
FPUPPER_REGS
FP_REGS
GENERAL_OR_FP_REGS
SHIFT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
MUL_REGS
GENERAL_REGS
LOAD_FPU_REGS
NO_LOAD_FPU_REGS
FPU_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
OUT_REGS
STD_REGS
ARG_REGS
SRC_REGS
DST_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
R15_REGS
BASE_REGS
GENERAL_REGS
FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
BASE_REGS
GENERAL_REGS
FLOAT_REGS
ALTIVEC_REGS
VRSAVE_REGS
NON_SPECIAL_REGS
MQ_REGS
LINK_REGS
CTR_REGS
LINK_OR_CTR_REGS
SPECIAL_REGS
SPEC_OR_GEN_REGS
CR0_REGS
CR_REGS
NON_FLOAT_REGS
XER_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ADDR_REGS
GENERAL_REGS
FP_REGS
ADDR_FP_REGS
GENERAL_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
PR_REGS
T_REGS
MAC_REGS
FPUL_REGS
SIBCALL_REGS
GENERAL_REGS
FP0_REGS
FP_REGS
DF_REGS
FPSCR_REGS
GENERAL_FP_REGS
TARGET_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
M16_NA_REGS
M16_REGS
T_REG
M16_T_REGS
GR_REGS
FP_REGS
HI_REG
LO_REG
HILO_REG
MD_REGS
COP0_REGS
COP2_REGS
COP3_REGS
HI_AND_GR_REGS
LO_AND_GR_REGS
HILO_AND_GR_REGS
HI_AND_FP_REGS
COP0_AND_GR_REGS
COP2_AND_GR_REGS
COP3_AND_GR_REGS
ALL_COP_REGS
ALL_COP_AND_GR_REGS
ST_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
FPCC_REGS
I64_REGS
GENERAL_REGS
FP_REGS
EXTRA_FP_REGS
GENERAL_OR_FP_REGS
GENERAL_OR_EXTRA_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
R1_REGS
TWO_REGS
R2_REGS
EIGHT_REGS
R8_REGS
ICALL_REGS
GENERAL_REGS
CARRY_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
BR_REGS
FP_REGS
ACC_REG
SP_REG
RL_REGS
GR_REGS
AR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
M16_NA_REGS
M16_REGS
T_REG
M16_T_REGS
GR_REGS
FP_REGS
HI_REG
LO_REG
HILO_REG
MD_REGS
COP0_REGS
COP2_REGS
COP3_REGS
HI_AND_GR_REGS
LO_AND_GR_REGS
HILO_AND_GR_REGS
HI_AND_FP_REGS
COP0_AND_GR_REGS
COP2_AND_GR_REGS
COP3_AND_GR_REGS
ALL_COP_REGS
ALL_COP_AND_GR_REGS
ST_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
M16_NA_REGS
M16_REGS
T_REG
M16_T_REGS
GR_REGS
FP_REGS
HI_REG
LO_REG
HILO_REG
MD_REGS
COP0_REGS
COP2_REGS
COP3_REGS
HI_AND_GR_REGS
LO_AND_GR_REGS
HILO_AND_GR_REGS
HI_AND_FP_REGS
COP0_AND_GR_REGS
COP2_AND_GR_REGS
COP3_AND_GR_REGS
ALL_COP_REGS
ALL_COP_AND_GR_REGS
ST_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R2
R0_1
INDEX_REGS
BASE_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
LR0_REGS
GENERAL_REGS
BP_REGS
FC_REGS
CR_REGS
Q_REGS
SPECIAL_REGS
ACCUM0_REGS
ACCUM_REGS
FLOAT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R24_REG
R25_REG
R27_REG
GENERAL_REGS
FLOAT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
LPCOUNT_REG
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
FPU_REGS
LO_REGS
STACK_REG
BASE_REGS
HI_REGS
CC_REG
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REG
POINTER_X_REGS
POINTER_Y_REGS
POINTER_Z_REGS
STACK_REG
BASE_POINTER_REGS
POINTER_REGS
ADDW_REGS
SIMPLE_LD_REGS
LD_REGS
NO_LD_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0R1_REGS
R2R3_REGS
EXT_LOW_REGS
EXT_REGS
ADDR_REGS
INDEX_REGS
BK_REG
SP_REG
RC_REG
COUNTER_REGS
INT_REGS
GENERAL_REGS
DP_REG
ST_REG
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
FLOAT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
S_REGS
INDEX_REGS
SP_REGS
A_REGS
SI_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
REPEAT_REGS
CR_REGS
ACCUM_REGS
OTHER_FLAG_REGS
F0_REGS
F1_REGS
BR_FLAG_REGS
FLAG_REGS
EVEN_REGS
GPR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
A0H_REG
A0L_REG
A0_REG
A1H_REG
ACCUM_HIGH_REGS
A1L_REG
ACCUM_LOW_REGS
A1_REG
ACCUM_REGS
X_REG
X_OR_ACCUM_LOW_REGS
X_OR_ACCUM_REGS
YH_REG
YH_OR_ACCUM_HIGH_REGS
X_OR_YH_REGS
YL_REG
YL_OR_ACCUM_LOW_REGS
X_OR_YL_REGS
X_OR_Y_REGS
Y_REG
ACCUM_OR_Y_REGS
PH_REG
X_OR_PH_REGS
PL_REG
PL_OR_ACCUM_LOW_REGS
X_OR_PL_REGS
YL_OR_PL_OR_ACCUM_LOW_REGS
P_REG
ACCUM_OR_P_REGS
YL_OR_P_REGS
ACCUM_LOW_OR_YL_OR_P_REGS
Y_OR_P_REGS
ACCUM_Y_OR_P_REGS
NO_FRAME_Y_ADDR_REGS
Y_ADDR_REGS
ACCUM_LOW_OR_Y_ADDR_REGS
ACCUM_OR_Y_ADDR_REGS
X_OR_Y_ADDR_REGS
Y_OR_Y_ADDR_REGS
P_OR_Y_ADDR_REGS
NON_HIGH_YBASE_ELIGIBLE_REGS
YBASE_ELIGIBLE_REGS
J_REG
J_OR_DAU_16_BIT_REGS
BMU_REGS
NOHIGH_NON_ADDR_REGS
NON_ADDR_REGS
SLOW_MEM_LOAD_REGS
NOHIGH_NON_YBASE_REGS
NO_ACCUM_NON_YBASE_REGS
NON_YBASE_REGS
YBASE_VIRT_REGS
ACCUM_LOW_OR_YBASE_REGS
ACCUM_OR_YBASE_REGS
X_OR_YBASE_REGS
Y_OR_YBASE_REGS
ACCUM_LOW_YL_PL_OR_YBASE_REGS
P_OR_YBASE_REGS
ACCUM_Y_P_OR_YBASE_REGS
Y_ADDR_OR_YBASE_REGS
YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS
YBASE_OR_YBASE_ELIGIBLE_REGS
NO_HIGH_ALL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
MULTIPLY_32_REG
MULTIPLY_64_REG
LOW_REGS
HIGH_REGS
REAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
MAC_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ADDR_REGS
DATA_REGS
FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
AREG
DREG
CREG
BREG
SIREG
DIREG
AD_REGS
Q_REGS
NON_Q_REGS
INDEX_REGS
LEGACY_REGS
GENERAL_REGS
FP_TOP_REG
FP_SECOND_REG
FLOAT_REGS
SSE_REGS
MMX_REGS
FP_TOP_SSE_REGS
FP_SECOND_SSE_REGS
FLOAT_SSE_REGS
FLOAT_INT_REGS
INT_SSE_REGS
FLOAT_INT_SSE_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GLOBAL_REGS
LOCAL_REGS
LOCAL_OR_GLOBAL_REGS
FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
PR_REGS
BR_REGS
AR_M_REGS
AR_I_REGS
ADDL_REGS
GR_REGS
FR_REGS
GR_AND_BR_REGS
GR_AND_FR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
CARRY_REG
ACCUM_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
D_REGS
X_REGS
Y_REGS
SP_REGS
DA_REGS
DB_REGS
Z_REGS
D8_REGS
Q_REGS
D_OR_X_REGS
D_OR_Y_REGS
D_OR_SP_REGS
X_OR_Y_REGS
A_REGS
X_OR_SP_REGS
Y_OR_SP_REGS
X_OR_Y_OR_D_REGS
A_OR_D_REGS
A_OR_SP_REGS
H_REGS
S_REGS
D_OR_S_REGS
X_OR_S_REGS
Y_OR_S_REGS
SP_OR_S_REGS
D_OR_X_OR_S_REGS
D_OR_Y_OR_S_REGS
D_OR_SP_OR_S_REGS
A_OR_S_REGS
D_OR_A_OR_S_REGS
TMP_REGS
D_OR_A_OR_TMP_REGS
G_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDR_REGS
FP_REGS
GENERAL_REGS
DATA_OR_FP_REGS
ADDR_OR_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
AP_REG
XRF_REGS
GENERAL_REGS
AGRF_REGS
XGRF_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ONLYR1_REGS
LRW_REGS
GENERAL_REGS
C_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
REMAINDER_REG
HIMULT_REG
SYSTEM_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDRESS_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDRESS_REGS
SP_REGS
DATA_OR_ADDRESS_REGS
SP_OR_ADDRESS_REGS
EXTENDED_REGS
DATA_OR_EXTENDED_REGS
ADDRESS_OR_EXTENDED_REGS
SP_OR_EXTENDED_REGS
SP_OR_ADDRESS_OR_EXTENDED_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
FLOAT_REG0
LONG_FLOAT_REG0
FLOAT_REGS
FP_REGS
GEN_AND_FP_REGS
FRAME_POINTER_REG
STACK_POINTER_REG
GEN_AND_MEM_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R1_REGS
GENERAL_REGS
FPUPPER_REGS
FP_REGS
GENERAL_OR_FP_REGS
SHIFT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R1_REGS
GENERAL_REGS
FPUPPER_REGS
FP_REGS
GENERAL_OR_FP_REGS
SHIFT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
MUL_REGS
GENERAL_REGS
LOAD_FPU_REGS
NO_LOAD_FPU_REGS
FPU_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
OUT_REGS
STD_REGS
ARG_REGS
SRC_REGS
DST_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
R15_REGS
BASE_REGS
GENERAL_REGS
FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
BASE_REGS
GENERAL_REGS
FLOAT_REGS
ALTIVEC_REGS
VRSAVE_REGS
NON_SPECIAL_REGS
MQ_REGS
LINK_REGS
CTR_REGS
LINK_OR_CTR_REGS
SPECIAL_REGS
SPEC_OR_GEN_REGS
CR0_REGS
CR_REGS
NON_FLOAT_REGS
XER_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ADDR_REGS
GENERAL_REGS
FP_REGS
ADDR_FP_REGS
GENERAL_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
PR_REGS
T_REGS
MAC_REGS
FPUL_REGS
SIBCALL_REGS
GENERAL_REGS
FP0_REGS
FP_REGS
DF_REGS
FPSCR_REGS
GENERAL_FP_REGS
TARGET_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
M16_NA_REGS
M16_REGS
T_REG
M16_T_REGS
GR_REGS
FP_REGS
HI_REG
LO_REG
HILO_REG
MD_REGS
COP0_REGS
COP2_REGS
COP3_REGS
HI_AND_GR_REGS
LO_AND_GR_REGS
HILO_AND_GR_REGS
HI_AND_FP_REGS
COP0_AND_GR_REGS
COP2_AND_GR_REGS
COP3_AND_GR_REGS
ALL_COP_REGS
ALL_COP_AND_GR_REGS
ST_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
FPCC_REGS
I64_REGS
GENERAL_REGS
FP_REGS
EXTRA_FP_REGS
GENERAL_OR_FP_REGS
GENERAL_OR_EXTRA_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
R1_REGS
TWO_REGS
R2_REGS
EIGHT_REGS
R8_REGS
ICALL_REGS
GENERAL_REGS
CARRY_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
BR_REGS
FP_REGS
ACC_REG
SP_REG
RL_REGS
GR_REGS
AR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
M16_NA_REGS
M16_REGS
T_REG
M16_T_REGS
GR_REGS
FP_REGS
HI_REG
LO_REG
HILO_REG
MD_REGS
COP0_REGS
COP2_REGS
COP3_REGS
HI_AND_GR_REGS
LO_AND_GR_REGS
HILO_AND_GR_REGS
HI_AND_FP_REGS
COP0_AND_GR_REGS
COP2_AND_GR_REGS
COP3_AND_GR_REGS
ALL_COP_REGS
ALL_COP_AND_GR_REGS
ST_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
M16_NA_REGS
M16_REGS
T_REG
M16_T_REGS
GR_REGS
FP_REGS
HI_REG
LO_REG
HILO_REG
MD_REGS
COP0_REGS
COP2_REGS
COP3_REGS
HI_AND_GR_REGS
LO_AND_GR_REGS
HILO_AND_GR_REGS
HI_AND_FP_REGS
COP0_AND_GR_REGS
COP2_AND_GR_REGS
COP3_AND_GR_REGS
ALL_COP_REGS
ALL_COP_AND_GR_REGS
ST_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REG
R24_REG
R25_REG
R27_REG
GENERAL_REGS
FLOAT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
LPCOUNT_REG
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
FPA_REGS
CIRRUS_REGS
VFP_REGS
IWMMXT_GR_REGS
IWMMXT_REGS
LO_REGS
STACK_REG
BASE_REGS
HI_REGS
CC_REG
VFPCC_REG
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REG
POINTER_X_REGS
POINTER_Y_REGS
POINTER_Z_REGS
STACK_REG
BASE_POINTER_REGS
POINTER_REGS
ADDW_REGS
SIMPLE_LD_REGS
LD_REGS
NO_LD_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
IREGS
BREGS
LREGS
MREGS
CIRCREGS
DAGREGS
EVEN_AREGS
ODD_AREGS
AREGS
CCREGS
EVEN_DREGS
ODD_DREGS
DREGS
PREGS_CLOBBERED
PREGS
DPREGS
MOST_REGS
PROLOGUE_REGS
NON_A_CC_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0R1_REGS
R2R3_REGS
EXT_LOW_REGS
EXT_REGS
ADDR_REGS
INDEX_REGS
BK_REG
SP_REG
RC_REG
COUNTER_REGS
INT_REGS
GENERAL_REGS
DP_REG
ST_REG
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
MULTIPLY_32_REG
MULTIPLY_64_REG
LOW_REGS
HIGH_REGS
REAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ICC_REGS
FCC_REGS
CC_REGS
ICR_REGS
FCR_REGS
CR_REGS
LCR_REG
LR_REG
GR8_REGS
GR9_REGS
GR89_REGS
FDPIC_REGS
FDPIC_FPTR_REGS
FDPIC_CALL_REGS
SPR_REGS
QUAD_ACC_REGS
EVEN_ACC_REGS
ACC_REGS
ACCG_REGS
QUAD_FPR_REGS
FEVEN_REGS
FPR_REGS
QUAD_REGS
EVEN_REGS
GPR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
COUNTER_REGS
SOURCE_REGS
DESTINATION_REGS
GENERAL_REGS
MAC_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
AREG
DREG
CREG
BREG
SIREG
DIREG
AD_REGS
Q_REGS
NON_Q_REGS
INDEX_REGS
LEGACY_REGS
GENERAL_REGS
FP_TOP_REG
FP_SECOND_REG
FLOAT_REGS
SSE_REGS
MMX_REGS
FP_TOP_SSE_REGS
FP_SECOND_SSE_REGS
FLOAT_SSE_REGS
FLOAT_INT_REGS
INT_SSE_REGS
FLOAT_INT_SSE_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
PR_REGS
BR_REGS
AR_M_REGS
AR_I_REGS
ADDL_REGS
GR_REGS
FR_REGS
GR_AND_BR_REGS
GR_AND_FR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DPH_REGS
DPL_REGS
DP_REGS
SP_REGS
IPH_REGS
IPL_REGS
IP_REGS
DP_SP_REGS
PTR_REGS
NONPTR_REGS
NONSP_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
CARRY_REG
ACCUM_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
D_REGS
X_REGS
Y_REGS
SP_REGS
DA_REGS
DB_REGS
Z_REGS
D8_REGS
Q_REGS
D_OR_X_REGS
D_OR_Y_REGS
D_OR_SP_REGS
X_OR_Y_REGS
A_REGS
X_OR_SP_REGS
Y_OR_SP_REGS
X_OR_Y_OR_D_REGS
A_OR_D_REGS
A_OR_SP_REGS
H_REGS
S_REGS
D_OR_S_REGS
X_OR_S_REGS
Y_OR_S_REGS
Z_OR_S_REGS
SP_OR_S_REGS
D_OR_X_OR_S_REGS
D_OR_Y_OR_S_REGS
D_OR_SP_OR_S_REGS
A_OR_S_REGS
D_OR_A_OR_S_REGS
TMP_REGS
D_OR_A_OR_TMP_REGS
G_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDR_REGS
FP_REGS
GENERAL_REGS
DATA_OR_FP_REGS
ADDR_OR_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ONLYR1_REGS
LRW_REGS
GENERAL_REGS
C_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
M16_NA_REGS
M16_REGS
T_REG
M16_T_REGS
PIC_FN_ADDR_REG
LEA_REGS
GR_REGS
FP_REGS
HI_REG
LO_REG
MD_REGS
COP0_REGS
COP2_REGS
COP3_REGS
HI_AND_GR_REGS
LO_AND_GR_REGS
HI_AND_FP_REGS
COP0_AND_GR_REGS
COP2_AND_GR_REGS
COP3_AND_GR_REGS
ALL_COP_REGS
ALL_COP_AND_GR_REGS
ST_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
REMAINDER_REG
HIMULT_REG
SYSTEM_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDRESS_REGS
SP_REGS
DATA_OR_ADDRESS_REGS
SP_OR_ADDRESS_REGS
EXTENDED_REGS
DATA_OR_EXTENDED_REGS
ADDRESS_OR_EXTENDED_REGS
SP_OR_EXTENDED_REGS
SP_OR_ADDRESS_OR_EXTENDED_REGS
FP_REGS
FP_ACC_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
FLOAT_REG0
LONG_FLOAT_REG0
FLOAT_REGS
LONG_REGS
FP_REGS
GEN_AND_FP_REGS
FRAME_POINTER_REG
STACK_POINTER_REG
GEN_AND_MEM_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R1_REGS
GENERAL_REGS
FPUPPER_REGS
FP_REGS
GENERAL_OR_FP_REGS
SHIFT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R1_REGS
GENERAL_REGS
FPUPPER_REGS
FP_REGS
GENERAL_OR_FP_REGS
SHIFT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
MUL_REGS
GENERAL_REGS
LOAD_FPU_REGS
NO_LOAD_FPU_REGS
FPU_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
BASE_REGS
GENERAL_REGS
FLOAT_REGS
ALTIVEC_REGS
VRSAVE_REGS
VSCR_REGS
SPE_ACC_REGS
SPEFSCR_REGS
NON_SPECIAL_REGS
MQ_REGS
LINK_REGS
CTR_REGS
LINK_OR_CTR_REGS
SPECIAL_REGS
SPEC_OR_GEN_REGS
CR0_REGS
CR_REGS
NON_FLOAT_REGS
XER_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
CC_REGS
ADDR_REGS
GENERAL_REGS
ACCESS_REGS
ADDR_CC_REGS
GENERAL_CC_REGS
FP_REGS
ADDR_FP_REGS
GENERAL_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
PR_REGS
T_REGS
MAC_REGS
FPUL_REGS
SIBCALL_REGS
GENERAL_REGS
FP0_REGS
FP_REGS
DF_HI_REGS
DF_REGS
FPSCR_REGS
GENERAL_FP_REGS
TARGET_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
FPCC_REGS
I64_REGS
GENERAL_REGS
FP_REGS
EXTRA_FP_REGS
GENERAL_OR_FP_REGS
GENERAL_OR_EXTRA_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
R1_REGS
TWO_REGS
R2_REGS
EIGHT_REGS
R8_REGS
ICALL_REGS
GENERAL_REGS
CARRY_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
BR_REGS
FP_REGS
ACC_REG
SP_REG
RL_REGS
GR_REGS
AR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REG
R24_REG
R25_REG
R27_REG
GENERAL_REGS
FLOAT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
LPCOUNT_REG
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
FPA_REGS
CIRRUS_REGS
VFP_REGS
IWMMXT_GR_REGS
IWMMXT_REGS
LO_REGS
STACK_REG
BASE_REGS
HI_REGS
CC_REG
VFPCC_REG
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REG
POINTER_X_REGS
POINTER_Y_REGS
POINTER_Z_REGS
STACK_REG
BASE_POINTER_REGS
POINTER_REGS
ADDW_REGS
SIMPLE_LD_REGS
LD_REGS
NO_LD_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
IREGS
BREGS
LREGS
MREGS
CIRCREGS
DAGREGS
EVEN_AREGS
ODD_AREGS
AREGS
CCREGS
EVEN_DREGS
ODD_DREGS
DREGS
FDPIC_REGS
FDPIC_FPTR_REGS
PREGS_CLOBBERED
PREGS
IPREGS
DPREGS
MOST_REGS
LT_REGS
LC_REGS
LB_REGS
PROLOGUE_REGS
NON_A_CC_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0R1_REGS
R2R3_REGS
EXT_LOW_REGS
EXT_REGS
ADDR_REGS
INDEX_REGS
BK_REG
SP_REG
RC_REG
COUNTER_REGS
INT_REGS
GENERAL_REGS
DP_REG
ST_REG
ALL_REGS
LIM_REG_CLASSES
NO_REGS
MOF_REGS
CC0_REGS
SPECIAL_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
LO_REGS
HI_REGS
HILO_REGS
NOSP_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
MULTIPLY_32_REG
MULTIPLY_64_REG
LOW_REGS
HIGH_REGS
REAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ICC_REGS
FCC_REGS
CC_REGS
ICR_REGS
FCR_REGS
CR_REGS
LCR_REG
LR_REG
GR8_REGS
GR9_REGS
GR89_REGS
FDPIC_REGS
FDPIC_FPTR_REGS
FDPIC_CALL_REGS
SPR_REGS
QUAD_ACC_REGS
EVEN_ACC_REGS
ACC_REGS
ACCG_REGS
QUAD_FPR_REGS
FEVEN_REGS
FPR_REGS
QUAD_REGS
EVEN_REGS
GPR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
COUNTER_REGS
SOURCE_REGS
DESTINATION_REGS
GENERAL_REGS
MAC_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
AREG
DREG
CREG
BREG
SIREG
DIREG
AD_REGS
Q_REGS
NON_Q_REGS
INDEX_REGS
LEGACY_REGS
GENERAL_REGS
FP_TOP_REG
FP_SECOND_REG
FLOAT_REGS
SSE_REGS
MMX_REGS
FP_TOP_SSE_REGS
FP_SECOND_SSE_REGS
FLOAT_SSE_REGS
FLOAT_INT_REGS
INT_SSE_REGS
FLOAT_INT_SSE_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
PR_REGS
BR_REGS
AR_M_REGS
AR_I_REGS
ADDL_REGS
GR_REGS
FP_REGS
FR_REGS
GR_AND_BR_REGS
GR_AND_FR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GR_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
SP_REGS
FB_REGS
SB_REGS
CR_REGS
R0_REGS
R1_REGS
R2_REGS
R3_REGS
R02_REGS
HL_REGS
QI_REGS
R23_REGS
R03_REGS
DI_REGS
A0_REGS
A1_REGS
A_REGS
AD_REGS
PS_REGS
SI_REGS
HI_REGS
RA_REGS
GENERAL_REGS
FLG_REGS
HC_REGS
MEM_REGS
R02_A_MEM_REGS
A_HL_MEM_REGS
R1_R3_A_MEM_REGS
R03_MEM_REGS
A_HI_MEM_REGS
A_AD_CR_MEM_SI_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
CARRY_REG
ACCUM_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
D_REGS
X_REGS
Y_REGS
SP_REGS
DA_REGS
DB_REGS
Z_REGS
D8_REGS
Q_REGS
D_OR_X_REGS
D_OR_Y_REGS
D_OR_SP_REGS
X_OR_Y_REGS
A_REGS
X_OR_SP_REGS
Y_OR_SP_REGS
X_OR_Y_OR_D_REGS
A_OR_D_REGS
A_OR_SP_REGS
H_REGS
S_REGS
D_OR_S_REGS
X_OR_S_REGS
Y_OR_S_REGS
Z_OR_S_REGS
SP_OR_S_REGS
D_OR_X_OR_S_REGS
D_OR_Y_OR_S_REGS
D_OR_SP_OR_S_REGS
A_OR_S_REGS
D_OR_A_OR_S_REGS
TMP_REGS
D_OR_A_OR_TMP_REGS
G_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDR_REGS
FP_REGS
GENERAL_REGS
DATA_OR_FP_REGS
ADDR_OR_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ONLYR1_REGS
LRW_REGS
GENERAL_REGS
C_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
M16_NA_REGS
M16_REGS
T_REG
M16_T_REGS
PIC_FN_ADDR_REG
V1_REG
LEA_REGS
GR_REGS
FP_REGS
HI_REG
LO_REG
MD_REGS
COP0_REGS
COP2_REGS
COP3_REGS
HI_AND_GR_REGS
LO_AND_GR_REGS
HI_AND_FP_REGS
COP0_AND_GR_REGS
COP2_AND_GR_REGS
COP3_AND_GR_REGS
ALL_COP_REGS
ALL_COP_AND_GR_REGS
ST_REGS
DSP_ACC_REGS
ACC_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
REMAINDER_REG
HIMULT_REG
SYSTEM_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
DATA_REGS
ADDRESS_REGS
SP_REGS
DATA_OR_ADDRESS_REGS
SP_OR_ADDRESS_REGS
EXTENDED_REGS
DATA_OR_EXTENDED_REGS
ADDRESS_OR_EXTENDED_REGS
SP_OR_EXTENDED_REGS
SP_OR_ADDRESS_OR_EXTENDED_REGS
FP_REGS
FP_ACC_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R1_REGS
GENERAL_REGS
FPUPPER_REGS
FP_REGS
GENERAL_OR_FP_REGS
SHIFT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R1_REGS
GENERAL_REGS
FPUPPER_REGS
FP_REGS
GENERAL_OR_FP_REGS
SHIFT_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
MUL_REGS
GENERAL_REGS
LOAD_FPU_REGS
NO_LOAD_FPU_REGS
FPU_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
BASE_REGS
GENERAL_REGS
FLOAT_REGS
ALTIVEC_REGS
VRSAVE_REGS
VSCR_REGS
SPE_ACC_REGS
SPEFSCR_REGS
NON_SPECIAL_REGS
MQ_REGS
LINK_REGS
CTR_REGS
LINK_OR_CTR_REGS
SPECIAL_REGS
SPEC_OR_GEN_REGS
CR0_REGS
CR_REGS
NON_FLOAT_REGS
XER_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
CC_REGS
ADDR_REGS
GENERAL_REGS
ACCESS_REGS
ADDR_CC_REGS
GENERAL_CC_REGS
FP_REGS
ADDR_FP_REGS
GENERAL_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
G16_REGS
G32_REGS
T32_REGS
HI_REG
LO_REG
CE_REGS
CN_REG
LC_REG
SC_REG
SP_REGS
CR_REGS
CP1_REGS
CP2_REGS
CP3_REGS
CPA_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
PR_REGS
T_REGS
MAC_REGS
FPUL_REGS
SIBCALL_REGS
GENERAL_REGS
FP0_REGS
FP_REGS
DF_HI_REGS
DF_REGS
FPSCR_REGS
GENERAL_FP_REGS
GENERAL_DF_REGS
TARGET_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
FPCC_REGS
I64_REGS
GENERAL_REGS
FP_REGS
EXTRA_FP_REGS
GENERAL_OR_FP_REGS
GENERAL_OR_EXTRA_FP_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
R0_REGS
R1_REGS
TWO_REGS
R2_REGS
EIGHT_REGS
R8_REGS
ICALL_REGS
GENERAL_REGS
CARRY_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
GENERAL_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
ALL_REGS
LIM_REG_CLASSES
NO_REGS
BR_REGS
FP_REGS
ACC_REG
SP_REG
RL_REGS
GR_REGS
AR_REGS
ALL_REGS
LIM_REG_CLASSES

Definition at line 295 of file mt.h.

enum save_direction

Enumerator:

FROM_PROCESSOR_TO_MEM
FROM_MEM_TO_PROCESSOR

Definition at line 403 of file mt.h.

---

Variable Documentation

struct mt_frame_info current_frame_info

Definition at line 68 of file dsp16xx.c.

struct rtx_def* mt_compare_op0

Definition at line 74 of file mt.c.

struct rtx_def* mt_compare_op1

Definition at line 75 of file mt.c.

enum processor_type mt_cpu

Definition at line 778 of file mt.c.

Referenced by mt_override_options().

struct rtx_def* mt_ucmpsi3_libcall

Definition at line 84 of file mt.c.