Open64: osprey/cygnus/opcodes/xstormy16-opc.c Source File

00001 /*
00002  * Copyright 2003, 2004, 2005, 2006 PathScale, Inc.  All Rights Reserved.
00003  */
00004 
00005 /* Instruction opcode table for xstormy16.
00006 
00007 THIS FILE IS MACHINE GENERATED WITH CGEN.
00008 
00009 Copyright 1996-2005 Free Software Foundation, Inc.
00010 
00011 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
00012 
00013 This program is free software; you can redistribute it and/or modify
00014 it under the terms of the GNU General Public License as published by
00015 the Free Software Foundation; either version 2, or (at your option)
00016 any later version.
00017 
00018 This program is distributed in the hope that it will be useful,
00019 but WITHOUT ANY WARRANTY; without even the implied warranty of
00020 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
00021 GNU General Public License for more details.
00022 
00023 You should have received a copy of the GNU General Public License along
00024 with this program; if not, write to the Free Software Foundation, Inc.,
00025 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
00026 
00027 */
00028 
00029 #include "sysdep.h"
00030 #include "ansidecl.h"
00031 #include "bfd.h"
00032 #include "symcat.h"
00033 #include "xstormy16-desc.h"
00034 #include "xstormy16-opc.h"
00035 #include "libiberty.h"
00036 
00037 /* The hash functions are recorded here to help keep assembler code out of
00038    the disassembler and vice versa.  */
00039 
00040 static int asm_hash_insn_p PARAMS ((const CGEN_INSN *));
00041 static unsigned int asm_hash_insn PARAMS ((const char *));
00042 static int dis_hash_insn_p PARAMS ((const CGEN_INSN *));
00043 static unsigned int dis_hash_insn PARAMS ((const char *, CGEN_INSN_INT));
00044 
00045 /* Instruction formats.  */
00046 
00047 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
00048 #define F(f) & xstormy16_cgen_ifld_table[XSTORMY16_##f]
00049 #else
00050 #define F(f) & xstormy16_cgen_ifld_table[XSTORMY16_f]
00051 #endif
00052 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
00053   0, 0, 0x0, { { 0 } }
00054 };
00055 
00056 static const CGEN_IFMT ifmt_movlmemimm ATTRIBUTE_UNUSED = {
00057   32, 32, 0xfe000000, { { F (F_OP1) }, { F (F_OP2A) }, { F (F_OP2M) }, { F (F_LMEM8) }, { F (F_IMM16) }, { 0 } }
00058 };
00059 
00060 static const CGEN_IFMT ifmt_movhmemimm ATTRIBUTE_UNUSED = {
00061   32, 32, 0xfe000000, { { F (F_OP1) }, { F (F_OP2A) }, { F (F_OP2M) }, { F (F_HMEM8) }, { F (F_IMM16) }, { 0 } }
00062 };
00063 
00064 static const CGEN_IFMT ifmt_movlgrmem ATTRIBUTE_UNUSED = {
00065   16, 16, 0xf000, { { F (F_OP1) }, { F (F_RM) }, { F (F_OP2M) }, { F (F_LMEM8) }, { 0 } }
00066 };
00067 
00068 static const CGEN_IFMT ifmt_movhgrmem ATTRIBUTE_UNUSED = {
00069   16, 16, 0xf000, { { F (F_OP1) }, { F (F_RM) }, { F (F_OP2M) }, { F (F_HMEM8) }, { 0 } }
00070 };
00071 
00072 static const CGEN_IFMT ifmt_movgrgri ATTRIBUTE_UNUSED = {
00073   16, 16, 0xfe08, { { F (F_OP1) }, { F (F_OP2A) }, { F (F_OP2M) }, { F (F_RS) }, { F (F_OP4M) }, { F (F_RDM) }, { 0 } }
00074 };
00075 
00076 static const CGEN_IFMT ifmt_movgrgrii ATTRIBUTE_UNUSED = {
00077   32, 32, 0xfe08f000, { { F (F_OP1) }, { F (F_OP2A) }, { F (F_OP2M) }, { F (F_RS) }, { F (F_OP4M) }, { F (F_RDM) }, { F (F_OP5) }, { F (F_IMM12) }, { 0 } }
00078 };
00079 
00080 static const CGEN_IFMT ifmt_movgrgr ATTRIBUTE_UNUSED = {
00081   16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_RS) }, { F (F_RD) }, { 0 } }
00082 };
00083 
00084 static const CGEN_IFMT ifmt_movwimm8 ATTRIBUTE_UNUSED = {
00085   16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_IMM8) }, { 0 } }
00086 };
00087 
00088 static const CGEN_IFMT ifmt_movwgrimm8 ATTRIBUTE_UNUSED = {
00089   16, 16, 0xf100, { { F (F_OP1) }, { F (F_RM) }, { F (F_OP2M) }, { F (F_IMM8) }, { 0 } }
00090 };
00091 
00092 static const CGEN_IFMT ifmt_movwgrimm16 ATTRIBUTE_UNUSED = {
00093   32, 32, 0xfff00000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RD) }, { F (F_IMM16) }, { 0 } }
00094 };
00095 
00096 static const CGEN_IFMT ifmt_movlowgr ATTRIBUTE_UNUSED = {
00097   16, 16, 0xfff0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RD) }, { 0 } }
00098 };
00099 
00100 static const CGEN_IFMT ifmt_movfgrgrii ATTRIBUTE_UNUSED = {
00101   32, 32, 0xfe088000, { { F (F_OP1) }, { F (F_OP2A) }, { F (F_OP2M) }, { F (F_RS) }, { F (F_OP4M) }, { F (F_RDM) }, { F (F_OP5A) }, { F (F_RB) }, { F (F_IMM12) }, { 0 } }
00102 };
00103 
00104 static const CGEN_IFMT ifmt_addgrimm4 ATTRIBUTE_UNUSED = {
00105   16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_IMM4) }, { F (F_RD) }, { 0 } }
00106 };
00107 
00108 static const CGEN_IFMT ifmt_incgrimm2 ATTRIBUTE_UNUSED = {
00109   16, 16, 0xffc0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3A) }, { F (F_IMM2) }, { F (F_RD) }, { 0 } }
00110 };
00111 
00112 static const CGEN_IFMT ifmt_set1lmemimm ATTRIBUTE_UNUSED = {
00113   16, 16, 0xf100, { { F (F_OP1) }, { F (F_IMM3) }, { F (F_OP2M) }, { F (F_LMEM8) }, { 0 } }
00114 };
00115 
00116 static const CGEN_IFMT ifmt_set1hmemimm ATTRIBUTE_UNUSED = {
00117   16, 16, 0xf100, { { F (F_OP1) }, { F (F_IMM3) }, { F (F_OP2M) }, { F (F_HMEM8) }, { 0 } }
00118 };
00119 
00120 static const CGEN_IFMT ifmt_bccgrgr ATTRIBUTE_UNUSED = {
00121   32, 32, 0xff000000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_RS) }, { F (F_RD) }, { F (F_OP5) }, { F (F_REL12) }, { 0 } }
00122 };
00123 
00124 static const CGEN_IFMT ifmt_bccgrimm8 ATTRIBUTE_UNUSED = {
00125   32, 32, 0xf1000000, { { F (F_OP1) }, { F (F_RM) }, { F (F_OP2M) }, { F (F_IMM8) }, { F (F_OP5) }, { F (F_REL12) }, { 0 } }
00126 };
00127 
00128 static const CGEN_IFMT ifmt_bccimm16 ATTRIBUTE_UNUSED = {
00129   32, 32, 0xf0000000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_REL8_4) }, { F (F_IMM16) }, { 0 } }
00130 };
00131 
00132 static const CGEN_IFMT ifmt_bngrimm4 ATTRIBUTE_UNUSED = {
00133   32, 32, 0xff00f000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_IMM4) }, { F (F_RD) }, { F (F_OP5) }, { F (F_REL12) }, { 0 } }
00134 };
00135 
00136 static const CGEN_IFMT ifmt_bngrgr ATTRIBUTE_UNUSED = {
00137   32, 32, 0xff00f000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_RS) }, { F (F_RD) }, { F (F_OP5) }, { F (F_REL12) }, { 0 } }
00138 };
00139 
00140 static const CGEN_IFMT ifmt_bnlmemimm ATTRIBUTE_UNUSED = {
00141   32, 32, 0xff008000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_LMEM8) }, { F (F_OP5A) }, { F (F_IMM3B) }, { F (F_REL12) }, { 0 } }
00142 };
00143 
00144 static const CGEN_IFMT ifmt_bnhmemimm ATTRIBUTE_UNUSED = {
00145   32, 32, 0xff008000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_HMEM8) }, { F (F_OP5A) }, { F (F_IMM3B) }, { F (F_REL12) }, { 0 } }
00146 };
00147 
00148 static const CGEN_IFMT ifmt_bcc ATTRIBUTE_UNUSED = {
00149   16, 16, 0xf000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_REL8_2) }, { 0 } }
00150 };
00151 
00152 static const CGEN_IFMT ifmt_br ATTRIBUTE_UNUSED = {
00153   16, 16, 0xf001, { { F (F_OP1) }, { F (F_REL12A) }, { F (F_OP4B) }, { 0 } }
00154 };
00155 
00156 static const CGEN_IFMT ifmt_jmp ATTRIBUTE_UNUSED = {
00157   16, 16, 0xffe0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3B) }, { F (F_RBJ) }, { F (F_RD) }, { 0 } }
00158 };
00159 
00160 static const CGEN_IFMT ifmt_jmpf ATTRIBUTE_UNUSED = {
00161   32, 32, 0xff000000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_ABS24) }, { 0 } }
00162 };
00163 
00164 static const CGEN_IFMT ifmt_iret ATTRIBUTE_UNUSED = {
00165   16, 16, 0xffff, { { F (F_OP) }, { 0 } }
00166 };
00167 
00168 #undef F
00169 
00170 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
00171 #define A(a) (1 << CGEN_INSN_##a)
00172 #else
00173 #define A(a) (1 << CGEN_INSN_a)
00174 #endif
00175 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
00176 #define OPERAND(op) XSTORMY16_OPERAND_##op
00177 #else
00178 #define OPERAND(op) XSTORMY16_OPERAND_op
00179 #endif
00180 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
00181 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
00182 
00183 /* The instruction table.  */
00184 
00185 static const CGEN_OPCODE xstormy16_cgen_insn_opcode_table[MAX_INSNS] =
00186 {
00187   /* Special null first entry.
00188      A `num' value of zero is thus invalid.
00189      Also, the special `invalid' insn resides here.  */
00190   { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
00191 /* mov$ws2 $lmem8,#$imm16 */
00192   {
00193     { 0, 0, 0, 0 },
00194     { { MNEM, OP (WS2), ' ', OP (LMEM8), ',', '#', OP (IMM16), 0 } },
00195     & ifmt_movlmemimm, { 0x78000000 }
00196   },
00197 /* mov$ws2 $hmem8,#$imm16 */
00198   {
00199     { 0, 0, 0, 0 },
00200     { { MNEM, OP (WS2), ' ', OP (HMEM8), ',', '#', OP (IMM16), 0 } },
00201     & ifmt_movhmemimm, { 0x7a000000 }
00202   },
00203 /* mov$ws2 $Rm,$lmem8 */
00204   {
00205     { 0, 0, 0, 0 },
00206     { { MNEM, OP (WS2), ' ', OP (RM), ',', OP (LMEM8), 0 } },
00207     & ifmt_movlgrmem, { 0x8000 }
00208   },
00209 /* mov$ws2 $Rm,$hmem8 */
00210   {
00211     { 0, 0, 0, 0 },
00212     { { MNEM, OP (WS2), ' ', OP (RM), ',', OP (HMEM8), 0 } },
00213     & ifmt_movhgrmem, { 0xa000 }
00214   },
00215 /* mov$ws2 $lmem8,$Rm */
00216   {
00217     { 0, 0, 0, 0 },
00218     { { MNEM, OP (WS2), ' ', OP (LMEM8), ',', OP (RM), 0 } },
00219     & ifmt_movlgrmem, { 0x9000 }
00220   },
00221 /* mov$ws2 $hmem8,$Rm */
00222   {
00223     { 0, 0, 0, 0 },
00224     { { MNEM, OP (WS2), ' ', OP (HMEM8), ',', OP (RM), 0 } },
00225     & ifmt_movhgrmem, { 0xb000 }
00226   },
00227 /* mov$ws2 $Rdm,($Rs) */
00228   {
00229     { 0, 0, 0, 0 },
00230     { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), ')', 0 } },
00231     & ifmt_movgrgri, { 0x7000 }
00232   },
00233 /* mov$ws2 $Rdm,($Rs++) */
00234   {
00235     { 0, 0, 0, 0 },
00236     { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), '+', '+', ')', 0 } },
00237     & ifmt_movgrgri, { 0x6000 }
00238   },
00239 /* mov$ws2 $Rdm,(--$Rs) */
00240   {
00241     { 0, 0, 0, 0 },
00242     { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', '-', '-', OP (RS), ')', 0 } },
00243     & ifmt_movgrgri, { 0x6800 }
00244   },
00245 /* mov$ws2 ($Rs),$Rdm */
00246   {
00247     { 0, 0, 0, 0 },
00248     { { MNEM, OP (WS2), ' ', '(', OP (RS), ')', ',', OP (RDM), 0 } },
00249     & ifmt_movgrgri, { 0x7200 }
00250   },
00251 /* mov$ws2 ($Rs++),$Rdm */
00252   {
00253     { 0, 0, 0, 0 },
00254     { { MNEM, OP (WS2), ' ', '(', OP (RS), '+', '+', ')', ',', OP (RDM), 0 } },
00255     & ifmt_movgrgri, { 0x6200 }
00256   },
00257 /* mov$ws2 (--$Rs),$Rdm */
00258   {
00259     { 0, 0, 0, 0 },
00260     { { MNEM, OP (WS2), ' ', '(', '-', '-', OP (RS), ')', ',', OP (RDM), 0 } },
00261     & ifmt_movgrgri, { 0x6a00 }
00262   },
00263 /* mov$ws2 $Rdm,($Rs,$imm12) */
00264   {
00265     { 0, 0, 0, 0 },
00266     { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), ',', OP (IMM12), ')', 0 } },
00267     & ifmt_movgrgrii, { 0x70080000 }
00268   },
00269 /* mov$ws2 $Rdm,($Rs++,$imm12) */
00270   {
00271     { 0, 0, 0, 0 },
00272     { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), '+', '+', ',', OP (IMM12), ')', 0 } },
00273     & ifmt_movgrgrii, { 0x60080000 }
00274   },
00275 /* mov$ws2 $Rdm,(--$Rs,$imm12) */
00276   {
00277     { 0, 0, 0, 0 },
00278     { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', '-', '-', OP (RS), ',', OP (IMM12), ')', 0 } },
00279     & ifmt_movgrgrii, { 0x68080000 }
00280   },
00281 /* mov$ws2 ($Rs,$imm12),$Rdm */
00282   {
00283     { 0, 0, 0, 0 },
00284     { { MNEM, OP (WS2), ' ', '(', OP (RS), ',', OP (IMM12), ')', ',', OP (RDM), 0 } },
00285     & ifmt_movgrgrii, { 0x72080000 }
00286   },
00287 /* mov$ws2 ($Rs++,$imm12),$Rdm */
00288   {
00289     { 0, 0, 0, 0 },
00290     { { MNEM, OP (WS2), ' ', '(', OP (RS), '+', '+', ',', OP (IMM12), ')', ',', OP (RDM), 0 } },
00291     & ifmt_movgrgrii, { 0x62080000 }
00292   },
00293 /* mov$ws2 (--$Rs,$imm12),$Rdm */
00294   {
00295     { 0, 0, 0, 0 },
00296     { { MNEM, OP (WS2), ' ', '(', '-', '-', OP (RS), ',', OP (IMM12), ')', ',', OP (RDM), 0 } },
00297     & ifmt_movgrgrii, { 0x6a080000 }
00298   },
00299 /* mov $Rd,$Rs */
00300   {
00301     { 0, 0, 0, 0 },
00302     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00303     & ifmt_movgrgr, { 0x4600 }
00304   },
00305 /* mov.w Rx,#$imm8 */
00306   {
00307     { 0, 0, 0, 0 },
00308     { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
00309     & ifmt_movwimm8, { 0x4700 }
00310   },
00311 /* mov.w $Rm,#$imm8small */
00312   {
00313     { 0, 0, 0, 0 },
00314     { { MNEM, ' ', OP (RM), ',', '#', OP (IMM8SMALL), 0 } },
00315     & ifmt_movwgrimm8, { 0x2100 }
00316   },
00317 /* mov.w $Rd,#$imm16 */
00318   {
00319     { 0, 0, 0, 0 },
00320     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
00321     & ifmt_movwgrimm16, { 0x31300000 }
00322   },
00323 /* mov.b $Rd,RxL */
00324   {
00325     { 0, 0, 0, 0 },
00326     { { MNEM, ' ', OP (RD), ',', 'R', 'x', 'L', 0 } },
00327     & ifmt_movlowgr, { 0x30c0 }
00328   },
00329 /* mov.b $Rd,RxH */
00330   {
00331     { 0, 0, 0, 0 },
00332     { { MNEM, ' ', OP (RD), ',', 'R', 'x', 'H', 0 } },
00333     & ifmt_movlowgr, { 0x30d0 }
00334   },
00335 /* movf$ws2 $Rdm,($Rs) */
00336   {
00337     { 0, 0, 0, 0 },
00338     { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), ')', 0 } },
00339     & ifmt_movgrgri, { 0x7400 }
00340   },
00341 /* movf$ws2 $Rdm,($Rs++) */
00342   {
00343     { 0, 0, 0, 0 },
00344     { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RS), '+', '+', ')', 0 } },
00345     & ifmt_movgrgri, { 0x6400 }
00346   },
00347 /* movf$ws2 $Rdm,(--$Rs) */
00348   {
00349     { 0, 0, 0, 0 },
00350     { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', '-', '-', OP (RS), ')', 0 } },
00351     & ifmt_movgrgri, { 0x6c00 }
00352   },
00353 /* movf$ws2 ($Rs),$Rdm */
00354   {
00355     { 0, 0, 0, 0 },
00356     { { MNEM, OP (WS2), ' ', '(', OP (RS), ')', ',', OP (RDM), 0 } },
00357     & ifmt_movgrgri, { 0x7600 }
00358   },
00359 /* movf$ws2 ($Rs++),$Rdm */
00360   {
00361     { 0, 0, 0, 0 },
00362     { { MNEM, OP (WS2), ' ', '(', OP (RS), '+', '+', ')', ',', OP (RDM), 0 } },
00363     & ifmt_movgrgri, { 0x6600 }
00364   },
00365 /* movf$ws2 (--$Rs),$Rdm */
00366   {
00367     { 0, 0, 0, 0 },
00368     { { MNEM, OP (WS2), ' ', '(', '-', '-', OP (RS), ')', ',', OP (RDM), 0 } },
00369     & ifmt_movgrgri, { 0x6e00 }
00370   },
00371 /* movf$ws2 $Rdm,($Rb,$Rs,$imm12) */
00372   {
00373     { 0, 0, 0, 0 },
00374     { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RB), ',', OP (RS), ',', OP (IMM12), ')', 0 } },
00375     & ifmt_movfgrgrii, { 0x74080000 }
00376   },
00377 /* movf$ws2 $Rdm,($Rb,$Rs++,$imm12) */
00378   {
00379     { 0, 0, 0, 0 },
00380     { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RB), ',', OP (RS), '+', '+', ',', OP (IMM12), ')', 0 } },
00381     & ifmt_movfgrgrii, { 0x64080000 }
00382   },
00383 /* movf$ws2 $Rdm,($Rb,--$Rs,$imm12) */
00384   {
00385     { 0, 0, 0, 0 },
00386     { { MNEM, OP (WS2), ' ', OP (RDM), ',', '(', OP (RB), ',', '-', '-', OP (RS), ',', OP (IMM12), ')', 0 } },
00387     & ifmt_movfgrgrii, { 0x6c080000 }
00388   },
00389 /* movf$ws2 ($Rb,$Rs,$imm12),$Rdm */
00390   {
00391     { 0, 0, 0, 0 },
00392     { { MNEM, OP (WS2), ' ', '(', OP (RB), ',', OP (RS), ',', OP (IMM12), ')', ',', OP (RDM), 0 } },
00393     & ifmt_movfgrgrii, { 0x76080000 }
00394   },
00395 /* movf$ws2 ($Rb,$Rs++,$imm12),$Rdm */
00396   {
00397     { 0, 0, 0, 0 },
00398     { { MNEM, OP (WS2), ' ', '(', OP (RB), ',', OP (RS), '+', '+', ',', OP (IMM12), ')', ',', OP (RDM), 0 } },
00399     & ifmt_movfgrgrii, { 0x66080000 }
00400   },
00401 /* movf$ws2 ($Rb,--$Rs,$imm12),$Rdm */
00402   {
00403     { 0, 0, 0, 0 },
00404     { { MNEM, OP (WS2), ' ', '(', OP (RB), ',', '-', '-', OP (RS), ',', OP (IMM12), ')', ',', OP (RDM), 0 } },
00405     & ifmt_movfgrgrii, { 0x6e080000 }
00406   },
00407 /* mask $Rd,$Rs */
00408   {
00409     { 0, 0, 0, 0 },
00410     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00411     & ifmt_movgrgr, { 0x3300 }
00412   },
00413 /* mask $Rd,#$imm16 */
00414   {
00415     { 0, 0, 0, 0 },
00416     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
00417     & ifmt_movwgrimm16, { 0x30e00000 }
00418   },
00419 /* push $Rd */
00420   {
00421     { 0, 0, 0, 0 },
00422     { { MNEM, ' ', OP (RD), 0 } },
00423     & ifmt_movlowgr, { 0x80 }
00424   },
00425 /* pop $Rd */
00426   {
00427     { 0, 0, 0, 0 },
00428     { { MNEM, ' ', OP (RD), 0 } },
00429     & ifmt_movlowgr, { 0x90 }
00430   },
00431 /* swpn $Rd */
00432   {
00433     { 0, 0, 0, 0 },
00434     { { MNEM, ' ', OP (RD), 0 } },
00435     & ifmt_movlowgr, { 0x3090 }
00436   },
00437 /* swpb $Rd */
00438   {
00439     { 0, 0, 0, 0 },
00440     { { MNEM, ' ', OP (RD), 0 } },
00441     & ifmt_movlowgr, { 0x3080 }
00442   },
00443 /* swpw $Rd,$Rs */
00444   {
00445     { 0, 0, 0, 0 },
00446     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00447     & ifmt_movgrgr, { 0x3200 }
00448   },
00449 /* and $Rd,$Rs */
00450   {
00451     { 0, 0, 0, 0 },
00452     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00453     & ifmt_movgrgr, { 0x4000 }
00454   },
00455 /* and Rx,#$imm8 */
00456   {
00457     { 0, 0, 0, 0 },
00458     { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
00459     & ifmt_movwimm8, { 0x4100 }
00460   },
00461 /* and $Rd,#$imm16 */
00462   {
00463     { 0, 0, 0, 0 },
00464     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
00465     & ifmt_movwgrimm16, { 0x31000000 }
00466   },
00467 /* or $Rd,$Rs */
00468   {
00469     { 0, 0, 0, 0 },
00470     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00471     & ifmt_movgrgr, { 0x4200 }
00472   },
00473 /* or Rx,#$imm8 */
00474   {
00475     { 0, 0, 0, 0 },
00476     { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
00477     & ifmt_movwimm8, { 0x4300 }
00478   },
00479 /* or $Rd,#$imm16 */
00480   {
00481     { 0, 0, 0, 0 },
00482     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
00483     & ifmt_movwgrimm16, { 0x31100000 }
00484   },
00485 /* xor $Rd,$Rs */
00486   {
00487     { 0, 0, 0, 0 },
00488     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00489     & ifmt_movgrgr, { 0x4400 }
00490   },
00491 /* xor Rx,#$imm8 */
00492   {
00493     { 0, 0, 0, 0 },
00494     { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
00495     & ifmt_movwimm8, { 0x4500 }
00496   },
00497 /* xor $Rd,#$imm16 */
00498   {
00499     { 0, 0, 0, 0 },
00500     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
00501     & ifmt_movwgrimm16, { 0x31200000 }
00502   },
00503 /* not $Rd */
00504   {
00505     { 0, 0, 0, 0 },
00506     { { MNEM, ' ', OP (RD), 0 } },
00507     & ifmt_movlowgr, { 0x30b0 }
00508   },
00509 /* add $Rd,$Rs */
00510   {
00511     { 0, 0, 0, 0 },
00512     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00513     & ifmt_movgrgr, { 0x4900 }
00514   },
00515 /* add $Rd,#$imm4 */
00516   {
00517     { 0, 0, 0, 0 },
00518     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
00519     & ifmt_addgrimm4, { 0x5100 }
00520   },
00521 /* add Rx,#$imm8 */
00522   {
00523     { 0, 0, 0, 0 },
00524     { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
00525     & ifmt_movwimm8, { 0x5900 }
00526   },
00527 /* add $Rd,#$imm16 */
00528   {
00529     { 0, 0, 0, 0 },
00530     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
00531     & ifmt_movwgrimm16, { 0x31400000 }
00532   },
00533 /* adc $Rd,$Rs */
00534   {
00535     { 0, 0, 0, 0 },
00536     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00537     & ifmt_movgrgr, { 0x4b00 }
00538   },
00539 /* adc $Rd,#$imm4 */
00540   {
00541     { 0, 0, 0, 0 },
00542     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
00543     & ifmt_addgrimm4, { 0x5300 }
00544   },
00545 /* adc Rx,#$imm8 */
00546   {
00547     { 0, 0, 0, 0 },
00548     { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
00549     & ifmt_movwimm8, { 0x5b00 }
00550   },
00551 /* adc $Rd,#$imm16 */
00552   {
00553     { 0, 0, 0, 0 },
00554     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
00555     & ifmt_movwgrimm16, { 0x31500000 }
00556   },
00557 /* sub $Rd,$Rs */
00558   {
00559     { 0, 0, 0, 0 },
00560     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00561     & ifmt_movgrgr, { 0x4d00 }
00562   },
00563 /* sub $Rd,#$imm4 */
00564   {
00565     { 0, 0, 0, 0 },
00566     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
00567     & ifmt_addgrimm4, { 0x5500 }
00568   },
00569 /* sub Rx,#$imm8 */
00570   {
00571     { 0, 0, 0, 0 },
00572     { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
00573     & ifmt_movwimm8, { 0x5d00 }
00574   },
00575 /* sub $Rd,#$imm16 */
00576   {
00577     { 0, 0, 0, 0 },
00578     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
00579     & ifmt_movwgrimm16, { 0x31600000 }
00580   },
00581 /* sbc $Rd,$Rs */
00582   {
00583     { 0, 0, 0, 0 },
00584     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00585     & ifmt_movgrgr, { 0x4f00 }
00586   },
00587 /* sbc $Rd,#$imm4 */
00588   {
00589     { 0, 0, 0, 0 },
00590     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
00591     & ifmt_addgrimm4, { 0x5700 }
00592   },
00593 /* sbc Rx,#$imm8 */
00594   {
00595     { 0, 0, 0, 0 },
00596     { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
00597     & ifmt_movwimm8, { 0x5f00 }
00598   },
00599 /* sbc $Rd,#$imm16 */
00600   {
00601     { 0, 0, 0, 0 },
00602     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
00603     & ifmt_movwgrimm16, { 0x31700000 }
00604   },
00605 /* inc $Rd,#$imm2 */
00606   {
00607     { 0, 0, 0, 0 },
00608     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM2), 0 } },
00609     & ifmt_incgrimm2, { 0x3000 }
00610   },
00611 /* dec $Rd,#$imm2 */
00612   {
00613     { 0, 0, 0, 0 },
00614     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM2), 0 } },
00615     & ifmt_incgrimm2, { 0x3040 }
00616   },
00617 /* rrc $Rd,$Rs */
00618   {
00619     { 0, 0, 0, 0 },
00620     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00621     & ifmt_movgrgr, { 0x3800 }
00622   },
00623 /* rrc $Rd,#$imm4 */
00624   {
00625     { 0, 0, 0, 0 },
00626     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
00627     & ifmt_addgrimm4, { 0x3900 }
00628   },
00629 /* rlc $Rd,$Rs */
00630   {
00631     { 0, 0, 0, 0 },
00632     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00633     & ifmt_movgrgr, { 0x3a00 }
00634   },
00635 /* rlc $Rd,#$imm4 */
00636   {
00637     { 0, 0, 0, 0 },
00638     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
00639     & ifmt_addgrimm4, { 0x3b00 }
00640   },
00641 /* shr $Rd,$Rs */
00642   {
00643     { 0, 0, 0, 0 },
00644     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00645     & ifmt_movgrgr, { 0x3c00 }
00646   },
00647 /* shr $Rd,#$imm4 */
00648   {
00649     { 0, 0, 0, 0 },
00650     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
00651     & ifmt_addgrimm4, { 0x3d00 }
00652   },
00653 /* shl $Rd,$Rs */
00654   {
00655     { 0, 0, 0, 0 },
00656     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00657     & ifmt_movgrgr, { 0x3e00 }
00658   },
00659 /* shl $Rd,#$imm4 */
00660   {
00661     { 0, 0, 0, 0 },
00662     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
00663     & ifmt_addgrimm4, { 0x3f00 }
00664   },
00665 /* asr $Rd,$Rs */
00666   {
00667     { 0, 0, 0, 0 },
00668     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00669     & ifmt_movgrgr, { 0x3600 }
00670   },
00671 /* asr $Rd,#$imm4 */
00672   {
00673     { 0, 0, 0, 0 },
00674     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
00675     & ifmt_addgrimm4, { 0x3700 }
00676   },
00677 /* set1 $Rd,#$imm4 */
00678   {
00679     { 0, 0, 0, 0 },
00680     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
00681     & ifmt_addgrimm4, { 0x900 }
00682   },
00683 /* set1 $Rd,$Rs */
00684   {
00685     { 0, 0, 0, 0 },
00686     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00687     & ifmt_movgrgr, { 0xb00 }
00688   },
00689 /* set1 $lmem8,#$imm3 */
00690   {
00691     { 0, 0, 0, 0 },
00692     { { MNEM, ' ', OP (LMEM8), ',', '#', OP (IMM3), 0 } },
00693     & ifmt_set1lmemimm, { 0xe100 }
00694   },
00695 /* set1 $hmem8,#$imm3 */
00696   {
00697     { 0, 0, 0, 0 },
00698     { { MNEM, ' ', OP (HMEM8), ',', '#', OP (IMM3), 0 } },
00699     & ifmt_set1hmemimm, { 0xf100 }
00700   },
00701 /* clr1 $Rd,#$imm4 */
00702   {
00703     { 0, 0, 0, 0 },
00704     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), 0 } },
00705     & ifmt_addgrimm4, { 0x800 }
00706   },
00707 /* clr1 $Rd,$Rs */
00708   {
00709     { 0, 0, 0, 0 },
00710     { { MNEM, ' ', OP (RD), ',', OP (RS), 0 } },
00711     & ifmt_movgrgr, { 0xa00 }
00712   },
00713 /* clr1 $lmem8,#$imm3 */
00714   {
00715     { 0, 0, 0, 0 },
00716     { { MNEM, ' ', OP (LMEM8), ',', '#', OP (IMM3), 0 } },
00717     & ifmt_set1lmemimm, { 0xe000 }
00718   },
00719 /* clr1 $hmem8,#$imm3 */
00720   {
00721     { 0, 0, 0, 0 },
00722     { { MNEM, ' ', OP (HMEM8), ',', '#', OP (IMM3), 0 } },
00723     & ifmt_set1hmemimm, { 0xf000 }
00724   },
00725 /* cbw $Rd */
00726   {
00727     { 0, 0, 0, 0 },
00728     { { MNEM, ' ', OP (RD), 0 } },
00729     & ifmt_movlowgr, { 0x30a0 }
00730   },
00731 /* rev $Rd */
00732   {
00733     { 0, 0, 0, 0 },
00734     { { MNEM, ' ', OP (RD), 0 } },
00735     & ifmt_movlowgr, { 0x30f0 }
00736   },
00737 /* b$bcond5 $Rd,$Rs,$rel12 */
00738   {
00739     { 0, 0, 0, 0 },
00740     { { MNEM, OP (BCOND5), ' ', OP (RD), ',', OP (RS), ',', OP (REL12), 0 } },
00741     & ifmt_bccgrgr, { 0xd000000 }
00742   },
00743 /* b$bcond5 $Rm,#$imm8,$rel12 */
00744   {
00745     { 0, 0, 0, 0 },
00746     { { MNEM, OP (BCOND5), ' ', OP (RM), ',', '#', OP (IMM8), ',', OP (REL12), 0 } },
00747     & ifmt_bccgrimm8, { 0x20000000 }
00748   },
00749 /* b$bcond2 Rx,#$imm16,${rel8-4} */
00750   {
00751     { 0, 0, 0, 0 },
00752     { { MNEM, OP (BCOND2), ' ', 'R', 'x', ',', '#', OP (IMM16), ',', OP (REL8_4), 0 } },
00753     & ifmt_bccimm16, { 0xc0000000 }
00754   },
00755 /* bn $Rd,#$imm4,$rel12 */
00756   {
00757     { 0, 0, 0, 0 },
00758     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), ',', OP (REL12), 0 } },
00759     & ifmt_bngrimm4, { 0x4000000 }
00760   },
00761 /* bn $Rd,$Rs,$rel12 */
00762   {
00763     { 0, 0, 0, 0 },
00764     { { MNEM, ' ', OP (RD), ',', OP (RS), ',', OP (REL12), 0 } },
00765     & ifmt_bngrgr, { 0x6000000 }
00766   },
00767 /* bn $lmem8,#$imm3b,$rel12 */
00768   {
00769     { 0, 0, 0, 0 },
00770     { { MNEM, ' ', OP (LMEM8), ',', '#', OP (IMM3B), ',', OP (REL12), 0 } },
00771     & ifmt_bnlmemimm, { 0x7c000000 }
00772   },
00773 /* bn $hmem8,#$imm3b,$rel12 */
00774   {
00775     { 0, 0, 0, 0 },
00776     { { MNEM, ' ', OP (HMEM8), ',', '#', OP (IMM3B), ',', OP (REL12), 0 } },
00777     & ifmt_bnhmemimm, { 0x7e000000 }
00778   },
00779 /* bp $Rd,#$imm4,$rel12 */
00780   {
00781     { 0, 0, 0, 0 },
00782     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM4), ',', OP (REL12), 0 } },
00783     & ifmt_bngrimm4, { 0x5000000 }
00784   },
00785 /* bp $Rd,$Rs,$rel12 */
00786   {
00787     { 0, 0, 0, 0 },
00788     { { MNEM, ' ', OP (RD), ',', OP (RS), ',', OP (REL12), 0 } },
00789     & ifmt_bngrgr, { 0x7000000 }
00790   },
00791 /* bp $lmem8,#$imm3b,$rel12 */
00792   {
00793     { 0, 0, 0, 0 },
00794     { { MNEM, ' ', OP (LMEM8), ',', '#', OP (IMM3B), ',', OP (REL12), 0 } },
00795     & ifmt_bnlmemimm, { 0x7d000000 }
00796   },
00797 /* bp $hmem8,#$imm3b,$rel12 */
00798   {
00799     { 0, 0, 0, 0 },
00800     { { MNEM, ' ', OP (HMEM8), ',', '#', OP (IMM3B), ',', OP (REL12), 0 } },
00801     & ifmt_bnhmemimm, { 0x7f000000 }
00802   },
00803 /* b$bcond2 ${rel8-2} */
00804   {
00805     { 0, 0, 0, 0 },
00806     { { MNEM, OP (BCOND2), ' ', OP (REL8_2), 0 } },
00807     & ifmt_bcc, { 0xd000 }
00808   },
00809 /* br $Rd */
00810   {
00811     { 0, 0, 0, 0 },
00812     { { MNEM, ' ', OP (RD), 0 } },
00813     & ifmt_movlowgr, { 0x20 }
00814   },
00815 /* br $rel12a */
00816   {
00817     { 0, 0, 0, 0 },
00818     { { MNEM, ' ', OP (REL12A), 0 } },
00819     & ifmt_br, { 0x1000 }
00820   },
00821 /* jmp $Rbj,$Rd */
00822   {
00823     { 0, 0, 0, 0 },
00824     { { MNEM, ' ', OP (RBJ), ',', OP (RD), 0 } },
00825     & ifmt_jmp, { 0x40 }
00826   },
00827 /* jmpf $abs24 */
00828   {
00829     { 0, 0, 0, 0 },
00830     { { MNEM, ' ', OP (ABS24), 0 } },
00831     & ifmt_jmpf, { 0x2000000 }
00832   },
00833 /* callr $Rd */
00834   {
00835     { 0, 0, 0, 0 },
00836     { { MNEM, ' ', OP (RD), 0 } },
00837     & ifmt_movlowgr, { 0x10 }
00838   },
00839 /* callr $rel12a */
00840   {
00841     { 0, 0, 0, 0 },
00842     { { MNEM, ' ', OP (REL12A), 0 } },
00843     & ifmt_br, { 0x1001 }
00844   },
00845 /* call $Rbj,$Rd */
00846   {
00847     { 0, 0, 0, 0 },
00848     { { MNEM, ' ', OP (RBJ), ',', OP (RD), 0 } },
00849     & ifmt_jmp, { 0xa0 }
00850   },
00851 /* callf $abs24 */
00852   {
00853     { 0, 0, 0, 0 },
00854     { { MNEM, ' ', OP (ABS24), 0 } },
00855     & ifmt_jmpf, { 0x1000000 }
00856   },
00857 /* icallr $Rd */
00858   {
00859     { 0, 0, 0, 0 },
00860     { { MNEM, ' ', OP (RD), 0 } },
00861     & ifmt_movlowgr, { 0x30 }
00862   },
00863 /* icall $Rbj,$Rd */
00864   {
00865     { 0, 0, 0, 0 },
00866     { { MNEM, ' ', OP (RBJ), ',', OP (RD), 0 } },
00867     & ifmt_jmp, { 0x60 }
00868   },
00869 /* icallf $abs24 */
00870   {
00871     { 0, 0, 0, 0 },
00872     { { MNEM, ' ', OP (ABS24), 0 } },
00873     & ifmt_jmpf, { 0x3000000 }
00874   },
00875 /* iret */
00876   {
00877     { 0, 0, 0, 0 },
00878     { { MNEM, 0 } },
00879     & ifmt_iret, { 0x2 }
00880   },
00881 /* ret */
00882   {
00883     { 0, 0, 0, 0 },
00884     { { MNEM, 0 } },
00885     & ifmt_iret, { 0x3 }
00886   },
00887 /* mul */
00888   {
00889     { 0, 0, 0, 0 },
00890     { { MNEM, 0 } },
00891     & ifmt_iret, { 0xd0 }
00892   },
00893 /* div */
00894   {
00895     { 0, 0, 0, 0 },
00896     { { MNEM, 0 } },
00897     & ifmt_iret, { 0xc0 }
00898   },
00899 /* sdiv */
00900   {
00901     { 0, 0, 0, 0 },
00902     { { MNEM, 0 } },
00903     & ifmt_iret, { 0xc8 }
00904   },
00905 /* sdivlh */
00906   {
00907     { 0, 0, 0, 0 },
00908     { { MNEM, 0 } },
00909     & ifmt_iret, { 0xe8 }
00910   },
00911 /* divlh */
00912   {
00913     { 0, 0, 0, 0 },
00914     { { MNEM, 0 } },
00915     & ifmt_iret, { 0xe0 }
00916   },
00917 /* reset */
00918   {
00919     { 0, 0, 0, 0 },
00920     { { MNEM, 0 } },
00921     & ifmt_iret, { 0xf }
00922   },
00923 /* nop */
00924   {
00925     { 0, 0, 0, 0 },
00926     { { MNEM, 0 } },
00927     & ifmt_iret, { 0x0 }
00928   },
00929 /* halt */
00930   {
00931     { 0, 0, 0, 0 },
00932     { { MNEM, 0 } },
00933     & ifmt_iret, { 0x8 }
00934   },
00935 /* hold */
00936   {
00937     { 0, 0, 0, 0 },
00938     { { MNEM, 0 } },
00939     & ifmt_iret, { 0xa }
00940   },
00941 /* holdx */
00942   {
00943     { 0, 0, 0, 0 },
00944     { { MNEM, 0 } },
00945     & ifmt_iret, { 0xb }
00946   },
00947 /* brk */
00948   {
00949     { 0, 0, 0, 0 },
00950     { { MNEM, 0 } },
00951     & ifmt_iret, { 0x5 }
00952   },
00953 /* --unused-- */
00954   {
00955     { 0, 0, 0, 0 },
00956     { { MNEM, 0 } },
00957     & ifmt_iret, { 0x1 }
00958   },
00959 };
00960 
00961 #undef A
00962 #undef OPERAND
00963 #undef MNEM
00964 #undef OP
00965 
00966 /* Formats for ALIAS macro-insns.  */
00967 
00968 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
00969 #define F(f) & xstormy16_cgen_ifld_table[XSTORMY16_##f]
00970 #else
00971 #define F(f) & xstormy16_cgen_ifld_table[XSTORMY16_f]
00972 #endif
00973 static const CGEN_IFMT ifmt_movimm8 ATTRIBUTE_UNUSED = {
00974   16, 16, 0xff00, { { F (F_OP1) }, { F (F_OP2) }, { F (F_IMM8) }, { 0 } }
00975 };
00976 
00977 static const CGEN_IFMT ifmt_movgrimm8 ATTRIBUTE_UNUSED = {
00978   16, 16, 0xf100, { { F (F_OP1) }, { F (F_RM) }, { F (F_OP2M) }, { F (F_IMM8) }, { 0 } }
00979 };
00980 
00981 static const CGEN_IFMT ifmt_movgrimm16 ATTRIBUTE_UNUSED = {
00982   32, 32, 0xfff00000, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3) }, { F (F_RD) }, { F (F_IMM16) }, { 0 } }
00983 };
00984 
00985 static const CGEN_IFMT ifmt_incgr ATTRIBUTE_UNUSED = {
00986   16, 16, 0xfff0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3A) }, { F (F_IMM2) }, { F (F_RD) }, { 0 } }
00987 };
00988 
00989 static const CGEN_IFMT ifmt_decgr ATTRIBUTE_UNUSED = {
00990   16, 16, 0xfff0, { { F (F_OP1) }, { F (F_OP2) }, { F (F_OP3A) }, { F (F_IMM2) }, { F (F_RD) }, { 0 } }
00991 };
00992 
00993 #undef F
00994 
00995 /* Each non-simple macro entry points to an array of expansion possibilities.  */
00996 
00997 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
00998 #define A(a) (1 << CGEN_INSN_##a)
00999 #else
01000 #define A(a) (1 << CGEN_INSN_a)
01001 #endif
01002 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
01003 #define OPERAND(op) XSTORMY16_OPERAND_##op
01004 #else
01005 #define OPERAND(op) XSTORMY16_OPERAND_op
01006 #endif
01007 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
01008 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
01009 
01010 /* The macro instruction table.  */
01011 
01012 static const CGEN_IBASE xstormy16_cgen_macro_insn_table[] =
01013 {
01014 /* mov Rx,#$imm8 */
01015   {
01016     -1, "movimm8", "mov", 16,
01017     { 0|A(ALIAS), { (1<<MACH_BASE) } }
01018   },
01019 /* mov $Rm,#$imm8small */
01020   {
01021     -1, "movgrimm8", "mov", 16,
01022     { 0|A(ALIAS), { (1<<MACH_BASE) } }
01023   },
01024 /* mov $Rd,#$imm16 */
01025   {
01026     -1, "movgrimm16", "mov", 32,
01027     { 0|A(ALIAS), { (1<<MACH_BASE) } }
01028   },
01029 /* inc $Rd */
01030   {
01031     -1, "incgr", "inc", 16,
01032     { 0|A(ALIAS), { (1<<MACH_BASE) } }
01033   },
01034 /* dec $Rd */
01035   {
01036     -1, "decgr", "dec", 16,
01037     { 0|A(ALIAS), { (1<<MACH_BASE) } }
01038   },
01039 };
01040 
01041 /* The macro instruction opcode table.  */
01042 
01043 static const CGEN_OPCODE xstormy16_cgen_macro_insn_opcode_table[] =
01044 {
01045 /* mov Rx,#$imm8 */
01046   {
01047     { 0, 0, 0, 0 },
01048     { { MNEM, ' ', 'R', 'x', ',', '#', OP (IMM8), 0 } },
01049     & ifmt_movimm8, { 0x4700 }
01050   },
01051 /* mov $Rm,#$imm8small */
01052   {
01053     { 0, 0, 0, 0 },
01054     { { MNEM, ' ', OP (RM), ',', '#', OP (IMM8SMALL), 0 } },
01055     & ifmt_movgrimm8, { 0x2100 }
01056   },
01057 /* mov $Rd,#$imm16 */
01058   {
01059     { 0, 0, 0, 0 },
01060     { { MNEM, ' ', OP (RD), ',', '#', OP (IMM16), 0 } },
01061     & ifmt_movgrimm16, { 0x31300000 }
01062   },
01063 /* inc $Rd */
01064   {
01065     { 0, 0, 0, 0 },
01066     { { MNEM, ' ', OP (RD), 0 } },
01067     & ifmt_incgr, { 0x3000 }
01068   },
01069 /* dec $Rd */
01070   {
01071     { 0, 0, 0, 0 },
01072     { { MNEM, ' ', OP (RD), 0 } },
01073     & ifmt_decgr, { 0x3040 }
01074   },
01075 };
01076 
01077 #undef A
01078 #undef OPERAND
01079 #undef MNEM
01080 #undef OP
01081 
01082 #ifndef CGEN_ASM_HASH_P
01083 #define CGEN_ASM_HASH_P(insn) 1
01084 #endif
01085 
01086 #ifndef CGEN_DIS_HASH_P
01087 #define CGEN_DIS_HASH_P(insn) 1
01088 #endif
01089 
01090 /* Return non-zero if INSN is to be added to the hash table.
01091    Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file.  */
01092 
01093 static int
01094 asm_hash_insn_p (insn)
01095      const CGEN_INSN *insn ATTRIBUTE_UNUSED;
01096 {
01097   return CGEN_ASM_HASH_P (insn);
01098 }
01099 
01100 static int
01101 dis_hash_insn_p (insn)
01102      const CGEN_INSN *insn;
01103 {
01104   /* If building the hash table and the NO-DIS attribute is present,
01105      ignore.  */
01106   if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS))
01107     return 0;
01108   return CGEN_DIS_HASH_P (insn);
01109 }
01110 
01111 #ifndef CGEN_ASM_HASH
01112 #define CGEN_ASM_HASH_SIZE 127
01113 #ifdef CGEN_MNEMONIC_OPERANDS
01114 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
01115 #else
01116 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
01117 #endif
01118 #endif
01119 
01120 /* It doesn't make much sense to provide a default here,
01121    but while this is under development we do.
01122    BUFFER is a pointer to the bytes of the insn, target order.
01123    VALUE is the first base_insn_bitsize bits as an int in host order.  */
01124 
01125 #ifndef CGEN_DIS_HASH
01126 #define CGEN_DIS_HASH_SIZE 256
01127 #define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
01128 #endif
01129 
01130 /* The result is the hash value of the insn.
01131    Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file.  */
01132 
01133 static unsigned int
01134 asm_hash_insn (mnem)
01135      const char * mnem;
01136 {
01137   return CGEN_ASM_HASH (mnem);
01138 }
01139 
01140 /* BUF is a pointer to the bytes of the insn, target order.
01141    VALUE is the first base_insn_bitsize bits as an int in host order.  */
01142 
01143 static unsigned int
01144 dis_hash_insn (buf, value)
01145      const char * buf ATTRIBUTE_UNUSED;
01146      CGEN_INSN_INT value ATTRIBUTE_UNUSED;
01147 {
01148   return CGEN_DIS_HASH (buf, value);
01149 }
01150 
01151 static void set_fields_bitsize PARAMS ((CGEN_FIELDS *, int));
01152 
01153 /* Set the recorded length of the insn in the CGEN_FIELDS struct.  */
01154 
01155 static void
01156 set_fields_bitsize (fields, size)
01157      CGEN_FIELDS *fields;
01158      int size;
01159 {
01160   CGEN_FIELDS_BITSIZE (fields) = size;
01161 }
01162 
01163 /* Function to call before using the operand instance table.
01164    This plugs the opcode entries and macro instructions into the cpu table.  */
01165 
01166 void
01167 xstormy16_cgen_init_opcode_table (cd)
01168      CGEN_CPU_DESC cd;
01169 {
01170   int i;
01171   int num_macros = (sizeof (xstormy16_cgen_macro_insn_table) /
01172         sizeof (xstormy16_cgen_macro_insn_table[0]));
01173   const CGEN_IBASE *ib = & xstormy16_cgen_macro_insn_table[0];
01174   const CGEN_OPCODE *oc = & xstormy16_cgen_macro_insn_opcode_table[0];
01175   CGEN_INSN *insns = (CGEN_INSN *) xmalloc (num_macros * sizeof (CGEN_INSN));
01176   memset (insns, 0, num_macros * sizeof (CGEN_INSN));
01177   for (i = 0; i < num_macros; ++i)
01178     {
01179       insns[i].base = &ib[i];
01180       insns[i].opcode = &oc[i];
01181       xstormy16_cgen_build_insn_regex (& insns[i]);
01182     }
01183   cd->macro_insn_table.init_entries = insns;
01184   cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE);
01185   cd->macro_insn_table.num_init_entries = num_macros;
01186 
01187   oc = & xstormy16_cgen_insn_opcode_table[0];
01188   insns = (CGEN_INSN *) cd->insn_table.init_entries;
01189   for (i = 0; i < MAX_INSNS; ++i)
01190     {
01191       insns[i].opcode = &oc[i];
01192       xstormy16_cgen_build_insn_regex (& insns[i]);
01193     }
01194 
01195   cd->sizeof_fields = sizeof (CGEN_FIELDS);
01196   cd->set_fields_bitsize = set_fields_bitsize;
01197 
01198   cd->asm_hash_p = asm_hash_insn_p;
01199   cd->asm_hash = asm_hash_insn;
01200   cd->asm_hash_size = CGEN_ASM_HASH_SIZE;
01201 
01202   cd->dis_hash_p = dis_hash_insn_p;
01203   cd->dis_hash = dis_hash_insn;
01204   cd->dis_hash_size = CGEN_DIS_HASH_SIZE;
01205 }