00001
00002
00003
00004 #include "config.h"
00005 #include "system.h"
00006 #include "rtl.h"
00007 #include "tm_p.h"
00008 #include "insn-config.h"
00009 #include "recog.h"
00010 #include "regs.h"
00011 #include "real.h"
00012 #include "output.h"
00013 #include "insn-attr.h"
00014 #include "toplev.h"
00015 #include "flags.h"
00016 #include "function.h"
00017
00018 #define operands recog_data.operand
00019
00020 extern int bypass_p PARAMS ((rtx));
00021 int
00022 bypass_p (insn)
00023 rtx insn;
00024 {
00025 switch (recog_memoized (insn))
00026 {
00027 case -1:
00028 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
00029 && asm_noperands (PATTERN (insn)) < 0)
00030 fatal_insn_not_found (insn);
00031 default:
00032 return 0;
00033
00034 }
00035 }
00036
00037 extern int insn_default_latency PARAMS ((rtx));
00038 int
00039 insn_default_latency (insn)
00040 rtx insn;
00041 {
00042 switch (recog_memoized (insn))
00043 {
00044 case -1:
00045 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
00046 && asm_noperands (PATTERN (insn)) < 0)
00047 fatal_insn_not_found (insn);
00048 default:
00049 return 0;
00050
00051 }
00052 }
00053
00054 extern int insn_alts PARAMS ((rtx));
00055 int
00056 insn_alts (insn)
00057 rtx insn;
00058 {
00059 switch (recog_memoized (insn))
00060 {
00061 case -1:
00062 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
00063 && asm_noperands (PATTERN (insn)) < 0)
00064 fatal_insn_not_found (insn);
00065 default:
00066 return 0;
00067
00068 }
00069 }
00070
00071 extern int internal_dfa_insn_code PARAMS ((rtx));
00072 int
00073 internal_dfa_insn_code (insn)
00074 rtx insn;
00075 {
00076 switch (recog_memoized (insn))
00077 {
00078 case -1:
00079 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
00080 && asm_noperands (PATTERN (insn)) < 0)
00081 fatal_insn_not_found (insn);
00082 default:
00083 return 1;
00084
00085 }
00086 }
00087
00088 extern int result_ready_cost PARAMS ((rtx));
00089 int
00090 result_ready_cost (insn)
00091 rtx insn;
00092 {
00093 switch (recog_memoized (insn))
00094 {
00095 case 424:
00096 extract_constrain_insn_cached (insn);
00097 if (which_alternative == 6)
00098 {
00099 return 9;
00100 }
00101 else if (which_alternative == 8)
00102 {
00103 return 6;
00104 }
00105 else if (((which_alternative != 0) && (which_alternative != 1)) && ((which_alternative != 2) && ((which_alternative != 3) && ((which_alternative != 4) && (which_alternative != 5)))))
00106 {
00107 return 5;
00108 }
00109 else if ((which_alternative == 5) || (which_alternative == 3))
00110 {
00111 return 2;
00112 }
00113 else
00114 {
00115 return 1;
00116 }
00117
00118 case 657:
00119 case 656:
00120 case 655:
00121 case 654:
00122 case 653:
00123 case 652:
00124 case 269:
00125 case 268:
00126 case 267:
00127 case 266:
00128 case 265:
00129 case 264:
00130 return 11 ;
00131
00132 case 640:
00133 case 246:
00134 return 13 ;
00135
00136 case 639:
00137 case 245:
00138 return 9;
00139
00140 case 596:
00141 case 189:
00142 extract_constrain_insn_cached (insn);
00143 if ((which_alternative != 0) && (which_alternative != 1))
00144 {
00145 return 2;
00146 }
00147 else
00148 {
00149 return 1;
00150 }
00151
00152 case 528:
00153 case 527:
00154 case 525:
00155 case 524:
00156 case 517:
00157 case 516:
00158 case 471:
00159 case 470:
00160 case 469:
00161 case 468:
00162 case 467:
00163 case 466:
00164 case 465:
00165 case 464:
00166 case 463:
00167 case 462:
00168 case 461:
00169 case 460:
00170 case 459:
00171 case 458:
00172 case 112:
00173 case 111:
00174 case 109:
00175 case 108:
00176 case 100:
00177 case 99:
00178 case 54:
00179 case 53:
00180 case 52:
00181 case 51:
00182 case 50:
00183 case 49:
00184 case 48:
00185 case 47:
00186 case 46:
00187 case 45:
00188 case 44:
00189 case 43:
00190 case 42:
00191 case 41:
00192 return 7;
00193
00194 case 595:
00195 case 594:
00196 case 593:
00197 case 592:
00198 case 591:
00199 case 590:
00200 case 589:
00201 case 588:
00202 case 587:
00203 case 586:
00204 case 585:
00205 case 584:
00206 case 583:
00207 case 582:
00208 case 581:
00209 case 580:
00210 case 579:
00211 case 578:
00212 case 577:
00213 case 576:
00214 case 575:
00215 case 574:
00216 case 573:
00217 case 572:
00218 case 571:
00219 case 570:
00220 case 569:
00221 case 568:
00222 case 567:
00223 case 566:
00224 case 565:
00225 case 564:
00226 case 563:
00227 case 562:
00228 case 561:
00229 case 560:
00230 case 559:
00231 case 558:
00232 case 557:
00233 case 556:
00234 case 555:
00235 case 554:
00236 case 553:
00237 case 552:
00238 case 551:
00239 case 550:
00240 case 549:
00241 case 548:
00242 case 547:
00243 case 546:
00244 case 545:
00245 case 544:
00246 case 543:
00247 case 542:
00248 case 541:
00249 case 540:
00250 case 539:
00251 case 538:
00252 case 537:
00253 case 536:
00254 case 535:
00255 case 534:
00256 case 533:
00257 case 532:
00258 case 531:
00259 case 457:
00260 case 456:
00261 case 455:
00262 case 454:
00263 case 453:
00264 case 452:
00265 case 188:
00266 case 185:
00267 case 184:
00268 case 183:
00269 case 182:
00270 case 181:
00271 case 180:
00272 case 179:
00273 case 178:
00274 case 177:
00275 case 176:
00276 case 175:
00277 case 174:
00278 case 173:
00279 case 172:
00280 case 171:
00281 case 170:
00282 case 169:
00283 case 168:
00284 case 167:
00285 case 166:
00286 case 165:
00287 case 164:
00288 case 163:
00289 case 162:
00290 case 161:
00291 case 160:
00292 case 159:
00293 case 158:
00294 case 157:
00295 case 156:
00296 case 155:
00297 case 154:
00298 case 153:
00299 case 150:
00300 case 149:
00301 case 148:
00302 case 147:
00303 case 146:
00304 case 145:
00305 case 144:
00306 case 143:
00307 case 142:
00308 case 141:
00309 case 140:
00310 case 139:
00311 case 138:
00312 case 137:
00313 case 136:
00314 case 135:
00315 case 134:
00316 case 133:
00317 case 132:
00318 case 131:
00319 case 128:
00320 case 127:
00321 case 126:
00322 case 125:
00323 case 124:
00324 case 123:
00325 case 122:
00326 case 121:
00327 case 120:
00328 case 119:
00329 case 118:
00330 case 117:
00331 case 40:
00332 case 39:
00333 case 38:
00334 case 37:
00335 case 36:
00336 case 35:
00337 return 5;
00338
00339 case 451:
00340 case 34:
00341 extract_constrain_insn_cached (insn);
00342 if ((which_alternative != 0) && (which_alternative != 1))
00343 {
00344 return 5;
00345 }
00346 else if (which_alternative == 1)
00347 {
00348 return 2;
00349 }
00350 else
00351 {
00352 return 1;
00353 }
00354
00355 case 599:
00356 case 450:
00357 case 449:
00358 case 192:
00359 case 33:
00360 case 32:
00361 extract_constrain_insn_cached (insn);
00362 if (which_alternative != 0)
00363 {
00364 return 2;
00365 }
00366 else
00367 {
00368 return 1;
00369 }
00370
00371 case 610:
00372 case 609:
00373 case 608:
00374 case 607:
00375 case 448:
00376 case 203:
00377 case 202:
00378 case 201:
00379 case 200:
00380 case 31:
00381 extract_constrain_insn_cached (insn);
00382 if (which_alternative != 0)
00383 {
00384 return 5;
00385 }
00386 else
00387 {
00388 return 1;
00389 }
00390
00391 case 445:
00392 case 28:
00393 extract_constrain_insn_cached (insn);
00394 if (which_alternative == 1)
00395 {
00396 return 9;
00397 }
00398 else if (which_alternative == 0)
00399 {
00400 return 5;
00401 }
00402 else
00403 {
00404 return 1;
00405 }
00406
00407 case 444:
00408 case 443:
00409 case 27:
00410 case 26:
00411 extract_constrain_insn_cached (insn);
00412 if ((which_alternative == 1) || (which_alternative == 4))
00413 {
00414 return 9;
00415 }
00416 else if (which_alternative == 0)
00417 {
00418 return 5;
00419 }
00420 else if ((which_alternative == 3) || (which_alternative == 6))
00421 {
00422 return 2;
00423 }
00424 else
00425 {
00426 return 1;
00427 }
00428
00429 case 637:
00430 case 618:
00431 case 617:
00432 case 616:
00433 case 603:
00434 case 602:
00435 case 530:
00436 case 509:
00437 case 479:
00438 case 478:
00439 case 477:
00440 case 431:
00441 case 243:
00442 case 211:
00443 case 210:
00444 case 209:
00445 case 196:
00446 case 195:
00447 case 114:
00448 case 92:
00449 case 62:
00450 case 61:
00451 case 60:
00452 case 12:
00453 return 2;
00454
00455 case 426:
00456 case 7:
00457 extract_constrain_insn_cached (insn);
00458 if (which_alternative == 12)
00459 {
00460 return 13 ;
00461 }
00462 else if ((which_alternative == 8) || (which_alternative == 6))
00463 {
00464 return 9;
00465 }
00466 else if (which_alternative == 14)
00467 {
00468 return 6;
00469 }
00470 else if ((which_alternative == 7) || (which_alternative == 15))
00471 {
00472 return 5;
00473 }
00474 else if ((which_alternative == 10) || ((which_alternative == 5) || ((which_alternative == 16) || (which_alternative == 3))))
00475 {
00476 return 2;
00477 }
00478 else
00479 {
00480 return 1;
00481 }
00482
00483 case 5:
00484 extract_constrain_insn_cached (insn);
00485 if (which_alternative == 6)
00486 {
00487 return 9;
00488 }
00489 else if (which_alternative == 8)
00490 {
00491 return 6;
00492 }
00493 else if ((which_alternative == 7) || (which_alternative == 9))
00494 {
00495 return 5;
00496 }
00497 else if ((which_alternative == 5) || (which_alternative == 3))
00498 {
00499 return 2;
00500 }
00501 else
00502 {
00503 return 1;
00504 }
00505
00506 case 422:
00507 case 421:
00508 case 3:
00509 case 2:
00510 extract_constrain_insn_cached (insn);
00511 if (which_alternative == 5)
00512 {
00513 return 9;
00514 }
00515 else if (((which_alternative != 0) && (which_alternative != 1)) && ((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))))
00516 {
00517 return 5;
00518 }
00519 else if ((which_alternative == 4) || (which_alternative == 2))
00520 {
00521 return 2;
00522 }
00523 else
00524 {
00525 return 1;
00526 }
00527
00528 case 420:
00529 case 1:
00530 extract_constrain_insn_cached (insn);
00531 if (which_alternative == 6)
00532 {
00533 return 2;
00534 }
00535 else
00536 {
00537 return 1;
00538 }
00539
00540 case -1:
00541 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
00542 && asm_noperands (PATTERN (insn)) < 0)
00543 fatal_insn_not_found (insn);
00544 default:
00545 return 1;
00546
00547 }
00548 }
00549
00550 extern int stop_bit_unit_ready_cost PARAMS ((rtx));
00551 int
00552 stop_bit_unit_ready_cost (insn)
00553 rtx insn;
00554 {
00555 switch (recog_memoized (insn))
00556 {
00557 case -1:
00558 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
00559 && asm_noperands (PATTERN (insn)) < 0)
00560 fatal_insn_not_found (insn);
00561 default:
00562 return 1;
00563
00564 }
00565 }
00566
00567 extern int dummy_unit_ready_cost PARAMS ((rtx));
00568 int
00569 dummy_unit_ready_cost (insn)
00570 rtx insn;
00571 {
00572 switch (recog_memoized (insn))
00573 {
00574 case 424:
00575 extract_constrain_insn_cached (insn);
00576 if (which_alternative == 6)
00577 {
00578 return 9;
00579 }
00580 else if (which_alternative == 8)
00581 {
00582 return 6;
00583 }
00584 else if (((which_alternative != 0) && (which_alternative != 1)) && ((which_alternative != 2) && ((which_alternative != 3) && ((which_alternative != 4) && (which_alternative != 5)))))
00585 {
00586 return 5;
00587 }
00588 else if ((which_alternative == 3) || (which_alternative == 5))
00589 {
00590 return 2;
00591 }
00592 else
00593 {
00594 return 1;
00595 }
00596
00597 case 657:
00598 case 656:
00599 case 655:
00600 case 654:
00601 case 653:
00602 case 652:
00603 case 269:
00604 case 268:
00605 case 267:
00606 case 266:
00607 case 265:
00608 case 264:
00609 return 11 ;
00610
00611 case 649:
00612 case 647:
00613 case 640:
00614 case 261:
00615 case 259:
00616 case 258:
00617 case 257:
00618 case 246:
00619 return 13 ;
00620
00621 case 639:
00622 case 245:
00623 return 9;
00624
00625 case 596:
00626 case 189:
00627 extract_constrain_insn_cached (insn);
00628 if ((which_alternative != 0) && (which_alternative != 1))
00629 {
00630 return 2;
00631 }
00632 else
00633 {
00634 return 1;
00635 }
00636
00637 case 528:
00638 case 527:
00639 case 525:
00640 case 524:
00641 case 517:
00642 case 516:
00643 case 471:
00644 case 470:
00645 case 469:
00646 case 468:
00647 case 467:
00648 case 466:
00649 case 465:
00650 case 464:
00651 case 463:
00652 case 462:
00653 case 461:
00654 case 460:
00655 case 459:
00656 case 458:
00657 case 112:
00658 case 111:
00659 case 109:
00660 case 108:
00661 case 100:
00662 case 99:
00663 case 54:
00664 case 53:
00665 case 52:
00666 case 51:
00667 case 50:
00668 case 49:
00669 case 48:
00670 case 47:
00671 case 46:
00672 case 45:
00673 case 44:
00674 case 43:
00675 case 42:
00676 case 41:
00677 return 7;
00678
00679 case 595:
00680 case 594:
00681 case 593:
00682 case 592:
00683 case 591:
00684 case 590:
00685 case 589:
00686 case 588:
00687 case 587:
00688 case 586:
00689 case 585:
00690 case 584:
00691 case 583:
00692 case 582:
00693 case 581:
00694 case 580:
00695 case 579:
00696 case 578:
00697 case 577:
00698 case 576:
00699 case 575:
00700 case 574:
00701 case 573:
00702 case 572:
00703 case 571:
00704 case 570:
00705 case 569:
00706 case 568:
00707 case 567:
00708 case 566:
00709 case 565:
00710 case 564:
00711 case 563:
00712 case 562:
00713 case 561:
00714 case 560:
00715 case 559:
00716 case 558:
00717 case 557:
00718 case 556:
00719 case 555:
00720 case 554:
00721 case 553:
00722 case 552:
00723 case 551:
00724 case 550:
00725 case 549:
00726 case 548:
00727 case 547:
00728 case 546:
00729 case 545:
00730 case 544:
00731 case 543:
00732 case 542:
00733 case 541:
00734 case 540:
00735 case 539:
00736 case 538:
00737 case 537:
00738 case 536:
00739 case 535:
00740 case 534:
00741 case 533:
00742 case 532:
00743 case 531:
00744 case 457:
00745 case 456:
00746 case 455:
00747 case 454:
00748 case 453:
00749 case 452:
00750 case 188:
00751 case 185:
00752 case 184:
00753 case 183:
00754 case 182:
00755 case 181:
00756 case 180:
00757 case 179:
00758 case 178:
00759 case 177:
00760 case 176:
00761 case 175:
00762 case 174:
00763 case 173:
00764 case 172:
00765 case 171:
00766 case 170:
00767 case 169:
00768 case 168:
00769 case 167:
00770 case 166:
00771 case 165:
00772 case 164:
00773 case 163:
00774 case 162:
00775 case 161:
00776 case 160:
00777 case 159:
00778 case 158:
00779 case 157:
00780 case 156:
00781 case 155:
00782 case 154:
00783 case 153:
00784 case 150:
00785 case 149:
00786 case 148:
00787 case 147:
00788 case 146:
00789 case 145:
00790 case 144:
00791 case 143:
00792 case 142:
00793 case 141:
00794 case 140:
00795 case 139:
00796 case 138:
00797 case 137:
00798 case 136:
00799 case 135:
00800 case 134:
00801 case 133:
00802 case 132:
00803 case 131:
00804 case 128:
00805 case 127:
00806 case 126:
00807 case 125:
00808 case 124:
00809 case 123:
00810 case 122:
00811 case 121:
00812 case 120:
00813 case 119:
00814 case 118:
00815 case 117:
00816 case 40:
00817 case 39:
00818 case 38:
00819 case 37:
00820 case 36:
00821 case 35:
00822 return 5;
00823
00824 case 451:
00825 case 34:
00826 extract_constrain_insn_cached (insn);
00827 if ((which_alternative != 0) && (which_alternative != 1))
00828 {
00829 return 5;
00830 }
00831 else if (which_alternative == 1)
00832 {
00833 return 2;
00834 }
00835 else
00836 {
00837 return 1;
00838 }
00839
00840 case 599:
00841 case 450:
00842 case 449:
00843 case 192:
00844 case 33:
00845 case 32:
00846 extract_constrain_insn_cached (insn);
00847 if (which_alternative != 0)
00848 {
00849 return 2;
00850 }
00851 else
00852 {
00853 return 1;
00854 }
00855
00856 case 610:
00857 case 609:
00858 case 608:
00859 case 607:
00860 case 448:
00861 case 203:
00862 case 202:
00863 case 201:
00864 case 200:
00865 case 31:
00866 extract_constrain_insn_cached (insn);
00867 if (which_alternative != 0)
00868 {
00869 return 5;
00870 }
00871 else
00872 {
00873 return 1;
00874 }
00875
00876 case 445:
00877 case 28:
00878 extract_constrain_insn_cached (insn);
00879 if (which_alternative == 1)
00880 {
00881 return 9;
00882 }
00883 else if (which_alternative == 0)
00884 {
00885 return 5;
00886 }
00887 else
00888 {
00889 return 1;
00890 }
00891
00892 case 444:
00893 case 443:
00894 case 27:
00895 case 26:
00896 extract_constrain_insn_cached (insn);
00897 if ((which_alternative == 4) || (which_alternative == 1))
00898 {
00899 return 9;
00900 }
00901 else if (which_alternative == 0)
00902 {
00903 return 5;
00904 }
00905 else if ((which_alternative == 6) || (which_alternative == 3))
00906 {
00907 return 2;
00908 }
00909 else
00910 {
00911 return 1;
00912 }
00913
00914 case 637:
00915 case 618:
00916 case 617:
00917 case 616:
00918 case 603:
00919 case 602:
00920 case 530:
00921 case 509:
00922 case 479:
00923 case 478:
00924 case 477:
00925 case 431:
00926 case 243:
00927 case 211:
00928 case 210:
00929 case 209:
00930 case 196:
00931 case 195:
00932 case 114:
00933 case 92:
00934 case 62:
00935 case 61:
00936 case 60:
00937 case 12:
00938 return 2;
00939
00940 case 426:
00941 case 7:
00942 extract_constrain_insn_cached (insn);
00943 if (which_alternative == 12)
00944 {
00945 return 13 ;
00946 }
00947 else if ((which_alternative == 6) || (which_alternative == 8))
00948 {
00949 return 9;
00950 }
00951 else if (which_alternative == 14)
00952 {
00953 return 6;
00954 }
00955 else if ((which_alternative == 15) || (which_alternative == 7))
00956 {
00957 return 5;
00958 }
00959 else if ((which_alternative == 3) || ((which_alternative == 16) || ((which_alternative == 5) || (which_alternative == 10))))
00960 {
00961 return 2;
00962 }
00963 else
00964 {
00965 return 1;
00966 }
00967
00968 case 5:
00969 extract_constrain_insn_cached (insn);
00970 if (which_alternative == 6)
00971 {
00972 return 9;
00973 }
00974 else if (which_alternative == 8)
00975 {
00976 return 6;
00977 }
00978 else if ((which_alternative == 9) || (which_alternative == 7))
00979 {
00980 return 5;
00981 }
00982 else if ((which_alternative == 3) || (which_alternative == 5))
00983 {
00984 return 2;
00985 }
00986 else
00987 {
00988 return 1;
00989 }
00990
00991 case 422:
00992 case 421:
00993 case 3:
00994 case 2:
00995 extract_constrain_insn_cached (insn);
00996 if (which_alternative == 5)
00997 {
00998 return 9;
00999 }
01000 else if (((which_alternative != 0) && (which_alternative != 1)) && ((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))))
01001 {
01002 return 5;
01003 }
01004 else if ((which_alternative == 2) || (which_alternative == 4))
01005 {
01006 return 2;
01007 }
01008 else
01009 {
01010 return 1;
01011 }
01012
01013 case 420:
01014 case 1:
01015 extract_constrain_insn_cached (insn);
01016 if (which_alternative == 6)
01017 {
01018 return 2;
01019 }
01020 else
01021 {
01022 return 1;
01023 }
01024
01025 case -1:
01026 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
01027 && asm_noperands (PATTERN (insn)) < 0)
01028 fatal_insn_not_found (insn);
01029 default:
01030 return 1;
01031
01032 }
01033 }
01034
01035 extern int function_units_used PARAMS ((rtx));
01036 int
01037 function_units_used (insn)
01038 rtx insn;
01039 {
01040 enum attr_itanium_class attr_itanium_class = get_attr_itanium_class (insn);
01041 unsigned long accum = 0;
01042
01043 accum |= ((attr_itanium_class == ITANIUM_CLASS_STOP_BIT) ? (2) : (0));
01044 accum |= (((attr_itanium_class == ITANIUM_CLASS_BR) || ((attr_itanium_class == ITANIUM_CLASS_SCALL) || ((attr_itanium_class == ITANIUM_CLASS_FCMP) || ((attr_itanium_class == ITANIUM_CLASS_FCVTFX) || ((attr_itanium_class == ITANIUM_CLASS_FLD) || ((attr_itanium_class == ITANIUM_CLASS_FMAC) || ((attr_itanium_class == ITANIUM_CLASS_FMISC) || ((attr_itanium_class == ITANIUM_CLASS_FRAR_I) || ((attr_itanium_class == ITANIUM_CLASS_FRAR_M) || ((attr_itanium_class == ITANIUM_CLASS_FRBR) || ((attr_itanium_class == ITANIUM_CLASS_FRFR) || ((attr_itanium_class == ITANIUM_CLASS_FRPR) || ((attr_itanium_class == ITANIUM_CLASS_IALU) || ((attr_itanium_class == ITANIUM_CLASS_ICMP) || ((attr_itanium_class == ITANIUM_CLASS_ILOG) || ((attr_itanium_class == ITANIUM_CLASS_ISHF) || ((attr_itanium_class == ITANIUM_CLASS_LD) || ((attr_itanium_class == ITANIUM_CLASS_LONG_I) || ((attr_itanium_class == ITANIUM_CLASS_MMMUL) || ((attr_itanium_class == ITANIUM_CLASS_MMSHF) || ((attr_itanium_class == ITANIUM_CLASS_MMSHFI) || ((attr_itanium_class == ITANIUM_CLASS_RSE_M) || ((attr_itanium_class == ITANIUM_CLASS_SEM) || ((attr_itanium_class == ITANIUM_CLASS_STF) || ((attr_itanium_class == ITANIUM_CLASS_ST) || ((attr_itanium_class == ITANIUM_CLASS_SYST_M0) || ((attr_itanium_class == ITANIUM_CLASS_SYST_M) || ((attr_itanium_class == ITANIUM_CLASS_TBIT) || ((attr_itanium_class == ITANIUM_CLASS_TOAR_I) || ((attr_itanium_class == ITANIUM_CLASS_TOAR_M) || ((attr_itanium_class == ITANIUM_CLASS_TOBR) || ((attr_itanium_class == ITANIUM_CLASS_TOFR) || ((attr_itanium_class == ITANIUM_CLASS_TOPR) || ((attr_itanium_class == ITANIUM_CLASS_XMPY) || ((attr_itanium_class == ITANIUM_CLASS_XTD) || ((attr_itanium_class == ITANIUM_CLASS_NOP_M) || ((attr_itanium_class == ITANIUM_CLASS_NOP_I) || ((attr_itanium_class == ITANIUM_CLASS_NOP_F) || ((attr_itanium_class == ITANIUM_CLASS_NOP_B) || ((attr_itanium_class == ITANIUM_CLASS_NOP_X) || ((attr_itanium_class == ITANIUM_CLASS_IGNORE) || (attr_itanium_class == ITANIUM_CLASS_UNKNOWN)))))))))))))))))))))))))))))))))))))))))) ? (1) : (0));
01045
01046 if (accum && accum == (accum & -accum))
01047 {
01048 int i;
01049 for (i = 0; accum >>= 1; ++i) continue;
01050 accum = i;
01051 }
01052 else
01053 accum = ~accum;
01054 return accum;
01055 }
01056
01057 extern enum attr_itanium_requires_unit0 get_attr_itanium_requires_unit0 PARAMS ((rtx));
01058 enum attr_itanium_requires_unit0
01059 get_attr_itanium_requires_unit0 (insn)
01060 rtx insn;
01061 {
01062 switch (recog_memoized (insn))
01063 {
01064 case 424:
01065 extract_constrain_insn_cached (insn);
01066 if (((which_alternative != 0) && (which_alternative != 1)) && ((which_alternative != 2) && ((which_alternative != 3) && ((which_alternative != 4) && (which_alternative != 6)))))
01067 {
01068 return ITANIUM_REQUIRES_UNIT0_YES;
01069 }
01070 else
01071 {
01072 return ITANIUM_REQUIRES_UNIT0_NO;
01073 }
01074
01075 case 596:
01076 case 482:
01077 case 481:
01078 case 480:
01079 case 189:
01080 case 65:
01081 case 64:
01082 case 63:
01083 extract_constrain_insn_cached (insn);
01084 if (which_alternative == 1)
01085 {
01086 return ITANIUM_REQUIRES_UNIT0_YES;
01087 }
01088 else
01089 {
01090 return ITANIUM_REQUIRES_UNIT0_NO;
01091 }
01092
01093 case 451:
01094 case 34:
01095 extract_constrain_insn_cached (insn);
01096 if ((which_alternative != 0) && (which_alternative != 1))
01097 {
01098 return ITANIUM_REQUIRES_UNIT0_YES;
01099 }
01100 else
01101 {
01102 return ITANIUM_REQUIRES_UNIT0_NO;
01103 }
01104
01105 case 610:
01106 case 609:
01107 case 608:
01108 case 607:
01109 case 483:
01110 case 448:
01111 case 203:
01112 case 202:
01113 case 201:
01114 case 200:
01115 case 66:
01116 case 31:
01117 extract_constrain_insn_cached (insn);
01118 if (which_alternative != 0)
01119 {
01120 return ITANIUM_REQUIRES_UNIT0_YES;
01121 }
01122 else
01123 {
01124 return ITANIUM_REQUIRES_UNIT0_NO;
01125 }
01126
01127 case 484:
01128 case 445:
01129 case 67:
01130 case 28:
01131 extract_constrain_insn_cached (insn);
01132 if (which_alternative == 0)
01133 {
01134 return ITANIUM_REQUIRES_UNIT0_YES;
01135 }
01136 else
01137 {
01138 return ITANIUM_REQUIRES_UNIT0_NO;
01139 }
01140
01141 case 444:
01142 case 443:
01143 case 27:
01144 case 26:
01145 extract_constrain_insn_cached (insn);
01146 if ((which_alternative == 3) || (which_alternative == 0))
01147 {
01148 return ITANIUM_REQUIRES_UNIT0_YES;
01149 }
01150 else
01151 {
01152 return ITANIUM_REQUIRES_UNIT0_NO;
01153 }
01154
01155 case 426:
01156 case 7:
01157 extract_constrain_insn_cached (insn);
01158 if ((which_alternative == 5) || ((which_alternative == 15) || ((which_alternative == 14) || ((which_alternative == 10) || ((which_alternative == 11) || ((which_alternative == 17) || ((which_alternative == 16) || ((which_alternative == 13) || ((which_alternative == 12) || (which_alternative == 7))))))))))
01159 {
01160 return ITANIUM_REQUIRES_UNIT0_YES;
01161 }
01162 else
01163 {
01164 return ITANIUM_REQUIRES_UNIT0_NO;
01165 }
01166
01167 case 5:
01168 extract_constrain_insn_cached (insn);
01169 if ((which_alternative == 5) || ((which_alternative == 9) || ((which_alternative == 8) || (which_alternative == 7))))
01170 {
01171 return ITANIUM_REQUIRES_UNIT0_YES;
01172 }
01173 else
01174 {
01175 return ITANIUM_REQUIRES_UNIT0_NO;
01176 }
01177
01178 case 422:
01179 case 421:
01180 case 3:
01181 case 2:
01182 extract_constrain_insn_cached (insn);
01183 if (((which_alternative != 0) && (which_alternative != 1)) && ((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 5))))
01184 {
01185 return ITANIUM_REQUIRES_UNIT0_YES;
01186 }
01187 else
01188 {
01189 return ITANIUM_REQUIRES_UNIT0_NO;
01190 }
01191
01192 case 420:
01193 case 1:
01194 extract_constrain_insn_cached (insn);
01195 if (which_alternative == 4)
01196 {
01197 return ITANIUM_REQUIRES_UNIT0_YES;
01198 }
01199 else
01200 {
01201 return ITANIUM_REQUIRES_UNIT0_NO;
01202 }
01203
01204 case 657:
01205 case 656:
01206 case 655:
01207 case 654:
01208 case 653:
01209 case 652:
01210 case 640:
01211 case 620:
01212 case 619:
01213 case 618:
01214 case 617:
01215 case 616:
01216 case 605:
01217 case 604:
01218 case 579:
01219 case 578:
01220 case 577:
01221 case 576:
01222 case 575:
01223 case 553:
01224 case 552:
01225 case 551:
01226 case 550:
01227 case 549:
01228 case 538:
01229 case 537:
01230 case 536:
01231 case 535:
01232 case 534:
01233 case 530:
01234 case 509:
01235 case 508:
01236 case 507:
01237 case 506:
01238 case 505:
01239 case 496:
01240 case 495:
01241 case 494:
01242 case 493:
01243 case 475:
01244 case 474:
01245 case 473:
01246 case 472:
01247 case 269:
01248 case 268:
01249 case 267:
01250 case 266:
01251 case 265:
01252 case 264:
01253 case 248:
01254 case 246:
01255 case 241:
01256 case 213:
01257 case 212:
01258 case 211:
01259 case 210:
01260 case 209:
01261 case 198:
01262 case 197:
01263 case 188:
01264 case 169:
01265 case 168:
01266 case 167:
01267 case 166:
01268 case 165:
01269 case 141:
01270 case 140:
01271 case 139:
01272 case 138:
01273 case 137:
01274 case 124:
01275 case 123:
01276 case 122:
01277 case 121:
01278 case 120:
01279 case 114:
01280 case 92:
01281 case 91:
01282 case 90:
01283 case 89:
01284 case 88:
01285 case 79:
01286 case 78:
01287 case 77:
01288 case 76:
01289 case 58:
01290 case 57:
01291 case 56:
01292 case 55:
01293 return ITANIUM_REQUIRES_UNIT0_YES;
01294
01295 case -1:
01296 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
01297 && asm_noperands (PATTERN (insn)) < 0)
01298 fatal_insn_not_found (insn);
01299 default:
01300 return ITANIUM_REQUIRES_UNIT0_NO;
01301
01302 }
01303 }
01304
01305 extern enum attr_itanium_class get_attr_itanium_class PARAMS ((rtx));
01306 enum attr_itanium_class
01307 get_attr_itanium_class (insn)
01308 rtx insn;
01309 {
01310 switch (recog_memoized (insn))
01311 {
01312 case 426:
01313 case 7:
01314 extract_constrain_insn_cached (insn);
01315 if ((which_alternative == 0) || (which_alternative == 1))
01316 {
01317 return ITANIUM_CLASS_IALU;
01318 }
01319 else if (which_alternative == 2)
01320 {
01321 return ITANIUM_CLASS_LONG_I;
01322 }
01323 else if (which_alternative == 3)
01324 {
01325 return ITANIUM_CLASS_LD;
01326 }
01327 else if (which_alternative == 4)
01328 {
01329 return ITANIUM_CLASS_ST;
01330 }
01331 else if (which_alternative == 5)
01332 {
01333 return ITANIUM_CLASS_FRFR;
01334 }
01335 else if (which_alternative == 6)
01336 {
01337 return ITANIUM_CLASS_TOFR;
01338 }
01339 else if (which_alternative == 7)
01340 {
01341 return ITANIUM_CLASS_FMISC;
01342 }
01343 else if (which_alternative == 8)
01344 {
01345 return ITANIUM_CLASS_FLD;
01346 }
01347 else if (which_alternative == 9)
01348 {
01349 return ITANIUM_CLASS_STF;
01350 }
01351 else if (which_alternative == 10)
01352 {
01353 return ITANIUM_CLASS_FRBR;
01354 }
01355 else if (which_alternative == 11)
01356 {
01357 return ITANIUM_CLASS_TOBR;
01358 }
01359 else if (which_alternative == 12)
01360 {
01361 return ITANIUM_CLASS_FRAR_I;
01362 }
01363 else if (which_alternative == 13)
01364 {
01365 return ITANIUM_CLASS_TOAR_I;
01366 }
01367 else if (which_alternative == 14)
01368 {
01369 return ITANIUM_CLASS_FRAR_M;
01370 }
01371 else if (which_alternative == 15)
01372 {
01373 return ITANIUM_CLASS_TOAR_M;
01374 }
01375 else if (which_alternative == 16)
01376 {
01377 return ITANIUM_CLASS_FRPR;
01378 }
01379 else
01380 {
01381 return ITANIUM_CLASS_TOPR;
01382 }
01383
01384 case 424:
01385 case 5:
01386 extract_constrain_insn_cached (insn);
01387 if ((which_alternative == 0) || (which_alternative == 1))
01388 {
01389 return ITANIUM_CLASS_IALU;
01390 }
01391 else if (which_alternative == 2)
01392 {
01393 return ITANIUM_CLASS_LONG_I;
01394 }
01395 else if (which_alternative == 3)
01396 {
01397 return ITANIUM_CLASS_LD;
01398 }
01399 else if (which_alternative == 4)
01400 {
01401 return ITANIUM_CLASS_ST;
01402 }
01403 else if (which_alternative == 5)
01404 {
01405 return ITANIUM_CLASS_FRFR;
01406 }
01407 else if (which_alternative == 6)
01408 {
01409 return ITANIUM_CLASS_TOFR;
01410 }
01411 else if (which_alternative == 7)
01412 {
01413 return ITANIUM_CLASS_FMISC;
01414 }
01415 else if (which_alternative == 8)
01416 {
01417 return ITANIUM_CLASS_FRAR_M;
01418 }
01419 else
01420 {
01421 return ITANIUM_CLASS_TOAR_M;
01422 }
01423
01424 case 422:
01425 case 421:
01426 case 3:
01427 case 2:
01428 extract_constrain_insn_cached (insn);
01429 if ((which_alternative == 0) || (which_alternative == 1))
01430 {
01431 return ITANIUM_CLASS_IALU;
01432 }
01433 else if (which_alternative == 2)
01434 {
01435 return ITANIUM_CLASS_LD;
01436 }
01437 else if (which_alternative == 3)
01438 {
01439 return ITANIUM_CLASS_ST;
01440 }
01441 else if (which_alternative == 4)
01442 {
01443 return ITANIUM_CLASS_FRFR;
01444 }
01445 else if (which_alternative == 5)
01446 {
01447 return ITANIUM_CLASS_TOFR;
01448 }
01449 else
01450 {
01451 return ITANIUM_CLASS_FMISC;
01452 }
01453
01454 case 420:
01455 case 1:
01456 extract_constrain_insn_cached (insn);
01457 if ((which_alternative == 0) || (which_alternative == 1))
01458 {
01459 return ITANIUM_CLASS_ICMP;
01460 }
01461 else if ((which_alternative == 2) || (which_alternative == 3))
01462 {
01463 return ITANIUM_CLASS_UNKNOWN;
01464 }
01465 else if (which_alternative == 4)
01466 {
01467 return ITANIUM_CLASS_TBIT;
01468 }
01469 else if (which_alternative == 5)
01470 {
01471 return ITANIUM_CLASS_IALU;
01472 }
01473 else if (which_alternative == 6)
01474 {
01475 return ITANIUM_CLASS_LD;
01476 }
01477 else if (which_alternative == 7)
01478 {
01479 return ITANIUM_CLASS_ST;
01480 }
01481 else
01482 {
01483 return ITANIUM_CLASS_IALU;
01484 }
01485
01486 case 220:
01487 case 222:
01488 extract_constrain_insn_cached (insn);
01489 if (which_alternative == 0)
01490 {
01491 return ITANIUM_CLASS_IALU;
01492 }
01493 else
01494 {
01495 return ITANIUM_CLASS_UNKNOWN;
01496 }
01497
01498 case 26:
01499 case 27:
01500 case 443:
01501 case 444:
01502 extract_constrain_insn_cached (insn);
01503 if (which_alternative == 0)
01504 {
01505 return ITANIUM_CLASS_FMISC;
01506 }
01507 else if (which_alternative == 1)
01508 {
01509 return ITANIUM_CLASS_FLD;
01510 }
01511 else if (which_alternative == 2)
01512 {
01513 return ITANIUM_CLASS_STF;
01514 }
01515 else if (which_alternative == 3)
01516 {
01517 return ITANIUM_CLASS_FRFR;
01518 }
01519 else if (which_alternative == 4)
01520 {
01521 return ITANIUM_CLASS_TOFR;
01522 }
01523 else if (which_alternative == 5)
01524 {
01525 return ITANIUM_CLASS_IALU;
01526 }
01527 else if (which_alternative == 6)
01528 {
01529 return ITANIUM_CLASS_LD;
01530 }
01531 else
01532 {
01533 return ITANIUM_CLASS_ST;
01534 }
01535
01536 case 28:
01537 case 445:
01538 extract_constrain_insn_cached (insn);
01539 if (which_alternative == 0)
01540 {
01541 return ITANIUM_CLASS_FMISC;
01542 }
01543 else if (which_alternative == 1)
01544 {
01545 return ITANIUM_CLASS_FLD;
01546 }
01547 else
01548 {
01549 return ITANIUM_CLASS_STF;
01550 }
01551
01552 case 31:
01553 case 448:
01554 extract_constrain_insn_cached (insn);
01555 if (which_alternative == 0)
01556 {
01557 return ITANIUM_CLASS_XTD;
01558 }
01559 else
01560 {
01561 return ITANIUM_CLASS_FMISC;
01562 }
01563
01564 case 32:
01565 case 33:
01566 case 449:
01567 case 450:
01568 extract_constrain_insn_cached (insn);
01569 if (which_alternative == 0)
01570 {
01571 return ITANIUM_CLASS_XTD;
01572 }
01573 else
01574 {
01575 return ITANIUM_CLASS_LD;
01576 }
01577
01578 case 34:
01579 case 451:
01580 extract_constrain_insn_cached (insn);
01581 if (which_alternative == 0)
01582 {
01583 return ITANIUM_CLASS_XTD;
01584 }
01585 else if (which_alternative == 1)
01586 {
01587 return ITANIUM_CLASS_LD;
01588 }
01589 else
01590 {
01591 return ITANIUM_CLASS_FMISC;
01592 }
01593
01594 case 63:
01595 case 64:
01596 case 65:
01597 case 480:
01598 case 481:
01599 case 482:
01600 extract_constrain_insn_cached (insn);
01601 if (which_alternative == 0)
01602 {
01603 return ITANIUM_CLASS_UNKNOWN;
01604 }
01605 else if (which_alternative == 1)
01606 {
01607 return ITANIUM_CLASS_TBIT;
01608 }
01609 else
01610 {
01611 return ITANIUM_CLASS_ILOG;
01612 }
01613
01614 case 66:
01615 case 483:
01616 extract_constrain_insn_cached (insn);
01617 if (which_alternative == 0)
01618 {
01619 return ITANIUM_CLASS_UNKNOWN;
01620 }
01621 else
01622 {
01623 return ITANIUM_CLASS_TBIT;
01624 }
01625
01626 case 67:
01627 case 484:
01628 extract_constrain_insn_cached (insn);
01629 if (which_alternative == 0)
01630 {
01631 return ITANIUM_CLASS_TBIT;
01632 }
01633 else if (which_alternative == 1)
01634 {
01635 return ITANIUM_CLASS_ILOG;
01636 }
01637 else if (which_alternative == 2)
01638 {
01639 return ITANIUM_CLASS_UNKNOWN;
01640 }
01641 else
01642 {
01643 return ITANIUM_CLASS_UNKNOWN;
01644 }
01645
01646 case 189:
01647 case 596:
01648 extract_constrain_insn_cached (insn);
01649 if (which_alternative == 0)
01650 {
01651 return ITANIUM_CLASS_IALU;
01652 }
01653 else if (which_alternative == 1)
01654 {
01655 return ITANIUM_CLASS_ISHF;
01656 }
01657 else
01658 {
01659 return ITANIUM_CLASS_MMSHF;
01660 }
01661
01662 case 192:
01663 case 599:
01664 extract_constrain_insn_cached (insn);
01665 if (which_alternative == 0)
01666 {
01667 return ITANIUM_CLASS_IALU;
01668 }
01669 else if (which_alternative == 1)
01670 {
01671 return ITANIUM_CLASS_MMSHF;
01672 }
01673 else
01674 {
01675 return ITANIUM_CLASS_MMSHFI;
01676 }
01677
01678 case 195:
01679 case 196:
01680 case 602:
01681 case 603:
01682 extract_constrain_insn_cached (insn);
01683 if (which_alternative == 0)
01684 {
01685 return ITANIUM_CLASS_MMSHF;
01686 }
01687 else
01688 {
01689 return ITANIUM_CLASS_MMSHFI;
01690 }
01691
01692 case 200:
01693 case 201:
01694 case 202:
01695 case 203:
01696 case 607:
01697 case 608:
01698 case 609:
01699 case 610:
01700 extract_constrain_insn_cached (insn);
01701 if (which_alternative == 0)
01702 {
01703 return ITANIUM_CLASS_ILOG;
01704 }
01705 else
01706 {
01707 return ITANIUM_CLASS_FMISC;
01708 }
01709
01710 case 225:
01711 case 226:
01712 case 227:
01713 case 228:
01714 case 229:
01715 case 623:
01716 case 624:
01717 case 625:
01718 case 626:
01719 case 627:
01720 extract_constrain_insn_cached (insn);
01721 if (which_alternative == 0)
01722 {
01723 return ITANIUM_CLASS_BR;
01724 }
01725 else
01726 {
01727 return ITANIUM_CLASS_SCALL;
01728 }
01729
01730 case 261:
01731 case 649:
01732 return ITANIUM_CLASS_LFETCH;
01733
01734 case 254:
01735 case 646:
01736 return ITANIUM_CLASS_NOP_X;
01737
01738 case 250:
01739 case 642:
01740 return ITANIUM_CLASS_NOP_M;
01741
01742 case 251:
01743 case 643:
01744 return ITANIUM_CLASS_NOP_I;
01745
01746 case 252:
01747 case 260:
01748 case 644:
01749 case 648:
01750 return ITANIUM_CLASS_NOP_F;
01751
01752 case 253:
01753 case 645:
01754 return ITANIUM_CLASS_NOP_B;
01755
01756 case 29:
01757 case 30:
01758 case 446:
01759 case 447:
01760 return ITANIUM_CLASS_XTD;
01761
01762 case 99:
01763 case 100:
01764 case 108:
01765 case 109:
01766 case 111:
01767 case 112:
01768 case 516:
01769 case 517:
01770 case 524:
01771 case 525:
01772 case 527:
01773 case 528:
01774 return ITANIUM_CLASS_XMPY;
01775
01776 case 76:
01777 case 77:
01778 case 78:
01779 case 79:
01780 case 88:
01781 case 89:
01782 case 90:
01783 case 91:
01784 case 212:
01785 case 213:
01786 case 493:
01787 case 494:
01788 case 495:
01789 case 496:
01790 case 505:
01791 case 506:
01792 case 507:
01793 case 508:
01794 case 619:
01795 case 620:
01796 return ITANIUM_CLASS_TBIT;
01797
01798 case 263:
01799 case 651:
01800 return ITANIUM_CLASS_SYST_M;
01801
01802 case 241:
01803 return ITANIUM_CLASS_SYST_M0;
01804
01805 case 242:
01806 case 636:
01807 return ITANIUM_CLASS_ST;
01808
01809 case 244:
01810 case 638:
01811 return ITANIUM_CLASS_STF;
01812
01813 case 264:
01814 case 265:
01815 case 266:
01816 case 267:
01817 case 268:
01818 case 269:
01819 case 652:
01820 case 653:
01821 case 654:
01822 case 655:
01823 case 656:
01824 case 657:
01825 return ITANIUM_CLASS_SEM;
01826
01827 case 248:
01828 return ITANIUM_CLASS_RSE_M;
01829
01830 case 60:
01831 case 61:
01832 case 62:
01833 case 477:
01834 case 478:
01835 case 479:
01836 return ITANIUM_CLASS_MMSHF;
01837
01838 case 92:
01839 case 114:
01840 case 509:
01841 case 530:
01842 return ITANIUM_CLASS_MMMUL;
01843
01844 case 10:
01845 case 15:
01846 case 20:
01847 case 429:
01848 case 434:
01849 case 439:
01850 return ITANIUM_CLASS_LONG_I;
01851
01852 case 258:
01853 case 259:
01854 case 647:
01855 return ITANIUM_CLASS_CHK_S;
01856
01857 case 12:
01858 case 243:
01859 case 431:
01860 case 637:
01861 return ITANIUM_CLASS_LD;
01862
01863 case 55:
01864 case 56:
01865 case 57:
01866 case 58:
01867 case 197:
01868 case 198:
01869 case 472:
01870 case 473:
01871 case 474:
01872 case 475:
01873 case 604:
01874 case 605:
01875 return ITANIUM_CLASS_ISHF;
01876
01877 case 199:
01878 case 204:
01879 case 606:
01880 case 611:
01881 return ITANIUM_CLASS_ILOG;
01882
01883 case 0:
01884 case 68:
01885 case 69:
01886 case 70:
01887 case 71:
01888 case 72:
01889 case 73:
01890 case 74:
01891 case 75:
01892 case 80:
01893 case 81:
01894 case 82:
01895 case 83:
01896 case 84:
01897 case 85:
01898 case 86:
01899 case 87:
01900 case 205:
01901 case 206:
01902 case 207:
01903 case 208:
01904 case 485:
01905 case 486:
01906 case 487:
01907 case 488:
01908 case 489:
01909 case 490:
01910 case 491:
01911 case 492:
01912 case 497:
01913 case 498:
01914 case 499:
01915 case 500:
01916 case 501:
01917 case 502:
01918 case 503:
01919 case 504:
01920 case 612:
01921 case 613:
01922 case 614:
01923 case 615:
01924 return ITANIUM_CLASS_ICMP;
01925
01926 case 8:
01927 case 9:
01928 case 11:
01929 case 13:
01930 case 14:
01931 case 16:
01932 case 17:
01933 case 18:
01934 case 19:
01935 case 21:
01936 case 22:
01937 case 23:
01938 case 93:
01939 case 94:
01940 case 95:
01941 case 96:
01942 case 97:
01943 case 98:
01944 case 101:
01945 case 103:
01946 case 104:
01947 case 105:
01948 case 106:
01949 case 107:
01950 case 113:
01951 case 193:
01952 case 223:
01953 case 224:
01954 case 238:
01955 case 239:
01956 case 273:
01957 case 274:
01958 case 275:
01959 case 427:
01960 case 428:
01961 case 430:
01962 case 432:
01963 case 433:
01964 case 435:
01965 case 436:
01966 case 437:
01967 case 438:
01968 case 440:
01969 case 441:
01970 case 442:
01971 case 510:
01972 case 511:
01973 case 512:
01974 case 513:
01975 case 514:
01976 case 515:
01977 case 518:
01978 case 519:
01979 case 520:
01980 case 521:
01981 case 522:
01982 case 523:
01983 case 529:
01984 case 600:
01985 case 634:
01986 case 635:
01987 case 658:
01988 case 659:
01989 case 660:
01990 return ITANIUM_CLASS_IALU;
01991
01992 case 246:
01993 case 640:
01994 return ITANIUM_CLASS_FRAR_I;
01995
01996 case 120:
01997 case 121:
01998 case 122:
01999 case 123:
02000 case 124:
02001 case 137:
02002 case 138:
02003 case 139:
02004 case 140:
02005 case 141:
02006 case 165:
02007 case 166:
02008 case 167:
02009 case 168:
02010 case 169:
02011 case 188:
02012 case 534:
02013 case 535:
02014 case 536:
02015 case 537:
02016 case 538:
02017 case 549:
02018 case 550:
02019 case 551:
02020 case 552:
02021 case 553:
02022 case 575:
02023 case 576:
02024 case 577:
02025 case 578:
02026 case 579:
02027 return ITANIUM_CLASS_FMISC;
02028
02029 case 245:
02030 case 639:
02031 return ITANIUM_CLASS_FLD;
02032
02033 case 41:
02034 case 42:
02035 case 43:
02036 case 44:
02037 case 45:
02038 case 46:
02039 case 47:
02040 case 48:
02041 case 49:
02042 case 50:
02043 case 51:
02044 case 52:
02045 case 53:
02046 case 54:
02047 case 458:
02048 case 459:
02049 case 460:
02050 case 461:
02051 case 462:
02052 case 463:
02053 case 464:
02054 case 465:
02055 case 466:
02056 case 467:
02057 case 468:
02058 case 469:
02059 case 470:
02060 case 471:
02061 return ITANIUM_CLASS_FCVTFX;
02062
02063 case 209:
02064 case 210:
02065 case 211:
02066 case 616:
02067 case 617:
02068 case 618:
02069 return ITANIUM_CLASS_FCMP;
02070
02071 case 214:
02072 case 215:
02073 case 216:
02074 case 230:
02075 case 231:
02076 case 232:
02077 case 233:
02078 case 234:
02079 case 235:
02080 case 236:
02081 case 237:
02082 case 628:
02083 case 629:
02084 case 630:
02085 case 631:
02086 case 632:
02087 case 633:
02088 return ITANIUM_CLASS_BR;
02089
02090 case 257:
02091 return ITANIUM_CLASS_STOP_BIT;
02092
02093 case 240:
02094 case 255:
02095 case 256:
02096 case 270:
02097 case 271:
02098 case 272:
02099 return ITANIUM_CLASS_IGNORE;
02100
02101 case -1:
02102 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
02103 && asm_noperands (PATTERN (insn)) < 0)
02104 fatal_insn_not_found (insn);
02105 case 4:
02106 case 6:
02107 case 24:
02108 case 25:
02109 case 59:
02110 case 102:
02111 case 110:
02112 case 115:
02113 case 116:
02114 case 129:
02115 case 130:
02116 case 151:
02117 case 152:
02118 case 186:
02119 case 187:
02120 case 190:
02121 case 191:
02122 case 194:
02123 case 217:
02124 case 218:
02125 case 219:
02126 case 221:
02127 case 247:
02128 case 249:
02129 case 262:
02130 case 423:
02131 case 425:
02132 case 476:
02133 case 526:
02134 case 597:
02135 case 598:
02136 case 601:
02137 case 621:
02138 case 622:
02139 case 641:
02140 case 650:
02141 return ITANIUM_CLASS_UNKNOWN;
02142
02143 default:
02144 return ITANIUM_CLASS_FMAC;
02145
02146 }
02147 }
02148
02149 extern enum attr_predicable get_attr_predicable PARAMS ((rtx));
02150 enum attr_predicable
02151 get_attr_predicable (insn)
02152 rtx insn;
02153 {
02154 switch (recog_memoized (insn))
02155 {
02156 case 0:
02157 case 24:
02158 case 25:
02159 case 102:
02160 case 115:
02161 case 116:
02162 case 129:
02163 case 130:
02164 case 151:
02165 case 152:
02166 case 186:
02167 case 187:
02168 case 188:
02169 case 214:
02170 case 215:
02171 case 216:
02172 case 219:
02173 case 220:
02174 case 221:
02175 case 222:
02176 case 223:
02177 case 224:
02178 case 233:
02179 case 234:
02180 case 240:
02181 case 241:
02182 case 247:
02183 case 248:
02184 case 255:
02185 case 256:
02186 case 257:
02187 case 259:
02188 case 270:
02189 case 271:
02190 case 272:
02191 return PREDICABLE_NO;
02192
02193 case -1:
02194 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
02195 && asm_noperands (PATTERN (insn)) < 0)
02196 fatal_insn_not_found (insn);
02197 default:
02198 return PREDICABLE_YES;
02199
02200 }
02201 }
02202
02203 extern enum attr_type get_attr_type PARAMS ((rtx));
02204 enum attr_type
02205 get_attr_type (insn)
02206 rtx insn;
02207 {
02208 switch (recog_memoized (insn))
02209 {
02210 case 424:
02211 extract_constrain_insn_cached (insn);
02212 if ((which_alternative != 0) && ((which_alternative != 1) && ((which_alternative != 2) && (which_alternative != 7))))
02213 {
02214 return TYPE_M;
02215 }
02216 else if ((which_alternative == 0) || (which_alternative == 1))
02217 {
02218 return TYPE_A;
02219 }
02220 else if (which_alternative == 7)
02221 {
02222 return TYPE_F;
02223 }
02224 else if (which_alternative == 2)
02225 {
02226 return TYPE_L;
02227 }
02228 else
02229 {
02230 return TYPE_UNKNOWN;
02231 }
02232
02233 case 420:
02234 extract_constrain_insn_cached (insn);
02235 if ((which_alternative == 6) || (which_alternative == 7))
02236 {
02237 return TYPE_M;
02238 }
02239 else if (((which_alternative != 0) && ((which_alternative != 1) && ((which_alternative != 2) && ((which_alternative != 3) && (which_alternative != 4))))) || ((which_alternative == 0) || (which_alternative == 1)))
02240 {
02241 return TYPE_A;
02242 }
02243 else if (which_alternative == 4)
02244 {
02245 return TYPE_I;
02246 }
02247 else
02248 {
02249 return TYPE_UNKNOWN;
02250 }
02251
02252 case 222:
02253 case 220:
02254 extract_constrain_insn_cached (insn);
02255 if (which_alternative == 0)
02256 {
02257 return TYPE_A;
02258 }
02259 else
02260 {
02261 return TYPE_UNKNOWN;
02262 }
02263
02264 case 610:
02265 case 609:
02266 case 608:
02267 case 607:
02268 case 203:
02269 case 202:
02270 case 201:
02271 case 200:
02272 extract_constrain_insn_cached (insn);
02273 if (which_alternative == 0)
02274 {
02275 return TYPE_A;
02276 }
02277 else
02278 {
02279 return TYPE_F;
02280 }
02281
02282 case 599:
02283 case 596:
02284 case 192:
02285 case 189:
02286 extract_constrain_insn_cached (insn);
02287 if (which_alternative == 0)
02288 {
02289 return TYPE_A;
02290 }
02291 else
02292 {
02293 return TYPE_I;
02294 }
02295
02296 case 484:
02297 case 67:
02298 extract_constrain_insn_cached (insn);
02299 if (which_alternative == 1)
02300 {
02301 return TYPE_A;
02302 }
02303 else if (which_alternative == 0)
02304 {
02305 return TYPE_I;
02306 }
02307 else
02308 {
02309 return TYPE_UNKNOWN;
02310 }
02311
02312 case 483:
02313 case 66:
02314 extract_constrain_insn_cached (insn);
02315 if (which_alternative != 0)
02316 {
02317 return TYPE_I;
02318 }
02319 else
02320 {
02321 return TYPE_UNKNOWN;
02322 }
02323
02324 case 482:
02325 case 481:
02326 case 480:
02327 case 65:
02328 case 64:
02329 case 63:
02330 extract_constrain_insn_cached (insn);
02331 if ((which_alternative != 0) && (which_alternative != 1))
02332 {
02333 return TYPE_A;
02334 }
02335 else if (which_alternative == 1)
02336 {
02337 return TYPE_I;
02338 }
02339 else
02340 {
02341 return TYPE_UNKNOWN;
02342 }
02343
02344 case 451:
02345 case 34:
02346 extract_constrain_insn_cached (insn);
02347 if (which_alternative == 1)
02348 {
02349 return TYPE_M;
02350 }
02351 else if (which_alternative != 0)
02352 {
02353 return TYPE_F;
02354 }
02355 else
02356 {
02357 return TYPE_I;
02358 }
02359
02360 case 450:
02361 case 449:
02362 case 33:
02363 case 32:
02364 extract_constrain_insn_cached (insn);
02365 if (which_alternative != 0)
02366 {
02367 return TYPE_M;
02368 }
02369 else
02370 {
02371 return TYPE_I;
02372 }
02373
02374 case 448:
02375 case 31:
02376 extract_constrain_insn_cached (insn);
02377 if (which_alternative != 0)
02378 {
02379 return TYPE_F;
02380 }
02381 else
02382 {
02383 return TYPE_I;
02384 }
02385
02386 case 445:
02387 case 28:
02388 extract_constrain_insn_cached (insn);
02389 if (which_alternative != 0)
02390 {
02391 return TYPE_M;
02392 }
02393 else
02394 {
02395 return TYPE_F;
02396 }
02397
02398 case 444:
02399 case 443:
02400 case 27:
02401 case 26:
02402 extract_constrain_insn_cached (insn);
02403 if (((which_alternative != 0) && ((which_alternative != 1) && ((which_alternative != 2) && ((which_alternative != 3) && ((which_alternative != 4) && (which_alternative != 5)))))) || ((which_alternative == 1) || ((which_alternative == 2) || ((which_alternative == 3) || (which_alternative == 4)))))
02404 {
02405 return TYPE_M;
02406 }
02407 else if (which_alternative == 5)
02408 {
02409 return TYPE_A;
02410 }
02411 else if (which_alternative == 0)
02412 {
02413 return TYPE_F;
02414 }
02415 else
02416 {
02417 return TYPE_UNKNOWN;
02418 }
02419
02420 case 426:
02421 case 7:
02422 extract_constrain_insn_cached (insn);
02423 if ((which_alternative == 3) || ((which_alternative == 4) || ((which_alternative == 8) || ((which_alternative == 9) || ((which_alternative == 14) || ((which_alternative == 15) || ((which_alternative == 5) || (which_alternative == 6))))))))
02424 {
02425 return TYPE_M;
02426 }
02427 else if ((which_alternative == 0) || (which_alternative == 1))
02428 {
02429 return TYPE_A;
02430 }
02431 else if (which_alternative == 7)
02432 {
02433 return TYPE_F;
02434 }
02435 else if ((which_alternative == 12) || ((which_alternative == 13) || ((which_alternative == 10) || ((which_alternative == 11) || ((which_alternative == 16) || (which_alternative == 17))))))
02436 {
02437 return TYPE_I;
02438 }
02439 else
02440 {
02441 return TYPE_L;
02442 }
02443
02444 case 5:
02445 extract_constrain_insn_cached (insn);
02446 if ((which_alternative == 3) || ((which_alternative == 4) || ((which_alternative == 8) || ((which_alternative == 9) || ((which_alternative == 5) || (which_alternative == 6))))))
02447 {
02448 return TYPE_M;
02449 }
02450 else if ((which_alternative == 0) || (which_alternative == 1))
02451 {
02452 return TYPE_A;
02453 }
02454 else if (which_alternative == 7)
02455 {
02456 return TYPE_F;
02457 }
02458 else
02459 {
02460 return TYPE_L;
02461 }
02462
02463 case 422:
02464 case 421:
02465 case 3:
02466 case 2:
02467 extract_constrain_insn_cached (insn);
02468 if ((which_alternative == 2) || ((which_alternative == 3) || ((which_alternative == 4) || (which_alternative == 5))))
02469 {
02470 return TYPE_M;
02471 }
02472 else if ((which_alternative == 0) || (which_alternative == 1))
02473 {
02474 return TYPE_A;
02475 }
02476 else
02477 {
02478 return TYPE_F;
02479 }
02480
02481 case 1:
02482 extract_constrain_insn_cached (insn);
02483 if ((which_alternative == 6) || (which_alternative == 7))
02484 {
02485 return TYPE_M;
02486 }
02487 else if (((which_alternative == 5) || (which_alternative == 8)) || ((which_alternative == 0) || (which_alternative == 1)))
02488 {
02489 return TYPE_A;
02490 }
02491 else if (which_alternative == 4)
02492 {
02493 return TYPE_I;
02494 }
02495 else
02496 {
02497 return TYPE_UNKNOWN;
02498 }
02499
02500 case 257:
02501 return TYPE_S;
02502
02503 case 646:
02504 case 254:
02505 return TYPE_X;
02506
02507 case 439:
02508 case 434:
02509 case 429:
02510 case 20:
02511 case 15:
02512 case 10:
02513 return TYPE_L;
02514
02515 case 645:
02516 case 633:
02517 case 632:
02518 case 631:
02519 case 630:
02520 case 629:
02521 case 628:
02522 case 627:
02523 case 626:
02524 case 625:
02525 case 624:
02526 case 623:
02527 case 253:
02528 case 237:
02529 case 236:
02530 case 235:
02531 case 234:
02532 case 233:
02533 case 232:
02534 case 231:
02535 case 230:
02536 case 229:
02537 case 228:
02538 case 227:
02539 case 226:
02540 case 225:
02541 case 216:
02542 case 215:
02543 case 214:
02544 return TYPE_B;
02545
02546 case 657:
02547 case 656:
02548 case 655:
02549 case 654:
02550 case 653:
02551 case 652:
02552 case 651:
02553 case 649:
02554 case 642:
02555 case 639:
02556 case 638:
02557 case 637:
02558 case 636:
02559 case 431:
02560 case 269:
02561 case 268:
02562 case 267:
02563 case 266:
02564 case 265:
02565 case 264:
02566 case 263:
02567 case 261:
02568 case 250:
02569 case 248:
02570 case 245:
02571 case 244:
02572 case 243:
02573 case 242:
02574 case 241:
02575 case 12:
02576 return TYPE_M;
02577
02578 case 643:
02579 case 640:
02580 case 620:
02581 case 619:
02582 case 605:
02583 case 604:
02584 case 603:
02585 case 602:
02586 case 530:
02587 case 509:
02588 case 508:
02589 case 507:
02590 case 506:
02591 case 505:
02592 case 496:
02593 case 495:
02594 case 494:
02595 case 493:
02596 case 479:
02597 case 478:
02598 case 477:
02599 case 475:
02600 case 474:
02601 case 473:
02602 case 472:
02603 case 447:
02604 case 446:
02605 case 251:
02606 case 246:
02607 case 213:
02608 case 212:
02609 case 198:
02610 case 197:
02611 case 196:
02612 case 195:
02613 case 114:
02614 case 92:
02615 case 91:
02616 case 90:
02617 case 89:
02618 case 88:
02619 case 79:
02620 case 78:
02621 case 77:
02622 case 76:
02623 case 62:
02624 case 61:
02625 case 60:
02626 case 58:
02627 case 57:
02628 case 56:
02629 case 55:
02630 case 30:
02631 case 29:
02632 return TYPE_I;
02633
02634 case 660:
02635 case 659:
02636 case 658:
02637 case 647:
02638 case 635:
02639 case 634:
02640 case 615:
02641 case 614:
02642 case 613:
02643 case 612:
02644 case 611:
02645 case 606:
02646 case 600:
02647 case 529:
02648 case 523:
02649 case 522:
02650 case 521:
02651 case 520:
02652 case 519:
02653 case 518:
02654 case 515:
02655 case 514:
02656 case 513:
02657 case 512:
02658 case 511:
02659 case 510:
02660 case 504:
02661 case 503:
02662 case 502:
02663 case 501:
02664 case 500:
02665 case 499:
02666 case 498:
02667 case 497:
02668 case 492:
02669 case 491:
02670 case 490:
02671 case 489:
02672 case 488:
02673 case 487:
02674 case 486:
02675 case 485:
02676 case 442:
02677 case 441:
02678 case 440:
02679 case 438:
02680 case 437:
02681 case 436:
02682 case 435:
02683 case 433:
02684 case 432:
02685 case 430:
02686 case 428:
02687 case 427:
02688 case 275:
02689 case 274:
02690 case 273:
02691 case 259:
02692 case 258:
02693 case 239:
02694 case 238:
02695 case 224:
02696 case 223:
02697 case 208:
02698 case 207:
02699 case 206:
02700 case 205:
02701 case 204:
02702 case 199:
02703 case 193:
02704 case 113:
02705 case 107:
02706 case 106:
02707 case 105:
02708 case 104:
02709 case 103:
02710 case 101:
02711 case 98:
02712 case 97:
02713 case 96:
02714 case 95:
02715 case 94:
02716 case 93:
02717 case 87:
02718 case 86:
02719 case 85:
02720 case 84:
02721 case 83:
02722 case 82:
02723 case 81:
02724 case 80:
02725 case 75:
02726 case 74:
02727 case 73:
02728 case 72:
02729 case 71:
02730 case 70:
02731 case 69:
02732 case 68:
02733 case 23:
02734 case 22:
02735 case 21:
02736 case 19:
02737 case 18:
02738 case 17:
02739 case 16:
02740 case 14:
02741 case 13:
02742 case 11:
02743 case 9:
02744 case 8:
02745 case 0:
02746 return TYPE_A;
02747
02748 case -1:
02749 if (GET_CODE (PATTERN (insn)) != ASM_INPUT
02750 && asm_noperands (PATTERN (insn)) < 0)
02751 fatal_insn_not_found (insn);
02752 case 650:
02753 case 641:
02754 case 622:
02755 case 621:
02756 case 601:
02757 case 598:
02758 case 597:
02759 case 526:
02760 case 476:
02761 case 425:
02762 case 423:
02763 case 272:
02764 case 271:
02765 case 270:
02766 case 262:
02767 case 256:
02768 case 255:
02769 case 249:
02770 case 247:
02771 case 240:
02772 case 221:
02773 case 219:
02774 case 218:
02775 case 217:
02776 case 194:
02777 case 191:
02778 case 190:
02779 case 187:
02780 case 186:
02781 case 152:
02782 case 151:
02783 case 130:
02784 case 129:
02785 case 116:
02786 case 115:
02787 case 110:
02788 case 102:
02789 case 59:
02790 case 25:
02791 case 24:
02792 case 6:
02793 case 4:
02794 return TYPE_UNKNOWN;
02795
02796 default:
02797 return TYPE_F;
02798
02799 }
02800 }
02801
02802 const struct function_unit_desc function_units[] = {
02803 {"dummy", 1, 6, 1, 1, 1, dummy_unit_ready_cost, 0, 1, 0, 0},
02804 {"stop_bit", 2, 1, 1, 1, 1, stop_bit_unit_ready_cost, 0, 1, 0, 0},
02805 };
02806
02807
02808 int max_dfa_issue_rate = 0;
02809
02810 static const unsigned char translate_0[] ATTRIBUTE_UNUSED = {
02811 0};
02812
02813
02814 static const unsigned char transitions_0[] ATTRIBUTE_UNUSED = {
02815 0};
02816
02817
02818 #if AUTOMATON_STATE_ALTS
02819
02820 static const unsigned char state_alts_0[] ATTRIBUTE_UNUSED = {
02821 1};
02822
02823
02824 #endif
02825
02826
02827 static const unsigned char min_issue_delay_0[] ATTRIBUTE_UNUSED = {
02828 0};
02829
02830
02831 static const unsigned char dead_lock_0[] = {
02832 1};
02833
02834
02835 #define DFA__ADVANCE_CYCLE 0
02836
02837 struct DFA_chip
02838 {
02839 unsigned char automaton_state_0;
02840 };
02841
02842
02843 int max_insn_queue_index = 1;
02844
02845 static int internal_min_issue_delay PARAMS ((int, struct DFA_chip *));
02846 static int
02847 internal_min_issue_delay (insn_code, chip)
02848 int insn_code;
02849 struct DFA_chip *chip ATTRIBUTE_UNUSED;
02850 {
02851 int temp ATTRIBUTE_UNUSED;
02852 int res = -1;
02853
02854 switch (insn_code)
02855 {
02856 case 0:
02857 break;
02858
02859
02860 default:
02861 res = -1;
02862 break;
02863 }
02864 return res;
02865 }
02866
02867 static int internal_state_transition PARAMS ((int, struct DFA_chip *));
02868 static int
02869 internal_state_transition (insn_code, chip)
02870 int insn_code;
02871 struct DFA_chip *chip ATTRIBUTE_UNUSED;
02872 {
02873 int temp ATTRIBUTE_UNUSED;
02874
02875 switch (insn_code)
02876 {
02877 case 0:
02878 {
02879 return -1;
02880 }
02881
02882 default:
02883 return -1;
02884 }
02885 }
02886
02887
02888 static int *dfa_insn_codes;
02889
02890 static int dfa_insn_codes_length;
02891
02892 #ifdef __GNUC__
02893 __inline__
02894 #endif
02895 static int dfa_insn_code PARAMS ((rtx));
02896 static int
02897 dfa_insn_code (insn)
02898 rtx insn;
02899 {
02900 int insn_code;
02901 int temp;
02902
02903 if (INSN_UID (insn) >= dfa_insn_codes_length)
02904 {
02905 temp = dfa_insn_codes_length;
02906 dfa_insn_codes_length = 2 * INSN_UID (insn);
02907 dfa_insn_codes = xrealloc (dfa_insn_codes, dfa_insn_codes_length * sizeof (int));
02908 for (; temp < dfa_insn_codes_length; temp++)
02909 dfa_insn_codes [temp] = -1;
02910 }
02911 if ((insn_code = dfa_insn_codes [INSN_UID (insn)]) < 0)
02912 {
02913 insn_code = internal_dfa_insn_code (insn);
02914 dfa_insn_codes [INSN_UID (insn)] = insn_code;
02915 }
02916 return insn_code;
02917 }
02918
02919 int
02920 state_transition (state, insn)
02921 state_t state;
02922 rtx insn;
02923 {
02924 int insn_code;
02925
02926 if (insn != 0)
02927 {
02928 insn_code = dfa_insn_code (insn);
02929 if (insn_code > DFA__ADVANCE_CYCLE)
02930 return -1;
02931 }
02932 else
02933 insn_code = DFA__ADVANCE_CYCLE;
02934
02935 return internal_state_transition (insn_code, state);
02936 }
02937
02938
02939 #if AUTOMATON_STATE_ALTS
02940
02941 static int internal_state_alts PARAMS ((int, struct DFA_chip *));
02942 static int
02943 internal_state_alts (insn_code, chip)
02944 int insn_code;
02945 struct DFA_chip *chip;
02946 {
02947 int res;
02948
02949 switch (insn_code)
02950 {
02951 case 0:
02952 {
02953 break;
02954 }
02955
02956
02957 default:
02958 res = 0;
02959 break;
02960 }
02961 return res;
02962 }
02963
02964 int
02965 state_alts (state, insn)
02966 state_t state;
02967 rtx insn;
02968 {
02969 int insn_code;
02970
02971 if (insn != 0)
02972 {
02973 insn_code = dfa_insn_code (insn);
02974 if (insn_code > DFA__ADVANCE_CYCLE)
02975 return 0;
02976 }
02977 else
02978 insn_code = DFA__ADVANCE_CYCLE;
02979
02980 return internal_state_alts (insn_code, state);
02981 }
02982
02983
02984 #endif
02985
02986 int
02987 min_issue_delay (state, insn)
02988 state_t state;
02989 rtx insn;
02990 {
02991 int insn_code;
02992
02993 if (insn != 0)
02994 {
02995 insn_code = dfa_insn_code (insn);
02996 if (insn_code > DFA__ADVANCE_CYCLE)
02997 return 0;
02998 }
02999 else
03000 insn_code = DFA__ADVANCE_CYCLE;
03001
03002 return internal_min_issue_delay (insn_code, state);
03003 }
03004
03005 static int internal_state_dead_lock_p PARAMS ((struct DFA_chip *));
03006 static int
03007 internal_state_dead_lock_p (chip)
03008 struct DFA_chip *chip;
03009 {
03010 if (dead_lock_0 [chip->automaton_state_0])
03011 return 1;
03012 return 0;
03013 }
03014
03015 int
03016 state_dead_lock_p (state)
03017 state_t state;
03018 {
03019 return internal_state_dead_lock_p (state);
03020 }
03021
03022 int
03023 state_size ()
03024 {
03025 return sizeof (struct DFA_chip);
03026 }
03027
03028 static void internal_reset PARAMS ((struct DFA_chip *));
03029 static void
03030 internal_reset (chip)
03031 struct DFA_chip *chip;
03032 {
03033 memset (chip, 0, sizeof (struct DFA_chip));
03034 }
03035
03036 void
03037 state_reset (state)
03038 state_t state;
03039 {
03040 internal_reset (state);
03041 }
03042
03043 int
03044 min_insn_conflict_delay (state, insn, insn2)
03045 state_t state;
03046 rtx insn;
03047 rtx insn2;
03048 {
03049 struct DFA_chip DFA_chip;
03050 int insn_code, insn2_code;
03051
03052 if (insn != 0)
03053 {
03054 insn_code = dfa_insn_code (insn);
03055 if (insn_code > DFA__ADVANCE_CYCLE)
03056 return 0;
03057 }
03058 else
03059 insn_code = DFA__ADVANCE_CYCLE;
03060
03061
03062 if (insn2 != 0)
03063 {
03064 insn2_code = dfa_insn_code (insn2);
03065 if (insn2_code > DFA__ADVANCE_CYCLE)
03066 return 0;
03067 }
03068 else
03069 insn2_code = DFA__ADVANCE_CYCLE;
03070
03071 memcpy (&DFA_chip, state, sizeof (DFA_chip));
03072 internal_reset (&DFA_chip);
03073 if (internal_state_transition (insn_code, &DFA_chip) > 0)
03074 abort ();
03075 return internal_min_issue_delay (insn2_code, &DFA_chip);
03076 }
03077
03078 static int internal_insn_latency PARAMS ((int, int, rtx, rtx));
03079 static int
03080 internal_insn_latency (insn_code, insn2_code, insn, insn2)
03081 int insn_code;
03082 int insn2_code;
03083 rtx insn ATTRIBUTE_UNUSED;
03084 rtx insn2 ATTRIBUTE_UNUSED;
03085 {
03086 switch (insn_code)
03087 {
03088 case 0:
03089 return (insn2_code != DFA__ADVANCE_CYCLE ? 0 : 0);
03090 default:
03091 return 0;
03092 }
03093 }
03094
03095 int
03096 insn_latency (insn, insn2)
03097 rtx insn;
03098 rtx insn2;
03099 {
03100 int insn_code, insn2_code;
03101
03102 if (insn != 0)
03103 {
03104 insn_code = dfa_insn_code (insn);
03105 if (insn_code > DFA__ADVANCE_CYCLE)
03106 return 0;
03107 }
03108 else
03109 insn_code = DFA__ADVANCE_CYCLE;
03110
03111
03112 if (insn2 != 0)
03113 {
03114 insn2_code = dfa_insn_code (insn2);
03115 if (insn2_code > DFA__ADVANCE_CYCLE)
03116 return 0;
03117 }
03118 else
03119 insn2_code = DFA__ADVANCE_CYCLE;
03120
03121 return internal_insn_latency (insn_code, insn2_code, insn, insn2);
03122 }
03123
03124 void
03125 print_reservation (f, insn)
03126 FILE *f;
03127 rtx insn;
03128 {
03129 int insn_code;
03130
03131 if (insn != 0)
03132 {
03133 insn_code = dfa_insn_code (insn);
03134 if (insn_code > DFA__ADVANCE_CYCLE)
03135 {
03136 fprintf (f, "nothing");
03137 return;
03138 }
03139 }
03140 else
03141 {
03142 fprintf (f, "nothing");
03143 return;
03144 }
03145 switch (insn_code)
03146 {
03147 default:
03148 fprintf (f, "nothing");
03149 }
03150 }
03151
03152 void
03153 dfa_start ()
03154 {
03155 int i;
03156
03157 dfa_insn_codes_length = get_max_uid ();
03158 dfa_insn_codes = (int *) xmalloc (dfa_insn_codes_length * sizeof (int));
03159 for (i = 0; i < dfa_insn_codes_length; i++)
03160 dfa_insn_codes [i] = -1;
03161 }
03162
03163 void
03164 dfa_finish ()
03165 {
03166 free (dfa_insn_codes);
03167 }
03168
