Open64: osprey/be/cg/tn.h Source File

00001 /*
00002  * Copyright 2002, 2003, 2004, 2005, 2006 PathScale, Inc.  All Rights Reserved.
00003  */
00004 
00005 /*
00006 
00007   Copyright (C) 2000, 2001 Silicon Graphics, Inc.  All Rights Reserved.
00008 
00009   This program is free software; you can redistribute it and/or modify it
00010   under the terms of version 2 of the GNU General Public License as
00011   published by the Free Software Foundation.
00012 
00013   This program is distributed in the hope that it would be useful, but
00014   WITHOUT ANY WARRANTY; without even the implied warranty of
00015   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
00016 
00017   Further, this software is distributed without any warranty that it is
00018   free of the rightful claim of any third person regarding infringement 
00019   or the like.  Any license provided herein, whether implied or 
00020   otherwise, applies only to this software file.  Patent licenses, if 
00021   any, provided herein do not apply to combinations of this program with 
00022   other software, or any other product whatsoever.  
00023 
00024   You should have received a copy of the GNU General Public License along
00025   with this program; if not, write the Free Software Foundation, Inc., 59
00026   Temple Place - Suite 330, Boston MA 02111-1307, USA.
00027 
00028   Contact information:  Silicon Graphics, Inc., 1600 Amphitheatre Pky,
00029   Mountain View, CA 94043, or:
00030 
00031   http://www.sgi.com
00032 
00033   For further information regarding this notice, see:
00034 
00035   http://oss.sgi.com/projects/GenInfo/NoticeExplan
00036 
00037 */
00038 
00039 
00040 //-*-c++-*-
00041 /* ====================================================================
00042  * ====================================================================
00043  *
00044  * Module: tn.h
00045  * $Revision: 1.21 $
00046  * $Date: 05/12/05 08:59:09-08:00 $
00047  * $Author: bos@eng-24.pathscale.com $
00048  * $Source: /scratch/mee/2.4-65/kpro64-pending/be/cg/SCCS/s.tn.h $
00049  *
00050  * Description:
00051  *
00052  * Define the TN (temporary name) data structure and relevant utility
00053  * operations.
00054  *
00055  * Exported types:
00056  *
00057  *   TN
00058  *
00059  *     The Temporary Name (TN) structure describes the operands and result
00060  *     of OPs. A TN can be used to describe either a register or a constant.
00061  *     The TN_flags(tn) field is applicable to all TNs and is used to determine
00062  *     the correct variant of the TN. The TN_size(tn) field is also applicable
00063  *     to all TNs and gives the size of the operand/result in bytes.
00064  *     All the other fields are applicable in specific contexts as described 
00065  *     below.
00066  *
00067  *     Register TNs:
00068  *
00069  *       The flag TN_is_register(tn) indicates if a TN is a register TN.
00070  *
00071  *       The following fields are valid only for register TNs:
00072  *
00073  *     TN_number(tn) 
00074  *       numeric id associated with a register TN.
00075  *
00076  *     TN_register_class(tn)
00077  *       The TN_register_class(tn) indicates the register class of 
00078  *       the register TN.
00079  *  
00080  *     TN_register(tn)
00081  *           The TN_register(tn) indicates the register assigned to the
00082  *       register TN.
00083  *
00084  *     TN_register_and_class(tn)
00085  *       TN_register_class and TN_register combined into a single
00086  *       scalar type for efficiency in comparing registers and classes.
00087  *
00088  *     TN_save_reg(tn)
00089  *       If the tn is a save-tn, this field gives the register 
00090  *       that the save-tn is saving/restoring. For all other tns,
00091  *       this is set to REGISTER_UNDEFINED.
00092  *
00093  *     TN_spill(tn)
00094  *       These fields point to spill information for register TNs.
00095  *
00096  *     TN_is_rematerializable(tn)
00097  *       If this attribute is true, the <tn> contains a constant
00098  *       value. It can be rematerialized using the TN_home field.
00099  *
00100  *     TN_home(tn)
00101  *       This field is valid only if TN_is_rematerializable is true.
00102  *       It points to the WHIRL node to use in rematerializing the
00103  *       constant value of the <tn>.
00104  *
00105  *     TN_is_dedicated(tn)
00106  *       This macro indicates that the register TN corresponds to a 
00107  *           physical register.
00108  *
00109  *     TN_is_float(tn)
00110  *       TN is for a floating point register.
00111  *
00112  *     TN_is_fpu_int(tn)
00113  *       TN is for an integer value in an FP register.
00114  *
00115  *     TN_is_fcc_register(tn)
00116  *       TN is an fcc (FP condition code) register.
00117  *
00118  *     TN_is_save_reg(tn)
00119  *       TN is a save-tn for a callee-saved register.
00120  *
00121  *
00122  *    Constant TNs:
00123  *
00124  *      The flag TN_is_constant(tn) indicates if a TN is a constant TN. A 
00125  *      constant TN can be one of the following sub-types:
00126  * 
00127  *      1. Integer constant:
00128  *    TN_has_value(tn) indicates if a constant TN is an integer
00129  *    constant. The value of the constant is given by TN_value(tn).
00130  *
00131  *      2. Symbol TN:
00132  *    TN_is_symbol(tn) indicates if a constant TN representing a 
00133  *    "symbol+offset" expression. The symbol is given by TN_var(tn)
00134  *    and the offset by TN_offset(tn). The TN_relocs(tn) field
00135  *    indicates additional relocations/operations to be applied 
00136  *    to the "symbol+offset".
00137  *
00138  *      3. Label TN:
00139  *    TN_is_label(tn) indicates if a constant TN represents a label.
00140  *    The label is indicated by TN_label(tn). The TN_offset(tn) is
00141  *    used to indicate a byte offset from the label.
00142  *
00143  *      4. Enum TN:
00144  *    TN_is_enum(tn) indicates if a constant TN represents an enum.
00145  *    The enum value is indicated by TN_enum(tn).
00146  *     
00147  * Utility functions:
00148  *
00149  *   void TN_Allocate_Register( TN *tn, REGISTER reg )
00150  *  Register TNs may be allocated to a register. This function
00151  *  sets <tn>'s _register to be <reg>.  This is the act of register
00152  *  assignment.
00153  *
00154  *   BOOL TN_Is_Allocatable( TN *tn )
00155  *  TRUE for just those TNs that can be assigned a register.  This
00156  *  excludes all kind of things that must NOT be register allocated,
00157  *  such as constants, zeros, dedicated TNs. 
00158  *
00159  *   OP *TN_Reaching_Value_At_Op(TN *tn, OP *op, DEF_KIND *kind, 
00160  *         BOOL reaching_def)
00161  *      The routine can be used to find (1) the reaching definition of
00162  *      operand <tn> of <op>, or (2) the following use of the result <tn>
00163  *  of <op>. The knob is controlled by the flag <reaching_def>.
00164  *      If <reaching_def> is TRUE, find the reaching definition of the <tn>, 
00165  *  if <reaching_def> is FALSE, find the reaching use of the <tn>. 
00166  *  If none is found, return NULL. <kind> determines the definition kind 
00167  *  property returned by the function, i.e if the value definition 
00168  *      of <tn> is VAL_KNOWN, VAL_UNKNOWN, VAL_COND_DEF, VAL_COND_USE, .. etc.
00169  *
00170  *  Note that not all reaching definitions are found, dominator
00171  *  information is necessary to handle more cases and it's not
00172  *  proven to be worth it.
00173  *
00174  *   BOOL TN_Value_At_Op( TN *tn, OP *use_op, INT64 *val )
00175  *  If it can be determined that <tn> has a known integer value, as 
00176  *  referenced by <use_op>, return the value via the  out parameter <val>. 
00177  *  <use_op> may be NULL, in which case if <tn> is not constant,
00178  *  no attempt is made to find a reaching definition. The return 
00179  *  value indicates if we were able to determine the value.
00180  *
00181  *   TN *Build_Dedicated_TN( REGISTER_CLASS rclass, REGISTER reg, INT size )
00182  *  Create a dedicated TN for register 'reg' in class 'rclass'.
00183  *  NOTE: Currently this returns the same TN when called multiple
00184  *  times with the same 'rclass', 'reg' pair. This will eventually
00185  *  change to build a new TN on each call.
00186  *  If the 'size' param is 0, then use default dedicated tn for regclass.
00187  *  Otherwise, for float rclass create separate TN for each float size.
00188  *  The 'size' is specified in bytes.
00189  *
00190  *   void Init_Dedicated_TNs( void )
00191  *  This routine should be called once per compilation before we
00192  *  process any PUs. It initializes the dedicated TNs.
00193  *  NOTE: This will eventually go away, see Build_Dedicated_TN.
00194  *
00195  *   BOOL TN_is_dedicated_class_and_reg( TN *tn, UINT16 class_n_reg )
00196  *  Returns a boolean to indicate if <tn> is a dedicated TN
00197  *  for the specified class and register.
00198  *
00199  * ====================================================================
00200  * ====================================================================
00201  */
00202 
00203 #ifndef tn_INCLUDED
00204 #define tn_INCLUDED
00205 
00206 /* Define the type before any includes so they can use it. */
00207 typedef struct tn TN;
00208 
00209 #include "tn_list.h"
00210 #include "register.h"
00211 #include "symtab.h"
00212 #include "targ_isa_enums.h"
00213 #include "op.h"
00214 class WN;
00215 
00216 
00217 /* Define the TN number type: */
00218 typedef INT32 TN_NUM; /* Individual objects */
00219 typedef mINT32 mTN_NUM; /* Table components */
00220 #define TN_NUM_MAX  INT32_MAX
00221 
00222 
00223 /* Define the TN structure: (NOTE: keep the size <= 16 bytes) */
00224 
00225 struct tn {
00226   /* offset 0 */
00227   union {
00228     INT64 value;    /* TN_has_value: Integer constant */
00229     INT64 offset;   /* Offset from symbol (constant) */
00230     struct {
00231       mTN_NUM number;   /* The ID of the register TN */
00232       CLASS_REG_PAIR save_creg; /* if save_tn, the corresponding save_reg */
00233       CLASS_REG_PAIR class_reg; /* Dedicated/allocated register ID
00234            and register class (see register.h) */
00235     } reg_tn;
00236   } u1;
00237   /* offset 8 */
00238   mUINT16 flags;    /* Attribute flags */
00239 #ifdef TARG_NVISA
00240   /* nvisa doesn't use relocs, needs space info, so overlap space and relocs */
00241   union {
00242     mUINT8  relocs;   /* Relocation flags (for symbol TNs) */
00243     mUINT8  space;    /* memory space associated with tn */
00244   } urs;
00245 #else
00246   mUINT8  relocs;   /* Relocation flags (for symbol TNs) */
00247 #endif
00248   mUINT8  size;   /* Size of the TN in bytes (must be <= 16) */
00249   /* offset 12 */
00250   union {
00251     LABEL_IDX label;    /* Label constant */
00252     ISA_ENUM_CLASS_VALUE ecv; /* Enum constant */
00253     ST    *var;   /* Symbolic constant (user variable) */
00254     union {     /* Spill location */
00255       ST  *spill;   /* ...for register TN */
00256       WN        *home;    /* Whirl home if rematerializable */
00257     } u3;
00258   } u2;
00259 #ifdef TARG_NVISA
00260   mBOOL from_shared_load;
00261 #endif
00262 };
00263 
00264 
00265 /* Define the TN_flags masks: */
00266 #define TN_CONSTANT 0x0001  /* Constant value, numeric or label */
00267 #define TN_HAS_VALUE  0x0002  /* Constant numeric value */
00268 #define TN_LABEL  0x0004  /* Constant label value */
00269 #define TN_TAG    0x0008  /* Constant tag value */
00270 #define TN_SYMBOL 0x0010  /* References symbol table element */
00271 #define TN_FLOAT  0x0020  /* => tn for a Floating-Point value */
00272 #define TN_DEDICATED  0x0040  /* Dedicated, register if reg!=NULL */
00273 #define TN_FPU_INT  0x0080  /* Int value in FPU (also TN_FLOAT) */
00274 #define TN_GLOBAL_REG 0x0100  /* TN is a GTN (global register) */
00275 #define TN_IF_CONV_COND 0x0200  /* TN is an if conversion conditinal */
00276 #define TN_REMATERIALIZABLE 0x0400  /* TN is rematerializable from whirl */
00277 #define TN_GRA_HOMEABLE     0x0800  /* TN can be homed by gra */
00278 #define TN_ENUM       0x1000  /* Constant enum value */
00279 #define TN_GRA_CANNOT_SPLIT 0x2000  /* its live range not to be split by GRA */
00280 #ifdef TARG_X8664
00281 #define TN_PREALLOCATED     0x4000  /* TN is pre-allocated in LRA */
00282 #define TN_THREAD_SEG_PTR   0x8000  /* TN is pointer to thread-local storage */
00283 #endif
00284 
00285 #ifdef TARG_IA64
00286 #define TN_TAKE_NAT         0X4000  /* TN (gr,fpr) may take NaT bit */
00287 #endif
00288 
00289 #ifdef TARG_NVISA
00290 #define TN_BOOLEAN  0x4000  /* TN is boolean value */
00291 /* overlap ONE_DEF with unused GRA_CANNOT_SPLIT */
00292 #define TN_ONE_DEF  0x2000  /* TN has single definition */
00293 #define TN_MEMORY_SPACE 0x8000  /* TN has memory space */
00294 
00295 /* flag memory space associated with tn */
00296 #define TN_GLOBAL_SPACE 0x1 
00297 #define TN_SHARED_SPACE 0x2
00298 #define TN_CONST_SPACE 0x4
00299 #define TN_LOCAL_SPACE 0x8
00300 #define TN_PARAM_SPACE 0x10
00301 #define TN_TEXTURE_SPACE 0x20
00302 #endif
00303 
00304 #if defined(TARG_SL)
00305 #define TN_V1BUF_ADDR       0x4000  /* the tn is v1buf address in iload/istore*/
00306 #endif
00307 
00308 /* Define the TN_relocs values */
00309 
00310 /* the following represent various relocations on symbolic values.  
00311  * The values are represented by a symbol table element.
00312  */
00313 
00314 typedef enum {
00315   TN_RELOC_NONE    = 0x00,
00316   TN_RELOC_GPREL16   = 0x01,  /* gp-relative reference to symbol */
00317   TN_RELOC_LOW16     = 0x02,  /* Bits 0..15 of symbolic val */
00318   TN_RELOC_HIGH16    = 0x03,  /* Bits 16..31 of symbol */
00319   TN_RELOC_HIGHER    = 0x04,  /* Bits 32..47 of symbol */
00320   TN_RELOC_HIGHEST   = 0x05,  /* Bits 48..63 of symbol */
00321   TN_RELOC_GOT_DISP  = 0x06,
00322   TN_RELOC_GOT_PAGE  = 0x07,
00323   TN_RELOC_GOT_OFST  = 0x08,
00324   TN_RELOC_CALL16    = 0x09,
00325   TN_RELOC_GOT_HI16  = 0x0a,
00326   TN_RELOC_GOT_LO16  = 0x0b,
00327   TN_RELOC_CALL_HI16 = 0x0c,
00328   TN_RELOC_CALL_LO16 = 0x0d,
00329   TN_RELOC_NEG       = 0x0e,
00330   TN_RELOC_GPSUB     = 0x0f,  /* gp - sym (pic2 prolog) */
00331   TN_RELOC_LO_GPSUB  = 0x10,
00332   TN_RELOC_HI_GPSUB  = 0x11,
00333   TN_RELOC_GPIDENT   = 0x12,  /* gp value (pic1 prolog) */
00334   TN_RELOC_LO_GPIDENT= 0x13,
00335   TN_RELOC_HI_GPIDENT= 0x14,
00336   TN_RELOC_IA_IMM14 = 0x20,      /* IA symbols starts at 0x20 */
00337   TN_RELOC_IA_IMM22 = 0x21,
00338   TN_RELOC_IA_PCREL = 0x22,
00339   TN_RELOC_IA_GPREL22 = 0x23,
00340   TN_RELOC_IA_LTOFF22 = 0x24,
00341   TN_RELOC_IA_LTOFF_FPTR= 0x25,
00342 #ifdef TARG_IA64
00343   TN_RELOC_IA_LTOFF22X  = 0x26,      /*  ltoffx */
00344                                      /* IA-32 relocations start at 0x40 */
00345   TN_RELOC_IA32_ALL   = 0x40,        /* All 32 bits of a symbol value. */
00346 
00347   TN_RELOC_IA_TPREL14   = 0x91,      /* For TLS both dynamic and static */
00348   TN_RELOC_IA_TPREL22,
00349   TN_RELOC_IA_TPREL64I,
00350   TN_RELOC_IA_TPREL64MSB,
00351   TN_RELOC_IA_TPREL64LSB,
00352   TN_RELOC_IA_LTOFF_TPREL22,
00353   TN_RELOC_IA_DTPMOD64MSB,
00354   TN_RELOC_IA_DTPMOD64LSB,
00355   TN_RELOC_IA_LTOFF_DTPMOD22,
00356   TN_RELOC_IA_DTPREL14,
00357   TN_RELOC_IA_DTPREL22,
00358   TN_RELOC_IA_DTPREL64I,
00359   TN_RELOC_IA_DTPREL32MSB,
00360   TN_RELOC_IA_DTPREL32LSB,
00361   TN_RELOC_IA_DTPREL64MSB,
00362   TN_RELOC_IA_DTPREL64LSB,
00363   TN_RELOC_IA_LTOFF_DTPREL22,
00364 
00365 #endif
00366 #ifdef TARG_X8664
00367   TN_RELOC_X8664_PC32 = 0x30,   /* X86-64 symbols start at 0x30 */
00368   TN_RELOC_X8664_32   = 0x31,   /* X86-64 symbols start at 0x30 */
00369   TN_RELOC_X8664_64   = 0x32,   
00370   TN_RELOC_X8664_GOTPCREL   = 0x33,   
00371   TN_RELOC_X8664_TPOFF32    = 0x34,  /* thread-local storage (TLS) */
00372   TN_RELOC_X8664_TPOFF32_seg_reg = 0x35, /* like above, with segment register */
00373   TN_RELOC_X8664_GOTTPOFF   = 0x36,  /* TLS with GOT entry */
00374 
00375              /* IA-32 relocations start at 0x40 */
00376   TN_RELOC_IA32_ALL   = 0x40,      /* All 32 bits of a symbol value. */
00377   TN_RELOC_IA32_GOT   = 0x41,
00378   TN_RELOC_IA32_GLOBAL_OFFSET_TABLE = 0x42
00379 #endif
00380 #if defined(TARG_SL)
00381 TN_RELOC_GPREL_V1 = 0x41,
00382 TN_RELOC_GPREL_V2 = 0x42,
00383 TN_RELOC_GPREL_V4 = 0x43,
00384 TN_RELOC_GPREL_S  = 0x44,
00385 TN_RELOC_GPREL_V1_15 = 0x45,
00386 TN_RELOC_GPREL_V2_15 = 0x46,
00387 TN_RELOC_GPREL_V4_15 = 0x47,
00388 /* 11bit offset from vbuf start address */ 
00389 TN_RELOC_GPREL_SL2_V11 = 0x48,
00390 /* 15bit offset from vbuf start address */
00391 TN_RELOC_GPREL_SL2_V15 = 0x49,
00392 /* 14bit offset from sbuf start address */ 
00393 TN_RELOC_GPREL_SL2_S  = 0x50,
00394 #endif 
00395 } TN_RELOCS;
00396 
00397 
00398 #define CAN_USE_TN(x) (x)
00399 
00400 /* Define the access functions: */
00401 #define     TN_flags(t)   (CAN_USE_TN(t)->flags)
00402 #define Set_TN_flags(t,x) (CAN_USE_TN(t)->flags = (x))
00403 /* define TN_is_{constant,register} ahead of time */
00404 #define       TN_is_constant(r) (TN_flags(r) &   TN_CONSTANT)
00405 #define   Set_TN_is_constant(r) (TN_flags(r) |=  TN_CONSTANT)
00406 #define       TN_is_register(r) (!TN_is_constant(r))
00407 
00408 inline TN * CAN_USE_REG_TN (const TN *t)
00409 {
00410   Is_True(TN_is_register(t), ("not a register tn"));
00411   return (TN*)t;
00412 }
00413 
00414 #ifdef TARG_NVISA
00415 #define     TN_relocs(t)  (CAN_USE_TN(t)->urs.relocs)
00416 #define Set_TN_relocs(t,x)  (CAN_USE_TN(t)->urs.relocs = (x))
00417 #else
00418 #define     TN_relocs(t)  (CAN_USE_TN(t)->relocs)
00419 #define Set_TN_relocs(t,x)  (CAN_USE_TN(t)->relocs = (x))
00420 #endif // TARG_NVISA
00421 #define     TN_size(t)    (CAN_USE_TN(t)->size+0)
00422 #define Set_TN_size(t,x)  (CAN_USE_TN(t)->size = (x))
00423 #define     TN_number(t)  (CAN_USE_REG_TN(t)->u1.reg_tn.number+0)
00424 #define Set_TN_number(t,x)  (CAN_USE_REG_TN(t)->u1.reg_tn.number = (x))
00425 #define     TN_class_reg(t) (CAN_USE_REG_TN(t)->u1.reg_tn.class_reg)
00426 #define Set_TN_class_reg(t,x) (CAN_USE_REG_TN(t)->u1.reg_tn.class_reg = (x))
00427 #define     TN_register(t)  \
00428     (CLASS_REG_PAIR_reg(CAN_USE_REG_TN(t)->u1.reg_tn.class_reg)+0)
00429 #define Set_TN_register(t,x)  \
00430     (Set_CLASS_REG_PAIR_reg(CAN_USE_REG_TN(t)->u1.reg_tn.class_reg,(x)))
00431 #define     TN_register_class(t) \
00432     (CLASS_REG_PAIR_rclass(CAN_USE_REG_TN(t)->u1.reg_tn.class_reg))
00433 #define Set_TN_register_class(t,x) \
00434     (Set_CLASS_REG_PAIR_rclass(CAN_USE_REG_TN(t)->u1.reg_tn.class_reg,(x)))
00435 #define     TN_register_and_class(t) \
00436     (CLASS_REG_PAIR_class_n_reg(CAN_USE_REG_TN(t)->u1.reg_tn.class_reg)+0)
00437 #define Set_TN_register_and_class(t,x) \
00438     (Set_CLASS_REG_PAIR_class_n_reg(CAN_USE_REG_TN(t)->u1.reg_tn.class_reg,(x)))
00439 #define     TN_save_creg(t) (CAN_USE_REG_TN(t)->u1.reg_tn.save_creg)
00440 #define     TN_save_reg(t)  (CLASS_REG_PAIR_reg(TN_save_creg(t))+0)
00441 #define     TN_save_rclass(t) (CLASS_REG_PAIR_rclass(TN_save_creg(t)))
00442 #define Set_TN_save_creg(t,x) (CAN_USE_REG_TN(t)->u1.reg_tn.save_creg = (x))
00443 #define     TN_is_save_reg(t) (!CLASS_REG_PAIR_EqualP(TN_save_creg(t),CLASS_REG_PAIR_undef))
00444 #define     TN_spill(t)   (CAN_USE_TN(t)->u2.u3.spill)
00445 #define Set_TN_spill(t,x) (CAN_USE_TN(t)->u2.u3.spill = (x))
00446 #define     TN_spill_is_valid(t)(TN_is_register(t) && !(TN_is_rematerializable(t) || TN_is_gra_homeable(t)))
00447 #define     TN_has_spill(t) (TN_spill_is_valid(t) && (TN_spill(t) != NULL))
00448 #define     TN_value(t)   (CAN_USE_TN(t)->u1.value)
00449 #define Set_TN_value(t,x) (CAN_USE_TN(t)->u1.value = (x))
00450 #define     TN_offset(t)  (CAN_USE_TN(t)->u1.offset)
00451 #define Set_TN_offset(t,x)  (CAN_USE_TN(t)->u1.offset = (x))
00452 #define     TN_label(t)   (CAN_USE_TN(t)->u2.label)
00453 #define Set_TN_label(t,x) (CAN_USE_TN(t)->u2.label = (x))
00454 #define     TN_enum(t)    (CAN_USE_TN(t)->u2.ecv)
00455 #define Set_TN_enum(t,x)  (CAN_USE_TN(t)->u2.ecv = (x))
00456 #define     TN_var(t)   (CAN_USE_TN(t)->u2.var)
00457 #define Set_TN_var(t,x)   (CAN_USE_TN(t)->u2.var = (x))
00458 #define     TN_home(t)    (CAN_USE_TN(t)->u2.u3.home)
00459 #define Set_TN_home(t,x)  (CAN_USE_TN(t)->u2.u3.home = (x))
00460 
00461 /* Define the TN_flags access functions: */
00462 #define       TN_has_value(r) (TN_flags(r) &   TN_HAS_VALUE)
00463 #define   Set_TN_has_value(r) (TN_flags(r) |=  TN_HAS_VALUE)
00464 #define       TN_is_label(r)  (TN_flags(r) &   TN_LABEL)
00465 #define   Set_TN_is_label(r)  (TN_flags(r) |=  TN_LABEL)
00466 #define       TN_is_tag(r)  (TN_flags(r) &   TN_TAG)
00467 #define   Set_TN_is_tag(r)  (TN_flags(r) |=  TN_TAG)
00468 #define       TN_is_symbol(r) (TN_flags(r) &   TN_SYMBOL)
00469 #define   Set_TN_is_symbol(r) (TN_flags(r) |=  TN_SYMBOL)
00470 #define       TN_is_enum(r) (TN_flags(r) &   TN_ENUM)
00471 #define   Set_TN_is_enum(r) (TN_flags(r) |=  TN_ENUM)
00472 
00473 #define       TN_is_float(x)    (TN_flags(x) &   TN_FLOAT)
00474 #define   Set_TN_is_float(x)    (TN_flags(x) |=  TN_FLOAT)
00475 #define       TN_is_fpu_int(x)  (TN_flags(x) &   TN_FPU_INT)
00476 #define   Set_TN_is_fpu_int(x)  (TN_flags(x) |=  TN_FPU_INT)
00477 #define Reset_TN_is_fpu_int(x)  (TN_flags(x) &=  ~TN_FPU_INT)
00478 #define       TN_is_global_reg(x) (TN_flags(x) &   TN_GLOBAL_REG)
00479 #define   Set_TN_is_global_reg(x) (TN_flags(x) |=  TN_GLOBAL_REG)
00480 #define Reset_TN_is_global_reg(x) (TN_flags(x) &= ~TN_GLOBAL_REG)
00481 #define      TN_is_dedicated(r) (TN_flags(r) &   TN_DEDICATED)
00482 #define  Set_TN_is_dedicated(r) (TN_flags(r) |=  TN_DEDICATED)
00483 #define Reset_TN_is_dedicated(r) (TN_flags(r)&= ~TN_DEDICATED)
00484 
00485 #define      TN_is_if_conv_cond(r)  (TN_flags(r) &   TN_IF_CONV_COND)
00486 #define  Set_TN_is_if_conv_cond(r)  (TN_flags(r) |=  TN_IF_CONV_COND)
00487 #define Reset_TN_is_if_conv_cond(r) (TN_flags(r) &= ~TN_IF_CONV_COND)
00488 
00489 #define      TN_is_rematerializable(r)  (TN_flags(r) &   TN_REMATERIALIZABLE)
00490 #define  Set_TN_is_rematerializable(r)  (TN_flags(r) |=  TN_REMATERIALIZABLE)
00491 #define Reset_TN_is_rematerializable(r) (TN_flags(r) &= ~TN_REMATERIALIZABLE)
00492 
00493 #define      TN_is_gra_homeable(r)  (TN_flags(r) &   TN_GRA_HOMEABLE)
00494 #define  Set_TN_is_gra_homeable(r)  (TN_flags(r) |=  TN_GRA_HOMEABLE)
00495 #define Reset_TN_is_gra_homeable(r) (TN_flags(r) &= ~TN_GRA_HOMEABLE)
00496 
00497 #define      TN_is_gra_cannot_split(r)  (TN_flags(r) &   TN_GRA_CANNOT_SPLIT)
00498 #define  Set_TN_is_gra_cannot_split(r)  (TN_flags(r) |=  TN_GRA_CANNOT_SPLIT)
00499 
00500 #if defined(TARG_SL)
00501 #define      TN_is_v1buf_addr(r)    (TN_flags(r) &   TN_V1BUF_ADDR)
00502 #define  Set_TN_is_v1buf_addr(r)    (TN_flags(r) |=  TN_V1BUF_ADDR)
00503 #endif 
00504 
00505 #ifdef TARG_IA64
00506 #define        TN_is_take_nat(r)   (TN_flags(r) &   TN_TAKE_NAT)
00507 #define    Set_TN_is_take_nat(r)   (TN_flags(r) |=  TN_TAKE_NAT)
00508 #define  Reset_TN_is_take_nat(r)   (TN_flags(r) &= ~TN_TAKE_NAT) 
00509 #endif
00510 
00511 #ifdef TARG_NVISA
00512 #define      TN_is_boolean(r)   (TN_flags(r) &   TN_BOOLEAN)
00513 #define  Set_TN_is_boolean(r)   (TN_flags(r) |=  TN_BOOLEAN)
00514 #define Reset_TN_is_boolean(r)  (TN_flags(r) &= ~TN_BOOLEAN)
00515 
00516 #define      TN_has_one_def(r)  TN_is_gra_cannot_split(r)
00517 #define  Set_TN_has_one_def(r)  Set_TN_is_gra_cannot_split(r)
00518 #define Reset_TN_has_one_def(r) Reset_TN_is_gra_cannot_split(r)
00519 #define      TN_has_memory_space(r)  (TN_flags(r) &   TN_MEMORY_SPACE)
00520 #define  Set_TN_has_memory_space(r)  (TN_flags(r) |=  TN_MEMORY_SPACE)
00521 #define Reset_TN_has_memory_space(r) (TN_flags(r) &= ~TN_MEMORY_SPACE)
00522 #define     TN_memory_space(t)    (CAN_USE_TN(t)->urs.space)
00523 #define Set_TN_memory_space(t,x)  (Set_TN_has_memory_space(t), CAN_USE_TN(t)->urs.space = (x))
00524 #define     TN_in_global_mem(t)   (TN_memory_space(t) & TN_GLOBAL_SPACE)
00525 #define Set_TN_in_global_mem(t)   (Set_TN_memory_space(t,TN_GLOBAL_SPACE))
00526 #define     TN_in_shared_mem(t)   (TN_memory_space(t) & TN_SHARED_SPACE)
00527 #define Set_TN_in_shared_mem(t)   (Set_TN_memory_space(t,TN_SHARED_SPACE))
00528 #define     TN_in_const_mem(t)    (TN_memory_space(t) & TN_CONST_SPACE)
00529 #define Set_TN_in_const_mem(t)    (Set_TN_memory_space(t,TN_CONST_SPACE))
00530 #define     TN_in_local_mem(t)    (TN_memory_space(t) & TN_LOCAL_SPACE)
00531 #define Set_TN_in_local_mem(t)    (Set_TN_memory_space(t,TN_LOCAL_SPACE))
00532 #define     TN_in_param_mem(t)    (TN_memory_space(t) & TN_PARAM_SPACE)
00533 #define Set_TN_in_param_mem(t)    (Set_TN_memory_space(t,TN_PARAM_SPACE))
00534 #define     TN_in_texture_mem(t)  (TN_memory_space(t) & TN_TEXTURE_SPACE)
00535 #define Set_TN_in_texture_mem(t)  (Set_TN_memory_space(t,TN_TEXTURE_SPACE))
00536 
00537 #define TN_from_shared_load(r) (CAN_USE_TN(r)->from_shared_load)
00538 #define Set_TN_from_shared_load(r) (CAN_USE_TN(r)->from_shared_load = TRUE)
00539 #define Reset_TN_from_shared_load(r) (CAN_USE_TN(r)->from_shared_load = FALSE)
00540 #endif
00541 
00542 #ifdef TARG_X8664
00543 #define       TN_is_preallocated(r)  (TN_flags(r) &   TN_PREALLOCATED)
00544 #define   Set_TN_is_preallocated(r)  (TN_flags(r) |=  TN_PREALLOCATED)
00545 #define Reset_TN_is_preallocated(r)  (TN_flags(r) &= ~TN_PREALLOCATED)
00546 
00547 #define       TN_is_thread_seg_ptr(r) (TN_flags(r) &   TN_THREAD_SEG_PTR)
00548 #define   Set_TN_is_thread_seg_ptr(r) (TN_flags(r) |=  TN_THREAD_SEG_PTR)
00549 #define Reset_TN_is_thread_seg_ptr(r) (TN_flags(r) &= ~TN_THREAD_SEG_PTR)
00550 #endif
00551 
00552 /* Macros to check if a TN is a particular dedicated register. */
00553 #define TN_is_sp_reg(r)    (TN_register_and_class(r) == CLASS_AND_REG_sp)
00554 #define TN_is_gp_reg(r)    (TN_register_and_class(r) == CLASS_AND_REG_gp)
00555 #define TN_is_ep_reg(r)    (TN_register_and_class(r) == CLASS_AND_REG_ep)
00556 #define TN_is_fp_reg(r)    (TN_register_and_class(r) == CLASS_AND_REG_fp)
00557 #define TN_is_ra_reg(r)    (TN_register_and_class(r) == CLASS_AND_REG_ra)
00558 #define TN_is_zero_reg(r)  (TN_register_and_class(r) == CLASS_AND_REG_zero)
00559 #define TN_is_static_link_reg(r) (TN_register_and_class(r) == CLASS_AND_REG_static_link)
00560 #define TN_is_pfs_reg(r)   (TN_register_and_class(r) == CLASS_AND_REG_pfs)
00561 #define TN_is_lc_reg(r)   (TN_register_and_class(r) == CLASS_AND_REG_lc)
00562 #define TN_is_ec_reg(r)   (TN_register_and_class(r) == CLASS_AND_REG_ec)
00563 #define TN_is_true_pred(r) (TN_register_and_class(r) == CLASS_AND_REG_true)
00564 #define TN_is_fzero_reg(r) (TN_register_and_class(r) == CLASS_AND_REG_fzero)
00565 #define TN_is_fone_reg(r)  (TN_register_and_class(r) == CLASS_AND_REG_fone)
00566 
00567 // Check if the TN is either a constant zero or the zero register TN.
00568 // If you know it is a register TN, use TN_is_zero_reg directly.
00569 inline BOOL TN_is_zero (const TN *r) 
00570 {
00571   return ((TN_has_value(r) && TN_value(r) == 0) || (TN_is_register(r) && TN_is_zero_reg(r)));
00572 }
00573 
00574 // Returns TRUE if the TN represents a hardwired registers.
00575 inline BOOL TN_is_const_reg(const TN *r)
00576 {
00577   return (TN_is_register(r) && 
00578     TN_is_dedicated(r) &&
00579     (TN_is_zero_reg(r) || 
00580      TN_is_true_pred(r) ||
00581      TN_is_fzero_reg(r) ||
00582      TN_is_fone_reg(r)));
00583 }
00584 
00585 /* Define the TN_relocs access functions: */
00586 #define TN_is_reloc_gprel16(r)    (TN_relocs(r) == TN_RELOC_GPREL16)
00587 #define Set_TN_is_reloc_gprel16(r)  Set_TN_relocs(r,TN_RELOC_GPREL16)
00588 #define TN_is_reloc_low16(r)    (TN_relocs(r) == TN_RELOC_LOW16)
00589 #define Set_TN_is_reloc_low16(r)  Set_TN_relocs(r,TN_RELOC_LOW16)
00590 #define TN_is_reloc_high16(r)   (TN_relocs(r) == TN_RELOC_HIGH16)
00591 #define Set_TN_is_reloc_high16(r) Set_TN_relocs(r,TN_RELOC_HIGH16)
00592 #define TN_is_reloc_higher(r)   (TN_relocs(r) == TN_RELOC_HIGHER)
00593 #define Set_TN_is_reloc_higher(r) Set_TN_relocs(r,TN_RELOC_HIGHER)
00594 #define TN_is_reloc_highest(r)    (TN_relocs(r) == TN_RELOC_HIGHEST)
00595 #define Set_TN_is_reloc_highest(r)  Set_TN_relocs(r,TN_RELOC_HIGHEST)
00596 #define TN_is_reloc_got_disp(r)   (TN_relocs(r) == TN_RELOC_GOT_DISP)
00597 #define Set_TN_is_reloc_got_disp(r) Set_TN_relocs(r,TN_RELOC_GOT_DISP)
00598 #define TN_is_reloc_got_page(r)   (TN_relocs(r) == TN_RELOC_GOT_PAGE)
00599 #define Set_TN_is_reloc_got_page(r) Set_TN_relocs(r,TN_RELOC_GOT_PAGE)
00600 #define TN_is_reloc_got_ofst(r)   (TN_relocs(r) == TN_RELOC_GOT_OFST)
00601 #define Set_TN_is_reloc_got_ofst(r) Set_TN_relocs(r,TN_RELOC_GOT_OFST)
00602 #define TN_is_reloc_call16(r)   (TN_relocs(r) == TN_RELOC_CALL16)
00603 #define Set_TN_is_reloc_call16(r) Set_TN_relocs(r,TN_RELOC_CALL16)
00604 #define TN_is_reloc_got_hi16(r)   (TN_relocs(r) == TN_RELOC_GOT_HI16)
00605 #define Set_TN_is_reloc_got_hi16(r) Set_TN_relocs(r,TN_RELOC_GOT_HI16)
00606 #define TN_is_reloc_got_lo16(r)   (TN_relocs(r) == TN_RELOC_GOT_LO16)
00607 #define Set_TN_is_reloc_got_lo16(r) Set_TN_relocs(r,TN_RELOC_GOT_LO16)
00608 #define TN_is_reloc_call_hi16(r)  (TN_relocs(r) == TN_RELOC_CALL_HI16)
00609 #define Set_TN_is_reloc_call_hi16(r)  Set_TN_relocs(r,TN_RELOC_CALL_HI16)
00610 #define TN_is_reloc_call_lo16(r)  (TN_relocs(r) == TN_RELOC_CALL_LO16)
00611 #define Set_TN_is_reloc_call_lo16(r)  Set_TN_relocs(r,TN_RELOC_CALL_LO16)
00612 #define TN_is_reloc_neg(r)    (TN_relocs(r) == TN_RELOC_NEG)
00613 #define Set_TN_is_reloc_neg(r)    Set_TN_relocs(r,TN_RELOC_NEG)
00614 #define TN_is_reloc_gpsub(r)    (TN_relocs(r) == TN_RELOC_GPSUB)
00615 #define Set_TN_is_reloc_gpsub(r)  Set_TN_relocs(r,TN_RELOC_GPSUB)
00616 #define TN_is_reloc_lo_gpsub(r)   (TN_relocs(r) == TN_RELOC_LO_GPSUB)
00617 #define Set_TN_is_reloc_lo_gpsub(r) Set_TN_relocs(r,TN_RELOC_LO_GPSUB)
00618 #define TN_is_reloc_hi_gpsub(r)   (TN_relocs(r) == TN_RELOC_HI_GPSUB)
00619 #define Set_TN_is_reloc_hi_gpsub(r) Set_TN_relocs(r,TN_RELOC_HI_GPSUB)
00620 #define TN_is_reloc_gpident(r)    (TN_relocs(r) == TN_RELOC_GPIDENT)
00621 #define Set_TN_is_reloc_gpident(r)  Set_TN_relocs(r,TN_RELOC_GPIDENT)
00622 #define TN_is_reloc_lo_gpident(r) (TN_relocs(r) == TN_RELOC_LO_GPIDENT)
00623 #define Set_TN_is_reloc_lo_gpident(r) Set_TN_relocs(r,TN_RELOC_LO_GPIDENT)
00624 #define TN_is_reloc_hi_gpident(r) (TN_relocs(r) == TN_RELOC_HI_GPIDENT)
00625 #define Set_TN_is_reloc_hi_gpident(r) Set_TN_relocs(r,TN_RELOC_HI_GPIDENT)
00626 #define TN_is_reloc_ia_imm14(r)   (TN_relocs(r) == TN_RELOC_IA_IMM14)
00627 #define Set_TN_is_reloc_ia_imm14(r) Set_TN_relocs(r,TN_RELOC_IA_IMM14)
00628 #define TN_is_reloc_ia_imm22(r)   (TN_relocs(r) == TN_RELOC_IA_IMM22)
00629 #define Set_TN_is_reloc_ia_imm22(r) Set_TN_relocs(r,TN_RELOC_IA_IMM22)
00630 #define TN_is_reloc_ia_pcrel(r)   (TN_relocs(r) == TN_RELOC_IA_PCREL)
00631 #define Set_TN_is_reloc_ia_pcrel(r) Set_TN_relocs(r,TN_RELOC_IA_PCREL)
00632 #define TN_is_reloc_ia_gprel22(r) (TN_relocs(r) == TN_RELOC_IA_GPREL22)
00633 #define Set_TN_is_reloc_ia_gprel22(r) Set_TN_relocs(r,TN_RELOC_IA_GPREL22)
00634 #define TN_is_reloc_ia_ltoff22(r) (TN_relocs(r) == TN_RELOC_IA_LTOFF22)
00635 #define Set_TN_is_reloc_ia_ltoff22(r) Set_TN_relocs(r,TN_RELOC_IA_LTOFF22)
00636 #define TN_is_reloc_ia_ltoff_fptr(r)  (TN_relocs(r) == TN_RELOC_IA_LTOFF_FPTR)
00637 #define Set_TN_is_reloc_ia_ltoff_fptr(r) Set_TN_relocs(r,TN_RELOC_IA_LTOFF_FPTR)
00638 #ifdef TARG_X8664
00639 #define TN_is_reloc_x8664_pc32(r) (TN_relocs(r) == TN_RELOC_X8664_PC32)
00640 #define Set_TN_is_reloc_x8664_pc32(r) Set_TN_relocs(r,TN_RELOC_X8664_PC32)
00641 #define TN_is_reloc_x8664_32(r)         (TN_relocs(r) == TN_RELOC_X8664_32)
00642 #define Set_TN_is_reloc_x8664_32(r) Set_TN_relocs(r,TN_RELOC_X8664_32)
00643 #define TN_is_reloc_x8664_gotpcrel(r)   (TN_relocs(r)==TN_RELOC_X8664_GOTPCREL)
00644 #define Set_TN_is_reloc_x8664_gotpcrel(r) Set_TN_relocs(r,TN_RELOC_X8664_GOTPCREL)
00645 #define TN_is_reloc_x8664_64(r)         (TN_relocs(r) == TN_RELOC_X8664_64)
00646 #define Set_TN_is_reloc_x8664_64(r) Set_TN_relocs(r,TN_RELOC_X8664_64)
00647 #define TN_is_reloc_x8664_tpoff32(r)  (TN_relocs(r) == TN_RELOC_X8664_TPOFF32)
00648 #define Set_TN_is_reloc_x8664_tpoff32(r) Set_TN_relocs(r,TN_RELOC_X8664_TPOFF32)
00649 #define TN_is_reloc_x8664_tpoff32_seg_reg(r)     (TN_relocs(r) == TN_RELOC_X8664_TPOFF32_seg_reg)
00650 #define Set_TN_is_reloc_x8664_tpoff32_seg_reg(r) Set_TN_relocs(r,TN_RELOC_X8664_TPOFF32_seg_reg)
00651 #endif /* TARG_X8664 */
00652 
00653 
00654 /* ====================================================================
00655  *
00656  * External variables.
00657  *
00658  * ====================================================================
00659  */
00660 
00661 /* The register TNs are in a table named TNvec, indexed by their TN 
00662  * numbers in the range 1..Last_TN.  The first part of the table, the 
00663  * range 1..Last_Dedicated_TN, consists of TNs for various dedicated 
00664  * purposes (e.g. stack pointer, zero, physical registers).  It is 
00665  * followed by TNs for user variables and compiler temporaries, in the 
00666  * range First_Regular_TN..Last_TN.
00667  */
00668 extern TN_NUM Last_Dedicated_TN;/* The last dedicated TN number */
00669 extern TN_NUM First_Regular_TN; /* after all the preallocated TNs */
00670 extern TN_NUM Last_TN;    /* The last allocated TN number */
00671 extern TN_NUM First_REGION_TN;  /* The first non-dedicated TN in the current REGION */
00672 extern TN **TN_Vec;   /* Mapping from number to TN */
00673 #define TNvec(i) TN_Vec[i]
00674 
00675 
00676 // The following are special-purpose TNs required in the compiler for
00677 // specific purposes.  
00678 // NOTE: Don't use these TNs directly in comparisons with other TNs.
00679 //       Instead use the TN_is_xx_reg macros. This allows the 
00680 //       comparisons to work with renaming of dedicated registers.
00681 //
00682 extern  TN *Zero_TN;    // Zero register TN
00683 extern  TN *FP_TN;    // Frame Pointer
00684 extern  TN *SP_TN;    // Stack Pointer
00685 extern  TN *RA_TN;    // Return address register
00686 extern  TN *Ep_TN;    // Entry point TN
00687 extern  TN *GP_TN;    // Global pointer register
00688 
00689 #ifdef TARG_IA64
00690 extern  TN *TP_TN;              // Thread Pointer register
00691 #endif
00692 
00693 extern  TN *Pfs_TN;   // Previous Function State TN
00694 extern  TN *LC_TN;    // Loop Counter TN
00695 extern  TN *EC_TN;    // Epilog Counter TN
00696 extern  TN *True_TN;    // TN for true condition (predicate)
00697 extern  TN *FZero_TN;   // Floating zero (0.0) register TN
00698 extern  TN *FOne_TN;    // Floating one (1.0) register TN
00699 #if defined(TARG_SL)
00700 extern  TN *TMP1_TN;              // tmp TN, similar to AT-reg of mips1
00701 extern  TN *TMP2_TN;              // tmp TN, similar to AT-reg of mips1
00702 extern  TN *JA_TN;
00703 extern  TN *LC0_TN;
00704 extern  TN *LC1_TN;
00705 extern  TN *LC2_TN;
00706 extern  TN *LC3_TN;
00707 extern  TN *HI_TN;
00708 extern  TN *Acc0_TN;
00709 extern  TN *Acc1_TN;
00710 extern  TN *Acc2_TN;
00711 extern  TN *Acc3_TN;
00712 extern TN *Addr0_TN;
00713 extern TN *Addr1_TN;
00714 extern TN *Addr2_TN;
00715 extern TN *Addr3_TN;
00716 extern TN *Addr4_TN;
00717 extern TN *Addr5_TN;
00718 extern TN *Addr6_TN;
00719 extern TN *Addr7_TN;
00720 extern TN *Addrsize0_TN;
00721 extern TN *Addrsize1_TN;
00722 extern TN *Addrsize2_TN;
00723 extern TN *Addrsize3_TN;
00724 extern TN *Addrsize4_TN;
00725 extern TN *Addrsize5_TN;
00726 extern TN *Addrsize6_TN;
00727 extern TN *Addrsize7_TN;
00728 extern  PREG_NUM AccPregN ;
00729 extern  PREG_NUM AddPregN;
00730 extern int ACCreg[4];
00731 extern int Addreg[8];
00732 
00733 extern  TN* C2_ACC_TN;          // TN for c2 sum4 accumulator
00734 extern  TN* C2_ACC_CTRL_TN;     // TN for c2 sum4 accumulator
00735 extern  TN* C2_MVSEL_TN;        // TN for c2 mvsel internal 
00736 extern  TN* C2_VLCS_TN;         // TN for c2 vlcs internal 
00737 extern  TN* C2_MOVPAT_TN;       // TN for c2 mov pat register
00738 #endif
00739 
00740 /* ====================================================================
00741  * Prototypes of external routines.
00742  * ====================================================================
00743  */
00744 
00745 /* Intialize the dedicated TNs at the start of the compilation. */
00746 extern  void Init_Dedicated_TNs (void);
00747 
00748 /* Initialize the TN data structure at the start of each PU. */ 
00749 extern  void Init_TNs_For_PU (void);
00750 /* Initialize the TN data structure at the start of each REGION. */ 
00751 extern  void Init_TNs_For_REGION (void);
00752 
00753 
00754 /* TN generation: */
00755 
00756 /* The following set of routines can be used only for register TNs */
00757 
00758 extern TN* Gen_Register_TN (ISA_REGISTER_CLASS rclass, INT size);
00759 
00760 #ifdef KEY
00761 extern TN* Gen_Typed_Register_TN (TYPE_ID mtype, INT size);
00762 #endif
00763 
00764 extern  TN *Build_Dedicated_TN ( ISA_REGISTER_CLASS rclass, REGISTER reg, INT size);
00765 
00766 /*
00767    TNs_Are_Equivalent
00768    Returns TRUE if TNs have the same base TN number or that they are
00769    assigned the same register.
00770 */
00771 inline BOOL TNs_Are_Equivalent(TN *tn1, TN *tn2) 
00772 {
00773   if ( (tn1 == tn2 ||
00774   (TN_register(tn1) != REGISTER_UNDEFINED &&
00775    TN_register(tn2) != REGISTER_UNDEFINED &&
00776    TN_register_and_class(tn1) == TN_register_and_class(tn2))))
00777     return TRUE;
00778 
00779   return FALSE;
00780 }
00781 
00782 #if defined(TARG_SL)
00783 inline BOOL tn_registers_identical (TN *tn1, TN *tn2)
00784 {
00785   return ((tn1 == tn2) ||
00786           ((TN_is_register(tn1) && TN_is_register(tn2) &&
00787       (TN_is_dedicated(tn1) || 
00788        (TN_register(tn1) != REGISTER_UNDEFINED)) &&           
00789       (TN_is_dedicated(tn2) || 
00790        (TN_register(tn2) != REGISTER_UNDEFINED)) &&           
00791       (TN_register_and_class(tn1) == TN_register_and_class(tn2)))));
00792 }
00793 #endif
00794 
00795 /* Build a TN that matches the register class */
00796 inline TN* Build_RCLASS_TN (ISA_REGISTER_CLASS rclass)
00797 {
00798   return Gen_Register_TN (rclass, 
00799     (REGISTER_bit_size(rclass, 
00800      REGISTER_CLASS_last_register(rclass))/8) );
00801 }
00802 
00803 inline TN *Build_TN_Like(TN *tn)
00804 {
00805   TN *new_tn;
00806   if (!TN_is_register(tn)) {
00807   /* assume int rclass? */
00808   DevWarn("Build_TN_Like called on non-register tn");
00809   new_tn = Gen_Register_TN (ISA_REGISTER_CLASS_integer, TN_size(tn));
00810   }
00811   else {
00812 #if defined(TARG_SL)
00813     ISA_REGISTER_CLASS rc = TN_register_class(tn);
00814     if (tn == RA_TN || tn == JA_TN || tn == LC0_TN || tn == LC1_TN || tn == LC2_TN || tn == LC3_TN ||
00815   tn == HI_TN ) {
00816       rc = ISA_REGISTER_CLASS_integer;
00817     }
00818     new_tn = Gen_Register_TN(rc, TN_size(tn));
00819 #else
00820     new_tn = Gen_Register_TN(TN_register_class(tn), TN_size(tn) );
00821 #endif
00822   }
00823   /* Propogate fpu-int flag... */
00824   TN_flags(new_tn) |= (TN_flags(tn) & TN_FPU_INT);
00825   return new_tn;
00826 }
00827 
00828 inline TN *Build_TN_Of_Mtype(TYPE_ID mtype)
00829 {
00830   ISA_REGISTER_CLASS rc = Register_Class_For_Mtype(mtype);
00831   return Gen_Register_TN (rc, MTYPE_RegisterSize(mtype) );
00832 }
00833 
00834 extern  TN *Dup_TN ( TN *tn );  /* Duplicate an existing TN */
00835 extern  TN *Dup_TN_Even_If_Dedicated ( TN *tn ) ; /* Ditto, but for
00836                                                    * dedicated */
00837 
00838 /* Register assignment: */
00839 
00840 inline BOOL TN_Is_Allocatable( const TN *tn )
00841 {
00842   return ! ( TN_is_constant(tn) || TN_is_dedicated(tn));
00843 }
00844 
00845 inline void TN_Allocate_Register( TN *tn, REGISTER reg )
00846 {
00847   Is_True (TN_Is_Allocatable(tn), ("Invalid TN for register allocation"));
00848   Set_TN_register(tn, reg);
00849 }
00850 
00851 inline BOOL TN_is_dedicated_class_and_reg( TN *tn, UINT16 class_n_reg )
00852 {
00853   return    TN_is_dedicated(tn)
00854    && TN_register_and_class(tn) == class_n_reg;
00855 }
00856 
00857 #ifdef TARG_SL
00858 inline BOOL TN_is_AccRegister(TN *tn) {
00859   if (tn == Acc0_TN || tn == Acc1_TN || tn == Acc2_TN || tn == Acc3_TN) {
00860     return TRUE;
00861   } 
00862   return FALSE;
00863 }
00864 
00865 inline BOOL TN_is_AddrRegister(TN *tn) {
00866   if (tn == Addr0_TN || tn == Addr1_TN || tn == Addr2_TN ||
00867       tn == Addr3_TN || tn == Addr4_TN || tn == Addr5_TN ||
00868       tn == Addr6_TN || tn == Addr7_TN) {
00869     return TRUE;
00870   }
00871   return FALSE;
00872 }
00873 
00874 inline BOOL TN_is_LoopRegister(TN *tn) {
00875   if (tn == LC0_TN || tn == LC1_TN || tn == LC2_TN || tn == LC3_TN) {
00876     return TRUE;
00877   }
00878   return FALSE;
00879 }
00880 
00881 inline BOOL TN_is_AddrSizeRegister(TN *tn) {
00882   if (tn == Addrsize0_TN || tn == Addrsize1_TN || tn == Addrsize2_TN ||
00883       tn == Addrsize3_TN || tn == Addrsize4_TN || tn == Addrsize5_TN ||
00884       tn == Addrsize6_TN || tn == Addrsize7_TN) {
00885     return TRUE;
00886   }
00887   return FALSE;
00888 }
00889 
00890 #endif
00891 
00892 /* Only the following routines should be used to build constant TNs. */
00893 
00894 extern  TN *Gen_Literal_TN ( INT64 val, INT size );
00895 
00896 // Produce a literal TN with the given literal value and decide the size automatically.
00897 inline TN * Gen_Literal_TN_Ex ( INT64 val )
00898 {
00899   if (val >= INT32_MIN && val <= INT32_MAX)
00900     return Gen_Literal_TN(val, 4);
00901   else
00902     return Gen_Literal_TN(val, 8);
00903 }
00904 
00905 // normally literals are hashed and reused; this creates unique TN
00906 extern TN *Gen_Unique_Literal_TN (INT64 ivalue, INT size);
00907 
00908 inline TN *Gen_Literal_TN_Of_Mtype (INT64 val, TYPE_ID mtype) 
00909 {
00910   return Gen_Literal_TN (val, MTYPE_is_size_double(mtype) ? 8 : 4);
00911 }
00912 extern TN *Gen_Enum_TN (ISA_ENUM_CLASS_VALUE ecv);
00913 
00914 extern  TN *Gen_Symbol_TN ( ST *s, INT64 offset, INT32 relocs);
00915 extern  TN *Gen_Label_TN ( LABEL_IDX lab, INT64 offset );
00916 extern  TN *Gen_Tag_TN ( LABEL_IDX tag);
00917 extern  TN *Gen_Adjusted_TN( TN *tn, INT64 adjust );
00918 
00919 
00920 /* Trace support: */
00921 #ifdef TARG_IA64
00922 extern char * sPrint_TN ( TN *tn, BOOL verbose, char *buf );
00923 #endif
00924 /* Print TN to a file with given 'fmt'; assume fmt has a %s in it. */
00925 extern  void  fPrint_TN ( FILE *f, const char *fmt, TN *tn);
00926 #pragma mips_frequency_hint NEVER fPrint_TN
00927 /* Print TN to the trace file TFile */
00928 extern  void   Print_TN ( TN *tn, BOOL verbose );
00929 #pragma mips_frequency_hint NEVER Print_TN
00930 /* Print a tn list to a file */
00931 extern  void   Print_TN_List ( FILE *, TN_LIST * );
00932 #pragma mips_frequency_hint NEVER Print_TN_List
00933 /* Print all TNs */
00934 extern  void   Print_TNs ( void );
00935 #pragma mips_frequency_hint NEVER Print_TNs
00936 
00937 /* Return the first tn in list which matches the register_class and register of tn0 */
00938 /* If none is found, return NULL. */
00939 extern TN *Find_TN_with_Matching_Register( TN *tn0, TN_LIST *list );
00940 
00941 typedef enum {VAL_KNOWN, VAL_UNKNOWN, VAL_COND_DEF, VAL_COND_USE} DEF_KIND;
00942 
00943 /* TN value support: */
00944 extern struct op *TN_Reaching_Value_At_Op( TN *tn, struct op *op, DEF_KIND *kind, BOOL reaching_def );
00945 extern BOOL TN_Value_At_Op( TN *tn, struct op *use_op, INT64 *val );
00946 
00947 /* Determine whether a given expression involving a constant TN (which
00948  * may be a symbol TN) is a valid literal operand for the given opcode:
00949  */
00950 extern BOOL Potential_Immediate_TN_Expr (
00951   TOP opcode,   /* The operation of interest */
00952   struct tn *tn1, /* The primary TN (constant) */
00953   INT32 disp    /* Displacement from value */
00954 );
00955 
00956 BOOL Is_OP_Cond(OP *op);
00957 
00958 #include "tn_targ.h"
00959 
00960 #endif /* tn_INCLUDED */