|
Data Types |
| type | dsp16xx_frame_info |
Defines |
| #define | DSP16XX 1 |
| #define | ASM_PROG "as1600" |
| #define | LD_PROG "ld1600" |
| #define | WORD_SWITCH_TAKES_ARG(STR) |
| #define | CC1_SPEC "%{!O*:-O}" |
| #define | CPP_SPEC "%{!O*:-D__OPTIMIZE__}" |
| #define | CROSS_ASM_SPEC "%{!S:as1600 %a %i\n }" |
| #define | CROSS_LINK_SPEC "%{!c:%{!M:%{!MM:%{!E:%{!S:ld1600 %l %X %{o*} %{m} \ %{r} %{s} %{t} %{u*} %{x}\ %{!A:%{!nostdlib:%{!nostartfiles:%S}}} %{static:}\ %{L*} %D %o %{!nostdlib:-le1600 %L -le1600}\ %{!A:%{!nostdlib:%{!nostartfiles:%E}}}\n }}}}}" |
| #define | LIB_SPEC "-lc" |
| #define | STARTFILE_SPEC "%{mmap1:m1_crt0.o%s} \%{mmap2:m2_crt0.o%s} \%{mmap3:m3_crt0.o%s} \%{mmap4:m4_crt0.o%s} \%{!mmap*: %{!ifile*: m4_crt0.o%s} %{ifile*: \%ea -ifile option requires a -map option}}" |
| #define | ENDFILE_SPEC "%{mmap1:m1_crtn.o%s} \%{mmap2:m2_crtn.o%s} \%{mmap3:m3_crtn.o%s} \%{mmap4:m4_crtn.o%s} \%{!mmap*: %{!ifile*: m4_crtn.o%s} %{ifile*: \%ea -ifile option requires a -map option}}" |
| #define | ASM_SPEC "%{V} %{v:%{!V:-V}} %{g*:-g}" |
| #define | LINK_SPEC "%{V} %{v:%{!V:-V}} %{minit:-i} \%{!ifile*:%{mmap1:m1_deflt.if%s} \ %{mmap2:m2_deflt.if%s} \ %{mmap3:m3_deflt.if%s} \ %{mmap4:m4_deflt.if%s} \ %{!mmap*:m4_deflt.if%s}} \%{ifile*:%*} %{r}" |
| #define | INCLUDE_DEFAULTS |
| #define | CPP_PREDEFINES "-Ddsp1600 -DDSP1600 -Ddsp1610 -DDSP1610" |
| #define | MASK_REGPARM 0x00000001 |
| #define | MASK_NEAR_CALL 0x00000002 |
| #define | MASK_NEAR_JUMP 0x00000004 |
| #define | MASK_BMU 0x00000008 |
| #define | MASK_MAP1 0x00000040 |
| #define | MASK_MAP2 0x00000080 |
| #define | MASK_MAP3 0x00000100 |
| #define | MASK_MAP4 0x00000200 |
| #define | MASK_YBASE_HIGH 0x00000400 |
| #define | MASK_INIT 0x00000800 |
| #define | MASK_RESERVE_YBASE 0x00002000 |
| #define | MASK_DEBUG 0x00004000 |
| #define | MASK_SAVE_TEMPS 0x00008000 |
| #define | TARGET_REGPARM (target_flags & MASK_REGPARM) |
| #define | TARGET_NEAR_CALL (target_flags & MASK_NEAR_CALL) |
| #define | TARGET_NEAR_JUMP (target_flags & MASK_NEAR_JUMP) |
| #define | TARGET_BMU (target_flags & MASK_BMU) |
| #define | TARGET_YBASE_HIGH (target_flags & MASK_YBASE_HIGH) |
| #define | TARGET_MASK_INIT (target_flags & MASK_INIT) |
| #define | TARGET_INLINE_MULT (target_flags & MASK_INLINE_MULT) |
| #define | TARGET_RESERVE_YBASE (target_flags & MASK_RESERVE_YBASE) |
| #define | TARGET_DEBUG (target_flags & MASK_DEBUG) |
| #define | TARGET_SAVE_TEMPS (target_flags & MASK_SAVE_TEMPS) |
| #define | TARGET_SWITCHES |
| #define | TARGET_DEFAULT MASK_REGPARM|MASK_YBASE_HIGH |
| #define | TARGET_OPTIONS |
| #define | OVERRIDE_OPTIONS override_options () |
| #define | OPTIMIZATION_OPTIONS(LEVEL, SIZE) |
| #define | REAL_ARITHMETIC |
| #define | BITS_BIG_ENDIAN 0 |
| #define | BYTES_BIG_ENDIAN 1 |
| #define | WORDS_BIG_ENDIAN 1 |
| #define | BITS_PER_UNIT 16 |
| #define | BITS_PER_WORD 16 |
| #define | MAX_BITS_PER_WORD 16 |
| #define | UNITS_PER_WORD 1 |
| #define | POINTER_SIZE 16 |
| #define | POINTER_BOUNDARY 16 |
| #define | PARM_BOUNDARY 16 |
| #define | STACK_BOUNDARY 16 |
| #define | FUNCTION_BOUNDARY 16 |
| #define | BIGGEST_ALIGNMENT 16 |
| #define | BIGGEST_FIELD_ALIGNMENT 16 |
| #define | EMPTY_FIELD_BOUNDARY 16 |
| #define | STRUCTURE_SIZE_BOUNDARY 16 |
| #define | STRICT_ALIGNMENT 1 |
| #define | MAX_FIXED_MODE_SIZE 32 |
| #define | CHAR_TYPE_SIZE 16 |
| #define | SHORT_TYPE_SIZE 16 |
| #define | INT_TYPE_SIZE 16 |
| #define | LONG_TYPE_SIZE 32 |
| #define | LONG_LONG_TYPE_SIZE 32 |
| #define | FLOAT_TYPE_SIZE 32 |
| #define | DOUBLE_TYPE_SIZE 32 |
| #define | LONG_DOUBLE_TYPE_SIZE 32 |
| #define | DEFAULT_SIGNED_CHAR 1 |
| #define | DEFAULT_SHORT_ENUMS 0 |
| #define | SIZE_TYPE "unsigned int" |
| #define | PTRDIFF_TYPE "int" |
| #define | ALL_16_BIT_REGISTERS 1 |
| #define | FIRST_PSEUDO_REGISTER (REG_YBASE31 + 1) |
| #define | REG_A0 0 |
| #define | REG_A0L 1 |
| #define | REG_A1 2 |
| #define | REG_A1L 3 |
| #define | REG_X 4 |
| #define | REG_Y 5 |
| #define | REG_YL 6 |
| #define | REG_PROD 7 |
| #define | REG_PRODL 8 |
| #define | REG_R0 9 |
| #define | REG_R1 10 |
| #define | REG_R2 11 |
| #define | REG_R3 12 |
| #define | REG_J 13 |
| #define | REG_K 14 |
| #define | REG_YBASE 15 |
| #define | REG_PT 16 |
| #define | REG_AR0 17 |
| #define | REG_AR1 18 |
| #define | REG_AR2 19 |
| #define | REG_AR3 20 |
| #define | REG_C0 21 |
| #define | REG_C1 22 |
| #define | REG_C2 23 |
| #define | REG_PR 24 |
| #define | REG_RB 25 |
| #define | REG_YBASE0 26 |
| #define | REG_YBASE1 27 |
| #define | REG_YBASE2 28 |
| #define | REG_YBASE3 29 |
| #define | REG_YBASE4 30 |
| #define | REG_YBASE5 31 |
| #define | REG_YBASE6 32 |
| #define | REG_YBASE7 33 |
| #define | REG_YBASE8 34 |
| #define | REG_YBASE9 35 |
| #define | REG_YBASE10 36 |
| #define | REG_YBASE11 37 |
| #define | REG_YBASE12 38 |
| #define | REG_YBASE13 39 |
| #define | REG_YBASE14 40 |
| #define | REG_YBASE15 41 |
| #define | REG_YBASE16 42 |
| #define | REG_YBASE17 43 |
| #define | REG_YBASE18 44 |
| #define | REG_YBASE19 45 |
| #define | REG_YBASE20 46 |
| #define | REG_YBASE21 47 |
| #define | REG_YBASE22 48 |
| #define | REG_YBASE23 49 |
| #define | REG_YBASE24 50 |
| #define | REG_YBASE25 51 |
| #define | REG_YBASE26 52 |
| #define | REG_YBASE27 53 |
| #define | REG_YBASE28 54 |
| #define | REG_YBASE29 55 |
| #define | REG_YBASE30 56 |
| #define | REG_YBASE31 57 |
| #define | IS_ACCUM_REG(REGNO) IN_RANGE ((REGNO), REG_A0, REG_A1L) |
| #define | IS_ACCUM_LOW_REG(REGNO) ((REGNO) == REG_A0L || (REGNO) == REG_A1L) |
| #define | IS_YBASE_REGISTER_WINDOW(REGNO) ((REGNO) >= REG_YBASE0 && (REGNO) <= REG_YBASE31) |
| #define | IS_YBASE_ELIGIBLE_REG(REGNO) |
| #define | IS_ADDRESS_REGISTER(REGNO) ((REGNO) >= REG_R0 && (REGNO) <= REG_R3) |
| #define | FIXED_REGISTERS |
| #define | CALL_USED_REGISTERS |
| #define | REG_ALLOC_ORDER |
| #define | CONDITIONAL_REGISTER_USAGE |
| #define | CLASS_LIKELY_SPILLED_P(CLASS) ((CLASS) != ALL_REGS && (CLASS) != YBASE_VIRT_REGS) |
| #define | HARD_REGNO_NREGS(REGNO, MODE) (GET_MODE_SIZE(MODE)) |
| #define | HARD_REGNO_MODE_OK(REGNO, MODE) hard_regno_mode_ok(REGNO, MODE) |
| #define | MODES_TIEABLE_P(MODE1, MODE2) |
| #define | STACK_POINTER_REGNUM REG_R3 |
| #define | FRAME_POINTER_REGNUM REG_R2 |
| #define | CAN_DEBUG_WITHOUT_FP 1 |
| #define | RETURN_ADDRESS_REGNUM REG_PR |
| #define | ARG_POINTER_REGNUM FRAME_POINTER_REGNUM |
| #define | STATIC_CHAIN_REGNUM 4 |
| #define | STRUCT_VALUE_REGNUM REG_R0 |
| #define | GENERAL_REGS ALL_REGS |
| #define | N_REG_CLASSES (int) LIM_REG_CLASSES |
| #define | REG_CLASS_NAMES |
| #define | REG_CLASS_CONTENTS |
| #define | REGNO_REG_CLASS(REGNO) regno_reg_class(REGNO) |
| #define | INDEX_REG_CLASS NO_REGS |
| #define | BASE_REG_CLASS Y_ADDR_REGS |
| #define | REG_CLASS_FROM_LETTER(C) dsp16xx_reg_class_from_letter(C) |
| #define | SECONDARY_RELOAD_CLASS(CLASS, MODE, X) secondary_reload_class(CLASS, MODE, X) |
| #define | SMALL_REGISTER_CLASSES 1 |
| #define | REGNO_OK_FOR_BASE_P(REGNO) |
| #define | REGNO_OK_FOR_YBASE_P(REGNO) (((REGNO) == REG_YBASE) || ((unsigned) reg_renumber[REGNO] == REG_YBASE)) |
| #define | REGNO_OK_FOR_INDEX_P(REGNO) 0 |
| #define | IS_32_BIT_REG(REGNO) 0 |
| #define | PREFERRED_RELOAD_CLASS(X, CLASS) preferred_reload_class (X, CLASS) |
| #define | CLASS_MAX_NREGS(CLASS, MODE) class_max_nregs(CLASS, MODE) |
| #define | SMALL_INT(X) (SMALL_INTVAL (INTVAL (X))) |
| #define | SMALL_INTVAL(I) ((unsigned) (I) < 0x10000) |
| #define | SHORT_IMMEDIATE(X) (SHORT_INTVAL (INTVAL(X))) |
| #define | SHORT_INTVAL(I) ((unsigned) (I) < 0x100) |
| #define | ADD_LOW_16(I) ((I) >= 0 && (I) <= 32767) |
| #define | ADD_HIGH_16(I) (((I) & 0x0000ffff) == 0) |
| #define | AND_LOW_16(I) ((I) >= 0 && (I) <= 32767) |
| #define | AND_HIGH_16(I) (((I) & 0x0000ffff) == 0) |
| #define | CONST_OK_FOR_LETTER_P(VALUE, C) |
| #define | CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1 |
| #define | EXTRA_CONSTRAINT(OP, C) |
| #define | ARGS_GROW_DOWNWARD |
| #define | STACK_PUSH_CODE POST_INC |
| #define | STARTING_FRAME_OFFSET 0 |
| #define | STACK_POINTER_OFFSET (0) |
| #define | RETURN_ADDR_OFF current_frame_info.pr_save_offset |
| #define | ACCUMULATE_OUTGOING_ARGS 1 |
| #define | FIRST_PARM_OFFSET(FNDECL) (0) |
| #define | RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0 |
| #define | VALUE_REGNO(MODE) (REG_Y) |
| #define | FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx_REG (TYPE_MODE (VALTYPE), VALUE_REGNO(TYPE_MODE(VALTYPE))) |
| #define | LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, VALUE_REGNO(MODE)) |
| #define | FUNCTION_VALUE_REGNO_P(N) ((N) == REG_Y) |
| #define | FUNCTION_ARG(CUM, MODE, TYPE, NAMED) dsp16xx_function_arg (CUM, MODE, TYPE, NAMED) |
| #define | FIRST_REG_FOR_FUNCTION_ARG REG_Y |
| #define | CALLER_SAVE_PROFITABLE(REFS, CALLS) 0 |
| #define | FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) (MUST_PASS_IN_STACK (MODE, TYPE)) |
| #define | FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) (0) |
| #define | CUMULATIVE_ARGS int |
| #define | INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) ((CUM) = 0) |
| #define | FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) dsp16xx_function_arg_advance (&CUM, MODE,TYPE, NAMED) |
| #define | FUNCTION_ARG_REGNO_P(N) ((N) == REG_Y || (N) == REG_YL || (N) == REG_PROD || (N) == REG_PRODL) |
| #define | FUNCTION_PROFILER(FILE, LABELNO) internal_error ("profiling not implemented yet") |
| #define | EXIT_IGNORE_STACK (0) |
| #define | TRAMPOLINE_TEMPLATE(FILE) internal_error ("trampolines not yet implemented"); |
| #define | TRAMPOLINE_SIZE 20 |
| #define | INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) internal_error ("trampolines not yet implemented"); |
| #define | FRAME_POINTER_REQUIRED (current_function_calls_alloca) |
| #define | INITIAL_FRAME_POINTER_OFFSET(DEPTH) |
| #define | ADDHF3_LIBCALL "__Emulate_addhf3" |
| #define | SUBHF3_LIBCALL "__Emulate_subhf3" |
| #define | MULHF3_LIBCALL "__Emulate_mulhf3" |
| #define | DIVHF3_LIBCALL "__Emulate_divhf3" |
| #define | CMPHF3_LIBCALL "__Emulate_cmphf3" |
| #define | FIXHFHI2_LIBCALL "__Emulate_fixhfhi2" |
| #define | FLOATHIHF2_LIBCALL "__Emulate_floathihf2" |
| #define | NEGHF2_LIBCALL "__Emulate_neghf2" |
| #define | UMULHI3_LIBCALL "__Emulate_umulhi3" |
| #define | MULHI3_LIBCALL "__Emulate_mulhi3" |
| #define | UDIVQI3_LIBCALL "__Emulate_udivqi3" |
| #define | UDIVHI3_LIBCALL "__Emulate_udivhi3" |
| #define | DIVQI3_LIBCALL "__Emulate_divqi3" |
| #define | DIVHI3_LIBCALL "__Emulate_divhi3" |
| #define | MODQI3_LIBCALL "__Emulate_modqi3" |
| #define | MODHI3_LIBCALL "__Emulate_modhi3" |
| #define | UMODQI3_LIBCALL "__Emulate_umodqi3" |
| #define | UMODHI3_LIBCALL "__Emulate_umodhi3" |
| #define | ASHRHI3_LIBCALL "__Emulate_ashrhi3" |
| #define | LSHRHI3_LIBCALL "__Emulate_lshrhi3" |
| #define | ASHLHI3_LIBCALL "__Emulate_ashlhi3" |
| #define | LSHLHI3_LIBCALL "__Emulate_lshlhi3" |
| #define | TARGET_MEM_FUNCTIONS |
| #define | HAVE_POST_INCREMENT 1 |
| #define | HAVE_POST_DECREMENT 1 |
| #define | CONSTANT_ADDRESS_P(X) CONSTANT_P (X) |
| #define | MAX_REGS_PER_ADDRESS 1 |
| #define | REG_OK_FOR_INDEX_P(X) 0 |
| #define | REG_OK_FOR_BASE_P(X) |
| #define | REG_OK_FOR_YBASE_P(X) (REGNO(X) == REG_YBASE || (REGNO (X) >= FIRST_PSEUDO_REGISTER)) |
| #define | INT_FITS_5_BITS(I) ((unsigned long) (I) < 0x20) |
| #define | INT_FITS_16_BITS(I) ((unsigned long) (I) < 0x10000) |
| #define | YBASE_CONST_OFFSET(I) ((I) >= -31 && (I) <= 0) |
| #define | YBASE_OFFSET(X) (GET_CODE (X) == CONST_INT && YBASE_CONST_OFFSET (INTVAL(X))) |
| #define | FITS_16_BITS(X) (GET_CODE (X) == CONST_INT && INT_FITS_16_BITS(INTVAL(X))) |
| #define | FITS_5_BITS(X) (GET_CODE (X) == CONST_INT && INT_FITS_5_BITS(INTVAL(X))) |
| #define | ILLEGAL_HIMODE_ADDR(MODE, CONST) ((MODE) == HImode && CONST == -31) |
| #define | INDIRECTABLE_ADDRESS_P(X) |
| #define | INDEXABLE_ADDRESS_P(X, MODE) |
| #define | GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) |
| #define | LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) |
| #define | GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL |
| #define | LEGITIMATE_CONSTANT_P(X) (1) |
| #define | NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc( (EXP) ) |
| #define | CONST_COSTS(RTX, CODE, OUTER_CODE) |
| #define | RTX_COSTS(X, CODE, OUTER_CODE) |
| #define | ADDRESS_COST(ADDR) dsp16xx_address_cost (ADDR) |
| #define | REGISTER_MOVE_COST(MODE, FROM, TO) dsp16xx_register_move_cost (FROM, TO) |
| #define | MEMORY_MOVE_COST(MODE, CLASS, IN) |
| #define | BRANCH_COST 1 |
| #define | NO_FUNCTION_CSE |
| #define | SLOW_BYTE_ACCESS 1 |
| #define | DEFAULT_TEXT_SEG_NAME ".text" |
| #define | TEXT_SECTION_ASM_OP rsect_text |
| #define | DEFAULT_CONST_SEG_NAME ".const" |
| #define | READONLY_SECTION_ASM_OP rsect_const |
| #define | READONLY_DATA_SECTION const_section |
| #define | DEFAULT_DATA_SEG_NAME ".data" |
| #define | DATA_SECTION_ASM_OP rsect_data |
| #define | DEFAULT_BSS_SEG_NAME ".bss" |
| #define | BSS_SECTION_ASM_OP rsect_bss |
| #define | DEFAULT_CHIP_NAME "1610" |
| #define | EXTRA_SECTIONS in_const |
| #define | EXTRA_SECTION_FUNCTIONS |
| #define | ASM_FILE_START(FILE) coff_dsp16xx_file_start (FILE) |
| #define | ASM_COMMENT_START "" |
| #define | ASM_COMMENT_END "" |
| #define | ASM_APP_ON "" |
| #define | ASM_APP_OFF "" |
| #define | ASCII_LENGTH 10 |
| #define | ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) |
| #define | ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) |
| #define | ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) asm_output_common (FILE, NAME, SIZE, ROUNDED); |
| #define | ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) asm_output_local (FILE, NAME, SIZE, ROUNDED); |
| #define | ASM_OUTPUT_LABEL(FILE, NAME) do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) |
| #define | ASM_GLOBALIZE_LABEL(FILE, NAME) do { fputs (".global ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0) |
| #define | ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) |
| #define | ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) |
| #define | USER_LABEL_PREFIX "_" |
| #define | ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) fprintf (FILE, "%s%d:\n", PREFIX, NUM) |
| #define | ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) sprintf (LABEL, "*%s%d", PREFIX, NUM) |
| #define | REGISTER_NAMES |
| #define | HIMODE_REGISTER_NAMES |
| #define | PRINT_OPERAND_PUNCT_VALID_P(CODE) 0 |
| #define | PRINT_OPERAND(FILE, X, CODE) print_operand(FILE, X, CODE) |
| #define | PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR) |
| #define | ASM_OUTPUT_REG_PUSH(FILE, REGNO) internal_error ("profiling not implemented yet"); |
| #define | ASM_OUTPUT_REG_POP(FILE, REGNO) internal_error ("profiling not implemented yet"); |
| #define | ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) fprintf (FILE, "\tint L%d-L%d\n", VALUE, REL) |
| #define | ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) fprintf (FILE, "\tint L%d\n", VALUE) |
| #define | ASM_OUTPUT_ALIGN(FILE, LOG) |
| #define | ASM_NO_SKIP_IN_TEXT 1 |
| #define | ASM_OUTPUT_SKIP(FILE, SIZE) fprintf (FILE, "\t%d * int 0\n", (SIZE)) |
| #define | PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG |
| #define | ASM_OUTPUT_DEF(asm_out_file, LABEL1, LABEL2) |
| #define | CASE_VECTOR_MODE QImode |
| #define | MOVE_MAX 1 |
| #define | TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 |
| #define | PROMOTE_PROTOTYPES 1 |
| #define | Pmode QImode |
| #define | FUNCTION_MODE QImode |
| #define | TARGET_VERSION fprintf (stderr, " (%s)", VERSION_INFO1) |
| #define | VERSION_INFO1 "Lucent DSP16xx C Cross Compiler, version 1.3.0b" |
| #define | DEFAULT_SIGNED_CHAR 1 |
| #define | INIT_SECTION_ASM_OP 1 |
Enumerations |
| enum | reg_class {
NO_REGS,
R2,
R0_1,
INDEX_REGS,
BASE_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
LR0_REGS,
GENERAL_REGS,
BP_REGS,
FC_REGS,
CR_REGS,
Q_REGS,
SPECIAL_REGS,
ACCUM0_REGS,
ACCUM_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R24_REG,
R25_REG,
R27_REG,
GENERAL_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
LPCOUNT_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPU_REGS,
LO_REGS,
STACK_REG,
BASE_REGS,
HI_REGS,
CC_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REG,
POINTER_X_REGS,
POINTER_Y_REGS,
POINTER_Z_REGS,
STACK_REG,
BASE_POINTER_REGS,
POINTER_REGS,
ADDW_REGS,
SIMPLE_LD_REGS,
LD_REGS,
NO_LD_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0R1_REGS,
R2R3_REGS,
EXT_LOW_REGS,
EXT_REGS,
ADDR_REGS,
INDEX_REGS,
BK_REG,
SP_REG,
RC_REG,
COUNTER_REGS,
INT_REGS,
GENERAL_REGS,
DP_REG,
ST_REG,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
S_REGS,
INDEX_REGS,
SP_REGS,
A_REGS,
SI_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
REPEAT_REGS,
CR_REGS,
ACCUM_REGS,
OTHER_FLAG_REGS,
F0_REGS,
F1_REGS,
BR_FLAG_REGS,
FLAG_REGS,
EVEN_REGS,
GPR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
A0H_REG,
A0L_REG,
A0_REG,
A1H_REG,
ACCUM_HIGH_REGS,
A1L_REG,
ACCUM_LOW_REGS,
A1_REG,
ACCUM_REGS,
X_REG,
X_OR_ACCUM_LOW_REGS,
X_OR_ACCUM_REGS,
YH_REG,
YH_OR_ACCUM_HIGH_REGS,
X_OR_YH_REGS,
YL_REG,
YL_OR_ACCUM_LOW_REGS,
X_OR_YL_REGS,
X_OR_Y_REGS,
Y_REG,
ACCUM_OR_Y_REGS,
PH_REG,
X_OR_PH_REGS,
PL_REG,
PL_OR_ACCUM_LOW_REGS,
X_OR_PL_REGS,
YL_OR_PL_OR_ACCUM_LOW_REGS,
P_REG,
ACCUM_OR_P_REGS,
YL_OR_P_REGS,
ACCUM_LOW_OR_YL_OR_P_REGS,
Y_OR_P_REGS,
ACCUM_Y_OR_P_REGS,
NO_FRAME_Y_ADDR_REGS,
Y_ADDR_REGS,
ACCUM_LOW_OR_Y_ADDR_REGS,
ACCUM_OR_Y_ADDR_REGS,
X_OR_Y_ADDR_REGS,
Y_OR_Y_ADDR_REGS,
P_OR_Y_ADDR_REGS,
NON_HIGH_YBASE_ELIGIBLE_REGS,
YBASE_ELIGIBLE_REGS,
J_REG,
J_OR_DAU_16_BIT_REGS,
BMU_REGS,
NOHIGH_NON_ADDR_REGS,
NON_ADDR_REGS,
SLOW_MEM_LOAD_REGS,
NOHIGH_NON_YBASE_REGS,
NO_ACCUM_NON_YBASE_REGS,
NON_YBASE_REGS,
YBASE_VIRT_REGS,
ACCUM_LOW_OR_YBASE_REGS,
ACCUM_OR_YBASE_REGS,
X_OR_YBASE_REGS,
Y_OR_YBASE_REGS,
ACCUM_LOW_YL_PL_OR_YBASE_REGS,
P_OR_YBASE_REGS,
ACCUM_Y_P_OR_YBASE_REGS,
Y_ADDR_OR_YBASE_REGS,
YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS,
YBASE_OR_YBASE_ELIGIBLE_REGS,
NO_HIGH_ALL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MULTIPLY_32_REG,
MULTIPLY_64_REG,
LOW_REGS,
HIGH_REGS,
REAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
MAC_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ADDR_REGS,
DATA_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
AREG,
DREG,
CREG,
BREG,
SIREG,
DIREG,
AD_REGS,
Q_REGS,
NON_Q_REGS,
INDEX_REGS,
LEGACY_REGS,
GENERAL_REGS,
FP_TOP_REG,
FP_SECOND_REG,
FLOAT_REGS,
SSE_REGS,
MMX_REGS,
FP_TOP_SSE_REGS,
FP_SECOND_SSE_REGS,
FLOAT_SSE_REGS,
FLOAT_INT_REGS,
INT_SSE_REGS,
FLOAT_INT_SSE_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GLOBAL_REGS,
LOCAL_REGS,
LOCAL_OR_GLOBAL_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
PR_REGS,
BR_REGS,
AR_M_REGS,
AR_I_REGS,
ADDL_REGS,
GR_REGS,
FR_REGS,
GR_AND_BR_REGS,
GR_AND_FR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
CARRY_REG,
ACCUM_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
D_REGS,
X_REGS,
Y_REGS,
SP_REGS,
DA_REGS,
DB_REGS,
Z_REGS,
D8_REGS,
Q_REGS,
D_OR_X_REGS,
D_OR_Y_REGS,
D_OR_SP_REGS,
X_OR_Y_REGS,
A_REGS,
X_OR_SP_REGS,
Y_OR_SP_REGS,
X_OR_Y_OR_D_REGS,
A_OR_D_REGS,
A_OR_SP_REGS,
H_REGS,
S_REGS,
D_OR_S_REGS,
X_OR_S_REGS,
Y_OR_S_REGS,
SP_OR_S_REGS,
D_OR_X_OR_S_REGS,
D_OR_Y_OR_S_REGS,
D_OR_SP_OR_S_REGS,
A_OR_S_REGS,
D_OR_A_OR_S_REGS,
TMP_REGS,
D_OR_A_OR_TMP_REGS,
G_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDR_REGS,
FP_REGS,
GENERAL_REGS,
DATA_OR_FP_REGS,
ADDR_OR_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
AP_REG,
XRF_REGS,
GENERAL_REGS,
AGRF_REGS,
XGRF_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ONLYR1_REGS,
LRW_REGS,
GENERAL_REGS,
C_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
REMAINDER_REG,
HIMULT_REG,
SYSTEM_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDRESS_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDRESS_REGS,
SP_REGS,
DATA_OR_ADDRESS_REGS,
SP_OR_ADDRESS_REGS,
EXTENDED_REGS,
DATA_OR_EXTENDED_REGS,
ADDRESS_OR_EXTENDED_REGS,
SP_OR_EXTENDED_REGS,
SP_OR_ADDRESS_OR_EXTENDED_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FLOAT_REG0,
LONG_FLOAT_REG0,
FLOAT_REGS,
FP_REGS,
GEN_AND_FP_REGS,
FRAME_POINTER_REG,
STACK_POINTER_REG,
GEN_AND_MEM_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MUL_REGS,
GENERAL_REGS,
LOAD_FPU_REGS,
NO_LOAD_FPU_REGS,
FPU_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
OUT_REGS,
STD_REGS,
ARG_REGS,
SRC_REGS,
DST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
R15_REGS,
BASE_REGS,
GENERAL_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BASE_REGS,
GENERAL_REGS,
FLOAT_REGS,
ALTIVEC_REGS,
VRSAVE_REGS,
NON_SPECIAL_REGS,
MQ_REGS,
LINK_REGS,
CTR_REGS,
LINK_OR_CTR_REGS,
SPECIAL_REGS,
SPEC_OR_GEN_REGS,
CR0_REGS,
CR_REGS,
NON_FLOAT_REGS,
XER_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ADDR_REGS,
GENERAL_REGS,
FP_REGS,
ADDR_FP_REGS,
GENERAL_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
PR_REGS,
T_REGS,
MAC_REGS,
FPUL_REGS,
SIBCALL_REGS,
GENERAL_REGS,
FP0_REGS,
FP_REGS,
DF_REGS,
FPSCR_REGS,
GENERAL_FP_REGS,
TARGET_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
HILO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HILO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPCC_REGS,
I64_REGS,
GENERAL_REGS,
FP_REGS,
EXTRA_FP_REGS,
GENERAL_OR_FP_REGS,
GENERAL_OR_EXTRA_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
R1_REGS,
TWO_REGS,
R2_REGS,
EIGHT_REGS,
R8_REGS,
ICALL_REGS,
GENERAL_REGS,
CARRY_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BR_REGS,
FP_REGS,
ACC_REG,
SP_REG,
RL_REGS,
GR_REGS,
AR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
HILO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HILO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
HILO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HILO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R2,
R0_1,
INDEX_REGS,
BASE_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
LR0_REGS,
GENERAL_REGS,
BP_REGS,
FC_REGS,
CR_REGS,
Q_REGS,
SPECIAL_REGS,
ACCUM0_REGS,
ACCUM_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R24_REG,
R25_REG,
R27_REG,
GENERAL_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
LPCOUNT_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPU_REGS,
LO_REGS,
STACK_REG,
BASE_REGS,
HI_REGS,
CC_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REG,
POINTER_X_REGS,
POINTER_Y_REGS,
POINTER_Z_REGS,
STACK_REG,
BASE_POINTER_REGS,
POINTER_REGS,
ADDW_REGS,
SIMPLE_LD_REGS,
LD_REGS,
NO_LD_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0R1_REGS,
R2R3_REGS,
EXT_LOW_REGS,
EXT_REGS,
ADDR_REGS,
INDEX_REGS,
BK_REG,
SP_REG,
RC_REG,
COUNTER_REGS,
INT_REGS,
GENERAL_REGS,
DP_REG,
ST_REG,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
S_REGS,
INDEX_REGS,
SP_REGS,
A_REGS,
SI_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
REPEAT_REGS,
CR_REGS,
ACCUM_REGS,
OTHER_FLAG_REGS,
F0_REGS,
F1_REGS,
BR_FLAG_REGS,
FLAG_REGS,
EVEN_REGS,
GPR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
A0H_REG,
A0L_REG,
A0_REG,
A1H_REG,
ACCUM_HIGH_REGS,
A1L_REG,
ACCUM_LOW_REGS,
A1_REG,
ACCUM_REGS,
X_REG,
X_OR_ACCUM_LOW_REGS,
X_OR_ACCUM_REGS,
YH_REG,
YH_OR_ACCUM_HIGH_REGS,
X_OR_YH_REGS,
YL_REG,
YL_OR_ACCUM_LOW_REGS,
X_OR_YL_REGS,
X_OR_Y_REGS,
Y_REG,
ACCUM_OR_Y_REGS,
PH_REG,
X_OR_PH_REGS,
PL_REG,
PL_OR_ACCUM_LOW_REGS,
X_OR_PL_REGS,
YL_OR_PL_OR_ACCUM_LOW_REGS,
P_REG,
ACCUM_OR_P_REGS,
YL_OR_P_REGS,
ACCUM_LOW_OR_YL_OR_P_REGS,
Y_OR_P_REGS,
ACCUM_Y_OR_P_REGS,
NO_FRAME_Y_ADDR_REGS,
Y_ADDR_REGS,
ACCUM_LOW_OR_Y_ADDR_REGS,
ACCUM_OR_Y_ADDR_REGS,
X_OR_Y_ADDR_REGS,
Y_OR_Y_ADDR_REGS,
P_OR_Y_ADDR_REGS,
NON_HIGH_YBASE_ELIGIBLE_REGS,
YBASE_ELIGIBLE_REGS,
J_REG,
J_OR_DAU_16_BIT_REGS,
BMU_REGS,
NOHIGH_NON_ADDR_REGS,
NON_ADDR_REGS,
SLOW_MEM_LOAD_REGS,
NOHIGH_NON_YBASE_REGS,
NO_ACCUM_NON_YBASE_REGS,
NON_YBASE_REGS,
YBASE_VIRT_REGS,
ACCUM_LOW_OR_YBASE_REGS,
ACCUM_OR_YBASE_REGS,
X_OR_YBASE_REGS,
Y_OR_YBASE_REGS,
ACCUM_LOW_YL_PL_OR_YBASE_REGS,
P_OR_YBASE_REGS,
ACCUM_Y_P_OR_YBASE_REGS,
Y_ADDR_OR_YBASE_REGS,
YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS,
YBASE_OR_YBASE_ELIGIBLE_REGS,
NO_HIGH_ALL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MULTIPLY_32_REG,
MULTIPLY_64_REG,
LOW_REGS,
HIGH_REGS,
REAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
MAC_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ADDR_REGS,
DATA_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
AREG,
DREG,
CREG,
BREG,
SIREG,
DIREG,
AD_REGS,
Q_REGS,
NON_Q_REGS,
INDEX_REGS,
LEGACY_REGS,
GENERAL_REGS,
FP_TOP_REG,
FP_SECOND_REG,
FLOAT_REGS,
SSE_REGS,
MMX_REGS,
FP_TOP_SSE_REGS,
FP_SECOND_SSE_REGS,
FLOAT_SSE_REGS,
FLOAT_INT_REGS,
INT_SSE_REGS,
FLOAT_INT_SSE_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GLOBAL_REGS,
LOCAL_REGS,
LOCAL_OR_GLOBAL_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
PR_REGS,
BR_REGS,
AR_M_REGS,
AR_I_REGS,
ADDL_REGS,
GR_REGS,
FR_REGS,
GR_AND_BR_REGS,
GR_AND_FR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
CARRY_REG,
ACCUM_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
D_REGS,
X_REGS,
Y_REGS,
SP_REGS,
DA_REGS,
DB_REGS,
Z_REGS,
D8_REGS,
Q_REGS,
D_OR_X_REGS,
D_OR_Y_REGS,
D_OR_SP_REGS,
X_OR_Y_REGS,
A_REGS,
X_OR_SP_REGS,
Y_OR_SP_REGS,
X_OR_Y_OR_D_REGS,
A_OR_D_REGS,
A_OR_SP_REGS,
H_REGS,
S_REGS,
D_OR_S_REGS,
X_OR_S_REGS,
Y_OR_S_REGS,
SP_OR_S_REGS,
D_OR_X_OR_S_REGS,
D_OR_Y_OR_S_REGS,
D_OR_SP_OR_S_REGS,
A_OR_S_REGS,
D_OR_A_OR_S_REGS,
TMP_REGS,
D_OR_A_OR_TMP_REGS,
G_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDR_REGS,
FP_REGS,
GENERAL_REGS,
DATA_OR_FP_REGS,
ADDR_OR_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
AP_REG,
XRF_REGS,
GENERAL_REGS,
AGRF_REGS,
XGRF_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ONLYR1_REGS,
LRW_REGS,
GENERAL_REGS,
C_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
REMAINDER_REG,
HIMULT_REG,
SYSTEM_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDRESS_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDRESS_REGS,
SP_REGS,
DATA_OR_ADDRESS_REGS,
SP_OR_ADDRESS_REGS,
EXTENDED_REGS,
DATA_OR_EXTENDED_REGS,
ADDRESS_OR_EXTENDED_REGS,
SP_OR_EXTENDED_REGS,
SP_OR_ADDRESS_OR_EXTENDED_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FLOAT_REG0,
LONG_FLOAT_REG0,
FLOAT_REGS,
FP_REGS,
GEN_AND_FP_REGS,
FRAME_POINTER_REG,
STACK_POINTER_REG,
GEN_AND_MEM_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MUL_REGS,
GENERAL_REGS,
LOAD_FPU_REGS,
NO_LOAD_FPU_REGS,
FPU_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
OUT_REGS,
STD_REGS,
ARG_REGS,
SRC_REGS,
DST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
R15_REGS,
BASE_REGS,
GENERAL_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BASE_REGS,
GENERAL_REGS,
FLOAT_REGS,
ALTIVEC_REGS,
VRSAVE_REGS,
NON_SPECIAL_REGS,
MQ_REGS,
LINK_REGS,
CTR_REGS,
LINK_OR_CTR_REGS,
SPECIAL_REGS,
SPEC_OR_GEN_REGS,
CR0_REGS,
CR_REGS,
NON_FLOAT_REGS,
XER_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ADDR_REGS,
GENERAL_REGS,
FP_REGS,
ADDR_FP_REGS,
GENERAL_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
PR_REGS,
T_REGS,
MAC_REGS,
FPUL_REGS,
SIBCALL_REGS,
GENERAL_REGS,
FP0_REGS,
FP_REGS,
DF_REGS,
FPSCR_REGS,
GENERAL_FP_REGS,
TARGET_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
HILO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HILO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPCC_REGS,
I64_REGS,
GENERAL_REGS,
FP_REGS,
EXTRA_FP_REGS,
GENERAL_OR_FP_REGS,
GENERAL_OR_EXTRA_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
R1_REGS,
TWO_REGS,
R2_REGS,
EIGHT_REGS,
R8_REGS,
ICALL_REGS,
GENERAL_REGS,
CARRY_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BR_REGS,
FP_REGS,
ACC_REG,
SP_REG,
RL_REGS,
GR_REGS,
AR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
HILO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HILO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
HILO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HILO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REG,
R24_REG,
R25_REG,
R27_REG,
GENERAL_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
LPCOUNT_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPA_REGS,
CIRRUS_REGS,
VFP_REGS,
IWMMXT_GR_REGS,
IWMMXT_REGS,
LO_REGS,
STACK_REG,
BASE_REGS,
HI_REGS,
CC_REG,
VFPCC_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REG,
POINTER_X_REGS,
POINTER_Y_REGS,
POINTER_Z_REGS,
STACK_REG,
BASE_POINTER_REGS,
POINTER_REGS,
ADDW_REGS,
SIMPLE_LD_REGS,
LD_REGS,
NO_LD_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
IREGS,
BREGS,
LREGS,
MREGS,
CIRCREGS,
DAGREGS,
EVEN_AREGS,
ODD_AREGS,
AREGS,
CCREGS,
EVEN_DREGS,
ODD_DREGS,
DREGS,
PREGS_CLOBBERED,
PREGS,
DPREGS,
MOST_REGS,
PROLOGUE_REGS,
NON_A_CC_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0R1_REGS,
R2R3_REGS,
EXT_LOW_REGS,
EXT_REGS,
ADDR_REGS,
INDEX_REGS,
BK_REG,
SP_REG,
RC_REG,
COUNTER_REGS,
INT_REGS,
GENERAL_REGS,
DP_REG,
ST_REG,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MULTIPLY_32_REG,
MULTIPLY_64_REG,
LOW_REGS,
HIGH_REGS,
REAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ICC_REGS,
FCC_REGS,
CC_REGS,
ICR_REGS,
FCR_REGS,
CR_REGS,
LCR_REG,
LR_REG,
GR8_REGS,
GR9_REGS,
GR89_REGS,
FDPIC_REGS,
FDPIC_FPTR_REGS,
FDPIC_CALL_REGS,
SPR_REGS,
QUAD_ACC_REGS,
EVEN_ACC_REGS,
ACC_REGS,
ACCG_REGS,
QUAD_FPR_REGS,
FEVEN_REGS,
FPR_REGS,
QUAD_REGS,
EVEN_REGS,
GPR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
COUNTER_REGS,
SOURCE_REGS,
DESTINATION_REGS,
GENERAL_REGS,
MAC_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
AREG,
DREG,
CREG,
BREG,
SIREG,
DIREG,
AD_REGS,
Q_REGS,
NON_Q_REGS,
INDEX_REGS,
LEGACY_REGS,
GENERAL_REGS,
FP_TOP_REG,
FP_SECOND_REG,
FLOAT_REGS,
SSE_REGS,
MMX_REGS,
FP_TOP_SSE_REGS,
FP_SECOND_SSE_REGS,
FLOAT_SSE_REGS,
FLOAT_INT_REGS,
INT_SSE_REGS,
FLOAT_INT_SSE_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
PR_REGS,
BR_REGS,
AR_M_REGS,
AR_I_REGS,
ADDL_REGS,
GR_REGS,
FR_REGS,
GR_AND_BR_REGS,
GR_AND_FR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DPH_REGS,
DPL_REGS,
DP_REGS,
SP_REGS,
IPH_REGS,
IPL_REGS,
IP_REGS,
DP_SP_REGS,
PTR_REGS,
NONPTR_REGS,
NONSP_REGS,
GENERAL_REGS,
ALL_REGS = GENERAL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
CARRY_REG,
ACCUM_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
D_REGS,
X_REGS,
Y_REGS,
SP_REGS,
DA_REGS,
DB_REGS,
Z_REGS,
D8_REGS,
Q_REGS,
D_OR_X_REGS,
D_OR_Y_REGS,
D_OR_SP_REGS,
X_OR_Y_REGS,
A_REGS,
X_OR_SP_REGS,
Y_OR_SP_REGS,
X_OR_Y_OR_D_REGS,
A_OR_D_REGS,
A_OR_SP_REGS,
H_REGS,
S_REGS,
D_OR_S_REGS,
X_OR_S_REGS,
Y_OR_S_REGS,
Z_OR_S_REGS,
SP_OR_S_REGS,
D_OR_X_OR_S_REGS,
D_OR_Y_OR_S_REGS,
D_OR_SP_OR_S_REGS,
A_OR_S_REGS,
D_OR_A_OR_S_REGS,
TMP_REGS,
D_OR_A_OR_TMP_REGS,
G_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDR_REGS,
FP_REGS,
GENERAL_REGS,
DATA_OR_FP_REGS,
ADDR_OR_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ONLYR1_REGS,
LRW_REGS,
GENERAL_REGS,
C_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
PIC_FN_ADDR_REG,
LEA_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
REMAINDER_REG,
HIMULT_REG,
SYSTEM_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDRESS_REGS,
SP_REGS,
DATA_OR_ADDRESS_REGS,
SP_OR_ADDRESS_REGS,
EXTENDED_REGS,
DATA_OR_EXTENDED_REGS,
ADDRESS_OR_EXTENDED_REGS,
SP_OR_EXTENDED_REGS,
SP_OR_ADDRESS_OR_EXTENDED_REGS,
FP_REGS,
FP_ACC_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FLOAT_REG0,
LONG_FLOAT_REG0,
FLOAT_REGS,
LONG_REGS,
FP_REGS,
GEN_AND_FP_REGS,
FRAME_POINTER_REG,
STACK_POINTER_REG,
GEN_AND_MEM_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MUL_REGS,
GENERAL_REGS,
LOAD_FPU_REGS,
NO_LOAD_FPU_REGS,
FPU_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BASE_REGS,
GENERAL_REGS,
FLOAT_REGS,
ALTIVEC_REGS,
VRSAVE_REGS,
VSCR_REGS,
SPE_ACC_REGS,
SPEFSCR_REGS,
NON_SPECIAL_REGS,
MQ_REGS,
LINK_REGS,
CTR_REGS,
LINK_OR_CTR_REGS,
SPECIAL_REGS,
SPEC_OR_GEN_REGS,
CR0_REGS,
CR_REGS,
NON_FLOAT_REGS,
XER_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
CC_REGS,
ADDR_REGS,
GENERAL_REGS,
ACCESS_REGS,
ADDR_CC_REGS,
GENERAL_CC_REGS,
FP_REGS,
ADDR_FP_REGS,
GENERAL_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
PR_REGS,
T_REGS,
MAC_REGS,
FPUL_REGS,
SIBCALL_REGS,
GENERAL_REGS,
FP0_REGS,
FP_REGS,
DF_HI_REGS,
DF_REGS,
FPSCR_REGS,
GENERAL_FP_REGS,
TARGET_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPCC_REGS,
I64_REGS,
GENERAL_REGS,
FP_REGS,
EXTRA_FP_REGS,
GENERAL_OR_FP_REGS,
GENERAL_OR_EXTRA_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
R1_REGS,
TWO_REGS,
R2_REGS,
EIGHT_REGS,
R8_REGS,
ICALL_REGS,
GENERAL_REGS,
CARRY_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BR_REGS,
FP_REGS,
ACC_REG,
SP_REG,
RL_REGS,
GR_REGS,
AR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REG,
R24_REG,
R25_REG,
R27_REG,
GENERAL_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
LPCOUNT_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPA_REGS,
CIRRUS_REGS,
VFP_REGS,
IWMMXT_GR_REGS,
IWMMXT_REGS,
LO_REGS,
STACK_REG,
BASE_REGS,
HI_REGS,
CC_REG,
VFPCC_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REG,
POINTER_X_REGS,
POINTER_Y_REGS,
POINTER_Z_REGS,
STACK_REG,
BASE_POINTER_REGS,
POINTER_REGS,
ADDW_REGS,
SIMPLE_LD_REGS,
LD_REGS,
NO_LD_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
IREGS,
BREGS,
LREGS,
MREGS,
CIRCREGS,
DAGREGS,
EVEN_AREGS,
ODD_AREGS,
AREGS,
CCREGS,
EVEN_DREGS,
ODD_DREGS,
DREGS,
FDPIC_REGS,
FDPIC_FPTR_REGS,
PREGS_CLOBBERED,
PREGS,
IPREGS,
DPREGS,
MOST_REGS,
LT_REGS,
LC_REGS,
LB_REGS,
PROLOGUE_REGS,
NON_A_CC_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0R1_REGS,
R2R3_REGS,
EXT_LOW_REGS,
EXT_REGS,
ADDR_REGS,
INDEX_REGS,
BK_REG,
SP_REG,
RC_REG,
COUNTER_REGS,
INT_REGS,
GENERAL_REGS,
DP_REG,
ST_REG,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MOF_REGS,
CC0_REGS,
SPECIAL_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
LO_REGS,
HI_REGS,
HILO_REGS,
NOSP_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MULTIPLY_32_REG,
MULTIPLY_64_REG,
LOW_REGS,
HIGH_REGS,
REAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ICC_REGS,
FCC_REGS,
CC_REGS,
ICR_REGS,
FCR_REGS,
CR_REGS,
LCR_REG,
LR_REG,
GR8_REGS,
GR9_REGS,
GR89_REGS,
FDPIC_REGS,
FDPIC_FPTR_REGS,
FDPIC_CALL_REGS,
SPR_REGS,
QUAD_ACC_REGS,
EVEN_ACC_REGS,
ACC_REGS,
ACCG_REGS,
QUAD_FPR_REGS,
FEVEN_REGS,
FPR_REGS,
QUAD_REGS,
EVEN_REGS,
GPR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
COUNTER_REGS,
SOURCE_REGS,
DESTINATION_REGS,
GENERAL_REGS,
MAC_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
AREG,
DREG,
CREG,
BREG,
SIREG,
DIREG,
AD_REGS,
Q_REGS,
NON_Q_REGS,
INDEX_REGS,
LEGACY_REGS,
GENERAL_REGS,
FP_TOP_REG,
FP_SECOND_REG,
FLOAT_REGS,
SSE_REGS,
MMX_REGS,
FP_TOP_SSE_REGS,
FP_SECOND_SSE_REGS,
FLOAT_SSE_REGS,
FLOAT_INT_REGS,
INT_SSE_REGS,
FLOAT_INT_SSE_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
PR_REGS,
BR_REGS,
AR_M_REGS,
AR_I_REGS,
ADDL_REGS,
GR_REGS,
FP_REGS,
FR_REGS,
GR_AND_BR_REGS,
GR_AND_FR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
SP_REGS,
FB_REGS,
SB_REGS,
CR_REGS,
R0_REGS,
R1_REGS,
R2_REGS,
R3_REGS,
R02_REGS,
HL_REGS,
QI_REGS,
R23_REGS,
R03_REGS,
DI_REGS,
A0_REGS,
A1_REGS,
A_REGS,
AD_REGS,
PS_REGS,
SI_REGS,
HI_REGS,
RA_REGS,
GENERAL_REGS,
FLG_REGS,
HC_REGS,
MEM_REGS,
R02_A_MEM_REGS,
A_HL_MEM_REGS,
R1_R3_A_MEM_REGS,
R03_MEM_REGS,
A_HI_MEM_REGS,
A_AD_CR_MEM_SI_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
CARRY_REG,
ACCUM_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
D_REGS,
X_REGS,
Y_REGS,
SP_REGS,
DA_REGS,
DB_REGS,
Z_REGS,
D8_REGS,
Q_REGS,
D_OR_X_REGS,
D_OR_Y_REGS,
D_OR_SP_REGS,
X_OR_Y_REGS,
A_REGS,
X_OR_SP_REGS,
Y_OR_SP_REGS,
X_OR_Y_OR_D_REGS,
A_OR_D_REGS,
A_OR_SP_REGS,
H_REGS,
S_REGS,
D_OR_S_REGS,
X_OR_S_REGS,
Y_OR_S_REGS,
Z_OR_S_REGS,
SP_OR_S_REGS,
D_OR_X_OR_S_REGS,
D_OR_Y_OR_S_REGS,
D_OR_SP_OR_S_REGS,
A_OR_S_REGS,
D_OR_A_OR_S_REGS,
TMP_REGS,
D_OR_A_OR_TMP_REGS,
G_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDR_REGS,
FP_REGS,
GENERAL_REGS,
DATA_OR_FP_REGS,
ADDR_OR_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ONLYR1_REGS,
LRW_REGS,
GENERAL_REGS,
C_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
PIC_FN_ADDR_REG,
V1_REG,
LEA_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
DSP_ACC_REGS,
ACC_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
REMAINDER_REG,
HIMULT_REG,
SYSTEM_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDRESS_REGS,
SP_REGS,
DATA_OR_ADDRESS_REGS,
SP_OR_ADDRESS_REGS,
EXTENDED_REGS,
DATA_OR_EXTENDED_REGS,
ADDRESS_OR_EXTENDED_REGS,
SP_OR_EXTENDED_REGS,
SP_OR_ADDRESS_OR_EXTENDED_REGS,
FP_REGS,
FP_ACC_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MUL_REGS,
GENERAL_REGS,
LOAD_FPU_REGS,
NO_LOAD_FPU_REGS,
FPU_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BASE_REGS,
GENERAL_REGS,
FLOAT_REGS,
ALTIVEC_REGS,
VRSAVE_REGS,
VSCR_REGS,
SPE_ACC_REGS,
SPEFSCR_REGS,
NON_SPECIAL_REGS,
MQ_REGS,
LINK_REGS,
CTR_REGS,
LINK_OR_CTR_REGS,
SPECIAL_REGS,
SPEC_OR_GEN_REGS,
CR0_REGS,
CR_REGS,
NON_FLOAT_REGS,
XER_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
CC_REGS,
ADDR_REGS,
GENERAL_REGS,
ACCESS_REGS,
ADDR_CC_REGS,
GENERAL_CC_REGS,
FP_REGS,
ADDR_FP_REGS,
GENERAL_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
G16_REGS,
G32_REGS,
T32_REGS,
HI_REG,
LO_REG,
CE_REGS,
CN_REG,
LC_REG,
SC_REG,
SP_REGS,
CR_REGS,
CP1_REGS,
CP2_REGS,
CP3_REGS,
CPA_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
PR_REGS,
T_REGS,
MAC_REGS,
FPUL_REGS,
SIBCALL_REGS,
GENERAL_REGS,
FP0_REGS,
FP_REGS,
DF_HI_REGS,
DF_REGS,
FPSCR_REGS,
GENERAL_FP_REGS,
GENERAL_DF_REGS,
TARGET_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPCC_REGS,
I64_REGS,
GENERAL_REGS,
FP_REGS,
EXTRA_FP_REGS,
GENERAL_OR_FP_REGS,
GENERAL_OR_EXTRA_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
R1_REGS,
TWO_REGS,
R2_REGS,
EIGHT_REGS,
R8_REGS,
ICALL_REGS,
GENERAL_REGS,
CARRY_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BR_REGS,
FP_REGS,
ACC_REG,
SP_REG,
RL_REGS,
GR_REGS,
AR_REGS,
ALL_REGS,
LIM_REG_CLASSES
} |
Variables |
| const char * | low_reg_names [] |
| const char * | text_seg_name |
| const char * | rsect_text |
| const char * | data_seg_name |
| const char * | rsect_data |
| const char * | bss_seg_name |
| const char * | rsect_bss |
| const char * | const_seg_name |
| const char * | rsect_const |
| const char * | chip_name |
| const char * | save_chip_name |
| struct rtx_def * | dsp16xx_compare_op0 |
| struct rtx_def * | dsp16xx_compare_op1 |
| struct rtx_def * | dsp16xx_addhf3_libcall |
| struct rtx_def * | dsp16xx_subhf3_libcall |
| struct rtx_def * | dsp16xx_mulhf3_libcall |
| struct rtx_def * | dsp16xx_divhf3_libcall |
| struct rtx_def * | dsp16xx_cmphf3_libcall |
| struct rtx_def * | dsp16xx_fixhfhi2_libcall |
| struct rtx_def * | dsp16xx_floathihf2_libcall |
| struct rtx_def * | dsp16xx_neghf2_libcall |
| struct rtx_def * | dsp16xx_umulhi3_libcall |
| struct rtx_def * | dsp16xx_mulhi3_libcall |
| struct rtx_def * | dsp16xx_udivqi3_libcall |
| struct rtx_def * | dsp16xx_udivhi3_libcall |
| struct rtx_def * | dsp16xx_divqi3_libcall |
| struct rtx_def * | dsp16xx_divhi3_libcall |
| struct rtx_def * | dsp16xx_modqi3_libcall |
| struct rtx_def * | dsp16xx_modhi3_libcall |
| struct rtx_def * | dsp16xx_umodqi3_libcall |
| struct rtx_def * | dsp16xx_umodhi3_libcall |
| struct rtx_def * | dsp16xx_ashrhi3_libcall |
| struct rtx_def * | dsp16xx_ashlhi3_libcall |
| struct rtx_def * | dsp16xx_lshrhi3_libcall |
| int | target_flags |
| struct dsp16xx_frame_info | current_frame_info |