Open64: osprey/cygnus/opcodes/sparc-opc.c Source File

00001 /*
00002  * Copyright 2003, 2004, 2005, 2006 PathScale, Inc.  All Rights Reserved.
00003  */
00004 
00005 /* Table of opcodes for the sparc.
00006    Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
00007    2000, 2002, 2004
00008    Free Software Foundation, Inc.
00009 
00010 This file is part of the BFD library.
00011 
00012 BFD is free software; you can redistribute it and/or modify it under
00013 the terms of the GNU General Public License as published by the Free
00014 Software Foundation; either version 2, or (at your option) any later
00015 version.
00016 
00017 BFD is distributed in the hope that it will be useful, but WITHOUT ANY
00018 WARRANTY; without even the implied warranty of MERCHANTABILITY or
00019 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
00020 for more details.
00021 
00022 You should have received a copy of the GNU General Public License
00023 along with this software; see the file COPYING.  If not, write to
00024 the Free Software Foundation, 59 Temple Place - Suite 330,
00025 Boston, MA 02111-1307, USA. */
00026 
00027 /* FIXME-someday: perhaps the ,a's and such should be embedded in the
00028    instruction's name rather than the args.  This would make gas faster, pinsn
00029    slower, but would mess up some macros a bit.  xoxorich. */
00030 
00031 #include <stdio.h>
00032 #include "sysdep.h"
00033 #include "opcode/sparc.h"
00034 
00035 /* Some defines to make life easy.  */
00036 #define MASK_V6   SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V6)
00037 #define MASK_V7   SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V7)
00038 #define MASK_V8   SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V8)
00039 #define MASK_SPARCLET SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_SPARCLET)
00040 #define MASK_SPARCLITE  SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_SPARCLITE)
00041 #define MASK_V9   SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9)
00042 #define MASK_V9A  SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9A)
00043 #define MASK_V9B  SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9B)
00044 
00045 /* Bit masks of architectures supporting the insn.  */
00046 
00047 #define v6    (MASK_V6 | MASK_V7 | MASK_V8 | MASK_SPARCLET \
00048        | MASK_SPARCLITE | MASK_V9 | MASK_V9A | MASK_V9B)
00049 /* v6 insns not supported on the sparclet */
00050 #define v6notlet  (MASK_V6 | MASK_V7 | MASK_V8 \
00051        | MASK_SPARCLITE | MASK_V9 | MASK_V9A | MASK_V9B)
00052 #define v7    (MASK_V7 | MASK_V8 | MASK_SPARCLET \
00053        | MASK_SPARCLITE | MASK_V9 | MASK_V9A | MASK_V9B)
00054 /* Although not all insns are implemented in hardware, sparclite is defined
00055    to be a superset of v8.  Unimplemented insns trap and are then theoretically
00056    implemented in software.
00057    It's not clear that the same is true for sparclet, although the docs
00058    suggest it is.  Rather than complicating things, the sparclet assembler
00059    recognizes all v8 insns.  */
00060 #define v8    (MASK_V8 | MASK_SPARCLET | MASK_SPARCLITE \
00061        | MASK_V9 | MASK_V9A | MASK_V9B)
00062 #define sparclet  (MASK_SPARCLET)
00063 #define sparclite (MASK_SPARCLITE)
00064 #define v9    (MASK_V9 | MASK_V9A | MASK_V9B)
00065 #define v9a   (MASK_V9A | MASK_V9B)
00066 #define v9b   (MASK_V9B)
00067 /* v6 insns not supported by v9 */
00068 #define v6notv9   (MASK_V6 | MASK_V7 | MASK_V8 \
00069        | MASK_SPARCLET | MASK_SPARCLITE)
00070 /* v9a instructions which would appear to be aliases to v9's impdep's
00071    otherwise */
00072 #define v9notv9a  (MASK_V9)
00073 
00074 /* Table of opcode architectures.
00075    The order is defined in opcode/sparc.h.  */
00076 
00077 const struct sparc_opcode_arch sparc_opcode_archs[] = {
00078   { "v6", MASK_V6 },
00079   { "v7", MASK_V6 | MASK_V7 },
00080   { "v8", MASK_V6 | MASK_V7 | MASK_V8 },
00081   { "sparclet", MASK_V6 | MASK_V7 | MASK_V8 | MASK_SPARCLET },
00082   { "sparclite", MASK_V6 | MASK_V7 | MASK_V8 | MASK_SPARCLITE },
00083   /* ??? Don't some v8 priviledged insns conflict with v9?  */
00084   { "v9", MASK_V6 | MASK_V7 | MASK_V8 | MASK_V9 },
00085   /* v9 with ultrasparc additions */
00086   { "v9a", MASK_V6 | MASK_V7 | MASK_V8 | MASK_V9 | MASK_V9A },
00087   /* v9 with cheetah additions */
00088   { "v9b", MASK_V6 | MASK_V7 | MASK_V8 | MASK_V9 | MASK_V9A | MASK_V9B },
00089   { NULL, 0 }
00090 };
00091 
00092 /* Given NAME, return it's architecture entry.  */
00093 
00094 enum sparc_opcode_arch_val
00095 sparc_opcode_lookup_arch (name)
00096      const char *name;
00097 {
00098   const struct sparc_opcode_arch *p;
00099 
00100   for (p = &sparc_opcode_archs[0]; p->name; ++p)
00101     {
00102       if (strcmp (name, p->name) == 0)
00103   return (enum sparc_opcode_arch_val) (p - &sparc_opcode_archs[0]);
00104     }
00105 
00106   return SPARC_OPCODE_ARCH_BAD;
00107 }
00108 
00109 /* Branch condition field.  */
00110 #define COND(x)   (((x)&0xf)<<25)
00111 
00112 /* v9: Move (MOVcc and FMOVcc) condition field.  */
00113 #define MCOND(x,i_or_f) ((((i_or_f)&1)<<18)|(((x)>>11)&(0xf<<14))) /* v9 */
00114 
00115 /* v9: Move register (MOVRcc and FMOVRcc) condition field.  */
00116 #define RCOND(x)  (((x)&0x7)<<10) /* v9 */
00117 
00118 #define CONDA (COND(0x8))
00119 #define CONDCC  (COND(0xd))
00120 #define CONDCS  (COND(0x5))
00121 #define CONDE (COND(0x1))
00122 #define CONDG (COND(0xa))
00123 #define CONDGE  (COND(0xb))
00124 #define CONDGU  (COND(0xc))
00125 #define CONDL (COND(0x3))
00126 #define CONDLE  (COND(0x2))
00127 #define CONDLEU (COND(0x4))
00128 #define CONDN (COND(0x0))
00129 #define CONDNE  (COND(0x9))
00130 #define CONDNEG (COND(0x6))
00131 #define CONDPOS (COND(0xe))
00132 #define CONDVC  (COND(0xf))
00133 #define CONDVS  (COND(0x7))
00134 
00135 #define CONDNZ  CONDNE
00136 #define CONDZ CONDE
00137 #define CONDGEU CONDCC
00138 #define CONDLU  CONDCS
00139 
00140 #define FCONDA    (COND(0x8))
00141 #define FCONDE    (COND(0x9))
00142 #define FCONDG    (COND(0x6))
00143 #define FCONDGE   (COND(0xb))
00144 #define FCONDL    (COND(0x4))
00145 #define FCONDLE   (COND(0xd))
00146 #define FCONDLG   (COND(0x2))
00147 #define FCONDN    (COND(0x0))
00148 #define FCONDNE   (COND(0x1))
00149 #define FCONDO    (COND(0xf))
00150 #define FCONDU    (COND(0x7))
00151 #define FCONDUE   (COND(0xa))
00152 #define FCONDUG   (COND(0x5))
00153 #define FCONDUGE  (COND(0xc))
00154 #define FCONDUL   (COND(0x3))
00155 #define FCONDULE  (COND(0xe))
00156 
00157 #define FCONDNZ FCONDNE
00158 #define FCONDZ  FCONDE
00159 
00160 #define ICC (0) /* v9 */
00161 #define XCC (1<<12) /* v9 */
00162 #define FCC(x)  (((x)&0x3)<<11) /* v9 */
00163 #define FBFCC(x)  (((x)&0x3)<<20) /* v9 */
00164 
00165 /* The order of the opcodes in the table is significant:
00166   
00167   * The assembler requires that all instances of the same mnemonic must
00168   be consecutive. If they aren't, the assembler will bomb at runtime.
00169 
00170   * The disassembler should not care about the order of the opcodes.
00171 
00172 */
00173 
00174 /* Entries for commutative arithmetic operations.  */
00175 /* ??? More entries can make use of this.  */
00176 #define COMMUTEOP(opcode, op3, arch_mask) \
00177 { opcode, F3(2, op3, 0), F3(~2, ~op3, ~0)|ASI(~0),  "1,2,d", 0, arch_mask }, \
00178 { opcode, F3(2, op3, 1), F3(~2, ~op3, ~1),    "1,i,d", 0, arch_mask }, \
00179 { opcode, F3(2, op3, 1), F3(~2, ~op3, ~1),    "i,1,d", 0, arch_mask }
00180 
00181 const struct sparc_opcode sparc_opcodes[] = {
00182 
00183 { "ld", F3(3, 0x00, 0), F3(~3, ~0x00, ~0),    "[1+2],d", 0, v6 },
00184 { "ld", F3(3, 0x00, 0), F3(~3, ~0x00, ~0)|RS2_G0, "[1],d", 0, v6 }, /* ld [rs1+%g0],d */
00185 { "ld", F3(3, 0x00, 1), F3(~3, ~0x00, ~1),    "[1+i],d", 0, v6 },
00186 { "ld", F3(3, 0x00, 1), F3(~3, ~0x00, ~1),    "[i+1],d", 0, v6 },
00187 { "ld", F3(3, 0x00, 1), F3(~3, ~0x00, ~1)|RS1_G0, "[i],d", 0, v6 },
00188 { "ld", F3(3, 0x00, 1), F3(~3, ~0x00, ~1)|SIMM13(~0), "[1],d", 0, v6 }, /* ld [rs1+0],d */
00189 { "ld", F3(3, 0x20, 0), F3(~3, ~0x20, ~0),    "[1+2],g", 0, v6 },
00190 { "ld", F3(3, 0x20, 0), F3(~3, ~0x20, ~0)|RS2_G0, "[1],g", 0, v6 }, /* ld [rs1+%g0],d */
00191 { "ld", F3(3, 0x20, 1), F3(~3, ~0x20, ~1),    "[1+i],g", 0, v6 },
00192 { "ld", F3(3, 0x20, 1), F3(~3, ~0x20, ~1),    "[i+1],g", 0, v6 },
00193 { "ld", F3(3, 0x20, 1), F3(~3, ~0x20, ~1)|RS1_G0, "[i],g", 0, v6 },
00194 { "ld", F3(3, 0x20, 1), F3(~3, ~0x20, ~1)|SIMM13(~0), "[1],g", 0, v6 }, /* ld [rs1+0],d */
00195 
00196 { "ld", F3(3, 0x21, 0), F3(~3, ~0x21, ~0)|RD(~0), "[1+2],F", 0, v6 },
00197 { "ld", F3(3, 0x21, 0), F3(~3, ~0x21, ~0)|RS2_G0|RD(~0),"[1],F", 0, v6 }, /* ld [rs1+%g0],d */
00198 { "ld", F3(3, 0x21, 1), F3(~3, ~0x21, ~1)|RD(~0), "[1+i],F", 0, v6 },
00199 { "ld", F3(3, 0x21, 1), F3(~3, ~0x21, ~1)|RD(~0), "[i+1],F", 0, v6 },
00200 { "ld", F3(3, 0x21, 1), F3(~3, ~0x21, ~1)|RS1_G0|RD(~0),"[i],F", 0, v6 },
00201 { "ld", F3(3, 0x21, 1), F3(~3, ~0x21, ~1)|SIMM13(~0)|RD(~0),"[1],F", 0, v6 }, /* ld [rs1+0],d */
00202 
00203 { "ld", F3(3, 0x30, 0), F3(~3, ~0x30, ~0),    "[1+2],D", 0, v6notv9 },
00204 { "ld", F3(3, 0x30, 0), F3(~3, ~0x30, ~0)|RS2_G0, "[1],D", 0, v6notv9 }, /* ld [rs1+%g0],d */
00205 { "ld", F3(3, 0x30, 1), F3(~3, ~0x30, ~1),    "[1+i],D", 0, v6notv9 },
00206 { "ld", F3(3, 0x30, 1), F3(~3, ~0x30, ~1),    "[i+1],D", 0, v6notv9 },
00207 { "ld", F3(3, 0x30, 1), F3(~3, ~0x30, ~1)|RS1_G0, "[i],D", 0, v6notv9 },
00208 { "ld", F3(3, 0x30, 1), F3(~3, ~0x30, ~1)|SIMM13(~0), "[1],D", 0, v6notv9 }, /* ld [rs1+0],d */
00209 { "ld", F3(3, 0x31, 0), F3(~3, ~0x31, ~0),    "[1+2],C", 0, v6notv9 },
00210 { "ld", F3(3, 0x31, 0), F3(~3, ~0x31, ~0)|RS2_G0, "[1],C", 0, v6notv9 }, /* ld [rs1+%g0],d */
00211 { "ld", F3(3, 0x31, 1), F3(~3, ~0x31, ~1),    "[1+i],C", 0, v6notv9 },
00212 { "ld", F3(3, 0x31, 1), F3(~3, ~0x31, ~1),    "[i+1],C", 0, v6notv9 },
00213 { "ld", F3(3, 0x31, 1), F3(~3, ~0x31, ~1)|RS1_G0, "[i],C", 0, v6notv9 },
00214 { "ld", F3(3, 0x31, 1), F3(~3, ~0x31, ~1)|SIMM13(~0), "[1],C", 0, v6notv9 }, /* ld [rs1+0],d */
00215 
00216 /* The v9 LDUW is the same as the old 'ld' opcode, it is not the same as the
00217    'ld' pseudo-op in v9.  */
00218 { "lduw", F3(3, 0x00, 0), F3(~3, ~0x00, ~0),    "[1+2],d", F_ALIAS, v9 },
00219 { "lduw", F3(3, 0x00, 0), F3(~3, ~0x00, ~0)|RS2_G0, "[1],d", F_ALIAS, v9 }, /* ld [rs1+%g0],d */
00220 { "lduw", F3(3, 0x00, 1), F3(~3, ~0x00, ~1),    "[1+i],d", F_ALIAS, v9 },
00221 { "lduw", F3(3, 0x00, 1), F3(~3, ~0x00, ~1),    "[i+1],d", F_ALIAS, v9 },
00222 { "lduw", F3(3, 0x00, 1), F3(~3, ~0x00, ~1)|RS1_G0, "[i],d", F_ALIAS, v9 },
00223 { "lduw", F3(3, 0x00, 1), F3(~3, ~0x00, ~1)|SIMM13(~0), "[1],d", F_ALIAS, v9 }, /* ld [rs1+0],d */
00224 
00225 { "ldd",  F3(3, 0x03, 0), F3(~3, ~0x03, ~0)|ASI(~0),  "[1+2],d", 0, v6 },
00226 { "ldd",  F3(3, 0x03, 0), F3(~3, ~0x03, ~0)|ASI_RS2(~0),  "[1],d", 0, v6 }, /* ldd [rs1+%g0],d */
00227 { "ldd",  F3(3, 0x03, 1), F3(~3, ~0x03, ~1),    "[1+i],d", 0, v6 },
00228 { "ldd",  F3(3, 0x03, 1), F3(~3, ~0x03, ~1),    "[i+1],d", 0, v6 },
00229 { "ldd",  F3(3, 0x03, 1), F3(~3, ~0x03, ~1)|RS1_G0, "[i],d", 0, v6 },
00230 { "ldd",  F3(3, 0x03, 1), F3(~3, ~0x03, ~1)|SIMM13(~0), "[1],d", 0, v6 }, /* ldd [rs1+0],d */
00231 { "ldd",  F3(3, 0x23, 0), F3(~3, ~0x23, ~0)|ASI(~0),  "[1+2],H", 0, v6 },
00232 { "ldd",  F3(3, 0x23, 0), F3(~3, ~0x23, ~0)|ASI_RS2(~0),  "[1],H", 0, v6 }, /* ldd [rs1+%g0],d */
00233 { "ldd",  F3(3, 0x23, 1), F3(~3, ~0x23, ~1),    "[1+i],H", 0, v6 },
00234 { "ldd",  F3(3, 0x23, 1), F3(~3, ~0x23, ~1),    "[i+1],H", 0, v6 },
00235 { "ldd",  F3(3, 0x23, 1), F3(~3, ~0x23, ~1)|RS1_G0, "[i],H", 0, v6 },
00236 { "ldd",  F3(3, 0x23, 1), F3(~3, ~0x23, ~1)|SIMM13(~0), "[1],H", 0, v6 }, /* ldd [rs1+0],d */
00237 
00238 { "ldd",  F3(3, 0x33, 0), F3(~3, ~0x33, ~0)|ASI(~0),  "[1+2],D", 0, v6notv9 },
00239 { "ldd",  F3(3, 0x33, 0), F3(~3, ~0x33, ~0)|ASI_RS2(~0),  "[1],D", 0, v6notv9 }, /* ldd [rs1+%g0],d */
00240 { "ldd",  F3(3, 0x33, 1), F3(~3, ~0x33, ~1),    "[1+i],D", 0, v6notv9 },
00241 { "ldd",  F3(3, 0x33, 1), F3(~3, ~0x33, ~1),    "[i+1],D", 0, v6notv9 },
00242 { "ldd",  F3(3, 0x33, 1), F3(~3, ~0x33, ~1)|RS1_G0, "[i],D", 0, v6notv9 },
00243 { "ldd",  F3(3, 0x33, 1), F3(~3, ~0x33, ~1)|SIMM13(~0), "[1],D", 0, v6notv9 }, /* ldd [rs1+0],d */
00244 
00245 { "ldq",  F3(3, 0x22, 0), F3(~3, ~0x22, ~0)|ASI(~0),  "[1+2],J", 0, v9 },
00246 { "ldq",  F3(3, 0x22, 0), F3(~3, ~0x22, ~0)|ASI_RS2(~0),  "[1],J", 0, v9 }, /* ldd [rs1+%g0],d */
00247 { "ldq",  F3(3, 0x22, 1), F3(~3, ~0x22, ~1),    "[1+i],J", 0, v9 },
00248 { "ldq",  F3(3, 0x22, 1), F3(~3, ~0x22, ~1),    "[i+1],J", 0, v9 },
00249 { "ldq",  F3(3, 0x22, 1), F3(~3, ~0x22, ~1)|RS1_G0, "[i],J", 0, v9 },
00250 { "ldq",  F3(3, 0x22, 1), F3(~3, ~0x22, ~1)|SIMM13(~0), "[1],J", 0, v9 }, /* ldd [rs1+0],d */
00251 
00252 { "ldsb", F3(3, 0x09, 0), F3(~3, ~0x09, ~0)|ASI(~0),  "[1+2],d", 0, v6 },
00253 { "ldsb", F3(3, 0x09, 0), F3(~3, ~0x09, ~0)|ASI_RS2(~0),  "[1],d", 0, v6 }, /* ldsb [rs1+%g0],d */
00254 { "ldsb", F3(3, 0x09, 1), F3(~3, ~0x09, ~1),    "[1+i],d", 0, v6 },
00255 { "ldsb", F3(3, 0x09, 1), F3(~3, ~0x09, ~1),    "[i+1],d", 0, v6 },
00256 { "ldsb", F3(3, 0x09, 1), F3(~3, ~0x09, ~1)|RS1_G0, "[i],d", 0, v6 },
00257 { "ldsb", F3(3, 0x09, 1), F3(~3, ~0x09, ~1)|SIMM13(~0), "[1],d", 0, v6 }, /* ldsb [rs1+0],d */
00258 
00259 { "ldsh", F3(3, 0x0a, 0), F3(~3, ~0x0a, ~0)|ASI_RS2(~0),  "[1],d", 0, v6 }, /* ldsh [rs1+%g0],d */
00260 { "ldsh", F3(3, 0x0a, 0), F3(~3, ~0x0a, ~0)|ASI(~0),  "[1+2],d", 0, v6 },
00261 { "ldsh", F3(3, 0x0a, 1), F3(~3, ~0x0a, ~1),    "[1+i],d", 0, v6 },
00262 { "ldsh", F3(3, 0x0a, 1), F3(~3, ~0x0a, ~1),    "[i+1],d", 0, v6 },
00263 { "ldsh", F3(3, 0x0a, 1), F3(~3, ~0x0a, ~1)|RS1_G0, "[i],d", 0, v6 },
00264 { "ldsh", F3(3, 0x0a, 1), F3(~3, ~0x0a, ~1)|SIMM13(~0), "[1],d", 0, v6 }, /* ldsh [rs1+0],d */
00265 
00266 { "ldstub", F3(3, 0x0d, 0), F3(~3, ~0x0d, ~0)|ASI(~0),  "[1+2],d", 0, v6 },
00267 { "ldstub", F3(3, 0x0d, 0), F3(~3, ~0x0d, ~0)|ASI_RS2(~0),  "[1],d", 0, v6 }, /* ldstub [rs1+%g0],d */
00268 { "ldstub", F3(3, 0x0d, 1), F3(~3, ~0x0d, ~1),    "[1+i],d", 0, v6 },
00269 { "ldstub", F3(3, 0x0d, 1), F3(~3, ~0x0d, ~1),    "[i+1],d", 0, v6 },
00270 { "ldstub", F3(3, 0x0d, 1), F3(~3, ~0x0d, ~1)|RS1_G0, "[i],d", 0, v6 },
00271 { "ldstub", F3(3, 0x0d, 1), F3(~3, ~0x0d, ~1)|SIMM13(~0), "[1],d", 0, v6 }, /* ldstub [rs1+0],d */
00272 
00273 { "ldsw", F3(3, 0x08, 0), F3(~3, ~0x08, ~0)|ASI(~0),  "[1+2],d", 0, v9 },
00274 { "ldsw", F3(3, 0x08, 0), F3(~3, ~0x08, ~0)|ASI_RS2(~0),  "[1],d", 0, v9 }, /* ldsw [rs1+%g0],d */
00275 { "ldsw", F3(3, 0x08, 1), F3(~3, ~0x08, ~1),    "[1+i],d", 0, v9 },
00276 { "ldsw", F3(3, 0x08, 1), F3(~3, ~0x08, ~1),    "[i+1],d", 0, v9 },
00277 { "ldsw", F3(3, 0x08, 1), F3(~3, ~0x08, ~1)|RS1_G0, "[i],d", 0, v9 },
00278 { "ldsw", F3(3, 0x08, 1), F3(~3, ~0x08, ~1)|SIMM13(~0), "[1],d", 0, v9 }, /* ldsw [rs1+0],d */
00279 
00280 { "ldub", F3(3, 0x01, 0), F3(~3, ~0x01, ~0)|ASI(~0),  "[1+2],d", 0, v6 },
00281 { "ldub", F3(3, 0x01, 0), F3(~3, ~0x01, ~0)|ASI_RS2(~0),  "[1],d", 0, v6 }, /* ldub [rs1+%g0],d */
00282 { "ldub", F3(3, 0x01, 1), F3(~3, ~0x01, ~1),    "[1+i],d", 0, v6 },
00283 { "ldub", F3(3, 0x01, 1), F3(~3, ~0x01, ~1),    "[i+1],d", 0, v6 },
00284 { "ldub", F3(3, 0x01, 1), F3(~3, ~0x01, ~1)|RS1_G0, "[i],d", 0, v6 },
00285 { "ldub", F3(3, 0x01, 1), F3(~3, ~0x01, ~1)|SIMM13(~0), "[1],d", 0, v6 }, /* ldub [rs1+0],d */
00286 
00287 { "lduh", F3(3, 0x02, 0), F3(~3, ~0x02, ~0)|ASI(~0),  "[1+2],d", 0, v6 },
00288 { "lduh", F3(3, 0x02, 0), F3(~3, ~0x02, ~0)|ASI_RS2(~0),  "[1],d", 0, v6 }, /* lduh [rs1+%g0],d */
00289 { "lduh", F3(3, 0x02, 1), F3(~3, ~0x02, ~1),    "[1+i],d", 0, v6 },
00290 { "lduh", F3(3, 0x02, 1), F3(~3, ~0x02, ~1),    "[i+1],d", 0, v6 },
00291 { "lduh", F3(3, 0x02, 1), F3(~3, ~0x02, ~1)|RS1_G0, "[i],d", 0, v6 },
00292 { "lduh", F3(3, 0x02, 1), F3(~3, ~0x02, ~1)|SIMM13(~0), "[1],d", 0, v6 }, /* lduh [rs1+0],d */
00293 
00294 { "ldx",  F3(3, 0x0b, 0), F3(~3, ~0x0b, ~0)|ASI(~0),  "[1+2],d", 0, v9 },
00295 { "ldx",  F3(3, 0x0b, 0), F3(~3, ~0x0b, ~0)|ASI_RS2(~0),  "[1],d", 0, v9 }, /* ldx [rs1+%g0],d */
00296 { "ldx",  F3(3, 0x0b, 1), F3(~3, ~0x0b, ~1),    "[1+i],d", 0, v9 },
00297 { "ldx",  F3(3, 0x0b, 1), F3(~3, ~0x0b, ~1),    "[i+1],d", 0, v9 },
00298 { "ldx",  F3(3, 0x0b, 1), F3(~3, ~0x0b, ~1)|RS1_G0, "[i],d", 0, v9 },
00299 { "ldx",  F3(3, 0x0b, 1), F3(~3, ~0x0b, ~1)|SIMM13(~0), "[1],d", 0, v9 }, /* ldx [rs1+0],d */
00300 
00301 { "ldx",  F3(3, 0x21, 0)|RD(1), F3(~3, ~0x21, ~0)|RD(~1), "[1+2],F", 0, v9 },
00302 { "ldx",  F3(3, 0x21, 0)|RD(1), F3(~3, ~0x21, ~0)|RS2_G0|RD(~1),  "[1],F", 0, v9 }, /* ld [rs1+%g0],d */
00303 { "ldx",  F3(3, 0x21, 1)|RD(1), F3(~3, ~0x21, ~1)|RD(~1), "[1+i],F", 0, v9 },
00304 { "ldx",  F3(3, 0x21, 1)|RD(1), F3(~3, ~0x21, ~1)|RD(~1), "[i+1],F", 0, v9 },
00305 { "ldx",  F3(3, 0x21, 1)|RD(1), F3(~3, ~0x21, ~1)|RS1_G0|RD(~1),  "[i],F", 0, v9 },
00306 { "ldx",  F3(3, 0x21, 1)|RD(1), F3(~3, ~0x21, ~1)|SIMM13(~0)|RD(~1),"[1],F", 0, v9 }, /* ld [rs1+0],d */
00307 
00308 { "lda",  F3(3, 0x10, 0), F3(~3, ~0x10, ~0),    "[1+2]A,d", 0, v6 },
00309 { "lda",  F3(3, 0x10, 0), F3(~3, ~0x10, ~0)|RS2_G0, "[1]A,d", 0, v6 }, /* lda [rs1+%g0],d */
00310 { "lda",  F3(3, 0x10, 1), F3(~3, ~0x10, ~1),    "[1+i]o,d", 0, v9 },
00311 { "lda",  F3(3, 0x10, 1), F3(~3, ~0x10, ~1),    "[i+1]o,d", 0, v9 },
00312 { "lda",  F3(3, 0x10, 1), F3(~3, ~0x10, ~1)|RS1_G0, "[i]o,d", 0, v9 },
00313 { "lda",  F3(3, 0x10, 1), F3(~3, ~0x10, ~1)|SIMM13(~0), "[1]o,d", 0, v9 }, /* ld [rs1+0],d */
00314 { "lda",  F3(3, 0x30, 0), F3(~3, ~0x30, ~0),    "[1+2]A,g", 0, v9 },
00315 { "lda",  F3(3, 0x30, 0), F3(~3, ~0x30, ~0)|RS2_G0, "[1]A,g", 0, v9 }, /* lda [rs1+%g0],d */
00316 { "lda",  F3(3, 0x30, 1), F3(~3, ~0x30, ~1),    "[1+i]o,g", 0, v9 },
00317 { "lda",  F3(3, 0x30, 1), F3(~3, ~0x30, ~1),    "[i+1]o,g", 0, v9 },
00318 { "lda",  F3(3, 0x30, 1), F3(~3, ~0x30, ~1)|RS1_G0, "[i]o,g", 0, v9 },
00319 { "lda",  F3(3, 0x30, 1), F3(~3, ~0x30, ~1)|SIMM13(~0), "[1]o,g", 0, v9 }, /* ld [rs1+0],d */
00320 
00321 { "ldda", F3(3, 0x13, 0), F3(~3, ~0x13, ~0),    "[1+2]A,d", 0, v6 },
00322 { "ldda", F3(3, 0x13, 0), F3(~3, ~0x13, ~0)|RS2_G0, "[1]A,d", 0, v6 }, /* ldda [rs1+%g0],d */
00323 { "ldda", F3(3, 0x13, 1), F3(~3, ~0x13, ~1),    "[1+i]o,d", 0, v9 },
00324 { "ldda", F3(3, 0x13, 1), F3(~3, ~0x13, ~1),    "[i+1]o,d", 0, v9 },
00325 { "ldda", F3(3, 0x13, 1), F3(~3, ~0x13, ~1)|RS1_G0, "[i]o,d", 0, v9 },
00326 { "ldda", F3(3, 0x13, 1), F3(~3, ~0x13, ~1)|SIMM13(~0), "[1]o,d", 0, v9 }, /* ld [rs1+0],d */
00327 
00328 { "ldda", F3(3, 0x33, 0), F3(~3, ~0x33, ~0),    "[1+2]A,H", 0, v9 },
00329 { "ldda", F3(3, 0x33, 0), F3(~3, ~0x33, ~0)|RS2_G0, "[1]A,H", 0, v9 }, /* ldda [rs1+%g0],d */
00330 { "ldda", F3(3, 0x33, 1), F3(~3, ~0x33, ~1),    "[1+i]o,H", 0, v9 },
00331 { "ldda", F3(3, 0x33, 1), F3(~3, ~0x33, ~1),    "[i+1]o,H", 0, v9 },
00332 { "ldda", F3(3, 0x33, 1), F3(~3, ~0x33, ~1)|RS1_G0, "[i]o,H", 0, v9 },
00333 { "ldda", F3(3, 0x33, 1), F3(~3, ~0x33, ~1)|SIMM13(~0), "[1]o,H", 0, v9 }, /* ld [rs1+0],d */
00334 
00335 { "ldqa", F3(3, 0x32, 0), F3(~3, ~0x32, ~0),    "[1+2]A,J", 0, v9 },
00336 { "ldqa", F3(3, 0x32, 0), F3(~3, ~0x32, ~0)|RS2_G0, "[1]A,J", 0, v9 }, /* ldd [rs1+%g0],d */
00337 { "ldqa", F3(3, 0x32, 1), F3(~3, ~0x32, ~1),    "[1+i]o,J", 0, v9 },
00338 { "ldqa", F3(3, 0x32, 1), F3(~3, ~0x32, ~1),    "[i+1]o,J", 0, v9 },
00339 { "ldqa", F3(3, 0x32, 1), F3(~3, ~0x32, ~1)|RS1_G0, "[i]o,J", 0, v9 },
00340 { "ldqa", F3(3, 0x32, 1), F3(~3, ~0x32, ~1)|SIMM13(~0), "[1]o,J", 0, v9 }, /* ldd [rs1+0],d */
00341 
00342 { "ldsba",  F3(3, 0x19, 0), F3(~3, ~0x19, ~0),    "[1+2]A,d", 0, v6 },
00343 { "ldsba",  F3(3, 0x19, 0), F3(~3, ~0x19, ~0)|RS2_G0, "[1]A,d", 0, v6 }, /* ldsba [rs1+%g0],d */
00344 { "ldsba",  F3(3, 0x19, 1), F3(~3, ~0x19, ~1),    "[1+i]o,d", 0, v9 },
00345 { "ldsba",  F3(3, 0x19, 1), F3(~3, ~0x19, ~1),    "[i+1]o,d", 0, v9 },
00346 { "ldsba",  F3(3, 0x19, 1), F3(~3, ~0x19, ~1)|RS1_G0, "[i]o,d", 0, v9 },
00347 { "ldsba",  F3(3, 0x19, 1), F3(~3, ~0x19, ~1)|SIMM13(~0), "[1]o,d", 0, v9 }, /* ld [rs1+0],d */
00348 
00349 { "ldsha",  F3(3, 0x1a, 0), F3(~3, ~0x1a, ~0),    "[1+2]A,d", 0, v6 },
00350 { "ldsha",  F3(3, 0x1a, 0), F3(~3, ~0x1a, ~0)|RS2_G0, "[1]A,d", 0, v6 }, /* ldsha [rs1+%g0],d */
00351 { "ldsha",  F3(3, 0x1a, 1), F3(~3, ~0x1a, ~1),    "[1+i]o,d", 0, v9 },
00352 { "ldsha",  F3(3, 0x1a, 1), F3(~3, ~0x1a, ~1),    "[i+1]o,d", 0, v9 },
00353 { "ldsha",  F3(3, 0x1a, 1), F3(~3, ~0x1a, ~1)|RS1_G0, "[i]o,d", 0, v9 },
00354 { "ldsha",  F3(3, 0x1a, 1), F3(~3, ~0x1a, ~1)|SIMM13(~0), "[1]o,d", 0, v9 }, /* ld [rs1+0],d */
00355 
00356 { "ldstuba",  F3(3, 0x1d, 0), F3(~3, ~0x1d, ~0),    "[1+2]A,d", 0, v6 },
00357 { "ldstuba",  F3(3, 0x1d, 0), F3(~3, ~0x1d, ~0)|RS2_G0, "[1]A,d", 0, v6 }, /* ldstuba [rs1+%g0],d */
00358 { "ldstuba",  F3(3, 0x1d, 1), F3(~3, ~0x1d, ~1),    "[1+i]o,d", 0, v9 },
00359 { "ldstuba",  F3(3, 0x1d, 1), F3(~3, ~0x1d, ~1),    "[i+1]o,d", 0, v9 },
00360 { "ldstuba",  F3(3, 0x1d, 1), F3(~3, ~0x1d, ~1)|RS1_G0, "[i]o,d", 0, v9 },
00361 { "ldstuba",  F3(3, 0x1d, 1), F3(~3, ~0x1d, ~1)|SIMM13(~0), "[1]o,d", 0, v9 }, /* ld [rs1+0],d */
00362 
00363 { "ldswa",  F3(3, 0x18, 0), F3(~3, ~0x18, ~0),    "[1+2]A,d", 0, v9 },
00364 { "ldswa",  F3(3, 0x18, 0), F3(~3, ~0x18, ~0)|RS2_G0, "[1]A,d", 0, v9 }, /* lda [rs1+%g0],d */
00365 { "ldswa",  F3(3, 0x18, 1), F3(~3, ~0x18, ~1),    "[1+i]o,d", 0, v9 },
00366 { "ldswa",  F3(3, 0x18, 1), F3(~3, ~0x18, ~1),    "[i+1]o,d", 0, v9 },
00367 { "ldswa",  F3(3, 0x18, 1), F3(~3, ~0x18, ~1)|RS1_G0, "[i]o,d", 0, v9 },
00368 { "ldswa",  F3(3, 0x18, 1), F3(~3, ~0x18, ~1)|SIMM13(~0), "[1]o,d", 0, v9 }, /* ld [rs1+0],d */
00369 
00370 { "lduba",  F3(3, 0x11, 0), F3(~3, ~0x11, ~0),    "[1+2]A,d", 0, v6 },
00371 { "lduba",  F3(3, 0x11, 0), F3(~3, ~0x11, ~0)|RS2_G0, "[1]A,d", 0, v6 }, /* lduba [rs1+%g0],d */
00372 { "lduba",  F3(3, 0x11, 1), F3(~3, ~0x11, ~1),    "[1+i]o,d", 0, v9 },
00373 { "lduba",  F3(3, 0x11, 1), F3(~3, ~0x11, ~1),    "[i+1]o,d", 0, v9 },
00374 { "lduba",  F3(3, 0x11, 1), F3(~3, ~0x11, ~1)|RS1_G0, "[i]o,d", 0, v9 },
00375 { "lduba",  F3(3, 0x11, 1), F3(~3, ~0x11, ~1)|SIMM13(~0), "[1]o,d", 0, v9 }, /* ld [rs1+0],d */
00376 
00377 { "lduha",  F3(3, 0x12, 0), F3(~3, ~0x12, ~0),    "[1+2]A,d", 0, v6 },
00378 { "lduha",  F3(3, 0x12, 0), F3(~3, ~0x12, ~0)|RS2_G0, "[1]A,d", 0, v6 }, /* lduha [rs1+%g0],d */
00379 { "lduha",  F3(3, 0x12, 1), F3(~3, ~0x12, ~1),    "[1+i]o,d", 0, v9 },
00380 { "lduha",  F3(3, 0x12, 1), F3(~3, ~0x12, ~1),    "[i+1]o,d", 0, v9 },
00381 { "lduha",  F3(3, 0x12, 1), F3(~3, ~0x12, ~1)|RS1_G0, "[i]o,d", 0, v9 },
00382 { "lduha",  F3(3, 0x12, 1), F3(~3, ~0x12, ~1)|SIMM13(~0), "[1]o,d", 0, v9 }, /* ld [rs1+0],d */
00383 
00384 { "lduwa",  F3(3, 0x10, 0), F3(~3, ~0x10, ~0),    "[1+2]A,d", F_ALIAS, v9 }, /* lduwa === lda */
00385 { "lduwa",  F3(3, 0x10, 0), F3(~3, ~0x10, ~0)|RS2_G0, "[1]A,d", F_ALIAS, v9 }, /* lda [rs1+%g0],d */
00386 { "lduwa",  F3(3, 0x10, 1), F3(~3, ~0x10, ~1),    "[1+i]o,d", F_ALIAS, v9 },
00387 { "lduwa",  F3(3, 0x10, 1), F3(~3, ~0x10, ~1),    "[i+1]o,d", F_ALIAS, v9 },
00388 { "lduwa",  F3(3, 0x10, 1), F3(~3, ~0x10, ~1)|RS1_G0, "[i]o,d", F_ALIAS, v9 },
00389 { "lduwa",  F3(3, 0x10, 1), F3(~3, ~0x10, ~1)|SIMM13(~0), "[1]o,d", F_ALIAS, v9 }, /* ld [rs1+0],d */
00390 
00391 { "ldxa", F3(3, 0x1b, 0), F3(~3, ~0x1b, ~0),    "[1+2]A,d", 0, v9 },
00392 { "ldxa", F3(3, 0x1b, 0), F3(~3, ~0x1b, ~0)|RS2_G0, "[1]A,d", 0, v9 }, /* lda [rs1+%g0],d */
00393 { "ldxa", F3(3, 0x1b, 1), F3(~3, ~0x1b, ~1),    "[1+i]o,d", 0, v9 },
00394 { "ldxa", F3(3, 0x1b, 1), F3(~3, ~0x1b, ~1),    "[i+1]o,d", 0, v9 },
00395 { "ldxa", F3(3, 0x1b, 1), F3(~3, ~0x1b, ~1)|RS1_G0, "[i]o,d", 0, v9 },
00396 { "ldxa", F3(3, 0x1b, 1), F3(~3, ~0x1b, ~1)|SIMM13(~0), "[1]o,d", 0, v9 }, /* ld [rs1+0],d */
00397 
00398 { "st", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI(~0),    "d,[1+2]", 0, v6 },
00399 { "st", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI_RS2(~0),    "d,[1]", 0, v6 }, /* st d,[rs1+%g0] */
00400 { "st", F3(3, 0x04, 1), F3(~3, ~0x04, ~1),      "d,[1+i]", 0, v6 },
00401 { "st", F3(3, 0x04, 1), F3(~3, ~0x04, ~1),      "d,[i+1]", 0, v6 },
00402 { "st", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RS1_G0,   "d,[i]", 0, v6 },
00403 { "st", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|SIMM13(~0),   "d,[1]", 0, v6 }, /* st d,[rs1+0] */
00404 { "st", F3(3, 0x24, 0), F3(~3, ~0x24, ~0)|ASI(~0),    "g,[1+2]", 0, v6 },
00405 { "st", F3(3, 0x24, 0), F3(~3, ~0x24, ~0)|ASI_RS2(~0),    "g,[1]", 0, v6 }, /* st d[rs1+%g0] */
00406 { "st", F3(3, 0x24, 1), F3(~3, ~0x24, ~1),      "g,[1+i]", 0, v6 },
00407 { "st", F3(3, 0x24, 1), F3(~3, ~0x24, ~1),      "g,[i+1]", 0, v6 },
00408 { "st", F3(3, 0x24, 1), F3(~3, ~0x24, ~1)|RS1_G0,   "g,[i]", 0, v6 },
00409 { "st", F3(3, 0x24, 1), F3(~3, ~0x24, ~1)|SIMM13(~0),   "g,[1]", 0, v6 }, /* st d,[rs1+0] */
00410 
00411 { "st", F3(3, 0x34, 0), F3(~3, ~0x34, ~0)|ASI(~0),    "D,[1+2]", 0, v6notv9 },
00412 { "st", F3(3, 0x34, 0), F3(~3, ~0x34, ~0)|ASI_RS2(~0),    "D,[1]", 0, v6notv9 }, /* st d,[rs1+%g0] */
00413 { "st", F3(3, 0x34, 1), F3(~3, ~0x34, ~1),      "D,[1+i]", 0, v6notv9 },
00414 { "st", F3(3, 0x34, 1), F3(~3, ~0x34, ~1),      "D,[i+1]", 0, v6notv9 },
00415 { "st", F3(3, 0x34, 1), F3(~3, ~0x34, ~1)|RS1_G0,   "D,[i]", 0, v6notv9 },
00416 { "st", F3(3, 0x34, 1), F3(~3, ~0x34, ~1)|SIMM13(~0),   "D,[1]", 0, v6notv9 }, /* st d,[rs1+0] */
00417 { "st", F3(3, 0x35, 0), F3(~3, ~0x35, ~0)|ASI(~0),    "C,[1+2]", 0, v6notv9 },
00418 { "st", F3(3, 0x35, 0), F3(~3, ~0x35, ~0)|ASI_RS2(~0),    "C,[1]", 0, v6notv9 }, /* st d,[rs1+%g0] */
00419 { "st", F3(3, 0x35, 1), F3(~3, ~0x35, ~1),      "C,[1+i]", 0, v6notv9 },
00420 { "st", F3(3, 0x35, 1), F3(~3, ~0x35, ~1),      "C,[i+1]", 0, v6notv9 },
00421 { "st", F3(3, 0x35, 1), F3(~3, ~0x35, ~1)|RS1_G0,   "C,[i]", 0, v6notv9 },
00422 { "st", F3(3, 0x35, 1), F3(~3, ~0x35, ~1)|SIMM13(~0),   "C,[1]", 0, v6notv9 }, /* st d,[rs1+0] */
00423 
00424 { "st", F3(3, 0x25, 0), F3(~3, ~0x25, ~0)|RD_G0|ASI(~0),  "F,[1+2]", 0, v6 },
00425 { "st", F3(3, 0x25, 0), F3(~3, ~0x25, ~0)|RD_G0|ASI_RS2(~0),  "F,[1]", 0, v6 }, /* st d,[rs1+%g0] */
00426 { "st", F3(3, 0x25, 1), F3(~3, ~0x25, ~1)|RD_G0,    "F,[1+i]", 0, v6 },
00427 { "st", F3(3, 0x25, 1), F3(~3, ~0x25, ~1)|RD_G0,    "F,[i+1]", 0, v6 },
00428 { "st", F3(3, 0x25, 1), F3(~3, ~0x25, ~1)|RD_G0|RS1_G0,   "F,[i]", 0, v6 },
00429 { "st", F3(3, 0x25, 1), F3(~3, ~0x25, ~1)|RD_G0|SIMM13(~0), "F,[1]", 0, v6 }, /* st d,[rs1+0] */
00430 
00431 { "stw",  F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI(~0),  "d,[1+2]", F_ALIAS, v9 },
00432 { "stw",  F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI_RS2(~0),  "d,[1]", F_ALIAS, v9 }, /* st d,[rs1+%g0] */
00433 { "stw",  F3(3, 0x04, 1), F3(~3, ~0x04, ~1),    "d,[1+i]", F_ALIAS, v9 },
00434 { "stw",  F3(3, 0x04, 1), F3(~3, ~0x04, ~1),    "d,[i+1]", F_ALIAS, v9 },
00435 { "stw",  F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RS1_G0, "d,[i]", F_ALIAS, v9 },
00436 { "stw",  F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|SIMM13(~0), "d,[1]", F_ALIAS, v9 }, /* st d,[rs1+0] */
00437 { "stsw", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI(~0),  "d,[1+2]", F_ALIAS, v9 },
00438 { "stsw", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI_RS2(~0),  "d,[1]", F_ALIAS, v9 }, /* st d,[rs1+%g0] */
00439 { "stsw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1),    "d,[1+i]", F_ALIAS, v9 },
00440 { "stsw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1),    "d,[i+1]", F_ALIAS, v9 },
00441 { "stsw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RS1_G0, "d,[i]", F_ALIAS, v9 },
00442 { "stsw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|SIMM13(~0), "d,[1]", F_ALIAS, v9 }, /* st d,[rs1+0] */
00443 { "stuw", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI(~0),  "d,[1+2]", F_ALIAS, v9 },
00444 { "stuw", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI_RS2(~0),  "d,[1]", F_ALIAS, v9 }, /* st d,[rs1+%g0] */
00445 { "stuw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1),    "d,[1+i]", F_ALIAS, v9 },
00446 { "stuw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1),    "d,[i+1]", F_ALIAS, v9 },
00447 { "stuw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RS1_G0, "d,[i]", F_ALIAS, v9 },
00448 { "stuw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|SIMM13(~0), "d,[1]", F_ALIAS, v9 }, /* st d,[rs1+0] */
00449 
00450 { "spill",  F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI(~0),  "d,[1+2]", F_ALIAS, v6 },
00451 { "spill",  F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI_RS2(~0),  "d,[1]", F_ALIAS, v6 }, /* st d,[rs1+%g0] */
00452 { "spill",  F3(3, 0x04, 1), F3(~3, ~0x04, ~1),    "d,[1+i]", F_ALIAS, v6 },
00453 { "spill",  F3(3, 0x04, 1), F3(~3, ~0x04, ~1),    "d,[i+1]", F_ALIAS, v6 },
00454 { "spill",  F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RS1_G0, "d,[i]", F_ALIAS, v6 },
00455 { "spill",  F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|SIMM13(~0), "d,[1]", F_ALIAS, v6 }, /* st d,[rs1+0] */
00456 
00457 { "sta",  F3(3, 0x14, 0), F3(~3, ~0x14, ~0),    "d,[1+2]A", 0, v6 },
00458 { "sta",  F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0),  "d,[1]A", 0, v6 }, /* sta d,[rs1+%g0] */
00459 { "sta",  F3(3, 0x14, 1), F3(~3, ~0x14, ~1),    "d,[1+i]o", 0, v9 },
00460 { "sta",  F3(3, 0x14, 1), F3(~3, ~0x14, ~1),    "d,[i+1]o", 0, v9 },
00461 { "sta",  F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|RS1_G0, "d,[i]o", 0, v9 },
00462 { "sta",  F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|SIMM13(~0), "d,[1]o", 0, v9 }, /* st d,[rs1+0] */
00463 
00464 { "sta",  F3(3, 0x34, 0), F3(~3, ~0x34, ~0),    "g,[1+2]A", 0, v9 },
00465 { "sta",  F3(3, 0x34, 0), F3(~3, ~0x34, ~0)|RS2(~0),  "g,[1]A", 0, v9 }, /* sta d,[rs1+%g0] */
00466 { "sta",  F3(3, 0x34, 1), F3(~3, ~0x34, ~1),    "g,[1+i]o", 0, v9 },
00467 { "sta",  F3(3, 0x34, 1), F3(~3, ~0x34, ~1),    "g,[i+1]o", 0, v9 },
00468 { "sta",  F3(3, 0x34, 1), F3(~3, ~0x34, ~1)|RS1_G0, "g,[i]o", 0, v9 },
00469 { "sta",  F3(3, 0x34, 1), F3(~3, ~0x34, ~1)|SIMM13(~0), "g,[1]o", 0, v9 }, /* st d,[rs1+0] */
00470 
00471 { "stwa", F3(3, 0x14, 0), F3(~3, ~0x14, ~0),    "d,[1+2]A", F_ALIAS, v9 },
00472 { "stwa", F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0),  "d,[1]A", F_ALIAS, v9 }, /* sta d,[rs1+%g0] */
00473 { "stwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1),    "d,[1+i]o", F_ALIAS, v9 },
00474 { "stwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1),    "d,[i+1]o", F_ALIAS, v9 },
00475 { "stwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|RS1_G0, "d,[i]o", F_ALIAS, v9 },
00476 { "stwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS, v9 }, /* st d,[rs1+0] */
00477 { "stswa",  F3(3, 0x14, 0), F3(~3, ~0x14, ~0),    "d,[1+2]A", F_ALIAS, v9 },
00478 { "stswa",  F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0),  "d,[1]A", F_ALIAS, v9 }, /* sta d,[rs1+%g0] */
00479 { "stswa",  F3(3, 0x14, 1), F3(~3, ~0x14, ~1),    "d,[1+i]o", F_ALIAS, v9 },
00480 { "stswa",  F3(3, 0x14, 1), F3(~3, ~0x14, ~1),    "d,[i+1]o", F_ALIAS, v9 },
00481 { "stswa",  F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|RS1_G0, "d,[i]o", F_ALIAS, v9 },
00482 { "stswa",  F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS, v9 }, /* st d,[rs1+0] */
00483 { "stuwa",  F3(3, 0x14, 0), F3(~3, ~0x14, ~0),    "d,[1+2]A", F_ALIAS, v9 },
00484 { "stuwa",  F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0),  "d,[1]A", F_ALIAS, v9 }, /* sta d,[rs1+%g0] */
00485 { "stuwa",  F3(3, 0x14, 1), F3(~3, ~0x14, ~1),    "d,[1+i]o", F_ALIAS, v9 },
00486 { "stuwa",  F3(3, 0x14, 1), F3(~3, ~0x14, ~1),    "d,[i+1]o", F_ALIAS, v9 },
00487 { "stuwa",  F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|RS1_G0, "d,[i]o", F_ALIAS, v9 },
00488 { "stuwa",  F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS, v9 }, /* st d,[rs1+0] */
00489 
00490 { "stb",  F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI(~0),  "d,[1+2]", 0, v6 },
00491 { "stb",  F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI_RS2(~0),  "d,[1]", 0, v6 }, /* stb d,[rs1+%g0] */
00492 { "stb",  F3(3, 0x05, 1), F3(~3, ~0x05, ~1),    "d,[1+i]", 0, v6 },
00493 { "stb",  F3(3, 0x05, 1), F3(~3, ~0x05, ~1),    "d,[i+1]", 0, v6 },
00494 { "stb",  F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RS1_G0, "d,[i]", 0, v6 },
00495 { "stb",  F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|SIMM13(~0), "d,[1]", 0, v6 }, /* stb d,[rs1+0] */
00496 
00497 { "stsb", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI(~0),  "d,[1+2]", F_ALIAS, v6 },
00498 { "stsb", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI_RS2(~0),  "d,[1]", F_ALIAS, v6 }, /* stb d,[rs1+%g0] */
00499 { "stsb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1),    "d,[1+i]", F_ALIAS, v6 },
00500 { "stsb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1),    "d,[i+1]", F_ALIAS, v6 },
00501 { "stsb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RS1_G0, "d,[i]", F_ALIAS, v6 },
00502 { "stsb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|SIMM13(~0), "d,[1]", F_ALIAS, v6 }, /* stb d,[rs1+0] */
00503 { "stub", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI(~0),  "d,[1+2]", F_ALIAS, v6 },
00504 { "stub", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI_RS2(~0),  "d,[1]", F_ALIAS, v6 }, /* stb d,[rs1+%g0] */
00505 { "stub", F3(3, 0x05, 1), F3(~3, ~0x05, ~1),    "d,[1+i]", F_ALIAS, v6 },
00506 { "stub", F3(3, 0x05, 1), F3(~3, ~0x05, ~1),    "d,[i+1]", F_ALIAS, v6 },
00507 { "stub", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RS1_G0, "d,[i]", F_ALIAS, v6 },
00508 { "stub", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|SIMM13(~0), "d,[1]", F_ALIAS, v6 }, /* stb d,[rs1+0] */
00509 
00510 { "stba", F3(3, 0x15, 0), F3(~3, ~0x15, ~0),    "d,[1+2]A", 0, v6 },
00511 { "stba", F3(3, 0x15, 0), F3(~3, ~0x15, ~0)|RS2(~0),  "d,[1]A", 0, v6 }, /* stba d,[rs1+%g0] */
00512 { "stba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1),    "d,[1+i]o", 0, v9 },
00513 { "stba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1),    "d,[i+1]o", 0, v9 },
00514 { "stba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|RS1_G0, "d,[i]o", 0, v9 },
00515 { "stba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|SIMM13(~0), "d,[1]o", 0, v9 }, /* stb d,[rs1+0] */
00516 
00517 { "stsba",  F3(3, 0x15, 0), F3(~3, ~0x15, ~0),    "d,[1+2]A", F_ALIAS, v6 },
00518 { "stsba",  F3(3, 0x15, 0), F3(~3, ~0x15, ~0)|RS2(~0),  "d,[1]A", F_ALIAS, v6 }, /* stba d,[rs1+%g0] */
00519 { "stsba",  F3(3, 0x15, 1), F3(~3, ~0x15, ~1),    "d,[1+i]o", F_ALIAS, v9 },
00520 { "stsba",  F3(3, 0x15, 1), F3(~3, ~0x15, ~1),    "d,[i+1]o", F_ALIAS, v9 },
00521 { "stsba",  F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|RS1_G0, "d,[i]o", F_ALIAS, v9 },
00522 { "stsba",  F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS, v9 }, /* stb d,[rs1+0] */
00523 { "stuba",  F3(3, 0x15, 0), F3(~3, ~0x15, ~0),    "d,[1+2]A", F_ALIAS, v6 },
00524 { "stuba",  F3(3, 0x15, 0), F3(~3, ~0x15, ~0)|RS2(~0),  "d,[1]A", F_ALIAS, v6 }, /* stba d,[rs1+%g0] */
00525 { "stuba",  F3(3, 0x15, 1), F3(~3, ~0x15, ~1),    "d,[1+i]o", F_ALIAS, v9 },
00526 { "stuba",  F3(3, 0x15, 1), F3(~3, ~0x15, ~1),    "d,[i+1]o", F_ALIAS, v9 },
00527 { "stuba",  F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|RS1_G0, "d,[i]o", F_ALIAS, v9 },
00528 { "stuba",  F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS, v9 }, /* stb d,[rs1+0] */
00529 
00530 { "std",  F3(3, 0x07, 0), F3(~3, ~0x07, ~0)|ASI(~0),  "d,[1+2]", 0, v6 },
00531 { "std",  F3(3, 0x07, 0), F3(~3, ~0x07, ~0)|ASI_RS2(~0),  "d,[1]", 0, v6 }, /* std d,[rs1+%g0] */
00532 { "std",  F3(3, 0x07, 1), F3(~3, ~0x07, ~1),    "d,[1+i]", 0, v6 },
00533 { "std",  F3(3, 0x07, 1), F3(~3, ~0x07, ~1),    "d,[i+1]", 0, v6 },
00534 { "std",  F3(3, 0x07, 1), F3(~3, ~0x07, ~1)|RS1_G0, "d,[i]", 0, v6 },
00535 { "std",  F3(3, 0x07, 1), F3(~3, ~0x07, ~1)|SIMM13(~0), "d,[1]", 0, v6 }, /* std d,[rs1+0] */
00536 
00537 { "std",  F3(3, 0x26, 0), F3(~3, ~0x26, ~0)|ASI(~0),  "q,[1+2]", 0, v6notv9 },
00538 { "std",  F3(3, 0x26, 0), F3(~3, ~0x26, ~0)|ASI_RS2(~0),  "q,[1]", 0, v6notv9 }, /* std d,[rs1+%g0] */
00539 { "std",  F3(3, 0x26, 1), F3(~3, ~0x26, ~1),    "q,[1+i]", 0, v6notv9 },
00540 { "std",  F3(3, 0x26, 1), F3(~3, ~0x26, ~1),    "q,[i+1]", 0, v6notv9 },
00541 { "std",  F3(3, 0x26, 1), F3(~3, ~0x26, ~1)|RS1_G0, "q,[i]", 0, v6notv9 },
00542 { "std",  F3(3, 0x26, 1), F3(~3, ~0x26, ~1)|SIMM13(~0), "q,[1]", 0, v6notv9 }, /* std d,[rs1+0] */
00543 { "std",  F3(3, 0x27, 0), F3(~3, ~0x27, ~0)|ASI(~0),  "H,[1+2]", 0, v6 },
00544 { "std",  F3(3, 0x27, 0), F3(~3, ~0x27, ~0)|ASI_RS2(~0),  "H,[1]", 0, v6 }, /* std d,[rs1+%g0] */
00545 { "std",  F3(3, 0x27, 1), F3(~3, ~0x27, ~1),    "H,[1+i]", 0, v6 },
00546 { "std",  F3(3, 0x27, 1), F3(~3, ~0x27, ~1),    "H,[i+1]", 0, v6 },
00547 { "std",  F3(3, 0x27, 1), F3(~3, ~0x27, ~1)|RS1_G0, "H,[i]", 0, v6 },
00548 { "std",  F3(3, 0x27, 1), F3(~3, ~0x27, ~1)|SIMM13(~0), "H,[1]", 0, v6 }, /* std d,[rs1+0] */
00549 
00550 { "std",  F3(3, 0x36, 0), F3(~3, ~0x36, ~0)|ASI(~0),  "Q,[1+2]", 0, v6notv9 },
00551 { "std",  F3(3, 0x36, 0), F3(~3, ~0x36, ~0)|ASI_RS2(~0),  "Q,[1]", 0, v6notv9 }, /* std d,[rs1+%g0] */
00552 { "std",  F3(3, 0x36, 1), F3(~3, ~0x36, ~1),    "Q,[1+i]", 0, v6notv9 },
00553 { "std",  F3(3, 0x36, 1), F3(~3, ~0x36, ~1),    "Q,[i+1]", 0, v6notv9 },
00554 { "std",  F3(3, 0x36, 1), F3(~3, ~0x36, ~1)|RS1_G0, "Q,[i]", 0, v6notv9 },
00555 { "std",  F3(3, 0x36, 1), F3(~3, ~0x36, ~1)|SIMM13(~0), "Q,[1]", 0, v6notv9 }, /* std d,[rs1+0] */
00556 { "std",  F3(3, 0x37, 0), F3(~3, ~0x37, ~0)|ASI(~0),  "D,[1+2]", 0, v6notv9 },
00557 { "std",  F3(3, 0x37, 0), F3(~3, ~0x37, ~0)|ASI_RS2(~0),  "D,[1]", 0, v6notv9 }, /* std d,[rs1+%g0] */
00558 { "std",  F3(3, 0x37, 1), F3(~3, ~0x37, ~1),    "D,[1+i]", 0, v6notv9 },
00559 { "std",  F3(3, 0x37, 1), F3(~3, ~0x37, ~1),    "D,[i+1]", 0, v6notv9 },
00560 { "std",  F3(3, 0x37, 1), F3(~3, ~0x37, ~1)|RS1_G0, "D,[i]", 0, v6notv9 },
00561 { "std",  F3(3, 0x37, 1), F3(~3, ~0x37, ~1)|SIMM13(~0), "D,[1]", 0, v6notv9 }, /* std d,[rs1+0] */
00562 
00563 { "spilld", F3(3, 0x07, 0), F3(~3, ~0x07, ~0)|ASI(~0),  "d,[1+2]", F_ALIAS, v6 },
00564 { "spilld", F3(3, 0x07, 0), F3(~3, ~0x07, ~0)|ASI_RS2(~0),  "d,[1]", F_ALIAS, v6 }, /* std d,[rs1+%g0] */
00565 { "spilld", F3(3, 0x07, 1), F3(~3, ~0x07, ~1),    "d,[1+i]", F_ALIAS, v6 },
00566 { "spilld", F3(3, 0x07, 1), F3(~3, ~0x07, ~1),    "d,[i+1]", F_ALIAS, v6 },
00567 { "spilld", F3(3, 0x07, 1), F3(~3, ~0x07, ~1)|RS1_G0, "d,[i]", F_ALIAS, v6 },
00568 { "spilld", F3(3, 0x07, 1), F3(~3, ~0x07, ~1)|SIMM13(~0), "d,[1]", F_ALIAS, v6 }, /* std d,[rs1+0] */
00569 
00570 { "stda", F3(3, 0x17, 0), F3(~3, ~0x17, ~0),    "d,[1+2]A", 0, v6 },
00571 { "stda", F3(3, 0x17, 0), F3(~3, ~0x17, ~0)|RS2(~0),  "d,[1]A", 0, v6 }, /* stda d,[rs1+%g0] */
00572 { "stda", F3(3, 0x17, 1), F3(~3, ~0x17, ~1),    "d,[1+i]o", 0, v9 },
00573 { "stda", F3(3, 0x17, 1), F3(~3, ~0x17, ~1),    "d,[i+1]o", 0, v9 },
00574 { "stda", F3(3, 0x17, 1), F3(~3, ~0x17, ~1)|RS1_G0, "d,[i]o", 0, v9 },
00575 { "stda", F3(3, 0x17, 1), F3(~3, ~0x17, ~1)|SIMM13(~0), "d,[1]o", 0, v9 }, /* std d,[rs1+0] */
00576 { "stda", F3(3, 0x37, 0), F3(~3, ~0x37, ~0),    "H,[1+2]A", 0, v9 },
00577 { "stda", F3(3, 0x37, 0), F3(~3, ~0x37, ~0)|RS2(~0),  "H,[1]A", 0, v9 }, /* stda d,[rs1+%g0] */
00578 { "stda", F3(3, 0x37, 1), F3(~3, ~0x37, ~1),    "H,[1+i]o", 0, v9 },
00579 { "stda", F3(3, 0x37, 1), F3(~3, ~0x37, ~1),    "H,[i+1]o", 0, v9 },
00580 { "stda", F3(3, 0x37, 1), F3(~3, ~0x37, ~1)|RS1_G0, "H,[i]o", 0, v9 },
00581 { "stda", F3(3, 0x37, 1), F3(~3, ~0x37, ~1)|SIMM13(~0), "H,[1]o", 0, v9 }, /* std d,[rs1+0] */
00582 
00583 { "sth",  F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI(~0),  "d,[1+2]", 0, v6 },
00584 { "sth",  F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI_RS2(~0),  "d,[1]", 0, v6 }, /* sth d,[rs1+%g0] */
00585 { "sth",  F3(3, 0x06, 1), F3(~3, ~0x06, ~1),    "d,[1+i]", 0, v6 },
00586 { "sth",  F3(3, 0x06, 1), F3(~3, ~0x06, ~1),    "d,[i+1]", 0, v6 },
00587 { "sth",  F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RS1_G0, "d,[i]", 0, v6 },
00588 { "sth",  F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|SIMM13(~0), "d,[1]", 0, v6 }, /* sth d,[rs1+0] */
00589 
00590 { "stsh", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI(~0),  "d,[1+2]", F_ALIAS, v6 },
00591 { "stsh", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI_RS2(~0),  "d,[1]", F_ALIAS, v6 }, /* sth d,[rs1+%g0] */
00592 { "stsh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1),    "d,[1+i]", F_ALIAS, v6 },
00593 { "stsh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1),    "d,[i+1]", F_ALIAS, v6 },
00594 { "stsh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RS1_G0, "d,[i]", F_ALIAS, v6 },
00595 { "stsh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|SIMM13(~0), "d,[1]", F_ALIAS, v6 }, /* sth d,[rs1+0] */
00596 { "stuh", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI(~0),  "d,[1+2]", F_ALIAS, v6 },
00597 { "stuh", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI_RS2(~0),  "d,[1]", F_ALIAS, v6 }, /* sth d,[rs1+%g0] */
00598 { "stuh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1),    "d,[1+i]", F_ALIAS, v6 },
00599 { "stuh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1),    "d,[i+1]", F_ALIAS, v6 },
00600 { "stuh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RS1_G0, "d,[i]", F_ALIAS, v6 },
00601 { "stuh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|SIMM13(~0), "d,[1]", F_ALIAS, v6 }, /* sth d,[rs1+0] */
00602 
00603 { "stha", F3(3, 0x16, 0), F3(~3, ~0x16, ~0),    "d,[1+2]A", 0, v6 },
00604 { "stha", F3(3, 0x16, 0), F3(~3, ~0x16, ~0)|RS2(~0),  "d,[1]A", 0, v6 }, /* stha ,[rs1+%g0] */
00605 { "stha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1),    "d,[1+i]o", 0, v9 },
00606 { "stha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1),    "d,[i+1]o", 0, v9 },
00607 { "stha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|RS1_G0, "d,[i]o", 0, v9 },
00608 { "stha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|SIMM13(~0), "d,[1]o", 0, v9 }, /* sth d,[rs1+0] */
00609 
00610 { "stsha",  F3(3, 0x16, 0), F3(~3, ~0x16, ~0),    "d,[1+2]A", F_ALIAS, v6 },
00611 { "stsha",  F3(3, 0x16, 0), F3(~3, ~0x16, ~0)|RS2(~0),  "d,[1]A", F_ALIAS, v6 }, /* stha ,[rs1+%g0] */
00612 { "stsha",  F3(3, 0x16, 1), F3(~3, ~0x16, ~1),    "d,[1+i]o", F_ALIAS, v9 },
00613 { "stsha",  F3(3, 0x16, 1), F3(~3, ~0x16, ~1),    "d,[i+1]o", F_ALIAS, v9 },
00614 { "stsha",  F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|RS1_G0, "d,[i]o", F_ALIAS, v9 },
00615 { "stsha",  F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS, v9 }, /* sth d,[rs1+0] */
00616 { "stuha",  F3(3, 0x16, 0), F3(~3, ~0x16, ~0),    "d,[1+2]A", F_ALIAS, v6 },
00617 { "stuha",  F3(3, 0x16, 0), F3(~3, ~0x16, ~0)|RS2(~0),  "d,[1]A", F_ALIAS, v6 }, /* stha ,[rs1+%g0] */
00618 { "stuha",  F3(3, 0x16, 1), F3(~3, ~0x16, ~1),    "d,[1+i]o", F_ALIAS, v9 },
00619 { "stuha",  F3(3, 0x16, 1), F3(~3, ~0x16, ~1),    "d,[i+1]o", F_ALIAS, v9 },
00620 { "stuha",  F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|RS1_G0, "d,[i]o", F_ALIAS, v9 },
00621 { "stuha",  F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS, v9 }, /* sth d,[rs1+0] */
00622 
00623 { "stx",  F3(3, 0x0e, 0), F3(~3, ~0x0e, ~0)|ASI(~0),  "d,[1+2]", 0, v9 },
00624 { "stx",  F3(3, 0x0e, 0), F3(~3, ~0x0e, ~0)|ASI_RS2(~0),  "d,[1]", 0, v9 }, /* stx d,[rs1+%g0] */
00625 { "stx",  F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1),    "d,[1+i]", 0, v9 },
00626 { "stx",  F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1),    "d,[i+1]", 0, v9 },
00627 { "stx",  F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1)|RS1_G0, "d,[i]", 0, v9 },
00628 { "stx",  F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1)|SIMM13(~0), "d,[1]", 0, v9 }, /* stx d,[rs1+0] */
00629 
00630 { "stx",  F3(3, 0x25, 0)|RD(1), F3(~3, ~0x25, ~0)|ASI(~0)|RD(~1), "F,[1+2]", 0, v9 },
00631 { "stx",  F3(3, 0x25, 0)|RD(1), F3(~3, ~0x25, ~0)|ASI_RS2(~0)|RD(~1),"F,[1]", 0, v9 }, /* stx d,[rs1+%g0] */
00632 { "stx",  F3(3, 0x25, 1)|RD(1), F3(~3, ~0x25, ~1)|RD(~1),   "F,[1+i]", 0, v9 },
00633 { "stx",  F3(3, 0x25, 1)|RD(1), F3(~3, ~0x25, ~1)|RD(~1),   "F,[i+1]", 0, v9 },
00634 { "stx",  F3(3, 0x25, 1)|RD(1), F3(~3, ~0x25, ~1)|RS1_G0|RD(~1),  "F,[i]", 0, v9 },
00635 { "stx",  F3(3, 0x25, 1)|RD(1), F3(~3, ~0x25, ~1)|SIMM13(~0)|RD(~1),"F,[1]", 0, v9 }, /* stx d,[rs1+0] */
00636 
00637 { "stxa", F3(3, 0x1e, 0), F3(~3, ~0x1e, ~0),    "d,[1+2]A", 0, v9 },
00638 { "stxa", F3(3, 0x1e, 0), F3(~3, ~0x1e, ~0)|RS2(~0),  "d,[1]A", 0, v9 }, /* stxa d,[rs1+%g0] */
00639 { "stxa", F3(3, 0x1e, 1), F3(~3, ~0x1e, ~1),    "d,[1+i]o", 0, v9 },
00640 { "stxa", F3(3, 0x1e, 1), F3(~3, ~0x1e, ~1),    "d,[i+1]o", 0, v9 },
00641 { "stxa", F3(3, 0x1e, 1), F3(~3, ~0x1e, ~1)|RS1_G0, "d,[i]o", 0, v9 },
00642 { "stxa", F3(3, 0x1e, 1), F3(~3, ~0x1e, ~1)|SIMM13(~0), "d,[1]o", 0, v9 }, /* stx d,[rs1+0] */
00643 
00644 { "stq",  F3(3, 0x26, 0), F3(~3, ~0x26, ~0)|ASI(~0),  "J,[1+2]", 0, v9 },
00645 { "stq",  F3(3, 0x26, 0), F3(~3, ~0x26, ~0)|ASI_RS2(~0),  "J,[1]", 0, v9 }, /* stq [rs1+%g0] */
00646 { "stq",  F3(3, 0x26, 1), F3(~3, ~0x26, ~1),    "J,[1+i]", 0, v9 },
00647 { "stq",  F3(3, 0x26, 1), F3(~3, ~0x26, ~1),    "J,[i+1]", 0, v9 },
00648 { "stq",  F3(3, 0x26, 1), F3(~3, ~0x26, ~1)|RS1_G0, "J,[i]", 0, v9 },
00649 { "stq",  F3(3, 0x26, 1), F3(~3, ~0x26, ~1)|SIMM13(~0), "J,[1]", 0, v9 }, /* stq [rs1+0] */
00650 
00651 { "stqa", F3(3, 0x36, 0), F3(~3, ~0x36, ~0)|ASI(~0),  "J,[1+2]A", 0, v9 },
00652 { "stqa", F3(3, 0x36, 0), F3(~3, ~0x36, ~0)|ASI_RS2(~0),  "J,[1]A", 0, v9 }, /* stqa [rs1+%g0] */
00653 { "stqa", F3(3, 0x36, 1), F3(~3, ~0x36, ~1),    "J,[1+i]o", 0, v9 },
00654 { "stqa", F3(3, 0x36, 1), F3(~3, ~0x36, ~1),    "J,[i+1]o", 0, v9 },
00655 { "stqa", F3(3, 0x36, 1), F3(~3, ~0x36, ~1)|RS1_G0, "J,[i]o", 0, v9 },
00656 { "stqa", F3(3, 0x36, 1), F3(~3, ~0x36, ~1)|SIMM13(~0), "J,[1]o", 0, v9 }, /* stqa [rs1+0] */
00657 
00658 { "swap", F3(3, 0x0f, 0), F3(~3, ~0x0f, ~0)|ASI(~0),  "[1+2],d", 0, v7 },
00659 { "swap", F3(3, 0x0f, 0), F3(~3, ~0x0f, ~0)|ASI_RS2(~0),  "[1],d", 0, v7 }, /* swap [rs1+%g0],d */
00660 { "swap", F3(3, 0x0f, 1), F3(~3, ~0x0f, ~1),    "[1+i],d", 0, v7 },
00661 { "swap", F3(3, 0x0f, 1), F3(~3, ~0x0f, ~1),    "[i+1],d", 0, v7 },
00662 { "swap", F3(3, 0x0f, 1), F3(~3, ~0x0f, ~1)|RS1_G0, "[i],d", 0, v7 },
00663 { "swap", F3(3, 0x0f, 1), F3(~3, ~0x0f, ~1)|SIMM13(~0), "[1],d", 0, v7 }, /* swap [rs1+0],d */
00664 
00665 { "swapa",  F3(3, 0x1f, 0), F3(~3, ~0x1f, ~0),    "[1+2]A,d", 0, v7 },
00666 { "swapa",  F3(3, 0x1f, 0), F3(~3, ~0x1f, ~0)|RS2(~0),  "[1]A,d", 0, v7 }, /* swapa [rs1+%g0],d */
00667 { "swapa",  F3(3, 0x1f, 1), F3(~3, ~0x1f, ~1),    "[1+i]o,d", 0, v9 },
00668 { "swapa",  F3(3, 0x1f, 1), F3(~3, ~0x1f, ~1),    "[i+1]o,d", 0, v9 },
00669 { "swapa",  F3(3, 0x1f, 1), F3(~3, ~0x1f, ~1)|RS1_G0, "[i]o,d", 0, v9 },
00670 { "swapa",  F3(3, 0x1f, 1), F3(~3, ~0x1f, ~1)|SIMM13(~0), "[1]o,d", 0, v9 }, /* swap [rs1+0],d */
00671 
00672 { "restore",  F3(2, 0x3d, 0), F3(~2, ~0x3d, ~0)|ASI(~0),      "1,2,d", 0, v6 },
00673 { "restore",  F3(2, 0x3d, 0), F3(~2, ~0x3d, ~0)|RD_G0|RS1_G0|ASI_RS2(~0), "", 0, v6 }, /* restore %g0,%g0,%g0 */
00674 { "restore",  F3(2, 0x3d, 1), F3(~2, ~0x3d, ~1),        "1,i,d", 0, v6 },
00675 { "restore",  F3(2, 0x3d, 1), F3(~2, ~0x3d, ~1)|RD_G0|RS1_G0|SIMM13(~0),  "", 0, v6 }, /* restore %g0,0,%g0 */
00676 
00677 { "rett", F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|RD_G0|ASI(~0),  "1+2", F_UNBR|F_DELAYED, v6 }, /* rett rs1+rs2 */
00678 { "rett", F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|RD_G0|ASI_RS2(~0),  "1", F_UNBR|F_DELAYED, v6 },  /* rett rs1,%g0 */
00679 { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0,    "1+i", F_UNBR|F_DELAYED, v6 }, /* rett rs1+X */
00680 { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0,    "i+1", F_UNBR|F_DELAYED, v6 }, /* rett X+rs1 */
00681 { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0|RS1_G0,   "i", F_UNBR|F_DELAYED, v6 }, /* rett X+rs1 */
00682 { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0|RS1_G0,   "i", F_UNBR|F_DELAYED, v6 },  /* rett X */
00683 { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0|SIMM13(~0), "1", F_UNBR|F_DELAYED, v6 },  /* rett rs1+0 */
00684 
00685 { "save", F3(2, 0x3c, 0), F3(~2, ~0x3c, ~0)|ASI(~0),  "1,2,d", 0, v6 },
00686 { "save", F3(2, 0x3c, 1), F3(~2, ~0x3c, ~1),    "1,i,d", 0, v6 },
00687 { "save", 0x81e00000, ~0x81e00000,      "", F_ALIAS, v6 },
00688 
00689 { "ret",  F3(2, 0x38, 1)|RS1(0x1f)|SIMM13(8), F3(~2, ~0x38, ~1)|SIMM13(~8),        "", F_UNBR|F_DELAYED, v6 }, /* jmpl %i7+8,%g0 */
00690 { "retl", F3(2, 0x38, 1)|RS1(0x0f)|SIMM13(8), F3(~2, ~0x38, ~1)|RS1(~0x0f)|SIMM13(~8), "", F_UNBR|F_DELAYED, v6 }, /* jmpl %o7+8,%g0 */
00691 
00692 { "jmpl", F3(2, 0x38, 0), F3(~2, ~0x38, ~0)|ASI(~0),  "1+2,d", F_JSR|F_DELAYED, v6 },
00693 { "jmpl", F3(2, 0x38, 0), F3(~2, ~0x38, ~0)|ASI_RS2(~0),  "1,d", F_JSR|F_DELAYED, v6 }, /* jmpl rs1+%g0,d */
00694 { "jmpl", F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|SIMM13(~0), "1,d", F_JSR|F_DELAYED, v6 }, /* jmpl rs1+0,d */
00695 { "jmpl", F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RS1_G0, "i,d", F_JSR|F_DELAYED, v6 }, /* jmpl %g0+i,d */
00696 { "jmpl", F3(2, 0x38, 1), F3(~2, ~0x38, ~1),    "1+i,d", F_JSR|F_DELAYED, v6 },
00697 { "jmpl", F3(2, 0x38, 1), F3(~2, ~0x38, ~1),    "i+1,d", F_JSR|F_DELAYED, v6 },
00698 
00699 { "done", F3(2, 0x3e, 0)|RD(0), F3(~2, ~0x3e, ~0)|RD(~0)|RS1_G0|SIMM13(~0), "", 0, v9 },
00700 { "retry",  F3(2, 0x3e, 0)|RD(1), F3(~2, ~0x3e, ~0)|RD(~1)|RS1_G0|SIMM13(~0), "", 0, v9 },
00701 { "saved",  F3(2, 0x31, 0)|RD(0), F3(~2, ~0x31, ~0)|RD(~0)|RS1_G0|SIMM13(~0), "", 0, v9 },
00702 { "restored", F3(2, 0x31, 0)|RD(1), F3(~2, ~0x31, ~0)|RD(~1)|RS1_G0|SIMM13(~0), "", 0, v9 },
00703 { "sir",  F3(2, 0x30, 1)|RD(0xf), F3(~2, ~0x30, ~1)|RD(~0xf)|RS1_G0,    "i", 0, v9 },
00704 
00705 { "flush",  F3(2, 0x3b, 0), F3(~2, ~0x3b, ~0)|ASI(~0),  "1+2", 0, v8 },
00706 { "flush",  F3(2, 0x3b, 0), F3(~2, ~0x3b, ~0)|ASI_RS2(~0),  "1", 0, v8 }, /* flush rs1+%g0 */
00707 { "flush",  F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1)|SIMM13(~0), "1", 0, v8 }, /* flush rs1+0 */
00708 { "flush",  F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1)|RS1_G0, "i", 0, v8 }, /* flush %g0+i */
00709 { "flush",  F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1),    "1+i", 0, v8 },
00710 { "flush",  F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1),    "i+1", 0, v8 },
00711 
00712 /* IFLUSH was renamed to FLUSH in v8.  */
00713 { "iflush", F3(2, 0x3b, 0), F3(~2, ~0x3b, ~0)|ASI(~0),  "1+2", F_ALIAS, v6 },
00714 { "iflush", F3(2, 0x3b, 0), F3(~2, ~0x3b, ~0)|ASI_RS2(~0),  "1", F_ALIAS, v6 }, /* flush rs1+%g0 */
00715 { "iflush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1)|SIMM13(~0), "1", F_ALIAS, v6 }, /* flush rs1+0 */
00716 { "iflush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1)|RS1_G0, "i", F_ALIAS, v6 },
00717 { "iflush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1),    "1+i", F_ALIAS, v6 },
00718 { "iflush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1),    "i+1", F_ALIAS, v6 },
00719 
00720 { "return", F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|ASI(~0),  "1+2", 0, v9 },
00721 { "return", F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|ASI_RS2(~0),  "1", 0, v9 }, /* return rs1+%g0 */
00722 { "return", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|SIMM13(~0), "1", 0, v9 }, /* return rs1+0 */
00723 { "return", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RS1_G0, "i", 0, v9 }, /* return %g0+i */
00724 { "return", F3(2, 0x39, 1), F3(~2, ~0x39, ~1),    "1+i", 0, v9 },
00725 { "return", F3(2, 0x39, 1), F3(~2, ~0x39, ~1),    "i+1", 0, v9 },
00726 
00727 { "flushw", F3(2, 0x2b, 0), F3(~2, ~0x2b, ~0)|RD_G0|RS1_G0|ASI_RS2(~0), "", 0, v9 },
00728 
00729 { "membar", F3(2, 0x28, 1)|RS1(0xf), F3(~2, ~0x28, ~1)|RD_G0|RS1(~0xf)|SIMM13(~127), "K", 0, v9 },
00730 { "stbar",  F3(2, 0x28, 0)|RS1(0xf), F3(~2, ~0x28, ~0)|RD_G0|RS1(~0xf)|SIMM13(~0), "", 0, v8 },
00731 
00732 { "prefetch", F3(3, 0x2d, 0), F3(~3, ~0x2d, ~0),    "[1+2],*", 0, v9 },
00733 { "prefetch", F3(3, 0x2d, 0), F3(~3, ~0x2d, ~0)|RS2_G0, "[1],*", 0, v9 }, /* prefetch [rs1+%g0],prefetch_fcn */
00734 { "prefetch", F3(3, 0x2d, 1), F3(~3, ~0x2d, ~1),    "[1+i],*", 0, v9 },
00735 { "prefetch", F3(3, 0x2d, 1), F3(~3, ~0x2d, ~1),    "[i+1],*", 0, v9 },
00736 { "prefetch", F3(3, 0x2d, 1), F3(~3, ~0x2d, ~1)|RS1_G0, "[i],*", 0, v9 },
00737 { "prefetch", F3(3, 0x2d, 1), F3(~3, ~0x2d, ~1)|SIMM13(~0), "[1],*", 0, v9 }, /* prefetch [rs1+0],prefetch_fcn */
00738 { "prefetcha",  F3(3, 0x3d, 0), F3(~3, ~0x3d, ~0),    "[1+2]A,*", 0, v9 },
00739 { "prefetcha",  F3(3, 0x3d, 0), F3(~3, ~0x3d, ~0)|RS2_G0, "[1]A,*", 0, v9 }, /* prefetcha [rs1+%g0],prefetch_fcn */
00740 { "prefetcha",  F3(3, 0x3d, 1), F3(~3, ~0x3d, ~1),    "[1+i]o,*", 0, v9 },
00741 { "prefetcha",  F3(3, 0x3d, 1), F3(~3, ~0x3d, ~1),    "[i+1]o,*", 0, v9 },
00742 { "prefetcha",  F3(3, 0x3d, 1), F3(~3, ~0x3d, ~1)|RS1_G0, "[i]o,*", 0, v9 },
00743 { "prefetcha",  F3(3, 0x3d, 1), F3(~3, ~0x3d, ~1)|SIMM13(~0), "[1]o,*", 0, v9 }, /* prefetcha [rs1+0],d */
00744 
00745 { "sll",  F3(2, 0x25, 0), F3(~2, ~0x25, ~0)|(1<<12)|(0x7f<<5),  "1,2,d", 0, v6 },
00746 { "sll",  F3(2, 0x25, 1), F3(~2, ~0x25, ~1)|(1<<12)|(0x7f<<5),  "1,X,d", 0, v6 },
00747 { "sra",  F3(2, 0x27, 0), F3(~2, ~0x27, ~0)|(1<<12)|(0x7f<<5),  "1,2,d", 0, v6 },
00748 { "sra",  F3(2, 0x27, 1), F3(~2, ~0x27, ~1)|(1<<12)|(0x7f<<5),  "1,X,d", 0, v6 },
00749 { "srl",  F3(2, 0x26, 0), F3(~2, ~0x26, ~0)|(1<<12)|(0x7f<<5),  "1,2,d", 0, v6 },
00750 { "srl",  F3(2, 0x26, 1), F3(~2, ~0x26, ~1)|(1<<12)|(0x7f<<5),  "1,X,d", 0, v6 },
00751 
00752 { "sllx", F3(2, 0x25, 0)|(1<<12), F3(~2, ~0x25, ~0)|(0x7f<<5),  "1,2,d", 0, v9 },
00753 { "sllx", F3(2, 0x25, 1)|(1<<12), F3(~2, ~0x25, ~1)|(0x3f<<6),  "1,Y,d", 0, v9 },
00754 { "srax", F3(2, 0x27, 0)|(1<<12), F3(~2, ~0x27, ~0)|(0x7f<<5),  "1,2,d", 0, v9 },
00755 { "srax", F3(2, 0x27, 1)|(1<<12), F3(~2, ~0x27, ~1)|(0x3f<<6),  "1,Y,d", 0, v9 },
00756 { "srlx", F3(2, 0x26, 0)|(1<<12), F3(~2, ~0x26, ~0)|(0x7f<<5),  "1,2,d", 0, v9 },
00757 { "srlx", F3(2, 0x26, 1)|(1<<12), F3(~2, ~0x26, ~1)|(0x3f<<6),  "1,Y,d", 0, v9 },
00758 
00759 { "mulscc", F3(2, 0x24, 0), F3(~2, ~0x24, ~0)|ASI(~0),  "1,2,d", 0, v6 },
00760 { "mulscc", F3(2, 0x24, 1), F3(~2, ~0x24, ~1),    "1,i,d", 0, v6 },
00761 
00762 { "divscc", F3(2, 0x1d, 0), F3(~2, ~0x1d, ~0)|ASI(~0),  "1,2,d", 0, sparclite },
00763 { "divscc", F3(2, 0x1d, 1), F3(~2, ~0x1d, ~1),    "1,i,d", 0, sparclite },
00764 
00765 { "scan", F3(2, 0x2c, 0), F3(~2, ~0x2c, ~0)|ASI(~0),  "1,2,d", 0, sparclet|sparclite },
00766 { "scan", F3(2, 0x2c, 1), F3(~2, ~0x2c, ~1),    "1,i,d", 0, sparclet|sparclite },
00767 
00768 { "popc", F3(2, 0x2e, 0), F3(~2, ~0x2e, ~0)|RS1_G0|ASI(~0),"2,d", 0, v9 },
00769 { "popc", F3(2, 0x2e, 1), F3(~2, ~0x2e, ~1)|RS1_G0, "i,d", 0, v9 },
00770 
00771 { "clr",  F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|RD_G0|RS1_G0|ASI_RS2(~0), "d", F_ALIAS, v6 }, /* or %g0,%g0,d */
00772 { "clr",  F3(2, 0x02, 1), F3(~2, ~0x02, ~1)|RS1_G0|SIMM13(~0),    "d", F_ALIAS, v6 }, /* or %g0,0,d */
00773 { "clr",  F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|RD_G0|ASI(~0),    "[1+2]", F_ALIAS, v6 },
00774 { "clr",  F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|RD_G0|ASI_RS2(~0),    "[1]", F_ALIAS, v6 }, /* st %g0,[rs1+%g0] */
00775 { "clr",  F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RD_G0,      "[1+i]", F_ALIAS, v6 },
00776 { "clr",  F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RD_G0,      "[i+1]", F_ALIAS, v6 },
00777 { "clr",  F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RD_G0|RS1_G0,     "[i]", F_ALIAS, v6 },
00778 { "clr",  F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RD_G0|SIMM13(~0),   "[1]", F_ALIAS, v6 }, /* st %g0,[rs1+0] */
00779 
00780 { "clrb", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|RD_G0|ASI(~0),  "[1+2]", F_ALIAS, v6 },
00781 { "clrb", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|RD_G0|ASI_RS2(~0),  "[1]", F_ALIAS, v6 }, /* stb %g0,[rs1+%g0] */
00782 { "clrb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RD_G0,    "[1+i]", F_ALIAS, v6 },
00783 { "clrb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RD_G0,    "[i+1]", F_ALIAS, v6 },
00784 { "clrb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RD_G0|RS1_G0,   "[i]", F_ALIAS, v6 },
00785 { "clrb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RD_G0|SIMM13(~0), "[1]", F_ALIAS, v6 }, /* stb %g0,[rs1+0] */
00786 
00787 { "clrh", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|RD_G0|ASI(~0),  "[1+2]", F_ALIAS, v6 },
00788 { "clrh", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|RD_G0|ASI_RS2(~0),  "[1]", F_ALIAS, v6 }, /* sth %g0,[rs1+%g0] */
00789 { "clrh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RD_G0,    "[1+i]", F_ALIAS, v6 },
00790 { "clrh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RD_G0,    "[i+1]", F_ALIAS, v6 },
00791 { "clrh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RD_G0|RS1_G0,   "[i]", F_ALIAS, v6 },
00792 { "clrh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RD_G0|SIMM13(~0), "[1]", F_ALIAS, v6 }, /* sth %g0,[rs1+0] */
00793 
00794 { "clrx", F3(3, 0x0e, 0), F3(~3, ~0x0e, ~0)|RD_G0|ASI(~0),  "[1+2]", F_ALIAS, v9 },
00795 { "clrx", F3(3, 0x0e, 0), F3(~3, ~0x0e, ~0)|RD_G0|ASI_RS2(~0),  "[1]", F_ALIAS, v9 }, /* stx %g0,[rs1+%g0] */
00796 { "clrx", F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1)|RD_G0,    "[1+i]", F_ALIAS, v9 },
00797 { "clrx", F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1)|RD_G0,    "[i+1]", F_ALIAS, v9 },
00798 { "clrx", F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1)|RD_G0|RS1_G0,   "[i]", F_ALIAS, v9 },
00799 { "clrx", F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1)|RD_G0|SIMM13(~0), "[1]", F_ALIAS, v9 }, /* stx %g0,[rs1+0] */
00800 
00801 { "orcc", F3(2, 0x12, 0), F3(~2, ~0x12, ~0)|ASI(~0),  "1,2,d", 0, v6 },
00802 { "orcc", F3(2, 0x12, 1), F3(~2, ~0x12, ~1),    "1,i,d", 0, v6 },
00803 { "orcc", F3(2, 0x12, 1), F3(~2, ~0x12, ~1),    "i,1,d", 0, v6 },
00804 
00805 /* This is not a commutative instruction.  */
00806 { "orncc",  F3(2, 0x16, 0), F3(~2, ~0x16, ~0)|ASI(~0),  "1,2,d", 0, v6 },
00807 { "orncc",  F3(2, 0x16, 1), F3(~2, ~0x16, ~1),    "1,i,d", 0, v6 },
00808 
00809 /* This is not a commutative instruction.  */
00810 { "orn",  F3(2, 0x06, 0), F3(~2, ~0x06, ~0)|ASI(~0),  "1,2,d", 0, v6 },
00811 { "orn",  F3(2, 0x06, 1), F3(~2, ~0x06, ~1),    "1,i,d", 0, v6 },
00812 
00813 { "tst",  F3(2, 0x12, 0), F3(~2, ~0x12, ~0)|RD_G0|ASI_RS2(~0),  "1", 0, v6 }, /* orcc rs1, %g0, %g0 */
00814 { "tst",  F3(2, 0x12, 0), F3(~2, ~0x12, ~0)|RD_G0|RS1_G0|ASI(~0), "2", 0, v6 }, /* orcc %g0, rs2, %g0 */
00815 { "tst",  F3(2, 0x12, 1), F3(~2, ~0x12, ~1)|RD_G0|SIMM13(~0), "1", 0, v6 }, /* orcc rs1, 0, %g0 */
00816 
00817 { "wr", F3(2, 0x30, 0),   F3(~2, ~0x30, ~0)|ASI(~0),    "1,2,m", 0, v8 }, /* wr r,r,%asrX */
00818 { "wr", F3(2, 0x30, 1),   F3(~2, ~0x30, ~1),      "1,i,m", 0, v8 }, /* wr r,i,%asrX */
00819 { "wr", F3(2, 0x30, 0),   F3(~2, ~0x30, ~0)|ASI_RS2(~0),    "1,m", F_ALIAS, v8 }, /* wr rs1,%g0,%asrX */
00820 { "wr", F3(2, 0x30, 0),   F3(~2, ~0x30, ~0)|RD_G0|ASI(~0),  "1,2,y", 0, v6 }, /* wr r,r,%y */
00821 { "wr", F3(2, 0x30, 1),   F3(~2, ~0x30, ~1)|RD_G0,    "1,i,y", 0, v6 }, /* wr r,i,%y */
00822 { "wr", F3(2, 0x30, 0),   F3(~2, ~0x30, ~0)|RD_G0|ASI_RS2(~0),  "1,y", F_ALIAS, v6 }, /* wr rs1,%g0,%y */
00823 { "wr", F3(2, 0x31, 0),   F3(~2, ~0x31, ~0)|RD_G0|ASI(~0),  "1,2,p", 0, v6notv9 }, /* wr r,r,%psr */
00824 { "wr", F3(2, 0x31, 1),   F3(~2, ~0x31, ~1)|RD_G0,    "1,i,p", 0, v6notv9 }, /* wr r,i,%psr */
00825 { "wr", F3(2, 0x31, 0),   F3(~2, ~0x31, ~0)|RD_G0|ASI_RS2(~0),  "1,p", F_ALIAS, v6notv9 }, /* wr rs1,%g0,%psr */
00826 { "wr", F3(2, 0x32, 0),   F3(~2, ~0x32, ~0)|RD_G0|ASI(~0),  "1,2,w", 0, v6notv9 }, /* wr r,r,%wim */
00827 { "wr", F3(2, 0x32, 1),   F3(~2, ~0x32, ~1)|RD_G0,    "1,i,w", 0, v6notv9 }, /* wr r,i,%wim */
00828 { "wr", F3(2, 0x32, 0),   F3(~2, ~0x32, ~0)|RD_G0|ASI_RS2(~0),  "1,w", F_ALIAS, v6notv9 }, /* wr rs1,%g0,%wim */
00829 { "wr", F3(2, 0x33, 0),   F3(~2, ~0x33, ~0)|RD_G0|ASI(~0),  "1,2,t", 0, v6notv9 }, /* wr r,r,%tbr */
00830 { "wr", F3(2, 0x33, 1),   F3(~2, ~0x33, ~1)|RD_G0,    "1,i,t", 0, v6notv9 }, /* wr r,i,%tbr */
00831 { "wr", F3(2, 0x33, 0),   F3(~2, ~0x33, ~0)|RD_G0|ASI_RS2(~0),  "1,t", F_ALIAS, v6notv9 }, /* wr rs1,%g0,%tbr */
00832 
00833 { "wr", F3(2, 0x30, 0)|RD(2), F3(~2, ~0x30, ~0)|RD(~2)|ASI(~0), "1,2,E", 0, v9 }, /* wr r,r,%ccr */
00834 { "wr", F3(2, 0x30, 1)|RD(2), F3(~2, ~0x30, ~1)|RD(~2),   "1,i,E", 0, v9 }, /* wr r,i,%ccr */
00835 { "wr", F3(2, 0x30, 0)|RD(3), F3(~2, ~0x30, ~0)|RD(~3)|ASI(~0), "1,2,o", 0, v9 }, /* wr r,r,%asi */
00836 { "wr", F3(2, 0x30, 1)|RD(3), F3(~2, ~0x30, ~1)|RD(~3),   "1,i,o", 0, v9 }, /* wr r,i,%asi */
00837 { "wr", F3(2, 0x30, 0)|RD(6), F3(~2, ~0x30, ~0)|RD(~6)|ASI(~0), "1,2,s", 0, v9 }, /* wr r,r,%fprs */
00838 { "wr", F3(2, 0x30, 1)|RD(6), F3(~2, ~0x30, ~1)|RD(~6),   "1,i,s", 0, v9 }, /* wr r,i,%fprs */
00839 
00840 { "wr", F3(2, 0x30, 0)|RD(16),  F3(~2, ~0x30, ~0)|RD(~16)|ASI(~0),  "1,2,_", 0, v9a }, /* wr r,r,%pcr */
00841 { "wr", F3(2, 0x30, 1)|RD(16),  F3(~2, ~0x30, ~1)|RD(~16),    "1,i,_", 0, v9a }, /* wr r,i,%pcr */
00842 { "wr", F3(2, 0x30, 0)|RD(17),  F3(~2, ~0x30, ~0)|RD(~17)|ASI(~0),  "1,2,_", 0, v9a }, /* wr r,r,%pic */
00843 { "wr", F3(2, 0x30, 1)|RD(17),  F3(~2, ~0x30, ~1)|RD(~17),    "1,i,_", 0, v9a }, /* wr r,i,%pic */
00844 { "wr", F3(2, 0x30, 0)|RD(18),  F3(~2, ~0x30, ~0)|RD(~18)|ASI(~0),  "1,2,_", 0, v9a }, /* wr r,r,%dcr */
00845 { "wr", F3(2, 0x30, 1)|RD(18),  F3(~2, ~0x30, ~1)|RD(~18),    "1,i,_", 0, v9a }, /* wr r,i,%dcr */
00846 { "wr", F3(2, 0x30, 0)|RD(19),  F3(~2, ~0x30, ~0)|RD(~19)|ASI(~0),  "1,2,_", 0, v9a }, /* wr r,r,%gsr */
00847 { "wr", F3(2, 0x30, 1)|RD(19),  F3(~2, ~0x30, ~1)|RD(~19),    "1,i,_", 0, v9a }, /* wr r,i,%gsr */
00848 { "wr", F3(2, 0x30, 0)|RD(20),  F3(~2, ~0x30, ~0)|RD(~20)|ASI(~0),  "1,2,_", 0, v9a }, /* wr r,r,%set_softint */
00849 { "wr", F3(2, 0x30, 1)|RD(20),  F3(~2, ~0x30, ~1)|RD(~20),    "1,i,_", 0, v9a }, /* wr r,i,%set_softint */
00850 { "wr", F3(2, 0x30, 0)|RD(21),  F3(~2, ~0x30, ~0)|RD(~21)|ASI(~0),  "1,2,_", 0, v9a }, /* wr r,r,%clear_softint */
00851 { "wr", F3(2, 0x30, 1)|RD(21),  F3(~2, ~0x30, ~1)|RD(~21),    "1,i,_", 0, v9a }, /* wr r,i,%clear_softint */
00852 { "wr", F3(2, 0x30, 0)|RD(22),  F3(~2, ~0x30, ~0)|RD(~22)|ASI(~0),  "1,2,_", 0, v9a }, /* wr r,r,%softint */
00853 { "wr", F3(2, 0x30, 1)|RD(22),  F3(~2, ~0x30, ~1)|RD(~22),    "1,i,_", 0, v9a }, /* wr r,i,%softint */
00854 { "wr", F3(2, 0x30, 0)|RD(23),  F3(~2, ~0x30, ~0)|RD(~23)|ASI(~0),  "1,2,_", 0, v9a }, /* wr r,r,%tick_cmpr */
00855 { "wr", F3(2, 0x30, 1)|RD(23),  F3(~2, ~0x30, ~1)|RD(~23),    "1,i,_", 0, v9a }, /* wr r,i,%tick_cmpr */
00856 { "wr", F3(2, 0x30, 0)|RD(24),  F3(~2, ~0x30, ~0)|RD(~24)|ASI(~0),  "1,2,_", 0, v9b }, /* wr r,r,%sys_tick */
00857 { "wr", F3(2, 0x30, 1)|RD(24),  F3(~2, ~0x30, ~1)|RD(~24),    "1,i,_", 0, v9b }, /* wr r,i,%sys_tick */
00858 { "wr", F3(2, 0x30, 0)|RD(25),  F3(~2, ~0x30, ~0)|RD(~25)|ASI(~0),  "1,2,_", 0, v9b }, /* wr r,r,%sys_tick_cmpr */
00859 { "wr", F3(2, 0x30, 1)|RD(25),  F3(~2, ~0x30, ~1)|RD(~25),    "1,i,_", 0, v9b }, /* wr r,i,%sys_tick_cmpr */
00860 
00861 { "rd", F3(2, 0x28, 0),     F3(~2, ~0x28, ~0)|SIMM13(~0),   "M,d", 0, v8 }, /* rd %asrX,r */
00862 { "rd", F3(2, 0x28, 0),     F3(~2, ~0x28, ~0)|RS1_G0|SIMM13(~0),  "y,d", 0, v6 }, /* rd %y,r */
00863 { "rd", F3(2, 0x29, 0),     F3(~2, ~0x29, ~0)|RS1_G0|SIMM13(~0),  "p,d", 0, v6notv9 }, /* rd %psr,r */
00864 { "rd", F3(2, 0x2a, 0),     F3(~2, ~0x2a, ~0)|RS1_G0|SIMM13(~0),  "w,d", 0, v6notv9 }, /* rd %wim,r */
00865 { "rd", F3(2, 0x2b, 0),     F3(~2, ~0x2b, ~0)|RS1_G0|SIMM13(~0),  "t,d", 0, v6notv9 }, /* rd %tbr,r */
00866 
00867 { "rd", F3(2, 0x28, 0)|RS1(2),    F3(~2, ~0x28, ~0)|RS1(~2)|SIMM13(~0), "E,d", 0, v9 }, /* rd %ccr,r */
00868 { "rd", F3(2, 0x28, 0)|RS1(3),    F3(~2, ~0x28, ~0)|RS1(~3)|SIMM13(~0), "o,d", 0, v9 }, /* rd %asi,r */
00869 { "rd", F3(2, 0x28, 0)|RS1(4),    F3(~2, ~0x28, ~0)|RS1(~4)|SIMM13(~0), "W,d", 0, v9 }, /* rd %tick,r */
00870 { "rd", F3(2, 0x28, 0)|RS1(5),    F3(~2, ~0x28, ~0)|RS1(~5)|SIMM13(~0), "P,d", 0, v9 }, /* rd %pc,r */
00871 { "rd", F3(2, 0x28, 0)|RS1(6),    F3(~2, ~0x28, ~0)|RS1(~6)|SIMM13(~0), "s,d", 0, v9 }, /* rd %fprs,r */
00872 
00873 { "rd", F3(2, 0x28, 0)|RS1(16),   F3(~2, ~0x28, ~0)|RS1(~16)|SIMM13(~0),  "/,d", 0, v9a }, /* rd %pcr,r */
00874 { "rd", F3(2, 0x28, 0)|RS1(17),   F3(~2, ~0x28, ~0)|RS1(~17)|SIMM13(~0),  "/,d", 0, v9a }, /* rd %pic,r */
00875 { "rd", F3(2, 0x28, 0)|RS1(18),   F3(~2, ~0x28, ~0)|RS1(~18)|SIMM13(~0),  "/,d", 0, v9a }, /* rd %dcr,r */
00876 { "rd", F3(2, 0x28, 0)|RS1(19),   F3(~2, ~0x28, ~0)|RS1(~19)|SIMM13(~0),  "/,d", 0, v9a }, /* rd %gsr,r */
00877 { "rd", F3(2, 0x28, 0)|RS1(22),   F3(~2, ~0x28, ~0)|RS1(~22)|SIMM13(~0),  "/,d", 0, v9a }, /* rd %softint,r */
00878 { "rd", F3(2, 0x28, 0)|RS1(23),   F3(~2, ~0x28, ~0)|RS1(~23)|SIMM13(~0),  "/,d", 0, v9a }, /* rd %tick_cmpr,r */
00879 { "rd", F3(2, 0x28, 0)|RS1(24),   F3(~2, ~0x28, ~0)|RS1(~24)|SIMM13(~0),  "/,d", 0, v9b }, /* rd %sys_tick,r */
00880 { "rd", F3(2, 0x28, 0)|RS1(25),   F3(~2, ~0x28, ~0)|RS1(~25)|SIMM13(~0),  "/,d", 0, v9b }, /* rd %sys_tick_cmpr,r */
00881 
00882 { "rdpr", F3(2, 0x2a, 0),   F3(~2, ~0x2a, ~0)|SIMM13(~0), "?,d", 0, v9 },   /* rdpr %priv,r */
00883 { "wrpr", F3(2, 0x32, 0),   F3(~2, ~0x32, ~0),    "1,2,!", 0, v9 }, /* wrpr r1,r2,%priv */
00884 { "wrpr", F3(2, 0x32, 0),   F3(~2, ~0x32, ~0)|SIMM13(~0), "1,!", 0, v9 },   /* wrpr r1,%priv */
00885 { "wrpr", F3(2, 0x32, 1),   F3(~2, ~0x32, ~1),    "1,i,!", 0, v9 }, /* wrpr r1,i,%priv */
00886 { "wrpr", F3(2, 0x32, 1),   F3(~2, ~0x32, ~1),    "i,1,!", F_ALIAS, v9 }, /* wrpr i,r1,%priv */
00887 { "wrpr", F3(2, 0x32, 1),   F3(~2, ~0x32, ~1)|RS1(~0),  "i,!", 0, v9 },   /* wrpr i,%priv */
00888 
00889 /* ??? This group seems wrong.  A three operand move?  */
00890 { "mov",  F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|ASI(~0),    "1,2,m", F_ALIAS, v8 }, /* wr r,r,%asrX */
00891 { "mov",  F3(2, 0x30, 1), F3(~2, ~0x30, ~1),      "1,i,m", F_ALIAS, v8 }, /* wr r,i,%asrX */
00892 { "mov",  F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|RD_G0|ASI(~0),  "1,2,y", F_ALIAS, v6 }, /* wr r,r,%y */
00893 { "mov",  F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|RD_G0,    "1,i,y", F_ALIAS, v6 }, /* wr r,i,%y */
00894 { "mov",  F3(2, 0x31, 0), F3(~2, ~0x31, ~0)|RD_G0|ASI(~0),  "1,2,p", F_ALIAS, v6notv9 }, /* wr r,r,%psr */
00895 { "mov",  F3(2, 0x31, 1), F3(~2, ~0x31, ~1)|RD_G0,    "1,i,p", F_ALIAS, v6notv9 }, /* wr r,i,%psr */
00896 { "mov",  F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|RD_G0|ASI(~0),  "1,2,w", F_ALIAS, v6notv9 }, /* wr r,r,%wim */
00897 { "mov",  F3(2, 0x32, 1), F3(~2, ~0x32, ~1)|RD_G0,    "1,i,w", F_ALIAS, v6notv9 }, /* wr r,i,%wim */
00898 { "mov",  F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|RD_G0|ASI(~0),  "1,2,t", F_ALIAS, v6notv9 }, /* wr r,r,%tbr */
00899 { "mov",  F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|RD_G0,    "1,i,t", F_ALIAS, v6notv9 }, /* wr r,i,%tbr */
00900 
00901 { "mov",  F3(2, 0x28, 0), F3(~2, ~0x28, ~0)|SIMM13(~0),   "M,d", F_ALIAS, v8 }, /* rd %asr1,r */
00902 { "mov",  F3(2, 0x28, 0), F3(~2, ~0x28, ~0)|RS1_G0|SIMM13(~0),  "y,d", F_ALIAS, v6 }, /* rd %y,r */
00903 { "mov",  F3(2, 0x29, 0), F3(~2, ~0x29, ~0)|RS1_G0|SIMM13(~0),  "p,d", F_ALIAS, v6notv9 }, /* rd %psr,r */
00904 { "mov",  F3(2, 0x2a, 0), F3(~2, ~0x2a, ~0)|RS1_G0|SIMM13(~0),  "w,d", F_ALIAS, v6notv9 }, /* rd %wim,r */
00905 { "mov",  F3(2, 0x2b, 0), F3(~2, ~0x2b, ~0)|RS1_G0|SIMM13(~0),  "t,d", F_ALIAS, v6notv9 }, /* rd %tbr,r */
00906 
00907 { "mov",  F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|ASI_RS2(~0),    "1,m", F_ALIAS, v8 }, /* wr rs1,%g0,%asrX */
00908 { "mov",  F3(2, 0x30, 1), F3(~2, ~0x30, ~1),      "i,m", F_ALIAS, v8 }, /* wr %g0,i,%asrX */
00909 { "mov",  F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|SIMM13(~0),   "1,m", F_ALIAS, v8 }, /* wr rs1,0,%asrX */
00910 { "mov",  F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|RD_G0|ASI_RS2(~0),  "1,y", F_ALIAS, v6 }, /* wr rs1,%g0,%y */
00911 { "mov",  F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|RD_G0,    "i,y", F_ALIAS, v6 }, /* wr %g0,i,%y */
00912 { "mov",  F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|RD_G0|SIMM13(~0), "1,y", F_ALIAS, v6 }, /* wr rs1,0,%y */
00913 { "mov",  F3(2, 0x31, 0), F3(~2, ~0x31, ~0)|RD_G0|ASI_RS2(~0),  "1,p", F_ALIAS, v6notv9 }, /* wr rs1,%g0,%psr */
00914 { "mov",  F3(2, 0x31, 1), F3(~2, ~0x31, ~1)|RD_G0,    "i,p", F_ALIAS, v6notv9 }, /* wr %g0,i,%psr */
00915 { "mov",  F3(2, 0x31, 1), F3(~2, ~0x31, ~1)|RD_G0|SIMM13(~0), "1,p", F_ALIAS, v6notv9 }, /* wr rs1,0,%psr */
00916 { "mov",  F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|RD_G0|ASI_RS2(~0),  "1,w", F_ALIAS, v6notv9 }, /* wr rs1,%g0,%wim */
00917 { "mov",  F3(2, 0x32, 1), F3(~2, ~0x32, ~1)|RD_G0,    "i,w", F_ALIAS, v6notv9 }, /* wr %g0,i,%wim */
00918 { "mov",  F3(2, 0x32, 1), F3(~2, ~0x32, ~1)|RD_G0|SIMM13(~0), "1,w", F_ALIAS, v6notv9 }, /* wr rs1,0,%wim */
00919 { "mov",  F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|RD_G0|ASI_RS2(~0),  "1,t", F_ALIAS, v6notv9 }, /* wr rs1,%g0,%tbr */
00920 { "mov",  F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|RD_G0,    "i,t", F_ALIAS, v6notv9 }, /* wr %g0,i,%tbr */
00921 { "mov",  F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|RD_G0|SIMM13(~0), "1,t", F_ALIAS, v6notv9 }, /* wr rs1,0,%tbr */
00922 
00923 { "mov",  F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|RS1_G0|ASI(~0), "2,d", 0, v6 }, /* or %g0,rs2,d */
00924 { "mov",  F3(2, 0x02, 1), F3(~2, ~0x02, ~1)|RS1_G0,   "i,d", 0, v6 }, /* or %g0,i,d */
00925 { "mov",        F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|ASI_RS2(~0),    "1,d", 0, v6 }, /* or rs1,%g0,d   */
00926 { "mov",        F3(2, 0x02, 1), F3(~2, ~0x02, ~1)|SIMM13(~0),   "1,d", 0, v6 }, /* or rs1,0,d */
00927 
00928 { "or", F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|ASI(~0),  "1,2,d", 0, v6 },
00929 { "or", F3(2, 0x02, 1), F3(~2, ~0x02, ~1),    "1,i,d", 0, v6 },
00930 { "or", F3(2, 0x02, 1), F3(~2, ~0x02, ~1),    "i,1,d", 0, v6 },
00931 
00932 { "bset", F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|ASI(~0),  "2,r", F_ALIAS, v6 }, /* or rd,rs2,rd */
00933 { "bset", F3(2, 0x02, 1), F3(~2, ~0x02, ~1),    "i,r", F_ALIAS, v6 }, /* or rd,i,rd */
00934 
00935 /* This is not a commutative instruction.  */
00936 { "andn", F3(2, 0x05, 0), F3(~2, ~0x05, ~0)|ASI(~0),  "1,2,d", 0, v6 },
00937 { "andn", F3(2, 0x05, 1), F3(~2, ~0x05, ~1),    "1,i,d", 0, v6 },
00938 
00939 /* This is not a commutative instruction.  */
00940 { "andncc", F3(2, 0x15, 0), F3(~2, ~0x15, ~0)|ASI(~0),  "1,2,d", 0, v6 },
00941 { "andncc", F3(2, 0x15, 1), F3(~2, ~0x15, ~1),    "1,i,d", 0, v6 },
00942 
00943 { "bclr", F3(2, 0x05, 0), F3(~2, ~0x05, ~0)|ASI(~0),  "2,r", F_ALIAS, v6 }, /* andn rd,rs2,rd */
00944 { "bclr", F3(2, 0x05, 1), F3(~2, ~0x05, ~1),    "i,r", F_ALIAS, v6 }, /* andn rd,i,rd */
00945 
00946 { "cmp",  F3(2, 0x14, 0), F3(~2, ~0x14, ~0)|RD_G0|ASI(~0),  "1,2", 0, v6 }, /* subcc rs1,rs2,%g0 */
00947 { "cmp",  F3(2, 0x14, 1), F3(~2, ~0x14, ~1)|RD_G0,    "1,i", 0, v6 }, /* subcc rs1,i,%g0 */
00948 
00949 { "sub",  F3(2, 0x04, 0), F3(~2, ~0x04, ~0)|ASI(~0),  "1,2,d", 0, v6 },
00950 { "sub",  F3(2, 0x04, 1), F3(~2, ~0x04, ~1),    "1,i,d", 0, v6 },
00951 
00952 { "subcc",  F3(2, 0x14, 0), F3(~2, ~0x14, ~0)|ASI(~0),  "1,2,d", 0, v6 },
00953 { "subcc",  F3(2, 0x14, 1), F3(~2, ~0x14, ~1),    "1,i,d", 0, v6 },
00954 
00955 { "subx", F3(2, 0x0c, 0), F3(~2, ~0x0c, ~0)|ASI(~0),  "1,2,d", 0, v6notv9 },
00956 { "subx", F3(2, 0x0c, 1), F3(~2, ~0x0c, ~1),    "1,i,d", 0, v6notv9 },
00957 { "subc", F3(2, 0x0c, 0), F3(~2, ~0x0c, ~0)|ASI(~0),  "1,2,d", 0, v9 },
00958 { "subc", F3(2, 0x0c, 1), F3(~2, ~0x0c, ~1),    "1,i,d", 0, v9 },
00959 
00960 { "subxcc", F3(2, 0x1c, 0), F3(~2, ~0x1c, ~0)|ASI(~0),  "1,2,d", 0, v6notv9 },
00961 { "subxcc", F3(2, 0x1c, 1), F3(~2, ~0x1c, ~1),    "1,i,d", 0, v6notv9 },
00962 { "subccc", F3(2, 0x1c, 0), F3(~2, ~0x1c, ~0)|ASI(~0),  "1,2,d", 0, v9 },
00963 { "subccc", F3(2, 0x1c, 1), F3(~2, ~0x1c, ~1),    "1,i,d", 0, v9 },
00964 
00965 { "and",  F3(2, 0x01, 0), F3(~2, ~0x01, ~0)|ASI(~0),  "1,2,d", 0, v6 },
00966 { "and",  F3(2, 0x01, 1), F3(~2, ~0x01, ~1),    "1,i,d", 0, v6 },
00967 { "and",  F3(2, 0x01, 1), F3(~2, ~0x01, ~1),    "i,1,d", 0, v6 },
00968 
00969 { "andcc",  F3(2, 0x11, 0), F3(~2, ~0x11, ~0)|ASI(~0),  "1,2,d", 0, v6 },
00970 { "andcc",  F3(2, 0x11, 1), F3(~2, ~0x11, ~1),    "1,i,d", 0, v6 },
00971 { "andcc",  F3(2, 0x11, 1), F3(~2, ~0x11, ~1),    "i,1,d", 0, v6 },
00972 
00973 { "dec",  F3(2, 0x04, 1)|SIMM13(0x1), F3(~2, ~0x04, ~1)|SIMM13(~0x0001), "r", F_ALIAS, v6 },  /* sub rd,1,rd */
00974 { "dec",  F3(2, 0x04, 1),       F3(~2, ~0x04, ~1),           "i,r", F_ALIAS, v8 },  /* sub rd,imm,rd */
00975 { "deccc",  F3(2, 0x14, 1)|SIMM13(0x1), F3(~2, ~0x14, ~1)|SIMM13(~0x0001), "r", F_ALIAS, v6 },  /* subcc rd,1,rd */
00976 { "deccc",  F3(2, 0x14, 1),       F3(~2, ~0x14, ~1),           "i,r", F_ALIAS, v8 },  /* subcc rd,imm,rd */
00977 { "inc",  F3(2, 0x00, 1)|SIMM13(0x1), F3(~2, ~0x00, ~1)|SIMM13(~0x0001), "r", F_ALIAS, v6 },  /* add rd,1,rd */
00978 { "inc",  F3(2, 0x00, 1),       F3(~2, ~0x00, ~1),           "i,r", F_ALIAS, v8 },  /* add rd,imm,rd */
00979 { "inccc",  F3(2, 0x10, 1)|SIMM13(0x1), F3(~2, ~0x10, ~1)|SIMM13(~0x0001), "r", F_ALIAS, v6 },  /* addcc rd,1,rd */
00980 { "inccc",  F3(2, 0x10, 1),       F3(~2, ~0x10, ~1),           "i,r", F_ALIAS, v8 },  /* addcc rd,imm,rd */
00981 
00982 { "btst", F3(2, 0x11, 0), F3(~2, ~0x11, ~0)|RD_G0|ASI(~0), "1,2", F_ALIAS, v6 },  /* andcc rs1,rs2,%g0 */
00983 { "btst", F3(2, 0x11, 1), F3(~2, ~0x11, ~1)|RD_G0, "i,1", F_ALIAS, v6 },  /* andcc rs1,i,%g0 */
00984 
00985 { "neg",  F3(2, 0x04, 0), F3(~2, ~0x04, ~0)|RS1_G0|ASI(~0), "2,d", F_ALIAS, v6 }, /* sub %g0,rs2,rd */
00986 { "neg",  F3(2, 0x04, 0), F3(~2, ~0x04, ~0)|RS1_G0|ASI(~0), "O", F_ALIAS, v6 }, /* sub %g0,rd,rd */
00987 
00988 { "add",  F3(2, 0x00, 0), F3(~2, ~0x00, ~0)|ASI(~0),  "1,2,d", 0, v6 },
00989 { "add",  F3(2, 0x00, 1), F3(~2, ~0x00, ~1),    "1,i,d", 0, v6 },
00990 { "add",  F3(2, 0x00, 1), F3(~2, ~0x00, ~1),    "i,1,d", 0, v6 },
00991 { "addcc",  F3(2, 0x10, 0), F3(~2, ~0x10, ~0)|ASI(~0),  "1,2,d", 0, v6 },
00992 { "addcc",  F3(2, 0x10, 1), F3(~2, ~0x10, ~1),    "1,i,d", 0, v6 },
00993 { "addcc",  F3(2, 0x10, 1), F3(~2, ~0x10, ~1),    "i,1,d", 0, v6 },
00994 
00995 { "addx", F3(2, 0x08, 0), F3(~2, ~0x08, ~0)|ASI(~0),  "1,2,d", 0, v6notv9 },
00996 { "addx", F3(2, 0x08, 1), F3(~2, ~0x08, ~1),    "1,i,d", 0, v6notv9 },
00997 { "addx", F3(2, 0x08, 1), F3(~2, ~0x08, ~1),    "i,1,d", 0, v6notv9 },
00998 { "addc", F3(2, 0x08, 0), F3(~2, ~0x08, ~0)|ASI(~0),  "1,2,d", 0, v9 },
00999 { "addc", F3(2, 0x08, 1), F3(~2, ~0x08, ~1),    "1,i,d", 0, v9 },
01000 { "addc", F3(2, 0x08, 1), F3(~2, ~0x08, ~1),    "i,1,d", 0, v9 },
01001 
01002 { "addxcc", F3(2, 0x18, 0), F3(~2, ~0x18, ~0)|ASI(~0),  "1,2,d", 0, v6notv9 },
01003 { "addxcc", F3(2, 0x18, 1), F3(~2, ~0x18, ~1),    "1,i,d", 0, v6notv9 },
01004 { "addxcc", F3(2, 0x18, 1), F3(~2, ~0x18, ~1),    "i,1,d", 0, v6notv9 },
01005 { "addccc", F3(2, 0x18, 0), F3(~2, ~0x18, ~0)|ASI(~0),  "1,2,d", 0, v9 },
01006 { "addccc", F3(2, 0x18, 1), F3(~2, ~0x18, ~1),    "1,i,d", 0, v9 },
01007 { "addccc", F3(2, 0x18, 1), F3(~2, ~0x18, ~1),    "i,1,d", 0, v9 },
01008 
01009 { "smul", F3(2, 0x0b, 0), F3(~2, ~0x0b, ~0)|ASI(~0),  "1,2,d", 0, v8 },
01010 { "smul", F3(2, 0x0b, 1), F3(~2, ~0x0b, ~1),    "1,i,d", 0, v8 },
01011 { "smul", F3(2, 0x0b, 1), F3(~2, ~0x0b, ~1),    "i,1,d", 0, v8 },
01012 { "smulcc", F3(2, 0x1b, 0), F3(~2, ~0x1b, ~0)|ASI(~0),  "1,2,d", 0, v8 },
01013 { "smulcc", F3(2, 0x1b, 1), F3(~2, ~0x1b, ~1),    "1,i,d", 0, v8 },
01014 { "smulcc", F3(2, 0x1b, 1), F3(~2, ~0x1b, ~1),    "i,1,d", 0, v8 },
01015 { "umul", F3(2, 0x0a, 0), F3(~2, ~0x0a, ~0)|ASI(~0),  "1,2,d", 0, v8 },
01016 { "umul", F3(2, 0x0a, 1), F3(~2, ~0x0a, ~1),    "1,i,d", 0, v8 },
01017 { "umul", F3(2, 0x0a, 1), F3(~2, ~0x0a, ~1),    "i,1,d", 0, v8 },
01018 { "umulcc", F3(2, 0x1a, 0), F3(~2, ~0x1a, ~0)|ASI(~0),  "1,2,d", 0, v8 },
01019 { "umulcc", F3(2, 0x1a, 1), F3(~2, ~0x1a, ~1),    "1,i,d", 0, v8 },
01020 { "umulcc", F3(2, 0x1a, 1), F3(~2, ~0x1a, ~1),    "i,1,d", 0, v8 },
01021 { "sdiv", F3(2, 0x0f, 0), F3(~2, ~0x0f, ~0)|ASI(~0),  "1,2,d", 0, v8 },
01022 { "sdiv", F3(2, 0x0f, 1), F3(~2, ~0x0f, ~1),    "1,i,d", 0, v8 },
01023 { "sdiv", F3(2, 0x0f, 1), F3(~2, ~0x0f, ~1),    "i,1,d", 0, v8 },
01024 { "sdivcc", F3(2, 0x1f, 0), F3(~2, ~0x1f, ~0)|ASI(~0),  "1,2,d", 0, v8 },
01025 { "sdivcc", F3(2, 0x1f, 1), F3(~2, ~0x1f, ~1),    "1,i,d", 0, v8 },
01026 { "sdivcc", F3(2, 0x1f, 1), F3(~2, ~0x1f, ~1),    "i,1,d", 0, v8 },
01027 { "udiv", F3(2, 0x0e, 0), F3(~2, ~0x0e, ~0)|ASI(~0),  "1,2,d", 0, v8 },
01028 { "udiv", F3(2, 0x0e, 1), F3(~2, ~0x0e, ~1),    "1,i,d", 0, v8 },
01029 { "udiv", F3(2, 0x0e, 1), F3(~2, ~0x0e, ~1),    "i,1,d", 0, v8 },
01030 { "udivcc", F3(2, 0x1e, 0), F3(~2, ~0x1e, ~0)|ASI(~0),  "1,2,d", 0, v8 },
01031 { "udivcc", F3(2, 0x1e, 1), F3(~2, ~0x1e, ~1),    "1,i,d", 0, v8 },
01032 { "udivcc", F3(2, 0x1e, 1), F3(~2, ~0x1e, ~1),    "i,1,d", 0, v8 },
01033 
01034 { "mulx", F3(2, 0x09, 0), F3(~2, ~0x09, ~0)|ASI(~0),  "1,2,d", 0, v9 },
01035 { "mulx", F3(2, 0x09, 1), F3(~2, ~0x09, ~1),    "1,i,d", 0, v9 },
01036 { "sdivx",  F3(2, 0x2d, 0), F3(~2, ~0x2d, ~0)|ASI(~0),  "1,2,d", 0, v9 },
01037 { "sdivx",  F3(2, 0x2d, 1), F3(~2, ~0x2d, ~1),    "1,i,d", 0, v9 },
01038 { "udivx",  F3(2, 0x0d, 0), F3(~2, ~0x0d, ~0)|ASI(~0),  "1,2,d", 0, v9 },
01039 { "udivx",  F3(2, 0x0d, 1), F3(~2, ~0x0d, ~1),    "1,i,d", 0, v9 },
01040 
01041 { "call", F1(0x1), F1(~0x1), "L", F_JSR|F_DELAYED, v6 },
01042 { "call", F1(0x1), F1(~0x1), "L,#", F_JSR|F_DELAYED, v6 },
01043 
01044 { "call", F3(2, 0x38, 0)|RD(0xf), F3(~2, ~0x38, ~0)|RD(~0xf)|ASI(~0), "1+2", F_JSR|F_DELAYED, v6 }, /* jmpl rs1+rs2,%o7 */
01045 { "call", F3(2, 0x38, 0)|RD(0xf), F3(~2, ~0x38, ~0)|RD(~0xf)|ASI(~0), "1+2,#", F_JSR|F_DELAYED, v6 },
01046 { "call", F3(2, 0x38, 0)|RD(0xf), F3(~2, ~0x38, ~0)|RD(~0xf)|ASI_RS2(~0), "1", F_JSR|F_DELAYED, v6 }, /* jmpl rs1+%g0,%o7 */
01047 { "call", F3(2, 0x38, 0)|RD(0xf), F3(~2, ~0x38, ~0)|RD(~0xf)|ASI_RS2(~0), "1,#", F_JSR|F_DELAYED, v6 },
01048 { "call", F3(2, 0x38, 1)|RD(0xf), F3(~2, ~0x38, ~1)|RD(~0xf),   "1+i", F_JSR|F_DELAYED, v6 }, /* jmpl rs1+i,%o7 */
01049 { "call", F3(2, 0x38, 1)|RD(0xf), F3(~2, ~0x38, ~1)|RD(~0xf),   "1+i,#", F_JSR|F_DELAYED, v6 },
01050 { "call", F3(2, 0x38, 1)|RD(0xf), F3(~2, ~0x38, ~1)|RD(~0xf),   "i+1", F_JSR|F_DELAYED, v6 }, /* jmpl i+rs1,%o7 */
01051 { "call", F3(2, 0x38, 1)|RD(0xf), F3(~2, ~0x38, ~1)|RD(~0xf),   "i+1,#", F_JSR|F_DELAYED, v6 },
01052 { "call", F3(2, 0x38, 1)|RD(0xf), F3(~2, ~0x38, ~1)|RD(~0xf)|RS1_G0,  "i", F_JSR|F_DELAYED, v6 }, /* jmpl %g0+i,%o7 */
01053 { "call", F3(2, 0x38, 1)|RD(0xf), F3(~2, ~0x38, ~1)|RD(~0xf)|RS1_G0,  "i,#", F_JSR|F_DELAYED, v6 },
01054 { "call", F3(2, 0x38, 1)|RD(0xf), F3(~2, ~0x38, ~1)|RD(~0xf)|SIMM13(~0),  "1", F_JSR|F_DELAYED, v6 }, /* jmpl rs1+0,%o7 */
01055 { "call", F3(2, 0x38, 1)|RD(0xf), F3(~2, ~0x38, ~1)|RD(~0xf)|SIMM13(~0),  "1,#", F_JSR|F_DELAYED, v6 },
01056 
01057 
01058 /* Conditional instructions.
01059 
01060    Because this part of the table was such a mess earlier, I have
01061    macrofied it so that all the branches and traps are generated from
01062    a single-line description of each condition value.  John Gilmore. */
01063 
01064 /* Define branches -- one annulled, one without, etc. */
01065 #define br(opcode, mask, lose, flags) \
01066  { opcode, (mask)|ANNUL, (lose),       ",a l",   (flags), v6 }, \
01067  { opcode, (mask)      , (lose)|ANNUL, "l",     (flags), v6 }
01068 
01069 #define brx(opcode, mask, lose, flags) /* v9 */ \
01070  { opcode, (mask)|(2<<20)|BPRED, ANNUL|(lose), "Z,G",      (flags), v9 }, \
01071  { opcode, (mask)|(2<<20)|BPRED, ANNUL|(lose), ",T Z,G",   (flags), v9 }, \
01072  { opcode, (mask)|(2<<20)|BPRED|ANNUL, (lose), ",a Z,G",   (flags), v9 }, \
01073  { opcode, (mask)|(2<<20)|BPRED|ANNUL, (lose), ",a,T Z,G", (flags), v9 }, \
01074  { opcode, (mask)|(2<<20), ANNUL|BPRED|(lose), ",N Z,G",   (flags), v9 }, \
01075  { opcode, (mask)|(2<<20)|ANNUL, BPRED|(lose), ",a,N Z,G", (flags), v9 }, \
01076  { opcode, (mask)|BPRED, ANNUL|(lose)|(2<<20), "z,G",      (flags), v9 }, \
01077  { opcode, (mask)|BPRED, ANNUL|(lose)|(2<<20), ",T z,G",   (flags), v9 }, \
01078  { opcode, (mask)|BPRED|ANNUL, (lose)|(2<<20), ",a z,G",   (flags), v9 }, \
01079  { opcode, (mask)|BPRED|ANNUL, (lose)|(2<<20), ",a,T z,G", (flags), v9 }, \
01080  { opcode, (mask), ANNUL|BPRED|(lose)|(2<<20), ",N z,G",   (flags), v9 }, \
01081  { opcode, (mask)|ANNUL, BPRED|(lose)|(2<<20), ",a,N z,G", (flags), v9 }
01082 
01083 /* Define four traps: reg+reg, reg + immediate, immediate alone, reg alone. */
01084 #define tr(opcode, mask, lose, flags) \
01085  { opcode, (mask)|(2<<11)|IMMED, (lose)|RS1_G0, "Z,i",   (flags), v9 }, /* %g0 + imm */ \
01086  { opcode, (mask)|(2<<11)|IMMED, (lose),  "Z,1+i", (flags), v9 }, /* rs1 + imm */ \
01087  { opcode, (mask)|(2<<11), IMMED|(lose),  "Z,1+2", (flags), v9 }, /* rs1 + rs2 */ \
01088  { opcode, (mask)|(2<<11), IMMED|(lose)|RS2_G0, "Z,1",   (flags), v9 }, /* rs1 + %g0 */ \
01089  { opcode, (mask)|IMMED, (lose)|RS1_G0, "z,i",   (flags)|F_ALIAS, v9 }, /* %g0 + imm */ \
01090  { opcode, (mask)|IMMED, (lose),  "z,1+i", (flags)|F_ALIAS, v9 }, /* rs1 + imm */ \
01091  { opcode, (mask), IMMED|(lose),  "z,1+2", (flags)|F_ALIAS, v9 }, /* rs1 + rs2 */ \
01092  { opcode, (mask), IMMED|(lose)|RS2_G0, "z,1",   (flags)|F_ALIAS, v9 }, /* rs1 + %g0 */ \
01093  { opcode, (mask)|IMMED, (lose)|RS1_G0,   "i",     (flags), v6 }, /* %g0 + imm */ \
01094  { opcode, (mask)|IMMED, (lose),    "1+i",   (flags), v6 }, /* rs1 + imm */ \
01095  { opcode, (mask), IMMED|(lose),    "1+2",   (flags), v6 }, /* rs1 + rs2 */ \
01096  { opcode, (mask), IMMED|(lose)|RS2_G0,   "1",     (flags), v6 } /* rs1 + %g0 */
01097 
01098 /* v9: We must put `brx' before `br', to ensure that we never match something
01099    v9: against an expression unless it is an expression.  Otherwise, we end
01100    v9: up with undefined symbol tables entries, because they get added, but
01101    v9: are not deleted if the pattern fails to match.  */
01102 
01103 /* Define both branches and traps based on condition mask */
01104 #define cond(bop, top, mask, flags) \
01105   brx(bop, F2(0, 1)|(mask), F2(~0, ~1)|((~mask)&COND(~0)), F_DELAYED|(flags)), /* v9 */ \
01106   br(bop,  F2(0, 2)|(mask), F2(~0, ~2)|((~mask)&COND(~0)), F_DELAYED|(flags)), \
01107   tr(top,  F3(2, 0x3a, 0)|(mask), F3(~2, ~0x3a, 0)|((~mask)&COND(~0)), ((flags) & ~(F_UNBR|F_CONDBR)))
01108 
01109 /* Define all the conditions, all the branches, all the traps.  */
01110 
01111 /* Standard branch, trap mnemonics */
01112 cond ("b",  "ta",   CONDA, F_UNBR),
01113 /* Alternative form (just for assembly, not for disassembly) */
01114 cond ("ba", "t",    CONDA, F_UNBR|F_ALIAS),
01115 
01116 cond ("bcc",  "tcc",  CONDCC, F_CONDBR),
01117 cond ("bcs",  "tcs",  CONDCS, F_CONDBR),
01118 cond ("be", "te",   CONDE, F_CONDBR),
01119 cond ("beq",  "teq",  CONDE, F_CONDBR|F_ALIAS),
01120 cond ("bg", "tg",   CONDG, F_CONDBR),
01121 cond ("bgt",  "tgt",  CONDG, F_CONDBR|F_ALIAS),
01122 cond ("bge",  "tge",  CONDGE, F_CONDBR),
01123 cond ("bgeu", "tgeu", CONDGEU, F_CONDBR|F_ALIAS), /* for cc */
01124 cond ("bgu",  "tgu",  CONDGU, F_CONDBR),
01125 cond ("bl", "tl",   CONDL, F_CONDBR),
01126 cond ("blt",  "tlt",  CONDL, F_CONDBR|F_ALIAS),
01127 cond ("ble",  "tle",  CONDLE, F_CONDBR),
01128 cond ("bleu", "tleu", CONDLEU, F_CONDBR),
01129 cond ("blu",  "tlu",  CONDLU, F_CONDBR|F_ALIAS), /* for cs */
01130 cond ("bn", "tn",   CONDN, F_CONDBR),
01131 cond ("bne",  "tne",  CONDNE, F_CONDBR),
01132 cond ("bneg", "tneg", CONDNEG, F_CONDBR),
01133 cond ("bnz",  "tnz",  CONDNZ, F_CONDBR|F_ALIAS), /* for ne */
01134 cond ("bpos", "tpos", CONDPOS, F_CONDBR),
01135 cond ("bvc",  "tvc",  CONDVC, F_CONDBR),
01136 cond ("bvs",  "tvs",  CONDVS, F_CONDBR),
01137 cond ("bz", "tz",   CONDZ, F_CONDBR|F_ALIAS), /* for e */
01138 
01139 #undef cond
01140 #undef br
01141 #undef brr /* v9 */
01142 #undef tr
01143 
01144 #define brr(opcode, mask, lose, flags) /* v9 */ \
01145  { opcode, (mask)|BPRED, ANNUL|(lose), "1,k",      F_DELAYED|(flags), v9 }, \
01146  { opcode, (mask)|BPRED, ANNUL|(lose), ",T 1,k",   F_DELAYED|(flags), v9 }, \
01147  { opcode, (mask)|BPRED|ANNUL, (lose), ",a 1,k",   F_DELAYED|(flags), v9 }, \
01148  { opcode, (mask)|BPRED|ANNUL, (lose), ",a,T 1,k", F_DELAYED|(flags), v9 }, \
01149  { opcode, (mask), ANNUL|BPRED|(lose), ",N 1,k",   F_DELAYED|(flags), v9 }, \
01150  { opcode, (mask)|ANNUL, BPRED|(lose), ",a,N 1,k", F_DELAYED|(flags), v9 }
01151 
01152 #define condr(bop, mask, flags) /* v9 */ \
01153   brr(bop, F2(0, 3)|COND(mask), F2(~0, ~3)|COND(~(mask)), (flags)) /* v9 */
01154 
01155 /* v9 */ condr("brnz", 0x5, F_CONDBR),
01156 /* v9 */ condr("brz", 0x1, F_CONDBR),
01157 /* v9 */ condr("brgez", 0x7, F_CONDBR),
01158 /* v9 */ condr("brlz", 0x3, F_CONDBR),
01159 /* v9 */ condr("brlez", 0x2, F_CONDBR),
01160 /* v9 */ condr("brgz", 0x6, F_CONDBR),
01161 
01162 #undef condr /* v9 */
01163 #undef brr /* v9 */
01164 
01165 #define movr(opcode, mask, flags) /* v9 */ \
01166  { opcode, F3(2, 0x2f, 0)|RCOND(mask), F3(~2, ~0x2f, ~0)|RCOND(~(mask)), "1,2,d", (flags), v9 }, \
01167  { opcode, F3(2, 0x2f, 1)|RCOND(mask), F3(~2, ~0x2f, ~1)|RCOND(~(mask)), "1,j,d", (flags), v9 }
01168 
01169 #define fmrrs(opcode, mask, lose, flags) /* v9 */ \
01170  { opcode, (mask), (lose), "1,f,g", (flags) | F_FLOAT, v9 }
01171 #define fmrrd(opcode, mask, lose, flags) /* v9 */ \
01172  { opcode, (mask), (lose), "1,B,H", (flags) | F_FLOAT, v9 }
01173 #define fmrrq(opcode, mask, lose, flags) /* v9 */ \
01174  { opcode, (mask), (lose), "1,R,J", (flags) | F_FLOAT, v9 }
01175 
01176 #define fmovrs(mop, mask, flags) /* v9 */ \
01177   fmrrs(mop, F3(2, 0x35, 0)|OPF_LOW5(5)|RCOND(mask), F3(~2, ~0x35, 0)|OPF_LOW5(~5)|RCOND(~(mask)), (flags)) /* v9 */
01178 #define fmovrd(mop, mask, flags) /* v9 */ \
01179   fmrrd(mop, F3(2, 0x35, 0)|OPF_LOW5(6)|RCOND(mask), F3(~2, ~0x35, 0)|OPF_LOW5(~6)|RCOND(~(mask)), (flags)) /* v9 */
01180 #define fmovrq(mop, mask, flags) /* v9 */ \
01181   fmrrq(mop, F3(2, 0x35, 0)|OPF_LOW5(7)|RCOND(mask), F3(~2, ~0x35, 0)|OPF_LOW5(~7)|RCOND(~(mask)), (flags)) /* v9 */
01182 
01183 /* v9 */ movr("movrne", 0x5, 0),
01184 /* v9 */ movr("movre", 0x1, 0),
01185 /* v9 */ movr("movrgez", 0x7, 0),
01186 /* v9 */ movr("movrlz", 0x3, 0),
01187 /* v9 */ movr("movrlez", 0x2, 0),
01188 /* v9 */ movr("movrgz", 0x6, 0),
01189 /* v9 */ movr("movrnz", 0x5, F_ALIAS),
01190 /* v9 */ movr("movrz", 0x1, F_ALIAS),
01191 
01192 /* v9 */ fmovrs("fmovrsne", 0x5, 0),
01193 /* v9 */ fmovrs("fmovrse", 0x1, 0),
01194 /* v9 */ fmovrs("fmovrsgez", 0x7, 0),
01195 /* v9 */ fmovrs("fmovrslz", 0x3, 0),
01196 /* v9 */ fmovrs("fmovrslez", 0x2, 0),
01197 /* v9 */ fmovrs("fmovrsgz", 0x6, 0),
01198 /* v9 */ fmovrs("fmovrsnz", 0x5, F_ALIAS),
01199 /* v9 */ fmovrs("fmovrsz", 0x1, F_ALIAS),
01200 
01201 /* v9 */ fmovrd("fmovrdne", 0x5, 0),
01202 /* v9 */ fmovrd("fmovrde", 0x1, 0),
01203 /* v9 */ fmovrd("fmovrdgez", 0x7, 0),
01204 /* v9 */ fmovrd("fmovrdlz", 0x3, 0),
01205 /* v9 */ fmovrd("fmovrdlez", 0x2, 0),
01206 /* v9 */ fmovrd("fmovrdgz", 0x6, 0),
01207 /* v9 */ fmovrd("fmovrdnz", 0x5, F_ALIAS),
01208 /* v9 */ fmovrd("fmovrdz", 0x1, F_ALIAS),
01209 
01210 /* v9 */ fmovrq("fmovrqne", 0x5, 0),
01211 /* v9 */ fmovrq("fmovrqe", 0x1, 0),
01212 /* v9 */ fmovrq("fmovrqgez", 0x7, 0),
01213 /* v9 */ fmovrq("fmovrqlz", 0x3, 0),
01214 /* v9 */ fmovrq("fmovrqlez", 0x2, 0),
01215 /* v9 */ fmovrq("fmovrqgz", 0x6, 0),
01216 /* v9 */ fmovrq("fmovrqnz", 0x5, F_ALIAS),
01217 /* v9 */ fmovrq("fmovrqz", 0x1, F_ALIAS),
01218 
01219 #undef movr /* v9 */
01220 #undef fmovr /* v9 */
01221 #undef fmrr /* v9 */
01222 
01223 #define movicc(opcode, cond, flags) /* v9 */ \
01224   { opcode, F3(2, 0x2c, 0)|MCOND(cond,1)|ICC, F3(~2, ~0x2c, ~0)|MCOND(~cond,~1)|XCC|(1<<11), "z,2,d", flags, v9 }, \
01225   { opcode, F3(2, 0x2c, 1)|MCOND(cond,1)|ICC, F3(~2, ~0x2c, ~1)|MCOND(~cond,~1)|XCC|(1<<11), "z,I,d", flags, v9 }, \
01226   { opcode, F3(2, 0x2c, 0)|MCOND(cond,1)|XCC, F3(~2, ~0x2c, ~0)|MCOND(~cond,~1)|(1<<11),     "Z,2,d", flags, v9 }, \
01227   { opcode, F3(2, 0x2c, 1)|MCOND(cond,1)|XCC, F3(~2, ~0x2c, ~1)|MCOND(~cond,~1)|(1<<11),     "Z,I,d", flags, v9 }
01228 
01229 #define movfcc(opcode, fcond, flags) /* v9 */ \
01230   { opcode, F3(2, 0x2c, 0)|FCC(0)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", flags, v9 }, \
01231   { opcode, F3(2, 0x2c, 1)|FCC(0)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", flags, v9 }, \
01232   { opcode, F3(2, 0x2c, 0)|FCC(1)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", flags, v9 }, \
01233   { opcode, F3(2, 0x2c, 1)|FCC(1)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", flags, v9 }, \
01234   { opcode, F3(2, 0x2c, 0)|FCC(2)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", flags, v9 }, \
01235   { opcode, F3(2, 0x2c, 1)|FCC(2)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", flags, v9 }, \
01236   { opcode, F3(2, 0x2c, 0)|FCC(3)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", flags, v9 }, \
01237   { opcode, F3(2, 0x2c, 1)|FCC(3)|MCOND(fcond,0), MCOND(~fcond,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", flags, v9 }
01238 
01239 #define movcc(opcode, cond, fcond, flags) /* v9 */ \
01240   movfcc (opcode, fcond, flags), /* v9 */ \
01241   movicc (opcode, cond, flags) /* v9 */
01242 
01243 /* v9 */ movcc  ("mova",  CONDA, FCONDA, 0),
01244 /* v9 */ movicc ("movcc", CONDCC, 0),
01245 /* v9 */ movicc ("movgeu",  CONDGEU, F_ALIAS),
01246 /* v9 */ movicc ("movcs", CONDCS, 0),
01247 /* v9 */ movicc ("movlu", CONDLU, F_ALIAS),
01248 /* v9 */ movcc  ("move",  CONDE, FCONDE, 0),
01249 /* v9 */ movcc  ("movg",  CONDG, FCONDG, 0),
01250 /* v9 */ movcc  ("movge", CONDGE, FCONDGE, 0),
01251 /* v9 */ movicc ("movgu", CONDGU, 0),
01252 /* v9 */ movcc  ("movl",  CONDL, FCONDL, 0),
01253 /* v9 */ movcc  ("movle", CONDLE, FCONDLE, 0),
01254 /* v9 */ movicc ("movleu",  CONDLEU, 0),
01255 /* v9 */ movfcc ("movlg", FCONDLG, 0),
01256 /* v9 */ movcc  ("movn",  CONDN, FCONDN, 0),
01257 /* v9 */ movcc  ("movne", CONDNE, FCONDNE, 0),
01258 /* v9 */ movicc ("movneg",  CONDNEG, 0),
01259 /* v9 */ movcc  ("movnz", CONDNZ, FCONDNZ, F_ALIAS),
01260 /* v9 */ movfcc ("movo",  FCONDO, 0),
01261 /* v9 */ movicc ("movpos",  CONDPOS, 0),
01262 /* v9 */ movfcc ("movu",  FCONDU, 0),
01263 /* v9 */ movfcc ("movue", FCONDUE, 0),
01264 /* v9 */ movfcc ("movug", FCONDUG, 0),
01265 /* v9 */ movfcc ("movuge",  FCONDUGE, 0),
01266 /* v9 */ movfcc ("movul", FCONDUL, 0),
01267 /* v9 */ movfcc ("movule",  FCONDULE, 0),
01268 /* v9 */ movicc ("movvc", CONDVC, 0),
01269 /* v9 */ movicc ("movvs", CONDVS, 0),
01270 /* v9 */ movcc  ("movz",  CONDZ, FCONDZ, F_ALIAS),
01271 
01272 #undef movicc /* v9 */
01273 #undef movfcc /* v9 */
01274 #undef movcc /* v9 */
01275 
01276 #define FM_SF 1   /* v9 - values for fpsize */
01277 #define FM_DF 2   /* v9 */
01278 #define FM_QF 3   /* v9 */
01279 
01280 #define fmoviccx(opcode, fpsize, args, cond, flags) /* v9 */ \
01281 { opcode, F3F(2, 0x35, 0x100+fpsize)|MCOND(cond,0),  F3F(~2, ~0x35, ~(0x100+fpsize))|MCOND(~cond,~0),  "z," args, flags, v9 }, \
01282 { opcode, F3F(2, 0x35, 0x180+fpsize)|MCOND(cond,0),  F3F(~2, ~0x35, ~(0x180+fpsize))|MCOND(~cond,~0),  "Z," args, flags, v9 }
01283 
01284 #define fmovfccx(opcode, fpsize, args, fcond, flags) /* v9 */ \
01285 { opcode, F3F(2, 0x35, 0x000+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x000+fpsize))|MCOND(~fcond,~0), "6," args, flags, v9 }, \
01286 { opcode, F3F(2, 0x35, 0x040+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x040+fpsize))|MCOND(~fcond,~0), "7," args, flags, v9 }, \
01287 { opcode, F3F(2, 0x35, 0x080+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x080+fpsize))|MCOND(~fcond,~0), "8," args, flags, v9 }, \
01288 { opcode, F3F(2, 0x35, 0x0c0+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x0c0+fpsize))|MCOND(~fcond,~0), "9," args, flags, v9 }
01289 
01290 /* FIXME: use fmovicc/fmovfcc? */ /* v9 */
01291 #define fmovccx(opcode, fpsize, args, cond, fcond, flags) /* v9 */ \
01292 { opcode, F3F(2, 0x35, 0x100+fpsize)|MCOND(cond,0),  F3F(~2, ~0x35, ~(0x100+fpsize))|MCOND(~cond,~0),  "z," args, flags | F_FLOAT, v9 }, \
01293 { opcode, F3F(2, 0x35, 0x000+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x000+fpsize))|MCOND(~fcond,~0), "6," args, flags | F_FLOAT, v9 }, \
01294 { opcode, F3F(2, 0x35, 0x180+fpsize)|MCOND(cond,0),  F3F(~2, ~0x35, ~(0x180+fpsize))|MCOND(~cond,~0),  "Z," args, flags | F_FLOAT, v9 }, \
01295 { opcode, F3F(2, 0x35, 0x040+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x040+fpsize))|MCOND(~fcond,~0), "7," args, flags | F_FLOAT, v9 }, \
01296 { opcode, F3F(2, 0x35, 0x080+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x080+fpsize))|MCOND(~fcond,~0), "8," args, flags | F_FLOAT, v9 }, \
01297 { opcode, F3F(2, 0x35, 0x0c0+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x0c0+fpsize))|MCOND(~fcond,~0), "9," args, flags | F_FLOAT, v9 }
01298 
01299 #define fmovicc(suffix, cond, flags) /* v9 */ \
01300 fmoviccx("fmovd" suffix, FM_DF, "B,H", cond, flags),    \
01301 fmoviccx("fmovq" suffix, FM_QF, "R,J", cond, flags),    \
01302 fmoviccx("fmovs" suffix, FM_SF, "f,g", cond, flags)
01303 
01304 #define fmovfcc(suffix, fcond, flags) /* v9 */ \
01305 fmovfccx("fmovd" suffix, FM_DF, "B,H", fcond, flags),   \
01306 fmovfccx("fmovq" suffix, FM_QF, "R,J", fcond, flags),   \
01307 fmovfccx("fmovs" suffix, FM_SF, "f,g", fcond, flags)
01308 
01309 #define fmovcc(suffix, cond, fcond, flags) /* v9 */ \
01310 fmovccx("fmovd" suffix, FM_DF, "B,H", cond, fcond, flags),  \
01311 fmovccx("fmovq" suffix, FM_QF, "R,J", cond, fcond, flags),  \
01312 fmovccx("fmovs" suffix, FM_SF, "f,g", cond, fcond, flags)
01313 
01314 /* v9 */ fmovcc  ("a", CONDA, FCONDA, 0),
01315 /* v9 */ fmovicc ("cc", CONDCC, 0),
01316 /* v9 */ fmovicc ("cs", CONDCS, 0),
01317 /* v9 */ fmovcc  ("e", CONDE, FCONDE, 0),
01318 /* v9 */ fmovcc  ("g", CONDG, FCONDG, 0),
01319 /* v9 */ fmovcc  ("ge", CONDGE, FCONDGE, 0),
01320 /* v9 */ fmovicc ("geu", CONDGEU, F_ALIAS),
01321 /* v9 */ fmovicc ("gu", CONDGU, 0),
01322 /* v9 */ fmovcc  ("l", CONDL, FCONDL, 0),
01323 /* v9 */ fmovcc  ("le", CONDLE, FCONDLE, 0),
01324 /* v9 */ fmovicc ("leu", CONDLEU, 0),
01325 /* v9 */ fmovfcc ("lg", FCONDLG, 0),
01326 /* v9 */ fmovicc ("lu", CONDLU, F_ALIAS),
01327 /* v9 */ fmovcc  ("n", CONDN, FCONDN, 0),
01328 /* v9 */ fmovcc  ("ne", CONDNE, FCONDNE, 0),
01329 /* v9 */ fmovicc ("neg", CONDNEG, 0),
01330 /* v9 */ fmovcc  ("nz", CONDNZ, FCONDNZ, F_ALIAS),
01331 /* v9 */ fmovfcc ("o", FCONDO, 0),
01332 /* v9 */ fmovicc ("pos", CONDPOS, 0),
01333 /* v9 */ fmovfcc ("u", FCONDU, 0),
01334 /* v9 */ fmovfcc ("ue", FCONDUE, 0),
01335 /* v9 */ fmovfcc ("ug", FCONDUG, 0),
01336 /* v9 */ fmovfcc ("uge", FCONDUGE, 0),
01337 /* v9 */ fmovfcc ("ul", FCONDUL, 0),
01338 /* v9 */ fmovfcc ("ule", FCONDULE, 0),
01339 /* v9 */ fmovicc ("vc", CONDVC, 0),
01340 /* v9 */ fmovicc ("vs", CONDVS, 0),
01341 /* v9 */ fmovcc  ("z", CONDZ, FCONDZ, F_ALIAS),
01342 
01343 #undef fmoviccx /* v9 */
01344 #undef fmovfccx /* v9 */
01345 #undef fmovccx /* v9 */
01346 #undef fmovicc /* v9 */
01347 #undef fmovfcc /* v9 */
01348 #undef fmovcc /* v9 */
01349 #undef FM_DF /* v9 */
01350 #undef FM_QF /* v9 */
01351 #undef FM_SF /* v9 */
01352 
01353 /* Coprocessor branches.  */
01354 #define CBR(opcode, mask, lose, flags, arch) \
01355  { opcode, (mask), ANNUL|(lose), "l",    flags|F_DELAYED, arch }, \
01356  { opcode, (mask)|ANNUL, (lose), ",a l", flags|F_DELAYED, arch }
01357 
01358 /* Floating point branches.  */
01359 #define FBR(opcode, mask, lose, flags) \
01360  { opcode, (mask), ANNUL|(lose), "l",    flags|F_DELAYED|F_FBR, v6 }, \
01361  { opcode, (mask)|ANNUL, (lose), ",a l", flags|F_DELAYED|F_FBR, v6 }
01362 
01363 /* V9 extended floating point branches.  */
01364 #define FBRX(opcode, mask, lose, flags) /* v9 */ \
01365  { opcode, FBFCC(0)|(mask)|BPRED, ANNUL|FBFCC(~0)|(lose), "6,G",      flags|F_DELAYED|F_FBR, v9 }, \
01366  { opcode, FBFCC(0)|(mask)|BPRED, ANNUL|FBFCC(~0)|(lose), ",T 6,G",   flags|F_DELAYED|F_FBR, v9 }, \
01367  { opcode, FBFCC(0)|(mask)|BPRED|ANNUL, FBFCC(~0)|(lose), ",a 6,G",   flags|F_DELAYED|F_FBR, v9 }, \
01368  { opcode, FBFCC(0)|(mask)|BPRED|ANNUL, FBFCC(~0)|(lose), ",a,T 6,G", flags|F_DELAYED|F_FBR, v9 }, \
01369  { opcode, FBFCC(0)|(mask), ANNUL|BPRED|FBFCC(~0)|(lose), ",N 6,G",   flags|F_DELAYED|F_FBR, v9 }, \
01370  { opcode, FBFCC(0)|(mask)|ANNUL, BPRED|FBFCC(~0)|(lose), ",a,N 6,G", flags|F_DELAYED|F_FBR, v9 }, \
01371  { opcode, FBFCC(1)|(mask)|BPRED, ANNUL|FBFCC(~1)|(lose), "7,G",      flags|F_DELAYED|F_FBR, v9 }, \
01372  { opcode, FBFCC(1)|(mask)|BPRED, ANNUL|FBFCC(~1)|(lose), ",T 7,G",   flags|F_DELAYED|F_FBR, v9 }, \
01373  { opcode, FBFCC(1)|(mask)|BPRED|ANNUL, FBFCC(~1)|(lose), ",a 7,G",   flags|F_DELAYED|F_FBR, v9 }, \
01374  { opcode, FBFCC(1)|(mask)|BPRED|ANNUL, FBFCC(~1)|(lose), ",a,T 7,G", flags|F_DELAYED|F_FBR, v9 }, \
01375  { opcode, FBFCC(1)|(mask), ANNUL|BPRED|FBFCC(~1)|(lose), ",N 7,G",   flags|F_DELAYED|F_FBR, v9 }, \
01376  { opcode, FBFCC(1)|(mask)|ANNUL, BPRED|FBFCC(~1)|(lose), ",a,N 7,G", flags|F_DELAYED|F_FBR, v9 }, \
01377  { opcode, FBFCC(2)|(mask)|BPRED, ANNUL|FBFCC(~2)|(lose), "8,G",      flags|F_DELAYED|F_FBR, v9 }, \
01378  { opcode, FBFCC(2)|(mask)|BPRED, ANNUL|FBFCC(~2)|(lose), ",T 8,G",   flags|F_DELAYED|F_FBR, v9 }, \
01379  { opcode, FBFCC(2)|(mask)|BPRED|ANNUL, FBFCC(~2)|(lose), ",a 8,G",   flags|F_DELAYED|F_FBR, v9 }, \
01380  { opcode, FBFCC(2)|(mask)|BPRED|ANNUL, FBFCC(~2)|(lose), ",a,T 8,G", flags|F_DELAYED|F_FBR, v9 }, \
01381  { opcode, FBFCC(2)|(mask), ANNUL|BPRED|FBFCC(~2)|(lose), ",N 8,G",   flags|F_DELAYED|F_FBR, v9 }, \
01382  { opcode, FBFCC(2)|(mask)|ANNUL, BPRED|FBFCC(~2)|(lose), ",a,N 8,G", flags|F_DELAYED|F_FBR, v9 }, \
01383  { opcode, FBFCC(3)|(mask)|BPRED, ANNUL|FBFCC(~3)|(lose), "9,G",      flags|F_DELAYED|F_FBR, v9 }, \
01384  { opcode, FBFCC(3)|(mask)|BPRED, ANNUL|FBFCC(~3)|(lose), ",T 9,G",   flags|F_DELAYED|F_FBR, v9 }, \
01385  { opcode, FBFCC(3)|(mask)|BPRED|ANNUL, FBFCC(~3)|(lose), ",a 9,G",   flags|F_DELAYED|F_FBR, v9 }, \
01386  { opcode, FBFCC(3)|(mask)|BPRED|ANNUL, FBFCC(~3)|(lose), ",a,T 9,G", flags|F_DELAYED|F_FBR, v9 }, \
01387  { opcode, FBFCC(3)|(mask), ANNUL|BPRED|FBFCC(~3)|(lose), ",N 9,G",   flags|F_DELAYED|F_FBR, v9 }, \
01388  { opcode, FBFCC(3)|(mask)|ANNUL, BPRED|FBFCC(~3)|(lose), ",a,N 9,G", flags|F_DELAYED|F_FBR, v9 }
01389 
01390 /* v9: We must put `FBRX' before `FBR', to ensure that we never match
01391    v9: something against an expression unless it is an expression.  Otherwise,
01392    v9: we end up with undefined symbol tables entries, because they get added,
01393    v9: but are not deleted if the pattern fails to match.  */
01394 
01395 #define CONDFC(fop, cop, mask, flags) \
01396   FBRX(fop, F2(0, 5)|COND(mask), F2(~0, ~5)|COND(~(mask)), flags), /* v9 */ \
01397   FBR(fop, F2(0, 6)|COND(mask), F2(~0, ~6)|COND(~(mask)), flags), \
01398   CBR(cop, F2(0, 7)|COND(mask), F2(~0, ~7)|COND(~(mask)), flags, v6notlet)
01399 
01400 #define CONDFCL(fop, cop, mask, flags) \
01401   FBRX(fop, F2(0, 5)|COND(mask), F2(~0, ~5)|COND(~(mask)), flags), /* v9 */ \
01402   FBR(fop, F2(0, 6)|COND(mask), F2(~0, ~6)|COND(~(mask)), flags), \
01403   CBR(cop, F2(0, 7)|COND(mask), F2(~0, ~7)|COND(~(mask)), flags, v6)
01404 
01405 #define CONDF(fop, mask, flags) \
01406   FBRX(fop, F2(0, 5)|COND(mask), F2(~0, ~5)|COND(~(mask)), flags), /* v9 */ \
01407   FBR(fop, F2(0, 6)|COND(mask), F2(~0, ~6)|COND(~(mask)), flags)
01408 
01409 CONDFC  ("fb",    "cb",    0x8, F_UNBR),
01410 CONDFCL ("fba",   "cba",   0x8, F_UNBR|F_ALIAS),
01411 CONDFC  ("fbe",   "cb0",   0x9, F_CONDBR),
01412 CONDF   ("fbz",            0x9, F_CONDBR|F_ALIAS),
01413 CONDFC  ("fbg",   "cb2",   0x6, F_CONDBR),
01414 CONDFC  ("fbge",  "cb02",  0xb, F_CONDBR),
01415 CONDFC  ("fbl",   "cb1",   0x4, F_CONDBR),
01416 CONDFC  ("fble",  "cb01",  0xd, F_CONDBR),
01417 CONDFC  ("fblg",  "cb12",  0x2, F_CONDBR),
01418 CONDFCL ("fbn",   "cbn",   0x0, F_UNBR),
01419 CONDFC  ("fbne",  "cb123", 0x1, F_CONDBR),
01420 CONDF   ("fbnz",           0x1, F_CONDBR|F_ALIAS),
01421 CONDFC  ("fbo",   "cb012", 0xf, F_CONDBR),
01422 CONDFC  ("fbu",   "cb3",   0x7, F_CONDBR),
01423 CONDFC  ("fbue",  "cb03",  0xa, F_CONDBR),
01424 CONDFC  ("fbug",  "cb23",  0x5, F_CONDBR),
01425 CONDFC  ("fbuge", "cb023", 0xc, F_CONDBR),
01426 CONDFC  ("fbul",  "cb13",  0x3, F_CONDBR),
01427 CONDFC  ("fbule", "cb013", 0xe, F_CONDBR),
01428 
01429 #undef CONDFC
01430 #undef CONDFCL
01431 #undef CONDF
01432 #undef CBR
01433 #undef FBR
01434 #undef FBRX /* v9 */
01435 
01436 { "jmp",  F3(2, 0x38, 0), F3(~2, ~0x38, ~0)|RD_G0|ASI(~0),  "1+2", F_UNBR|F_DELAYED, v6 }, /* jmpl rs1+rs2,%g0 */
01437 { "jmp",  F3(2, 0x38, 0), F3(~2, ~0x38, ~0)|RD_G0|ASI_RS2(~0),  "1", F_UNBR|F_DELAYED, v6 }, /* jmpl rs1+%g0,%g0 */
01438 { "jmp",  F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RD_G0,    "1+i", F_UNBR|F_DELAYED, v6 }, /* jmpl rs1+i,%g0 */
01439 { "jmp",  F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RD_G0,    "i+1", F_UNBR|F_DELAYED, v6 }, /* jmpl i+rs1,%g0 */
01440 { "jmp",  F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RD_G0|RS1_G0,   "i", F_UNBR|F_DELAYED, v6 }, /* jmpl %g0+i,%g0 */
01441 { "jmp",  F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RD_G0|SIMM13(~0), "1", F_UNBR|F_DELAYED, v6 }, /* jmpl rs1+0,%g0 */
01442 
01443 { "nop",  F2(0, 4), 0xfeffffff, "", 0, v6 }, /* sethi 0, %g0 */
01444 
01445 { "set",  F2(0x0, 0x4), F2(~0x0, ~0x4), "S0,d", F_ALIAS, v6 },
01446 { "setuw",  F2(0x0, 0x4), F2(~0x0, ~0x4), "S0,d", F_ALIAS, v9 },
01447 { "setsw",  F2(0x0, 0x4), F2(~0x0, ~0x4), "S0,d", F_ALIAS, v9 },
01448 { "setx", F2(0x0, 0x4), F2(~0x0, ~0x4), "S0,1,d", F_ALIAS, v9 },
01449 
01450 { "sethi",  F2(0x0, 0x4), F2(~0x0, ~0x4), "h,d", 0, v6 },
01451 
01452 { "taddcc", F3(2, 0x20, 0), F3(~2, ~0x20, ~0)|ASI(~0),  "1,2,d", 0, v6 },
01453 { "taddcc", F3(2, 0x20, 1), F3(~2, ~0x20, ~1),    "1,i,d", 0, v6 },
01454 { "taddcc", F3(2, 0x20, 1), F3(~2, ~0x20, ~1),    "i,1,d", 0, v6 },
01455 { "taddcctv", F3(2, 0x22, 0), F3(~2, ~0x22, ~0)|ASI(~0),  "1,2,d", 0, v6 },
01456 { "taddcctv", F3(2, 0x22, 1), F3(~2, ~0x22, ~1),    "1,i,d", 0, v6 },
01457 { "taddcctv", F3(2, 0x22, 1), F3(~2, ~0x22, ~1),    "i,1,d", 0, v6 },
01458 
01459 { "tsubcc", F3(2, 0x21, 0), F3(~2, ~0x21, ~0)|ASI(~0),  "1,2,d", 0, v6 },
01460 { "tsubcc", F3(2, 0x21, 1), F3(~2, ~0x21, ~1),    "1,i,d", 0, v6 },
01461 { "tsubcctv", F3(2, 0x23, 0), F3(~2, ~0x23, ~0)|ASI(~0),  "1,2,d", 0, v6 },
01462 { "tsubcctv", F3(2, 0x23, 1), F3(~2, ~0x23, ~1),    "1,i,d", 0, v6 },
01463 
01464 { "unimp",  F2(0x0, 0x0), 0xffc00000, "n", 0, v6notv9 },
01465 { "illtrap",  F2(0, 0), F2(~0, ~0)|RD_G0, "n", 0, v9 },
01466 
01467 /* This *is* a commutative instruction.  */
01468 { "xnor", F3(2, 0x07, 0), F3(~2, ~0x07, ~0)|ASI(~0),  "1,2,d", 0, v6 },
01469 { "xnor", F3(2, 0x07, 1), F3(~2, ~0x07, ~1),    "1,i,d", 0, v6 },
01470 { "xnor", F3(2, 0x07, 1), F3(~2, ~0x07, ~1),    "i,1,d", 0, v6 },
01471 /* This *is* a commutative instruction.  */
01472 { "xnorcc", F3(2, 0x17, 0), F3(~2, ~0x17, ~0)|ASI(~0),  "1,2,d", 0, v6 },
01473 { "xnorcc", F3(2, 0x17, 1), F3(~2, ~0x17, ~1),    "1,i,d", 0, v6 },
01474 { "xnorcc", F3(2, 0x17, 1), F3(~2, ~0x17, ~1),    "i,1,d", 0, v6 },
01475 { "xor",  F3(2, 0x03, 0), F3(~2, ~0x03, ~0)|ASI(~0),  "1,2,d", 0, v6 },
01476 { "xor",  F3(2, 0x03, 1), F3(~2, ~0x03, ~1),    "1,i,d", 0, v6 },
01477 { "xor",  F3(2, 0x03, 1), F3(~2, ~0x03, ~1),    "i,1,d", 0, v6 },
01478 { "xorcc",  F3(2, 0x13, 0), F3(~2, ~0x13, ~0)|ASI(~0),  "1,2,d", 0, v6 },
01479 { "xorcc",  F3(2, 0x13, 1), F3(~2, ~0x13, ~1),    "1,i,d", 0, v6 },
01480 { "xorcc",  F3(2, 0x13, 1), F3(~2, ~0x13, ~1),    "i,1,d", 0, v6 },
01481 
01482 { "not",  F3(2, 0x07, 0), F3(~2, ~0x07, ~0)|ASI(~0), "1,d", F_ALIAS, v6 }, /* xnor rs1,%0,rd */
01483 { "not",  F3(2, 0x07, 0), F3(~2, ~0x07, ~0)|ASI(~0), "r", F_ALIAS, v6 }, /* xnor rd,%0,rd */
01484 
01485 { "btog", F3(2, 0x03, 0), F3(~2, ~0x03, ~0)|ASI(~0),  "2,r", F_ALIAS, v6 }, /* xor rd,rs2,rd */
01486 { "btog", F3(2, 0x03, 1), F3(~2, ~0x03, ~1),    "i,r", F_ALIAS, v6 }, /* xor rd,i,rd */
01487 
01488 /* FPop1 and FPop2 are not instructions.  Don't accept them.  */
01489 
01490 { "fdtoi",  F3F(2, 0x34, 0x0d2), F3F(~2, ~0x34, ~0x0d2)|RS1_G0, "B,g", F_FLOAT, v6 },
01491 { "fstoi",  F3F(2, 0x34, 0x0d1), F3F(~2, ~0x34, ~0x0d1)|RS1_G0, "f,g", F_FLOAT, v6 },
01492 { "fqtoi",  F3F(2, 0x34, 0x0d3), F3F(~2, ~0x34, ~0x0d3)|RS1_G0, "R,g", F_FLOAT, v8 },
01493 
01494 { "fdtox",  F3F(2, 0x34, 0x082), F3F(~2, ~0x34, ~0x082)|RS1_G0, "B,H", F_FLOAT, v9 },
01495 { "fstox",  F3F(2, 0x34, 0x081), F3F(~2, ~0x34, ~0x081)|RS1_G0, "f,H", F_FLOAT, v9 },
01496 { "fqtox",  F3F(2, 0x34, 0x083), F3F(~2, ~0x34, ~0x083)|RS1_G0, "R,H", F_FLOAT, v9 },
01497 
01498 { "fitod",  F3F(2, 0x34, 0x0c8), F3F(~2, ~0x34, ~0x0c8)|RS1_G0, "f,H", F_FLOAT, v6 },
01499 { "fitos",  F3F(2, 0x34, 0x0c4), F3F(~2, ~0x34, ~0x0c4)|RS1_G0, "f,g", F_FLOAT, v6 },
01500 { "fitoq",  F3F(2, 0x34, 0x0cc), F3F(~2, ~0x34, ~0x0cc)|RS1_G0, "f,J", F_FLOAT, v8 },
01501 
01502 { "fxtod",  F3F(2, 0x34, 0x088), F3F(~2, ~0x34, ~0x088)|RS1_G0, "B,H", F_FLOAT, v9 },
01503 { "fxtos",  F3F(2, 0x34, 0x084), F3F(~2, ~0x34, ~0x084)|RS1_G0, "B,g", F_FLOAT, v9 },
01504 { "fxtoq",  F3F(2, 0x34, 0x08c), F3F(~2, ~0x34, ~0x08c)|RS1_G0, "B,J", F_FLOAT, v9 },
01505 
01506 { "fdtoq",  F3F(2, 0x34, 0x0ce), F3F(~2, ~0x34, ~0x0ce)|RS1_G0, "B,J", F_FLOAT, v8 },
01507 { "fdtos",  F3F(2, 0x34, 0x0c6), F3F(~2, ~0x34, ~0x0c6)|RS1_G0, "B,g", F_FLOAT, v6 },
01508 { "fqtod",  F3F(2, 0x34, 0x0cb), F3F(~2, ~0x34, ~0x0cb)|RS1_G0, "R,H", F_FLOAT, v8 },
01509 { "fqtos",  F3F(2, 0x34, 0x0c7), F3F(~2, ~0x34, ~0x0c7)|RS1_G0, "R,g", F_FLOAT, v8 },
01510 { "fstod",  F3F(2, 0x34, 0x0c9), F3F(~2, ~0x34, ~0x0c9)|RS1_G0, "f,H", F_FLOAT, v6 },
01511 { "fstoq",  F3F(2, 0x34, 0x0cd), F3F(~2, ~0x34, ~0x0cd)|RS1_G0, "f,J", F_FLOAT, v8 },
01512 
01513 { "fdivd",  F3F(2, 0x34, 0x04e), F3F(~2, ~0x34, ~0x04e), "v,B,H", F_FLOAT, v6 },
01514 { "fdivq",  F3F(2, 0x34, 0x04f), F3F(~2, ~0x34, ~0x04f), "V,R,J", F_FLOAT, v8 },
01515 { "fdivx",  F3F(2, 0x34, 0x04f), F3F(~2, ~0x34, ~0x04f), "V,R,J", F_FLOAT|F_ALIAS, v8 },
01516 { "fdivs",  F3F(2, 0x34, 0x04d), F3F(~2, ~0x34, ~0x04d), "e,f,g", F_FLOAT, v6 },
01517 { "fmuld",  F3F(2, 0x34, 0x04a), F3F(~2, ~0x34, ~0x04a), "v,B,H", F_FLOAT, v6 },
01518 { "fmulq",  F3F(2, 0x34, 0x04b), F3F(~2, ~0x34, ~0x04b), "V,R,J", F_FLOAT, v8 },
01519 { "fmulx",  F3F(2, 0x34, 0x04b), F3F(~2, ~0x34, ~0x04b), "V,R,J", F_FLOAT|F_ALIAS, v8 },
01520 { "fmuls",  F3F(2, 0x34, 0x049), F3F(~2, ~0x34, ~0x049), "e,f,g", F_FLOAT, v6 },
01521 
01522 { "fdmulq", F3F(2, 0x34, 0x06e), F3F(~2, ~0x34, ~0x06e), "v,B,J", F_FLOAT, v8 },
01523 { "fdmulx", F3F(2, 0x34, 0x06e), F3F(~2, ~0x34, ~0x06e), "v,B,J", F_FLOAT|F_ALIAS, v8 },
01524 { "fsmuld", F3F(2, 0x34, 0x069), F3F(~2, ~0x34, ~0x069), "e,f,H", F_FLOAT, v8 },
01525 
01526 { "fsqrtd", F3F(2, 0x34, 0x02a), F3F(~2, ~0x34, ~0x02a)|RS1_G0, "B,H", F_FLOAT, v7 },
01527 { "fsqrtq", F3F(2, 0x34, 0x02b), F3F(~2, ~0x34, ~0x02b)|RS1_G0, "R,J", F_FLOAT, v8 },
01528 { "fsqrtx", F3F(2, 0x34, 0x02b), F3F(~2, ~0x34, ~0x02b)|RS1_G0, "R,J", F_FLOAT|F_ALIAS, v8 },
01529 { "fsqrts", F3F(2, 0x34, 0x029), F3F(~2, ~0x34, ~0x029)|RS1_G0, "f,g", F_FLOAT, v7 },
01530 
01531 { "fabsd",  F3F(2, 0x34, 0x00a), F3F(~2, ~0x34, ~0x00a)|RS1_G0, "B,H", F_FLOAT, v9 },
01532 { "fabsq",  F3F(2, 0x34, 0x00b), F3F(~2, ~0x34, ~0x00b)|RS1_G0, "R,J", F_FLOAT, v9 },
01533 { "fabsx",  F3F(2, 0x34, 0x00b), F3F(~2, ~0x34, ~0x00b)|RS1_G0, "R,J", F_FLOAT|F_ALIAS, v9 },
01534 { "fabss",  F3F(2, 0x34, 0x009), F3F(~2, ~0x34, ~0x009)|RS1_G0, "f,g", F_FLOAT, v6 },
01535 { "fmovd",  F3F(2, 0x34, 0x002), F3F(~2, ~0x34, ~0x002)|RS1_G0, "B,H", F_FLOAT, v9 },
01536 { "fmovq",  F3F(2, 0x34, 0x003), F3F(~2, ~0x34, ~0x003)|RS1_G0, "R,J", F_FLOAT, v9 },
01537 { "fmovx",  F3F(2, 0x34, 0x003), F3F(~2, ~0x34, ~0x003)|RS1_G0, "R,J", F_FLOAT|F_ALIAS, v9 },
01538 { "fmovs",  F3F(2, 0x34, 0x001), F3F(~2, ~0x34, ~0x001)|RS1_G0, "f,g", F_FLOAT, v6 },
01539 { "fnegd",  F3F(2, 0x34, 0x006), F3F(~2, ~0x34, ~0x006)|RS1_G0, "B,H", F_FLOAT, v9 },
01540 { "fnegq",  F3F(2, 0x34, 0x007), F3F(~2, ~0x34, ~0x007)|RS1_G0, "R,J", F_FLOAT, v9 },
01541 { "fnegx",  F3F(2, 0x34, 0x007), F3F(~2, ~0x34, ~0x007)|RS1_G0, "R,J", F_FLOAT|F_ALIAS, v9 },
01542 { "fnegs",  F3F(2, 0x34, 0x005), F3F(~2, ~0x34, ~0x005)|RS1_G0, "f,g", F_FLOAT, v6 },
01543 
01544 { "faddd",  F3F(2, 0x34, 0x042), F3F(~2, ~0x34, ~0x042), "v,B,H", F_FLOAT, v6 },
01545 { "faddq",  F3F(2, 0x34, 0x043), F3F(~2, ~0x34, ~0x043), "V,R,J", F_FLOAT, v8 },
01546 { "faddx",  F3F(2, 0x34, 0x043), F3F(~2, ~0x34, ~0x043), "V,R,J", F_FLOAT|F_ALIAS, v8 },
01547 { "fadds",  F3F(2, 0x34, 0x041), F3F(~2, ~0x34, ~0x041), "e,f,g", F_FLOAT, v6 },
01548 { "fsubd",  F3F(2, 0x34, 0x046), F3F(~2, ~0x34, ~0x046), "v,B,H", F_FLOAT, v6 },
01549 { "fsubq",  F3F(2, 0x34, 0x047), F3F(~2, ~0x34, ~0x047), "V,R,J", F_FLOAT, v8 },
01550 { "fsubx",  F3F(2, 0x34, 0x047), F3F(~2, ~0x34, ~0x047), "V,R,J", F_FLOAT|F_ALIAS, v8 },
01551 { "fsubs",  F3F(2, 0x34, 0x045), F3F(~2, ~0x34, ~0x045), "e,f,g", F_FLOAT, v6 },
01552 
01553 #define CMPFCC(x) (((x)&0x3)<<25)
01554 
01555 { "fcmpd",            F3F(2, 0x35, 0x052),            F3F(~2, ~0x35, ~0x052)|RD_G0,  "v,B",   F_FLOAT, v6 },
01556 { "fcmpd",  CMPFCC(0)|F3F(2, 0x35, 0x052), CMPFCC(~0)|F3F(~2, ~0x35, ~0x052),  "6,v,B", F_FLOAT, v9 },
01557 { "fcmpd",  CMPFCC(1)|F3F(2, 0x35, 0x052), CMPFCC(~1)|F3F(~2, ~0x35, ~0x052),  "7,v,B", F_FLOAT, v9 },
01558 { "fcmpd",  CMPFCC(2)|F3F(2, 0x35, 0x052), CMPFCC(~2)|F3F(~2, ~0x35, ~0x052),  "8,v,B", F_FLOAT, v9 },
01559 { "fcmpd",  CMPFCC(3)|F3F(2, 0x35, 0x052), CMPFCC(~3)|F3F(~2, ~0x35, ~0x052),  "9,v,B", F_FLOAT, v9 },
01560 { "fcmped",           F3F(2, 0x35, 0x056),            F3F(~2, ~0x35, ~0x056)|RD_G0,  "v,B",   F_FLOAT, v6 },
01561 { "fcmped", CMPFCC(0)|F3F(2, 0x35, 0x056), CMPFCC(~0)|F3F(~2, ~0x35, ~0x056),  "6,v,B", F_FLOAT, v9 },
01562 { "fcmped", CMPFCC(1)|F3F(2, 0x35, 0x056), CMPFCC(~1)|F3F(~2, ~0x35, ~0x056),  "7,v,B", F_FLOAT, v9 },
01563 { "fcmped", CMPFCC(2)|F3F(2, 0x35, 0x056), CMPFCC(~2)|F3F(~2, ~0x35, ~0x056),  "8,v,B", F_FLOAT, v9 },
01564 { "fcmped", CMPFCC(3)|F3F(2, 0x35, 0x056), CMPFCC(~3)|F3F(~2, ~0x35, ~0x056),  "9,v,B", F_FLOAT, v9 },
01565 { "fcmpq",            F3F(2, 0x35, 0x053),            F3F(~2, ~0x35, ~0x053)|RD_G0,  "V,R", F_FLOAT, v8 },
01566 { "fcmpq",  CMPFCC(0)|F3F(2, 0x35, 0x053), CMPFCC(~0)|F3F(~2, ~0x35, ~0x053),  "6,V,R", F_FLOAT, v9 },
01567 { "fcmpq",  CMPFCC(1)|F3F(2, 0x35, 0x053), CMPFCC(~1)|F3F(~2, ~0x35, ~0x053),  "7,V,R", F_FLOAT, v9 },
01568 { "fcmpq",  CMPFCC(2)|F3F(2, 0x35, 0x053), CMPFCC(~2)|F3F(~2, ~0x35, ~0x053),  "8,V,R", F_FLOAT, v9 },
01569 { "fcmpq",  CMPFCC(3)|F3F(2, 0x35, 0x053), CMPFCC(~3)|F3F(~2, ~0x35, ~0x053),  "9,V,R", F_FLOAT, v9 },
01570 { "fcmpeq",           F3F(2, 0x35, 0x057),            F3F(~2, ~0x35, ~0x057)|RD_G0,  "V,R", F_FLOAT, v8 },
01571 { "fcmpeq", CMPFCC(0)|F3F(2, 0x35, 0x057), CMPFCC(~0)|F3F(~2, ~0x35, ~0x057),  "6,V,R", F_FLOAT, v9 },
01572 { "fcmpeq", CMPFCC(1)|F3F(2, 0x35, 0x057), CMPFCC(~1)|F3F(~2, ~0x35, ~0x057),  "7,V,R", F_FLOAT, v9 },
01573 { "fcmpeq", CMPFCC(2)|F3F(2, 0x35, 0x057), CMPFCC(~2)|F3F(~2, ~0x35, ~0x057),  "8,V,R", F_FLOAT, v9 },
01574 { "fcmpeq", CMPFCC(3)|F3F(2, 0x35, 0x057), CMPFCC(~3)|F3F(~2, ~0x35, ~0x057),  "9,V,R", F_FLOAT, v9 },
01575 { "fcmpx",            F3F(2, 0x35, 0x053),            F3F(~2, ~0x35, ~0x053)|RD_G0,  "V,R", F_FLOAT|F_ALIAS, v8 },
01576 { "fcmpx",  CMPFCC(0)|F3F(2, 0x35, 0x053), CMPFCC(~0)|F3F(~2, ~0x35, ~0x053),  "6,V,R", F_FLOAT|F_ALIAS, v9 },
01577 { "fcmpx",  CMPFCC(1)|F3F(2, 0x35, 0x053), CMPFCC(~1)|F3F(~2, ~0x35, ~0x053),  "7,V,R", F_FLOAT|F_ALIAS, v9 },
01578 { "fcmpx",  CMPFCC(2)|F3F(2, 0x35, 0x053), CMPFCC(~2)|F3F(~2, ~0x35, ~0x053),  "8,V,R", F_FLOAT|F_ALIAS, v9 },
01579 { "fcmpx",  CMPFCC(3)|F3F(2, 0x35, 0x053), CMPFCC(~3)|F3F(~2, ~0x35, ~0x053),  "9,V,R", F_FLOAT|F_ALIAS, v9 },
01580 { "fcmpex",           F3F(2, 0x35, 0x057),            F3F(~2, ~0x35, ~0x057)|RD_G0,  "V,R", F_FLOAT|F_ALIAS, v8 },
01581 { "fcmpex", CMPFCC(0)|F3F(2, 0x35, 0x057), CMPFCC(~0)|F3F(~2, ~0x35, ~0x057),  "6,V,R", F_FLOAT|F_ALIAS, v9 },
01582 { "fcmpex", CMPFCC(1)|F3F(2, 0x35, 0x057), CMPFCC(~1)|F3F(~2, ~0x35, ~0x057),  "7,V,R", F_FLOAT|F_ALIAS, v9 },
01583 { "fcmpex", CMPFCC(2)|F3F(2, 0x35, 0x057), CMPFCC(~2)|F3F(~2, ~0x35, ~0x057),  "8,V,R", F_FLOAT|F_ALIAS, v9 },
01584 { "fcmpex", CMPFCC(3)|F3F(2, 0x35, 0x057), CMPFCC(~3)|F3F(~2, ~0x35, ~0x057),  "9,V,R", F_FLOAT|F_ALIAS, v9 },
01585 { "fcmps",            F3F(2, 0x35, 0x051),            F3F(~2, ~0x35, ~0x051)|RD_G0, "e,f",   F_FLOAT, v6 },
01586 { "fcmps",  CMPFCC(0)|F3F(2, 0x35, 0x051), CMPFCC(~0)|F3F(~2, ~0x35, ~0x051),  "6,e,f", F_FLOAT, v9 },
01587 { "fcmps",  CMPFCC(1)|F3F(2, 0x35, 0x051), CMPFCC(~1)|F3F(~2, ~0x35, ~0x051),  "7,e,f", F_FLOAT, v9 },
01588 { "fcmps",  CMPFCC(2)|F3F(2, 0x35, 0x051), CMPFCC(~2)|F3F(~2, ~0x35, ~0x051),  "8,e,f", F_FLOAT, v9 },
01589 { "fcmps",  CMPFCC(3)|F3F(2, 0x35, 0x051), CMPFCC(~3)|F3F(~2, ~0x35, ~0x051),  "9,e,f", F_FLOAT, v9 },
01590 { "fcmpes",           F3F(2, 0x35, 0x055),            F3F(~2, ~0x35, ~0x055)|RD_G0, "e,f",   F_FLOAT, v6 },
01591 { "fcmpes", CMPFCC(0)|F3F(2, 0x35, 0x055), CMPFCC(~0)|F3F(~2, ~0x35, ~0x055),  "6,e,f", F_FLOAT, v9 },
01592 { "fcmpes", CMPFCC(1)|F3F(2, 0x35, 0x055), CMPFCC(~1)|F3F(~2, ~0x35, ~0x055),  "7,e,f", F_FLOAT, v9 },
01593 { "fcmpes", CMPFCC(2)|F3F(2, 0x35, 0x055), CMPFCC(~2)|F3F(~2, ~0x35, ~0x055),  "8,e,f", F_FLOAT, v9 },
01594 { "fcmpes", CMPFCC(3)|F3F(2, 0x35, 0x055), CMPFCC(~3)|F3F(~2, ~0x35, ~0x055),  "9,e,f", F_FLOAT, v9 },
01595 
01596 /* These Extended FPop (FIFO) instructions are new in the Fujitsu
01597    MB86934, replacing the CPop instructions from v6 and later
01598    processors.  */
01599 
01600 #define EFPOP1_2(name, op, args) { name, F3F(2, 0x36, op), F3F(~2, ~0x36, ~op)|RS1_G0, args, 0, sparclite }
01601 #define EFPOP1_3(name, op, args) { name, F3F(2, 0x36, op), F3F(~2, ~0x36, ~op),        args, 0, sparclite }
01602 #define EFPOP2_2(name, op, args) { name, F3F(2, 0x37, op), F3F(~2, ~0x37, ~op)|RD_G0,  args, 0, sparclite }
01603 
01604 EFPOP1_2 ("efitod", 0x0c8, "f,H"),
01605 EFPOP1_2 ("efitos", 0x0c4, "f,g"),
01606 EFPOP1_2 ("efdtoi", 0x0d2, "B,g"),
01607 EFPOP1_2 ("efstoi", 0x0d1, "f,g"),
01608 EFPOP1_2 ("efstod", 0x0c9, "f,H"),
01609 EFPOP1_2 ("efdtos", 0x0c6, "B,g"),
01610 EFPOP1_2 ("efmovs", 0x001, "f,g"),
01611 EFPOP1_2 ("efnegs", 0x005, "f,g"),
01612 EFPOP1_2 ("efabss", 0x009, "f,g"),
01613 EFPOP1_2 ("efsqrtd",  0x02a, "B,H"),
01614 EFPOP1_2 ("efsqrts",  0x029, "f,g"),
01615 EFPOP1_3 ("efaddd", 0x042, "v,B,H"),
01616 EFPOP1_3 ("efadds", 0x041, "e,f,g"),
01617 EFPOP1_3 ("efsubd", 0x046, "v,B,H"),
01618 EFPOP1_3 ("efsubs", 0x045, "e,f,g"),
01619 EFPOP1_3 ("efdivd", 0x04e, "v,B,H"),
01620 EFPOP1_3 ("efdivs", 0x04d, "e,f,g"),
01621 EFPOP1_3 ("efmuld", 0x04a, "v,B,H"),
01622 EFPOP1_3 ("efmuls", 0x049, "e,f,g"),
01623 EFPOP1_3 ("efsmuld",  0x069, "e,f,H"),
01624 EFPOP2_2 ("efcmpd", 0x052, "v,B"),
01625 EFPOP2_2 ("efcmped",  0x056, "v,B"),
01626 EFPOP2_2 ("efcmps", 0x051, "e,f"),
01627 EFPOP2_2 ("efcmpes",  0x055, "e,f"),
01628 
01629 #undef EFPOP1_2
01630 #undef EFPOP1_3
01631 #undef EFPOP2_2
01632 
01633 /* These are marked F_ALIAS, so that they won't conflict with sparclite insns
01634    present.  Otherwise, the F_ALIAS flag is ignored.  */
01635 { "cpop1",  F3(2, 0x36, 0), F3(~2, ~0x36, ~1), "[1+2],d", F_ALIAS, v6notv9 },
01636 { "cpop2",  F3(2, 0x37, 0), F3(~2, ~0x37, ~1), "[1+2],d", F_ALIAS, v6notv9 },
01637 
01638 /* sparclet specific insns */
01639 
01640 COMMUTEOP ("umac", 0x3e, sparclet),
01641 COMMUTEOP ("smac", 0x3f, sparclet),
01642 COMMUTEOP ("umacd", 0x2e, sparclet),
01643 COMMUTEOP ("smacd", 0x2f, sparclet),
01644 COMMUTEOP ("umuld", 0x09, sparclet),
01645 COMMUTEOP ("smuld", 0x0d, sparclet),
01646 
01647 { "shuffle",  F3(2, 0x2d, 0), F3(~2, ~0x2d, ~0)|ASI(~0),  "1,2,d", 0, sparclet },
01648 { "shuffle",  F3(2, 0x2d, 1), F3(~2, ~0x2d, ~1),    "1,i,d", 0, sparclet },
01649 
01650 /* The manual isn't completely accurate on these insns.  The `rs2' field is
01651    treated as being 6 bits to account for 6 bit immediates to cpush.  It is
01652    assumed that it is intended that bit 5 is 0 when rs2 contains a reg.  */
01653 #define BIT5 (1<<5)
01654 { "crdcxt", F3(2, 0x36, 0)|SLCPOP(4), F3(~2, ~0x36, ~0)|SLCPOP(~4)|BIT5|RS2(~0),  "U,d", 0, sparclet },
01655 { "cwrcxt", F3(2, 0x36, 0)|SLCPOP(3), F3(~2, ~0x36, ~0)|SLCPOP(~3)|BIT5|RS2(~0),  "1,u", 0, sparclet },
01656 { "cpush",  F3(2, 0x36, 0)|SLCPOP(0), F3(~2, ~0x36, ~0)|SLCPOP(~0)|BIT5|RD(~0), "1,2", 0, sparclet },
01657 { "cpush",  F3(2, 0x36, 1)|SLCPOP(0), F3(~2, ~0x36, ~1)|SLCPOP(~0)|RD(~0),    "1,Y", 0, sparclet },
01658 { "cpusha", F3(2, 0x36, 0)|SLCPOP(1), F3(~2, ~0x36, ~0)|SLCPOP(~1)|BIT5|RD(~0), "1,2", 0, sparclet },
01659 { "cpusha", F3(2, 0x36, 1)|SLCPOP(1), F3(~2, ~0x36, ~1)|SLCPOP(~1)|RD(~0),    "1,Y", 0, sparclet },
01660 { "cpull",  F3(2, 0x36, 0)|SLCPOP(2), F3(~2, ~0x36, ~0)|SLCPOP(~2)|BIT5|RS1(~0)|RS2(~0), "d", 0, sparclet },
01661 #undef BIT5
01662 
01663 /* sparclet coprocessor branch insns */
01664 #define SLCBCC2(opcode, mask, lose) \
01665  { opcode, (mask), ANNUL|(lose), "l",    F_DELAYED|F_CONDBR, sparclet }, \
01666  { opcode, (mask)|ANNUL, (lose), ",a l", F_DELAYED|F_CONDBR, sparclet }
01667 #define SLCBCC(opcode, mask) \
01668   SLCBCC2(opcode, F2(0, 7)|COND(mask), F2(~0, ~7)|COND(~(mask)))
01669 
01670 /* cbn,cba can't be defined here because they're defined elsewhere and GAS
01671    requires all mnemonics of the same name to be consecutive.  */
01672 /*SLCBCC("cbn", 0), - already defined */
01673 SLCBCC("cbe", 1),
01674 SLCBCC("cbf", 2),
01675 SLCBCC("cbef", 3),
01676 SLCBCC("cbr", 4),
01677 SLCBCC("cber", 5),
01678 SLCBCC("cbfr", 6),
01679 SLCBCC("cbefr", 7),
01680 /*SLCBCC("cba", 8), - already defined */
01681 SLCBCC("cbne", 9),
01682 SLCBCC("cbnf", 10),
01683 SLCBCC("cbnef", 11),
01684 SLCBCC("cbnr", 12),
01685 SLCBCC("cbner", 13),
01686 SLCBCC("cbnfr", 14),
01687 SLCBCC("cbnefr", 15),
01688 
01689 #undef SLCBCC2
01690 #undef SLCBCC
01691 
01692 { "casa", F3(3, 0x3c, 0), F3(~3, ~0x3c, ~0), "[1]A,2,d", 0, v9 },
01693 { "casa", F3(3, 0x3c, 1), F3(~3, ~0x3c, ~1), "[1]o,2,d", 0, v9 },
01694 { "casxa",  F3(3, 0x3e, 0), F3(~3, ~0x3e, ~0), "[1]A,2,d", 0, v9 },
01695 { "casxa",  F3(3, 0x3e, 1), F3(~3, ~0x3e, ~1), "[1]o,2,d", 0, v9 },
01696 
01697 /* v9 synthetic insns */
01698 { "iprefetch",  F2(0, 1)|(2<<20)|BPRED, F2(~0, ~1)|(1<<20)|ANNUL|COND(~0), "G", 0, v9 }, /* bn,a,pt %xcc,label */
01699 { "signx",  F3(2, 0x27, 0), F3(~2, ~0x27, ~0)|(1<<12)|ASI(~0)|RS2_G0, "1,d", F_ALIAS, v9 }, /* sra rs1,%g0,rd */
01700 { "signx",  F3(2, 0x27, 0), F3(~2, ~0x27, ~0)|(1<<12)|ASI(~0)|RS2_G0, "r", F_ALIAS, v9 }, /* sra rd,%g0,rd */
01701 { "clruw",  F3(2, 0x26, 0), F3(~2, ~0x26, ~0)|(1<<12)|ASI(~0)|RS2_G0, "1,d", F_ALIAS, v9 }, /* srl rs1,%g0,rd */
01702 { "clruw",  F3(2, 0x26, 0), F3(~2, ~0x26, ~0)|(1<<12)|ASI(~0)|RS2_G0, "r", F_ALIAS, v9 }, /* srl rd,%g0,rd */
01703 { "cas",  F3(3, 0x3c, 0)|ASI(0x80), F3(~3, ~0x3c, ~0)|ASI(~0x80), "[1],2,d", F_ALIAS, v9 }, /* casa [rs1]ASI_P,rs2,rd */
01704 { "casl", F3(3, 0x3c, 0)|ASI(0x88), F3(~3, ~0x3c, ~0)|ASI(~0x88), "[1],2,d", F_ALIAS, v9 }, /* casa [rs1]ASI_P_L,rs2,rd */
01705 { "casx", F3(3, 0x3e, 0)|ASI(0x80), F3(~3, ~0x3e, ~0)|ASI(~0x80), "[1],2,d", F_ALIAS, v9 }, /* casxa [rs1]ASI_P,rs2,rd */
01706 { "casxl",  F3(3, 0x3e, 0)|ASI(0x88), F3(~3, ~0x3e, ~0)|ASI(~0x88), "[1],2,d", F_ALIAS, v9 }, /* casxa [rs1]ASI_P_L,rs2,rd */
01707 
01708 /* Ultrasparc extensions */
01709 { "shutdown", F3F(2, 0x36, 0x080), F3F(~2, ~0x36, ~0x080)|RD_G0|RS1_G0|RS2_G0, "", 0, v9a },
01710 
01711 /* FIXME: Do we want to mark these as F_FLOAT, or something similar?  */
01712 { "fpadd16",  F3F(2, 0x36, 0x050), F3F(~2, ~0x36, ~0x050), "v,B,H", 0, v9a },
01713 { "fpadd16s", F3F(2, 0x36, 0x051), F3F(~2, ~0x36, ~0x051), "e,f,g", 0, v9a },
01714 { "fpadd32",  F3F(2, 0x36, 0x052), F3F(~2, ~0x36, ~0x052), "v,B,H", 0, v9a },
01715 { "fpadd32s", F3F(2, 0x36, 0x053), F3F(~2, ~0x36, ~0x053), "e,f,g", 0, v9a },
01716 { "fpsub16",  F3F(2, 0x36, 0x054), F3F(~2, ~0x36, ~0x054), "v,B,H", 0, v9a },
01717 { "fpsub16s", F3F(2, 0x36, 0x055), F3F(~2, ~0x36, ~0x055), "e,f,g", 0, v9a },
01718 { "fpsub32",  F3F(2, 0x36, 0x056), F3F(~2, ~0x36, ~0x056), "v,B,H", 0, v9a },
01719 { "fpsub32s", F3F(2, 0x36, 0x057), F3F(~2, ~0x36, ~0x057), "e,f,g", 0, v9a },
01720 
01721 { "fpack32",  F3F(2, 0x36, 0x03a), F3F(~2, ~0x36, ~0x03a), "v,B,H", 0, v9a },
01722 { "fpack16",  F3F(2, 0x36, 0x03b), F3F(~2, ~0x36, ~0x03b)|RS1_G0, "B,g", 0, v9a },
01723 { "fpackfix", F3F(2, 0x36, 0x03d), F3F(~2, ~0x36, ~0x03d)|RS1_G0, "B,g", 0, v9a },
01724 { "fexpand",  F3F(2, 0x36, 0x04d), F3F(~2, ~0x36, ~0x04d)|RS1_G0, "f,H", 0, v9a },
01725 { "fpmerge",  F3F(2, 0x36, 0x04b), F3F(~2, ~0x36, ~0x04b), "e,f,H", 0, v9a },
01726 
01727 /* Note that the mixing of 32/64 bit regs is intentional.  */
01728 { "fmul8x16",   F3F(2, 0x36, 0x031), F3F(~2, ~0x36, ~0x031), "e,B,H", 0, v9a },
01729 { "fmul8x16au",   F3F(2, 0x36, 0x033), F3F(~2, ~0x36, ~0x033), "e,f,H", 0, v9a },
01730 { "fmul8x16al",   F3F(2, 0x36, 0x035), F3F(~2, ~0x36, ~0x035), "e,f,H", 0, v9a },
01731 { "fmul8sux16",   F3F(2, 0x36, 0x036), F3F(~2, ~0x36, ~0x036), "v,B,H", 0, v9a },
01732 { "fmul8ulx16",   F3F(2, 0x36, 0x037), F3F(~2, ~0x36, ~0x037), "v,B,H", 0, v9a },
01733 { "fmuld8sux16",  F3F(2, 0x36, 0x038), F3F(~2, ~0x36, ~0x038), "e,f,H", 0, v9a },
01734 { "fmuld8ulx16",  F3F(2, 0x36, 0x039), F3F(~2, ~0x36, ~0x039), "e,f,H", 0, v9a },
01735 
01736 { "alignaddr",  F3F(2, 0x36, 0x018), F3F(~2, ~0x36, ~0x018), "1,2,d", 0, v9a },
01737 { "alignaddrl", F3F(2, 0x36, 0x01a), F3F(~2, ~0x36, ~0x01a), "1,2,d", 0, v9a },
01738 { "faligndata", F3F(2, 0x36, 0x048), F3F(~2, ~0x36, ~0x048), "v,B,H", 0, v9a },
01739 
01740 { "fzero",  F3F(2, 0x36, 0x060), F3F(~2, ~0x36, ~0x060), "H", 0, v9a },
01741 { "fzeros", F3F(2, 0x36, 0x061), F3F(~2, ~0x36, ~0x061), "g", 0, v9a },
01742 { "fone", F3F(2, 0x36, 0x07e), F3F(~2, ~0x36, ~0x07e), "H", 0, v9a },
01743 { "fones",  F3F(2, 0x36, 0x07f), F3F(~2, ~0x36, ~0x07f), "g", 0, v9a },
01744 { "fsrc1",  F3F(2, 0x36, 0x074), F3F(~2, ~0x36, ~0x074), "v,H", 0, v9a },
01745 { "fsrc1s", F3F(2, 0x36, 0x075), F3F(~2, ~0x36, ~0x075), "e,g", 0, v9a },
01746 { "fsrc2",  F3F(2, 0x36, 0x078), F3F(~2, ~0x36, ~0x078), "B,H", 0, v9a },
01747 { "fsrc2s", F3F(2, 0x36, 0x079), F3F(~2, ~0x36, ~0x079), "f,g", 0, v9a },
01748 { "fnot1",  F3F(2, 0x36, 0x06a), F3F(~2, ~0x36, ~0x06a), "v,H", 0, v9a },
01749 { "fnot1s", F3F(2, 0x36, 0x06b), F3F(~2, ~0x36, ~0x06b), "e,g", 0, v9a },
01750 { "fnot2",  F3F(2, 0x36, 0x066), F3F(~2, ~0x36, ~0x066), "B,H", 0, v9a },
01751 { "fnot2s", F3F(2, 0x36, 0x067), F3F(~2, ~0x36, ~0x067), "f,g", 0, v9a },
01752 { "for",  F3F(2, 0x36, 0x07c), F3F(~2, ~0x36, ~0x07c), "v,B,H", 0, v9a },
01753 { "fors", F3F(2, 0x36, 0x07d), F3F(~2, ~0x36, ~0x07d), "e,f,g", 0, v9a },
01754 { "fnor", F3F(2, 0x36, 0x062), F3F(~2, ~0x36, ~0x062), "v,B,H", 0, v9a },
01755 { "fnors",  F3F(2, 0x36, 0x063), F3F(~2, ~0x36, ~0x063), "e,f,g", 0, v9a },
01756 { "fand", F3F(2, 0x36, 0x070), F3F(~2, ~0x36, ~0x070), "v,B,H", 0, v9a },
01757 { "fands",  F3F(2, 0x36, 0x071), F3F(~2, ~0x36, ~0x071), "e,f,g", 0, v9a },
01758 { "fnand",  F3F(2, 0x36, 0x06e), F3F(~2, ~0x36, ~0x06e), "v,B,H", 0, v9a },
01759 { "fnands", F3F(2, 0x36, 0x06f), F3F(~2, ~0x36, ~0x06f), "e,f,g", 0, v9a },
01760 { "fxor", F3F(2, 0x36, 0x06c), F3F(~2, ~0x36, ~0x06c), "v,B,H", 0, v9a },
01761 { "fxors",  F3F(2, 0x36, 0x06d), F3F(~2, ~0x36, ~0x06d), "e,f,g", 0, v9a },
01762 { "fxnor",  F3F(2, 0x36, 0x072), F3F(~2, ~0x36, ~0x072), "v,B,H", 0, v9a },
01763 { "fxnors", F3F(2, 0x36, 0x073), F3F(~2, ~0x36, ~0x073), "e,f,g", 0, v9a },
01764 { "fornot1",  F3F(2, 0x36, 0x07a), F3F(~2, ~0x36, ~0x07a), "v,B,H", 0, v9a },
01765 { "fornot1s", F3F(2, 0x36, 0x07b), F3F(~2, ~0x36, ~0x07b), "e,f,g", 0, v9a },
01766 { "fornot2",  F3F(2, 0x36, 0x076), F3F(~2, ~0x36, ~0x076), "v,B,H", 0, v9a },
01767 { "fornot2s", F3F(2, 0x36, 0x077), F3F(~2, ~0x36, ~0x077), "e,f,g", 0, v9a },
01768 { "fandnot1", F3F(2, 0x36, 0x068), F3F(~2, ~0x36, ~0x068), "v,B,H", 0, v9a },
01769 { "fandnot1s",  F3F(2, 0x36, 0x069), F3F(~2, ~0x36, ~0x069), "e,f,g", 0, v9a },
01770 { "fandnot2", F3F(2, 0x36, 0x064), F3F(~2, ~0x36, ~0x064), "v,B,H", 0, v9a },
01771 { "fandnot2s",  F3F(2, 0x36, 0x065), F3F(~2, ~0x36, ~0x065), "e,f,g", 0, v9a },
01772 
01773 { "fcmpgt16", F3F(2, 0x36, 0x028), F3F(~2, ~0x36, ~0x028), "v,B,d", 0, v9a },
01774 { "fcmpgt32", F3F(2, 0x36, 0x02c), F3F(~2, ~0x36, ~0x02c), "v,B,d", 0, v9a },
01775 { "fcmple16", F3F(2, 0x36, 0x020), F3F(~2, ~0x36, ~0x020), "v,B,d", 0, v9a },
01776 { "fcmple32", F3F(2, 0x36, 0x024), F3F(~2, ~0x36, ~0x024), "v,B,d", 0, v9a },
01777 { "fcmpne16", F3F(2, 0x36, 0x022), F3F(~2, ~0x36, ~0x022), "v,B,d", 0, v9a },
01778 { "fcmpne32", F3F(2, 0x36, 0x026), F3F(~2, ~0x36, ~0x026), "v,B,d", 0, v9a },
01779 { "fcmpeq16", F3F(2, 0x36, 0x02a), F3F(~2, ~0x36, ~0x02a), "v,B,d", 0, v9a },
01780 { "fcmpeq32", F3F(2, 0x36, 0x02e), F3F(~2, ~0x36, ~0x02e), "v,B,d", 0, v9a },
01781 
01782 { "edge8",  F3F(2, 0x36, 0x000), F3F(~2, ~0x36, ~0x000), "1,2,d", 0, v9a },
01783 { "edge8l", F3F(2, 0x36, 0x002), F3F(~2, ~0x36, ~0x002), "1,2,d", 0, v9a },
01784 { "edge16", F3F(2, 0x36, 0x004), F3F(~2, ~0x36, ~0x004), "1,2,d", 0, v9a },
01785 { "edge16l",  F3F(2, 0x36, 0x006), F3F(~2, ~0x36, ~0x006), "1,2,d", 0, v9a },
01786 { "edge32", F3F(2, 0x36, 0x008), F3F(~2, ~0x36, ~0x008), "1,2,d", 0, v9a },
01787 { "edge32l",  F3F(2, 0x36, 0x00a), F3F(~2, ~0x36, ~0x00a), "1,2,d", 0, v9a },
01788 
01789 { "pdist",  F3F(2, 0x36, 0x03e), F3F(~2, ~0x36, ~0x03e), "v,B,H", 0, v9a },
01790 
01791 { "array8", F3F(2, 0x36, 0x010), F3F(~2, ~0x36, ~0x010), "1,2,d", 0, v9a },
01792 { "array16",  F3F(2, 0x36, 0x012), F3F(~2, ~0x36, ~0x012), "1,2,d", 0, v9a },
01793 { "array32",  F3F(2, 0x36, 0x014), F3F(~2, ~0x36, ~0x014), "1,2,d", 0, v9a },
01794 
01795 /* Cheetah instructions */
01796 { "edge8n",    F3F(2, 0x36, 0x001), F3F(~2, ~0x36, ~0x001), "1,2,d", 0, v9b },
01797 { "edge8ln",   F3F(2, 0x36, 0x003), F3F(~2, ~0x36, ~0x003), "1,2,d", 0, v9b },
01798 { "edge16n",   F3F(2, 0x36, 0x005), F3F(~2, ~0x36, ~0x005), "1,2,d", 0, v9b },
01799 { "edge16ln",  F3F(2, 0x36, 0x007), F3F(~2, ~0x36, ~0x007), "1,2,d", 0, v9b },
01800 { "edge32n",   F3F(2, 0x36, 0x009), F3F(~2, ~0x36, ~0x009), "1,2,d", 0, v9b },
01801 { "edge32ln",  F3F(2, 0x36, 0x00b), F3F(~2, ~0x36, ~0x00b), "1,2,d", 0, v9b },
01802 
01803 { "bmask",     F3F(2, 0x36, 0x019), F3F(~2, ~0x36, ~0x019), "1,2,d", 0, v9b },
01804 { "bshuffle",  F3F(2, 0x36, 0x04c), F3F(~2, ~0x36, ~0x04c), "v,B,H", 0, v9b },
01805 
01806 { "siam",      F3F(2, 0x36, 0x081), F3F(~2, ~0x36, ~0x081)|RD_G0|RS1_G0|RS2(~7), "3", 0, v9b },
01807 
01808 /* More v9 specific insns, these need to come last so they do not clash
01809    with v9a instructions such as "edge8" which looks like impdep1. */
01810 
01811 #define IMPDEP(name, code) \
01812 { name, F3(2, code, 0), F3(~2, ~code, ~0)|ASI(~0), "1,2,d", 0, v9notv9a }, \
01813 { name, F3(2, code, 1), F3(~2, ~code, ~1),     "1,i,d", 0, v9notv9a }, \
01814 { name, F3(2, code, 0), F3(~2, ~code, ~0),         "x,1,2,d", 0, v9notv9a }, \
01815 { name, F3(2, code, 0), F3(~2, ~code, ~0),         "x,e,f,g", 0, v9notv9a }
01816 
01817 IMPDEP ("impdep1", 0x36),
01818 IMPDEP ("impdep2", 0x37),
01819 
01820 #undef IMPDEP
01821 
01822 };
01823 
01824 const int sparc_num_opcodes = ((sizeof sparc_opcodes)/(sizeof sparc_opcodes[0]));
01825 
01826 /* Utilities for argument parsing.  */
01827 
01828 typedef struct
01829 {
01830   int value;
01831   const char *name;
01832 } arg;
01833 
01834 /* Look up NAME in TABLE.  */
01835 
01836 static int lookup_name PARAMS ((const arg *, const char *));
01837 static const char *lookup_value PARAMS ((const arg *, int));
01838 
01839 static int
01840 lookup_name (table, name)
01841      const arg *table;
01842      const char *name;
01843 {
01844   const arg *p;
01845 
01846   for (p = table; p->name; ++p)
01847     if (strcmp (name, p->name) == 0)
01848       return p->value;
01849 
01850   return -1;
01851 }
01852 
01853 /* Look up VALUE in TABLE.  */
01854 
01855 static const char *
01856 lookup_value (table, value)
01857      const arg *table;
01858      int value;
01859 {
01860   const arg *p;
01861 
01862   for (p = table; p->name; ++p)
01863     if (value == p->value)
01864       return p->name;
01865 
01866   return (char *) 0;
01867 }
01868 
01869 /* Handle ASI's.  */
01870 
01871 static arg asi_table[] =
01872 {
01873   /* These are in the v9 architecture manual.  */
01874   /* The shorter versions appear first, they're here because Sun's as has them.
01875      Sun's as uses #ASI_P_L instead of #ASI_PL (which appears in the
01876      UltraSPARC architecture manual).  */
01877   { 0x04, "#ASI_N" },
01878   { 0x0c, "#ASI_N_L" },
01879   { 0x10, "#ASI_AIUP" },
01880   { 0x11, "#ASI_AIUS" },
01881   { 0x18, "#ASI_AIUP_L" },
01882   { 0x19, "#ASI_AIUS_L" },
01883   { 0x80, "#ASI_P" },
01884   { 0x81, "#ASI_S" },
01885   { 0x82, "#ASI_PNF" },
01886   { 0x83, "#ASI_SNF" },
01887   { 0x88, "#ASI_P_L" },
01888   { 0x89, "#ASI_S_L" },
01889   { 0x8a, "#ASI_PNF_L" },
01890   { 0x8b, "#ASI_SNF_L" },
01891   { 0x04, "#ASI_NUCLEUS" },
01892   { 0x0c, "#ASI_NUCLEUS_LITTLE" },
01893   { 0x10, "#ASI_AS_IF_USER_PRIMARY" },
01894   { 0x11, "#ASI_AS_IF_USER_SECONDARY" },
01895   { 0x18, "#ASI_AS_IF_USER_PRIMARY_LITTLE" },
01896   { 0x19, "#ASI_AS_IF_USER_SECONDARY_LITTLE" },
01897   { 0x80, "#ASI_PRIMARY" },
01898   { 0x81, "#ASI_SECONDARY" },
01899   { 0x82, "#ASI_PRIMARY_NOFAULT" },
01900   { 0x83, "#ASI_SECONDARY_NOFAULT" },
01901   { 0x88, "#ASI_PRIMARY_LITTLE" },
01902   { 0x89, "#ASI_SECONDARY_LITTLE" },
01903   { 0x8a, "#ASI_PRIMARY_NOFAULT_LITTLE" },
01904   { 0x8b, "#ASI_SECONDARY_NOFAULT_LITTLE" },
01905   /* These are UltraSPARC extensions.  */
01906   /* FIXME: There are dozens of them.  Not sure we want them all.
01907      Most are for kernel building but some are for vis type stuff.  */
01908   { 0, 0 }
01909 };
01910 
01911 /* Return the value for ASI NAME, or -1 if not found.  */
01912 
01913 int
01914 sparc_encode_asi (name)
01915      const char *name;
01916 {
01917   return lookup_name (asi_table, name);
01918 }
01919 
01920 /* Return the name for ASI value VALUE or NULL if not found.  */
01921 
01922 const char *
01923 sparc_decode_asi (value)
01924      int value;
01925 {
01926   return lookup_value (asi_table, value);
01927 }
01928 
01929 /* Handle membar masks.  */
01930 
01931 static arg membar_table[] =
01932 {
01933   { 0x40, "#Sync" },
01934   { 0x20, "#MemIssue" },
01935   { 0x10, "#Lookaside" },
01936   { 0x08, "#StoreStore" },
01937   { 0x04, "#LoadStore" },
01938   { 0x02, "#StoreLoad" },
01939   { 0x01, "#LoadLoad" },
01940   { 0, 0 }
01941 };
01942 
01943 /* Return the value for membar arg NAME, or -1 if not found.  */
01944 
01945 int
01946 sparc_encode_membar (name)
01947      const char *name;
01948 {
01949   return lookup_name (membar_table, name);
01950 }
01951 
01952 /* Return the name for membar value VALUE or NULL if not found.  */
01953 
01954 const char *
01955 sparc_decode_membar (value)
01956      int value;
01957 {
01958   return lookup_value (membar_table, value);
01959 }
01960 
01961 /* Handle prefetch args.  */
01962 
01963 static arg prefetch_table[] =
01964 {
01965   { 0, "#n_reads" },
01966   { 1, "#one_read" },
01967   { 2, "#n_writes" },
01968   { 3, "#one_write" },
01969   { 4, "#page" },
01970   { 16, "#invalidate" },
01971   { 0, 0 }
01972 };
01973 
01974 /* Return the value for prefetch arg NAME, or -1 if not found.  */
01975 
01976 int
01977 sparc_encode_prefetch (name)
01978      const char *name;
01979 {
01980   return lookup_name (prefetch_table, name);
01981 }
01982 
01983 /* Return the name for prefetch value VALUE or NULL if not found.  */
01984 
01985 const char *
01986 sparc_decode_prefetch (value)
01987      int value;
01988 {
01989   return lookup_value (prefetch_table, value);
01990 }
01991 
01992 /* Handle sparclet coprocessor registers.  */
01993 
01994 static arg sparclet_cpreg_table[] =
01995 {
01996   { 0, "%ccsr" },
01997   { 1, "%ccfr" },
01998   { 2, "%cccrcr" },
01999   { 3, "%ccpr" },
02000   { 4, "%ccsr2" },
02001   { 5, "%cccrr" },
02002   { 6, "%ccrstr" },
02003   { 0, 0 }
02004 };
02005 
02006 /* Return the value for sparclet cpreg arg NAME, or -1 if not found.  */
02007 
02008 int
02009 sparc_encode_sparclet_cpreg (name)
02010      const char *name;
02011 {
02012   return lookup_name (sparclet_cpreg_table, name);
02013 }
02014 
02015 /* Return the name for sparclet cpreg value VALUE or NULL if not found.  */
02016 
02017 const char *
02018 sparc_decode_sparclet_cpreg (value)
02019      int value;
02020 {
02021   return lookup_value (sparclet_cpreg_table, value);
02022 }