|
Defines |
| #define | TARGET_VERSION fprintf (stderr, " (arc)") |
| #define | CPP_PREDEFINES "-Acpu=arc -Amachine=arc -D__arc__" |
| #define | CPP_SPEC "\%{!mcpu=*:-D__base__} %{mcpu=base:-D__base__} \%{EB:-D__big_endian__} \" |
| #define | CC1_SPEC "\%{mcpu=*:-mmangle-cpu} \%{EB:%{EL:%emay not use both -EB and -EL}} \%{EB:-mbig-endian} %{EL:-mlittle-endian} \" |
| #define | ASM_SPEC "%{v} %{EB} %{EL}" |
| #define | LINK_SPEC "%{v} %{EB} %{EL}" |
| #define | STARTFILE_SPEC "%{!shared:crt0.o%s} crtinit.o%s" |
| #define | ENDFILE_SPEC "crtfini.o%s" |
| #define | TARGET_MASK_MANGLE_CPU 1 |
| #define | TARGET_MANGLE_CPU (target_flags & TARGET_MASK_MANGLE_CPU) |
| #define | TARGET_MASK_ALIGN_LOOPS 4 |
| #define | TARGET_ALIGN_LOOPS (target_flags & TARGET_MASK_ALIGN_LOOPS) |
| #define | TARGET_MASK_BIG_ENDIAN 8 |
| #define | TARGET_BIG_ENDIAN (target_flags & TARGET_MASK_BIG_ENDIAN) |
| #define | TARGET_MASK_NO_COND_EXEC 0x10 |
| #define | TARGET_NO_COND_EXEC (target_flags & TARGET_MASK_NO_COND_EXEC) |
| #define | TARGET_SWITCHES |
| #define | TARGET_DEFAULT (0) |
| #define | SUBTARGET_SWITCHES |
| #define | TARGET_SHIFTER 0 |
| #define | TARGET_OPTIONS |
| #define | ARC_EXTENSION_CPU(cpu) 0 |
| #define | OVERRIDE_OPTIONS |
| #define | REAL_ARITHMETIC |
| #define | BITS_BIG_ENDIAN 1 |
| #define | BYTES_BIG_ENDIAN (TARGET_BIG_ENDIAN) |
| #define | WORDS_BIG_ENDIAN (TARGET_BIG_ENDIAN) |
| #define | LIBGCC2_WORDS_BIG_ENDIAN 0 |
| #define | BITS_PER_UNIT 8 |
| #define | BITS_PER_WORD 32 |
| #define | UNITS_PER_WORD 4 |
| #define | PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) |
| #define | PROMOTE_FUNCTION_ARGS |
| #define | PROMOTE_FUNCTION_RETURN |
| #define | POINTER_SIZE 32 |
| #define | PARM_BOUNDARY 32 |
| #define | STACK_BOUNDARY 64 |
| #define | ARC_STACK_ALIGN(LOC) (((LOC)+7) & ~7) |
| #define | FUNCTION_BOUNDARY 32 |
| #define | EMPTY_FIELD_BOUNDARY 32 |
| #define | STRUCTURE_SIZE_BOUNDARY 8 |
| #define | PCC_BITFIELD_TYPE_MATTERS 1 |
| #define | BIGGEST_ALIGNMENT 64 |
| #define | FASTEST_ALIGNMENT 32 |
| #define | CONSTANT_ALIGNMENT(EXP, ALIGN) |
| #define | DATA_ALIGNMENT(TYPE, ALIGN) |
| #define | STRICT_ALIGNMENT 1 |
| #define | SHORT_TYPE_SIZE 16 |
| #define | INT_TYPE_SIZE 32 |
| #define | LONG_TYPE_SIZE 32 |
| #define | LONG_LONG_TYPE_SIZE 64 |
| #define | FLOAT_TYPE_SIZE 32 |
| #define | DOUBLE_TYPE_SIZE 64 |
| #define | LONG_DOUBLE_TYPE_SIZE 64 |
| #define | DEFAULT_SIGNED_CHAR 1 |
| #define | SIZE_TYPE "long unsigned int" |
| #define | PTRDIFF_TYPE "long int" |
| #define | WCHAR_TYPE "short unsigned int" |
| #define | WCHAR_TYPE_SIZE 16 |
| #define | FIRST_PSEUDO_REGISTER 62 |
| #define | FIXED_REGISTERS |
| #define | CALL_USED_REGISTERS |
| #define | REG_ALLOC_ORDER |
| #define | CONDITIONAL_REGISTER_USAGE |
| #define | HARD_REGNO_NREGS(REGNO, MODE) ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) |
| #define | HARD_REGNO_MODE_OK(REGNO, MODE) ((arc_hard_regno_mode_ok[REGNO] & arc_mode_class[MODE]) != 0) |
| #define | MODES_TIEABLE_P(MODE1, MODE2) |
| #define | N_REG_CLASSES (int) LIM_REG_CLASSES |
| #define | REG_CLASS_NAMES { "NO_REGS", "LPCOUNT_REG", "GENERAL_REGS", "ALL_REGS" } |
| #define | REG_CLASS_CONTENTS |
| #define | REGNO_REG_CLASS(REGNO) (arc_regno_reg_class[REGNO]) |
| #define | INDEX_REG_CLASS GENERAL_REGS |
| #define | BASE_REG_CLASS GENERAL_REGS |
| #define | REG_CLASS_FROM_LETTER(C) |
| #define | REGNO_OK_FOR_BASE_P(REGNO) ((REGNO) < 29 || (unsigned) reg_renumber[REGNO] < 29) |
| #define | REGNO_OK_FOR_INDEX_P(REGNO) ((REGNO) < 29 || (unsigned) reg_renumber[REGNO] < 29) |
| #define | PREFERRED_RELOAD_CLASS(X, CLASS) (CLASS) |
| #define | CLASS_MAX_NREGS(CLASS, MODE) ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) |
| #define | SMALL_INT(X) ((unsigned) ((X) + 0x100) < 0x200) |
| #define | LARGE_INT(X) |
| #define | CONST_OK_FOR_LETTER_P(VALUE, C) |
| #define | CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) |
| #define | STACK_GROWS_DOWNWARD |
| #define | FRAME_GROWS_DOWNWARD |
| #define | STARTING_FRAME_OFFSET 0 |
| #define | STACK_POINTER_OFFSET FIRST_PARM_OFFSET (0) |
| #define | FIRST_PARM_OFFSET(FNDECL) 16 |
| #define | STACK_POINTER_REGNUM 28 |
| #define | FRAME_POINTER_REGNUM 27 |
| #define | ARG_POINTER_REGNUM FRAME_POINTER_REGNUM |
| #define | STATIC_CHAIN_REGNUM 24 |
| #define | FRAME_POINTER_REQUIRED (current_function_calls_alloca) |
| #define | INITIAL_FRAME_POINTER_OFFSET(VAR) ((VAR) = arc_compute_frame_size (get_frame_size ())) |
| #define | PROMOTE_PROTOTYPES 1 |
| #define | ACCUMULATE_OUTGOING_ARGS 1 |
| #define | RETURN_POPS_ARGS(DECL, FUNTYPE, SIZE) 0 |
| #define | CUMULATIVE_ARGS int |
| #define | INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) ((CUM) = 0) |
| #define | MAX_ARC_PARM_REGS 8 |
| #define | FUNCTION_ARG_REGNO_P(N) ((unsigned) (N) < MAX_ARC_PARM_REGS) |
| #define | ROUND_ADVANCE(SIZE) (((SIZE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) |
| #define | ROUND_ADVANCE_ARG(MODE, TYPE) |
| #define | ROUND_ADVANCE_CUM(CUM, MODE, TYPE) |
| #define | PASS_IN_REG_P(CUM, MODE, TYPE, NAMED) |
| #define | FUNCTION_ARG(CUM, MODE, TYPE, NAMED) |
| #define | FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0 |
| #define | FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) |
| #define | FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) FUNCTION_ARG_PASS_BY_REFERENCE ((CUM), (MODE), (TYPE), (NAMED)) |
| #define | FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) |
| #define | FUNCTION_ARG_BOUNDARY(MODE, TYPE) |
| #define | SETUP_INCOMING_VARARGS(ARGS_SO_FAR, MODE, TYPE, PRETEND_SIZE, NO_RTL) arc_setup_incoming_varargs(&ARGS_SO_FAR, MODE, TYPE, &PRETEND_SIZE, NO_RTL) |
| #define | FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx_REG (TYPE_MODE (VALTYPE), 0) |
| #define | LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0) |
| #define | FUNCTION_VALUE_REGNO_P(N) ((N) == 0) |
| #define | RETURN_IN_MEMORY(TYPE) |
| #define | DEFAULT_PCC_STRUCT_RETURN 0 |
| #define | STRUCT_VALUE 0 |
| #define | EXIT_IGNORE_STACK 0 |
| #define | DELAY_SLOTS_FOR_EPILOGUE arc_delay_slots_for_epilogue () |
| #define | ELIGIBLE_FOR_EPILOGUE_DELAY(TRIAL, SLOTS_FILLED) arc_eligible_for_epilogue_delay (TRIAL, SLOTS_FILLED) |
| #define | FUNCTION_PROFILER(FILE, LABELNO) |
| #define | TRAMPOLINE_TEMPLATE(FILE) |
| #define | TRAMPOLINE_SIZE 16 |
| #define | INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) |
| #define | TARGET_MEM_FUNCTIONS |
| #define | MAX_REGS_PER_ADDRESS 1 |
| #define | HAVE_PRE_INCREMENT 1 |
| #define | HAVE_PRE_DECREMENT 1 |
| #define | CONSTANT_ADDRESS_P(X) |
| #define | LEGITIMATE_CONSTANT_P(X) 1 |
| #define | REG_OK_FOR_INDEX_P(X) ((unsigned) REGNO (X) - 29 >= FIRST_PSEUDO_REGISTER - 29) |
| #define | REG_OK_FOR_BASE_P(X) ((unsigned) REGNO (X) - 29 >= FIRST_PSEUDO_REGISTER - 29) |
| #define | RTX_OK_FOR_BASE_P(X) (REG_P (X) && REG_OK_FOR_BASE_P (X)) |
| #define | RTX_OK_FOR_INDEX_P(X) (0 && /*???*/ REG_P (X) && REG_OK_FOR_INDEX_P (X)) |
| #define | RTX_OK_FOR_OFFSET_P(X) (GET_CODE (X) == CONST_INT && SMALL_INT (INTVAL (X))) |
| #define | LEGITIMATE_OFFSET_ADDRESS_P(MODE, X) |
| #define | GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) |
| #define | LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) |
| #define | GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) |
| #define | EXTRA_CC_MODES |
| #define | SELECT_CC_MODE(OP, X, Y) arc_select_cc_mode (OP, X, Y) |
| #define | REVERSIBLE_CC_MODE(MODE) 1 |
| #define | CONST_COSTS(X, CODE, OUTER_CODE) |
| #define | ADDRESS_COST(ADDR) (REG_P (ADDR) ? 1 : arc_address_cost (ADDR)) |
| #define | REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) 2 |
| #define | MEMORY_MOVE_COST(MODE, CLASS, IN) (GET_MODE_SIZE (MODE) <= UNITS_PER_WORD ? 6 : 12) |
| #define | BRANCH_COST 2 |
| #define | RTX_COSTS(X, CODE, OUTER_CODE) |
| #define | SLOW_BYTE_ACCESS 1 |
| #define | NO_FUNCTION_CSE |
| #define | NO_RECURSIVE_FUNCTION_CSE |
| #define | ARC_SECTION_FORMAT "\t.section %s" |
| #define | ARC_DEFAULT_TEXT_SECTION ".text" |
| #define | ARC_DEFAULT_DATA_SECTION ".data" |
| #define | ARC_DEFAULT_RODATA_SECTION ".rodata" |
| #define | TEXT_SECTION_ASM_OP arc_text_section |
| #define | DATA_SECTION_ASM_OP arc_data_section |
| #define | CONST_SECTION_ASM_OP arc_rodata_section |
| #define | BSS_SECTION_ASM_OP "\t.section .bss" |
| #define | ENCODE_SECTION_INFO(DECL) |
| #define | PUSHSECTION_ASM_OP "\t.section " |
| #define | OBJECT_FORMAT_ELF |
| #define | PIC_OFFSET_TABLE_REGNUM (flag_pic ? 26 : INVALID_REGNUM) |
| #define | FINALIZE_PIC arc_finalize_pic () |
| #define | ASM_FILE_START(FILE) arc_asm_file_start (FILE) |
| #define | ASM_COMMENT_START ";" |
| #define | ASM_APP_ON "" |
| #define | ASM_APP_OFF "" |
| #define | ASM_OUTPUT_LABEL(FILE, NAME) do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0) |
| #define | ASM_GLOBALIZE_LABEL(FILE, NAME) |
| #define | ASM_OUTPUT_LABELREF(FILE, NAME) |
| #define | ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) |
| #define | ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) |
| #define | SET_ASM_OP "\t.set\t" |
| #define | REGISTER_NAMES |
| #define | FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) arc_final_prescan_insn (INSN, OPVEC, NOPERANDS) |
| #define | PRINT_OPERAND_PUNCT_VALID_P(CHAR) arc_punct_chars[(unsigned char) (CHAR)] |
| #define | PRINT_OPERAND(FILE, X, CODE) arc_print_operand (FILE, X, CODE) |
| #define | PRINT_OPERAND_ADDRESS(FILE, ADDR) arc_print_operand_address (FILE, ADDR) |
| #define | ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) |
| #define | ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) |
| #define | LOOP_ALIGN(LABEL) (TARGET_ALIGN_LOOPS ? 5 : 0) |
| #define | ASM_OUTPUT_ALIGN(FILE, LOG) do { if ((LOG) != 0) fprintf (FILE, "\t.align %d\n", 1 << (LOG)); } while (0) |
| #define | PREFERRED_DEBUGGING_TYPE DBX_DEBUG |
| #define | DBX_CONTIN_LENGTH 0 |
| #define | CASE_VECTOR_MODE Pmode |
| #define | WORD_REGISTER_OPERATIONS |
| #define | LOAD_EXTEND_OP(MODE) ZERO_EXTEND |
| #define | MOVE_MAX 4 |
| #define | SHIFT_COUNT_TRUNCATED 1 |
| #define | TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 |
| #define | STORE_FLAG_VALUE 1 |
| #define | Pmode SImode |
| #define | FUNCTION_MODE SImode |
| #define | SETJMP_VIA_SAVE_AREA |
| #define | ARC_INTERRUPT_P(TYPE) ((TYPE) == ARC_FUNCTION_ILINK1 || (TYPE) == ARC_FUNCTION_ILINK2) |
| #define | EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) arc_va_start (stdarg, valist, nextarg) |
| #define | EXPAND_BUILTIN_VA_ARG(valist, type) arc_va_arg (valist, type) |
Enumerations |
| enum | reg_class {
NO_REGS,
R2,
R0_1,
INDEX_REGS,
BASE_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
LR0_REGS,
GENERAL_REGS,
BP_REGS,
FC_REGS,
CR_REGS,
Q_REGS,
SPECIAL_REGS,
ACCUM0_REGS,
ACCUM_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R24_REG,
R25_REG,
R27_REG,
GENERAL_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
LPCOUNT_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPU_REGS,
LO_REGS,
STACK_REG,
BASE_REGS,
HI_REGS,
CC_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REG,
POINTER_X_REGS,
POINTER_Y_REGS,
POINTER_Z_REGS,
STACK_REG,
BASE_POINTER_REGS,
POINTER_REGS,
ADDW_REGS,
SIMPLE_LD_REGS,
LD_REGS,
NO_LD_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0R1_REGS,
R2R3_REGS,
EXT_LOW_REGS,
EXT_REGS,
ADDR_REGS,
INDEX_REGS,
BK_REG,
SP_REG,
RC_REG,
COUNTER_REGS,
INT_REGS,
GENERAL_REGS,
DP_REG,
ST_REG,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
S_REGS,
INDEX_REGS,
SP_REGS,
A_REGS,
SI_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
REPEAT_REGS,
CR_REGS,
ACCUM_REGS,
OTHER_FLAG_REGS,
F0_REGS,
F1_REGS,
BR_FLAG_REGS,
FLAG_REGS,
EVEN_REGS,
GPR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
A0H_REG,
A0L_REG,
A0_REG,
A1H_REG,
ACCUM_HIGH_REGS,
A1L_REG,
ACCUM_LOW_REGS,
A1_REG,
ACCUM_REGS,
X_REG,
X_OR_ACCUM_LOW_REGS,
X_OR_ACCUM_REGS,
YH_REG,
YH_OR_ACCUM_HIGH_REGS,
X_OR_YH_REGS,
YL_REG,
YL_OR_ACCUM_LOW_REGS,
X_OR_YL_REGS,
X_OR_Y_REGS,
Y_REG,
ACCUM_OR_Y_REGS,
PH_REG,
X_OR_PH_REGS,
PL_REG,
PL_OR_ACCUM_LOW_REGS,
X_OR_PL_REGS,
YL_OR_PL_OR_ACCUM_LOW_REGS,
P_REG,
ACCUM_OR_P_REGS,
YL_OR_P_REGS,
ACCUM_LOW_OR_YL_OR_P_REGS,
Y_OR_P_REGS,
ACCUM_Y_OR_P_REGS,
NO_FRAME_Y_ADDR_REGS,
Y_ADDR_REGS,
ACCUM_LOW_OR_Y_ADDR_REGS,
ACCUM_OR_Y_ADDR_REGS,
X_OR_Y_ADDR_REGS,
Y_OR_Y_ADDR_REGS,
P_OR_Y_ADDR_REGS,
NON_HIGH_YBASE_ELIGIBLE_REGS,
YBASE_ELIGIBLE_REGS,
J_REG,
J_OR_DAU_16_BIT_REGS,
BMU_REGS,
NOHIGH_NON_ADDR_REGS,
NON_ADDR_REGS,
SLOW_MEM_LOAD_REGS,
NOHIGH_NON_YBASE_REGS,
NO_ACCUM_NON_YBASE_REGS,
NON_YBASE_REGS,
YBASE_VIRT_REGS,
ACCUM_LOW_OR_YBASE_REGS,
ACCUM_OR_YBASE_REGS,
X_OR_YBASE_REGS,
Y_OR_YBASE_REGS,
ACCUM_LOW_YL_PL_OR_YBASE_REGS,
P_OR_YBASE_REGS,
ACCUM_Y_P_OR_YBASE_REGS,
Y_ADDR_OR_YBASE_REGS,
YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS,
YBASE_OR_YBASE_ELIGIBLE_REGS,
NO_HIGH_ALL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MULTIPLY_32_REG,
MULTIPLY_64_REG,
LOW_REGS,
HIGH_REGS,
REAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
MAC_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ADDR_REGS,
DATA_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
AREG,
DREG,
CREG,
BREG,
SIREG,
DIREG,
AD_REGS,
Q_REGS,
NON_Q_REGS,
INDEX_REGS,
LEGACY_REGS,
GENERAL_REGS,
FP_TOP_REG,
FP_SECOND_REG,
FLOAT_REGS,
SSE_REGS,
MMX_REGS,
FP_TOP_SSE_REGS,
FP_SECOND_SSE_REGS,
FLOAT_SSE_REGS,
FLOAT_INT_REGS,
INT_SSE_REGS,
FLOAT_INT_SSE_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GLOBAL_REGS,
LOCAL_REGS,
LOCAL_OR_GLOBAL_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
PR_REGS,
BR_REGS,
AR_M_REGS,
AR_I_REGS,
ADDL_REGS,
GR_REGS,
FR_REGS,
GR_AND_BR_REGS,
GR_AND_FR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
CARRY_REG,
ACCUM_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
D_REGS,
X_REGS,
Y_REGS,
SP_REGS,
DA_REGS,
DB_REGS,
Z_REGS,
D8_REGS,
Q_REGS,
D_OR_X_REGS,
D_OR_Y_REGS,
D_OR_SP_REGS,
X_OR_Y_REGS,
A_REGS,
X_OR_SP_REGS,
Y_OR_SP_REGS,
X_OR_Y_OR_D_REGS,
A_OR_D_REGS,
A_OR_SP_REGS,
H_REGS,
S_REGS,
D_OR_S_REGS,
X_OR_S_REGS,
Y_OR_S_REGS,
SP_OR_S_REGS,
D_OR_X_OR_S_REGS,
D_OR_Y_OR_S_REGS,
D_OR_SP_OR_S_REGS,
A_OR_S_REGS,
D_OR_A_OR_S_REGS,
TMP_REGS,
D_OR_A_OR_TMP_REGS,
G_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDR_REGS,
FP_REGS,
GENERAL_REGS,
DATA_OR_FP_REGS,
ADDR_OR_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
AP_REG,
XRF_REGS,
GENERAL_REGS,
AGRF_REGS,
XGRF_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ONLYR1_REGS,
LRW_REGS,
GENERAL_REGS,
C_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
REMAINDER_REG,
HIMULT_REG,
SYSTEM_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDRESS_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDRESS_REGS,
SP_REGS,
DATA_OR_ADDRESS_REGS,
SP_OR_ADDRESS_REGS,
EXTENDED_REGS,
DATA_OR_EXTENDED_REGS,
ADDRESS_OR_EXTENDED_REGS,
SP_OR_EXTENDED_REGS,
SP_OR_ADDRESS_OR_EXTENDED_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FLOAT_REG0,
LONG_FLOAT_REG0,
FLOAT_REGS,
FP_REGS,
GEN_AND_FP_REGS,
FRAME_POINTER_REG,
STACK_POINTER_REG,
GEN_AND_MEM_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MUL_REGS,
GENERAL_REGS,
LOAD_FPU_REGS,
NO_LOAD_FPU_REGS,
FPU_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
OUT_REGS,
STD_REGS,
ARG_REGS,
SRC_REGS,
DST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
R15_REGS,
BASE_REGS,
GENERAL_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BASE_REGS,
GENERAL_REGS,
FLOAT_REGS,
ALTIVEC_REGS,
VRSAVE_REGS,
NON_SPECIAL_REGS,
MQ_REGS,
LINK_REGS,
CTR_REGS,
LINK_OR_CTR_REGS,
SPECIAL_REGS,
SPEC_OR_GEN_REGS,
CR0_REGS,
CR_REGS,
NON_FLOAT_REGS,
XER_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ADDR_REGS,
GENERAL_REGS,
FP_REGS,
ADDR_FP_REGS,
GENERAL_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
PR_REGS,
T_REGS,
MAC_REGS,
FPUL_REGS,
SIBCALL_REGS,
GENERAL_REGS,
FP0_REGS,
FP_REGS,
DF_REGS,
FPSCR_REGS,
GENERAL_FP_REGS,
TARGET_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
HILO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HILO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPCC_REGS,
I64_REGS,
GENERAL_REGS,
FP_REGS,
EXTRA_FP_REGS,
GENERAL_OR_FP_REGS,
GENERAL_OR_EXTRA_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
R1_REGS,
TWO_REGS,
R2_REGS,
EIGHT_REGS,
R8_REGS,
ICALL_REGS,
GENERAL_REGS,
CARRY_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BR_REGS,
FP_REGS,
ACC_REG,
SP_REG,
RL_REGS,
GR_REGS,
AR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
HILO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HILO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
HILO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HILO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R2,
R0_1,
INDEX_REGS,
BASE_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
LR0_REGS,
GENERAL_REGS,
BP_REGS,
FC_REGS,
CR_REGS,
Q_REGS,
SPECIAL_REGS,
ACCUM0_REGS,
ACCUM_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R24_REG,
R25_REG,
R27_REG,
GENERAL_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
LPCOUNT_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPU_REGS,
LO_REGS,
STACK_REG,
BASE_REGS,
HI_REGS,
CC_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REG,
POINTER_X_REGS,
POINTER_Y_REGS,
POINTER_Z_REGS,
STACK_REG,
BASE_POINTER_REGS,
POINTER_REGS,
ADDW_REGS,
SIMPLE_LD_REGS,
LD_REGS,
NO_LD_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0R1_REGS,
R2R3_REGS,
EXT_LOW_REGS,
EXT_REGS,
ADDR_REGS,
INDEX_REGS,
BK_REG,
SP_REG,
RC_REG,
COUNTER_REGS,
INT_REGS,
GENERAL_REGS,
DP_REG,
ST_REG,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
S_REGS,
INDEX_REGS,
SP_REGS,
A_REGS,
SI_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
REPEAT_REGS,
CR_REGS,
ACCUM_REGS,
OTHER_FLAG_REGS,
F0_REGS,
F1_REGS,
BR_FLAG_REGS,
FLAG_REGS,
EVEN_REGS,
GPR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
A0H_REG,
A0L_REG,
A0_REG,
A1H_REG,
ACCUM_HIGH_REGS,
A1L_REG,
ACCUM_LOW_REGS,
A1_REG,
ACCUM_REGS,
X_REG,
X_OR_ACCUM_LOW_REGS,
X_OR_ACCUM_REGS,
YH_REG,
YH_OR_ACCUM_HIGH_REGS,
X_OR_YH_REGS,
YL_REG,
YL_OR_ACCUM_LOW_REGS,
X_OR_YL_REGS,
X_OR_Y_REGS,
Y_REG,
ACCUM_OR_Y_REGS,
PH_REG,
X_OR_PH_REGS,
PL_REG,
PL_OR_ACCUM_LOW_REGS,
X_OR_PL_REGS,
YL_OR_PL_OR_ACCUM_LOW_REGS,
P_REG,
ACCUM_OR_P_REGS,
YL_OR_P_REGS,
ACCUM_LOW_OR_YL_OR_P_REGS,
Y_OR_P_REGS,
ACCUM_Y_OR_P_REGS,
NO_FRAME_Y_ADDR_REGS,
Y_ADDR_REGS,
ACCUM_LOW_OR_Y_ADDR_REGS,
ACCUM_OR_Y_ADDR_REGS,
X_OR_Y_ADDR_REGS,
Y_OR_Y_ADDR_REGS,
P_OR_Y_ADDR_REGS,
NON_HIGH_YBASE_ELIGIBLE_REGS,
YBASE_ELIGIBLE_REGS,
J_REG,
J_OR_DAU_16_BIT_REGS,
BMU_REGS,
NOHIGH_NON_ADDR_REGS,
NON_ADDR_REGS,
SLOW_MEM_LOAD_REGS,
NOHIGH_NON_YBASE_REGS,
NO_ACCUM_NON_YBASE_REGS,
NON_YBASE_REGS,
YBASE_VIRT_REGS,
ACCUM_LOW_OR_YBASE_REGS,
ACCUM_OR_YBASE_REGS,
X_OR_YBASE_REGS,
Y_OR_YBASE_REGS,
ACCUM_LOW_YL_PL_OR_YBASE_REGS,
P_OR_YBASE_REGS,
ACCUM_Y_P_OR_YBASE_REGS,
Y_ADDR_OR_YBASE_REGS,
YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS,
YBASE_OR_YBASE_ELIGIBLE_REGS,
NO_HIGH_ALL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MULTIPLY_32_REG,
MULTIPLY_64_REG,
LOW_REGS,
HIGH_REGS,
REAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
MAC_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ADDR_REGS,
DATA_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
AREG,
DREG,
CREG,
BREG,
SIREG,
DIREG,
AD_REGS,
Q_REGS,
NON_Q_REGS,
INDEX_REGS,
LEGACY_REGS,
GENERAL_REGS,
FP_TOP_REG,
FP_SECOND_REG,
FLOAT_REGS,
SSE_REGS,
MMX_REGS,
FP_TOP_SSE_REGS,
FP_SECOND_SSE_REGS,
FLOAT_SSE_REGS,
FLOAT_INT_REGS,
INT_SSE_REGS,
FLOAT_INT_SSE_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GLOBAL_REGS,
LOCAL_REGS,
LOCAL_OR_GLOBAL_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
PR_REGS,
BR_REGS,
AR_M_REGS,
AR_I_REGS,
ADDL_REGS,
GR_REGS,
FR_REGS,
GR_AND_BR_REGS,
GR_AND_FR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
CARRY_REG,
ACCUM_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
D_REGS,
X_REGS,
Y_REGS,
SP_REGS,
DA_REGS,
DB_REGS,
Z_REGS,
D8_REGS,
Q_REGS,
D_OR_X_REGS,
D_OR_Y_REGS,
D_OR_SP_REGS,
X_OR_Y_REGS,
A_REGS,
X_OR_SP_REGS,
Y_OR_SP_REGS,
X_OR_Y_OR_D_REGS,
A_OR_D_REGS,
A_OR_SP_REGS,
H_REGS,
S_REGS,
D_OR_S_REGS,
X_OR_S_REGS,
Y_OR_S_REGS,
SP_OR_S_REGS,
D_OR_X_OR_S_REGS,
D_OR_Y_OR_S_REGS,
D_OR_SP_OR_S_REGS,
A_OR_S_REGS,
D_OR_A_OR_S_REGS,
TMP_REGS,
D_OR_A_OR_TMP_REGS,
G_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDR_REGS,
FP_REGS,
GENERAL_REGS,
DATA_OR_FP_REGS,
ADDR_OR_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
AP_REG,
XRF_REGS,
GENERAL_REGS,
AGRF_REGS,
XGRF_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ONLYR1_REGS,
LRW_REGS,
GENERAL_REGS,
C_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
REMAINDER_REG,
HIMULT_REG,
SYSTEM_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDRESS_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDRESS_REGS,
SP_REGS,
DATA_OR_ADDRESS_REGS,
SP_OR_ADDRESS_REGS,
EXTENDED_REGS,
DATA_OR_EXTENDED_REGS,
ADDRESS_OR_EXTENDED_REGS,
SP_OR_EXTENDED_REGS,
SP_OR_ADDRESS_OR_EXTENDED_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FLOAT_REG0,
LONG_FLOAT_REG0,
FLOAT_REGS,
FP_REGS,
GEN_AND_FP_REGS,
FRAME_POINTER_REG,
STACK_POINTER_REG,
GEN_AND_MEM_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MUL_REGS,
GENERAL_REGS,
LOAD_FPU_REGS,
NO_LOAD_FPU_REGS,
FPU_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
OUT_REGS,
STD_REGS,
ARG_REGS,
SRC_REGS,
DST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
R15_REGS,
BASE_REGS,
GENERAL_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BASE_REGS,
GENERAL_REGS,
FLOAT_REGS,
ALTIVEC_REGS,
VRSAVE_REGS,
NON_SPECIAL_REGS,
MQ_REGS,
LINK_REGS,
CTR_REGS,
LINK_OR_CTR_REGS,
SPECIAL_REGS,
SPEC_OR_GEN_REGS,
CR0_REGS,
CR_REGS,
NON_FLOAT_REGS,
XER_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ADDR_REGS,
GENERAL_REGS,
FP_REGS,
ADDR_FP_REGS,
GENERAL_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
PR_REGS,
T_REGS,
MAC_REGS,
FPUL_REGS,
SIBCALL_REGS,
GENERAL_REGS,
FP0_REGS,
FP_REGS,
DF_REGS,
FPSCR_REGS,
GENERAL_FP_REGS,
TARGET_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
HILO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HILO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPCC_REGS,
I64_REGS,
GENERAL_REGS,
FP_REGS,
EXTRA_FP_REGS,
GENERAL_OR_FP_REGS,
GENERAL_OR_EXTRA_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
R1_REGS,
TWO_REGS,
R2_REGS,
EIGHT_REGS,
R8_REGS,
ICALL_REGS,
GENERAL_REGS,
CARRY_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BR_REGS,
FP_REGS,
ACC_REG,
SP_REG,
RL_REGS,
GR_REGS,
AR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
HILO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HILO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
HILO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HILO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REG,
R24_REG,
R25_REG,
R27_REG,
GENERAL_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
LPCOUNT_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPA_REGS,
CIRRUS_REGS,
VFP_REGS,
IWMMXT_GR_REGS,
IWMMXT_REGS,
LO_REGS,
STACK_REG,
BASE_REGS,
HI_REGS,
CC_REG,
VFPCC_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REG,
POINTER_X_REGS,
POINTER_Y_REGS,
POINTER_Z_REGS,
STACK_REG,
BASE_POINTER_REGS,
POINTER_REGS,
ADDW_REGS,
SIMPLE_LD_REGS,
LD_REGS,
NO_LD_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
IREGS,
BREGS,
LREGS,
MREGS,
CIRCREGS,
DAGREGS,
EVEN_AREGS,
ODD_AREGS,
AREGS,
CCREGS,
EVEN_DREGS,
ODD_DREGS,
DREGS,
PREGS_CLOBBERED,
PREGS,
DPREGS,
MOST_REGS,
PROLOGUE_REGS,
NON_A_CC_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0R1_REGS,
R2R3_REGS,
EXT_LOW_REGS,
EXT_REGS,
ADDR_REGS,
INDEX_REGS,
BK_REG,
SP_REG,
RC_REG,
COUNTER_REGS,
INT_REGS,
GENERAL_REGS,
DP_REG,
ST_REG,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MULTIPLY_32_REG,
MULTIPLY_64_REG,
LOW_REGS,
HIGH_REGS,
REAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ICC_REGS,
FCC_REGS,
CC_REGS,
ICR_REGS,
FCR_REGS,
CR_REGS,
LCR_REG,
LR_REG,
GR8_REGS,
GR9_REGS,
GR89_REGS,
FDPIC_REGS,
FDPIC_FPTR_REGS,
FDPIC_CALL_REGS,
SPR_REGS,
QUAD_ACC_REGS,
EVEN_ACC_REGS,
ACC_REGS,
ACCG_REGS,
QUAD_FPR_REGS,
FEVEN_REGS,
FPR_REGS,
QUAD_REGS,
EVEN_REGS,
GPR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
COUNTER_REGS,
SOURCE_REGS,
DESTINATION_REGS,
GENERAL_REGS,
MAC_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
AREG,
DREG,
CREG,
BREG,
SIREG,
DIREG,
AD_REGS,
Q_REGS,
NON_Q_REGS,
INDEX_REGS,
LEGACY_REGS,
GENERAL_REGS,
FP_TOP_REG,
FP_SECOND_REG,
FLOAT_REGS,
SSE_REGS,
MMX_REGS,
FP_TOP_SSE_REGS,
FP_SECOND_SSE_REGS,
FLOAT_SSE_REGS,
FLOAT_INT_REGS,
INT_SSE_REGS,
FLOAT_INT_SSE_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
PR_REGS,
BR_REGS,
AR_M_REGS,
AR_I_REGS,
ADDL_REGS,
GR_REGS,
FR_REGS,
GR_AND_BR_REGS,
GR_AND_FR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DPH_REGS,
DPL_REGS,
DP_REGS,
SP_REGS,
IPH_REGS,
IPL_REGS,
IP_REGS,
DP_SP_REGS,
PTR_REGS,
NONPTR_REGS,
NONSP_REGS,
GENERAL_REGS,
ALL_REGS = GENERAL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
CARRY_REG,
ACCUM_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
D_REGS,
X_REGS,
Y_REGS,
SP_REGS,
DA_REGS,
DB_REGS,
Z_REGS,
D8_REGS,
Q_REGS,
D_OR_X_REGS,
D_OR_Y_REGS,
D_OR_SP_REGS,
X_OR_Y_REGS,
A_REGS,
X_OR_SP_REGS,
Y_OR_SP_REGS,
X_OR_Y_OR_D_REGS,
A_OR_D_REGS,
A_OR_SP_REGS,
H_REGS,
S_REGS,
D_OR_S_REGS,
X_OR_S_REGS,
Y_OR_S_REGS,
Z_OR_S_REGS,
SP_OR_S_REGS,
D_OR_X_OR_S_REGS,
D_OR_Y_OR_S_REGS,
D_OR_SP_OR_S_REGS,
A_OR_S_REGS,
D_OR_A_OR_S_REGS,
TMP_REGS,
D_OR_A_OR_TMP_REGS,
G_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDR_REGS,
FP_REGS,
GENERAL_REGS,
DATA_OR_FP_REGS,
ADDR_OR_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ONLYR1_REGS,
LRW_REGS,
GENERAL_REGS,
C_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
PIC_FN_ADDR_REG,
LEA_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
REMAINDER_REG,
HIMULT_REG,
SYSTEM_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDRESS_REGS,
SP_REGS,
DATA_OR_ADDRESS_REGS,
SP_OR_ADDRESS_REGS,
EXTENDED_REGS,
DATA_OR_EXTENDED_REGS,
ADDRESS_OR_EXTENDED_REGS,
SP_OR_EXTENDED_REGS,
SP_OR_ADDRESS_OR_EXTENDED_REGS,
FP_REGS,
FP_ACC_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FLOAT_REG0,
LONG_FLOAT_REG0,
FLOAT_REGS,
LONG_REGS,
FP_REGS,
GEN_AND_FP_REGS,
FRAME_POINTER_REG,
STACK_POINTER_REG,
GEN_AND_MEM_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MUL_REGS,
GENERAL_REGS,
LOAD_FPU_REGS,
NO_LOAD_FPU_REGS,
FPU_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BASE_REGS,
GENERAL_REGS,
FLOAT_REGS,
ALTIVEC_REGS,
VRSAVE_REGS,
VSCR_REGS,
SPE_ACC_REGS,
SPEFSCR_REGS,
NON_SPECIAL_REGS,
MQ_REGS,
LINK_REGS,
CTR_REGS,
LINK_OR_CTR_REGS,
SPECIAL_REGS,
SPEC_OR_GEN_REGS,
CR0_REGS,
CR_REGS,
NON_FLOAT_REGS,
XER_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
CC_REGS,
ADDR_REGS,
GENERAL_REGS,
ACCESS_REGS,
ADDR_CC_REGS,
GENERAL_CC_REGS,
FP_REGS,
ADDR_FP_REGS,
GENERAL_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
PR_REGS,
T_REGS,
MAC_REGS,
FPUL_REGS,
SIBCALL_REGS,
GENERAL_REGS,
FP0_REGS,
FP_REGS,
DF_HI_REGS,
DF_REGS,
FPSCR_REGS,
GENERAL_FP_REGS,
TARGET_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPCC_REGS,
I64_REGS,
GENERAL_REGS,
FP_REGS,
EXTRA_FP_REGS,
GENERAL_OR_FP_REGS,
GENERAL_OR_EXTRA_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
R1_REGS,
TWO_REGS,
R2_REGS,
EIGHT_REGS,
R8_REGS,
ICALL_REGS,
GENERAL_REGS,
CARRY_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BR_REGS,
FP_REGS,
ACC_REG,
SP_REG,
RL_REGS,
GR_REGS,
AR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REG,
R24_REG,
R25_REG,
R27_REG,
GENERAL_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
LPCOUNT_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPA_REGS,
CIRRUS_REGS,
VFP_REGS,
IWMMXT_GR_REGS,
IWMMXT_REGS,
LO_REGS,
STACK_REG,
BASE_REGS,
HI_REGS,
CC_REG,
VFPCC_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REG,
POINTER_X_REGS,
POINTER_Y_REGS,
POINTER_Z_REGS,
STACK_REG,
BASE_POINTER_REGS,
POINTER_REGS,
ADDW_REGS,
SIMPLE_LD_REGS,
LD_REGS,
NO_LD_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
IREGS,
BREGS,
LREGS,
MREGS,
CIRCREGS,
DAGREGS,
EVEN_AREGS,
ODD_AREGS,
AREGS,
CCREGS,
EVEN_DREGS,
ODD_DREGS,
DREGS,
FDPIC_REGS,
FDPIC_FPTR_REGS,
PREGS_CLOBBERED,
PREGS,
IPREGS,
DPREGS,
MOST_REGS,
LT_REGS,
LC_REGS,
LB_REGS,
PROLOGUE_REGS,
NON_A_CC_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0R1_REGS,
R2R3_REGS,
EXT_LOW_REGS,
EXT_REGS,
ADDR_REGS,
INDEX_REGS,
BK_REG,
SP_REG,
RC_REG,
COUNTER_REGS,
INT_REGS,
GENERAL_REGS,
DP_REG,
ST_REG,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MOF_REGS,
CC0_REGS,
SPECIAL_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
LO_REGS,
HI_REGS,
HILO_REGS,
NOSP_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MULTIPLY_32_REG,
MULTIPLY_64_REG,
LOW_REGS,
HIGH_REGS,
REAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ICC_REGS,
FCC_REGS,
CC_REGS,
ICR_REGS,
FCR_REGS,
CR_REGS,
LCR_REG,
LR_REG,
GR8_REGS,
GR9_REGS,
GR89_REGS,
FDPIC_REGS,
FDPIC_FPTR_REGS,
FDPIC_CALL_REGS,
SPR_REGS,
QUAD_ACC_REGS,
EVEN_ACC_REGS,
ACC_REGS,
ACCG_REGS,
QUAD_FPR_REGS,
FEVEN_REGS,
FPR_REGS,
QUAD_REGS,
EVEN_REGS,
GPR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
COUNTER_REGS,
SOURCE_REGS,
DESTINATION_REGS,
GENERAL_REGS,
MAC_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
AREG,
DREG,
CREG,
BREG,
SIREG,
DIREG,
AD_REGS,
Q_REGS,
NON_Q_REGS,
INDEX_REGS,
LEGACY_REGS,
GENERAL_REGS,
FP_TOP_REG,
FP_SECOND_REG,
FLOAT_REGS,
SSE_REGS,
MMX_REGS,
FP_TOP_SSE_REGS,
FP_SECOND_SSE_REGS,
FLOAT_SSE_REGS,
FLOAT_INT_REGS,
INT_SSE_REGS,
FLOAT_INT_SSE_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
PR_REGS,
BR_REGS,
AR_M_REGS,
AR_I_REGS,
ADDL_REGS,
GR_REGS,
FP_REGS,
FR_REGS,
GR_AND_BR_REGS,
GR_AND_FR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
SP_REGS,
FB_REGS,
SB_REGS,
CR_REGS,
R0_REGS,
R1_REGS,
R2_REGS,
R3_REGS,
R02_REGS,
HL_REGS,
QI_REGS,
R23_REGS,
R03_REGS,
DI_REGS,
A0_REGS,
A1_REGS,
A_REGS,
AD_REGS,
PS_REGS,
SI_REGS,
HI_REGS,
RA_REGS,
GENERAL_REGS,
FLG_REGS,
HC_REGS,
MEM_REGS,
R02_A_MEM_REGS,
A_HL_MEM_REGS,
R1_R3_A_MEM_REGS,
R03_MEM_REGS,
A_HI_MEM_REGS,
A_AD_CR_MEM_SI_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
CARRY_REG,
ACCUM_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
D_REGS,
X_REGS,
Y_REGS,
SP_REGS,
DA_REGS,
DB_REGS,
Z_REGS,
D8_REGS,
Q_REGS,
D_OR_X_REGS,
D_OR_Y_REGS,
D_OR_SP_REGS,
X_OR_Y_REGS,
A_REGS,
X_OR_SP_REGS,
Y_OR_SP_REGS,
X_OR_Y_OR_D_REGS,
A_OR_D_REGS,
A_OR_SP_REGS,
H_REGS,
S_REGS,
D_OR_S_REGS,
X_OR_S_REGS,
Y_OR_S_REGS,
Z_OR_S_REGS,
SP_OR_S_REGS,
D_OR_X_OR_S_REGS,
D_OR_Y_OR_S_REGS,
D_OR_SP_OR_S_REGS,
A_OR_S_REGS,
D_OR_A_OR_S_REGS,
TMP_REGS,
D_OR_A_OR_TMP_REGS,
G_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDR_REGS,
FP_REGS,
GENERAL_REGS,
DATA_OR_FP_REGS,
ADDR_OR_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ONLYR1_REGS,
LRW_REGS,
GENERAL_REGS,
C_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
PIC_FN_ADDR_REG,
V1_REG,
LEA_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
DSP_ACC_REGS,
ACC_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
REMAINDER_REG,
HIMULT_REG,
SYSTEM_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDRESS_REGS,
SP_REGS,
DATA_OR_ADDRESS_REGS,
SP_OR_ADDRESS_REGS,
EXTENDED_REGS,
DATA_OR_EXTENDED_REGS,
ADDRESS_OR_EXTENDED_REGS,
SP_OR_EXTENDED_REGS,
SP_OR_ADDRESS_OR_EXTENDED_REGS,
FP_REGS,
FP_ACC_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MUL_REGS,
GENERAL_REGS,
LOAD_FPU_REGS,
NO_LOAD_FPU_REGS,
FPU_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BASE_REGS,
GENERAL_REGS,
FLOAT_REGS,
ALTIVEC_REGS,
VRSAVE_REGS,
VSCR_REGS,
SPE_ACC_REGS,
SPEFSCR_REGS,
NON_SPECIAL_REGS,
MQ_REGS,
LINK_REGS,
CTR_REGS,
LINK_OR_CTR_REGS,
SPECIAL_REGS,
SPEC_OR_GEN_REGS,
CR0_REGS,
CR_REGS,
NON_FLOAT_REGS,
XER_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
CC_REGS,
ADDR_REGS,
GENERAL_REGS,
ACCESS_REGS,
ADDR_CC_REGS,
GENERAL_CC_REGS,
FP_REGS,
ADDR_FP_REGS,
GENERAL_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
G16_REGS,
G32_REGS,
T32_REGS,
HI_REG,
LO_REG,
CE_REGS,
CN_REG,
LC_REG,
SC_REG,
SP_REGS,
CR_REGS,
CP1_REGS,
CP2_REGS,
CP3_REGS,
CPA_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
PR_REGS,
T_REGS,
MAC_REGS,
FPUL_REGS,
SIBCALL_REGS,
GENERAL_REGS,
FP0_REGS,
FP_REGS,
DF_HI_REGS,
DF_REGS,
FPSCR_REGS,
GENERAL_FP_REGS,
GENERAL_DF_REGS,
TARGET_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPCC_REGS,
I64_REGS,
GENERAL_REGS,
FP_REGS,
EXTRA_FP_REGS,
GENERAL_OR_FP_REGS,
GENERAL_OR_EXTRA_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
R1_REGS,
TWO_REGS,
R2_REGS,
EIGHT_REGS,
R8_REGS,
ICALL_REGS,
GENERAL_REGS,
CARRY_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BR_REGS,
FP_REGS,
ACC_REG,
SP_REG,
RL_REGS,
GR_REGS,
AR_REGS,
ALL_REGS,
LIM_REG_CLASSES
} |
| enum | arc_function_type {
ARC_FUNCTION_UNKNOWN,
ARC_FUNCTION_NORMAL,
ARC_FUNCTION_ILINK1,
ARC_FUNCTION_ILINK2,
ARC_FUNCTION_UNKNOWN,
ARC_FUNCTION_NORMAL,
ARC_FUNCTION_ILINK1,
ARC_FUNCTION_ILINK2,
ARC_FUNCTION_UNKNOWN,
ARC_FUNCTION_NORMAL,
ARC_FUNCTION_ILINK1,
ARC_FUNCTION_ILINK2,
ARC_FUNCTION_UNKNOWN,
ARC_FUNCTION_NORMAL,
ARC_FUNCTION_ILINK1,
ARC_FUNCTION_ILINK2
} |
Variables |
| int | target_flags |
| const char * | arc_cpu_string |
| const char * | arc_text_string |
| const char * | arc_data_string |
| const char * | arc_rodata_string |
| int | arc_cpu_type |
| const unsigned int | arc_hard_regno_mode_ok [] |
| unsigned int | arc_mode_class [] |
| enum reg_class | arc_regno_reg_class [FIRST_PSEUDO_REGISTER] |
| const char * | arc_text_section |
| const char * | arc_data_section |
| const char * | arc_rodata_section |
| const char * | arc_mangle_cpu |
| char | arc_punct_chars [256] |
| struct rtx_def * | arc_compare_op0 |
| struct rtx_def * | arc_compare_op1 |