osprey/kg++fe/gnu/config/i386/i386.h File Reference

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Data Types

type  processor_costs
type  ix86_args

Defines

#define TARGET_CPU_DEFAULT   0
#define MASK_80387   0x00000001
#define MASK_RTD   0x00000002
#define MASK_ALIGN_DOUBLE   0x00000004
#define MASK_TLS_DIRECT_SEG_REFS   0x00000008
#define MASK_IEEE_FP   0x00000010
#define MASK_FLOAT_RETURNS   0x00000020
#define MASK_NO_FANCY_MATH_387   0x00000040
#define MASK_OMIT_LEAF_FRAME_POINTER   0x080
#define MASK_STACK_PROBE   0x00000100
#define MASK_NO_ALIGN_STROPS   0x00000200
#define MASK_INLINE_ALL_STROPS   0x00000400
#define MASK_NO_PUSH_ARGS   0x00000800
#define MASK_ACCUMULATE_OUTGOING_ARGS   0x00001000
#define MASK_MMX   0x00002000
#define MASK_SSE   0x00004000
#define MASK_SSE2   0x00008000
#define MASK_PNI   0x00010000
#define MASK_3DNOW   0x00020000
#define MASK_3DNOW_A   0x00040000
#define MASK_128BIT_LONG_DOUBLE   0x00080000
#define MASK_64BIT   0x00100000
#define MASK_NO_RED_ZONE   0x04000000
#define TARGET_80387   (target_flags & MASK_80387)
#define TARGET_RTD   (target_flags & MASK_RTD)
#define TARGET_ALIGN_DOUBLE   (target_flags & MASK_ALIGN_DOUBLE)
#define TARGET_PUSH_ARGS   (!(target_flags & MASK_NO_PUSH_ARGS))
#define TARGET_ACCUMULATE_OUTGOING_ARGS   (target_flags & MASK_ACCUMULATE_OUTGOING_ARGS)
#define TARGET_IEEE_FP   (target_flags & MASK_IEEE_FP)
#define TARGET_FLOAT_RETURNS_IN_80387   (target_flags & MASK_FLOAT_RETURNS)
#define TARGET_128BIT_LONG_DOUBLE   (target_flags & MASK_128BIT_LONG_DOUBLE)
#define TARGET_NO_FANCY_MATH_387   (target_flags & MASK_NO_FANCY_MATH_387)
#define TARGET_OMIT_LEAF_FRAME_POINTER   (target_flags & MASK_OMIT_LEAF_FRAME_POINTER)
#define TARGET_DEBUG_ADDR   (ix86_debug_addr_string != 0)
#define TARGET_DEBUG_ARG   (ix86_debug_arg_string != 0)
#define TARGET_64BIT   0
#define TARGET_TLS_DIRECT_SEG_REFS   (target_flags & MASK_TLS_DIRECT_SEG_REFS)
#define TARGET_386   (ix86_cpu == PROCESSOR_I386)
#define TARGET_486   (ix86_cpu == PROCESSOR_I486)
#define TARGET_PENTIUM   (ix86_cpu == PROCESSOR_PENTIUM)
#define TARGET_PENTIUMPRO   (ix86_cpu == PROCESSOR_PENTIUMPRO)
#define TARGET_K6   (ix86_cpu == PROCESSOR_K6)
#define TARGET_ATHLON   (ix86_cpu == PROCESSOR_ATHLON)
#define TARGET_PENTIUM4   (ix86_cpu == PROCESSOR_PENTIUM4)
#define CPUMASK   (1 << ix86_cpu)
#define TARGET_USE_LEAVE   (x86_use_leave & CPUMASK)
#define TARGET_PUSH_MEMORY   (x86_push_memory & CPUMASK)
#define TARGET_ZERO_EXTEND_WITH_AND   (x86_zero_extend_with_and & CPUMASK)
#define TARGET_USE_BIT_TEST   (x86_use_bit_test & CPUMASK)
#define TARGET_UNROLL_STRLEN   (x86_unroll_strlen & CPUMASK)
#define TARGET_CMOVE   ((x86_cmove & (1 << ix86_arch)) || TARGET_SSE)
#define TARGET_DEEP_BRANCH_PREDICTION   (x86_deep_branch & CPUMASK)
#define TARGET_BRANCH_PREDICTION_HINTS   (x86_branch_hints & CPUMASK)
#define TARGET_DOUBLE_WITH_ADD   (x86_double_with_add & CPUMASK)
#define TARGET_USE_SAHF   ((x86_use_sahf & CPUMASK) && !TARGET_64BIT)
#define TARGET_MOVX   (x86_movx & CPUMASK)
#define TARGET_PARTIAL_REG_STALL   (x86_partial_reg_stall & CPUMASK)
#define TARGET_USE_LOOP   (x86_use_loop & CPUMASK)
#define TARGET_USE_FIOP   (x86_use_fiop & CPUMASK)
#define TARGET_USE_MOV0   (x86_use_mov0 & CPUMASK)
#define TARGET_USE_CLTD   (x86_use_cltd & CPUMASK)
#define TARGET_SPLIT_LONG_MOVES   (x86_split_long_moves & CPUMASK)
#define TARGET_READ_MODIFY_WRITE   (x86_read_modify_write & CPUMASK)
#define TARGET_READ_MODIFY   (x86_read_modify & CPUMASK)
#define TARGET_PROMOTE_QImode   (x86_promote_QImode & CPUMASK)
#define TARGET_FAST_PREFIX   (x86_fast_prefix & CPUMASK)
#define TARGET_SINGLE_STRINGOP   (x86_single_stringop & CPUMASK)
#define TARGET_QIMODE_MATH   (x86_qimode_math & CPUMASK)
#define TARGET_HIMODE_MATH   (x86_himode_math & CPUMASK)
#define TARGET_PROMOTE_QI_REGS   (x86_promote_qi_regs & CPUMASK)
#define TARGET_PROMOTE_HI_REGS   (x86_promote_hi_regs & CPUMASK)
#define TARGET_ADD_ESP_4   (x86_add_esp_4 & CPUMASK)
#define TARGET_ADD_ESP_8   (x86_add_esp_8 & CPUMASK)
#define TARGET_SUB_ESP_4   (x86_sub_esp_4 & CPUMASK)
#define TARGET_SUB_ESP_8   (x86_sub_esp_8 & CPUMASK)
#define TARGET_INTEGER_DFMODE_MOVES   (x86_integer_DFmode_moves & CPUMASK)
#define TARGET_PARTIAL_REG_DEPENDENCY   (x86_partial_reg_dependency & CPUMASK)
#define TARGET_MEMORY_MISMATCH_STALL   (x86_memory_mismatch_stall & CPUMASK)
#define TARGET_PROLOGUE_USING_MOVE   (x86_prologue_using_move & CPUMASK)
#define TARGET_EPILOGUE_USING_MOVE   (x86_epilogue_using_move & CPUMASK)
#define TARGET_DECOMPOSE_LEA   (x86_decompose_lea & CPUMASK)
#define TARGET_PREFETCH_SSE   (x86_prefetch_sse)
#define TARGET_SHIFT1   (x86_shift1 & CPUMASK)
#define TARGET_STACK_PROBE   (target_flags & MASK_STACK_PROBE)
#define TARGET_ALIGN_STRINGOPS   (!(target_flags & MASK_NO_ALIGN_STROPS))
#define TARGET_INLINE_ALL_STRINGOPS   (target_flags & MASK_INLINE_ALL_STROPS)
#define ASSEMBLER_DIALECT   (ix86_asm_dialect)
#define TARGET_SSE   ((target_flags & MASK_SSE) != 0)
#define TARGET_SSE2   ((target_flags & MASK_SSE2) != 0)
#define TARGET_PNI   ((target_flags & MASK_PNI) != 0)
#define TARGET_SSE_MATH   ((ix86_fpmath & FPMATH_SSE) != 0)
#define TARGET_MIX_SSE_I387
#define TARGET_MMX   ((target_flags & MASK_MMX) != 0)
#define TARGET_3DNOW   ((target_flags & MASK_3DNOW) != 0)
#define TARGET_3DNOW_A   ((target_flags & MASK_3DNOW_A) != 0)
#define TARGET_RED_ZONE   (!(target_flags & MASK_NO_RED_ZONE))
#define TARGET_GNU_TLS   (ix86_tls_dialect == TLS_DIALECT_GNU)
#define TARGET_SUN_TLS   (ix86_tls_dialect == TLS_DIALECT_SUN)
#define TARGET_SWITCHES
#define TARGET_64BIT_DEFAULT   0
#define TARGET_TLS_DIRECT_SEG_REFS_DEFAULT   0
#define TARGET_DEFAULT   0
#define TARGET_MACHO   0
#define TARGET_OPTIONS
#define OVERRIDE_OPTIONS   override_options ()
#define SUBTARGET_SWITCHES
#define SUBTARGET_OPTIONS
#define OPTIMIZATION_OPTIONS(LEVEL, SIZE)   optimization_options ((LEVEL), (SIZE))
#define CC1_CPU_SPEC   "\%{!mcpu*: \%{m386:-mcpu=i386 \%n`-m386' is deprecated. Use `-march=i386' or `-mcpu=i386' instead.\n} \%{m486:-mcpu=i486 \%n`-m486' is deprecated. Use `-march=i486' or `-mcpu=i486' instead.\n} \%{mpentium:-mcpu=pentium \%n`-mpentium' is deprecated. Use `-march=pentium' or `-mcpu=pentium' instead.\n} \%{mpentiumpro:-mcpu=pentiumpro \%n`-mpentiumpro' is deprecated. Use `-march=pentiumpro' or `-mcpu=pentiumpro' instead.\n}} \%{mintel-syntax:-masm=intel \%n`-mintel-syntax' is deprecated. Use `-masm=intel' instead.\n} \%{mno-intel-syntax:-masm=att \%n`-mno-intel-syntax' is deprecated. Use `-masm=att' instead.\n}"
#define TARGET_CPU_CPP_BUILTINS()
#define TARGET_CPU_DEFAULT_i386   0
#define TARGET_CPU_DEFAULT_i486   1
#define TARGET_CPU_DEFAULT_pentium   2
#define TARGET_CPU_DEFAULT_pentium_mmx   3
#define TARGET_CPU_DEFAULT_pentiumpro   4
#define TARGET_CPU_DEFAULT_pentium2   5
#define TARGET_CPU_DEFAULT_pentium3   6
#define TARGET_CPU_DEFAULT_pentium4   7
#define TARGET_CPU_DEFAULT_k6   8
#define TARGET_CPU_DEFAULT_k6_2   9
#define TARGET_CPU_DEFAULT_k6_3   10
#define TARGET_CPU_DEFAULT_athlon   11
#define TARGET_CPU_DEFAULT_athlon_sse   12
#define TARGET_CPU_DEFAULT_NAMES
#define CC1_SPEC   "%(cc1_cpu) "
#define EXTRA_SPECS
#define LONG_DOUBLE_TYPE_SIZE   (TARGET_128BIT_LONG_DOUBLE ? 128 : 96)
#define MAX_LONG_DOUBLE_TYPE_SIZE   128
#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE   96
#define TARGET_FLT_EVAL_METHOD   (TARGET_MIX_SSE_I387 ? -1 : TARGET_SSE_MATH ? 1 : 2)
#define SHORT_TYPE_SIZE   16
#define INT_TYPE_SIZE   32
#define FLOAT_TYPE_SIZE   32
#define LONG_TYPE_SIZE   BITS_PER_WORD
#define MAX_WCHAR_TYPE_SIZE   32
#define DOUBLE_TYPE_SIZE   64
#define LONG_LONG_TYPE_SIZE   64
#define MAX_BITS_PER_WORD   32
#define MAX_LONG_TYPE_SIZE   32
#define BITS_BIG_ENDIAN   0
#define BYTES_BIG_ENDIAN   0
#define WORDS_BIG_ENDIAN   0
#define UNITS_PER_WORD   (TARGET_64BIT ? 8 : 4)
#define MIN_UNITS_PER_WORD   4
#define PARM_BOUNDARY   BITS_PER_WORD
#define STACK_BOUNDARY   BITS_PER_WORD
#define PREFERRED_STACK_BOUNDARY   ix86_preferred_stack_boundary
#define FORCE_PREFERRED_STACK_BOUNDARY_IN_MAIN   (ix86_preferred_stack_boundary > STACK_BOUNDARY && !TARGET_64BIT)
#define FUNCTION_BOUNDARY   8
#define TARGET_PTRMEMFUNC_VBIT_LOCATION   ptrmemfunc_vbit_in_pfn
#define EMPTY_FIELD_BOUNDARY   BITS_PER_WORD
#define BIGGEST_ALIGNMENT   128
#define ALIGN_MODE_128(MODE)   ((MODE) == XFmode || (MODE) == TFmode || SSE_REG_MODE_P (MODE))
#define ADJUST_FIELD_ALIGN(FIELD, COMPUTED)   x86_field_alignment (FIELD, COMPUTED)
#define CONSTANT_ALIGNMENT(EXP, ALIGN)   ix86_constant_alignment ((EXP), (ALIGN))
#define DATA_ALIGNMENT(TYPE, ALIGN)   ix86_data_alignment ((TYPE), (ALIGN))
#define LOCAL_ALIGNMENT(TYPE, ALIGN)   ix86_local_alignment ((TYPE), (ALIGN))
#define FUNCTION_ARG_BOUNDARY(MODE, TYPE)   ix86_function_arg_boundary ((MODE), (TYPE))
#define STRICT_ALIGNMENT   0
#define PCC_BITFIELD_TYPE_MATTERS   1
#define STACK_REGS
#define IS_STACK_MODE(MODE)
#define FIRST_PSEUDO_REGISTER   53
#define DWARF_FRAME_REGISTERS   17
#define FIXED_REGISTERS
#define CALL_USED_REGISTERS
#define REG_ALLOC_ORDER
#define ORDER_REGS_FOR_LOCAL_ALLOC   x86_order_regs_for_local_alloc ()
#define CONDITIONAL_REGISTER_USAGE
#define HARD_REGNO_NREGS(REGNO, MODE)
#define VALID_SSE2_REG_MODE(MODE)
#define VALID_SSE_REG_MODE(MODE)
#define VALID_MMX_REG_MODE_3DNOW(MODE)   ((MODE) == V2SFmode || (MODE) == SFmode)
#define VALID_MMX_REG_MODE(MODE)
#define VECTOR_MODE_SUPPORTED_P(MODE)
#define VALID_FP_MODE_P(MODE)
#define VALID_INT_MODE_P(MODE)
#define SSE_REG_MODE_P(MODE)
#define MMX_REG_MODE_P(MODE)
#define HARD_REGNO_MODE_OK(REGNO, MODE)   ix86_hard_regno_mode_ok ((REGNO), (MODE))
#define MODES_TIEABLE_P(MODE1, MODE2)
#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE)
#define STACK_POINTER_REGNUM   7
#define HARD_FRAME_POINTER_REGNUM   6
#define FRAME_POINTER_REGNUM   20
#define FIRST_FLOAT_REG   8
#define FIRST_STACK_REG   FIRST_FLOAT_REG
#define LAST_STACK_REG   (FIRST_FLOAT_REG + 7)
#define FLAGS_REG   17
#define FPSR_REG   18
#define DIRFLAG_REG   19
#define FIRST_SSE_REG   (FRAME_POINTER_REGNUM + 1)
#define LAST_SSE_REG   (FIRST_SSE_REG + 7)
#define FIRST_MMX_REG   (LAST_SSE_REG + 1)
#define LAST_MMX_REG   (FIRST_MMX_REG + 7)
#define FIRST_REX_INT_REG   (LAST_MMX_REG + 1)
#define LAST_REX_INT_REG   (FIRST_REX_INT_REG + 7)
#define FIRST_REX_SSE_REG   (LAST_REX_INT_REG + 1)
#define LAST_REX_SSE_REG   (FIRST_REX_SSE_REG + 7)
#define FRAME_POINTER_REQUIRED   ix86_frame_pointer_required ()
#define SUBTARGET_FRAME_POINTER_REQUIRED   0
#define SETUP_FRAME_ADDRESSES()   ix86_setup_frame_addresses ()
#define ARG_POINTER_REGNUM   16
#define STATIC_CHAIN_REGNUM   (TARGET_64BIT ? FIRST_REX_INT_REG + 10 - 8 : 2)
#define REAL_PIC_OFFSET_TABLE_REGNUM   3
#define PIC_OFFSET_TABLE_REGNUM
#define GOT_SYMBOL_NAME   "_GLOBAL_OFFSET_TABLE_"
#define STRUCT_VALUE_INCOMING   0
#define STRUCT_VALUE   0
#define RETURN_IN_MEMORY(TYPE)   ix86_return_in_memory (TYPE)
#define N_REG_CLASSES   ((int) LIM_REG_CLASSES)
#define INTEGER_CLASS_P(CLASS)   reg_class_subset_p ((CLASS), GENERAL_REGS)
#define FLOAT_CLASS_P(CLASS)   reg_class_subset_p ((CLASS), FLOAT_REGS)
#define SSE_CLASS_P(CLASS)   reg_class_subset_p ((CLASS), SSE_REGS)
#define MMX_CLASS_P(CLASS)   reg_class_subset_p ((CLASS), MMX_REGS)
#define MAYBE_INTEGER_CLASS_P(CLASS)   reg_classes_intersect_p ((CLASS), GENERAL_REGS)
#define MAYBE_FLOAT_CLASS_P(CLASS)   reg_classes_intersect_p ((CLASS), FLOAT_REGS)
#define MAYBE_SSE_CLASS_P(CLASS)   reg_classes_intersect_p (SSE_REGS, (CLASS))
#define MAYBE_MMX_CLASS_P(CLASS)   reg_classes_intersect_p (MMX_REGS, (CLASS))
#define Q_CLASS_P(CLASS)   reg_class_subset_p ((CLASS), Q_REGS)
#define REG_CLASS_NAMES
#define REG_CLASS_CONTENTS
#define REGNO_REG_CLASS(REGNO)   (regclass_map[REGNO])
#define SMALL_REGISTER_CLASSES   1
#define QI_REG_P(X)   (REG_P (X) && REGNO (X) < 4)
#define GENERAL_REGNO_P(N)   ((N) < 8 || REX_INT_REGNO_P (N))
#define GENERAL_REG_P(X)   (REG_P (X) && GENERAL_REGNO_P (REGNO (X)))
#define ANY_QI_REG_P(X)   (TARGET_64BIT ? GENERAL_REG_P(X) : QI_REG_P (X))
#define NON_QI_REG_P(X)   (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
#define REX_INT_REGNO_P(N)   ((N) >= FIRST_REX_INT_REG && (N) <= LAST_REX_INT_REG)
#define REX_INT_REG_P(X)   (REG_P (X) && REX_INT_REGNO_P (REGNO (X)))
#define FP_REG_P(X)   (REG_P (X) && FP_REGNO_P (REGNO (X)))
#define FP_REGNO_P(N)   ((N) >= FIRST_STACK_REG && (N) <= LAST_STACK_REG)
#define ANY_FP_REG_P(X)   (REG_P (X) && ANY_FP_REGNO_P (REGNO (X)))
#define ANY_FP_REGNO_P(N)   (FP_REGNO_P (N) || SSE_REGNO_P (N))
#define SSE_REGNO_P(N)
#define SSE_REGNO(N)   ((N) < 8 ? FIRST_SSE_REG + (N) : FIRST_REX_SSE_REG + (N) - 8)
#define SSE_REG_P(N)   (REG_P (N) && SSE_REGNO_P (REGNO (N)))
#define SSE_FLOAT_MODE_P(MODE)   ((TARGET_SSE && (MODE) == SFmode) || (TARGET_SSE2 && (MODE) == DFmode))
#define MMX_REGNO_P(N)   ((N) >= FIRST_MMX_REG && (N) <= LAST_MMX_REG)
#define MMX_REG_P(XOP)   (REG_P (XOP) && MMX_REGNO_P (REGNO (XOP)))
#define STACK_REG_P(XOP)
#define NON_STACK_REG_P(XOP)   (REG_P (XOP) && ! STACK_REG_P (XOP))
#define STACK_TOP_P(XOP)   (REG_P (XOP) && REGNO (XOP) == FIRST_STACK_REG)
#define CC_REG_P(X)   (REG_P (X) && CC_REGNO_P (REGNO (X)))
#define CC_REGNO_P(X)   ((X) == FLAGS_REG || (X) == FPSR_REG)
#define CONVERT_HARD_REGISTER_TO_SSA_P(REG_NO)   ((REG_NO) == FLAGS_REG || (REG_NO) == ARG_POINTER_REGNUM)
#define INDEX_REG_CLASS   INDEX_REGS
#define BASE_REG_CLASS   GENERAL_REGS
#define REG_CLASS_FROM_LETTER(C)
#define CONST_OK_FOR_LETTER_P(VALUE, C)
#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C)
#define EXTRA_CONSTRAINT(VALUE, D)
#define LIMIT_RELOAD_CLASS(MODE, CLASS)
#define PREFERRED_RELOAD_CLASS(X, CLASS)   ix86_preferred_reload_class ((X), (CLASS))
#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE)   ix86_secondary_memory_needed ((CLASS1), (CLASS2), (MODE), 1)
#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT)
#define CLASS_MAX_NREGS(CLASS, MODE)
#define CLASS_LIKELY_SPILLED_P(CLASS)
#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS)
#define MD_ASM_CLOBBERS(CLOBBERS)
#define STACK_GROWS_DOWNWARD
#define FRAME_GROWS_DOWNWARD
#define STARTING_FRAME_OFFSET   0
#define PUSH_ROUNDING(BYTES)
#define ACCUMULATE_OUTGOING_ARGS   TARGET_ACCUMULATE_OUTGOING_ARGS
#define PUSH_ARGS   (TARGET_PUSH_ARGS && !ACCUMULATE_OUTGOING_ARGS)
#define PUSH_ARGS_REVERSED   1
#define FIRST_PARM_OFFSET(FNDECL)   0
#define REG_PARM_STACK_SPACE(FNDECL)   0
#define MUST_PASS_IN_STACK(MODE, TYPE)
#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE)   ix86_return_pops_args ((FUNDECL), (FUNTYPE), (SIZE))
#define FUNCTION_VALUE(VALTYPE, FUNC)   ix86_function_value (VALTYPE)
#define FUNCTION_VALUE_REGNO_P(N)   ix86_function_value_regno_p (N)
#define LIBCALL_VALUE(MODE)   ix86_libcall_value (MODE)
#define APPLY_RESULT_SIZE   (8+108)
#define FUNCTION_ARG_REGNO_P(N)   ix86_function_arg_regno_p (N)
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT)   init_cumulative_args (&(CUM), (FNTYPE), (LIBNAME))
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)   function_arg_advance (&(CUM), (MODE), (TYPE), (NAMED))
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED)   function_arg (&(CUM), (MODE), (TYPE), (NAMED))
#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED)   0
#define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED)   function_arg_pass_by_reference(&CUM, MODE, TYPE, NAMED)
#define FUNCTION_OK_FOR_SIBCALL(DECL)
#define SETUP_INCOMING_VARARGS(CUM, MODE, TYPE, PRETEND_SIZE, NO_RTL)
#define BUILD_VA_LIST_TYPE(VALIST)   ((VALIST) = ix86_build_va_list ())
#define EXPAND_BUILTIN_VA_START(VALIST, NEXTARG)   ix86_va_start (VALIST, NEXTARG)
#define EXPAND_BUILTIN_VA_ARG(VALIST, TYPE)   ix86_va_arg ((VALIST), (TYPE))
#define ASM_FILE_END(FILE)   ix86_asm_file_end (FILE)
#define FUNCTION_PROFILER(FILE, LABELNO)   x86_function_profiler (FILE, LABELNO)
#define MCOUNT_NAME   "_mcount"
#define PROFILE_COUNT_REGISTER   "edx"
#define EXIT_IGNORE_STACK   1
#define TRAMPOLINE_SIZE   (TARGET_64BIT ? 23 : 10)
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT)   x86_initialize_trampoline ((TRAMP), (FNADDR), (CXT))
#define ELIMINABLE_REGS
#define CAN_ELIMINATE(FROM, TO)   ((TO) == STACK_POINTER_REGNUM ? ! frame_pointer_needed : 1)
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)   ((OFFSET) = ix86_initial_elimination_offset ((FROM), (TO)))
#define REGNO_OK_FOR_INDEX_P(REGNO)
#define REGNO_OK_FOR_BASE_P(REGNO)
#define REGNO_OK_FOR_SIREG_P(REGNO)   ((REGNO) == 4 || reg_renumber[(REGNO)] == 4)
#define REGNO_OK_FOR_DIREG_P(REGNO)   ((REGNO) == 5 || reg_renumber[(REGNO)] == 5)
#define REG_OK_FOR_INDEX_NONSTRICT_P(X)
#define REG_OK_FOR_BASE_NONSTRICT_P(X)
#define REG_OK_FOR_INDEX_STRICT_P(X)   REGNO_OK_FOR_INDEX_P (REGNO (X))
#define REG_OK_FOR_BASE_STRICT_P(X)   REGNO_OK_FOR_BASE_P (REGNO (X))
#define REG_OK_FOR_INDEX_P(X)   REG_OK_FOR_INDEX_NONSTRICT_P (X)
#define REG_OK_FOR_BASE_P(X)   REG_OK_FOR_BASE_NONSTRICT_P (X)
#define MAX_REGS_PER_ADDRESS   2
#define CONSTANT_ADDRESS_P(X)   constant_address_p (X)
#define LEGITIMATE_CONSTANT_P(X)   legitimate_constant_p (X)
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR)
#define FIND_BASE_TERM(X)   ix86_find_base_term (X)
#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
#define REWRITE_ADDRESS(X)   rewrite_address (X)
#define LEGITIMATE_PIC_OPERAND_P(X)   legitimate_pic_operand_p (X)
#define SYMBOLIC_CONST(X)
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
#define TARGET_ENCODE_SECTION_INFO   ix86_encode_section_info
#define TARGET_STRIP_NAME_ENCODING   ix86_strip_name_encoding
#define ASM_OUTPUT_LABELREF(FILE, NAME)
#define REGPARM_MAX   (TARGET_64BIT ? 6 : 3)
#define SSE_REGPARM_MAX   (TARGET_64BIT ? 8 : 0)
#define CASE_VECTOR_MODE   (!TARGET_64BIT || flag_pic ? SImode : DImode)
#define DEFAULT_SIGNED_CHAR   1
#define PREFETCH_BLOCK   ix86_cost->prefetch_block
#define SIMULTANEOUS_PREFETCHES   ix86_cost->simultaneous_prefetches
#define MOVE_MAX   16
#define MOVE_MAX_PIECES   (TARGET_64BIT ? 8 : 4)
#define MOVE_RATIO   (optimize_size ? 3 : ix86_cost->move_ratio)
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC)   1
#define STORE_FLAG_VALUE   1
#define PROMOTE_PROTOTYPES   1
#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)
#define Pmode   (TARGET_64BIT ? DImode : SImode)
#define FUNCTION_MODE   QImode
#define CONST_COSTS(RTX, CODE, OUTER_CODE)
#define TOPLEVEL_COSTS_N_INSNS(N)   do { total = COSTS_N_INSNS (N); goto egress_rtx_costs; } while (0)
#define RTX_COSTS(X, CODE, OUTER_CODE)
#define ADDRESS_COST(RTX)   ix86_address_cost (RTX)
#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2)   ix86_register_move_cost ((MODE), (CLASS1), (CLASS2))
#define MEMORY_MOVE_COST(MODE, CLASS, IN)   ix86_memory_move_cost ((MODE), (CLASS), (IN))
#define BRANCH_COST   ix86_branch_cost
#define SLOW_BYTE_ACCESS   0
#define SLOW_SHORT_ACCESS   0
#define NO_FUNCTION_CSE
#define NO_RECURSIVE_FUNCTION_CSE
#define SELECT_CC_MODE(OP, X, Y)   ix86_cc_mode ((OP), (X), (Y))
#define REVERSIBLE_CC_MODE(MODE)   1
#define REVERSE_CONDITION(CODE, MODE)
#define HI_REGISTER_NAMES
#define REGISTER_NAMES   HI_REGISTER_NAMES
#define ADDITIONAL_REGISTER_NAMES
#define QI_REGISTER_NAMES   {"al", "dl", "cl", "bl", "sil", "dil", "bpl", "spl",}
#define QI_HIGH_REGISTER_NAMES   {"ah", "dh", "ch", "bh", }
#define DBX_REGISTER_NUMBER(N)   (TARGET_64BIT ? dbx64_register_map[(N)] : dbx_register_map[(N)])
#define INCOMING_RETURN_ADDR_RTX   gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM))
#define RETURN_ADDR_RTX(COUNT, FRAME)
#define DWARF_FRAME_RETURN_COLUMN   (TARGET_64BIT ? 16 : 8)
#define INCOMING_FRAME_SP_OFFSET   UNITS_PER_WORD
#define EH_RETURN_DATA_REGNO(N)   ((N) < 2 ? (N) : INVALID_REGNUM)
#define EH_RETURN_STACKADJ_RTX   gen_rtx_REG (Pmode, 2)
#define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL)
#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO)
#define ASM_OUTPUT_REG_PUSH(FILE, REGNO)
#define ASM_OUTPUT_REG_POP(FILE, REGNO)
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)   ix86_output_addr_vec_elt ((FILE), (VALUE))
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)   ix86_output_addr_diff_elt ((FILE), (VALUE), (REL))
#define JUMP_TABLES_IN_TEXT_SECTION   (!TARGET_64BIT && flag_pic && !HAVE_AS_GOTOFF_IN_DATA)
#define ASM_OUTPUT_DWARF_ADDR_CONST(FILE, X)   i386_dwarf_output_addr_const ((FILE), (X))
#define ASM_SIMPLIFY_DWARF_ADDR(X)   i386_simplify_dwarf_addr (X)
#define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC)
#define PRINT_OPERAND_PUNCT_VALID_P(CODE)   ((CODE) == '*' || (CODE) == '+' || (CODE) == '&')
#define PRINT_REG(X, CODE, FILE)   print_reg ((X), (CODE), (FILE))
#define PRINT_OPERAND(FILE, X, CODE)   print_operand ((FILE), (X), (CODE))
#define PRINT_OPERAND_ADDRESS(FILE, ADDR)   print_operand_address ((FILE), (ADDR))
#define OUTPUT_ADDR_CONST_EXTRA(FILE, X, FAIL)
#define DEBUG_PRINT_REG(X, CODE, FILE)
#define ASM_OPERAND_LETTER   '#'
#define RET   return ""
#define AT_SP(MODE)   (gen_rtx_MEM ((MODE), stack_pointer_rtx))
#define PREDICATE_CODES
#define SPECIAL_MODE_PREDICATES   "ext_register_operand",
#define RED_ZONE_SIZE   128
#define RED_ZONE_RESERVE   8
#define OPTIMIZE_MODE_SWITCHING(ENTITY)   1
#define NUM_MODES_FOR_MODE_SWITCHING   { FP_CW_ANY }
#define MODE_NEEDED(ENTITY, I)
#define MODE_PRIORITY_TO_MODE(ENTITY, N)   (N)
#define EMIT_MODE_SET(ENTITY, MODE, HARD_REGS_LIVE)
#define HARD_REGNO_RENAME_OK(SRC, TARGET)   ((SRC) < FIRST_STACK_REG || (SRC) > LAST_STACK_REG)
#define MACHINE_DEPENDENT_REORG(X)   x86_machine_dependent_reorg(X)
#define DLL_IMPORT_EXPORT_PREFIX   '@'

Typedefs

typedef struct ix86_args CUMULATIVE_ARGS

Enumerations

enum  reg_class {
  NO_REGS, R2, R0_1, INDEX_REGS,
  BASE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  LR0_REGS, GENERAL_REGS, BP_REGS, FC_REGS,
  CR_REGS, Q_REGS, SPECIAL_REGS, ACCUM0_REGS,
  ACCUM_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R24_REG, R25_REG, R27_REG,
  GENERAL_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, LPCOUNT_REG, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, FPU_REGS, LO_REGS,
  STACK_REG, BASE_REGS, HI_REGS, CC_REG,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REG, POINTER_X_REGS, POINTER_Y_REGS, POINTER_Z_REGS,
  STACK_REG, BASE_POINTER_REGS, POINTER_REGS, ADDW_REGS,
  SIMPLE_LD_REGS, LD_REGS, NO_LD_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0R1_REGS,
  R2R3_REGS, EXT_LOW_REGS, EXT_REGS, ADDR_REGS,
  INDEX_REGS, BK_REG, SP_REG, RC_REG,
  COUNTER_REGS, INT_REGS, GENERAL_REGS, DP_REG,
  ST_REG, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, S_REGS, INDEX_REGS, SP_REGS,
  A_REGS, SI_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  REPEAT_REGS, CR_REGS, ACCUM_REGS, OTHER_FLAG_REGS,
  F0_REGS, F1_REGS, BR_FLAG_REGS, FLAG_REGS,
  EVEN_REGS, GPR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, A0H_REG, A0L_REG, A0_REG,
  A1H_REG, ACCUM_HIGH_REGS, A1L_REG, ACCUM_LOW_REGS,
  A1_REG, ACCUM_REGS, X_REG, X_OR_ACCUM_LOW_REGS,
  X_OR_ACCUM_REGS, YH_REG, YH_OR_ACCUM_HIGH_REGS, X_OR_YH_REGS,
  YL_REG, YL_OR_ACCUM_LOW_REGS, X_OR_YL_REGS, X_OR_Y_REGS,
  Y_REG, ACCUM_OR_Y_REGS, PH_REG, X_OR_PH_REGS,
  PL_REG, PL_OR_ACCUM_LOW_REGS, X_OR_PL_REGS, YL_OR_PL_OR_ACCUM_LOW_REGS,
  P_REG, ACCUM_OR_P_REGS, YL_OR_P_REGS, ACCUM_LOW_OR_YL_OR_P_REGS,
  Y_OR_P_REGS, ACCUM_Y_OR_P_REGS, NO_FRAME_Y_ADDR_REGS, Y_ADDR_REGS,
  ACCUM_LOW_OR_Y_ADDR_REGS, ACCUM_OR_Y_ADDR_REGS, X_OR_Y_ADDR_REGS, Y_OR_Y_ADDR_REGS,
  P_OR_Y_ADDR_REGS, NON_HIGH_YBASE_ELIGIBLE_REGS, YBASE_ELIGIBLE_REGS, J_REG,
  J_OR_DAU_16_BIT_REGS, BMU_REGS, NOHIGH_NON_ADDR_REGS, NON_ADDR_REGS,
  SLOW_MEM_LOAD_REGS, NOHIGH_NON_YBASE_REGS, NO_ACCUM_NON_YBASE_REGS, NON_YBASE_REGS,
  YBASE_VIRT_REGS, ACCUM_LOW_OR_YBASE_REGS, ACCUM_OR_YBASE_REGS, X_OR_YBASE_REGS,
  Y_OR_YBASE_REGS, ACCUM_LOW_YL_PL_OR_YBASE_REGS, P_OR_YBASE_REGS, ACCUM_Y_P_OR_YBASE_REGS,
  Y_ADDR_OR_YBASE_REGS, YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS, YBASE_OR_YBASE_ELIGIBLE_REGS, NO_HIGH_ALL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG,
  MULTIPLY_64_REG, LOW_REGS, HIGH_REGS, REAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,
  MAC_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ADDR_REGS, DATA_REGS, FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, AREG, DREG,
  CREG, BREG, SIREG, DIREG,
  AD_REGS, Q_REGS, NON_Q_REGS, INDEX_REGS,
  LEGACY_REGS, GENERAL_REGS, FP_TOP_REG, FP_SECOND_REG,
  FLOAT_REGS, SSE_REGS, MMX_REGS, FP_TOP_SSE_REGS,
  FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS, INT_SSE_REGS,
  FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GLOBAL_REGS, LOCAL_REGS, LOCAL_OR_GLOBAL_REGS,
  FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  PR_REGS, BR_REGS, AR_M_REGS, AR_I_REGS,
  ADDL_REGS, GR_REGS, FR_REGS, GR_AND_BR_REGS,
  GR_AND_FR_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  CARRY_REG, ACCUM_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, D_REGS, X_REGS,
  Y_REGS, SP_REGS, DA_REGS, DB_REGS,
  Z_REGS, D8_REGS, Q_REGS, D_OR_X_REGS,
  D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS, A_REGS,
  X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS, A_OR_D_REGS,
  A_OR_SP_REGS, H_REGS, S_REGS, D_OR_S_REGS,
  X_OR_S_REGS, Y_OR_S_REGS, SP_OR_S_REGS, D_OR_X_OR_S_REGS,
  D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS, A_OR_S_REGS, D_OR_A_OR_S_REGS,
  TMP_REGS, D_OR_A_OR_TMP_REGS, G_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, DATA_REGS, ADDR_REGS,
  FP_REGS, GENERAL_REGS, DATA_OR_FP_REGS, ADDR_OR_FP_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, AP_REG,
  XRF_REGS, GENERAL_REGS, AGRF_REGS, XGRF_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, ONLYR1_REGS,
  LRW_REGS, GENERAL_REGS, C_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, REMAINDER_REG,
  HIMULT_REG, SYSTEM_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, DATA_REGS, ADDRESS_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,
  ADDRESS_REGS, SP_REGS, DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,
  EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS,
  SP_OR_ADDRESS_OR_EXTENDED_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, FLOAT_REG0, LONG_FLOAT_REG0,
  FLOAT_REGS, FP_REGS, GEN_AND_FP_REGS, FRAME_POINTER_REG,
  STACK_POINTER_REG, GEN_AND_MEM_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R1_REGS, GENERAL_REGS, FPUPPER_REGS,
  FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,
  FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, MUL_REGS,
  GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS, FPU_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, OUT_REGS,
  STD_REGS, ARG_REGS, SRC_REGS, DST_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0_REGS,
  R15_REGS, BASE_REGS, GENERAL_REGS, FP_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, BASE_REGS,
  GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS, VRSAVE_REGS,
  NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,
  LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,
  CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, ADDR_REGS, GENERAL_REGS,
  FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REGS, PR_REGS,
  T_REGS, MAC_REGS, FPUL_REGS, SIBCALL_REGS,
  GENERAL_REGS, FP0_REGS, FP_REGS, DF_REGS,
  FPSCR_REGS, GENERAL_FP_REGS, TARGET_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, M16_NA_REGS, M16_REGS,
  T_REG, M16_T_REGS, GR_REGS, FP_REGS,
  HI_REG, LO_REG, HILO_REG, MD_REGS,
  COP0_REGS, COP2_REGS, COP3_REGS, HI_AND_GR_REGS,
  LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS,
  COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS,
  ST_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  FPCC_REGS, I64_REGS, GENERAL_REGS, FP_REGS,
  EXTRA_FP_REGS, GENERAL_OR_FP_REGS, GENERAL_OR_EXTRA_FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REGS, R1_REGS,
  TWO_REGS, R2_REGS, EIGHT_REGS, R8_REGS,
  ICALL_REGS, GENERAL_REGS, CARRY_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, BR_REGS, FP_REGS, ACC_REG,
  SP_REG, RL_REGS, GR_REGS, AR_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,
  M16_REGS, T_REG, M16_T_REGS, GR_REGS,
  FP_REGS, HI_REG, LO_REG, HILO_REG,
  MD_REGS, COP0_REGS, COP2_REGS, COP3_REGS,
  HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS,
  COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS,
  ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, M16_NA_REGS, M16_REGS, T_REG,
  M16_T_REGS, GR_REGS, FP_REGS, HI_REG,
  LO_REG, HILO_REG, MD_REGS, COP0_REGS,
  COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,
  HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS,
  COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R2,
  R0_1, INDEX_REGS, BASE_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, LR0_REGS, GENERAL_REGS,
  BP_REGS, FC_REGS, CR_REGS, Q_REGS,
  SPECIAL_REGS, ACCUM0_REGS, ACCUM_REGS, FLOAT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R24_REG,
  R25_REG, R27_REG, GENERAL_REGS, FLOAT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  FPU_REGS, LO_REGS, STACK_REG, BASE_REGS,
  HI_REGS, CC_REG, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REG, POINTER_X_REGS,
  POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG, BASE_POINTER_REGS,
  POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS, LD_REGS,
  NO_LD_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R0R1_REGS, R2R3_REGS, EXT_LOW_REGS,
  EXT_REGS, ADDR_REGS, INDEX_REGS, BK_REG,
  SP_REG, RC_REG, COUNTER_REGS, INT_REGS,
  GENERAL_REGS, DP_REG, ST_REG, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, FLOAT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, S_REGS,
  INDEX_REGS, SP_REGS, A_REGS, SI_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, REPEAT_REGS, CR_REGS,
  ACCUM_REGS, OTHER_FLAG_REGS, F0_REGS, F1_REGS,
  BR_FLAG_REGS, FLAG_REGS, EVEN_REGS, GPR_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, A0H_REG,
  A0L_REG, A0_REG, A1H_REG, ACCUM_HIGH_REGS,
  A1L_REG, ACCUM_LOW_REGS, A1_REG, ACCUM_REGS,
  X_REG, X_OR_ACCUM_LOW_REGS, X_OR_ACCUM_REGS, YH_REG,
  YH_OR_ACCUM_HIGH_REGS, X_OR_YH_REGS, YL_REG, YL_OR_ACCUM_LOW_REGS,
  X_OR_YL_REGS, X_OR_Y_REGS, Y_REG, ACCUM_OR_Y_REGS,
  PH_REG, X_OR_PH_REGS, PL_REG, PL_OR_ACCUM_LOW_REGS,
  X_OR_PL_REGS, YL_OR_PL_OR_ACCUM_LOW_REGS, P_REG, ACCUM_OR_P_REGS,
  YL_OR_P_REGS, ACCUM_LOW_OR_YL_OR_P_REGS, Y_OR_P_REGS, ACCUM_Y_OR_P_REGS,
  NO_FRAME_Y_ADDR_REGS, Y_ADDR_REGS, ACCUM_LOW_OR_Y_ADDR_REGS, ACCUM_OR_Y_ADDR_REGS,
  X_OR_Y_ADDR_REGS, Y_OR_Y_ADDR_REGS, P_OR_Y_ADDR_REGS, NON_HIGH_YBASE_ELIGIBLE_REGS,
  YBASE_ELIGIBLE_REGS, J_REG, J_OR_DAU_16_BIT_REGS, BMU_REGS,
  NOHIGH_NON_ADDR_REGS, NON_ADDR_REGS, SLOW_MEM_LOAD_REGS, NOHIGH_NON_YBASE_REGS,
  NO_ACCUM_NON_YBASE_REGS, NON_YBASE_REGS, YBASE_VIRT_REGS, ACCUM_LOW_OR_YBASE_REGS,
  ACCUM_OR_YBASE_REGS, X_OR_YBASE_REGS, Y_OR_YBASE_REGS, ACCUM_LOW_YL_PL_OR_YBASE_REGS,
  P_OR_YBASE_REGS, ACCUM_Y_P_OR_YBASE_REGS, Y_ADDR_OR_YBASE_REGS, YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS,
  YBASE_OR_YBASE_ELIGIBLE_REGS, NO_HIGH_ALL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, MULTIPLY_32_REG, MULTIPLY_64_REG, LOW_REGS,
  HIGH_REGS, REAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, MAC_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, ADDR_REGS, DATA_REGS,
  FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  AREG, DREG, CREG, BREG,
  SIREG, DIREG, AD_REGS, Q_REGS,
  NON_Q_REGS, INDEX_REGS, LEGACY_REGS, GENERAL_REGS,
  FP_TOP_REG, FP_SECOND_REG, FLOAT_REGS, SSE_REGS,
  MMX_REGS, FP_TOP_SSE_REGS, FP_SECOND_SSE_REGS, FLOAT_SSE_REGS,
  FLOAT_INT_REGS, INT_SSE_REGS, FLOAT_INT_SSE_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, FP_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GLOBAL_REGS,
  LOCAL_REGS, LOCAL_OR_GLOBAL_REGS, FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, PR_REGS, BR_REGS,
  AR_M_REGS, AR_I_REGS, ADDL_REGS, GR_REGS,
  FR_REGS, GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, CARRY_REG, ACCUM_REGS,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  D_REGS, X_REGS, Y_REGS, SP_REGS,
  DA_REGS, DB_REGS, Z_REGS, D8_REGS,
  Q_REGS, D_OR_X_REGS, D_OR_Y_REGS, D_OR_SP_REGS,
  X_OR_Y_REGS, A_REGS, X_OR_SP_REGS, Y_OR_SP_REGS,
  X_OR_Y_OR_D_REGS, A_OR_D_REGS, A_OR_SP_REGS, H_REGS,
  S_REGS, D_OR_S_REGS, X_OR_S_REGS, Y_OR_S_REGS,
  SP_OR_S_REGS, D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS,
  A_OR_S_REGS, D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS,
  G_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  DATA_REGS, ADDR_REGS, FP_REGS, GENERAL_REGS,
  DATA_OR_FP_REGS, ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS,
  AGRF_REGS, XGRF_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, ONLYR1_REGS, LRW_REGS, GENERAL_REGS,
  C_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, REMAINDER_REG, HIMULT_REG, SYSTEM_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,
  ADDRESS_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS,
  DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS, EXTENDED_REGS, DATA_OR_EXTENDED_REGS,
  ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,
  FLOAT_REG0, LONG_FLOAT_REG0, FLOAT_REGS, FP_REGS,
  GEN_AND_FP_REGS, FRAME_POINTER_REG, STACK_POINTER_REG, GEN_AND_MEM_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,
  GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,
  SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R1_REGS, GENERAL_REGS, FPUPPER_REGS, FP_REGS,
  GENERAL_OR_FP_REGS, SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS,
  NO_LOAD_FPU_REGS, FPU_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, OUT_REGS, STD_REGS, ARG_REGS,
  SRC_REGS, DST_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R0_REGS, R15_REGS, BASE_REGS,
  GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, BASE_REGS, GENERAL_REGS, FLOAT_REGS,
  ALTIVEC_REGS, VRSAVE_REGS, NON_SPECIAL_REGS, MQ_REGS,
  LINK_REGS, CTR_REGS, LINK_OR_CTR_REGS, SPECIAL_REGS,
  SPEC_OR_GEN_REGS, CR0_REGS, CR_REGS, NON_FLOAT_REGS,
  XER_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ADDR_REGS, GENERAL_REGS, FP_REGS, ADDR_FP_REGS,
  GENERAL_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REGS, PR_REGS, T_REGS, MAC_REGS,
  FPUL_REGS, SIBCALL_REGS, GENERAL_REGS, FP0_REGS,
  FP_REGS, DF_REGS, FPSCR_REGS, GENERAL_FP_REGS,
  TARGET_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  M16_NA_REGS, M16_REGS, T_REG, M16_T_REGS,
  GR_REGS, FP_REGS, HI_REG, LO_REG,
  HILO_REG, MD_REGS, COP0_REGS, COP2_REGS,
  COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS,
  HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,
  ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, FPCC_REGS, I64_REGS,
  GENERAL_REGS, FP_REGS, EXTRA_FP_REGS, GENERAL_OR_FP_REGS,
  GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REGS, R1_REGS, TWO_REGS, R2_REGS,
  EIGHT_REGS, R8_REGS, ICALL_REGS, GENERAL_REGS,
  CARRY_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, BR_REGS,
  FP_REGS, ACC_REG, SP_REG, RL_REGS,
  GR_REGS, AR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, M16_NA_REGS, M16_REGS, T_REG,
  M16_T_REGS, GR_REGS, FP_REGS, HI_REG,
  LO_REG, HILO_REG, MD_REGS, COP0_REGS,
  COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,
  HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS,
  COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,
  M16_REGS, T_REG, M16_T_REGS, GR_REGS,
  FP_REGS, HI_REG, LO_REG, HILO_REG,
  MD_REGS, COP0_REGS, COP2_REGS, COP3_REGS,
  HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS,
  COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS,
  ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R0_REG, R24_REG, R25_REG,
  R27_REG, GENERAL_REGS, FLOAT_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, FPA_REGS,
  CIRRUS_REGS, VFP_REGS, IWMMXT_GR_REGS, IWMMXT_REGS,
  LO_REGS, STACK_REG, BASE_REGS, HI_REGS,
  CC_REG, VFPCC_REG, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REG, POINTER_X_REGS,
  POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG, BASE_POINTER_REGS,
  POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS, LD_REGS,
  NO_LD_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, IREGS, BREGS, LREGS,
  MREGS, CIRCREGS, DAGREGS, EVEN_AREGS,
  ODD_AREGS, AREGS, CCREGS, EVEN_DREGS,
  ODD_DREGS, DREGS, PREGS_CLOBBERED, PREGS,
  DPREGS, MOST_REGS, PROLOGUE_REGS, NON_A_CC_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0R1_REGS,
  R2R3_REGS, EXT_LOW_REGS, EXT_REGS, ADDR_REGS,
  INDEX_REGS, BK_REG, SP_REG, RC_REG,
  COUNTER_REGS, INT_REGS, GENERAL_REGS, DP_REG,
  ST_REG, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG,
  MULTIPLY_64_REG, LOW_REGS, HIGH_REGS, REAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, ICC_REGS,
  FCC_REGS, CC_REGS, ICR_REGS, FCR_REGS,
  CR_REGS, LCR_REG, LR_REG, GR8_REGS,
  GR9_REGS, GR89_REGS, FDPIC_REGS, FDPIC_FPTR_REGS,
  FDPIC_CALL_REGS, SPR_REGS, QUAD_ACC_REGS, EVEN_ACC_REGS,
  ACC_REGS, ACCG_REGS, QUAD_FPR_REGS, FEVEN_REGS,
  FPR_REGS, QUAD_REGS, EVEN_REGS, GPR_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, COUNTER_REGS,
  SOURCE_REGS, DESTINATION_REGS, GENERAL_REGS, MAC_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, AREG,
  DREG, CREG, BREG, SIREG,
  DIREG, AD_REGS, Q_REGS, NON_Q_REGS,
  INDEX_REGS, LEGACY_REGS, GENERAL_REGS, FP_TOP_REG,
  FP_SECOND_REG, FLOAT_REGS, SSE_REGS, MMX_REGS,
  FP_TOP_SSE_REGS, FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS,
  INT_SSE_REGS, FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, PR_REGS, BR_REGS,
  AR_M_REGS, AR_I_REGS, ADDL_REGS, GR_REGS,
  FR_REGS, GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, DPH_REGS, DPL_REGS,
  DP_REGS, SP_REGS, IPH_REGS, IPL_REGS,
  IP_REGS, DP_SP_REGS, PTR_REGS, NONPTR_REGS,
  NONSP_REGS, GENERAL_REGS, ALL_REGS = GENERAL_REGS, LIM_REG_CLASSES,
  NO_REGS, GR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, CARRY_REG, ACCUM_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, D_REGS,
  X_REGS, Y_REGS, SP_REGS, DA_REGS,
  DB_REGS, Z_REGS, D8_REGS, Q_REGS,
  D_OR_X_REGS, D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS,
  A_REGS, X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS,
  A_OR_D_REGS, A_OR_SP_REGS, H_REGS, S_REGS,
  D_OR_S_REGS, X_OR_S_REGS, Y_OR_S_REGS, Z_OR_S_REGS,
  SP_OR_S_REGS, D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS,
  A_OR_S_REGS, D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS,
  G_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  DATA_REGS, ADDR_REGS, FP_REGS, GENERAL_REGS,
  DATA_OR_FP_REGS, ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, ONLYR1_REGS, LRW_REGS, GENERAL_REGS,
  C_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  M16_NA_REGS, M16_REGS, T_REG, M16_T_REGS,
  PIC_FN_ADDR_REG, LEA_REGS, GR_REGS, FP_REGS,
  HI_REG, LO_REG, MD_REGS, COP0_REGS,
  COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,
  HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,
  ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, REMAINDER_REG,
  HIMULT_REG, SYSTEM_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS,
  DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS, EXTENDED_REGS, DATA_OR_EXTENDED_REGS,
  ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS, FP_REGS,
  FP_ACC_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, FLOAT_REG0, LONG_FLOAT_REG0,
  FLOAT_REGS, LONG_REGS, FP_REGS, GEN_AND_FP_REGS,
  FRAME_POINTER_REG, STACK_POINTER_REG, GEN_AND_MEM_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,
  FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,
  GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,
  SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS,
  FPU_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  BASE_REGS, GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS,
  VRSAVE_REGS, VSCR_REGS, SPE_ACC_REGS, SPEFSCR_REGS,
  NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,
  LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,
  CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, CC_REGS, ADDR_REGS,
  GENERAL_REGS, ACCESS_REGS, ADDR_CC_REGS, GENERAL_CC_REGS,
  FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REGS, PR_REGS,
  T_REGS, MAC_REGS, FPUL_REGS, SIBCALL_REGS,
  GENERAL_REGS, FP0_REGS, FP_REGS, DF_HI_REGS,
  DF_REGS, FPSCR_REGS, GENERAL_FP_REGS, TARGET_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, FPCC_REGS,
  I64_REGS, GENERAL_REGS, FP_REGS, EXTRA_FP_REGS,
  GENERAL_OR_FP_REGS, GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R0_REGS, R1_REGS, TWO_REGS,
  R2_REGS, EIGHT_REGS, R8_REGS, ICALL_REGS,
  GENERAL_REGS, CARRY_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  BR_REGS, FP_REGS, ACC_REG, SP_REG,
  RL_REGS, GR_REGS, AR_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REG, R24_REG,
  R25_REG, R27_REG, GENERAL_REGS, FLOAT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  FPA_REGS, CIRRUS_REGS, VFP_REGS, IWMMXT_GR_REGS,
  IWMMXT_REGS, LO_REGS, STACK_REG, BASE_REGS,
  HI_REGS, CC_REG, VFPCC_REG, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0_REG,
  POINTER_X_REGS, POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG,
  BASE_POINTER_REGS, POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS,
  LD_REGS, NO_LD_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, IREGS, BREGS,
  LREGS, MREGS, CIRCREGS, DAGREGS,
  EVEN_AREGS, ODD_AREGS, AREGS, CCREGS,
  EVEN_DREGS, ODD_DREGS, DREGS, FDPIC_REGS,
  FDPIC_FPTR_REGS, PREGS_CLOBBERED, PREGS, IPREGS,
  DPREGS, MOST_REGS, LT_REGS, LC_REGS,
  LB_REGS, PROLOGUE_REGS, NON_A_CC_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0R1_REGS, R2R3_REGS,
  EXT_LOW_REGS, EXT_REGS, ADDR_REGS, INDEX_REGS,
  BK_REG, SP_REG, RC_REG, COUNTER_REGS,
  INT_REGS, GENERAL_REGS, DP_REG, ST_REG,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, MOF_REGS,
  CC0_REGS, SPECIAL_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, LO_REGS, HI_REGS,
  HILO_REGS, NOSP_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG, MULTIPLY_64_REG,
  LOW_REGS, HIGH_REGS, REAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, ICC_REGS, FCC_REGS,
  CC_REGS, ICR_REGS, FCR_REGS, CR_REGS,
  LCR_REG, LR_REG, GR8_REGS, GR9_REGS,
  GR89_REGS, FDPIC_REGS, FDPIC_FPTR_REGS, FDPIC_CALL_REGS,
  SPR_REGS, QUAD_ACC_REGS, EVEN_ACC_REGS, ACC_REGS,
  ACCG_REGS, QUAD_FPR_REGS, FEVEN_REGS, FPR_REGS,
  QUAD_REGS, EVEN_REGS, GPR_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, COUNTER_REGS, SOURCE_REGS,
  DESTINATION_REGS, GENERAL_REGS, MAC_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, AREG, DREG,
  CREG, BREG, SIREG, DIREG,
  AD_REGS, Q_REGS, NON_Q_REGS, INDEX_REGS,
  LEGACY_REGS, GENERAL_REGS, FP_TOP_REG, FP_SECOND_REG,
  FLOAT_REGS, SSE_REGS, MMX_REGS, FP_TOP_SSE_REGS,
  FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS, INT_SSE_REGS,
  FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  PR_REGS, BR_REGS, AR_M_REGS, AR_I_REGS,
  ADDL_REGS, GR_REGS, FP_REGS, FR_REGS,
  GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, SP_REGS, FB_REGS, SB_REGS,
  CR_REGS, R0_REGS, R1_REGS, R2_REGS,
  R3_REGS, R02_REGS, HL_REGS, QI_REGS,
  R23_REGS, R03_REGS, DI_REGS, A0_REGS,
  A1_REGS, A_REGS, AD_REGS, PS_REGS,
  SI_REGS, HI_REGS, RA_REGS, GENERAL_REGS,
  FLG_REGS, HC_REGS, MEM_REGS, R02_A_MEM_REGS,
  A_HL_MEM_REGS, R1_R3_A_MEM_REGS, R03_MEM_REGS, A_HI_MEM_REGS,
  A_AD_CR_MEM_SI_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  CARRY_REG, ACCUM_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, D_REGS, X_REGS,
  Y_REGS, SP_REGS, DA_REGS, DB_REGS,
  Z_REGS, D8_REGS, Q_REGS, D_OR_X_REGS,
  D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS, A_REGS,
  X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS, A_OR_D_REGS,
  A_OR_SP_REGS, H_REGS, S_REGS, D_OR_S_REGS,
  X_OR_S_REGS, Y_OR_S_REGS, Z_OR_S_REGS, SP_OR_S_REGS,
  D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS, A_OR_S_REGS,
  D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS, G_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,
  ADDR_REGS, FP_REGS, GENERAL_REGS, DATA_OR_FP_REGS,
  ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ONLYR1_REGS, LRW_REGS, GENERAL_REGS, C_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,
  M16_REGS, T_REG, M16_T_REGS, PIC_FN_ADDR_REG,
  V1_REG, LEA_REGS, GR_REGS, FP_REGS,
  HI_REG, LO_REG, MD_REGS, COP0_REGS,
  COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,
  HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,
  ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, DSP_ACC_REGS,
  ACC_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, REMAINDER_REG, HIMULT_REG, SYSTEM_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,
  ADDRESS_REGS, SP_REGS, DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,
  EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS,
  SP_OR_ADDRESS_OR_EXTENDED_REGS, FP_REGS, FP_ACC_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,
  FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,
  GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,
  SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS,
  FPU_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  BASE_REGS, GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS,
  VRSAVE_REGS, VSCR_REGS, SPE_ACC_REGS, SPEFSCR_REGS,
  NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,
  LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,
  CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, CC_REGS, ADDR_REGS,
  GENERAL_REGS, ACCESS_REGS, ADDR_CC_REGS, GENERAL_CC_REGS,
  FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, G16_REGS, G32_REGS,
  T32_REGS, HI_REG, LO_REG, CE_REGS,
  CN_REG, LC_REG, SC_REG, SP_REGS,
  CR_REGS, CP1_REGS, CP2_REGS, CP3_REGS,
  CPA_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REGS, PR_REGS, T_REGS, MAC_REGS,
  FPUL_REGS, SIBCALL_REGS, GENERAL_REGS, FP0_REGS,
  FP_REGS, DF_HI_REGS, DF_REGS, FPSCR_REGS,
  GENERAL_FP_REGS, GENERAL_DF_REGS, TARGET_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, FPCC_REGS, I64_REGS,
  GENERAL_REGS, FP_REGS, EXTRA_FP_REGS, GENERAL_OR_FP_REGS,
  GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REGS, R1_REGS, TWO_REGS, R2_REGS,
  EIGHT_REGS, R8_REGS, ICALL_REGS, GENERAL_REGS,
  CARRY_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, BR_REGS,
  FP_REGS, ACC_REG, SP_REG, RL_REGS,
  GR_REGS, AR_REGS, ALL_REGS, LIM_REG_CLASSES
}
enum  ix86_builtins {
  IX86_BUILTIN_ADDPS, IX86_BUILTIN_ADDSS, IX86_BUILTIN_DIVPS, IX86_BUILTIN_DIVSS,
  IX86_BUILTIN_MULPS, IX86_BUILTIN_MULSS, IX86_BUILTIN_SUBPS, IX86_BUILTIN_SUBSS,
  IX86_BUILTIN_CMPEQPS, IX86_BUILTIN_CMPLTPS, IX86_BUILTIN_CMPLEPS, IX86_BUILTIN_CMPGTPS,
  IX86_BUILTIN_CMPGEPS, IX86_BUILTIN_CMPNEQPS, IX86_BUILTIN_CMPNLTPS, IX86_BUILTIN_CMPNLEPS,
  IX86_BUILTIN_CMPNGTPS, IX86_BUILTIN_CMPNGEPS, IX86_BUILTIN_CMPORDPS, IX86_BUILTIN_CMPUNORDPS,
  IX86_BUILTIN_CMPNEPS, IX86_BUILTIN_CMPEQSS, IX86_BUILTIN_CMPLTSS, IX86_BUILTIN_CMPLESS,
  IX86_BUILTIN_CMPNEQSS, IX86_BUILTIN_CMPNLTSS, IX86_BUILTIN_CMPNLESS, IX86_BUILTIN_CMPORDSS,
  IX86_BUILTIN_CMPUNORDSS, IX86_BUILTIN_CMPNESS, IX86_BUILTIN_COMIEQSS, IX86_BUILTIN_COMILTSS,
  IX86_BUILTIN_COMILESS, IX86_BUILTIN_COMIGTSS, IX86_BUILTIN_COMIGESS, IX86_BUILTIN_COMINEQSS,
  IX86_BUILTIN_UCOMIEQSS, IX86_BUILTIN_UCOMILTSS, IX86_BUILTIN_UCOMILESS, IX86_BUILTIN_UCOMIGTSS,
  IX86_BUILTIN_UCOMIGESS, IX86_BUILTIN_UCOMINEQSS, IX86_BUILTIN_CVTPI2PS, IX86_BUILTIN_CVTPS2PI,
  IX86_BUILTIN_CVTSI2SS, IX86_BUILTIN_CVTSI642SS, IX86_BUILTIN_CVTSS2SI, IX86_BUILTIN_CVTSS2SI64,
  IX86_BUILTIN_CVTTPS2PI, IX86_BUILTIN_CVTTSS2SI, IX86_BUILTIN_CVTTSS2SI64, IX86_BUILTIN_MAXPS,
  IX86_BUILTIN_MAXSS, IX86_BUILTIN_MINPS, IX86_BUILTIN_MINSS, IX86_BUILTIN_LOADAPS,
  IX86_BUILTIN_LOADUPS, IX86_BUILTIN_STOREAPS, IX86_BUILTIN_STOREUPS, IX86_BUILTIN_LOADSS,
  IX86_BUILTIN_STORESS, IX86_BUILTIN_MOVSS, IX86_BUILTIN_MOVHLPS, IX86_BUILTIN_MOVLHPS,
  IX86_BUILTIN_LOADHPS, IX86_BUILTIN_LOADLPS, IX86_BUILTIN_STOREHPS, IX86_BUILTIN_STORELPS,
  IX86_BUILTIN_MASKMOVQ, IX86_BUILTIN_MOVMSKPS, IX86_BUILTIN_PMOVMSKB, IX86_BUILTIN_MOVNTPS,
  IX86_BUILTIN_MOVNTQ, IX86_BUILTIN_LOADDQA, IX86_BUILTIN_LOADDQU, IX86_BUILTIN_STOREDQA,
  IX86_BUILTIN_STOREDQU, IX86_BUILTIN_MOVQ, IX86_BUILTIN_LOADD, IX86_BUILTIN_STORED,
  IX86_BUILTIN_CLRTI, IX86_BUILTIN_PACKSSWB, IX86_BUILTIN_PACKSSDW, IX86_BUILTIN_PACKUSWB,
  IX86_BUILTIN_PADDB, IX86_BUILTIN_PADDW, IX86_BUILTIN_PADDD, IX86_BUILTIN_PADDQ,
  IX86_BUILTIN_PADDSB, IX86_BUILTIN_PADDSW, IX86_BUILTIN_PADDUSB, IX86_BUILTIN_PADDUSW,
  IX86_BUILTIN_PSUBB, IX86_BUILTIN_PSUBW, IX86_BUILTIN_PSUBD, IX86_BUILTIN_PSUBQ,
  IX86_BUILTIN_PSUBSB, IX86_BUILTIN_PSUBSW, IX86_BUILTIN_PSUBUSB, IX86_BUILTIN_PSUBUSW,
  IX86_BUILTIN_PAND, IX86_BUILTIN_PANDN, IX86_BUILTIN_POR, IX86_BUILTIN_PXOR,
  IX86_BUILTIN_PAVGB, IX86_BUILTIN_PAVGW, IX86_BUILTIN_PCMPEQB, IX86_BUILTIN_PCMPEQW,
  IX86_BUILTIN_PCMPEQD, IX86_BUILTIN_PCMPGTB, IX86_BUILTIN_PCMPGTW, IX86_BUILTIN_PCMPGTD,
  IX86_BUILTIN_PEXTRW, IX86_BUILTIN_PINSRW, IX86_BUILTIN_PMADDWD, IX86_BUILTIN_PMAXSW,
  IX86_BUILTIN_PMAXUB, IX86_BUILTIN_PMINSW, IX86_BUILTIN_PMINUB, IX86_BUILTIN_PMULHUW,
  IX86_BUILTIN_PMULHW, IX86_BUILTIN_PMULLW, IX86_BUILTIN_PSADBW, IX86_BUILTIN_PSHUFW,
  IX86_BUILTIN_PSLLW, IX86_BUILTIN_PSLLD, IX86_BUILTIN_PSLLQ, IX86_BUILTIN_PSRAW,
  IX86_BUILTIN_PSRAD, IX86_BUILTIN_PSRLW, IX86_BUILTIN_PSRLD, IX86_BUILTIN_PSRLQ,
  IX86_BUILTIN_PSLLWI, IX86_BUILTIN_PSLLDI, IX86_BUILTIN_PSLLQI, IX86_BUILTIN_PSRAWI,
  IX86_BUILTIN_PSRADI, IX86_BUILTIN_PSRLWI, IX86_BUILTIN_PSRLDI, IX86_BUILTIN_PSRLQI,
  IX86_BUILTIN_PUNPCKHBW, IX86_BUILTIN_PUNPCKHWD, IX86_BUILTIN_PUNPCKHDQ, IX86_BUILTIN_PUNPCKLBW,
  IX86_BUILTIN_PUNPCKLWD, IX86_BUILTIN_PUNPCKLDQ, IX86_BUILTIN_SHUFPS, IX86_BUILTIN_RCPPS,
  IX86_BUILTIN_RCPSS, IX86_BUILTIN_RSQRTPS, IX86_BUILTIN_RSQRTSS, IX86_BUILTIN_SQRTPS,
  IX86_BUILTIN_SQRTSS, IX86_BUILTIN_UNPCKHPS, IX86_BUILTIN_UNPCKLPS, IX86_BUILTIN_ANDPS,
  IX86_BUILTIN_ANDNPS, IX86_BUILTIN_ORPS, IX86_BUILTIN_XORPS, IX86_BUILTIN_EMMS,
  IX86_BUILTIN_LDMXCSR, IX86_BUILTIN_STMXCSR, IX86_BUILTIN_SFENCE, IX86_BUILTIN_FEMMS,
  IX86_BUILTIN_PAVGUSB, IX86_BUILTIN_PF2ID, IX86_BUILTIN_PFACC, IX86_BUILTIN_PFADD,
  IX86_BUILTIN_PFCMPEQ, IX86_BUILTIN_PFCMPGE, IX86_BUILTIN_PFCMPGT, IX86_BUILTIN_PFMAX,
  IX86_BUILTIN_PFMIN, IX86_BUILTIN_PFMUL, IX86_BUILTIN_PFRCP, IX86_BUILTIN_PFRCPIT1,
  IX86_BUILTIN_PFRCPIT2, IX86_BUILTIN_PFRSQIT1, IX86_BUILTIN_PFRSQRT, IX86_BUILTIN_PFSUB,
  IX86_BUILTIN_PFSUBR, IX86_BUILTIN_PI2FD, IX86_BUILTIN_PMULHRW, IX86_BUILTIN_PF2IW,
  IX86_BUILTIN_PFNACC, IX86_BUILTIN_PFPNACC, IX86_BUILTIN_PI2FW, IX86_BUILTIN_PSWAPDSI,
  IX86_BUILTIN_PSWAPDSF, IX86_BUILTIN_SSE_ZERO, IX86_BUILTIN_MMX_ZERO, IX86_BUILTIN_ADDPD,
  IX86_BUILTIN_ADDSD, IX86_BUILTIN_DIVPD, IX86_BUILTIN_DIVSD, IX86_BUILTIN_MULPD,
  IX86_BUILTIN_MULSD, IX86_BUILTIN_SUBPD, IX86_BUILTIN_SUBSD, IX86_BUILTIN_CMPEQPD,
  IX86_BUILTIN_CMPLTPD, IX86_BUILTIN_CMPLEPD, IX86_BUILTIN_CMPGTPD, IX86_BUILTIN_CMPGEPD,
  IX86_BUILTIN_CMPNEQPD, IX86_BUILTIN_CMPNLTPD, IX86_BUILTIN_CMPNLEPD, IX86_BUILTIN_CMPNGTPD,
  IX86_BUILTIN_CMPNGEPD, IX86_BUILTIN_CMPORDPD, IX86_BUILTIN_CMPUNORDPD, IX86_BUILTIN_CMPNEPD,
  IX86_BUILTIN_CMPEQSD, IX86_BUILTIN_CMPLTSD, IX86_BUILTIN_CMPLESD, IX86_BUILTIN_CMPNEQSD,
  IX86_BUILTIN_CMPNLTSD, IX86_BUILTIN_CMPNLESD, IX86_BUILTIN_CMPORDSD, IX86_BUILTIN_CMPUNORDSD,
  IX86_BUILTIN_CMPNESD, IX86_BUILTIN_COMIEQSD, IX86_BUILTIN_COMILTSD, IX86_BUILTIN_COMILESD,
  IX86_BUILTIN_COMIGTSD, IX86_BUILTIN_COMIGESD, IX86_BUILTIN_COMINEQSD, IX86_BUILTIN_UCOMIEQSD,
  IX86_BUILTIN_UCOMILTSD, IX86_BUILTIN_UCOMILESD, IX86_BUILTIN_UCOMIGTSD, IX86_BUILTIN_UCOMIGESD,
  IX86_BUILTIN_UCOMINEQSD, IX86_BUILTIN_MAXPD, IX86_BUILTIN_MAXSD, IX86_BUILTIN_MINPD,
  IX86_BUILTIN_MINSD, IX86_BUILTIN_ANDPD, IX86_BUILTIN_ANDNPD, IX86_BUILTIN_ORPD,
  IX86_BUILTIN_XORPD, IX86_BUILTIN_SQRTPD, IX86_BUILTIN_SQRTSD, IX86_BUILTIN_UNPCKHPD,
  IX86_BUILTIN_UNPCKLPD, IX86_BUILTIN_SHUFPD, IX86_BUILTIN_LOADAPD, IX86_BUILTIN_LOADUPD,
  IX86_BUILTIN_STOREAPD, IX86_BUILTIN_STOREUPD, IX86_BUILTIN_LOADSD, IX86_BUILTIN_STORESD,
  IX86_BUILTIN_MOVSD, IX86_BUILTIN_LOADHPD, IX86_BUILTIN_LOADLPD, IX86_BUILTIN_STOREHPD,
  IX86_BUILTIN_STORELPD, IX86_BUILTIN_CVTDQ2PD, IX86_BUILTIN_CVTDQ2PS, IX86_BUILTIN_CVTPD2DQ,
  IX86_BUILTIN_CVTPD2PI, IX86_BUILTIN_CVTPD2PS, IX86_BUILTIN_CVTTPD2DQ, IX86_BUILTIN_CVTTPD2PI,
  IX86_BUILTIN_CVTPI2PD, IX86_BUILTIN_CVTSI2SD, IX86_BUILTIN_CVTSI642SD, IX86_BUILTIN_CVTSD2SI,
  IX86_BUILTIN_CVTSD2SI64, IX86_BUILTIN_CVTSD2SS, IX86_BUILTIN_CVTSS2SD, IX86_BUILTIN_CVTTSD2SI,
  IX86_BUILTIN_CVTTSD2SI64, IX86_BUILTIN_CVTPS2DQ, IX86_BUILTIN_CVTPS2PD, IX86_BUILTIN_CVTTPS2DQ,
  IX86_BUILTIN_MOVNTI, IX86_BUILTIN_MOVNTPD, IX86_BUILTIN_MOVNTDQ, IX86_BUILTIN_SETPD1,
  IX86_BUILTIN_SETPD, IX86_BUILTIN_CLRPD, IX86_BUILTIN_SETRPD, IX86_BUILTIN_LOADPD1,
  IX86_BUILTIN_LOADRPD, IX86_BUILTIN_STOREPD1, IX86_BUILTIN_STORERPD, IX86_BUILTIN_MASKMOVDQU,
  IX86_BUILTIN_MOVMSKPD, IX86_BUILTIN_PMOVMSKB128, IX86_BUILTIN_MOVQ2DQ, IX86_BUILTIN_MOVDQ2Q,
  IX86_BUILTIN_PACKSSWB128, IX86_BUILTIN_PACKSSDW128, IX86_BUILTIN_PACKUSWB128, IX86_BUILTIN_PADDB128,
  IX86_BUILTIN_PADDW128, IX86_BUILTIN_PADDD128, IX86_BUILTIN_PADDQ128, IX86_BUILTIN_PADDSB128,
  IX86_BUILTIN_PADDSW128, IX86_BUILTIN_PADDUSB128, IX86_BUILTIN_PADDUSW128, IX86_BUILTIN_PSUBB128,
  IX86_BUILTIN_PSUBW128, IX86_BUILTIN_PSUBD128, IX86_BUILTIN_PSUBQ128, IX86_BUILTIN_PSUBSB128,
  IX86_BUILTIN_PSUBSW128, IX86_BUILTIN_PSUBUSB128, IX86_BUILTIN_PSUBUSW128, IX86_BUILTIN_PAND128,
  IX86_BUILTIN_PANDN128, IX86_BUILTIN_POR128, IX86_BUILTIN_PXOR128, IX86_BUILTIN_PAVGB128,
  IX86_BUILTIN_PAVGW128, IX86_BUILTIN_PCMPEQB128, IX86_BUILTIN_PCMPEQW128, IX86_BUILTIN_PCMPEQD128,
  IX86_BUILTIN_PCMPGTB128, IX86_BUILTIN_PCMPGTW128, IX86_BUILTIN_PCMPGTD128, IX86_BUILTIN_PEXTRW128,
  IX86_BUILTIN_PINSRW128, IX86_BUILTIN_PMADDWD128, IX86_BUILTIN_PMAXSW128, IX86_BUILTIN_PMAXUB128,
  IX86_BUILTIN_PMINSW128, IX86_BUILTIN_PMINUB128, IX86_BUILTIN_PMULUDQ, IX86_BUILTIN_PMULUDQ128,
  IX86_BUILTIN_PMULHUW128, IX86_BUILTIN_PMULHW128, IX86_BUILTIN_PMULLW128, IX86_BUILTIN_PSADBW128,
  IX86_BUILTIN_PSHUFHW, IX86_BUILTIN_PSHUFLW, IX86_BUILTIN_PSHUFD, IX86_BUILTIN_PSLLW128,
  IX86_BUILTIN_PSLLD128, IX86_BUILTIN_PSLLQ128, IX86_BUILTIN_PSRAW128, IX86_BUILTIN_PSRAD128,
  IX86_BUILTIN_PSRLW128, IX86_BUILTIN_PSRLD128, IX86_BUILTIN_PSRLQ128, IX86_BUILTIN_PSLLDQI128,
  IX86_BUILTIN_PSLLWI128, IX86_BUILTIN_PSLLDI128, IX86_BUILTIN_PSLLQI128, IX86_BUILTIN_PSRAWI128,
  IX86_BUILTIN_PSRADI128, IX86_BUILTIN_PSRLDQI128, IX86_BUILTIN_PSRLWI128, IX86_BUILTIN_PSRLDI128,
  IX86_BUILTIN_PSRLQI128, IX86_BUILTIN_PUNPCKHBW128, IX86_BUILTIN_PUNPCKHWD128, IX86_BUILTIN_PUNPCKHDQ128,
  IX86_BUILTIN_PUNPCKHQDQ128, IX86_BUILTIN_PUNPCKLBW128, IX86_BUILTIN_PUNPCKLWD128, IX86_BUILTIN_PUNPCKLDQ128,
  IX86_BUILTIN_PUNPCKLQDQ128, IX86_BUILTIN_CLFLUSH, IX86_BUILTIN_MFENCE, IX86_BUILTIN_LFENCE,
  IX86_BUILTIN_ADDSUBPS, IX86_BUILTIN_HADDPS, IX86_BUILTIN_HSUBPS, IX86_BUILTIN_MOVSHDUP,
  IX86_BUILTIN_MOVSLDUP, IX86_BUILTIN_ADDSUBPD, IX86_BUILTIN_HADDPD, IX86_BUILTIN_HSUBPD,
  IX86_BUILTIN_LOADDDUP, IX86_BUILTIN_MOVDDUP, IX86_BUILTIN_LDDQU, IX86_BUILTIN_MONITOR,
  IX86_BUILTIN_MWAIT, IX86_BUILTIN_MAX, IX86_BUILTIN_ADDPS, IX86_BUILTIN_ADDSS,
  IX86_BUILTIN_DIVPS, IX86_BUILTIN_DIVSS, IX86_BUILTIN_MULPS, IX86_BUILTIN_MULSS,
  IX86_BUILTIN_SUBPS, IX86_BUILTIN_SUBSS, IX86_BUILTIN_CMPEQPS, IX86_BUILTIN_CMPLTPS,
  IX86_BUILTIN_CMPLEPS, IX86_BUILTIN_CMPGTPS, IX86_BUILTIN_CMPGEPS, IX86_BUILTIN_CMPNEQPS,
  IX86_BUILTIN_CMPNLTPS, IX86_BUILTIN_CMPNLEPS, IX86_BUILTIN_CMPNGTPS, IX86_BUILTIN_CMPNGEPS,
  IX86_BUILTIN_CMPORDPS, IX86_BUILTIN_CMPUNORDPS, IX86_BUILTIN_CMPNEPS, IX86_BUILTIN_CMPEQSS,
  IX86_BUILTIN_CMPLTSS, IX86_BUILTIN_CMPLESS, IX86_BUILTIN_CMPNEQSS, IX86_BUILTIN_CMPNLTSS,
  IX86_BUILTIN_CMPNLESS, IX86_BUILTIN_CMPORDSS, IX86_BUILTIN_CMPUNORDSS, IX86_BUILTIN_CMPNESS,
  IX86_BUILTIN_COMIEQSS, IX86_BUILTIN_COMILTSS, IX86_BUILTIN_COMILESS, IX86_BUILTIN_COMIGTSS,
  IX86_BUILTIN_COMIGESS, IX86_BUILTIN_COMINEQSS, IX86_BUILTIN_UCOMIEQSS, IX86_BUILTIN_UCOMILTSS,
  IX86_BUILTIN_UCOMILESS, IX86_BUILTIN_UCOMIGTSS, IX86_BUILTIN_UCOMIGESS, IX86_BUILTIN_UCOMINEQSS,
  IX86_BUILTIN_CVTPI2PS, IX86_BUILTIN_CVTPS2PI, IX86_BUILTIN_CVTSI2SS, IX86_BUILTIN_CVTSI642SS,
  IX86_BUILTIN_CVTSS2SI, IX86_BUILTIN_CVTSS2SI64, IX86_BUILTIN_CVTTPS2PI, IX86_BUILTIN_CVTTSS2SI,
  IX86_BUILTIN_CVTTSS2SI64, IX86_BUILTIN_MAXPS, IX86_BUILTIN_MAXSS, IX86_BUILTIN_MINPS,
  IX86_BUILTIN_MINSS, IX86_BUILTIN_LOADAPS, IX86_BUILTIN_LOADUPS, IX86_BUILTIN_STOREAPS,
  IX86_BUILTIN_STOREUPS, IX86_BUILTIN_LOADSS, IX86_BUILTIN_STORESS, IX86_BUILTIN_MOVSS,
  IX86_BUILTIN_MOVHLPS, IX86_BUILTIN_MOVLHPS, IX86_BUILTIN_LOADHPS, IX86_BUILTIN_LOADLPS,
  IX86_BUILTIN_STOREHPS, IX86_BUILTIN_STORELPS, IX86_BUILTIN_MASKMOVQ, IX86_BUILTIN_MOVMSKPS,
  IX86_BUILTIN_PMOVMSKB, IX86_BUILTIN_MOVNTPS, IX86_BUILTIN_MOVNTQ, IX86_BUILTIN_LOADDQA,
  IX86_BUILTIN_LOADDQU, IX86_BUILTIN_STOREDQA, IX86_BUILTIN_STOREDQU, IX86_BUILTIN_MOVQ,
  IX86_BUILTIN_LOADD, IX86_BUILTIN_STORED, IX86_BUILTIN_CLRTI, IX86_BUILTIN_PACKSSWB,
  IX86_BUILTIN_PACKSSDW, IX86_BUILTIN_PACKUSWB, IX86_BUILTIN_PADDB, IX86_BUILTIN_PADDW,
  IX86_BUILTIN_PADDD, IX86_BUILTIN_PADDQ, IX86_BUILTIN_PADDSB, IX86_BUILTIN_PADDSW,
  IX86_BUILTIN_PADDUSB, IX86_BUILTIN_PADDUSW, IX86_BUILTIN_PSUBB, IX86_BUILTIN_PSUBW,
  IX86_BUILTIN_PSUBD, IX86_BUILTIN_PSUBQ, IX86_BUILTIN_PSUBSB, IX86_BUILTIN_PSUBSW,
  IX86_BUILTIN_PSUBUSB, IX86_BUILTIN_PSUBUSW, IX86_BUILTIN_PAND, IX86_BUILTIN_PANDN,
  IX86_BUILTIN_POR, IX86_BUILTIN_PXOR, IX86_BUILTIN_PAVGB, IX86_BUILTIN_PAVGW,
  IX86_BUILTIN_PCMPEQB, IX86_BUILTIN_PCMPEQW, IX86_BUILTIN_PCMPEQD, IX86_BUILTIN_PCMPGTB,
  IX86_BUILTIN_PCMPGTW, IX86_BUILTIN_PCMPGTD, IX86_BUILTIN_PEXTRW, IX86_BUILTIN_PINSRW,
  IX86_BUILTIN_PMADDWD, IX86_BUILTIN_PMAXSW, IX86_BUILTIN_PMAXUB, IX86_BUILTIN_PMINSW,
  IX86_BUILTIN_PMINUB, IX86_BUILTIN_PMULHUW, IX86_BUILTIN_PMULHW, IX86_BUILTIN_PMULLW,
  IX86_BUILTIN_PSADBW, IX86_BUILTIN_PSHUFW, IX86_BUILTIN_PSLLW, IX86_BUILTIN_PSLLD,
  IX86_BUILTIN_PSLLQ, IX86_BUILTIN_PSRAW, IX86_BUILTIN_PSRAD, IX86_BUILTIN_PSRLW,
  IX86_BUILTIN_PSRLD, IX86_BUILTIN_PSRLQ, IX86_BUILTIN_PSLLWI, IX86_BUILTIN_PSLLDI,
  IX86_BUILTIN_PSLLQI, IX86_BUILTIN_PSRAWI, IX86_BUILTIN_PSRADI, IX86_BUILTIN_PSRLWI,
  IX86_BUILTIN_PSRLDI, IX86_BUILTIN_PSRLQI, IX86_BUILTIN_PUNPCKHBW, IX86_BUILTIN_PUNPCKHWD,
  IX86_BUILTIN_PUNPCKHDQ, IX86_BUILTIN_PUNPCKLBW, IX86_BUILTIN_PUNPCKLWD, IX86_BUILTIN_PUNPCKLDQ,
  IX86_BUILTIN_SHUFPS, IX86_BUILTIN_RCPPS, IX86_BUILTIN_RCPSS, IX86_BUILTIN_RSQRTPS,
  IX86_BUILTIN_RSQRTSS, IX86_BUILTIN_SQRTPS, IX86_BUILTIN_SQRTSS, IX86_BUILTIN_UNPCKHPS,
  IX86_BUILTIN_UNPCKLPS, IX86_BUILTIN_ANDPS, IX86_BUILTIN_ANDNPS, IX86_BUILTIN_ORPS,
  IX86_BUILTIN_XORPS, IX86_BUILTIN_EMMS, IX86_BUILTIN_LDMXCSR, IX86_BUILTIN_STMXCSR,
  IX86_BUILTIN_SFENCE, IX86_BUILTIN_FEMMS, IX86_BUILTIN_PAVGUSB, IX86_BUILTIN_PF2ID,
  IX86_BUILTIN_PFACC, IX86_BUILTIN_PFADD, IX86_BUILTIN_PFCMPEQ, IX86_BUILTIN_PFCMPGE,
  IX86_BUILTIN_PFCMPGT, IX86_BUILTIN_PFMAX, IX86_BUILTIN_PFMIN, IX86_BUILTIN_PFMUL,
  IX86_BUILTIN_PFRCP, IX86_BUILTIN_PFRCPIT1, IX86_BUILTIN_PFRCPIT2, IX86_BUILTIN_PFRSQIT1,
  IX86_BUILTIN_PFRSQRT, IX86_BUILTIN_PFSUB, IX86_BUILTIN_PFSUBR, IX86_BUILTIN_PI2FD,
  IX86_BUILTIN_PMULHRW, IX86_BUILTIN_PF2IW, IX86_BUILTIN_PFNACC, IX86_BUILTIN_PFPNACC,
  IX86_BUILTIN_PI2FW, IX86_BUILTIN_PSWAPDSI, IX86_BUILTIN_PSWAPDSF, IX86_BUILTIN_SSE_ZERO,
  IX86_BUILTIN_MMX_ZERO, IX86_BUILTIN_ADDPD, IX86_BUILTIN_ADDSD, IX86_BUILTIN_DIVPD,
  IX86_BUILTIN_DIVSD, IX86_BUILTIN_MULPD, IX86_BUILTIN_MULSD, IX86_BUILTIN_SUBPD,
  IX86_BUILTIN_SUBSD, IX86_BUILTIN_CMPEQPD, IX86_BUILTIN_CMPLTPD, IX86_BUILTIN_CMPLEPD,
  IX86_BUILTIN_CMPGTPD, IX86_BUILTIN_CMPGEPD, IX86_BUILTIN_CMPNEQPD, IX86_BUILTIN_CMPNLTPD,
  IX86_BUILTIN_CMPNLEPD, IX86_BUILTIN_CMPNGTPD, IX86_BUILTIN_CMPNGEPD, IX86_BUILTIN_CMPORDPD,
  IX86_BUILTIN_CMPUNORDPD, IX86_BUILTIN_CMPNEPD, IX86_BUILTIN_CMPEQSD, IX86_BUILTIN_CMPLTSD,
  IX86_BUILTIN_CMPLESD, IX86_BUILTIN_CMPNEQSD, IX86_BUILTIN_CMPNLTSD, IX86_BUILTIN_CMPNLESD,
  IX86_BUILTIN_CMPORDSD, IX86_BUILTIN_CMPUNORDSD, IX86_BUILTIN_CMPNESD, IX86_BUILTIN_COMIEQSD,
  IX86_BUILTIN_COMILTSD, IX86_BUILTIN_COMILESD, IX86_BUILTIN_COMIGTSD, IX86_BUILTIN_COMIGESD,
  IX86_BUILTIN_COMINEQSD, IX86_BUILTIN_UCOMIEQSD, IX86_BUILTIN_UCOMILTSD, IX86_BUILTIN_UCOMILESD,
  IX86_BUILTIN_UCOMIGTSD, IX86_BUILTIN_UCOMIGESD, IX86_BUILTIN_UCOMINEQSD, IX86_BUILTIN_MAXPD,
  IX86_BUILTIN_MAXSD, IX86_BUILTIN_MINPD, IX86_BUILTIN_MINSD, IX86_BUILTIN_ANDPD,
  IX86_BUILTIN_ANDNPD, IX86_BUILTIN_ORPD, IX86_BUILTIN_XORPD, IX86_BUILTIN_SQRTPD,
  IX86_BUILTIN_SQRTSD, IX86_BUILTIN_UNPCKHPD, IX86_BUILTIN_UNPCKLPD, IX86_BUILTIN_SHUFPD,
  IX86_BUILTIN_LOADAPD, IX86_BUILTIN_LOADUPD, IX86_BUILTIN_STOREAPD, IX86_BUILTIN_STOREUPD,
  IX86_BUILTIN_LOADSD, IX86_BUILTIN_STORESD, IX86_BUILTIN_MOVSD, IX86_BUILTIN_LOADHPD,
  IX86_BUILTIN_LOADLPD, IX86_BUILTIN_STOREHPD, IX86_BUILTIN_STORELPD, IX86_BUILTIN_CVTDQ2PD,
  IX86_BUILTIN_CVTDQ2PS, IX86_BUILTIN_CVTPD2DQ, IX86_BUILTIN_CVTPD2PI, IX86_BUILTIN_CVTPD2PS,
  IX86_BUILTIN_CVTTPD2DQ, IX86_BUILTIN_CVTTPD2PI, IX86_BUILTIN_CVTPI2PD, IX86_BUILTIN_CVTSI2SD,
  IX86_BUILTIN_CVTSI642SD, IX86_BUILTIN_CVTSD2SI, IX86_BUILTIN_CVTSD2SI64, IX86_BUILTIN_CVTSD2SS,
  IX86_BUILTIN_CVTSS2SD, IX86_BUILTIN_CVTTSD2SI, IX86_BUILTIN_CVTTSD2SI64, IX86_BUILTIN_CVTPS2DQ,
  IX86_BUILTIN_CVTPS2PD, IX86_BUILTIN_CVTTPS2DQ, IX86_BUILTIN_MOVNTI, IX86_BUILTIN_MOVNTPD,
  IX86_BUILTIN_MOVNTDQ, IX86_BUILTIN_SETPD1, IX86_BUILTIN_SETPD, IX86_BUILTIN_CLRPD,
  IX86_BUILTIN_SETRPD, IX86_BUILTIN_LOADPD1, IX86_BUILTIN_LOADRPD, IX86_BUILTIN_STOREPD1,
  IX86_BUILTIN_STORERPD, IX86_BUILTIN_MASKMOVDQU, IX86_BUILTIN_MOVMSKPD, IX86_BUILTIN_PMOVMSKB128,
  IX86_BUILTIN_MOVQ2DQ, IX86_BUILTIN_MOVDQ2Q, IX86_BUILTIN_PACKSSWB128, IX86_BUILTIN_PACKSSDW128,
  IX86_BUILTIN_PACKUSWB128, IX86_BUILTIN_PADDB128, IX86_BUILTIN_PADDW128, IX86_BUILTIN_PADDD128,
  IX86_BUILTIN_PADDQ128, IX86_BUILTIN_PADDSB128, IX86_BUILTIN_PADDSW128, IX86_BUILTIN_PADDUSB128,
  IX86_BUILTIN_PADDUSW128, IX86_BUILTIN_PSUBB128, IX86_BUILTIN_PSUBW128, IX86_BUILTIN_PSUBD128,
  IX86_BUILTIN_PSUBQ128, IX86_BUILTIN_PSUBSB128, IX86_BUILTIN_PSUBSW128, IX86_BUILTIN_PSUBUSB128,
  IX86_BUILTIN_PSUBUSW128, IX86_BUILTIN_PAND128, IX86_BUILTIN_PANDN128, IX86_BUILTIN_POR128,
  IX86_BUILTIN_PXOR128, IX86_BUILTIN_PAVGB128, IX86_BUILTIN_PAVGW128, IX86_BUILTIN_PCMPEQB128,
  IX86_BUILTIN_PCMPEQW128, IX86_BUILTIN_PCMPEQD128, IX86_BUILTIN_PCMPGTB128, IX86_BUILTIN_PCMPGTW128,
  IX86_BUILTIN_PCMPGTD128, IX86_BUILTIN_PEXTRW128, IX86_BUILTIN_PINSRW128, IX86_BUILTIN_PMADDWD128,
  IX86_BUILTIN_PMAXSW128, IX86_BUILTIN_PMAXUB128, IX86_BUILTIN_PMINSW128, IX86_BUILTIN_PMINUB128,
  IX86_BUILTIN_PMULUDQ, IX86_BUILTIN_PMULUDQ128, IX86_BUILTIN_PMULHUW128, IX86_BUILTIN_PMULHW128,
  IX86_BUILTIN_PMULLW128, IX86_BUILTIN_PSADBW128, IX86_BUILTIN_PSHUFHW, IX86_BUILTIN_PSHUFLW,
  IX86_BUILTIN_PSHUFD, IX86_BUILTIN_PSLLW128, IX86_BUILTIN_PSLLD128, IX86_BUILTIN_PSLLQ128,
  IX86_BUILTIN_PSRAW128, IX86_BUILTIN_PSRAD128, IX86_BUILTIN_PSRLW128, IX86_BUILTIN_PSRLD128,
  IX86_BUILTIN_PSRLQ128, IX86_BUILTIN_PSLLDQI128, IX86_BUILTIN_PSLLWI128, IX86_BUILTIN_PSLLDI128,
  IX86_BUILTIN_PSLLQI128, IX86_BUILTIN_PSRAWI128, IX86_BUILTIN_PSRADI128, IX86_BUILTIN_PSRLDQI128,
  IX86_BUILTIN_PSRLWI128, IX86_BUILTIN_PSRLDI128, IX86_BUILTIN_PSRLQI128, IX86_BUILTIN_PUNPCKHBW128,
  IX86_BUILTIN_PUNPCKHWD128, IX86_BUILTIN_PUNPCKHDQ128, IX86_BUILTIN_PUNPCKHQDQ128, IX86_BUILTIN_PUNPCKLBW128,
  IX86_BUILTIN_PUNPCKLWD128, IX86_BUILTIN_PUNPCKLDQ128, IX86_BUILTIN_PUNPCKLQDQ128, IX86_BUILTIN_CLFLUSH,
  IX86_BUILTIN_MFENCE, IX86_BUILTIN_LFENCE, IX86_BUILTIN_ADDSUBPS, IX86_BUILTIN_HADDPS,
  IX86_BUILTIN_HSUBPS, IX86_BUILTIN_MOVSHDUP, IX86_BUILTIN_MOVSLDUP, IX86_BUILTIN_ADDSUBPD,
  IX86_BUILTIN_HADDPD, IX86_BUILTIN_HSUBPD, IX86_BUILTIN_LOADDDUP, IX86_BUILTIN_MOVDDUP,
  IX86_BUILTIN_LDDQU, IX86_BUILTIN_MONITOR, IX86_BUILTIN_MWAIT, IX86_BUILTIN_MAX,
  IX86_BUILTIN_ADDPS, IX86_BUILTIN_ADDSS, IX86_BUILTIN_DIVPS, IX86_BUILTIN_DIVSS,
  IX86_BUILTIN_MULPS, IX86_BUILTIN_MULSS, IX86_BUILTIN_SUBPS, IX86_BUILTIN_SUBSS,
  IX86_BUILTIN_CMPEQPS, IX86_BUILTIN_CMPLTPS, IX86_BUILTIN_CMPLEPS, IX86_BUILTIN_CMPGTPS,
  IX86_BUILTIN_CMPGEPS, IX86_BUILTIN_CMPNEQPS, IX86_BUILTIN_CMPNLTPS, IX86_BUILTIN_CMPNLEPS,
  IX86_BUILTIN_CMPNGTPS, IX86_BUILTIN_CMPNGEPS, IX86_BUILTIN_CMPORDPS, IX86_BUILTIN_CMPUNORDPS,
  IX86_BUILTIN_CMPNEPS, IX86_BUILTIN_CMPEQSS, IX86_BUILTIN_CMPLTSS, IX86_BUILTIN_CMPLESS,
  IX86_BUILTIN_CMPNEQSS, IX86_BUILTIN_CMPNLTSS, IX86_BUILTIN_CMPNLESS, IX86_BUILTIN_CMPNGTSS,
  IX86_BUILTIN_CMPNGESS, IX86_BUILTIN_CMPORDSS, IX86_BUILTIN_CMPUNORDSS, IX86_BUILTIN_CMPNESS,
  IX86_BUILTIN_COMIEQSS, IX86_BUILTIN_COMILTSS, IX86_BUILTIN_COMILESS, IX86_BUILTIN_COMIGTSS,
  IX86_BUILTIN_COMIGESS, IX86_BUILTIN_COMINEQSS, IX86_BUILTIN_UCOMIEQSS, IX86_BUILTIN_UCOMILTSS,
  IX86_BUILTIN_UCOMILESS, IX86_BUILTIN_UCOMIGTSS, IX86_BUILTIN_UCOMIGESS, IX86_BUILTIN_UCOMINEQSS,
  IX86_BUILTIN_CVTPI2PS, IX86_BUILTIN_CVTPS2PI, IX86_BUILTIN_CVTSI2SS, IX86_BUILTIN_CVTSI642SS,
  IX86_BUILTIN_CVTSS2SI, IX86_BUILTIN_CVTSS2SI64, IX86_BUILTIN_CVTTPS2PI, IX86_BUILTIN_CVTTSS2SI,
  IX86_BUILTIN_CVTTSS2SI64, IX86_BUILTIN_MAXPS, IX86_BUILTIN_MAXSS, IX86_BUILTIN_MINPS,
  IX86_BUILTIN_MINSS, IX86_BUILTIN_LOADUPS, IX86_BUILTIN_STOREUPS, IX86_BUILTIN_MOVSS,
  IX86_BUILTIN_MOVHLPS, IX86_BUILTIN_MOVLHPS, IX86_BUILTIN_LOADHPS, IX86_BUILTIN_LOADLPS,
  IX86_BUILTIN_STOREHPS, IX86_BUILTIN_STORELPS, IX86_BUILTIN_MASKMOVQ, IX86_BUILTIN_MOVMSKPS,
  IX86_BUILTIN_PMOVMSKB, IX86_BUILTIN_MOVNTPS, IX86_BUILTIN_MOVNTQ, IX86_BUILTIN_LOADDQU,
  IX86_BUILTIN_STOREDQU, IX86_BUILTIN_PACKSSWB, IX86_BUILTIN_PACKSSDW, IX86_BUILTIN_PACKUSWB,
  IX86_BUILTIN_PADDB, IX86_BUILTIN_PADDW, IX86_BUILTIN_PADDD, IX86_BUILTIN_PADDQ,
  IX86_BUILTIN_PADDSB, IX86_BUILTIN_PADDSW, IX86_BUILTIN_PADDUSB, IX86_BUILTIN_PADDUSW,
  IX86_BUILTIN_PSUBB, IX86_BUILTIN_PSUBW, IX86_BUILTIN_PSUBD, IX86_BUILTIN_PSUBQ,
  IX86_BUILTIN_PSUBSB, IX86_BUILTIN_PSUBSW, IX86_BUILTIN_PSUBUSB, IX86_BUILTIN_PSUBUSW,
  IX86_BUILTIN_PAND, IX86_BUILTIN_PANDN, IX86_BUILTIN_POR, IX86_BUILTIN_PXOR,
  IX86_BUILTIN_PAVGB, IX86_BUILTIN_PAVGW, IX86_BUILTIN_PCMPEQB, IX86_BUILTIN_PCMPEQW,
  IX86_BUILTIN_PCMPEQD, IX86_BUILTIN_PCMPGTB, IX86_BUILTIN_PCMPGTW, IX86_BUILTIN_PCMPGTD,
  IX86_BUILTIN_PMADDWD, IX86_BUILTIN_PMAXSW, IX86_BUILTIN_PMAXUB, IX86_BUILTIN_PMINSW,
  IX86_BUILTIN_PMINUB, IX86_BUILTIN_PMULHUW, IX86_BUILTIN_PMULHW, IX86_BUILTIN_PMULLW,
  IX86_BUILTIN_PSADBW, IX86_BUILTIN_PSHUFW, IX86_BUILTIN_PSLLW, IX86_BUILTIN_PSLLD,
  IX86_BUILTIN_PSLLQ, IX86_BUILTIN_PSRAW, IX86_BUILTIN_PSRAD, IX86_BUILTIN_PSRLW,
  IX86_BUILTIN_PSRLD, IX86_BUILTIN_PSRLQ, IX86_BUILTIN_PSLLWI, IX86_BUILTIN_PSLLDI,
  IX86_BUILTIN_PSLLQI, IX86_BUILTIN_PSRAWI, IX86_BUILTIN_PSRADI, IX86_BUILTIN_PSRLWI,
  IX86_BUILTIN_PSRLDI, IX86_BUILTIN_PSRLQI, IX86_BUILTIN_PUNPCKHBW, IX86_BUILTIN_PUNPCKHWD,
  IX86_BUILTIN_PUNPCKHDQ, IX86_BUILTIN_PUNPCKLBW, IX86_BUILTIN_PUNPCKLWD, IX86_BUILTIN_PUNPCKLDQ,
  IX86_BUILTIN_SHUFPS, IX86_BUILTIN_RCPPS, IX86_BUILTIN_RCPSS, IX86_BUILTIN_RSQRTPS,
  IX86_BUILTIN_RSQRTSS, IX86_BUILTIN_SQRTPS, IX86_BUILTIN_SQRTSS, IX86_BUILTIN_UNPCKHPS,
  IX86_BUILTIN_UNPCKLPS, IX86_BUILTIN_ANDPS, IX86_BUILTIN_ANDNPS, IX86_BUILTIN_ORPS,
  IX86_BUILTIN_XORPS, IX86_BUILTIN_EMMS, IX86_BUILTIN_LDMXCSR, IX86_BUILTIN_STMXCSR,
  IX86_BUILTIN_SFENCE, IX86_BUILTIN_FEMMS, IX86_BUILTIN_PAVGUSB, IX86_BUILTIN_PF2ID,
  IX86_BUILTIN_PFACC, IX86_BUILTIN_PFADD, IX86_BUILTIN_PFCMPEQ, IX86_BUILTIN_PFCMPGE,
  IX86_BUILTIN_PFCMPGT, IX86_BUILTIN_PFMAX, IX86_BUILTIN_PFMIN, IX86_BUILTIN_PFMUL,
  IX86_BUILTIN_PFRCP, IX86_BUILTIN_PFRCPIT1, IX86_BUILTIN_PFRCPIT2, IX86_BUILTIN_PFRSQIT1,
  IX86_BUILTIN_PFRSQRT, IX86_BUILTIN_PFSUB, IX86_BUILTIN_PFSUBR, IX86_BUILTIN_PI2FD,
  IX86_BUILTIN_PMULHRW, IX86_BUILTIN_PF2IW, IX86_BUILTIN_PFNACC, IX86_BUILTIN_PFPNACC,
  IX86_BUILTIN_PI2FW, IX86_BUILTIN_PSWAPDSI, IX86_BUILTIN_PSWAPDSF, IX86_BUILTIN_ADDPD,
  IX86_BUILTIN_ADDSD, IX86_BUILTIN_DIVPD, IX86_BUILTIN_DIVSD, IX86_BUILTIN_MULPD,
  IX86_BUILTIN_MULSD, IX86_BUILTIN_SUBPD, IX86_BUILTIN_SUBSD, IX86_BUILTIN_CMPEQPD,
  IX86_BUILTIN_CMPLTPD, IX86_BUILTIN_CMPLEPD, IX86_BUILTIN_CMPGTPD, IX86_BUILTIN_CMPGEPD,
  IX86_BUILTIN_CMPNEQPD, IX86_BUILTIN_CMPNLTPD, IX86_BUILTIN_CMPNLEPD, IX86_BUILTIN_CMPNGTPD,
  IX86_BUILTIN_CMPNGEPD, IX86_BUILTIN_CMPORDPD, IX86_BUILTIN_CMPUNORDPD, IX86_BUILTIN_CMPNEPD,
  IX86_BUILTIN_CMPEQSD, IX86_BUILTIN_CMPLTSD, IX86_BUILTIN_CMPLESD, IX86_BUILTIN_CMPNEQSD,
  IX86_BUILTIN_CMPNLTSD, IX86_BUILTIN_CMPNLESD, IX86_BUILTIN_CMPORDSD, IX86_BUILTIN_CMPUNORDSD,
  IX86_BUILTIN_CMPNESD, IX86_BUILTIN_COMIEQSD, IX86_BUILTIN_COMILTSD, IX86_BUILTIN_COMILESD,
  IX86_BUILTIN_COMIGTSD, IX86_BUILTIN_COMIGESD, IX86_BUILTIN_COMINEQSD, IX86_BUILTIN_UCOMIEQSD,
  IX86_BUILTIN_UCOMILTSD, IX86_BUILTIN_UCOMILESD, IX86_BUILTIN_UCOMIGTSD, IX86_BUILTIN_UCOMIGESD,
  IX86_BUILTIN_UCOMINEQSD, IX86_BUILTIN_MAXPD, IX86_BUILTIN_MAXSD, IX86_BUILTIN_MINPD,
  IX86_BUILTIN_MINSD, IX86_BUILTIN_ANDPD, IX86_BUILTIN_ANDNPD, IX86_BUILTIN_ORPD,
  IX86_BUILTIN_XORPD, IX86_BUILTIN_SQRTPD, IX86_BUILTIN_SQRTSD, IX86_BUILTIN_UNPCKHPD,
  IX86_BUILTIN_UNPCKLPD, IX86_BUILTIN_SHUFPD, IX86_BUILTIN_LOADUPD, IX86_BUILTIN_STOREUPD,
  IX86_BUILTIN_MOVSD, IX86_BUILTIN_LOADHPD, IX86_BUILTIN_LOADLPD, IX86_BUILTIN_CVTDQ2PD,
  IX86_BUILTIN_CVTDQ2PS, IX86_BUILTIN_CVTPD2DQ, IX86_BUILTIN_CVTPD2PI, IX86_BUILTIN_CVTPD2PS,
  IX86_BUILTIN_CVTTPD2DQ, IX86_BUILTIN_CVTTPD2PI, IX86_BUILTIN_CVTPI2PD, IX86_BUILTIN_CVTSI2SD,
  IX86_BUILTIN_CVTSI642SD, IX86_BUILTIN_CVTSD2SI, IX86_BUILTIN_CVTSD2SI64, IX86_BUILTIN_CVTSD2SS,
  IX86_BUILTIN_CVTSS2SD, IX86_BUILTIN_CVTTSD2SI, IX86_BUILTIN_CVTTSD2SI64, IX86_BUILTIN_CVTPS2DQ,
  IX86_BUILTIN_CVTPS2PD, IX86_BUILTIN_CVTTPS2DQ, IX86_BUILTIN_MOVNTI, IX86_BUILTIN_MOVNTPD,
  IX86_BUILTIN_MOVNTDQ, IX86_BUILTIN_MASKMOVDQU, IX86_BUILTIN_MOVMSKPD, IX86_BUILTIN_PMOVMSKB128,
  IX86_BUILTIN_PACKSSWB128, IX86_BUILTIN_PACKSSDW128, IX86_BUILTIN_PACKUSWB128, IX86_BUILTIN_PADDB128,
  IX86_BUILTIN_PADDW128, IX86_BUILTIN_PADDD128, IX86_BUILTIN_PADDQ128, IX86_BUILTIN_PADDSB128,
  IX86_BUILTIN_PADDSW128, IX86_BUILTIN_PADDUSB128, IX86_BUILTIN_PADDUSW128, IX86_BUILTIN_PSUBB128,
  IX86_BUILTIN_PSUBW128, IX86_BUILTIN_PSUBD128, IX86_BUILTIN_PSUBQ128, IX86_BUILTIN_PSUBSB128,
  IX86_BUILTIN_PSUBSW128, IX86_BUILTIN_PSUBUSB128, IX86_BUILTIN_PSUBUSW128, IX86_BUILTIN_PAND128,
  IX86_BUILTIN_PANDN128, IX86_BUILTIN_POR128, IX86_BUILTIN_PXOR128, IX86_BUILTIN_PAVGB128,
  IX86_BUILTIN_PAVGW128, IX86_BUILTIN_PCMPEQB128, IX86_BUILTIN_PCMPEQW128, IX86_BUILTIN_PCMPEQD128,
  IX86_BUILTIN_PCMPGTB128, IX86_BUILTIN_PCMPGTW128, IX86_BUILTIN_PCMPGTD128, IX86_BUILTIN_PMADDWD128,
  IX86_BUILTIN_PMAXSW128, IX86_BUILTIN_PMAXUB128, IX86_BUILTIN_PMINSW128, IX86_BUILTIN_PMINUB128,
  IX86_BUILTIN_PMULUDQ, IX86_BUILTIN_PMULUDQ128, IX86_BUILTIN_PMULHUW128, IX86_BUILTIN_PMULHW128,
  IX86_BUILTIN_PMULLW128, IX86_BUILTIN_PSADBW128, IX86_BUILTIN_PSHUFHW, IX86_BUILTIN_PSHUFLW,
  IX86_BUILTIN_PSHUFD, IX86_BUILTIN_PSLLW128, IX86_BUILTIN_PSLLD128, IX86_BUILTIN_PSLLQ128,
  IX86_BUILTIN_PSRAW128, IX86_BUILTIN_PSRAD128, IX86_BUILTIN_PSRLW128, IX86_BUILTIN_PSRLD128,
  IX86_BUILTIN_PSRLQ128, IX86_BUILTIN_PSLLDQI128, IX86_BUILTIN_PSLLWI128, IX86_BUILTIN_PSLLDI128,
  IX86_BUILTIN_PSLLQI128, IX86_BUILTIN_PSRAWI128, IX86_BUILTIN_PSRADI128, IX86_BUILTIN_PSRLDQI128,
  IX86_BUILTIN_PSRLWI128, IX86_BUILTIN_PSRLDI128, IX86_BUILTIN_PSRLQI128, IX86_BUILTIN_PUNPCKHBW128,
  IX86_BUILTIN_PUNPCKHWD128, IX86_BUILTIN_PUNPCKHDQ128, IX86_BUILTIN_PUNPCKHQDQ128, IX86_BUILTIN_PUNPCKLBW128,
  IX86_BUILTIN_PUNPCKLWD128, IX86_BUILTIN_PUNPCKLDQ128, IX86_BUILTIN_PUNPCKLQDQ128, IX86_BUILTIN_CLFLUSH,
  IX86_BUILTIN_MFENCE, IX86_BUILTIN_LFENCE, IX86_BUILTIN_ADDSUBPS, IX86_BUILTIN_HADDPS,
  IX86_BUILTIN_HSUBPS, IX86_BUILTIN_MOVSHDUP, IX86_BUILTIN_MOVSLDUP, IX86_BUILTIN_ADDSUBPD,
  IX86_BUILTIN_HADDPD, IX86_BUILTIN_HSUBPD, IX86_BUILTIN_LDDQU, IX86_BUILTIN_MONITOR,
  IX86_BUILTIN_MWAIT, IX86_BUILTIN_VEC_INIT_V2SI, IX86_BUILTIN_VEC_INIT_V4HI, IX86_BUILTIN_VEC_INIT_V8QI,
  IX86_BUILTIN_VEC_EXT_V2DF, IX86_BUILTIN_VEC_EXT_V2DI, IX86_BUILTIN_VEC_EXT_V4SF, IX86_BUILTIN_VEC_EXT_V4SI,
  IX86_BUILTIN_VEC_EXT_V8HI, IX86_BUILTIN_VEC_EXT_V2SI, IX86_BUILTIN_VEC_EXT_V4HI, IX86_BUILTIN_VEC_SET_V8HI,
  IX86_BUILTIN_VEC_SET_V4HI, IX86_BUILTIN_MAX, IX86_BUILTIN_ADDPS, IX86_BUILTIN_ADDSS,
  IX86_BUILTIN_DIVPS, IX86_BUILTIN_DIVSS, IX86_BUILTIN_MULPS, IX86_BUILTIN_MULSS,
  IX86_BUILTIN_SUBPS, IX86_BUILTIN_SUBSS, IX86_BUILTIN_CMPEQPS, IX86_BUILTIN_CMPLTPS,
  IX86_BUILTIN_CMPLEPS, IX86_BUILTIN_CMPGTPS, IX86_BUILTIN_CMPGEPS, IX86_BUILTIN_CMPNEQPS,
  IX86_BUILTIN_CMPNLTPS, IX86_BUILTIN_CMPNLEPS, IX86_BUILTIN_CMPNGTPS, IX86_BUILTIN_CMPNGEPS,
  IX86_BUILTIN_CMPORDPS, IX86_BUILTIN_CMPUNORDPS, IX86_BUILTIN_CMPEQSS, IX86_BUILTIN_CMPLTSS,
  IX86_BUILTIN_CMPLESS, IX86_BUILTIN_CMPNEQSS, IX86_BUILTIN_CMPNLTSS, IX86_BUILTIN_CMPNLESS,
  IX86_BUILTIN_CMPNGTSS, IX86_BUILTIN_CMPNGESS, IX86_BUILTIN_CMPORDSS, IX86_BUILTIN_CMPUNORDSS,
  IX86_BUILTIN_COMIEQSS, IX86_BUILTIN_COMILTSS, IX86_BUILTIN_COMILESS, IX86_BUILTIN_COMIGTSS,
  IX86_BUILTIN_COMIGESS, IX86_BUILTIN_COMINEQSS, IX86_BUILTIN_UCOMIEQSS, IX86_BUILTIN_UCOMILTSS,
  IX86_BUILTIN_UCOMILESS, IX86_BUILTIN_UCOMIGTSS, IX86_BUILTIN_UCOMIGESS, IX86_BUILTIN_UCOMINEQSS,
  IX86_BUILTIN_CVTPI2PS, IX86_BUILTIN_CVTPS2PI, IX86_BUILTIN_CVTSI2SS, IX86_BUILTIN_CVTSI642SS,
  IX86_BUILTIN_CVTSS2SI, IX86_BUILTIN_CVTSS2SI64, IX86_BUILTIN_CVTTPS2PI, IX86_BUILTIN_CVTTSS2SI,
  IX86_BUILTIN_CVTTSS2SI64, IX86_BUILTIN_MAXPS, IX86_BUILTIN_MAXSS, IX86_BUILTIN_MINPS,
  IX86_BUILTIN_MINSS, IX86_BUILTIN_LOADUPS, IX86_BUILTIN_STOREUPS, IX86_BUILTIN_MOVSS,
  IX86_BUILTIN_MOVHLPS, IX86_BUILTIN_MOVLHPS, IX86_BUILTIN_LOADHPS, IX86_BUILTIN_LOADLPS,
  IX86_BUILTIN_STOREHPS, IX86_BUILTIN_STORELPS, IX86_BUILTIN_MASKMOVQ, IX86_BUILTIN_MOVMSKPS,
  IX86_BUILTIN_PMOVMSKB, IX86_BUILTIN_MOVNTPS, IX86_BUILTIN_MOVNTQ, IX86_BUILTIN_LOADDQU,
  IX86_BUILTIN_STOREDQU, IX86_BUILTIN_PACKSSWB, IX86_BUILTIN_PACKSSDW, IX86_BUILTIN_PACKUSWB,
  IX86_BUILTIN_PADDB, IX86_BUILTIN_PADDW, IX86_BUILTIN_PADDD, IX86_BUILTIN_PADDQ,
  IX86_BUILTIN_PADDSB, IX86_BUILTIN_PADDSW, IX86_BUILTIN_PADDUSB, IX86_BUILTIN_PADDUSW,
  IX86_BUILTIN_PSUBB, IX86_BUILTIN_PSUBW, IX86_BUILTIN_PSUBD, IX86_BUILTIN_PSUBQ,
  IX86_BUILTIN_PSUBSB, IX86_BUILTIN_PSUBSW, IX86_BUILTIN_PSUBUSB, IX86_BUILTIN_PSUBUSW,
  IX86_BUILTIN_PAND, IX86_BUILTIN_PANDN, IX86_BUILTIN_POR, IX86_BUILTIN_PXOR,
  IX86_BUILTIN_PAVGB, IX86_BUILTIN_PAVGW, IX86_BUILTIN_PCMPEQB, IX86_BUILTIN_PCMPEQW,
  IX86_BUILTIN_PCMPEQD, IX86_BUILTIN_PCMPGTB, IX86_BUILTIN_PCMPGTW, IX86_BUILTIN_PCMPGTD,
  IX86_BUILTIN_PMADDWD, IX86_BUILTIN_PMAXSW, IX86_BUILTIN_PMAXUB, IX86_BUILTIN_PMINSW,
  IX86_BUILTIN_PMINUB, IX86_BUILTIN_PMULHUW, IX86_BUILTIN_PMULHW, IX86_BUILTIN_PMULLW,
  IX86_BUILTIN_PSADBW, IX86_BUILTIN_PSHUFW, IX86_BUILTIN_PSLLW, IX86_BUILTIN_PSLLD,
  IX86_BUILTIN_PSLLQ, IX86_BUILTIN_PSRAW, IX86_BUILTIN_PSRAD, IX86_BUILTIN_PSRLW,
  IX86_BUILTIN_PSRLD, IX86_BUILTIN_PSRLQ, IX86_BUILTIN_PSLLWI, IX86_BUILTIN_PSLLDI,
  IX86_BUILTIN_PSLLQI, IX86_BUILTIN_PSRAWI, IX86_BUILTIN_PSRADI, IX86_BUILTIN_PSRLWI,
  IX86_BUILTIN_PSRLDI, IX86_BUILTIN_PSRLQI, IX86_BUILTIN_PUNPCKHBW, IX86_BUILTIN_PUNPCKHWD,
  IX86_BUILTIN_PUNPCKHDQ, IX86_BUILTIN_PUNPCKLBW, IX86_BUILTIN_PUNPCKLWD, IX86_BUILTIN_PUNPCKLDQ,
  IX86_BUILTIN_SHUFPS, IX86_BUILTIN_RCPPS, IX86_BUILTIN_RCPSS, IX86_BUILTIN_RSQRTPS,
  IX86_BUILTIN_RSQRTSS, IX86_BUILTIN_SQRTPS, IX86_BUILTIN_SQRTSS, IX86_BUILTIN_UNPCKHPS,
  IX86_BUILTIN_UNPCKLPS, IX86_BUILTIN_ANDPS, IX86_BUILTIN_ANDNPS, IX86_BUILTIN_ORPS,
  IX86_BUILTIN_XORPS, IX86_BUILTIN_EMMS, IX86_BUILTIN_LDMXCSR, IX86_BUILTIN_STMXCSR,
  IX86_BUILTIN_SFENCE, IX86_BUILTIN_FEMMS, IX86_BUILTIN_PAVGUSB, IX86_BUILTIN_PF2ID,
  IX86_BUILTIN_PFACC, IX86_BUILTIN_PFADD, IX86_BUILTIN_PFCMPEQ, IX86_BUILTIN_PFCMPGE,
  IX86_BUILTIN_PFCMPGT, IX86_BUILTIN_PFMAX, IX86_BUILTIN_PFMIN, IX86_BUILTIN_PFMUL,
  IX86_BUILTIN_PFRCP, IX86_BUILTIN_PFRCPIT1, IX86_BUILTIN_PFRCPIT2, IX86_BUILTIN_PFRSQIT1,
  IX86_BUILTIN_PFRSQRT, IX86_BUILTIN_PFSUB, IX86_BUILTIN_PFSUBR, IX86_BUILTIN_PI2FD,
  IX86_BUILTIN_PMULHRW, IX86_BUILTIN_PF2IW, IX86_BUILTIN_PFNACC, IX86_BUILTIN_PFPNACC,
  IX86_BUILTIN_PI2FW, IX86_BUILTIN_PSWAPDSI, IX86_BUILTIN_PSWAPDSF, IX86_BUILTIN_ADDPD,
  IX86_BUILTIN_ADDSD, IX86_BUILTIN_DIVPD, IX86_BUILTIN_DIVSD, IX86_BUILTIN_MULPD,
  IX86_BUILTIN_MULSD, IX86_BUILTIN_SUBPD, IX86_BUILTIN_SUBSD, IX86_BUILTIN_CMPEQPD,
  IX86_BUILTIN_CMPLTPD, IX86_BUILTIN_CMPLEPD, IX86_BUILTIN_CMPGTPD, IX86_BUILTIN_CMPGEPD,
  IX86_BUILTIN_CMPNEQPD, IX86_BUILTIN_CMPNLTPD, IX86_BUILTIN_CMPNLEPD, IX86_BUILTIN_CMPNGTPD,
  IX86_BUILTIN_CMPNGEPD, IX86_BUILTIN_CMPORDPD, IX86_BUILTIN_CMPUNORDPD, IX86_BUILTIN_CMPNEPD,
  IX86_BUILTIN_CMPEQSD, IX86_BUILTIN_CMPLTSD, IX86_BUILTIN_CMPLESD, IX86_BUILTIN_CMPNEQSD,
  IX86_BUILTIN_CMPNLTSD, IX86_BUILTIN_CMPNLESD, IX86_BUILTIN_CMPORDSD, IX86_BUILTIN_CMPUNORDSD,
  IX86_BUILTIN_CMPNESD, IX86_BUILTIN_COMIEQSD, IX86_BUILTIN_COMILTSD, IX86_BUILTIN_COMILESD,
  IX86_BUILTIN_COMIGTSD, IX86_BUILTIN_COMIGESD, IX86_BUILTIN_COMINEQSD, IX86_BUILTIN_UCOMIEQSD,
  IX86_BUILTIN_UCOMILTSD, IX86_BUILTIN_UCOMILESD, IX86_BUILTIN_UCOMIGTSD, IX86_BUILTIN_UCOMIGESD,
  IX86_BUILTIN_UCOMINEQSD, IX86_BUILTIN_MAXPD, IX86_BUILTIN_MAXSD, IX86_BUILTIN_MINPD,
  IX86_BUILTIN_MINSD, IX86_BUILTIN_ANDPD, IX86_BUILTIN_ANDNPD, IX86_BUILTIN_ORPD,
  IX86_BUILTIN_XORPD, IX86_BUILTIN_SQRTPD, IX86_BUILTIN_SQRTSD, IX86_BUILTIN_UNPCKHPD,
  IX86_BUILTIN_UNPCKLPD, IX86_BUILTIN_SHUFPD, IX86_BUILTIN_LOADUPD, IX86_BUILTIN_STOREUPD,
  IX86_BUILTIN_MOVSD, IX86_BUILTIN_LOADHPD, IX86_BUILTIN_LOADLPD, IX86_BUILTIN_CVTDQ2PD,
  IX86_BUILTIN_CVTDQ2PS, IX86_BUILTIN_CVTPD2DQ, IX86_BUILTIN_CVTPD2PI, IX86_BUILTIN_CVTPD2PS,
  IX86_BUILTIN_CVTTPD2DQ, IX86_BUILTIN_CVTTPD2PI, IX86_BUILTIN_CVTPI2PD, IX86_BUILTIN_CVTSI2SD,
  IX86_BUILTIN_CVTSI642SD, IX86_BUILTIN_CVTSD2SI, IX86_BUILTIN_CVTSD2SI64, IX86_BUILTIN_CVTSD2SS,
  IX86_BUILTIN_CVTSS2SD, IX86_BUILTIN_CVTTSD2SI, IX86_BUILTIN_CVTTSD2SI64, IX86_BUILTIN_CVTPS2DQ,
  IX86_BUILTIN_CVTPS2PD, IX86_BUILTIN_CVTTPS2DQ, IX86_BUILTIN_MOVNTI, IX86_BUILTIN_MOVNTPD,
  IX86_BUILTIN_MOVNTDQ, IX86_BUILTIN_MASKMOVDQU, IX86_BUILTIN_MOVMSKPD, IX86_BUILTIN_PMOVMSKB128,
  IX86_BUILTIN_PACKSSWB128, IX86_BUILTIN_PACKSSDW128, IX86_BUILTIN_PACKUSWB128, IX86_BUILTIN_PADDB128,
  IX86_BUILTIN_PADDW128, IX86_BUILTIN_PADDD128, IX86_BUILTIN_PADDQ128, IX86_BUILTIN_PADDSB128,
  IX86_BUILTIN_PADDSW128, IX86_BUILTIN_PADDUSB128, IX86_BUILTIN_PADDUSW128, IX86_BUILTIN_PSUBB128,
  IX86_BUILTIN_PSUBW128, IX86_BUILTIN_PSUBD128, IX86_BUILTIN_PSUBQ128, IX86_BUILTIN_PSUBSB128,
  IX86_BUILTIN_PSUBSW128, IX86_BUILTIN_PSUBUSB128, IX86_BUILTIN_PSUBUSW128, IX86_BUILTIN_PAND128,
  IX86_BUILTIN_PANDN128, IX86_BUILTIN_POR128, IX86_BUILTIN_PXOR128, IX86_BUILTIN_PAVGB128,
  IX86_BUILTIN_PAVGW128, IX86_BUILTIN_PCMPEQB128, IX86_BUILTIN_PCMPEQW128, IX86_BUILTIN_PCMPEQD128,
  IX86_BUILTIN_PCMPGTB128, IX86_BUILTIN_PCMPGTW128, IX86_BUILTIN_PCMPGTD128, IX86_BUILTIN_PMADDWD128,
  IX86_BUILTIN_PMAXSW128, IX86_BUILTIN_PMAXUB128, IX86_BUILTIN_PMINSW128, IX86_BUILTIN_PMINUB128,
  IX86_BUILTIN_PMULUDQ, IX86_BUILTIN_PMULUDQ128, IX86_BUILTIN_PMULHUW128, IX86_BUILTIN_PMULHW128,
  IX86_BUILTIN_PMULLW128, IX86_BUILTIN_PSADBW128, IX86_BUILTIN_PSHUFHW, IX86_BUILTIN_PSHUFLW,
  IX86_BUILTIN_PSHUFD, IX86_BUILTIN_PSLLW128, IX86_BUILTIN_PSLLD128, IX86_BUILTIN_PSLLQ128,
  IX86_BUILTIN_PSRAW128, IX86_BUILTIN_PSRAD128, IX86_BUILTIN_PSRLW128, IX86_BUILTIN_PSRLD128,
  IX86_BUILTIN_PSRLQ128, IX86_BUILTIN_PSLLDQI128, IX86_BUILTIN_PSLLWI128, IX86_BUILTIN_PSLLDI128,
  IX86_BUILTIN_PSLLQI128, IX86_BUILTIN_PSRAWI128, IX86_BUILTIN_PSRADI128, IX86_BUILTIN_PSRLDQI128,
  IX86_BUILTIN_PSRLWI128, IX86_BUILTIN_PSRLDI128, IX86_BUILTIN_PSRLQI128, IX86_BUILTIN_PUNPCKHBW128,
  IX86_BUILTIN_PUNPCKHWD128, IX86_BUILTIN_PUNPCKHDQ128, IX86_BUILTIN_PUNPCKHQDQ128, IX86_BUILTIN_PUNPCKLBW128,
  IX86_BUILTIN_PUNPCKLWD128, IX86_BUILTIN_PUNPCKLDQ128, IX86_BUILTIN_PUNPCKLQDQ128, IX86_BUILTIN_CLFLUSH,
  IX86_BUILTIN_MFENCE, IX86_BUILTIN_LFENCE, IX86_BUILTIN_ADDSUBPS, IX86_BUILTIN_HADDPS,
  IX86_BUILTIN_HSUBPS, IX86_BUILTIN_MOVSHDUP, IX86_BUILTIN_MOVSLDUP, IX86_BUILTIN_ADDSUBPD,
  IX86_BUILTIN_HADDPD, IX86_BUILTIN_HSUBPD, IX86_BUILTIN_LDDQU, IX86_BUILTIN_MOVNTSS,
  IX86_BUILTIN_MOVNTSD, IX86_BUILTIN_EXTRQI, IX86_BUILTIN_EXTRQ, IX86_BUILTIN_INSERTQI,
  IX86_BUILTIN_INSERTQ, IX86_BUILTIN_MONITOR, IX86_BUILTIN_MWAIT, IX86_BUILTIN_VEC_INIT_V2SI,
  IX86_BUILTIN_VEC_INIT_V4HI, IX86_BUILTIN_VEC_INIT_V8QI, IX86_BUILTIN_VEC_EXT_V2DF, IX86_BUILTIN_VEC_EXT_V2DI,
  IX86_BUILTIN_VEC_EXT_V4SF, IX86_BUILTIN_VEC_EXT_V4SI, IX86_BUILTIN_VEC_EXT_V8HI, IX86_BUILTIN_VEC_EXT_V2SI,
  IX86_BUILTIN_VEC_EXT_V4HI, IX86_BUILTIN_VEC_SET_V8HI, IX86_BUILTIN_VEC_SET_V4HI, IX86_BUILTIN_MAX
}
enum  processor_type {
  PROCESSOR_EV4, PROCESSOR_EV5, PROCESSOR_EV6, PROCESSOR_I386,
  PROCESSOR_I486, PROCESSOR_PENTIUM, PROCESSOR_PENTIUMPRO, PROCESSOR_K6,
  PROCESSOR_ATHLON, PROCESSOR_PENTIUM4, PROCESSOR_max, PROCESSOR_M88100,
  PROCESSOR_M88110, PROCESSOR_M88000, PROCESSOR_700, PROCESSOR_7100,
  PROCESSOR_7100LC, PROCESSOR_7200, PROCESSOR_8000, PROCESSOR_RIOS1,
  PROCESSOR_RIOS2, PROCESSOR_RS64A, PROCESSOR_MPCCORE, PROCESSOR_PPC403,
  PROCESSOR_PPC405, PROCESSOR_PPC601, PROCESSOR_PPC603, PROCESSOR_PPC604,
  PROCESSOR_PPC604e, PROCESSOR_PPC620, PROCESSOR_PPC630, PROCESSOR_PPC750,
  PROCESSOR_PPC7400, PROCESSOR_PPC7450, PROCESSOR_SH1, PROCESSOR_SH2,
  PROCESSOR_SH3, PROCESSOR_SH3E, PROCESSOR_SH4, PROCESSOR_SH5,
  PROCESSOR_DEFAULT, PROCESSOR_R3000, PROCESSOR_R3900, PROCESSOR_R6000,
  PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111, PROCESSOR_R4120,
  PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650, PROCESSOR_R5000,
  PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R8000, PROCESSOR_R4KC,
  PROCESSOR_R5KC, PROCESSOR_R20KC, PROCESSOR_SR71000, PROCESSOR_SB1,
  PROCESSOR_V7, PROCESSOR_CYPRESS, PROCESSOR_V8, PROCESSOR_SUPERSPARC,
  PROCESSOR_SPARCLITE, PROCESSOR_F930, PROCESSOR_F934, PROCESSOR_HYPERSPARC,
  PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET, PROCESSOR_TSC701, PROCESSOR_V9,
  PROCESSOR_ULTRASPARC, PROCESSOR_DEFAULT, PROCESSOR_R3000, PROCESSOR_R3900,
  PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111,
  PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650,
  PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R8000,
  PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC, PROCESSOR_SR71000,
  PROCESSOR_SB1, PROCESSOR_DEFAULT, PROCESSOR_R3000, PROCESSOR_R3900,
  PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111,
  PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650,
  PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R8000,
  PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC, PROCESSOR_SR71000,
  PROCESSOR_SB1, PROCESSOR_EV4, PROCESSOR_EV5, PROCESSOR_EV6,
  PROCESSOR_I386, PROCESSOR_I486, PROCESSOR_PENTIUM, PROCESSOR_PENTIUMPRO,
  PROCESSOR_K6, PROCESSOR_ATHLON, PROCESSOR_PENTIUM4, PROCESSOR_max,
  PROCESSOR_M88100, PROCESSOR_M88110, PROCESSOR_M88000, PROCESSOR_700,
  PROCESSOR_7100, PROCESSOR_7100LC, PROCESSOR_7200, PROCESSOR_8000,
  PROCESSOR_RIOS1, PROCESSOR_RIOS2, PROCESSOR_RS64A, PROCESSOR_MPCCORE,
  PROCESSOR_PPC403, PROCESSOR_PPC405, PROCESSOR_PPC601, PROCESSOR_PPC603,
  PROCESSOR_PPC604, PROCESSOR_PPC604e, PROCESSOR_PPC620, PROCESSOR_PPC630,
  PROCESSOR_PPC750, PROCESSOR_PPC7400, PROCESSOR_PPC7450, PROCESSOR_SH1,
  PROCESSOR_SH2, PROCESSOR_SH3, PROCESSOR_SH3E, PROCESSOR_SH4,
  PROCESSOR_SH5, PROCESSOR_DEFAULT, PROCESSOR_R3000, PROCESSOR_R3900,
  PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111,
  PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650,
  PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R8000,
  PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC, PROCESSOR_SR71000,
  PROCESSOR_SB1, PROCESSOR_V7, PROCESSOR_CYPRESS, PROCESSOR_V8,
  PROCESSOR_SUPERSPARC, PROCESSOR_SPARCLITE, PROCESSOR_F930, PROCESSOR_F934,
  PROCESSOR_HYPERSPARC, PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET, PROCESSOR_TSC701,
  PROCESSOR_V9, PROCESSOR_ULTRASPARC, PROCESSOR_DEFAULT, PROCESSOR_R3000,
  PROCESSOR_R3900, PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100,
  PROCESSOR_R4111, PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600,
  PROCESSOR_R4650, PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500,
  PROCESSOR_R8000, PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC,
  PROCESSOR_SR71000, PROCESSOR_SB1, PROCESSOR_DEFAULT, PROCESSOR_R3000,
  PROCESSOR_R3900, PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100,
  PROCESSOR_R4111, PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600,
  PROCESSOR_R4650, PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500,
  PROCESSOR_R8000, PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC,
  PROCESSOR_SR71000, PROCESSOR_SB1, PROCESSOR_EV4, PROCESSOR_EV5,
  PROCESSOR_EV6, PROCESSOR_MAX, ARM_CORE, PROCESSOR_I386,
  PROCESSOR_I486, PROCESSOR_PENTIUM, PROCESSOR_PENTIUMPRO, PROCESSOR_K6,
  PROCESSOR_ATHLON, PROCESSOR_PENTIUM4, PROCESSOR_K8, PROCESSOR_NOCONA,
  PROCESSOR_max, PROCESSOR_ITANIUM, PROCESSOR_ITANIUM2, PROCESSOR_max,
  PROCESSOR_DEFAULT, PROCESSOR_IQ2000, PROCESSOR_IQ10, PROCESSOR_DEFAULT,
  PROCESSOR_4KC, PROCESSOR_5KC, PROCESSOR_20KC, PROCESSOR_M4K,
  PROCESSOR_R3000, PROCESSOR_R3900, PROCESSOR_R6000, PROCESSOR_R4000,
  PROCESSOR_R4100, PROCESSOR_R4111, PROCESSOR_R4120, PROCESSOR_R4130,
  PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650, PROCESSOR_R5000,
  PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R7000, PROCESSOR_R8000,
  PROCESSOR_R9000, PROCESSOR_SB1, PROCESSOR_SR71000, PROCESSOR_700,
  PROCESSOR_7100, PROCESSOR_7100LC, PROCESSOR_7200, PROCESSOR_7300,
  PROCESSOR_8000, PROCESSOR_RIOS1, PROCESSOR_RIOS2, PROCESSOR_RS64A,
  PROCESSOR_MPCCORE, PROCESSOR_PPC403, PROCESSOR_PPC405, PROCESSOR_PPC440,
  PROCESSOR_PPC601, PROCESSOR_PPC603, PROCESSOR_PPC604, PROCESSOR_PPC604e,
  PROCESSOR_PPC620, PROCESSOR_PPC630, PROCESSOR_PPC750, PROCESSOR_PPC7400,
  PROCESSOR_PPC7450, PROCESSOR_PPC8540, PROCESSOR_POWER4, PROCESSOR_POWER5,
  PROCESSOR_9672_G5, PROCESSOR_9672_G6, PROCESSOR_2064_Z900, PROCESSOR_2084_Z990,
  PROCESSOR_max, PROCESSOR_SH1, PROCESSOR_SH2, PROCESSOR_SH2E,
  PROCESSOR_SH2A, PROCESSOR_SH3, PROCESSOR_SH3E, PROCESSOR_SH4,
  PROCESSOR_SH4A, PROCESSOR_SH5, PROCESSOR_V7, PROCESSOR_CYPRESS,
  PROCESSOR_V8, PROCESSOR_SUPERSPARC, PROCESSOR_SPARCLITE, PROCESSOR_F930,
  PROCESSOR_F934, PROCESSOR_HYPERSPARC, PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET,
  PROCESSOR_TSC701, PROCESSOR_V9, PROCESSOR_ULTRASPARC, PROCESSOR_ULTRASPARC3,
  PROCESSOR_EV4, PROCESSOR_EV5, PROCESSOR_EV6, PROCESSOR_MAX,
  ARM_CORE, PROCESSOR_I386, PROCESSOR_I486, PROCESSOR_PENTIUM,
  PROCESSOR_PENTIUMPRO, PROCESSOR_K6, PROCESSOR_ATHLON, PROCESSOR_PENTIUM4,
  PROCESSOR_K8, PROCESSOR_NOCONA, PROCESSOR_GENERIC32, PROCESSOR_GENERIC64,
  PROCESSOR_AMDFAM10, PROCESSOR_max, PROCESSOR_ITANIUM, PROCESSOR_ITANIUM2,
  PROCESSOR_max, PROCESSOR_DEFAULT, PROCESSOR_IQ2000, PROCESSOR_IQ10,
  PROCESSOR_R3000, PROCESSOR_4KC, PROCESSOR_4KP, PROCESSOR_5KC,
  PROCESSOR_5KF, PROCESSOR_20KC, PROCESSOR_24K, PROCESSOR_24KX,
  PROCESSOR_M4K, PROCESSOR_R3900, PROCESSOR_R6000, PROCESSOR_R4000,
  PROCESSOR_R4100, PROCESSOR_R4111, PROCESSOR_R4120, PROCESSOR_R4130,
  PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650, PROCESSOR_R5000,
  PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R7000, PROCESSOR_R8000,
  PROCESSOR_R9000, PROCESSOR_SB1, PROCESSOR_SB1A, PROCESSOR_SR71000,
  PROCESSOR_MAX, PROCESSOR_MN10300, PROCESSOR_AM33, PROCESSOR_AM33_2,
  PROCESSOR_MS1_64_001, PROCESSOR_MS1_16_002, PROCESSOR_MS1_16_003, PROCESSOR_MS2,
  PROCESSOR_700, PROCESSOR_7100, PROCESSOR_7100LC, PROCESSOR_7200,
  PROCESSOR_7300, PROCESSOR_8000, PROCESSOR_RIOS1, PROCESSOR_RIOS2,
  PROCESSOR_RS64A, PROCESSOR_MPCCORE, PROCESSOR_PPC403, PROCESSOR_PPC405,
  PROCESSOR_PPC440, PROCESSOR_PPC601, PROCESSOR_PPC603, PROCESSOR_PPC604,
  PROCESSOR_PPC604e, PROCESSOR_PPC620, PROCESSOR_PPC630, PROCESSOR_PPC750,
  PROCESSOR_PPC7400, PROCESSOR_PPC7450, PROCESSOR_PPC8540, PROCESSOR_POWER4,
  PROCESSOR_POWER5, PROCESSOR_9672_G5, PROCESSOR_9672_G6, PROCESSOR_2064_Z900,
  PROCESSOR_2084_Z990, PROCESSOR_2094_Z9_109, PROCESSOR_max, PROCESSOR_SH1,
  PROCESSOR_SH2, PROCESSOR_SH2E, PROCESSOR_SH2A, PROCESSOR_SH3,
  PROCESSOR_SH3E, PROCESSOR_SH4, PROCESSOR_SH4A, PROCESSOR_SH5,
  PROCESSOR_V7, PROCESSOR_CYPRESS, PROCESSOR_V8, PROCESSOR_SUPERSPARC,
  PROCESSOR_SPARCLITE, PROCESSOR_F930, PROCESSOR_F934, PROCESSOR_HYPERSPARC,
  PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET, PROCESSOR_TSC701, PROCESSOR_V9,
  PROCESSOR_ULTRASPARC, PROCESSOR_ULTRASPARC3, PROCESSOR_NIAGARA
}
enum  fpmath_unit {
  FPMATH_387 = 1, FPMATH_SSE = 2, FPMATH_387 = 1, FPMATH_SSE = 2,
  FPMATH_387 = 1, FPMATH_SSE = 2, FPMATH_387 = 1, FPMATH_SSE = 2
}
enum  tls_dialect {
  TLS_DIALECT_GNU, TLS_DIALECT_SUN, TLS_DIALECT_GNU, TLS_DIALECT_SUN,
  TLS_DIALECT_GNU, TLS_DIALECT_SUN, TLS_DIALECT_GNU, TLS_DIALECT_GNU2,
  TLS_DIALECT_SUN
}
enum  cmodel {
  CM_32, CM_SMALL, CM_KERNEL, CM_MEDIUM,
  CM_LARGE, CM_SMALL_PIC, CM_32, CM_MEDLOW,
  CM_MEDMID, CM_MEDANY, CM_EMBMEDANY, CM_32,
  CM_SMALL, CM_KERNEL, CM_MEDIUM, CM_LARGE,
  CM_SMALL_PIC, CM_32, CM_MEDLOW, CM_MEDMID,
  CM_MEDANY, CM_EMBMEDANY, CM_32, CM_SMALL,
  CM_KERNEL, CM_MEDIUM, CM_LARGE, CM_SMALL_PIC,
  CM_32, CM_MEDLOW, CM_MEDMID, CM_MEDANY,
  CM_EMBMEDANY, CM_32, CM_SMALL, CM_KERNEL,
  CM_MEDIUM, CM_LARGE, CM_SMALL_PIC, CM_MEDIUM_PIC,
  CM_32, CM_MEDLOW, CM_MEDMID, CM_MEDANY,
  CM_EMBMEDANY
}
enum  asm_dialect {
  ASM_ATT, ASM_INTEL, ASM_ATT, ASM_INTEL,
  ASM_ATT, ASM_INTEL, ASM_ATT, ASM_INTEL
}
enum  fp_cw_mode {
  FP_CW_STORED, FP_CW_UNINITIALIZED, FP_CW_ANY, FP_CW_STORED,
  FP_CW_UNINITIALIZED, FP_CW_ANY
}

Variables

struct processor_costsix86_cost
int target_flags
const int x86_use_leave
const int x86_push_memory
const int x86_zero_extend_with_and
const int x86_use_bit_test
const int x86_cmove
const int x86_deep_branch
const int x86_branch_hints
const int x86_unroll_strlen
const int x86_double_with_add
const int x86_partial_reg_stall
const int x86_movx
const int x86_use_loop
const int x86_use_fiop
const int x86_use_mov0
const int x86_use_cltd
const int x86_read_modify_write
const int x86_read_modify
const int x86_split_long_moves
const int x86_promote_QImode
const int x86_single_stringop
const int x86_fast_prefix
const int x86_himode_math
const int x86_qimode_math
const int x86_promote_qi_regs
const int x86_promote_hi_regs
const int x86_integer_DFmode_moves
const int x86_add_esp_4
const int x86_add_esp_8
const int x86_sub_esp_4
const int x86_sub_esp_8
const int x86_partial_reg_dependency
const int x86_memory_mismatch_stall
const int x86_accumulate_outgoing_args
const int x86_prologue_using_move
const int x86_epilogue_using_move
const int x86_decompose_lea
const int x86_arch_always_fancy_math_387
const int x86_shift1
int x86_prefetch_sse
int const dbx_register_map [FIRST_PSEUDO_REGISTER]
int const dbx64_register_map [FIRST_PSEUDO_REGISTER]
int const svr4_dbx_register_map [FIRST_PSEUDO_REGISTER]
enum processor_type ix86_cpu
const char * ix86_cpu_string
enum processor_type ix86_arch
const char * ix86_arch_string
enum fpmath_unit ix86_fpmath
const char * ix86_fpmath_string
enum tls_dialect ix86_tls_dialect
const char * ix86_tls_dialect_string
enum cmodel ix86_cmodel
const char * ix86_cmodel_string
const char * ix86_asm_string
enum asm_dialect ix86_asm_dialect
int ix86_regparm
const char * ix86_regparm_string
int ix86_preferred_stack_boundary
const char * ix86_preferred_stack_boundary_string
int ix86_branch_cost
const char * ix86_branch_cost_string
const char * ix86_debug_arg_string
const char * ix86_debug_addr_string
const char * ix86_align_loops_string
const char * ix86_align_jumps_string
const char * ix86_align_funcs_string
enum reg_class const regclass_map [FIRST_PSEUDO_REGISTER]
rtx ix86_compare_op0
rtx ix86_compare_op1


Define Documentation

#define ACCUMULATE_OUTGOING_ARGS   TARGET_ACCUMULATE_OUTGOING_ARGS

Definition at line 1601 of file i386.h.

#define ADDITIONAL_REGISTER_NAMES

Value:

{ { "eax", 0 }, { "edx", 1 }, { "ecx", 2 }, { "ebx", 3 }, \
  { "esi", 4 }, { "edi", 5 }, { "ebp", 6 }, { "esp", 7 }, \
  { "rax", 0 }, { "rdx", 1 }, { "rcx", 2 }, { "rbx", 3 }, \
  { "rsi", 4 }, { "rdi", 5 }, { "rbp", 6 }, { "rsp", 7 }, \
  { "al", 0 }, { "dl", 1 }, { "cl", 2 }, { "bl", 3 },   \
  { "ah", 0 }, { "dh", 1 }, { "ch", 2 }, { "bh", 3 },   \
  { "mm0", 8},  { "mm1", 9},  { "mm2", 10}, { "mm3", 11}, \
  { "mm4", 12}, { "mm5", 13}, { "mm6", 14}, { "mm7", 15} }

Definition at line 3035 of file i386.h.

#define ADDRESS_COST ( RTX   )     ix86_address_cost (RTX)

Definition at line 2902 of file i386.h.

#define ADJUST_FIELD_ALIGN ( FIELD,
COMPUTED   )     x86_field_alignment (FIELD, COMPUTED)

Definition at line 772 of file i386.h.

Referenced by layout_decl(), place_field(), and update_alignment_for_field().

#define ALIGN_MODE_128 ( MODE   )     ((MODE) == XFmode || (MODE) == TFmode || SSE_REG_MODE_P (MODE))

Definition at line 755 of file i386.h.

Referenced by ix86_constant_alignment(), ix86_data_alignment(), and ix86_local_alignment().

#define ANY_FP_REG_P ( X   )     (REG_P (X) && ANY_FP_REGNO_P (REGNO (X)))

#define ANY_FP_REGNO_P (  )     (FP_REGNO_P (N) || SSE_REGNO_P (N))

Definition at line 1340 of file i386.h.

#define ANY_QI_REG_P ( X   )     (TARGET_64BIT ? GENERAL_REG_P(X) : QI_REG_P (X))

#define APPLY_RESULT_SIZE   (8+108)

Definition at line 1684 of file i386.h.

Referenced by apply_result_size().

#define ARG_POINTER_REGNUM   16

Definition at line 1130 of file i386.h.

#define ASM_FILE_END ( FILE   )     ix86_asm_file_end (FILE)

Definition at line 1798 of file i386.h.

#define ASM_FORMAT_PRIVATE_NAME ( OUTPUT,
NAME,
LABELNO   ) 

Value:

( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10),  \
  sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))

Definition at line 3106 of file i386.h.

#define ASM_OPERAND_LETTER   '#'

Definition at line 3274 of file i386.h.

#define ASM_OUTPUT_ADDR_DIFF_ELT ( FILE,
BODY,
VALUE,
REL   )     ix86_output_addr_diff_elt ((FILE), (VALUE), (REL))

Definition at line 3141 of file i386.h.

#define ASM_OUTPUT_ADDR_VEC_ELT ( FILE,
VALUE   )     ix86_output_addr_vec_elt ((FILE), (VALUE))

Definition at line 3136 of file i386.h.

#define ASM_OUTPUT_DWARF_ADDR_CONST ( FILE,
X   )     i386_dwarf_output_addr_const ((FILE), (X))

Definition at line 3153 of file i386.h.

#define ASM_OUTPUT_LABELREF ( FILE,
NAME   ) 

Value:

do {            \
    const char *xname = (NAME);     \
    if (xname[0] == '%')      \
      xname += 2;       \
    if (xname[0] == '*')      \
      xname += 1;       \
    else          \
      fputs (user_label_prefix, FILE);    \
    fputs (xname, FILE);      \
  } while (0)

Definition at line 2512 of file i386.h.

#define ASM_OUTPUT_REG_POP ( FILE,
REGNO   ) 

Value:

do {                  \
  if (TARGET_64BIT)             \
    asm_fprintf ((FILE), "\tpop{q}\t%%r%s\n",       \
     reg_names[(REGNO)] + (REX_INT_REGNO_P (REGNO) != 0));  \
  else                  \
    asm_fprintf ((FILE), "\tpop{l}\t%%e%s\n", reg_names[(REGNO)]);  \
} while (0)

Definition at line 3125 of file i386.h.

#define ASM_OUTPUT_REG_PUSH ( FILE,
REGNO   ) 

Value:

do {                  \
  if (TARGET_64BIT)             \
    asm_fprintf ((FILE), "\tpush{q}\t%%r%s\n",        \
     reg_names[(REGNO)] + (REX_INT_REGNO_P (REGNO) != 0));  \
  else                  \
    asm_fprintf ((FILE), "\tpush{l}\t%%e%s\n", reg_names[(REGNO)]); \
} while (0)

Definition at line 3113 of file i386.h.

#define ASM_PREFERRED_EH_DATA_FORMAT ( CODE,
GLOBAL   ) 

Value:

Definition at line 3097 of file i386.h.

#define ASM_SIMPLIFY_DWARF_ADDR ( X   )     i386_simplify_dwarf_addr (X)

Definition at line 3158 of file i386.h.

#define ASSEMBLER_DIALECT   (ix86_asm_dialect)

Definition at line 272 of file i386.h.

#define AT_SP ( MODE   )     (gen_rtx_MEM ((MODE), stack_pointer_rtx))

Definition at line 3276 of file i386.h.

#define BASE_REG_CLASS   GENERAL_REGS

Definition at line 1376 of file i386.h.

#define BIGGEST_ALIGNMENT   128

Definition at line 752 of file i386.h.

#define BITS_BIG_ENDIAN   0

Definition at line 698 of file i386.h.

#define BRANCH_COST   ix86_branch_cost

Definition at line 2931 of file i386.h.

#define BUILD_VA_LIST_TYPE ( VALIST   )     ((VALIST) = ix86_build_va_list ())

Definition at line 1783 of file i386.h.

#define BYTES_BIG_ENDIAN   0

Definition at line 702 of file i386.h.

#define CALL_USED_REGISTERS

Value:

/*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7*/  \
{  3, 3, 3, 0, 2, 2, 0, 3, 3,  3,  3,  3,  3,  3,  3,  3, \
/*arg,flags,fpsr,dir,frame*/          \
     3,   3,   3,  3,    3,         \
/*xmm0,xmm1,xmm2,xmm3,xmm4,xmm5,xmm6,xmm7*/     \
     3,   3,   3,   3,   3,  3,    3,   3,      \
/*mmx0,mmx1,mmx2,mmx3,mmx4,mmx5,mmx6,mmx7*/     \
     3,   3,   3,   3,   3,   3,   3,   3,      \
/*  r8,  r9, r10, r11, r12, r13, r14, r15*/     \
     3,   3,   3,   3,   1,   1,   1,   1,      \
/*xmm8,xmm9,xmm10,xmm11,xmm12,xmm13,xmm14,xmm15*/   \
     3,   3,    3,    3,    3,    3,    3,    3}    \

Definition at line 899 of file i386.h.

#define CAN_ELIMINATE ( FROM,
TO   )     ((TO) == STACK_POINTER_REGNUM ? ! frame_pointer_needed : 1)

Definition at line 1864 of file i386.h.

#define CANNOT_CHANGE_MODE_CLASS ( FROM,
TO,
CLASS   ) 

#define CASE_VECTOR_MODE   (!TARGET_64BIT || flag_pic ? SImode : DImode)

Definition at line 2536 of file i386.h.

#define CC1_CPU_SPEC   "\%{!mcpu*: \%{m386:-mcpu=i386 \%n`-m386' is deprecated. Use `-march=i386' or `-mcpu=i386' instead.\n} \%{m486:-mcpu=i486 \%n`-m486' is deprecated. Use `-march=i486' or `-mcpu=i486' instead.\n} \%{mpentium:-mcpu=pentium \%n`-mpentium' is deprecated. Use `-march=pentium' or `-mcpu=pentium' instead.\n} \%{mpentiumpro:-mcpu=pentiumpro \%n`-mpentiumpro' is deprecated. Use `-march=pentiumpro' or `-mcpu=pentiumpro' instead.\n}} \%{mintel-syntax:-masm=intel \%n`-mintel-syntax' is deprecated. Use `-masm=intel' instead.\n} \%{mno-intel-syntax:-masm=att \%n`-mno-intel-syntax' is deprecated. Use `-masm=att' instead.\n}"

Definition at line 468 of file i386.h.

#define CC1_SPEC   "%(cc1_cpu) "

Definition at line 637 of file i386.h.

#define CC_REG_P ( X   )     (REG_P (X) && CC_REGNO_P (REGNO (X)))

Definition at line 1365 of file i386.h.

#define CC_REGNO_P ( X   )     ((X) == FLAGS_REG || (X) == FPSR_REG)

Definition at line 1366 of file i386.h.

Referenced by ix86_hard_regno_mode_ok(), and s390_match_ccmode_set().

#define CLASS_LIKELY_SPILLED_P ( CLASS   ) 

Value:

(((CLASS) == AREG)              \
   || ((CLASS) == DREG)             \
   || ((CLASS) == CREG)             \
   || ((CLASS) == BREG)             \
   || ((CLASS) == AD_REGS)            \
   || ((CLASS) == SIREG)            \
   || ((CLASS) == DIREG))

Definition at line 1524 of file i386.h.

#define CLASS_MAX_NREGS ( CLASS,
MODE   ) 

Value:

(!MAYBE_INTEGER_CLASS_P (CLASS)         \
  ? (COMPLEX_MODE_P (MODE) ? 2 : 1)         \
  : ((GET_MODE_SIZE ((MODE) == TFmode ? XFmode : (MODE))    \
     + UNITS_PER_WORD - 1) / UNITS_PER_WORD))

Definition at line 1502 of file i386.h.

#define CONDITIONAL_REGISTER_USAGE

Definition at line 936 of file i386.h.

#define CONST_COSTS ( RTX,
CODE,
OUTER_CODE   ) 

Value:

case CONST_INT:           \
  case CONST:             \
  case LABEL_REF:           \
  case SYMBOL_REF:            \
    if (TARGET_64BIT && !x86_64_sign_extended_value (RTX))  \
      return 3;             \
    if (TARGET_64BIT && !x86_64_zero_extended_value (RTX))  \
      return 2;             \
    return flag_pic && SYMBOLIC_CONST (RTX) ? 1 : 0;    \
                \
  case CONST_DOUBLE:            \
    if (GET_MODE (RTX) == VOIDmode)       \
      return 0;             \
    switch (standard_80387_constant_p (RTX))      \
      {               \
      case 1: /* 0.0 */           \
  return 1;           \
      case 2: /* 1.0 */           \
  return 2;           \
      default:              \
  /* Start with (MEM (SYMBOL_REF)), since that's where  \
     it'll probably end up.  Add a penalty for size.  */  \
  return (COSTS_N_INSNS (1) + (flag_pic != 0)   \
    + (GET_MODE (RTX) == SFmode ? 0     \
       : GET_MODE (RTX) == DFmode ? 1 : 2));  \
      }

Definition at line 2630 of file i386.h.

#define CONST_DOUBLE_OK_FOR_LETTER_P ( VALUE,
 ) 

Value:

((C) == 'G' ? standard_80387_constant_p (VALUE) \
   : 0)

Definition at line 1433 of file i386.h.

#define CONST_OK_FOR_LETTER_P ( VALUE,
 ) 

Value:

((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31     \
   : (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63     \
   : (C) == 'K' ? (VALUE) >= -128 && (VALUE) <= 127   \
   : (C) == 'L' ? (VALUE) == 0xff || (VALUE) == 0xffff    \
   : (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3      \
   : (C) == 'N' ? (VALUE) >= 0 && (VALUE) <= 255    \
   : 0)

Definition at line 1419 of file i386.h.

#define CONSTANT_ADDRESS_P ( X   )     constant_address_p (X)

Definition at line 1967 of file i386.h.

#define CONSTANT_ALIGNMENT ( EXP,
ALIGN   )     ix86_constant_alignment ((EXP), (ALIGN))

Definition at line 788 of file i386.h.

#define CONVERT_HARD_REGISTER_TO_SSA_P ( REG_NO   )     ((REG_NO) == FLAGS_REG || (REG_NO) == ARG_POINTER_REGNUM)

Definition at line 1370 of file i386.h.

#define CPUMASK   (1 << ix86_cpu)

Definition at line 208 of file i386.h.

Referenced by override_options().

#define CRT_CALL_STATIC_FUNCTION ( SECTION_OP,
FUNC   ) 

Value:

asm (SECTION_OP "\n\t"        \
  "call " USER_LABEL_PREFIX #FUNC "\n"    \
  TEXT_SECTION_ASM_OP);

Definition at line 3171 of file i386.h.

#define DATA_ALIGNMENT ( TYPE,
ALIGN   )     ix86_data_alignment ((TYPE), (ALIGN))

Definition at line 802 of file i386.h.

#define DBX_REGISTER_NUMBER (  )     (TARGET_64BIT ? dbx64_register_map[(N)] : dbx_register_map[(N)])

Definition at line 3061 of file i386.h.

#define DEBUG_PRINT_REG ( X,
CODE,
FILE   ) 

Definition at line 3212 of file i386.h.

Referenced by print_rtx().

#define DEFAULT_SIGNED_CHAR   1

Definition at line 2545 of file i386.h.

#define DIRFLAG_REG   19

Definition at line 1100 of file i386.h.

#define DLL_IMPORT_EXPORT_PREFIX   '@'

#define DOUBLE_TYPE_SIZE   64

Definition at line 684 of file i386.h.

#define DWARF_FRAME_REGISTERS   17

Definition at line 863 of file i386.h.

Referenced by m32c_dwarf_frame_regnum(), uw_install_context_1(), and uw_update_context_1().

#define DWARF_FRAME_RETURN_COLUMN   (TARGET_64BIT ? 16 : 8)

Definition at line 3079 of file i386.h.

#define EH_RETURN_DATA_REGNO (  )     ((N) < 2 ? (N) : INVALID_REGNUM)

Definition at line 3085 of file i386.h.

#define EH_RETURN_STACKADJ_RTX   gen_rtx_REG (Pmode, 2)

Definition at line 3086 of file i386.h.

#define ELIMINABLE_REGS

#define EMIT_MODE_SET ( ENTITY,
MODE,
HARD_REGS_LIVE   ) 

Value:

Definition at line 3502 of file i386.h.

#define EMPTY_FIELD_BOUNDARY   BITS_PER_WORD

Definition at line 742 of file i386.h.

#define EXIT_IGNORE_STACK   1

Definition at line 1817 of file i386.h.

#define EXPAND_BUILTIN_VA_ARG ( VALIST,
TYPE   )     ix86_va_arg ((VALIST), (TYPE))

Definition at line 1791 of file i386.h.

#define EXPAND_BUILTIN_VA_START ( VALIST,
NEXTARG   )     ix86_va_start (VALIST, NEXTARG)

Definition at line 1787 of file i386.h.

#define EXTRA_CONSTRAINT ( VALUE,
 ) 

Value:

((D) == 'e' ? x86_64_sign_extended_value (VALUE)    \
   : (D) == 'Z' ? x86_64_zero_extended_value (VALUE)    \
   : (D) == 'C' ? standard_sse_constant_p (VALUE)   \
   : 0)

Definition at line 1449 of file i386.h.

#define EXTRA_SPECS

Value:

Definition at line 654 of file i386.h.

#define FIND_BASE_TERM ( X   )     ix86_find_base_term (X)

Definition at line 1999 of file i386.h.

Referenced by find_base_term().

#define FIRST_FLOAT_REG   8

#define FIRST_MMX_REG   (LAST_SSE_REG + 1)

#define FIRST_PARM_OFFSET ( FNDECL   )     0

Definition at line 1613 of file i386.h.

#define FIRST_PSEUDO_REGISTER   53

Definition at line 858 of file i386.h.

#define FIRST_REX_INT_REG   (LAST_MMX_REG + 1)

#define FIRST_REX_SSE_REG   (LAST_REX_INT_REG + 1)

Definition at line 1111 of file i386.h.

Referenced by x86_order_regs_for_local_alloc().

#define FIRST_SSE_REG   (FRAME_POINTER_REGNUM + 1)

#define FIRST_STACK_REG   FIRST_FLOAT_REG

Definition at line 1095 of file i386.h.

#define FIXED_REGISTERS

Value:

/*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7*/  \
{  0, 0, 0, 0, 0, 0, 0, 3, 0,  0,  0,  0,  0,  0,  0,  0, \
/*arg,flags,fpsr,dir,frame*/          \
    3,    3,   3,  3,    3,         \
/*xmm0,xmm1,xmm2,xmm3,xmm4,xmm5,xmm6,xmm7*/     \
     0,   0,   0,   0,   0,   0,   0,   0,      \
/*mmx0,mmx1,mmx2,mmx3,mmx4,mmx5,mmx6,mmx7*/     \
     0,   0,   0,   0,   0,   0,   0,   0,      \
/*  r8,  r9, r10, r11, r12, r13, r14, r15*/     \
     1,   1,   1,   1,   1,   1,   1,   1,      \
/*xmm8,xmm9,xmm10,xmm11,xmm12,xmm13,xmm14,xmm15*/   \
     1,   1,    1,    1,    1,    1,    1,    1}

Definition at line 873 of file i386.h.

#define FLAGS_REG   17

#define FLOAT_CLASS_P ( CLASS   )     reg_class_subset_p ((CLASS), FLOAT_REGS)

#define FLOAT_TYPE_SIZE   32

Definition at line 681 of file i386.h.

#define FORCE_PREFERRED_STACK_BOUNDARY_IN_MAIN   (ix86_preferred_stack_boundary > STACK_BOUNDARY && !TARGET_64BIT)

Definition at line 731 of file i386.h.

Referenced by expand_main_function(), and ix86_internal_arg_pointer().

#define FP_REG_P ( X   )     (REG_P (X) && FP_REGNO_P (REGNO (X)))

Definition at line 1337 of file i386.h.

#define FP_REGNO_P (  )     ((N) >= FIRST_STACK_REG && (N) <= LAST_STACK_REG)

#define FPSR_REG   18

Definition at line 1099 of file i386.h.

Referenced by ix86_fixed_condition_code_regs(), and print_reg().

#define FRAME_GROWS_DOWNWARD

Definition at line 1573 of file i386.h.

#define FRAME_POINTER_REGNUM   20

Definition at line 1089 of file i386.h.

#define FRAME_POINTER_REQUIRED   ix86_frame_pointer_required ()

Definition at line 1118 of file i386.h.

#define FUNCTION_ARG ( CUM,
MODE,
TYPE,
NAMED   )     function_arg (&(CUM), (MODE), (TYPE), (NAMED))

Definition at line 1732 of file i386.h.

#define FUNCTION_ARG_ADVANCE ( CUM,
MODE,
TYPE,
NAMED   )     function_arg_advance (&(CUM), (MODE), (TYPE), (NAMED))

Definition at line 1716 of file i386.h.

#define FUNCTION_ARG_BOUNDARY ( MODE,
TYPE   )     ix86_function_arg_boundary ((MODE), (TYPE))

Definition at line 820 of file i386.h.

#define FUNCTION_ARG_PARTIAL_NREGS ( CUM,
MODE,
TYPE,
NAMED   )     0

Definition at line 1739 of file i386.h.

#define FUNCTION_ARG_PASS_BY_REFERENCE ( CUM,
MODE,
TYPE,
NAMED   )     function_arg_pass_by_reference(&CUM, MODE, TYPE, NAMED)

Definition at line 1747 of file i386.h.

#define FUNCTION_ARG_REGNO_P (  )     ix86_function_arg_regno_p (N)

Definition at line 1687 of file i386.h.

#define FUNCTION_BOUNDARY   8

Definition at line 735 of file i386.h.

#define FUNCTION_MODE   QImode

Definition at line 2615 of file i386.h.

#define FUNCTION_OK_FOR_SIBCALL ( DECL   ) 

Value:

((DECL)               \
   && (! flag_pic || ! TREE_PUBLIC (DECL))        \
   && (! TARGET_FLOAT_RETURNS_IN_80387          \
       || (FLOAT_MODE_P (TYPE_MODE (TREE_TYPE (TREE_TYPE (DECL))))  \
           == FLOAT_MODE_P (TYPE_MODE (TREE_TYPE (TREE_TYPE (cfun->decl)))))))

Definition at line 1757 of file i386.h.

#define FUNCTION_PROFILER ( FILE,
LABELNO   )     x86_function_profiler (FILE, LABELNO)

Definition at line 1803 of file i386.h.

#define FUNCTION_VALUE ( VALTYPE,
FUNC   )     ix86_function_value (VALTYPE)

Definition at line 1668 of file i386.h.

#define FUNCTION_VALUE_REGNO_P (  )     ix86_function_value_regno_p (N)

Definition at line 1671 of file i386.h.

#define GENERAL_REG_P ( X   )     (REG_P (X) && GENERAL_REGNO_P (REGNO (X)))

Definition at line 1326 of file i386.h.

Referenced by s390_reg_clobbered_rtx(), and split_3().

#define GENERAL_REGNO_P (  )     ((N) < 8 || REX_INT_REGNO_P (N))

#define GO_IF_LEGITIMATE_ADDRESS ( MODE,
X,
ADDR   ) 

Value:

do {                  \
  if (legitimate_address_p ((MODE), (X), 0))        \
    goto ADDR;                \
} while (0)

Definition at line 1982 of file i386.h.

#define GO_IF_MODE_DEPENDENT_ADDRESS ( ADDR,
LABEL   ) 

Value:

do {              \
 if (GET_CODE (ADDR) == POST_INC      \
     || GET_CODE (ADDR) == POST_DEC)      \
   goto LABEL;            \
} while (0)

Definition at line 2046 of file i386.h.

#define GOT_SYMBOL_NAME   "_GLOBAL_OFFSET_TABLE_"

Definition at line 1153 of file i386.h.

Referenced by ix86_output_addr_diff_elt(), and output_set_got().

#define HARD_FRAME_POINTER_REGNUM   6

Definition at line 1086 of file i386.h.

#define HARD_REGNO_CALLER_SAVE_MODE ( REGNO,
NREGS,
MODE   ) 

Value:

(CC_REGNO_P (REGNO) ? VOIDmode          \
   : (MODE) == VOIDmode && (NREGS) != 1 ? VOIDmode      \
   : (MODE) == VOIDmode ? choose_hard_reg_mode ((REGNO), (NREGS)) \
   : (MODE) == HImode && !TARGET_PARTIAL_REG_STALL ? SImode   \
   : (MODE) == QImode && (REGNO) >= 4 && !TARGET_64BIT ? SImode   \
   : (MODE))

Definition at line 1068 of file i386.h.

#define HARD_REGNO_MODE_OK ( REGNO,
MODE   )     ix86_hard_regno_mode_ok ((REGNO), (MODE))

Definition at line 1043 of file i386.h.

#define HARD_REGNO_NREGS ( REGNO,
MODE   ) 

Value:

(FP_REGNO_P (REGNO) || SSE_REGNO_P (REGNO) || MMX_REGNO_P (REGNO) \
   ? (COMPLEX_MODE_P (MODE) ? 2 : 1)          \
   : ((MODE) == TFmode              \
      ? (TARGET_64BIT ? 2 : 3)            \
      : (MODE) == TCmode            \
      ? (TARGET_64BIT ? 4 : 6)            \
      : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))

Definition at line 985 of file i386.h.

#define HARD_REGNO_RENAME_OK ( SRC,
TARGET   )     ((SRC) < FIRST_STACK_REG || (SRC) > LAST_STACK_REG)

Definition at line 3514 of file i386.h.

#define HI_REGISTER_NAMES

Value:

{"ax","dx","cx","bx","si","di","bp","sp",       \
 "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","", \
 "flags","fpsr", "dirflag", "frame",          \
 "xmm0","xmm1","xmm2","xmm3","xmm4","xmm5","xmm6","xmm7",   \
 "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7" ,   \
 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",      \
 "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15"}

Definition at line 3022 of file i386.h.

#define INCOMING_FRAME_SP_OFFSET   UNITS_PER_WORD

Definition at line 3082 of file i386.h.

#define INCOMING_RETURN_ADDR_RTX   gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM))

Definition at line 3069 of file i386.h.

#define INDEX_REG_CLASS   INDEX_REGS

Definition at line 1375 of file i386.h.

#define INIT_CUMULATIVE_ARGS ( CUM,
FNTYPE,
LIBNAME,
INDIRECT   )     init_cumulative_args (&(CUM), (FNTYPE), (LIBNAME))

Definition at line 1709 of file i386.h.

#define INITIAL_ELIMINATION_OFFSET ( FROM,
TO,
OFFSET   )     ((OFFSET) = ix86_initial_elimination_offset ((FROM), (TO)))

Definition at line 1870 of file i386.h.

#define INITIALIZE_TRAMPOLINE ( TRAMP,
FNADDR,
CXT   )     x86_initialize_trampoline ((TRAMP), (FNADDR), (CXT))

Definition at line 1837 of file i386.h.

#define INT_TYPE_SIZE   32

Definition at line 680 of file i386.h.

#define INTEGER_CLASS_P ( CLASS   )     reg_class_subset_p ((CLASS), GENERAL_REGS)

Definition at line 1236 of file i386.h.

#define IS_STACK_MODE ( MODE   ) 

Value:

((MODE) == DFmode || (MODE) == SFmode || (MODE) == XFmode \
   || (MODE) == TFmode)

Definition at line 838 of file i386.h.

Referenced by get_inv_cost(), and want_to_gcse_p().

#define JUMP_TABLES_IN_TEXT_SECTION   (!TARGET_64BIT && flag_pic && !HAVE_AS_GOTOFF_IN_DATA)

Definition at line 3147 of file i386.h.

#define LAST_MMX_REG   (FIRST_MMX_REG + 7)

Definition at line 1106 of file i386.h.

Referenced by x86_order_regs_for_local_alloc().

#define LAST_REX_INT_REG   (FIRST_REX_INT_REG + 7)

Definition at line 1109 of file i386.h.

#define LAST_REX_SSE_REG   (FIRST_REX_SSE_REG + 7)

Definition at line 1112 of file i386.h.

Referenced by x86_order_regs_for_local_alloc().

#define LAST_SSE_REG   (FIRST_SSE_REG + 7)

Definition at line 1103 of file i386.h.

Referenced by x86_order_regs_for_local_alloc().

#define LAST_STACK_REG   (FIRST_FLOAT_REG + 7)

#define LEGITIMATE_CONSTANT_P ( X   )     legitimate_constant_p (X)

Definition at line 1972 of file i386.h.

#define LEGITIMATE_PIC_OPERAND_P ( X   )     legitimate_pic_operand_p (X)

Definition at line 2035 of file i386.h.

#define LEGITIMIZE_ADDRESS ( X,
OLDX,
MODE,
WIN   ) 

Value:

do {                  \
  (X) = legitimize_address ((X), (OLDX), (MODE));     \
  if (memory_address_p ((MODE), (X)))         \
    goto WIN;               \
} while (0)

Definition at line 2022 of file i386.h.

#define LIBCALL_VALUE ( MODE   )     ix86_libcall_value (MODE)

Definition at line 1677 of file i386.h.

#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE   96

Definition at line 668 of file i386.h.

#define LIMIT_RELOAD_CLASS ( MODE,
CLASS   ) 

Value:

((MODE) == QImode && !TARGET_64BIT        \
   && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS   \
       || (CLASS) == LEGACY_REGS || (CLASS) == INDEX_REGS)  \
   ? Q_REGS : (CLASS))

Definition at line 1459 of file i386.h.

#define LOCAL_ALIGNMENT ( TYPE,
ALIGN   )     ix86_local_alignment ((TYPE), (ALIGN))

Definition at line 814 of file i386.h.

Referenced by assign_stack_local_1(), assign_stack_temp_for_type(), and get_decl_align_unit().

#define LONG_DOUBLE_TYPE_SIZE   (TARGET_128BIT_LONG_DOUBLE ? 128 : 96)

Definition at line 663 of file i386.h.

#define LONG_LONG_TYPE_SIZE   64

Definition at line 685 of file i386.h.

#define LONG_TYPE_SIZE   BITS_PER_WORD

Definition at line 682 of file i386.h.

#define MACHINE_DEPENDENT_REORG ( X   )     x86_machine_dependent_reorg(X)

Definition at line 3518 of file i386.h.

#define MASK_128BIT_LONG_DOUBLE   0x00080000

Definition at line 120 of file i386.h.

Referenced by override_options().

#define MASK_3DNOW   0x00020000

Definition at line 118 of file i386.h.

Referenced by ix86_in_large_data_p(), ix86_init_mmx_sse_builtins(), and override_options().

#define MASK_3DNOW_A   0x00040000

Definition at line 119 of file i386.h.

Referenced by ix86_in_large_data_p(), ix86_init_mmx_sse_builtins(), and override_options().

#define MASK_64BIT   0x00100000

Definition at line 121 of file i386.h.

Referenced by ix86_init_mmx_sse_builtins(), override_options(), and rs6000_file_start().

#define MASK_80387   0x00000001

Definition at line 101 of file i386.h.

#define MASK_ACCUMULATE_OUTGOING_ARGS   0x00001000

Definition at line 113 of file i386.h.

Referenced by override_options().

#define MASK_ALIGN_DOUBLE   0x00000004

Definition at line 103 of file i386.h.

Referenced by override_options().

#define MASK_FLOAT_RETURNS   0x00000020

Definition at line 106 of file i386.h.

Referenced by override_options().

#define MASK_IEEE_FP   0x00000010

Definition at line 105 of file i386.h.

Referenced by override_options().

#define MASK_INLINE_ALL_STROPS   0x00000400

Definition at line 111 of file i386.h.

#define MASK_MMX   0x00002000

Definition at line 114 of file i386.h.

Referenced by ix86_init_mmx_sse_builtins(), and override_options().

#define MASK_NO_ALIGN_STROPS   0x00000200

Definition at line 110 of file i386.h.

#define MASK_NO_FANCY_MATH_387   0x00000040

Definition at line 107 of file i386.h.

Referenced by override_options().

#define MASK_NO_PUSH_ARGS   0x00000800

Definition at line 112 of file i386.h.

#define MASK_NO_RED_ZONE   0x04000000

Definition at line 126 of file i386.h.

Referenced by override_options().

#define MASK_OMIT_LEAF_FRAME_POINTER   0x080

Definition at line 108 of file i386.h.

Referenced by override_options().

#define MASK_PNI   0x00010000

Definition at line 117 of file i386.h.

Referenced by ix86_init_mmx_sse_builtins().

#define MASK_RTD   0x00000002

Definition at line 102 of file i386.h.

#define MASK_SSE   0x00004000

Definition at line 115 of file i386.h.

Referenced by ix86_init_mmx_sse_builtins(), and override_options().

#define MASK_SSE2   0x00008000

Definition at line 116 of file i386.h.

Referenced by ix86_in_large_data_p(), ix86_init_mmx_sse_builtins(), and override_options().

#define MASK_STACK_PROBE   0x00000100

Definition at line 109 of file i386.h.

#define MASK_TLS_DIRECT_SEG_REFS   0x00000008

Definition at line 104 of file i386.h.

#define MAX_BITS_PER_WORD   32

Definition at line 691 of file i386.h.

#define MAX_LONG_DOUBLE_TYPE_SIZE   128

Definition at line 664 of file i386.h.

#define MAX_LONG_TYPE_SIZE   32

Definition at line 692 of file i386.h.

#define MAX_REGS_PER_ADDRESS   2

Definition at line 1965 of file i386.h.

#define MAX_WCHAR_TYPE_SIZE   32

Definition at line 683 of file i386.h.

#define MAYBE_FLOAT_CLASS_P ( CLASS   )     reg_classes_intersect_p ((CLASS), FLOAT_REGS)

#define MAYBE_INTEGER_CLASS_P ( CLASS   )     reg_classes_intersect_p ((CLASS), GENERAL_REGS)

Definition at line 1244 of file i386.h.

#define MAYBE_MMX_CLASS_P ( CLASS   )     reg_classes_intersect_p (MMX_REGS, (CLASS))

#define MAYBE_SSE_CLASS_P ( CLASS   )     reg_classes_intersect_p (SSE_REGS, (CLASS))

#define MCOUNT_NAME   "_mcount"

Definition at line 1805 of file i386.h.

#define MD_ASM_CLOBBERS ( CLOBBERS   ) 

Value:

do {                  \
    (CLOBBERS) = tree_cons (NULL_TREE, build_string (5, "flags"), \
          (CLOBBERS));        \
    (CLOBBERS) = tree_cons (NULL_TREE, build_string (4, "fpsr"),  \
          (CLOBBERS));        \
    (CLOBBERS) = tree_cons (NULL_TREE, build_string (7, "dirflag"), \
          (CLOBBERS));        \
  } while (0)

Definition at line 1553 of file i386.h.

Referenced by expand_asm_operands().

#define MEMORY_MOVE_COST ( MODE,
CLASS,
IN   )     ix86_memory_move_cost ((MODE), (CLASS), (IN))

Definition at line 2925 of file i386.h.

#define MIN_UNITS_PER_WORD   4

Definition at line 714 of file i386.h.

#define MMX_CLASS_P ( CLASS   )     reg_class_subset_p ((CLASS), MMX_REGS)

#define MMX_REG_MODE_P ( MODE   ) 

Value:

((MODE) == V8QImode || (MODE) == V4HImode || (MODE) == V2SImode \
   || (MODE) == V2SFmode)

Definition at line 1037 of file i386.h.

#define MMX_REG_P ( XOP   )     (REG_P (XOP) && MMX_REGNO_P (REGNO (XOP)))

Definition at line 1354 of file i386.h.

Referenced by mmx_reg_operand(), print_reg(), and split_1().

#define MMX_REGNO_P (  )     ((N) >= FIRST_MMX_REG && (N) <= LAST_MMX_REG)

#define MODE_NEEDED ( ENTITY,
 ) 

Value:

(GET_CODE (I) == CALL_INSN            \
   || (GET_CODE (I) == INSN && (asm_noperands (PATTERN (I)) >= 0  \
        || GET_CODE (PATTERN (I)) == ASM_INPUT))\
   ? FP_CW_UNINITIALIZED            \
   : recog_memoized (I) < 0 || get_attr_type (I) != TYPE_FISTP    \
   ? FP_CW_ANY                \
   : FP_CW_STORED)

Definition at line 3484 of file i386.h.

#define MODE_PRIORITY_TO_MODE ( ENTITY,
 )     (N)

Definition at line 3496 of file i386.h.

#define MODES_TIEABLE_P ( MODE1,
MODE2   ) 

Value:

((MODE1) == (MODE2)           \
   || (((MODE1) == HImode || (MODE1) == SImode      \
  || ((MODE1) == QImode         \
      && (TARGET_64BIT || !TARGET_PARTIAL_REG_STALL)) \
        || ((MODE1) == DImode && TARGET_64BIT))     \
       && ((MODE2) == HImode || (MODE2) == SImode   \
     || ((MODE2) == QImode        \
         && (TARGET_64BIT || !TARGET_PARTIAL_REG_STALL))  \
     || ((MODE2) == DImode && TARGET_64BIT))))

Definition at line 1051 of file i386.h.

#define MOVE_MAX   16

Definition at line 2555 of file i386.h.

#define MOVE_MAX_PIECES   (TARGET_64BIT ? 8 : 4)

Definition at line 2560 of file i386.h.

Referenced by estimate_move_cost(), move_by_pieces(), and move_by_pieces_ninsns().

#define MOVE_RATIO   (optimize_size ? 3 : ix86_cost->move_ratio)

Definition at line 2569 of file i386.h.

#define MUST_PASS_IN_STACK ( MODE,
TYPE   ) 

Value:

((TYPE) != 0              \
   && (TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST    \
       || TREE_ADDRESSABLE (TYPE)       \
       || ((MODE) == TImode)          \
       || ((MODE) == BLKmode          \
     && ! ((TYPE) != 0          \
     && TREE_CODE (TYPE_SIZE (TYPE)) == INTEGER_CST \
     && 0 == (int_size_in_bytes (TYPE)    \
        % (PARM_BOUNDARY / BITS_PER_UNIT))) \
     && (FUNCTION_ARG_PADDING (MODE, TYPE)    \
         == (BYTES_BIG_ENDIAN ? upward : downward)))))

Definition at line 1631 of file i386.h.

#define N_REG_CLASSES   ((int) LIM_REG_CLASSES)

Definition at line 1234 of file i386.h.

#define NO_FUNCTION_CSE

Definition at line 2978 of file i386.h.

#define NO_RECURSIVE_FUNCTION_CSE

Definition at line 2984 of file i386.h.

#define NON_QI_REG_P ( X   )     (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)

Definition at line 1331 of file i386.h.

Referenced by non_q_regs_operand().

#define NON_STACK_REG_P ( XOP   )     (REG_P (XOP) && ! STACK_REG_P (XOP))

Definition at line 1361 of file i386.h.

#define NUM_MODES_FOR_MODE_SWITCHING   { FP_CW_ANY }

Definition at line 3476 of file i386.h.

#define OPTIMIZATION_OPTIONS ( LEVEL,
SIZE   )     optimization_options ((LEVEL), (SIZE))

Definition at line 462 of file i386.h.

#define OPTIMIZE_MODE_SWITCHING ( ENTITY   )     1

Definition at line 3466 of file i386.h.

#define ORDER_REGS_FOR_LOCAL_ALLOC   x86_order_regs_for_local_alloc ()

Definition at line 932 of file i386.h.

#define OUTPUT_ADDR_CONST_EXTRA ( FILE,
X,
FAIL   ) 

Value:

do {            \
  if (! output_addr_const_extra (FILE, (X)))  \
    goto FAIL;          \
} while (0);

Definition at line 3201 of file i386.h.

Referenced by output_addr_const().

#define OVERRIDE_OPTIONS   override_options ()

Definition at line 455 of file i386.h.

#define PARM_BOUNDARY   BITS_PER_WORD

Definition at line 718 of file i386.h.

#define PCC_BITFIELD_TYPE_MATTERS   1

Definition at line 830 of file i386.h.

#define PIC_OFFSET_TABLE_REGNUM

#define Pmode   (TARGET_64BIT ? DImode : SImode)

Definition at line 2610 of file i386.h.

#define PREDICATE_CODES

Definition at line 3280 of file i386.h.

#define PREFERRED_RELOAD_CLASS ( X,
CLASS   )     ix86_preferred_reload_class ((X), (CLASS))

Definition at line 1478 of file i386.h.

#define PREFERRED_STACK_BOUNDARY   ix86_preferred_stack_boundary

#define PREFETCH_BLOCK   ix86_cost->prefetch_block

#define PRINT_OPERAND ( FILE,
X,
CODE   )     print_operand ((FILE), (X), (CODE))

Definition at line 3195 of file i386.h.

#define PRINT_OPERAND_ADDRESS ( FILE,
ADDR   )     print_operand_address ((FILE), (ADDR))

Definition at line 3198 of file i386.h.

#define PRINT_OPERAND_PUNCT_VALID_P ( CODE   )     ((CODE) == '*' || (CODE) == '+' || (CODE) == '&')

Definition at line 3181 of file i386.h.

#define PRINT_REG ( X,
CODE,
FILE   )     print_reg ((X), (CODE), (FILE))

Definition at line 3192 of file i386.h.

Referenced by print_operand(), and print_operand_address().

#define PROFILE_COUNT_REGISTER   "edx"

Definition at line 1807 of file i386.h.

#define PROMOTE_MODE ( MODE,
UNSIGNEDP,
TYPE   ) 

Value:

do {              \
  if (((MODE) == HImode && TARGET_PROMOTE_HI_REGS)  \
      || ((MODE) == QImode && TARGET_PROMOTE_QI_REGS))  \
    (MODE) = SImode;          \
} while (0)

Definition at line 2600 of file i386.h.

#define PROMOTE_PROTOTYPES   1

Definition at line 2590 of file i386.h.

#define PUSH_ARGS   (TARGET_PUSH_ARGS && !ACCUMULATE_OUTGOING_ARGS)

Definition at line 1606 of file i386.h.

#define PUSH_ARGS_REVERSED   1

Definition at line 1610 of file i386.h.

#define PUSH_ROUNDING ( BYTES   ) 

Value:

(TARGET_64BIT        \
   ? (((BYTES) + 7) & (-8))  \
   : (((BYTES) + 1) & (-2)))

Definition at line 1590 of file i386.h.

#define Q_CLASS_P ( CLASS   )     reg_class_subset_p ((CLASS), Q_REGS)

Definition at line 1253 of file i386.h.

Referenced by ix86_memory_move_cost().

#define QI_HIGH_REGISTER_NAMES   {"ah", "dh", "ch", "bh", }

Definition at line 3056 of file i386.h.

#define QI_REG_P ( X   )     (REG_P (X) && REGNO (X) < 4)

Definition at line 1320 of file i386.h.

Referenced by split_1(), and split_2().

#define QI_REGISTER_NAMES   {"al", "dl", "cl", "bl", "sil", "dil", "bpl", "spl",}

Definition at line 3050 of file i386.h.

#define REAL_PIC_OFFSET_TABLE_REGNUM   3

Definition at line 1146 of file i386.h.

Referenced by ix86_expand_prologue(), ix86_output_function_epilogue(), and ix86_save_reg().

#define RED_ZONE_RESERVE   8

Definition at line 3413 of file i386.h.

Referenced by ix86_compute_frame_layout().

#define RED_ZONE_SIZE   128

Definition at line 3411 of file i386.h.

Referenced by ix86_compute_frame_layout(), and ix86_force_to_memory().

#define REG_ALLOC_ORDER

Value:

{  0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,\
   18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32,  \
   33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,  \
   48, 49, 50, 51, 52 }

Definition at line 922 of file i386.h.

#define REG_CLASS_CONTENTS

Value:

{     { 0x00,     0x0 },            \
      { 0x01,     0x0 }, { 0x02, 0x0 }, /* AREG, DREG */    \
      { 0x04,     0x0 }, { 0x08, 0x0 }, /* CREG, BREG */    \
      { 0x10,     0x0 }, { 0x20, 0x0 }, /* SIREG, DIREG */    \
      { 0x03,     0x0 },    /* AD_REGS */     \
      { 0x0f,     0x0 },    /* Q_REGS */      \
  { 0x1100f0,  0x1fe0 },    /* NON_Q_REGS */    \
      { 0x7f,  0x1fe0 },    /* INDEX_REGS */    \
  { 0x1100ff,  0x0 },     /* LEGACY_REGS */   \
  { 0x1100ff,  0x1fe0 },    /* GENERAL_REGS */    \
     { 0x100,     0x0 }, { 0x0200, 0x0 },/* FP_TOP_REG, FP_SECOND_REG */\
    { 0xff00,     0x0 },    /* FLOAT_REGS */    \
{ 0x1fe00000,0x1fe000 },    /* SSE_REGS */      \
{ 0xe0000000,    0x1f },    /* MMX_REGS */      \
{ 0x1fe00100,0x1fe000 },    /* FP_TOP_SSE_REG */    \
{ 0x1fe00200,0x1fe000 },    /* FP_SECOND_SSE_REG */   \
{ 0x1fe0ff00,0x1fe000 },    /* FLOAT_SSE_REGS */    \
   { 0x1ffff,  0x1fe0 },    /* FLOAT_INT_REGS */    \
{ 0x1fe100ff,0x1fffe0 },    /* INT_SSE_REGS */    \
{ 0x1fe1ffff,0x1fffe0 },    /* FLOAT_INT_SSE_REGS */  \
{ 0xffffffff,0x1fffff }             \
}

Definition at line 1283 of file i386.h.

#define REG_CLASS_FROM_LETTER (  ) 

Value:

((C) == 'r' ? GENERAL_REGS :          \
   (C) == 'R' ? LEGACY_REGS :         \
   (C) == 'q' ? TARGET_64BIT ? GENERAL_REGS : Q_REGS :    \
   (C) == 'Q' ? Q_REGS :          \
   (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387  \
     ? FLOAT_REGS         \
     : NO_REGS) :         \
   (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387  \
     ? FP_TOP_REG         \
     : NO_REGS) :         \
   (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387  \
     ? FP_SECOND_REG        \
     : NO_REGS) :         \
   (C) == 'a' ? AREG :            \
   (C) == 'b' ? BREG :            \
   (C) == 'c' ? CREG :            \
   (C) == 'd' ? DREG :            \
   (C) == 'x' ? TARGET_SSE ? SSE_REGS : NO_REGS :   \
   (C) == 'Y' ? TARGET_SSE2? SSE_REGS : NO_REGS :   \
   (C) == 'y' ? TARGET_MMX ? MMX_REGS : NO_REGS :   \
   (C) == 'A' ? AD_REGS :         \
   (C) == 'D' ? DIREG :           \
   (C) == 'S' ? SIREG : NO_REGS)

Definition at line 1380 of file i386.h.

#define REG_CLASS_NAMES

Value:

{  "NO_REGS",       \
   "AREG", "DREG", "CREG", "BREG",  \
   "SIREG", "DIREG",      \
   "AD_REGS",       \
   "Q_REGS", "NON_Q_REGS",    \
   "INDEX_REGS",      \
   "LEGACY_REGS",     \
   "GENERAL_REGS",      \
   "FP_TOP_REG", "FP_SECOND_REG", \
   "FLOAT_REGS",      \
   "SSE_REGS",        \
   "MMX_REGS",        \
   "FP_TOP_SSE_REGS",     \
   "FP_SECOND_SSE_REGS",    \
   "FLOAT_SSE_REGS",      \
   "FLOAT_INT_REGS",      \
   "INT_SSE_REGS",      \
   "FLOAT_INT_SSE_REGS",    \
   "ALL_REGS" }

Definition at line 1258 of file i386.h.

#define REG_OK_FOR_BASE_NONSTRICT_P ( X   ) 

#define REG_OK_FOR_BASE_P ( X   )     REG_OK_FOR_BASE_NONSTRICT_P (X)

Definition at line 1947 of file i386.h.

#define REG_OK_FOR_BASE_STRICT_P ( X   )     REGNO_OK_FOR_BASE_P (REGNO (X))

Definition at line 1943 of file i386.h.

#define REG_OK_FOR_INDEX_NONSTRICT_P ( X   ) 

Value:

Definition at line 1927 of file i386.h.

Referenced by legitimate_address_p().

#define REG_OK_FOR_INDEX_P ( X   )     REG_OK_FOR_INDEX_NONSTRICT_P (X)

Definition at line 1946 of file i386.h.

#define REG_OK_FOR_INDEX_STRICT_P ( X   )     REGNO_OK_FOR_INDEX_P (REGNO (X))

#define REG_PARM_STACK_SPACE ( FNDECL   )     0

Definition at line 1624 of file i386.h.

#define REGISTER_MOVE_COST ( MODE,
CLASS1,
CLASS2   )     ix86_register_move_cost ((MODE), (CLASS1), (CLASS2))

Definition at line 2914 of file i386.h.

#define REGISTER_NAMES   HI_REGISTER_NAMES

Definition at line 3031 of file i386.h.

#define REGNO_OK_FOR_BASE_P ( REGNO   ) 

Value:

Definition at line 1897 of file i386.h.

#define REGNO_OK_FOR_DIREG_P ( REGNO   )     ((REGNO) == 5 || reg_renumber[(REGNO)] == 5)

Definition at line 1909 of file i386.h.

#define REGNO_OK_FOR_INDEX_P ( REGNO   ) 

Value:

Definition at line 1889 of file i386.h.

#define REGNO_OK_FOR_SIREG_P ( REGNO   )     ((REGNO) == 4 || reg_renumber[(REGNO)] == 4)

Definition at line 1907 of file i386.h.

#define REGNO_REG_CLASS ( REGNO   )     (regclass_map[REGNO])

Definition at line 1312 of file i386.h.

#define REGPARM_MAX   (TARGET_64BIT ? 6 : 3)

#define RET   return ""

Definition at line 3275 of file i386.h.

Referenced by _type_f(), do_f4f8_mp(), do_fio64_mp(), f_s(), output_681(), and output_854().

#define RETURN_ADDR_RTX ( COUNT,
FRAME   ) 

Value:

Definition at line 3073 of file i386.h.

#define RETURN_IN_MEMORY ( TYPE   )     ix86_return_in_memory (TYPE)

Definition at line 1181 of file i386.h.

#define RETURN_POPS_ARGS ( FUNDECL,
FUNTYPE,
SIZE   )     ix86_return_pops_args ((FUNDECL), (FUNTYPE), (SIZE))

Definition at line 1661 of file i386.h.

#define REVERSE_CONDITION ( CODE,
MODE   ) 

Value:

((MODE) != CCFPmode && (MODE) != CCFPUmode ? reverse_condition (CODE) \
   : reverse_condition_maybe_unordered (CODE))

Definition at line 3004 of file i386.h.

Referenced by gen_split_1345(), gen_split_1346(), gen_split_1366(), and reversed_comparison_code_parts().

#define REVERSIBLE_CC_MODE ( MODE   )     1

Definition at line 3000 of file i386.h.

#define REWRITE_ADDRESS ( X   )     rewrite_address (X)

Definition at line 2029 of file i386.h.

#define REX_INT_REG_P ( X   )     (REG_P (X) && REX_INT_REGNO_P (REGNO (X)))

Definition at line 1335 of file i386.h.

Referenced by print_reg().

#define REX_INT_REGNO_P (  )     ((N) >= FIRST_REX_INT_REG && (N) <= LAST_REX_INT_REG)

Definition at line 1334 of file i386.h.

Referenced by extended_reg_mentioned_1().

#define RTX_COSTS ( X,
CODE,
OUTER_CODE   ) 

Definition at line 2671 of file i386.h.

#define SECONDARY_MEMORY_NEEDED ( CLASS1,
CLASS2,
MODE   )     ix86_secondary_memory_needed ((CLASS1), (CLASS2), (MODE), 1)

Definition at line 1483 of file i386.h.

#define SECONDARY_OUTPUT_RELOAD_CLASS ( CLASS,
MODE,
OUT   ) 

Value:

(((CLASS) == GENERAL_REGS || (CLASS) == LEGACY_REGS     \
    || (CLASS) == INDEX_REGS) && !TARGET_64BIT && (MODE) == QImode  \
   ? Q_REGS : NO_REGS)

Definition at line 1490 of file i386.h.

#define SELECT_CC_MODE ( OP,
X,
 )     ix86_cc_mode ((OP), (X), (Y))

Definition at line 2995 of file i386.h.

 
#define SETUP_FRAME_ADDRESSES (  )     ix86_setup_frame_addresses ()

Definition at line 1127 of file i386.h.

Referenced by expand_builtin_return_addr(), and expand_builtin_unwind_init().

#define SETUP_INCOMING_VARARGS ( CUM,
MODE,
TYPE,
PRETEND_SIZE,
NO_RTL   ) 

Value:

ix86_setup_incoming_varargs (&(CUM), (MODE), (TYPE), &(PRETEND_SIZE), \
             (NO_RTL))

Definition at line 1778 of file i386.h.

#define SHORT_TYPE_SIZE   16

Definition at line 679 of file i386.h.

#define SIMULTANEOUS_PREFETCHES   ix86_cost->simultaneous_prefetches

#define SLOW_BYTE_ACCESS   0

Definition at line 2947 of file i386.h.

#define SLOW_SHORT_ACCESS   0

Definition at line 2950 of file i386.h.

#define SMALL_REGISTER_CLASSES   1

Definition at line 1318 of file i386.h.

#define SPECIAL_MODE_PREDICATES   "ext_register_operand",

Definition at line 3356 of file i386.h.

#define SSE_CLASS_P ( CLASS   )     reg_class_subset_p ((CLASS), SSE_REGS)

#define SSE_FLOAT_MODE_P ( MODE   )     ((TARGET_SSE && (MODE) == SFmode) || (TARGET_SSE2 && (MODE) == DFmode))

#define SSE_REG_MODE_P ( MODE   ) 

Value:

((MODE) == TImode || (MODE) == V16QImode        \
   || (MODE) == V8HImode || (MODE) == V2DFmode || (MODE) == V2DImode  \
   || (MODE) == V4SFmode || (MODE) == V4SImode)

Definition at line 1031 of file i386.h.

Referenced by contains_128bit_aligned_vector_p(), and ix86_function_arg_boundary().

#define SSE_REG_P (  )     (REG_P (N) && SSE_REGNO_P (REGNO (N)))

#define SSE_REGNO (  )     ((N) < 8 ? FIRST_SSE_REG + (N) : FIRST_REX_SSE_REG + (N) - 8)

Definition at line 1346 of file i386.h.

Referenced by construct_container(), and output_854().

#define SSE_REGNO_P (  ) 

Value:

(((N) >= FIRST_SSE_REG && (N) <= LAST_SSE_REG) \
   || ((N) >= FIRST_REX_SSE_REG && (N) <= LAST_REX_SSE_REG))

Definition at line 1342 of file i386.h.

Referenced by ix86_function_arg_regno_p(), ix86_gimplify_va_arg(), ix86_hard_regno_mode_ok(), and ix86_va_arg().

#define SSE_REGPARM_MAX   (TARGET_64BIT ? 8 : 0)

#define STACK_BOUNDARY   BITS_PER_WORD

Definition at line 721 of file i386.h.

#define STACK_GROWS_DOWNWARD

Definition at line 1567 of file i386.h.

#define STACK_POINTER_REGNUM   7

Definition at line 1083 of file i386.h.

#define STACK_REG_P ( XOP   ) 

#define STACK_REGS

#define STACK_TOP_P ( XOP   )     (REG_P (XOP) && REGNO (XOP) == FIRST_STACK_REG)

#define STARTING_FRAME_OFFSET   0

Definition at line 1579 of file i386.h.

#define STATIC_CHAIN_REGNUM   (TARGET_64BIT ? FIRST_REX_INT_REG + 10 - 8 : 2)

Definition at line 1135 of file i386.h.

#define STORE_FLAG_VALUE   1

Definition at line 2585 of file i386.h.

#define STRICT_ALIGNMENT   0

Definition at line 825 of file i386.h.

#define STRUCT_VALUE   0

Definition at line 1162 of file i386.h.

#define STRUCT_VALUE_INCOMING   0

Definition at line 1158 of file i386.h.

#define SUBTARGET_FRAME_POINTER_REQUIRED   0

Definition at line 1123 of file i386.h.

Referenced by ix86_frame_pointer_required().

#define SUBTARGET_OPTIONS

Definition at line 459 of file i386.h.

#define SUBTARGET_SWITCHES

Definition at line 458 of file i386.h.

#define SYMBOLIC_CONST ( X   ) 

#define TARGET_128BIT_LONG_DOUBLE   (target_flags & MASK_128BIT_LONG_DOUBLE)

Definition at line 161 of file i386.h.

Referenced by ix86_split_long_move().

#define TARGET_386   (ix86_cpu == PROCESSOR_I386)

Definition at line 200 of file i386.h.

#define TARGET_3DNOW   ((target_flags & MASK_3DNOW) != 0)

#define TARGET_3DNOW_A   ((target_flags & MASK_3DNOW_A) != 0)

#define TARGET_486   (ix86_cpu == PROCESSOR_I486)

Definition at line 201 of file i386.h.

#define TARGET_64BIT   0

Definition at line 192 of file i386.h.

Referenced by adddi3_operand(), asm_preferred_eh_data_format(), attr_length_call(), attr_length_indirect_call(), attr_length_millicode_call(), build_binary_op(), compute_clrmem_length(), compute_frame_size(), compute_movmem_length(), constant_address_p(), Create_TY_For_Tree(), double_memory_operand(), eligible_for_annul_false(), eligible_for_delay(), emit_hpdiv_const(), emit_i387_cw_initialization(), emit_move_sequence(), ext_register_operand(), function_arg(), function_arg_advance(), function_arg_padding(), function_arg_partial_nregs(), function_arg_pass_by_reference(), function_value(), gen_adddi3(), gen_allocate_stack_worker(), gen_ashldi3(), gen_ashrdi3(), gen_cmpstrsi(), gen_eh_return(), gen_extendsidi2(), gen_extv(), gen_extzv(), gen_fix_truncdfdi2(), gen_fix_truncsfdi2(), gen_insv(), gen_int_relational(), gen_lshrdi3(), gen_movti(), gen_mulsidi3(), gen_negdi2(), gen_pro_epilogue_adjust_stack(), gen_reload_outsi(), gen_seq(), gen_sge(), gen_sgeu(), gen_sgt(), gen_sgtu(), gen_sle(), gen_sleu(), gen_slt(), gen_sltu(), gen_smulsi3_highpart(), gen_sne(), gen_split_1258(), gen_split_1260(), gen_split_1277(), gen_split_1279(), gen_strmovhi(), gen_strmovqi(), gen_strmovsi(), gen_strsethi(), gen_strsetqi(), gen_strsetsi(), gen_subdi3(), gen_tablejump(), gen_umulsi3_highpart(), gen_umulsidi3(), gen_zero_extendsidi2(), general_s_operand(), get_attr_can_delay(), get_pc_thunk_name(), hppa_builtin_saveregs(), hppa_expand_epilogue(), hppa_expand_prologue(), hppa_gimplify_va_arg_expr(), hppa_profile_hook(), hppa_va_arg(), i386_dwarf_output_addr_const(), i386_simplify_dwarf_addr(), i386_solaris_elf_named_section(), init_cumulative_args(), Initialize_C_Int_Model(), insn_default_length(), ix86_build_builtin_va_list(), ix86_build_va_list(), ix86_compute_frame_layout(), ix86_data_alignment(), ix86_decompose_address(), ix86_delegitimize_address(), ix86_emit_restore_regs_using_mov(), ix86_encode_section_info(), ix86_expand_branch(), ix86_expand_builtin(), ix86_expand_call(), ix86_expand_carry_flag_compare(), ix86_expand_clrmem(), ix86_expand_clrstr(), ix86_expand_epilogue(), ix86_expand_int_movcc(), ix86_expand_move(), ix86_expand_movmem(), ix86_expand_movstr(), ix86_expand_prologue(), ix86_expand_setcc(), ix86_expand_strlen(), ix86_expand_strlensi_unroll_1(), ix86_find_base_term(), ix86_force_to_memory(), ix86_free_from_memory(), ix86_function_arg_boundary(), ix86_function_arg_regno_p(), ix86_function_ok_for_sibcall(), ix86_function_regparm(), ix86_function_sseregparm(), ix86_function_value(), ix86_function_value_regno_p(), ix86_gimplify_va_arg(), ix86_handle_cconv_attribute(), ix86_handle_cdecl_attribute(), ix86_hard_regno_mode_ok(), ix86_init_mmx_sse_builtins(), ix86_libcall_value(), ix86_local_alignment(), ix86_must_pass_in_stack(), ix86_output_addr_diff_elt(), ix86_output_addr_vec_elt(), ix86_pass_by_reference(), ix86_return_in_memory(), ix86_return_pops_args(), ix86_rtx_costs(), ix86_setup_incoming_varargs(), ix86_split_long_move(), ix86_split_to_parts(), ix86_stack_protect_fail(), ix86_tieable_integer_mode_p(), ix86_va_arg(), ix86_va_start(), ix86_value_regno(), legitimate_address_p(), legitimate_constant_p(), legitimate_la_operand_p(), legitimate_pic_address_disp_p(), legitimate_pic_operand_p(), legitimate_reload_constant_p(), legitimize_la_operand(), legitimize_pic_address(), legitimize_tls_address(), load_reg(), machopic_select_rtx_section(), machopic_select_section(), maybe_get_pool_constant(), mips16_fp_args(), mips_arg_info(), mips_asm_file_start(), mips_assemble_integer(), mips_file_start(), mips_get_unaligned_mem(), mips_legitimate_address_p(), mips_mode_rep_extended(), mips_move_1word(), mips_move_2words(), mips_parse_cpu(), mips_rtx_costs(), mips_scalar_mode_supported_p(), mips_split_64bit_move_p(), mips_va_arg(), mips_va_start(), mips_valid_pointer_mode(), movdi_operand(), output_100(), output_101(), output_105(), output_106(), output_109(), output_114(), output_92(), output_97(), output_99(), output_addr_const_extra(), output_arg_descriptor(), output_block_clear(), output_block_move(), output_call(), output_deferred_plabels(), output_indirect_call(), output_lbranch(), output_mi_thunk(), output_millicode_call(), output_pic_addr_const(), output_toc(), override_options(), pa_arg_partial_bytes(), pa_asm_output_aligned_common(), pa_asm_output_mi_thunk(), pa_fallback_frame_state(), pa_file_start_level(), pa_function_ok_for_sibcall(), pa_pass_by_reference(), pa_return_in_memory(), Parameter_Size(), peephole(), peephole2_1(), pic_symbolic_operand(), preferred_la_operand_p(), print_operand(), print_operand_address(), print_reg(), pro_epilogue_adjust_stack(), Process_Cc1_Command_Line(), recog(), recog_1(), recog_11(), recog_12(), recog_15(), recog_17(), recog_2(), recog_21(), recog_22(), recog_23(), recog_25(), recog_26(), recog_27(), recog_28(), recog_3(), recog_31(), recog_32(), recog_33(), recog_34(), recog_35(), recog_36(), recog_37(), recog_38(), recog_4(), recog_5(), recog_6(), recog_7(), recog_8(), recog_9(), restore_gprs(), return_addr_rtx(), rs6000_conditional_register_usage(), rs6000_generate_compare(), rs6000_handle_altivec_attribute(), rs6000_handle_option(), rs6000_legitimize_tls_address(), rs6000_must_pass_in_stack(), rs6000_override_options(), rs6000_parse_alignment_option(), s390_chunkify_pool(), s390_conditional_register_usage(), s390_decompose_address(), s390_dump_pool(), s390_emit_call(), s390_emit_epilogue(), s390_emit_prologue(), s390_expand_builtin(), s390_frame_area(), s390_frame_info(), s390_function_arg(), s390_function_ok_for_sibcall(), s390_function_profiler(), s390_gimplify_va_arg(), s390_hard_regno_mode_ok(), s390_initialize_trampoline(), s390_load_address(), s390_output_constant_pool(), s390_output_mi_thunk(), s390_preferred_reload_class(), s390_register_info(), s390_rtx_costs(), s390_secondary_output_reload_class(), s390_split_access_reg(), s390_split_branches(), s390_trampoline_template(), s390_va_arg(), s390_valid_pointer_mode(), save_fprs_p(), save_gprs(), save_restore_insns(), se_arith_operand(), se_nonimmediate_operand(), se_nonmemory_operand(), se_reg_or_0_operand(), se_register_operand(), se_uns_arith_operand(), set_reg_plus_d(), Setup_Entry_For_EH(), shiftdi_operand(), sparc_override_options(), split_1(), split_2(), split_3(), split_4(), split_insns(), store_reg(), WFE_Array_Expr(), WFE_Expand_Expr(), WFE_Init(), WGEN_Array_Expr(), WGEN_Expand_Expr(), WGEN_Init(), x86_64_general_operand(), x86_64_immediate_operand(), x86_64_movabs_operand(), x86_64_nonmemory_operand(), x86_64_szext_general_operand(), x86_64_szext_nonmemory_operand(), x86_can_output_mi_thunk(), x86_field_alignment(), x86_function_profiler(), x86_initialize_trampoline(), x86_output_mi_thunk(), and x86_this_parameter().

#define TARGET_64BIT_DEFAULT   0

Definition at line 388 of file i386.h.

#define TARGET_80387   (target_flags & MASK_80387)

#define TARGET_ACCUMULATE_OUTGOING_ARGS   (target_flags & MASK_ACCUMULATE_OUTGOING_ARGS)

Definition at line 145 of file i386.h.

#define TARGET_ADD_ESP_4   (x86_add_esp_4 & CPUMASK)

Definition at line 254 of file i386.h.

Referenced by peephole2_2().

#define TARGET_ADD_ESP_8   (x86_add_esp_8 & CPUMASK)

Definition at line 255 of file i386.h.

Referenced by peephole2_2().

#define TARGET_ALIGN_DOUBLE   (target_flags & MASK_ALIGN_DOUBLE)

Definition at line 139 of file i386.h.

Referenced by dump_table(), override_options(), and x86_field_alignment().

#define TARGET_ALIGN_STRINGOPS   (!(target_flags & MASK_NO_ALIGN_STROPS))

#define TARGET_ATHLON   (ix86_cpu == PROCESSOR_ATHLON)

#define TARGET_BRANCH_PREDICTION_HINTS   (x86_branch_hints & CPUMASK)

Definition at line 235 of file i386.h.

Referenced by print_operand().

#define TARGET_CMOVE   ((x86_cmove & (1 << ix86_arch)) || TARGET_SSE)

 
#define TARGET_CPU_CPP_BUILTINS (  ) 

Definition at line 485 of file i386.h.

Referenced by c_cpp_builtins(), and cb_register_builtins().

#define TARGET_CPU_DEFAULT   0

Definition at line 97 of file i386.h.

#define TARGET_CPU_DEFAULT_athlon   11

Definition at line 628 of file i386.h.

#define TARGET_CPU_DEFAULT_athlon_sse   12

Definition at line 629 of file i386.h.

#define TARGET_CPU_DEFAULT_i386   0

Definition at line 617 of file i386.h.

#define TARGET_CPU_DEFAULT_i486   1

Definition at line 618 of file i386.h.

#define TARGET_CPU_DEFAULT_k6   8

Definition at line 625 of file i386.h.

#define TARGET_CPU_DEFAULT_k6_2   9

Definition at line 626 of file i386.h.

#define TARGET_CPU_DEFAULT_k6_3   10

Definition at line 627 of file i386.h.

#define TARGET_CPU_DEFAULT_NAMES

Value:

{"i386", "i486", "pentium", "pentium-mmx",\
          "pentiumpro", "pentium2", "pentium3", \
          "pentium4", "k6", "k6-2", "k6-3",\
          "athlon", "athlon-4"}

Definition at line 631 of file i386.h.

Referenced by override_options().

#define TARGET_CPU_DEFAULT_pentium   2

Definition at line 619 of file i386.h.

#define TARGET_CPU_DEFAULT_pentium2   5

Definition at line 622 of file i386.h.

#define TARGET_CPU_DEFAULT_pentium3   6

Definition at line 623 of file i386.h.

#define TARGET_CPU_DEFAULT_pentium4   7

Definition at line 624 of file i386.h.

#define TARGET_CPU_DEFAULT_pentium_mmx   3

Definition at line 620 of file i386.h.

#define TARGET_CPU_DEFAULT_pentiumpro   4

Definition at line 621 of file i386.h.

#define TARGET_DEBUG_ADDR   (ix86_debug_addr_string != 0)

Definition at line 172 of file i386.h.

#define TARGET_DEBUG_ARG   (ix86_debug_arg_string != 0)

Definition at line 175 of file i386.h.

#define TARGET_DECOMPOSE_LEA   (x86_decompose_lea & CPUMASK)

Definition at line 263 of file i386.h.

#define TARGET_DEEP_BRANCH_PREDICTION   (x86_deep_branch & CPUMASK)

Definition at line 234 of file i386.h.

#define TARGET_DEFAULT   0

Definition at line 397 of file i386.h.

#define TARGET_DOUBLE_WITH_ADD   (x86_double_with_add & CPUMASK)

#define TARGET_ENCODE_SECTION_INFO   ix86_encode_section_info

Definition at line 2509 of file i386.h.

#define TARGET_EPILOGUE_USING_MOVE   (x86_epilogue_using_move & CPUMASK)

Definition at line 262 of file i386.h.

Referenced by ix86_expand_epilogue().

#define TARGET_FAST_PREFIX   (x86_fast_prefix & CPUMASK)

Definition at line 248 of file i386.h.

Referenced by ix86_expand_int_movcc(), split_1(), and split_2().

#define TARGET_FLOAT_RETURNS_IN_80387   (target_flags & MASK_FLOAT_RETURNS)

Definition at line 156 of file i386.h.

Referenced by gen_untyped_call(), ix86_function_value_regno_p(), and ix86_value_regno().

#define TARGET_FLT_EVAL_METHOD   (TARGET_MIX_SSE_I387 ? -1 : TARGET_SSE_MATH ? 1 : 2)

Definition at line 676 of file i386.h.

Referenced by c_cpp_builtins(), and cb_register_builtins().

#define TARGET_GNU_TLS   (ix86_tls_dialect == TLS_DIALECT_GNU)

Definition at line 286 of file i386.h.

Referenced by legitimize_tls_address(), recog_2(), recog_35(), and tls_call_delay().

#define TARGET_HIMODE_MATH   (x86_himode_math & CPUMASK)

#define TARGET_IEEE_FP   (target_flags & MASK_IEEE_FP)

#define TARGET_INLINE_ALL_STRINGOPS   (target_flags & MASK_INLINE_ALL_STROPS)

#define TARGET_INTEGER_DFMODE_MOVES   (x86_integer_DFmode_moves & CPUMASK)

Definition at line 258 of file i386.h.

Referenced by recog_21().

#define TARGET_K6   (ix86_cpu == PROCESSOR_K6)

Definition at line 204 of file i386.h.

Referenced by ix86_address_cost(), and peephole2_1().

#define TARGET_MACHO   0

Definition at line 402 of file i386.h.

#define TARGET_MEMORY_MISMATCH_STALL   (x86_memory_mismatch_stall & CPUMASK)

Definition at line 260 of file i386.h.

#define TARGET_MIX_SSE_I387

Value:

Definition at line 278 of file i386.h.

Referenced by ix86_preferred_reload_class(), recog_21(), recog_7(), and recog_8().

#define TARGET_MMX   ((target_flags & MASK_MMX) != 0)

#define TARGET_MOVX   (x86_movx & CPUMASK)

#define TARGET_NO_FANCY_MATH_387   (target_flags & MASK_NO_FANCY_MATH_387)

Definition at line 165 of file i386.h.

Referenced by recog_10(), recog_7(), recog_8(), and recog_9().

#define TARGET_OMIT_LEAF_FRAME_POINTER   (target_flags & MASK_OMIT_LEAF_FRAME_POINTER)

#define TARGET_OPTIONS

Definition at line 413 of file i386.h.

#define TARGET_PARTIAL_REG_DEPENDENCY   (x86_partial_reg_dependency & CPUMASK)

Definition at line 259 of file i386.h.

Referenced by get_attr_mode(), output_89(), output_93(), and output_94().

#define TARGET_PARTIAL_REG_STALL   (x86_partial_reg_stall & CPUMASK)

#define TARGET_PENTIUM   (ix86_cpu == PROCESSOR_PENTIUM)

#define TARGET_PENTIUM4   (ix86_cpu == PROCESSOR_PENTIUM4)

Definition at line 206 of file i386.h.

Referenced by incdec_operand().

#define TARGET_PENTIUMPRO   (ix86_cpu == PROCESSOR_PENTIUMPRO)

#define TARGET_PNI   ((target_flags & MASK_PNI) != 0)

Definition at line 276 of file i386.h.

Referenced by override_options(), recog(), and recog_21().

#define TARGET_PREFETCH_SSE   (x86_prefetch_sse)

Definition at line 264 of file i386.h.

Referenced by gen_prefetch(), and recog().

#define TARGET_PROLOGUE_USING_MOVE   (x86_prologue_using_move & CPUMASK)

Definition at line 261 of file i386.h.

Referenced by ix86_compute_frame_layout(), and ix86_expand_prologue().

#define TARGET_PROMOTE_HI_REGS   (x86_promote_hi_regs & CPUMASK)

Definition at line 253 of file i386.h.

#define TARGET_PROMOTE_QI_REGS   (x86_promote_qi_regs & CPUMASK)

Definition at line 252 of file i386.h.

#define TARGET_PROMOTE_QImode   (x86_promote_QImode & CPUMASK)

Definition at line 247 of file i386.h.

Referenced by split_1(), and split_2().

#define TARGET_PTRMEMFUNC_VBIT_LOCATION   ptrmemfunc_vbit_in_pfn

Definition at line 738 of file i386.h.

#define TARGET_PUSH_ARGS   (!(target_flags & MASK_NO_PUSH_ARGS))

Definition at line 142 of file i386.h.

#define TARGET_PUSH_MEMORY   (x86_push_memory & CPUMASK)

Definition at line 227 of file i386.h.

Referenced by peephole2_1().

#define TARGET_QIMODE_MATH   (x86_qimode_math & CPUMASK)

#define TARGET_READ_MODIFY   (x86_read_modify & CPUMASK)

Definition at line 246 of file i386.h.

Referenced by peephole2_2().

#define TARGET_READ_MODIFY_WRITE   (x86_read_modify_write & CPUMASK)

Definition at line 245 of file i386.h.

Referenced by peephole2_2().

#define TARGET_RED_ZONE   (!(target_flags & MASK_NO_RED_ZONE))

#define TARGET_RTD   (target_flags & MASK_RTD)

#define TARGET_SHIFT1   (x86_shift1 & CPUMASK)

#define TARGET_SINGLE_STRINGOP   (x86_single_stringop & CPUMASK)

#define TARGET_SPLIT_LONG_MOVES   (x86_split_long_moves & CPUMASK)

Definition at line 244 of file i386.h.

Referenced by peephole2_1().

#define TARGET_SSE   ((target_flags & MASK_SSE) != 0)

#define TARGET_SSE2   ((target_flags & MASK_SSE2) != 0)

#define TARGET_SSE_MATH   ((ix86_fpmath & FPMATH_SSE) != 0)

#define TARGET_STACK_PROBE   (target_flags & MASK_STACK_PROBE)

Definition at line 267 of file i386.h.

Referenced by ix86_expand_prologue(), and recog_38().

#define TARGET_STRIP_NAME_ENCODING   ix86_strip_name_encoding

Definition at line 2510 of file i386.h.

#define TARGET_SUB_ESP_4   (x86_sub_esp_4 & CPUMASK)

Definition at line 256 of file i386.h.

Referenced by peephole2_2().

#define TARGET_SUB_ESP_8   (x86_sub_esp_8 & CPUMASK)

Definition at line 257 of file i386.h.

Referenced by peephole2_2().

#define TARGET_SUN_TLS   (ix86_tls_dialect == TLS_DIALECT_SUN)

Definition at line 287 of file i386.h.

Referenced by legitimize_tls_address(), recog_2(), and recog_35().

#define TARGET_SWITCHES

Definition at line 294 of file i386.h.

#define TARGET_TLS_DIRECT_SEG_REFS   (target_flags & MASK_TLS_DIRECT_SEG_REFS)

Definition at line 198 of file i386.h.

Referenced by ix86_decompose_address(), and legitimize_tls_address().

#define TARGET_TLS_DIRECT_SEG_REFS_DEFAULT   0

Definition at line 391 of file i386.h.

#define TARGET_UNROLL_STRLEN   (x86_unroll_strlen & CPUMASK)

Definition at line 230 of file i386.h.

Referenced by ix86_expand_strlen().

#define TARGET_USE_BIT_TEST   (x86_use_bit_test & CPUMASK)

Definition at line 229 of file i386.h.

#define TARGET_USE_CLTD   (x86_use_cltd & CPUMASK)

#define TARGET_USE_FIOP   (x86_use_fiop & CPUMASK)

Definition at line 241 of file i386.h.

Referenced by recog_10(), recog_7(), recog_8(), and recog_9().

#define TARGET_USE_LEAVE   (x86_use_leave & CPUMASK)

Definition at line 226 of file i386.h.

Referenced by ix86_expand_epilogue().

#define TARGET_USE_LOOP   (x86_use_loop & CPUMASK)

Definition at line 240 of file i386.h.

Referenced by recog_31(), recog_36(), and split_4().

#define TARGET_USE_MOV0   (x86_use_mov0 & CPUMASK)

Definition at line 242 of file i386.h.

Referenced by ix86_expand_clear(), peephole2_1(), recog_21(), recog_23(), recog_3(), recog_31(), and recog_6().

#define TARGET_USE_SAHF   ((x86_use_sahf & CPUMASK) && !TARGET_64BIT)

Definition at line 237 of file i386.h.

Referenced by ix86_emit_fp_unordered_jump(), and ix86_fp_comparison_sahf_cost().

#define TARGET_ZERO_EXTEND_WITH_AND   (x86_zero_extend_with_and & CPUMASK)

Definition at line 228 of file i386.h.

Referenced by gen_zero_extendhisi2(), ix86_rtx_costs(), recog_1(), recog_2(), recog_23(), recog_24(), and split_2().

#define TOPLEVEL_COSTS_N_INSNS (  )     do { total = COSTS_N_INSNS (N); goto egress_rtx_costs; } while (0)

Definition at line 2658 of file i386.h.

#define TRAMPOLINE_SIZE   (TARGET_64BIT ? 23 : 10)

Definition at line 1831 of file i386.h.

#define TRULY_NOOP_TRUNCATION ( OUTPREC,
INPREC   )     1

Definition at line 2580 of file i386.h.

#define UNITS_PER_WORD   (TARGET_64BIT ? 8 : 4)

Definition at line 710 of file i386.h.

#define VALID_FP_MODE_P ( MODE   ) 

Value:

((MODE) == SFmode || (MODE) == DFmode || (MODE) == TFmode   \
     || (!TARGET_64BIT && (MODE) == XFmode)       \
     || (MODE) == SCmode || (MODE) == DCmode || (MODE) == TCmode  \
     || (!TARGET_64BIT && (MODE) == XCmode))

Definition at line 1017 of file i386.h.

Referenced by ix86_hard_regno_mode_ok().

#define VALID_INT_MODE_P ( MODE   ) 

Value:

((MODE) == QImode || (MODE) == HImode || (MODE) == SImode   \
     || (MODE) == DImode            \
     || (MODE) == CQImode || (MODE) == CHImode || (MODE) == CSImode \
     || (MODE) == CDImode           \
     || (TARGET_64BIT && ((MODE) == TImode || (MODE) == CTImode)))

Definition at line 1023 of file i386.h.

Referenced by ix86_hard_regno_mode_ok().

#define VALID_MMX_REG_MODE ( MODE   ) 

Value:

((MODE) == DImode || (MODE) == V8QImode || (MODE) == V4HImode \
     || (MODE) == V2SImode || (MODE) == SImode)

Definition at line 1008 of file i386.h.

Referenced by ix86_hard_regno_mode_ok(), ix86_vector_mode_supported_p(), and safe_vector_operand().

#define VALID_MMX_REG_MODE_3DNOW ( MODE   )     ((MODE) == V2SFmode || (MODE) == SFmode)

#define VALID_SSE2_REG_MODE ( MODE   ) 

Value:

((MODE) == V16QImode || (MODE) == V8HImode || (MODE) == V2DFmode    \
     || (MODE) == V2DImode)

Definition at line 994 of file i386.h.

Referenced by ix86_hard_regno_mode_ok(), and ix86_vector_mode_supported_p().

#define VALID_SSE_REG_MODE ( MODE   ) 

Value:

((MODE) == TImode || (MODE) == V4SFmode || (MODE) == V4SImode \
     || (MODE) == SFmode            \
     /* Always accept SSE2 modes so that xmmintrin.h compiles.  */  \
     || VALID_SSE2_REG_MODE (MODE)          \
     || (TARGET_SSE2 && ((MODE) == DFmode || VALID_MMX_REG_MODE (MODE))))

Definition at line 998 of file i386.h.

Referenced by ix86_hard_regno_mode_ok(), ix86_vector_mode_supported_p(), and split_3().

#define VECTOR_MODE_SUPPORTED_P ( MODE   ) 

Value:

Definition at line 1012 of file i386.h.

Referenced by vector_mode_valid_p().

#define WORDS_BIG_ENDIAN   0

Definition at line 707 of file i386.h.


Typedef Documentation


Enumeration Type Documentation

Enumerator:
ASM_ATT 
ASM_INTEL 
ASM_ATT 
ASM_INTEL 
ASM_ATT 
ASM_INTEL 
ASM_ATT 
ASM_INTEL 

Definition at line 3415 of file i386.h.

enum cmodel

Enumerator:
CM_32 
CM_SMALL 
CM_KERNEL 
CM_MEDIUM 
CM_LARGE 
CM_SMALL_PIC 
CM_32 
CM_MEDLOW 
CM_MEDMID 
CM_MEDANY 
CM_EMBMEDANY 
CM_32 
CM_SMALL 
CM_KERNEL 
CM_MEDIUM 
CM_LARGE 
CM_SMALL_PIC 
CM_32 
CM_MEDLOW 
CM_MEDMID 
CM_MEDANY 
CM_EMBMEDANY 
CM_32 
CM_SMALL 
CM_KERNEL 
CM_MEDIUM 
CM_LARGE 
CM_SMALL_PIC 
CM_32 
CM_MEDLOW 
CM_MEDMID 
CM_MEDANY 
CM_EMBMEDANY 
CM_32 
CM_SMALL 
CM_KERNEL 
CM_MEDIUM 
CM_LARGE 
CM_SMALL_PIC 
CM_MEDIUM_PIC 
CM_32 
CM_MEDLOW 
CM_MEDMID 
CM_MEDANY 
CM_EMBMEDANY 

Definition at line 3398 of file i386.h.

enum fp_cw_mode

Enumerator:
FP_CW_STORED 
FP_CW_UNINITIALIZED 
FP_CW_ANY 
FP_CW_STORED 
FP_CW_UNINITIALIZED 
FP_CW_ANY 

Definition at line 3461 of file i386.h.

Enumerator:
FPMATH_387 
FPMATH_SSE 
FPMATH_387 
FPMATH_SSE 
FPMATH_387 
FPMATH_SSE 
FPMATH_387 
FPMATH_SSE 

Definition at line 3380 of file i386.h.

Enumerator:
IX86_BUILTIN_ADDPS 
IX86_BUILTIN_ADDSS 
IX86_BUILTIN_DIVPS 
IX86_BUILTIN_DIVSS 
IX86_BUILTIN_MULPS 
IX86_BUILTIN_MULSS 
IX86_BUILTIN_SUBPS 
IX86_BUILTIN_SUBSS 
IX86_BUILTIN_CMPEQPS 
IX86_BUILTIN_CMPLTPS 
IX86_BUILTIN_CMPLEPS 
IX86_BUILTIN_CMPGTPS 
IX86_BUILTIN_CMPGEPS 
IX86_BUILTIN_CMPNEQPS 
IX86_BUILTIN_CMPNLTPS 
IX86_BUILTIN_CMPNLEPS 
IX86_BUILTIN_CMPNGTPS 
IX86_BUILTIN_CMPNGEPS 
IX86_BUILTIN_CMPORDPS 
IX86_BUILTIN_CMPUNORDPS 
IX86_BUILTIN_CMPNEPS 
IX86_BUILTIN_CMPEQSS 
IX86_BUILTIN_CMPLTSS 
IX86_BUILTIN_CMPLESS 
IX86_BUILTIN_CMPNEQSS 
IX86_BUILTIN_CMPNLTSS 
IX86_BUILTIN_CMPNLESS 
IX86_BUILTIN_CMPORDSS 
IX86_BUILTIN_CMPUNORDSS 
IX86_BUILTIN_CMPNESS 
IX86_BUILTIN_COMIEQSS 
IX86_BUILTIN_COMILTSS 
IX86_BUILTIN_COMILESS 
IX86_BUILTIN_COMIGTSS 
IX86_BUILTIN_COMIGESS 
IX86_BUILTIN_COMINEQSS 
IX86_BUILTIN_UCOMIEQSS 
IX86_BUILTIN_UCOMILTSS 
IX86_BUILTIN_UCOMILESS 
IX86_BUILTIN_UCOMIGTSS 
IX86_BUILTIN_UCOMIGESS 
IX86_BUILTIN_UCOMINEQSS 
IX86_BUILTIN_CVTPI2PS 
IX86_BUILTIN_CVTPS2PI 
IX86_BUILTIN_CVTSI2SS 
IX86_BUILTIN_CVTSI642SS 
IX86_BUILTIN_CVTSS2SI 
IX86_BUILTIN_CVTSS2SI64 
IX86_BUILTIN_CVTTPS2PI 
IX86_BUILTIN_CVTTSS2SI 
IX86_BUILTIN_CVTTSS2SI64 
IX86_BUILTIN_MAXPS 
IX86_BUILTIN_MAXSS 
IX86_BUILTIN_MINPS 
IX86_BUILTIN_MINSS 
IX86_BUILTIN_LOADAPS 
IX86_BUILTIN_LOADUPS 
IX86_BUILTIN_STOREAPS 
IX86_BUILTIN_STOREUPS 
IX86_BUILTIN_LOADSS 
IX86_BUILTIN_STORESS 
IX86_BUILTIN_MOVSS 
IX86_BUILTIN_MOVHLPS 
IX86_BUILTIN_MOVLHPS 
IX86_BUILTIN_LOADHPS 
IX86_BUILTIN_LOADLPS 
IX86_BUILTIN_STOREHPS 
IX86_BUILTIN_STORELPS 
IX86_BUILTIN_MASKMOVQ 
IX86_BUILTIN_MOVMSKPS 
IX86_BUILTIN_PMOVMSKB 
IX86_BUILTIN_MOVNTPS 
IX86_BUILTIN_MOVNTQ 
IX86_BUILTIN_LOADDQA 
IX86_BUILTIN_LOADDQU 
IX86_BUILTIN_STOREDQA 
IX86_BUILTIN_STOREDQU 
IX86_BUILTIN_MOVQ 
IX86_BUILTIN_LOADD 
IX86_BUILTIN_STORED 
IX86_BUILTIN_CLRTI 
IX86_BUILTIN_PACKSSWB 
IX86_BUILTIN_PACKSSDW 
IX86_BUILTIN_PACKUSWB 
IX86_BUILTIN_PADDB 
IX86_BUILTIN_PADDW 
IX86_BUILTIN_PADDD 
IX86_BUILTIN_PADDQ 
IX86_BUILTIN_PADDSB 
IX86_BUILTIN_PADDSW 
IX86_BUILTIN_PADDUSB 
IX86_BUILTIN_PADDUSW 
IX86_BUILTIN_PSUBB 
IX86_BUILTIN_PSUBW 
IX86_BUILTIN_PSUBD 
IX86_BUILTIN_PSUBQ 
IX86_BUILTIN_PSUBSB 
IX86_BUILTIN_PSUBSW 
IX86_BUILTIN_PSUBUSB 
IX86_BUILTIN_PSUBUSW 
IX86_BUILTIN_PAND 
IX86_BUILTIN_PANDN 
IX86_BUILTIN_POR 
IX86_BUILTIN_PXOR 
IX86_BUILTIN_PAVGB 
IX86_BUILTIN_PAVGW 
IX86_BUILTIN_PCMPEQB 
IX86_BUILTIN_PCMPEQW 
IX86_BUILTIN_PCMPEQD 
IX86_BUILTIN_PCMPGTB 
IX86_BUILTIN_PCMPGTW 
IX86_BUILTIN_PCMPGTD 
IX86_BUILTIN_PEXTRW 
IX86_BUILTIN_PINSRW 
IX86_BUILTIN_PMADDWD 
IX86_BUILTIN_PMAXSW 
IX86_BUILTIN_PMAXUB 
IX86_BUILTIN_PMINSW 
IX86_BUILTIN_PMINUB 
IX86_BUILTIN_PMULHUW 
IX86_BUILTIN_PMULHW 
IX86_BUILTIN_PMULLW 
IX86_BUILTIN_PSADBW 
IX86_BUILTIN_PSHUFW 
IX86_BUILTIN_PSLLW 
IX86_BUILTIN_PSLLD 
IX86_BUILTIN_PSLLQ 
IX86_BUILTIN_PSRAW 
IX86_BUILTIN_PSRAD 
IX86_BUILTIN_PSRLW 
IX86_BUILTIN_PSRLD 
IX86_BUILTIN_PSRLQ 
IX86_BUILTIN_PSLLWI 
IX86_BUILTIN_PSLLDI 
IX86_BUILTIN_PSLLQI 
IX86_BUILTIN_PSRAWI 
IX86_BUILTIN_PSRADI 
IX86_BUILTIN_PSRLWI 
IX86_BUILTIN_PSRLDI 
IX86_BUILTIN_PSRLQI 
IX86_BUILTIN_PUNPCKHBW 
IX86_BUILTIN_PUNPCKHWD 
IX86_BUILTIN_PUNPCKHDQ 
IX86_BUILTIN_PUNPCKLBW 
IX86_BUILTIN_PUNPCKLWD 
IX86_BUILTIN_PUNPCKLDQ 
IX86_BUILTIN_SHUFPS 
IX86_BUILTIN_RCPPS 
IX86_BUILTIN_RCPSS 
IX86_BUILTIN_RSQRTPS 
IX86_BUILTIN_RSQRTSS 
IX86_BUILTIN_SQRTPS 
IX86_BUILTIN_SQRTSS 
IX86_BUILTIN_UNPCKHPS 
IX86_BUILTIN_UNPCKLPS 
IX86_BUILTIN_ANDPS 
IX86_BUILTIN_ANDNPS 
IX86_BUILTIN_ORPS 
IX86_BUILTIN_XORPS 
IX86_BUILTIN_EMMS 
IX86_BUILTIN_LDMXCSR 
IX86_BUILTIN_STMXCSR 
IX86_BUILTIN_SFENCE 
IX86_BUILTIN_FEMMS 
IX86_BUILTIN_PAVGUSB 
IX86_BUILTIN_PF2ID 
IX86_BUILTIN_PFACC 
IX86_BUILTIN_PFADD 
IX86_BUILTIN_PFCMPEQ 
IX86_BUILTIN_PFCMPGE 
IX86_BUILTIN_PFCMPGT 
IX86_BUILTIN_PFMAX 
IX86_BUILTIN_PFMIN 
IX86_BUILTIN_PFMUL 
IX86_BUILTIN_PFRCP 
IX86_BUILTIN_PFRCPIT1 
IX86_BUILTIN_PFRCPIT2 
IX86_BUILTIN_PFRSQIT1 
IX86_BUILTIN_PFRSQRT 
IX86_BUILTIN_PFSUB 
IX86_BUILTIN_PFSUBR 
IX86_BUILTIN_PI2FD 
IX86_BUILTIN_PMULHRW 
IX86_BUILTIN_PF2IW 
IX86_BUILTIN_PFNACC 
IX86_BUILTIN_PFPNACC 
IX86_BUILTIN_PI2FW 
IX86_BUILTIN_PSWAPDSI 
IX86_BUILTIN_PSWAPDSF 
IX86_BUILTIN_SSE_ZERO 
IX86_BUILTIN_MMX_ZERO 
IX86_BUILTIN_ADDPD 
IX86_BUILTIN_ADDSD 
IX86_BUILTIN_DIVPD 
IX86_BUILTIN_DIVSD 
IX86_BUILTIN_MULPD 
IX86_BUILTIN_MULSD 
IX86_BUILTIN_SUBPD 
IX86_BUILTIN_SUBSD 
IX86_BUILTIN_CMPEQPD 
IX86_BUILTIN_CMPLTPD 
IX86_BUILTIN_CMPLEPD 
IX86_BUILTIN_CMPGTPD 
IX86_BUILTIN_CMPGEPD 
IX86_BUILTIN_CMPNEQPD 
IX86_BUILTIN_CMPNLTPD 
IX86_BUILTIN_CMPNLEPD 
IX86_BUILTIN_CMPNGTPD 
IX86_BUILTIN_CMPNGEPD 
IX86_BUILTIN_CMPORDPD 
IX86_BUILTIN_CMPUNORDPD 
IX86_BUILTIN_CMPNEPD 
IX86_BUILTIN_CMPEQSD 
IX86_BUILTIN_CMPLTSD 
IX86_BUILTIN_CMPLESD 
IX86_BUILTIN_CMPNEQSD 
IX86_BUILTIN_CMPNLTSD 
IX86_BUILTIN_CMPNLESD 
IX86_BUILTIN_CMPORDSD 
IX86_BUILTIN_CMPUNORDSD 
IX86_BUILTIN_CMPNESD 
IX86_BUILTIN_COMIEQSD 
IX86_BUILTIN_COMILTSD 
IX86_BUILTIN_COMILESD 
IX86_BUILTIN_COMIGTSD 
IX86_BUILTIN_COMIGESD 
IX86_BUILTIN_COMINEQSD 
IX86_BUILTIN_UCOMIEQSD 
IX86_BUILTIN_UCOMILTSD 
IX86_BUILTIN_UCOMILESD 
IX86_BUILTIN_UCOMIGTSD 
IX86_BUILTIN_UCOMIGESD 
IX86_BUILTIN_UCOMINEQSD 
IX86_BUILTIN_MAXPD 
IX86_BUILTIN_MAXSD 
IX86_BUILTIN_MINPD 
IX86_BUILTIN_MINSD 
IX86_BUILTIN_ANDPD 
IX86_BUILTIN_ANDNPD 
IX86_BUILTIN_ORPD 
IX86_BUILTIN_XORPD 
IX86_BUILTIN_SQRTPD 
IX86_BUILTIN_SQRTSD 
IX86_BUILTIN_UNPCKHPD 
IX86_BUILTIN_UNPCKLPD 
IX86_BUILTIN_SHUFPD 
IX86_BUILTIN_LOADAPD 
IX86_BUILTIN_LOADUPD 
IX86_BUILTIN_STOREAPD 
IX86_BUILTIN_STOREUPD 
IX86_BUILTIN_LOADSD 
IX86_BUILTIN_STORESD 
IX86_BUILTIN_MOVSD 
IX86_BUILTIN_LOADHPD 
IX86_BUILTIN_LOADLPD 
IX86_BUILTIN_STOREHPD 
IX86_BUILTIN_STORELPD 
IX86_BUILTIN_CVTDQ2PD 
IX86_BUILTIN_CVTDQ2PS 
IX86_BUILTIN_CVTPD2DQ 
IX86_BUILTIN_CVTPD2PI 
IX86_BUILTIN_CVTPD2PS 
IX86_BUILTIN_CVTTPD2DQ 
IX86_BUILTIN_CVTTPD2PI 
IX86_BUILTIN_CVTPI2PD 
IX86_BUILTIN_CVTSI2SD 
IX86_BUILTIN_CVTSI642SD 
IX86_BUILTIN_CVTSD2SI 
IX86_BUILTIN_CVTSD2SI64 
IX86_BUILTIN_CVTSD2SS 
IX86_BUILTIN_CVTSS2SD 
IX86_BUILTIN_CVTTSD2SI 
IX86_BUILTIN_CVTTSD2SI64 
IX86_BUILTIN_CVTPS2DQ 
IX86_BUILTIN_CVTPS2PD 
IX86_BUILTIN_CVTTPS2DQ 
IX86_BUILTIN_MOVNTI 
IX86_BUILTIN_MOVNTPD 
IX86_BUILTIN_MOVNTDQ 
IX86_BUILTIN_SETPD1 
IX86_BUILTIN_SETPD 
IX86_BUILTIN_CLRPD 
IX86_BUILTIN_SETRPD 
IX86_BUILTIN_LOADPD1 
IX86_BUILTIN_LOADRPD 
IX86_BUILTIN_STOREPD1 
IX86_BUILTIN_STORERPD 
IX86_BUILTIN_MASKMOVDQU 
IX86_BUILTIN_MOVMSKPD 
IX86_BUILTIN_PMOVMSKB128 
IX86_BUILTIN_MOVQ2DQ 
IX86_BUILTIN_MOVDQ2Q 
IX86_BUILTIN_PACKSSWB128 
IX86_BUILTIN_PACKSSDW128 
IX86_BUILTIN_PACKUSWB128 
IX86_BUILTIN_PADDB128 
IX86_BUILTIN_PADDW128 
IX86_BUILTIN_PADDD128 
IX86_BUILTIN_PADDQ128 
IX86_BUILTIN_PADDSB128 
IX86_BUILTIN_PADDSW128 
IX86_BUILTIN_PADDUSB128 
IX86_BUILTIN_PADDUSW128 
IX86_BUILTIN_PSUBB128 
IX86_BUILTIN_PSUBW128 
IX86_BUILTIN_PSUBD128 
IX86_BUILTIN_PSUBQ128 
IX86_BUILTIN_PSUBSB128 
IX86_BUILTIN_PSUBSW128 
IX86_BUILTIN_PSUBUSB128 
IX86_BUILTIN_PSUBUSW128 
IX86_BUILTIN_PAND128 
IX86_BUILTIN_PANDN128 
IX86_BUILTIN_POR128 
IX86_BUILTIN_PXOR128 
IX86_BUILTIN_PAVGB128 
IX86_BUILTIN_PAVGW128 
IX86_BUILTIN_PCMPEQB128 
IX86_BUILTIN_PCMPEQW128 
IX86_BUILTIN_PCMPEQD128 
IX86_BUILTIN_PCMPGTB128 
IX86_BUILTIN_PCMPGTW128 
IX86_BUILTIN_PCMPGTD128 
IX86_BUILTIN_PEXTRW128 
IX86_BUILTIN_PINSRW128 
IX86_BUILTIN_PMADDWD128 
IX86_BUILTIN_PMAXSW128 
IX86_BUILTIN_PMAXUB128 
IX86_BUILTIN_PMINSW128 
IX86_BUILTIN_PMINUB128 
IX86_BUILTIN_PMULUDQ 
IX86_BUILTIN_PMULUDQ128 
IX86_BUILTIN_PMULHUW128 
IX86_BUILTIN_PMULHW128 
IX86_BUILTIN_PMULLW128 
IX86_BUILTIN_PSADBW128 
IX86_BUILTIN_PSHUFHW 
IX86_BUILTIN_PSHUFLW 
IX86_BUILTIN_PSHUFD 
IX86_BUILTIN_PSLLW128 
IX86_BUILTIN_PSLLD128 
IX86_BUILTIN_PSLLQ128 
IX86_BUILTIN_PSRAW128 
IX86_BUILTIN_PSRAD128 
IX86_BUILTIN_PSRLW128 
IX86_BUILTIN_PSRLD128 
IX86_BUILTIN_PSRLQ128 
IX86_BUILTIN_PSLLDQI128 
IX86_BUILTIN_PSLLWI128 
IX86_BUILTIN_PSLLDI128 
IX86_BUILTIN_PSLLQI128 
IX86_BUILTIN_PSRAWI128 
IX86_BUILTIN_PSRADI128 
IX86_BUILTIN_PSRLDQI128 
IX86_BUILTIN_PSRLWI128 
IX86_BUILTIN_PSRLDI128 
IX86_BUILTIN_PSRLQI128 
IX86_BUILTIN_PUNPCKHBW128 
IX86_BUILTIN_PUNPCKHWD128 
IX86_BUILTIN_PUNPCKHDQ128 
IX86_BUILTIN_PUNPCKHQDQ128 
IX86_BUILTIN_PUNPCKLBW128 
IX86_BUILTIN_PUNPCKLWD128 
IX86_BUILTIN_PUNPCKLDQ128 
IX86_BUILTIN_PUNPCKLQDQ128 
IX86_BUILTIN_CLFLUSH 
IX86_BUILTIN_MFENCE 
IX86_BUILTIN_LFENCE 
IX86_BUILTIN_ADDSUBPS 
IX86_BUILTIN_HADDPS 
IX86_BUILTIN_HSUBPS 
IX86_BUILTIN_MOVSHDUP 
IX86_BUILTIN_MOVSLDUP 
IX86_BUILTIN_ADDSUBPD 
IX86_BUILTIN_HADDPD 
IX86_BUILTIN_HSUBPD 
IX86_BUILTIN_LOADDDUP 
IX86_BUILTIN_MOVDDUP 
IX86_BUILTIN_LDDQU 
IX86_BUILTIN_MONITOR 
IX86_BUILTIN_MWAIT 
IX86_BUILTIN_MAX 
IX86_BUILTIN_ADDPS 
IX86_BUILTIN_ADDSS 
IX86_BUILTIN_DIVPS 
IX86_BUILTIN_DIVSS 
IX86_BUILTIN_MULPS 
IX86_BUILTIN_MULSS 
IX86_BUILTIN_SUBPS 
IX86_BUILTIN_SUBSS 
IX86_BUILTIN_CMPEQPS 
IX86_BUILTIN_CMPLTPS 
IX86_BUILTIN_CMPLEPS 
IX86_BUILTIN_CMPGTPS 
IX86_BUILTIN_CMPGEPS 
IX86_BUILTIN_CMPNEQPS 
IX86_BUILTIN_CMPNLTPS 
IX86_BUILTIN_CMPNLEPS 
IX86_BUILTIN_CMPNGTPS 
IX86_BUILTIN_CMPNGEPS 
IX86_BUILTIN_CMPORDPS 
IX86_BUILTIN_CMPUNORDPS 
IX86_BUILTIN_CMPNEPS 
IX86_BUILTIN_CMPEQSS 
IX86_BUILTIN_CMPLTSS 
IX86_BUILTIN_CMPLESS 
IX86_BUILTIN_CMPNEQSS 
IX86_BUILTIN_CMPNLTSS 
IX86_BUILTIN_CMPNLESS 
IX86_BUILTIN_CMPORDSS 
IX86_BUILTIN_CMPUNORDSS 
IX86_BUILTIN_CMPNESS 
IX86_BUILTIN_COMIEQSS 
IX86_BUILTIN_COMILTSS 
IX86_BUILTIN_COMILESS 
IX86_BUILTIN_COMIGTSS 
IX86_BUILTIN_COMIGESS 
IX86_BUILTIN_COMINEQSS 
IX86_BUILTIN_UCOMIEQSS 
IX86_BUILTIN_UCOMILTSS 
IX86_BUILTIN_UCOMILESS 
IX86_BUILTIN_UCOMIGTSS 
IX86_BUILTIN_UCOMIGESS 
IX86_BUILTIN_UCOMINEQSS 
IX86_BUILTIN_CVTPI2PS 
IX86_BUILTIN_CVTPS2PI 
IX86_BUILTIN_CVTSI2SS 
IX86_BUILTIN_CVTSI642SS 
IX86_BUILTIN_CVTSS2SI 
IX86_BUILTIN_CVTSS2SI64 
IX86_BUILTIN_CVTTPS2PI 
IX86_BUILTIN_CVTTSS2SI 
IX86_BUILTIN_CVTTSS2SI64 
IX86_BUILTIN_MAXPS 
IX86_BUILTIN_MAXSS 
IX86_BUILTIN_MINPS 
IX86_BUILTIN_MINSS 
IX86_BUILTIN_LOADAPS 
IX86_BUILTIN_LOADUPS 
IX86_BUILTIN_STOREAPS 
IX86_BUILTIN_STOREUPS 
IX86_BUILTIN_LOADSS 
IX86_BUILTIN_STORESS 
IX86_BUILTIN_MOVSS 
IX86_BUILTIN_MOVHLPS 
IX86_BUILTIN_MOVLHPS 
IX86_BUILTIN_LOADHPS 
IX86_BUILTIN_LOADLPS 
IX86_BUILTIN_STOREHPS 
IX86_BUILTIN_STORELPS 
IX86_BUILTIN_MASKMOVQ 
IX86_BUILTIN_MOVMSKPS 
IX86_BUILTIN_PMOVMSKB 
IX86_BUILTIN_MOVNTPS 
IX86_BUILTIN_MOVNTQ 
IX86_BUILTIN_LOADDQA 
IX86_BUILTIN_LOADDQU 
IX86_BUILTIN_STOREDQA 
IX86_BUILTIN_STOREDQU 
IX86_BUILTIN_MOVQ 
IX86_BUILTIN_LOADD 
IX86_BUILTIN_STORED 
IX86_BUILTIN_CLRTI 
IX86_BUILTIN_PACKSSWB 
IX86_BUILTIN_PACKSSDW 
IX86_BUILTIN_PACKUSWB 
IX86_BUILTIN_PADDB 
IX86_BUILTIN_PADDW 
IX86_BUILTIN_PADDD 
IX86_BUILTIN_PADDQ 
IX86_BUILTIN_PADDSB 
IX86_BUILTIN_PADDSW 
IX86_BUILTIN_PADDUSB 
IX86_BUILTIN_PADDUSW 
IX86_BUILTIN_PSUBB 
IX86_BUILTIN_PSUBW 
IX86_BUILTIN_PSUBD 
IX86_BUILTIN_PSUBQ 
IX86_BUILTIN_PSUBSB 
IX86_BUILTIN_PSUBSW 
IX86_BUILTIN_PSUBUSB 
IX86_BUILTIN_PSUBUSW 
IX86_BUILTIN_PAND 
IX86_BUILTIN_PANDN 
IX86_BUILTIN_POR 
IX86_BUILTIN_PXOR 
IX86_BUILTIN_PAVGB 
IX86_BUILTIN_PAVGW 
IX86_BUILTIN_PCMPEQB 
IX86_BUILTIN_PCMPEQW 
IX86_BUILTIN_PCMPEQD 
IX86_BUILTIN_PCMPGTB 
IX86_BUILTIN_PCMPGTW 
IX86_BUILTIN_PCMPGTD 
IX86_BUILTIN_PEXTRW 
IX86_BUILTIN_PINSRW 
IX86_BUILTIN_PMADDWD 
IX86_BUILTIN_PMAXSW 
IX86_BUILTIN_PMAXUB 
IX86_BUILTIN_PMINSW 
IX86_BUILTIN_PMINUB 
IX86_BUILTIN_PMULHUW 
IX86_BUILTIN_PMULHW 
IX86_BUILTIN_PMULLW 
IX86_BUILTIN_PSADBW 
IX86_BUILTIN_PSHUFW 
IX86_BUILTIN_PSLLW 
IX86_BUILTIN_PSLLD 
IX86_BUILTIN_PSLLQ 
IX86_BUILTIN_PSRAW 
IX86_BUILTIN_PSRAD 
IX86_BUILTIN_PSRLW 
IX86_BUILTIN_PSRLD 
IX86_BUILTIN_PSRLQ 
IX86_BUILTIN_PSLLWI 
IX86_BUILTIN_PSLLDI 
IX86_BUILTIN_PSLLQI 
IX86_BUILTIN_PSRAWI 
IX86_BUILTIN_PSRADI 
IX86_BUILTIN_PSRLWI 
IX86_BUILTIN_PSRLDI 
IX86_BUILTIN_PSRLQI 
IX86_BUILTIN_PUNPCKHBW 
IX86_BUILTIN_PUNPCKHWD 
IX86_BUILTIN_PUNPCKHDQ 
IX86_BUILTIN_PUNPCKLBW 
IX86_BUILTIN_PUNPCKLWD 
IX86_BUILTIN_PUNPCKLDQ 
IX86_BUILTIN_SHUFPS 
IX86_BUILTIN_RCPPS 
IX86_BUILTIN_RCPSS 
IX86_BUILTIN_RSQRTPS 
IX86_BUILTIN_RSQRTSS 
IX86_BUILTIN_SQRTPS 
IX86_BUILTIN_SQRTSS 
IX86_BUILTIN_UNPCKHPS 
IX86_BUILTIN_UNPCKLPS 
IX86_BUILTIN_ANDPS 
IX86_BUILTIN_ANDNPS 
IX86_BUILTIN_ORPS 
IX86_BUILTIN_XORPS 
IX86_BUILTIN_EMMS 
IX86_BUILTIN_LDMXCSR 
IX86_BUILTIN_STMXCSR 
IX86_BUILTIN_SFENCE 
IX86_BUILTIN_FEMMS 
IX86_BUILTIN_PAVGUSB 
IX86_BUILTIN_PF2ID 
IX86_BUILTIN_PFACC 
IX86_BUILTIN_PFADD 
IX86_BUILTIN_PFCMPEQ 
IX86_BUILTIN_PFCMPGE 
IX86_BUILTIN_PFCMPGT 
IX86_BUILTIN_PFMAX 
IX86_BUILTIN_PFMIN 
IX86_BUILTIN_PFMUL 
IX86_BUILTIN_PFRCP 
IX86_BUILTIN_PFRCPIT1 
IX86_BUILTIN_PFRCPIT2 
IX86_BUILTIN_PFRSQIT1 
IX86_BUILTIN_PFRSQRT 
IX86_BUILTIN_PFSUB 
IX86_BUILTIN_PFSUBR 
IX86_BUILTIN_PI2FD 
IX86_BUILTIN_PMULHRW 
IX86_BUILTIN_PF2IW 
IX86_BUILTIN_PFNACC 
IX86_BUILTIN_PFPNACC 
IX86_BUILTIN_PI2FW 
IX86_BUILTIN_PSWAPDSI 
IX86_BUILTIN_PSWAPDSF 
IX86_BUILTIN_SSE_ZERO 
IX86_BUILTIN_MMX_ZERO 
IX86_BUILTIN_ADDPD 
IX86_BUILTIN_ADDSD 
IX86_BUILTIN_DIVPD 
IX86_BUILTIN_DIVSD 
IX86_BUILTIN_MULPD 
IX86_BUILTIN_MULSD 
IX86_BUILTIN_SUBPD 
IX86_BUILTIN_SUBSD 
IX86_BUILTIN_CMPEQPD 
IX86_BUILTIN_CMPLTPD 
IX86_BUILTIN_CMPLEPD 
IX86_BUILTIN_CMPGTPD 
IX86_BUILTIN_CMPGEPD 
IX86_BUILTIN_CMPNEQPD 
IX86_BUILTIN_CMPNLTPD 
IX86_BUILTIN_CMPNLEPD 
IX86_BUILTIN_CMPNGTPD 
IX86_BUILTIN_CMPNGEPD 
IX86_BUILTIN_CMPORDPD 
IX86_BUILTIN_CMPUNORDPD 
IX86_BUILTIN_CMPNEPD 
IX86_BUILTIN_CMPEQSD 
IX86_BUILTIN_CMPLTSD 
IX86_BUILTIN_CMPLESD 
IX86_BUILTIN_CMPNEQSD 
IX86_BUILTIN_CMPNLTSD 
IX86_BUILTIN_CMPNLESD 
IX86_BUILTIN_CMPORDSD 
IX86_BUILTIN_CMPUNORDSD 
IX86_BUILTIN_CMPNESD 
IX86_BUILTIN_COMIEQSD 
IX86_BUILTIN_COMILTSD 
IX86_BUILTIN_COMILESD 
IX86_BUILTIN_COMIGTSD 
IX86_BUILTIN_COMIGESD 
IX86_BUILTIN_COMINEQSD 
IX86_BUILTIN_UCOMIEQSD 
IX86_BUILTIN_UCOMILTSD 
IX86_BUILTIN_UCOMILESD 
IX86_BUILTIN_UCOMIGTSD 
IX86_BUILTIN_UCOMIGESD 
IX86_BUILTIN_UCOMINEQSD 
IX86_BUILTIN_MAXPD 
IX86_BUILTIN_MAXSD 
IX86_BUILTIN_MINPD 
IX86_BUILTIN_MINSD 
IX86_BUILTIN_ANDPD 
IX86_BUILTIN_ANDNPD 
IX86_BUILTIN_ORPD 
IX86_BUILTIN_XORPD 
IX86_BUILTIN_SQRTPD 
IX86_BUILTIN_SQRTSD 
IX86_BUILTIN_UNPCKHPD 
IX86_BUILTIN_UNPCKLPD 
IX86_BUILTIN_SHUFPD 
IX86_BUILTIN_LOADAPD 
IX86_BUILTIN_LOADUPD 
IX86_BUILTIN_STOREAPD 
IX86_BUILTIN_STOREUPD 
IX86_BUILTIN_LOADSD 
IX86_BUILTIN_STORESD 
IX86_BUILTIN_MOVSD 
IX86_BUILTIN_LOADHPD 
IX86_BUILTIN_LOADLPD 
IX86_BUILTIN_STOREHPD 
IX86_BUILTIN_STORELPD 
IX86_BUILTIN_CVTDQ2PD 
IX86_BUILTIN_CVTDQ2PS 
IX86_BUILTIN_CVTPD2DQ 
IX86_BUILTIN_CVTPD2PI 
IX86_BUILTIN_CVTPD2PS 
IX86_BUILTIN_CVTTPD2DQ 
IX86_BUILTIN_CVTTPD2PI 
IX86_BUILTIN_CVTPI2PD 
IX86_BUILTIN_CVTSI2SD 
IX86_BUILTIN_CVTSI642SD 
IX86_BUILTIN_CVTSD2SI 
IX86_BUILTIN_CVTSD2SI64 
IX86_BUILTIN_CVTSD2SS 
IX86_BUILTIN_CVTSS2SD 
IX86_BUILTIN_CVTTSD2SI 
IX86_BUILTIN_CVTTSD2SI64 
IX86_BUILTIN_CVTPS2DQ 
IX86_BUILTIN_CVTPS2PD 
IX86_BUILTIN_CVTTPS2DQ 
IX86_BUILTIN_MOVNTI 
IX86_BUILTIN_MOVNTPD 
IX86_BUILTIN_MOVNTDQ 
IX86_BUILTIN_SETPD1 
IX86_BUILTIN_SETPD 
IX86_BUILTIN_CLRPD 
IX86_BUILTIN_SETRPD 
IX86_BUILTIN_LOADPD1 
IX86_BUILTIN_LOADRPD 
IX86_BUILTIN_STOREPD1 
IX86_BUILTIN_STORERPD 
IX86_BUILTIN_MASKMOVDQU 
IX86_BUILTIN_MOVMSKPD 
IX86_BUILTIN_PMOVMSKB128 
IX86_BUILTIN_MOVQ2DQ 
IX86_BUILTIN_MOVDQ2Q 
IX86_BUILTIN_PACKSSWB128 
IX86_BUILTIN_PACKSSDW128 
IX86_BUILTIN_PACKUSWB128 
IX86_BUILTIN_PADDB128 
IX86_BUILTIN_PADDW128 
IX86_BUILTIN_PADDD128 
IX86_BUILTIN_PADDQ128 
IX86_BUILTIN_PADDSB128 
IX86_BUILTIN_PADDSW128 
IX86_BUILTIN_PADDUSB128 
IX86_BUILTIN_PADDUSW128 
IX86_BUILTIN_PSUBB128 
IX86_BUILTIN_PSUBW128 
IX86_BUILTIN_PSUBD128 
IX86_BUILTIN_PSUBQ128 
IX86_BUILTIN_PSUBSB128 
IX86_BUILTIN_PSUBSW128 
IX86_BUILTIN_PSUBUSB128 
IX86_BUILTIN_PSUBUSW128 
IX86_BUILTIN_PAND128 
IX86_BUILTIN_PANDN128 
IX86_BUILTIN_POR128 
IX86_BUILTIN_PXOR128 
IX86_BUILTIN_PAVGB128 
IX86_BUILTIN_PAVGW128 
IX86_BUILTIN_PCMPEQB128 
IX86_BUILTIN_PCMPEQW128 
IX86_BUILTIN_PCMPEQD128 
IX86_BUILTIN_PCMPGTB128 
IX86_BUILTIN_PCMPGTW128 
IX86_BUILTIN_PCMPGTD128 
IX86_BUILTIN_PEXTRW128 
IX86_BUILTIN_PINSRW128 
IX86_BUILTIN_PMADDWD128 
IX86_BUILTIN_PMAXSW128 
IX86_BUILTIN_PMAXUB128 
IX86_BUILTIN_PMINSW128 
IX86_BUILTIN_PMINUB128 
IX86_BUILTIN_PMULUDQ 
IX86_BUILTIN_PMULUDQ128 
IX86_BUILTIN_PMULHUW128 
IX86_BUILTIN_PMULHW128 
IX86_BUILTIN_PMULLW128 
IX86_BUILTIN_PSADBW128 
IX86_BUILTIN_PSHUFHW 
IX86_BUILTIN_PSHUFLW 
IX86_BUILTIN_PSHUFD 
IX86_BUILTIN_PSLLW128 
IX86_BUILTIN_PSLLD128 
IX86_BUILTIN_PSLLQ128 
IX86_BUILTIN_PSRAW128 
IX86_BUILTIN_PSRAD128 
IX86_BUILTIN_PSRLW128 
IX86_BUILTIN_PSRLD128 
IX86_BUILTIN_PSRLQ128 
IX86_BUILTIN_PSLLDQI128 
IX86_BUILTIN_PSLLWI128 
IX86_BUILTIN_PSLLDI128 
IX86_BUILTIN_PSLLQI128 
IX86_BUILTIN_PSRAWI128 
IX86_BUILTIN_PSRADI128 
IX86_BUILTIN_PSRLDQI128 
IX86_BUILTIN_PSRLWI128 
IX86_BUILTIN_PSRLDI128 
IX86_BUILTIN_PSRLQI128 
IX86_BUILTIN_PUNPCKHBW128 
IX86_BUILTIN_PUNPCKHWD128 
IX86_BUILTIN_PUNPCKHDQ128 
IX86_BUILTIN_PUNPCKHQDQ128 
IX86_BUILTIN_PUNPCKLBW128 
IX86_BUILTIN_PUNPCKLWD128 
IX86_BUILTIN_PUNPCKLDQ128 
IX86_BUILTIN_PUNPCKLQDQ128 
IX86_BUILTIN_CLFLUSH 
IX86_BUILTIN_MFENCE 
IX86_BUILTIN_LFENCE 
IX86_BUILTIN_ADDSUBPS 
IX86_BUILTIN_HADDPS 
IX86_BUILTIN_HSUBPS 
IX86_BUILTIN_MOVSHDUP 
IX86_BUILTIN_MOVSLDUP 
IX86_BUILTIN_ADDSUBPD 
IX86_BUILTIN_HADDPD 
IX86_BUILTIN_HSUBPD 
IX86_BUILTIN_LOADDDUP 
IX86_BUILTIN_MOVDDUP 
IX86_BUILTIN_LDDQU 
IX86_BUILTIN_MONITOR 
IX86_BUILTIN_MWAIT 
IX86_BUILTIN_MAX 
IX86_BUILTIN_ADDPS 
IX86_BUILTIN_ADDSS 
IX86_BUILTIN_DIVPS 
IX86_BUILTIN_DIVSS 
IX86_BUILTIN_MULPS 
IX86_BUILTIN_MULSS 
IX86_BUILTIN_SUBPS 
IX86_BUILTIN_SUBSS 
IX86_BUILTIN_CMPEQPS 
IX86_BUILTIN_CMPLTPS 
IX86_BUILTIN_CMPLEPS 
IX86_BUILTIN_CMPGTPS 
IX86_BUILTIN_CMPGEPS 
IX86_BUILTIN_CMPNEQPS 
IX86_BUILTIN_CMPNLTPS 
IX86_BUILTIN_CMPNLEPS 
IX86_BUILTIN_CMPNGTPS 
IX86_BUILTIN_CMPNGEPS 
IX86_BUILTIN_CMPORDPS 
IX86_BUILTIN_CMPUNORDPS 
IX86_BUILTIN_CMPNEPS 
IX86_BUILTIN_CMPEQSS 
IX86_BUILTIN_CMPLTSS 
IX86_BUILTIN_CMPLESS 
IX86_BUILTIN_CMPNEQSS 
IX86_BUILTIN_CMPNLTSS 
IX86_BUILTIN_CMPNLESS 
IX86_BUILTIN_CMPNGTSS 
IX86_BUILTIN_CMPNGESS 
IX86_BUILTIN_CMPORDSS 
IX86_BUILTIN_CMPUNORDSS 
IX86_BUILTIN_CMPNESS 
IX86_BUILTIN_COMIEQSS 
IX86_BUILTIN_COMILTSS 
IX86_BUILTIN_COMILESS 
IX86_BUILTIN_COMIGTSS 
IX86_BUILTIN_COMIGESS 
IX86_BUILTIN_COMINEQSS 
IX86_BUILTIN_UCOMIEQSS 
IX86_BUILTIN_UCOMILTSS 
IX86_BUILTIN_UCOMILESS 
IX86_BUILTIN_UCOMIGTSS 
IX86_BUILTIN_UCOMIGESS 
IX86_BUILTIN_UCOMINEQSS 
IX86_BUILTIN_CVTPI2PS 
IX86_BUILTIN_CVTPS2PI 
IX86_BUILTIN_CVTSI2SS 
IX86_BUILTIN_CVTSI642SS 
IX86_BUILTIN_CVTSS2SI 
IX86_BUILTIN_CVTSS2SI64 
IX86_BUILTIN_CVTTPS2PI 
IX86_BUILTIN_CVTTSS2SI 
IX86_BUILTIN_CVTTSS2SI64 
IX86_BUILTIN_MAXPS 
IX86_BUILTIN_MAXSS 
IX86_BUILTIN_MINPS 
IX86_BUILTIN_MINSS 
IX86_BUILTIN_LOADUPS 
IX86_BUILTIN_STOREUPS 
IX86_BUILTIN_MOVSS 
IX86_BUILTIN_MOVHLPS 
IX86_BUILTIN_MOVLHPS 
IX86_BUILTIN_LOADHPS 
IX86_BUILTIN_LOADLPS 
IX86_BUILTIN_STOREHPS 
IX86_BUILTIN_STORELPS 
IX86_BUILTIN_MASKMOVQ 
IX86_BUILTIN_MOVMSKPS 
IX86_BUILTIN_PMOVMSKB 
IX86_BUILTIN_MOVNTPS 
IX86_BUILTIN_MOVNTQ 
IX86_BUILTIN_LOADDQU 
IX86_BUILTIN_STOREDQU 
IX86_BUILTIN_PACKSSWB 
IX86_BUILTIN_PACKSSDW 
IX86_BUILTIN_PACKUSWB 
IX86_BUILTIN_PADDB 
IX86_BUILTIN_PADDW 
IX86_BUILTIN_PADDD 
IX86_BUILTIN_PADDQ 
IX86_BUILTIN_PADDSB 
IX86_BUILTIN_PADDSW 
IX86_BUILTIN_PADDUSB 
IX86_BUILTIN_PADDUSW 
IX86_BUILTIN_PSUBB 
IX86_BUILTIN_PSUBW 
IX86_BUILTIN_PSUBD 
IX86_BUILTIN_PSUBQ 
IX86_BUILTIN_PSUBSB 
IX86_BUILTIN_PSUBSW 
IX86_BUILTIN_PSUBUSB 
IX86_BUILTIN_PSUBUSW 
IX86_BUILTIN_PAND 
IX86_BUILTIN_PANDN 
IX86_BUILTIN_POR 
IX86_BUILTIN_PXOR 
IX86_BUILTIN_PAVGB 
IX86_BUILTIN_PAVGW 
IX86_BUILTIN_PCMPEQB 
IX86_BUILTIN_PCMPEQW 
IX86_BUILTIN_PCMPEQD 
IX86_BUILTIN_PCMPGTB 
IX86_BUILTIN_PCMPGTW 
IX86_BUILTIN_PCMPGTD 
IX86_BUILTIN_PMADDWD 
IX86_BUILTIN_PMAXSW 
IX86_BUILTIN_PMAXUB 
IX86_BUILTIN_PMINSW 
IX86_BUILTIN_PMINUB 
IX86_BUILTIN_PMULHUW 
IX86_BUILTIN_PMULHW 
IX86_BUILTIN_PMULLW 
IX86_BUILTIN_PSADBW 
IX86_BUILTIN_PSHUFW 
IX86_BUILTIN_PSLLW 
IX86_BUILTIN_PSLLD 
IX86_BUILTIN_PSLLQ 
IX86_BUILTIN_PSRAW 
IX86_BUILTIN_PSRAD 
IX86_BUILTIN_PSRLW 
IX86_BUILTIN_PSRLD 
IX86_BUILTIN_PSRLQ 
IX86_BUILTIN_PSLLWI 
IX86_BUILTIN_PSLLDI 
IX86_BUILTIN_PSLLQI 
IX86_BUILTIN_PSRAWI 
IX86_BUILTIN_PSRADI 
IX86_BUILTIN_PSRLWI 
IX86_BUILTIN_PSRLDI 
IX86_BUILTIN_PSRLQI 
IX86_BUILTIN_PUNPCKHBW 
IX86_BUILTIN_PUNPCKHWD 
IX86_BUILTIN_PUNPCKHDQ 
IX86_BUILTIN_PUNPCKLBW 
IX86_BUILTIN_PUNPCKLWD 
IX86_BUILTIN_PUNPCKLDQ 
IX86_BUILTIN_SHUFPS 
IX86_BUILTIN_RCPPS 
IX86_BUILTIN_RCPSS 
IX86_BUILTIN_RSQRTPS 
IX86_BUILTIN_RSQRTSS 
IX86_BUILTIN_SQRTPS 
IX86_BUILTIN_SQRTSS 
IX86_BUILTIN_UNPCKHPS 
IX86_BUILTIN_UNPCKLPS 
IX86_BUILTIN_ANDPS 
IX86_BUILTIN_ANDNPS 
IX86_BUILTIN_ORPS 
IX86_BUILTIN_XORPS 
IX86_BUILTIN_EMMS 
IX86_BUILTIN_LDMXCSR 
IX86_BUILTIN_STMXCSR 
IX86_BUILTIN_SFENCE 
IX86_BUILTIN_FEMMS 
IX86_BUILTIN_PAVGUSB 
IX86_BUILTIN_PF2ID 
IX86_BUILTIN_PFACC 
IX86_BUILTIN_PFADD 
IX86_BUILTIN_PFCMPEQ 
IX86_BUILTIN_PFCMPGE 
IX86_BUILTIN_PFCMPGT 
IX86_BUILTIN_PFMAX 
IX86_BUILTIN_PFMIN 
IX86_BUILTIN_PFMUL 
IX86_BUILTIN_PFRCP 
IX86_BUILTIN_PFRCPIT1 
IX86_BUILTIN_PFRCPIT2 
IX86_BUILTIN_PFRSQIT1 
IX86_BUILTIN_PFRSQRT 
IX86_BUILTIN_PFSUB 
IX86_BUILTIN_PFSUBR 
IX86_BUILTIN_PI2FD 
IX86_BUILTIN_PMULHRW 
IX86_BUILTIN_PF2IW 
IX86_BUILTIN_PFNACC 
IX86_BUILTIN_PFPNACC 
IX86_BUILTIN_PI2FW 
IX86_BUILTIN_PSWAPDSI 
IX86_BUILTIN_PSWAPDSF 
IX86_BUILTIN_ADDPD 
IX86_BUILTIN_ADDSD 
IX86_BUILTIN_DIVPD 
IX86_BUILTIN_DIVSD 
IX86_BUILTIN_MULPD 
IX86_BUILTIN_MULSD 
IX86_BUILTIN_SUBPD 
IX86_BUILTIN_SUBSD 
IX86_BUILTIN_CMPEQPD 
IX86_BUILTIN_CMPLTPD 
IX86_BUILTIN_CMPLEPD 
IX86_BUILTIN_CMPGTPD 
IX86_BUILTIN_CMPGEPD 
IX86_BUILTIN_CMPNEQPD 
IX86_BUILTIN_CMPNLTPD 
IX86_BUILTIN_CMPNLEPD 
IX86_BUILTIN_CMPNGTPD 
IX86_BUILTIN_CMPNGEPD 
IX86_BUILTIN_CMPORDPD 
IX86_BUILTIN_CMPUNORDPD 
IX86_BUILTIN_CMPNEPD 
IX86_BUILTIN_CMPEQSD 
IX86_BUILTIN_CMPLTSD 
IX86_BUILTIN_CMPLESD 
IX86_BUILTIN_CMPNEQSD 
IX86_BUILTIN_CMPNLTSD 
IX86_BUILTIN_CMPNLESD 
IX86_BUILTIN_CMPORDSD 
IX86_BUILTIN_CMPUNORDSD 
IX86_BUILTIN_CMPNESD 
IX86_BUILTIN_COMIEQSD 
IX86_BUILTIN_COMILTSD 
IX86_BUILTIN_COMILESD 
IX86_BUILTIN_COMIGTSD 
IX86_BUILTIN_COMIGESD 
IX86_BUILTIN_COMINEQSD 
IX86_BUILTIN_UCOMIEQSD 
IX86_BUILTIN_UCOMILTSD 
IX86_BUILTIN_UCOMILESD 
IX86_BUILTIN_UCOMIGTSD 
IX86_BUILTIN_UCOMIGESD 
IX86_BUILTIN_UCOMINEQSD 
IX86_BUILTIN_MAXPD 
IX86_BUILTIN_MAXSD 
IX86_BUILTIN_MINPD 
IX86_BUILTIN_MINSD 
IX86_BUILTIN_ANDPD 
IX86_BUILTIN_ANDNPD 
IX86_BUILTIN_ORPD 
IX86_BUILTIN_XORPD 
IX86_BUILTIN_SQRTPD 
IX86_BUILTIN_SQRTSD 
IX86_BUILTIN_UNPCKHPD 
IX86_BUILTIN_UNPCKLPD 
IX86_BUILTIN_SHUFPD 
IX86_BUILTIN_LOADUPD 
IX86_BUILTIN_STOREUPD 
IX86_BUILTIN_MOVSD 
IX86_BUILTIN_LOADHPD 
IX86_BUILTIN_LOADLPD 
IX86_BUILTIN_CVTDQ2PD 
IX86_BUILTIN_CVTDQ2PS 
IX86_BUILTIN_CVTPD2DQ 
IX86_BUILTIN_CVTPD2PI 
IX86_BUILTIN_CVTPD2PS 
IX86_BUILTIN_CVTTPD2DQ 
IX86_BUILTIN_CVTTPD2PI 
IX86_BUILTIN_CVTPI2PD 
IX86_BUILTIN_CVTSI2SD 
IX86_BUILTIN_CVTSI642SD 
IX86_BUILTIN_CVTSD2SI 
IX86_BUILTIN_CVTSD2SI64 
IX86_BUILTIN_CVTSD2SS 
IX86_BUILTIN_CVTSS2SD 
IX86_BUILTIN_CVTTSD2SI 
IX86_BUILTIN_CVTTSD2SI64 
IX86_BUILTIN_CVTPS2DQ 
IX86_BUILTIN_CVTPS2PD 
IX86_BUILTIN_CVTTPS2DQ 
IX86_BUILTIN_MOVNTI 
IX86_BUILTIN_MOVNTPD 
IX86_BUILTIN_MOVNTDQ 
IX86_BUILTIN_MASKMOVDQU 
IX86_BUILTIN_MOVMSKPD 
IX86_BUILTIN_PMOVMSKB128 
IX86_BUILTIN_PACKSSWB128 
IX86_BUILTIN_PACKSSDW128 
IX86_BUILTIN_PACKUSWB128 
IX86_BUILTIN_PADDB128 
IX86_BUILTIN_PADDW128 
IX86_BUILTIN_PADDD128 
IX86_BUILTIN_PADDQ128 
IX86_BUILTIN_PADDSB128 
IX86_BUILTIN_PADDSW128 
IX86_BUILTIN_PADDUSB128 
IX86_BUILTIN_PADDUSW128 
IX86_BUILTIN_PSUBB128 
IX86_BUILTIN_PSUBW128 
IX86_BUILTIN_PSUBD128 
IX86_BUILTIN_PSUBQ128 
IX86_BUILTIN_PSUBSB128 
IX86_BUILTIN_PSUBSW128 
IX86_BUILTIN_PSUBUSB128 
IX86_BUILTIN_PSUBUSW128 
IX86_BUILTIN_PAND128 
IX86_BUILTIN_PANDN128 
IX86_BUILTIN_POR128 
IX86_BUILTIN_PXOR128 
IX86_BUILTIN_PAVGB128 
IX86_BUILTIN_PAVGW128 
IX86_BUILTIN_PCMPEQB128 
IX86_BUILTIN_PCMPEQW128 
IX86_BUILTIN_PCMPEQD128 
IX86_BUILTIN_PCMPGTB128 
IX86_BUILTIN_PCMPGTW128 
IX86_BUILTIN_PCMPGTD128 
IX86_BUILTIN_PMADDWD128 
IX86_BUILTIN_PMAXSW128 
IX86_BUILTIN_PMAXUB128 
IX86_BUILTIN_PMINSW128 
IX86_BUILTIN_PMINUB128 
IX86_BUILTIN_PMULUDQ 
IX86_BUILTIN_PMULUDQ128 
IX86_BUILTIN_PMULHUW128 
IX86_BUILTIN_PMULHW128 
IX86_BUILTIN_PMULLW128 
IX86_BUILTIN_PSADBW128 
IX86_BUILTIN_PSHUFHW 
IX86_BUILTIN_PSHUFLW 
IX86_BUILTIN_PSHUFD 
IX86_BUILTIN_PSLLW128 
IX86_BUILTIN_PSLLD128 
IX86_BUILTIN_PSLLQ128 
IX86_BUILTIN_PSRAW128 
IX86_BUILTIN_PSRAD128 
IX86_BUILTIN_PSRLW128 
IX86_BUILTIN_PSRLD128 
IX86_BUILTIN_PSRLQ128 
IX86_BUILTIN_PSLLDQI128 
IX86_BUILTIN_PSLLWI128 
IX86_BUILTIN_PSLLDI128 
IX86_BUILTIN_PSLLQI128 
IX86_BUILTIN_PSRAWI128 
IX86_BUILTIN_PSRADI128 
IX86_BUILTIN_PSRLDQI128 
IX86_BUILTIN_PSRLWI128 
IX86_BUILTIN_PSRLDI128 
IX86_BUILTIN_PSRLQI128 
IX86_BUILTIN_PUNPCKHBW128 
IX86_BUILTIN_PUNPCKHWD128 
IX86_BUILTIN_PUNPCKHDQ128 
IX86_BUILTIN_PUNPCKHQDQ128 
IX86_BUILTIN_PUNPCKLBW128 
IX86_BUILTIN_PUNPCKLWD128 
IX86_BUILTIN_PUNPCKLDQ128 
IX86_BUILTIN_PUNPCKLQDQ128 
IX86_BUILTIN_CLFLUSH 
IX86_BUILTIN_MFENCE 
IX86_BUILTIN_LFENCE 
IX86_BUILTIN_ADDSUBPS 
IX86_BUILTIN_HADDPS 
IX86_BUILTIN_HSUBPS 
IX86_BUILTIN_MOVSHDUP 
IX86_BUILTIN_MOVSLDUP 
IX86_BUILTIN_ADDSUBPD 
IX86_BUILTIN_HADDPD 
IX86_BUILTIN_HSUBPD 
IX86_BUILTIN_LDDQU 
IX86_BUILTIN_MONITOR 
IX86_BUILTIN_MWAIT 
IX86_BUILTIN_VEC_INIT_V2SI 
IX86_BUILTIN_VEC_INIT_V4HI 
IX86_BUILTIN_VEC_INIT_V8QI 
IX86_BUILTIN_VEC_EXT_V2DF 
IX86_BUILTIN_VEC_EXT_V2DI 
IX86_BUILTIN_VEC_EXT_V4SF 
IX86_BUILTIN_VEC_EXT_V4SI 
IX86_BUILTIN_VEC_EXT_V8HI 
IX86_BUILTIN_VEC_EXT_V2SI 
IX86_BUILTIN_VEC_EXT_V4HI 
IX86_BUILTIN_VEC_SET_V8HI 
IX86_BUILTIN_VEC_SET_V4HI 
IX86_BUILTIN_MAX 
IX86_BUILTIN_ADDPS 
IX86_BUILTIN_ADDSS 
IX86_BUILTIN_DIVPS 
IX86_BUILTIN_DIVSS 
IX86_BUILTIN_MULPS 
IX86_BUILTIN_MULSS 
IX86_BUILTIN_SUBPS 
IX86_BUILTIN_SUBSS 
IX86_BUILTIN_CMPEQPS 
IX86_BUILTIN_CMPLTPS 
IX86_BUILTIN_CMPLEPS 
IX86_BUILTIN_CMPGTPS 
IX86_BUILTIN_CMPGEPS 
IX86_BUILTIN_CMPNEQPS 
IX86_BUILTIN_CMPNLTPS 
IX86_BUILTIN_CMPNLEPS 
IX86_BUILTIN_CMPNGTPS 
IX86_BUILTIN_CMPNGEPS 
IX86_BUILTIN_CMPORDPS 
IX86_BUILTIN_CMPUNORDPS 
IX86_BUILTIN_CMPEQSS 
IX86_BUILTIN_CMPLTSS 
IX86_BUILTIN_CMPLESS 
IX86_BUILTIN_CMPNEQSS 
IX86_BUILTIN_CMPNLTSS 
IX86_BUILTIN_CMPNLESS 
IX86_BUILTIN_CMPNGTSS 
IX86_BUILTIN_CMPNGESS 
IX86_BUILTIN_CMPORDSS 
IX86_BUILTIN_CMPUNORDSS 
IX86_BUILTIN_COMIEQSS 
IX86_BUILTIN_COMILTSS 
IX86_BUILTIN_COMILESS 
IX86_BUILTIN_COMIGTSS 
IX86_BUILTIN_COMIGESS 
IX86_BUILTIN_COMINEQSS 
IX86_BUILTIN_UCOMIEQSS 
IX86_BUILTIN_UCOMILTSS 
IX86_BUILTIN_UCOMILESS 
IX86_BUILTIN_UCOMIGTSS 
IX86_BUILTIN_UCOMIGESS 
IX86_BUILTIN_UCOMINEQSS 
IX86_BUILTIN_CVTPI2PS 
IX86_BUILTIN_CVTPS2PI 
IX86_BUILTIN_CVTSI2SS 
IX86_BUILTIN_CVTSI642SS 
IX86_BUILTIN_CVTSS2SI 
IX86_BUILTIN_CVTSS2SI64 
IX86_BUILTIN_CVTTPS2PI 
IX86_BUILTIN_CVTTSS2SI 
IX86_BUILTIN_CVTTSS2SI64 
IX86_BUILTIN_MAXPS 
IX86_BUILTIN_MAXSS 
IX86_BUILTIN_MINPS 
IX86_BUILTIN_MINSS 
IX86_BUILTIN_LOADUPS 
IX86_BUILTIN_STOREUPS 
IX86_BUILTIN_MOVSS 
IX86_BUILTIN_MOVHLPS 
IX86_BUILTIN_MOVLHPS 
IX86_BUILTIN_LOADHPS 
IX86_BUILTIN_LOADLPS 
IX86_BUILTIN_STOREHPS 
IX86_BUILTIN_STORELPS 
IX86_BUILTIN_MASKMOVQ 
IX86_BUILTIN_MOVMSKPS 
IX86_BUILTIN_PMOVMSKB 
IX86_BUILTIN_MOVNTPS 
IX86_BUILTIN_MOVNTQ 
IX86_BUILTIN_LOADDQU 
IX86_BUILTIN_STOREDQU 
IX86_BUILTIN_PACKSSWB 
IX86_BUILTIN_PACKSSDW 
IX86_BUILTIN_PACKUSWB 
IX86_BUILTIN_PADDB 
IX86_BUILTIN_PADDW 
IX86_BUILTIN_PADDD 
IX86_BUILTIN_PADDQ 
IX86_BUILTIN_PADDSB 
IX86_BUILTIN_PADDSW 
IX86_BUILTIN_PADDUSB 
IX86_BUILTIN_PADDUSW 
IX86_BUILTIN_PSUBB 
IX86_BUILTIN_PSUBW 
IX86_BUILTIN_PSUBD 
IX86_BUILTIN_PSUBQ 
IX86_BUILTIN_PSUBSB 
IX86_BUILTIN_PSUBSW 
IX86_BUILTIN_PSUBUSB 
IX86_BUILTIN_PSUBUSW 
IX86_BUILTIN_PAND 
IX86_BUILTIN_PANDN 
IX86_BUILTIN_POR 
IX86_BUILTIN_PXOR 
IX86_BUILTIN_PAVGB 
IX86_BUILTIN_PAVGW 
IX86_BUILTIN_PCMPEQB 
IX86_BUILTIN_PCMPEQW 
IX86_BUILTIN_PCMPEQD 
IX86_BUILTIN_PCMPGTB 
IX86_BUILTIN_PCMPGTW 
IX86_BUILTIN_PCMPGTD 
IX86_BUILTIN_PMADDWD 
IX86_BUILTIN_PMAXSW 
IX86_BUILTIN_PMAXUB 
IX86_BUILTIN_PMINSW 
IX86_BUILTIN_PMINUB 
IX86_BUILTIN_PMULHUW 
IX86_BUILTIN_PMULHW 
IX86_BUILTIN_PMULLW 
IX86_BUILTIN_PSADBW 
IX86_BUILTIN_PSHUFW 
IX86_BUILTIN_PSLLW 
IX86_BUILTIN_PSLLD 
IX86_BUILTIN_PSLLQ 
IX86_BUILTIN_PSRAW 
IX86_BUILTIN_PSRAD 
IX86_BUILTIN_PSRLW 
IX86_BUILTIN_PSRLD 
IX86_BUILTIN_PSRLQ 
IX86_BUILTIN_PSLLWI 
IX86_BUILTIN_PSLLDI 
IX86_BUILTIN_PSLLQI 
IX86_BUILTIN_PSRAWI 
IX86_BUILTIN_PSRADI 
IX86_BUILTIN_PSRLWI 
IX86_BUILTIN_PSRLDI 
IX86_BUILTIN_PSRLQI 
IX86_BUILTIN_PUNPCKHBW 
IX86_BUILTIN_PUNPCKHWD 
IX86_BUILTIN_PUNPCKHDQ 
IX86_BUILTIN_PUNPCKLBW 
IX86_BUILTIN_PUNPCKLWD 
IX86_BUILTIN_PUNPCKLDQ 
IX86_BUILTIN_SHUFPS 
IX86_BUILTIN_RCPPS 
IX86_BUILTIN_RCPSS 
IX86_BUILTIN_RSQRTPS 
IX86_BUILTIN_RSQRTSS 
IX86_BUILTIN_SQRTPS 
IX86_BUILTIN_SQRTSS 
IX86_BUILTIN_UNPCKHPS 
IX86_BUILTIN_UNPCKLPS 
IX86_BUILTIN_ANDPS 
IX86_BUILTIN_ANDNPS 
IX86_BUILTIN_ORPS 
IX86_BUILTIN_XORPS 
IX86_BUILTIN_EMMS 
IX86_BUILTIN_LDMXCSR 
IX86_BUILTIN_STMXCSR 
IX86_BUILTIN_SFENCE 
IX86_BUILTIN_FEMMS 
IX86_BUILTIN_PAVGUSB 
IX86_BUILTIN_PF2ID 
IX86_BUILTIN_PFACC 
IX86_BUILTIN_PFADD 
IX86_BUILTIN_PFCMPEQ 
IX86_BUILTIN_PFCMPGE 
IX86_BUILTIN_PFCMPGT 
IX86_BUILTIN_PFMAX 
IX86_BUILTIN_PFMIN 
IX86_BUILTIN_PFMUL 
IX86_BUILTIN_PFRCP 
IX86_BUILTIN_PFRCPIT1 
IX86_BUILTIN_PFRCPIT2 
IX86_BUILTIN_PFRSQIT1 
IX86_BUILTIN_PFRSQRT 
IX86_BUILTIN_PFSUB 
IX86_BUILTIN_PFSUBR 
IX86_BUILTIN_PI2FD 
IX86_BUILTIN_PMULHRW 
IX86_BUILTIN_PF2IW 
IX86_BUILTIN_PFNACC 
IX86_BUILTIN_PFPNACC 
IX86_BUILTIN_PI2FW 
IX86_BUILTIN_PSWAPDSI 
IX86_BUILTIN_PSWAPDSF 
IX86_BUILTIN_ADDPD 
IX86_BUILTIN_ADDSD 
IX86_BUILTIN_DIVPD 
IX86_BUILTIN_DIVSD 
IX86_BUILTIN_MULPD 
IX86_BUILTIN_MULSD 
IX86_BUILTIN_SUBPD 
IX86_BUILTIN_SUBSD 
IX86_BUILTIN_CMPEQPD 
IX86_BUILTIN_CMPLTPD 
IX86_BUILTIN_CMPLEPD 
IX86_BUILTIN_CMPGTPD 
IX86_BUILTIN_CMPGEPD 
IX86_BUILTIN_CMPNEQPD 
IX86_BUILTIN_CMPNLTPD 
IX86_BUILTIN_CMPNLEPD 
IX86_BUILTIN_CMPNGTPD 
IX86_BUILTIN_CMPNGEPD 
IX86_BUILTIN_CMPORDPD 
IX86_BUILTIN_CMPUNORDPD 
IX86_BUILTIN_CMPNEPD 
IX86_BUILTIN_CMPEQSD 
IX86_BUILTIN_CMPLTSD 
IX86_BUILTIN_CMPLESD 
IX86_BUILTIN_CMPNEQSD 
IX86_BUILTIN_CMPNLTSD 
IX86_BUILTIN_CMPNLESD 
IX86_BUILTIN_CMPORDSD 
IX86_BUILTIN_CMPUNORDSD 
IX86_BUILTIN_CMPNESD 
IX86_BUILTIN_COMIEQSD 
IX86_BUILTIN_COMILTSD 
IX86_BUILTIN_COMILESD 
IX86_BUILTIN_COMIGTSD 
IX86_BUILTIN_COMIGESD 
IX86_BUILTIN_COMINEQSD 
IX86_BUILTIN_UCOMIEQSD 
IX86_BUILTIN_UCOMILTSD 
IX86_BUILTIN_UCOMILESD 
IX86_BUILTIN_UCOMIGTSD 
IX86_BUILTIN_UCOMIGESD 
IX86_BUILTIN_UCOMINEQSD 
IX86_BUILTIN_MAXPD 
IX86_BUILTIN_MAXSD 
IX86_BUILTIN_MINPD 
IX86_BUILTIN_MINSD 
IX86_BUILTIN_ANDPD 
IX86_BUILTIN_ANDNPD 
IX86_BUILTIN_ORPD 
IX86_BUILTIN_XORPD 
IX86_BUILTIN_SQRTPD 
IX86_BUILTIN_SQRTSD 
IX86_BUILTIN_UNPCKHPD 
IX86_BUILTIN_UNPCKLPD 
IX86_BUILTIN_SHUFPD 
IX86_BUILTIN_LOADUPD 
IX86_BUILTIN_STOREUPD 
IX86_BUILTIN_MOVSD 
IX86_BUILTIN_LOADHPD 
IX86_BUILTIN_LOADLPD 
IX86_BUILTIN_CVTDQ2PD 
IX86_BUILTIN_CVTDQ2PS 
IX86_BUILTIN_CVTPD2DQ 
IX86_BUILTIN_CVTPD2PI 
IX86_BUILTIN_CVTPD2PS 
IX86_BUILTIN_CVTTPD2DQ 
IX86_BUILTIN_CVTTPD2PI 
IX86_BUILTIN_CVTPI2PD 
IX86_BUILTIN_CVTSI2SD 
IX86_BUILTIN_CVTSI642SD 
IX86_BUILTIN_CVTSD2SI 
IX86_BUILTIN_CVTSD2SI64 
IX86_BUILTIN_CVTSD2SS 
IX86_BUILTIN_CVTSS2SD 
IX86_BUILTIN_CVTTSD2SI 
IX86_BUILTIN_CVTTSD2SI64 
IX86_BUILTIN_CVTPS2DQ 
IX86_BUILTIN_CVTPS2PD 
IX86_BUILTIN_CVTTPS2DQ 
IX86_BUILTIN_MOVNTI 
IX86_BUILTIN_MOVNTPD 
IX86_BUILTIN_MOVNTDQ 
IX86_BUILTIN_MASKMOVDQU 
IX86_BUILTIN_MOVMSKPD 
IX86_BUILTIN_PMOVMSKB128 
IX86_BUILTIN_PACKSSWB128 
IX86_BUILTIN_PACKSSDW128 
IX86_BUILTIN_PACKUSWB128 
IX86_BUILTIN_PADDB128 
IX86_BUILTIN_PADDW128 
IX86_BUILTIN_PADDD128 
IX86_BUILTIN_PADDQ128 
IX86_BUILTIN_PADDSB128 
IX86_BUILTIN_PADDSW128 
IX86_BUILTIN_PADDUSB128 
IX86_BUILTIN_PADDUSW128 
IX86_BUILTIN_PSUBB128 
IX86_BUILTIN_PSUBW128 
IX86_BUILTIN_PSUBD128 
IX86_BUILTIN_PSUBQ128 
IX86_BUILTIN_PSUBSB128 
IX86_BUILTIN_PSUBSW128 
IX86_BUILTIN_PSUBUSB128 
IX86_BUILTIN_PSUBUSW128 
IX86_BUILTIN_PAND128 
IX86_BUILTIN_PANDN128 
IX86_BUILTIN_POR128 
IX86_BUILTIN_PXOR128 
IX86_BUILTIN_PAVGB128 
IX86_BUILTIN_PAVGW128 
IX86_BUILTIN_PCMPEQB128 
IX86_BUILTIN_PCMPEQW128 
IX86_BUILTIN_PCMPEQD128 
IX86_BUILTIN_PCMPGTB128 
IX86_BUILTIN_PCMPGTW128 
IX86_BUILTIN_PCMPGTD128 
IX86_BUILTIN_PMADDWD128 
IX86_BUILTIN_PMAXSW128 
IX86_BUILTIN_PMAXUB128 
IX86_BUILTIN_PMINSW128 
IX86_BUILTIN_PMINUB128 
IX86_BUILTIN_PMULUDQ 
IX86_BUILTIN_PMULUDQ128 
IX86_BUILTIN_PMULHUW128 
IX86_BUILTIN_PMULHW128 
IX86_BUILTIN_PMULLW128 
IX86_BUILTIN_PSADBW128 
IX86_BUILTIN_PSHUFHW 
IX86_BUILTIN_PSHUFLW 
IX86_BUILTIN_PSHUFD 
IX86_BUILTIN_PSLLW128 
IX86_BUILTIN_PSLLD128 
IX86_BUILTIN_PSLLQ128 
IX86_BUILTIN_PSRAW128 
IX86_BUILTIN_PSRAD128 
IX86_BUILTIN_PSRLW128 
IX86_BUILTIN_PSRLD128 
IX86_BUILTIN_PSRLQ128 
IX86_BUILTIN_PSLLDQI128 
IX86_BUILTIN_PSLLWI128 
IX86_BUILTIN_PSLLDI128 
IX86_BUILTIN_PSLLQI128 
IX86_BUILTIN_PSRAWI128 
IX86_BUILTIN_PSRADI128 
IX86_BUILTIN_PSRLDQI128 
IX86_BUILTIN_PSRLWI128 
IX86_BUILTIN_PSRLDI128 
IX86_BUILTIN_PSRLQI128 
IX86_BUILTIN_PUNPCKHBW128 
IX86_BUILTIN_PUNPCKHWD128 
IX86_BUILTIN_PUNPCKHDQ128 
IX86_BUILTIN_PUNPCKHQDQ128 
IX86_BUILTIN_PUNPCKLBW128 
IX86_BUILTIN_PUNPCKLWD128 
IX86_BUILTIN_PUNPCKLDQ128 
IX86_BUILTIN_PUNPCKLQDQ128 
IX86_BUILTIN_CLFLUSH 
IX86_BUILTIN_MFENCE 
IX86_BUILTIN_LFENCE 
IX86_BUILTIN_ADDSUBPS 
IX86_BUILTIN_HADDPS 
IX86_BUILTIN_HSUBPS 
IX86_BUILTIN_MOVSHDUP 
IX86_BUILTIN_MOVSLDUP 
IX86_BUILTIN_ADDSUBPD 
IX86_BUILTIN_HADDPD 
IX86_BUILTIN_HSUBPD 
IX86_BUILTIN_LDDQU 
IX86_BUILTIN_MOVNTSS 
IX86_BUILTIN_MOVNTSD 
IX86_BUILTIN_EXTRQI 
IX86_BUILTIN_EXTRQ 
IX86_BUILTIN_INSERTQI 
IX86_BUILTIN_INSERTQ 
IX86_BUILTIN_MONITOR 
IX86_BUILTIN_MWAIT 
IX86_BUILTIN_VEC_INIT_V2SI 
IX86_BUILTIN_VEC_INIT_V4HI 
IX86_BUILTIN_VEC_INIT_V8QI 
IX86_BUILTIN_VEC_EXT_V2DF 
IX86_BUILTIN_VEC_EXT_V2DI 
IX86_BUILTIN_VEC_EXT_V4SF 
IX86_BUILTIN_VEC_EXT_V4SI 
IX86_BUILTIN_VEC_EXT_V8HI 
IX86_BUILTIN_VEC_EXT_V2SI 
IX86_BUILTIN_VEC_EXT_V4HI 
IX86_BUILTIN_VEC_SET_V8HI 
IX86_BUILTIN_VEC_SET_V4HI 
IX86_BUILTIN_MAX 

Definition at line 2054 of file i386.h.

Enumerator:
PROCESSOR_EV4 
PROCESSOR_EV5 
PROCESSOR_EV6 
PROCESSOR_I386 
PROCESSOR_I486 
PROCESSOR_PENTIUM 
PROCESSOR_PENTIUMPRO 
PROCESSOR_K6 
PROCESSOR_ATHLON 
PROCESSOR_PENTIUM4 
PROCESSOR_max 
PROCESSOR_M88100 
PROCESSOR_M88110 
PROCESSOR_M88000 
PROCESSOR_700 
PROCESSOR_7100 
PROCESSOR_7100LC 
PROCESSOR_7200 
PROCESSOR_8000 
PROCESSOR_RIOS1 
PROCESSOR_RIOS2 
PROCESSOR_RS64A 
PROCESSOR_MPCCORE 
PROCESSOR_PPC403 
PROCESSOR_PPC405 
PROCESSOR_PPC601 
PROCESSOR_PPC603 
PROCESSOR_PPC604 
PROCESSOR_PPC604e 
PROCESSOR_PPC620 
PROCESSOR_PPC630 
PROCESSOR_PPC750 
PROCESSOR_PPC7400 
PROCESSOR_PPC7450 
PROCESSOR_SH1 
PROCESSOR_SH2 
PROCESSOR_SH3 
PROCESSOR_SH3E 
PROCESSOR_SH4 
PROCESSOR_SH5 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_V7 
PROCESSOR_CYPRESS 
PROCESSOR_V8 
PROCESSOR_SUPERSPARC 
PROCESSOR_SPARCLITE 
PROCESSOR_F930 
PROCESSOR_F934 
PROCESSOR_HYPERSPARC 
PROCESSOR_SPARCLITE86X 
PROCESSOR_SPARCLET 
PROCESSOR_TSC701 
PROCESSOR_V9 
PROCESSOR_ULTRASPARC 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_EV4 
PROCESSOR_EV5 
PROCESSOR_EV6 
PROCESSOR_I386 
PROCESSOR_I486 
PROCESSOR_PENTIUM 
PROCESSOR_PENTIUMPRO 
PROCESSOR_K6 
PROCESSOR_ATHLON 
PROCESSOR_PENTIUM4 
PROCESSOR_max 
PROCESSOR_M88100 
PROCESSOR_M88110 
PROCESSOR_M88000 
PROCESSOR_700 
PROCESSOR_7100 
PROCESSOR_7100LC 
PROCESSOR_7200 
PROCESSOR_8000 
PROCESSOR_RIOS1 
PROCESSOR_RIOS2 
PROCESSOR_RS64A 
PROCESSOR_MPCCORE 
PROCESSOR_PPC403 
PROCESSOR_PPC405 
PROCESSOR_PPC601 
PROCESSOR_PPC603 
PROCESSOR_PPC604 
PROCESSOR_PPC604e 
PROCESSOR_PPC620 
PROCESSOR_PPC630 
PROCESSOR_PPC750 
PROCESSOR_PPC7400 
PROCESSOR_PPC7450 
PROCESSOR_SH1 
PROCESSOR_SH2 
PROCESSOR_SH3 
PROCESSOR_SH3E 
PROCESSOR_SH4 
PROCESSOR_SH5 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_V7 
PROCESSOR_CYPRESS 
PROCESSOR_V8 
PROCESSOR_SUPERSPARC 
PROCESSOR_SPARCLITE 
PROCESSOR_F930 
PROCESSOR_F934 
PROCESSOR_HYPERSPARC 
PROCESSOR_SPARCLITE86X 
PROCESSOR_SPARCLET 
PROCESSOR_TSC701 
PROCESSOR_V9 
PROCESSOR_ULTRASPARC 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_EV4 
PROCESSOR_EV5 
PROCESSOR_EV6 
PROCESSOR_MAX 
ARM_CORE 
PROCESSOR_I386 
PROCESSOR_I486 
PROCESSOR_PENTIUM 
PROCESSOR_PENTIUMPRO 
PROCESSOR_K6 
PROCESSOR_ATHLON 
PROCESSOR_PENTIUM4 
PROCESSOR_K8 
PROCESSOR_NOCONA 
PROCESSOR_max 
PROCESSOR_ITANIUM 
PROCESSOR_ITANIUM2 
PROCESSOR_max 
PROCESSOR_DEFAULT 
PROCESSOR_IQ2000 
PROCESSOR_IQ10 
PROCESSOR_DEFAULT 
PROCESSOR_4KC 
PROCESSOR_5KC 
PROCESSOR_20KC 
PROCESSOR_M4K 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4130 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R7000 
PROCESSOR_R8000 
PROCESSOR_R9000 
PROCESSOR_SB1 
PROCESSOR_SR71000 
PROCESSOR_700 
PROCESSOR_7100 
PROCESSOR_7100LC 
PROCESSOR_7200 
PROCESSOR_7300 
PROCESSOR_8000 
PROCESSOR_RIOS1 
PROCESSOR_RIOS2 
PROCESSOR_RS64A 
PROCESSOR_MPCCORE 
PROCESSOR_PPC403 
PROCESSOR_PPC405 
PROCESSOR_PPC440 
PROCESSOR_PPC601 
PROCESSOR_PPC603 
PROCESSOR_PPC604 
PROCESSOR_PPC604e 
PROCESSOR_PPC620 
PROCESSOR_PPC630 
PROCESSOR_PPC750 
PROCESSOR_PPC7400 
PROCESSOR_PPC7450 
PROCESSOR_PPC8540 
PROCESSOR_POWER4 
PROCESSOR_POWER5 
PROCESSOR_9672_G5 
PROCESSOR_9672_G6 
PROCESSOR_2064_Z900 
PROCESSOR_2084_Z990 
PROCESSOR_max 
PROCESSOR_SH1 
PROCESSOR_SH2 
PROCESSOR_SH2E 
PROCESSOR_SH2A 
PROCESSOR_SH3 
PROCESSOR_SH3E 
PROCESSOR_SH4 
PROCESSOR_SH4A 
PROCESSOR_SH5 
PROCESSOR_V7 
PROCESSOR_CYPRESS 
PROCESSOR_V8 
PROCESSOR_SUPERSPARC 
PROCESSOR_SPARCLITE 
PROCESSOR_F930 
PROCESSOR_F934 
PROCESSOR_HYPERSPARC 
PROCESSOR_SPARCLITE86X 
PROCESSOR_SPARCLET 
PROCESSOR_TSC701 
PROCESSOR_V9 
PROCESSOR_ULTRASPARC 
PROCESSOR_ULTRASPARC3 
PROCESSOR_EV4 
PROCESSOR_EV5 
PROCESSOR_EV6 
PROCESSOR_MAX 
ARM_CORE 
PROCESSOR_I386 
PROCESSOR_I486 
PROCESSOR_PENTIUM 
PROCESSOR_PENTIUMPRO 
PROCESSOR_K6 
PROCESSOR_ATHLON 
PROCESSOR_PENTIUM4 
PROCESSOR_K8 
PROCESSOR_NOCONA 
PROCESSOR_GENERIC32 
PROCESSOR_GENERIC64 
PROCESSOR_AMDFAM10 
PROCESSOR_max 
PROCESSOR_ITANIUM 
PROCESSOR_ITANIUM2 
PROCESSOR_max 
PROCESSOR_DEFAULT 
PROCESSOR_IQ2000 
PROCESSOR_IQ10 
PROCESSOR_R3000 
PROCESSOR_4KC 
PROCESSOR_4KP 
PROCESSOR_5KC 
PROCESSOR_5KF 
PROCESSOR_20KC 
PROCESSOR_24K 
PROCESSOR_24KX 
PROCESSOR_M4K 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4130 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R7000 
PROCESSOR_R8000 
PROCESSOR_R9000 
PROCESSOR_SB1 
PROCESSOR_SB1A 
PROCESSOR_SR71000 
PROCESSOR_MAX 
PROCESSOR_MN10300 
PROCESSOR_AM33 
PROCESSOR_AM33_2 
PROCESSOR_MS1_64_001 
PROCESSOR_MS1_16_002 
PROCESSOR_MS1_16_003 
PROCESSOR_MS2 
PROCESSOR_700 
PROCESSOR_7100 
PROCESSOR_7100LC 
PROCESSOR_7200 
PROCESSOR_7300 
PROCESSOR_8000 
PROCESSOR_RIOS1 
PROCESSOR_RIOS2 
PROCESSOR_RS64A 
PROCESSOR_MPCCORE 
PROCESSOR_PPC403 
PROCESSOR_PPC405 
PROCESSOR_PPC440 
PROCESSOR_PPC601 
PROCESSOR_PPC603 
PROCESSOR_PPC604 
PROCESSOR_PPC604e 
PROCESSOR_PPC620 
PROCESSOR_PPC630 
PROCESSOR_PPC750 
PROCESSOR_PPC7400 
PROCESSOR_PPC7450 
PROCESSOR_PPC8540 
PROCESSOR_POWER4 
PROCESSOR_POWER5 
PROCESSOR_9672_G5 
PROCESSOR_9672_G6 
PROCESSOR_2064_Z900 
PROCESSOR_2084_Z990 
PROCESSOR_2094_Z9_109 
PROCESSOR_max 
PROCESSOR_SH1 
PROCESSOR_SH2 
PROCESSOR_SH2E 
PROCESSOR_SH2A 
PROCESSOR_SH3 
PROCESSOR_SH3E 
PROCESSOR_SH4 
PROCESSOR_SH4A 
PROCESSOR_SH5 
PROCESSOR_V7 
PROCESSOR_CYPRESS 
PROCESSOR_V8 
PROCESSOR_SUPERSPARC 
PROCESSOR_SPARCLITE 
PROCESSOR_F930 
PROCESSOR_F934 
PROCESSOR_HYPERSPARC 
PROCESSOR_SPARCLITE86X 
PROCESSOR_SPARCLET 
PROCESSOR_TSC701 
PROCESSOR_V9 
PROCESSOR_ULTRASPARC 
PROCESSOR_ULTRASPARC3 
PROCESSOR_NIAGARA 

Definition at line 3362 of file i386.h.

enum reg_class

Enumerator:
NO_REGS 
R2 
R0_1 
INDEX_REGS 
BASE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LR0_REGS 
GENERAL_REGS 
BP_REGS 
FC_REGS 
CR_REGS 
Q_REGS 
SPECIAL_REGS 
ACCUM0_REGS 
ACCUM_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R24_REG 
R25_REG 
R27_REG 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LPCOUNT_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPU_REGS 
LO_REGS 
STACK_REG 
BASE_REGS 
HI_REGS 
CC_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
POINTER_X_REGS 
POINTER_Y_REGS 
POINTER_Z_REGS 
STACK_REG 
BASE_POINTER_REGS 
POINTER_REGS 
ADDW_REGS 
SIMPLE_LD_REGS 
LD_REGS 
NO_LD_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0R1_REGS 
R2R3_REGS 
EXT_LOW_REGS 
EXT_REGS 
ADDR_REGS 
INDEX_REGS 
BK_REG 
SP_REG 
RC_REG 
COUNTER_REGS 
INT_REGS 
GENERAL_REGS 
DP_REG 
ST_REG 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
S_REGS 
INDEX_REGS 
SP_REGS 
A_REGS 
SI_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
REPEAT_REGS 
CR_REGS 
ACCUM_REGS 
OTHER_FLAG_REGS 
F0_REGS 
F1_REGS 
BR_FLAG_REGS 
FLAG_REGS 
EVEN_REGS 
GPR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
A0H_REG 
A0L_REG 
A0_REG 
A1H_REG 
ACCUM_HIGH_REGS 
A1L_REG 
ACCUM_LOW_REGS 
A1_REG 
ACCUM_REGS 
X_REG 
X_OR_ACCUM_LOW_REGS 
X_OR_ACCUM_REGS 
YH_REG 
YH_OR_ACCUM_HIGH_REGS 
X_OR_YH_REGS 
YL_REG 
YL_OR_ACCUM_LOW_REGS 
X_OR_YL_REGS 
X_OR_Y_REGS 
Y_REG 
ACCUM_OR_Y_REGS 
PH_REG 
X_OR_PH_REGS 
PL_REG 
PL_OR_ACCUM_LOW_REGS 
X_OR_PL_REGS 
YL_OR_PL_OR_ACCUM_LOW_REGS 
P_REG 
ACCUM_OR_P_REGS 
YL_OR_P_REGS 
ACCUM_LOW_OR_YL_OR_P_REGS 
Y_OR_P_REGS 
ACCUM_Y_OR_P_REGS 
NO_FRAME_Y_ADDR_REGS 
Y_ADDR_REGS 
ACCUM_LOW_OR_Y_ADDR_REGS 
ACCUM_OR_Y_ADDR_REGS 
X_OR_Y_ADDR_REGS 
Y_OR_Y_ADDR_REGS 
P_OR_Y_ADDR_REGS 
NON_HIGH_YBASE_ELIGIBLE_REGS 
YBASE_ELIGIBLE_REGS 
J_REG 
J_OR_DAU_16_BIT_REGS 
BMU_REGS 
NOHIGH_NON_ADDR_REGS 
NON_ADDR_REGS 
SLOW_MEM_LOAD_REGS 
NOHIGH_NON_YBASE_REGS 
NO_ACCUM_NON_YBASE_REGS 
NON_YBASE_REGS 
YBASE_VIRT_REGS 
ACCUM_LOW_OR_YBASE_REGS 
ACCUM_OR_YBASE_REGS 
X_OR_YBASE_REGS 
Y_OR_YBASE_REGS 
ACCUM_LOW_YL_PL_OR_YBASE_REGS 
P_OR_YBASE_REGS 
ACCUM_Y_P_OR_YBASE_REGS 
Y_ADDR_OR_YBASE_REGS 
YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS 
YBASE_OR_YBASE_ELIGIBLE_REGS 
NO_HIGH_ALL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MULTIPLY_32_REG 
MULTIPLY_64_REG 
LOW_REGS 
HIGH_REGS 
REAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
MAC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ADDR_REGS 
DATA_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AREG 
DREG 
CREG 
BREG 
SIREG 
DIREG 
AD_REGS 
Q_REGS 
NON_Q_REGS 
INDEX_REGS 
LEGACY_REGS 
GENERAL_REGS 
FP_TOP_REG 
FP_SECOND_REG 
FLOAT_REGS 
SSE_REGS 
MMX_REGS 
FP_TOP_SSE_REGS 
FP_SECOND_SSE_REGS 
FLOAT_SSE_REGS 
FLOAT_INT_REGS 
INT_SSE_REGS 
FLOAT_INT_SSE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GLOBAL_REGS 
LOCAL_REGS 
LOCAL_OR_GLOBAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
PR_REGS 
BR_REGS 
AR_M_REGS 
AR_I_REGS 
ADDL_REGS 
GR_REGS 
FR_REGS 
GR_AND_BR_REGS 
GR_AND_FR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CARRY_REG 
ACCUM_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
D_REGS 
X_REGS 
Y_REGS 
SP_REGS 
DA_REGS 
DB_REGS 
Z_REGS 
D8_REGS 
Q_REGS 
D_OR_X_REGS 
D_OR_Y_REGS 
D_OR_SP_REGS 
X_OR_Y_REGS 
A_REGS 
X_OR_SP_REGS 
Y_OR_SP_REGS 
X_OR_Y_OR_D_REGS 
A_OR_D_REGS 
A_OR_SP_REGS 
H_REGS 
S_REGS 
D_OR_S_REGS 
X_OR_S_REGS 
Y_OR_S_REGS 
SP_OR_S_REGS 
D_OR_X_OR_S_REGS 
D_OR_Y_OR_S_REGS 
D_OR_SP_OR_S_REGS 
A_OR_S_REGS 
D_OR_A_OR_S_REGS 
TMP_REGS 
D_OR_A_OR_TMP_REGS 
G_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDR_REGS 
FP_REGS 
GENERAL_REGS 
DATA_OR_FP_REGS 
ADDR_OR_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AP_REG 
XRF_REGS 
GENERAL_REGS 
AGRF_REGS 
XGRF_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ONLYR1_REGS 
LRW_REGS 
GENERAL_REGS 
C_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
REMAINDER_REG 
HIMULT_REG 
SYSTEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
SP_REGS 
DATA_OR_ADDRESS_REGS 
SP_OR_ADDRESS_REGS 
EXTENDED_REGS 
DATA_OR_EXTENDED_REGS 
ADDRESS_OR_EXTENDED_REGS 
SP_OR_EXTENDED_REGS 
SP_OR_ADDRESS_OR_EXTENDED_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REG0 
LONG_FLOAT_REG0 
FLOAT_REGS 
FP_REGS 
GEN_AND_FP_REGS 
FRAME_POINTER_REG 
STACK_POINTER_REG 
GEN_AND_MEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MUL_REGS 
GENERAL_REGS 
LOAD_FPU_REGS 
NO_LOAD_FPU_REGS 
FPU_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
OUT_REGS 
STD_REGS 
ARG_REGS 
SRC_REGS 
DST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R15_REGS 
BASE_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BASE_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALTIVEC_REGS 
VRSAVE_REGS 
NON_SPECIAL_REGS 
MQ_REGS 
LINK_REGS 
CTR_REGS 
LINK_OR_CTR_REGS 
SPECIAL_REGS 
SPEC_OR_GEN_REGS 
CR0_REGS 
CR_REGS 
NON_FLOAT_REGS 
XER_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ADDR_REGS 
GENERAL_REGS 
FP_REGS 
ADDR_FP_REGS 
GENERAL_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
PR_REGS 
T_REGS 
MAC_REGS 
FPUL_REGS 
SIBCALL_REGS 
GENERAL_REGS 
FP0_REGS 
FP_REGS 
DF_REGS 
FPSCR_REGS 
GENERAL_FP_REGS 
TARGET_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPCC_REGS 
I64_REGS 
GENERAL_REGS 
FP_REGS 
EXTRA_FP_REGS 
GENERAL_OR_FP_REGS 
GENERAL_OR_EXTRA_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R1_REGS 
TWO_REGS 
R2_REGS 
EIGHT_REGS 
R8_REGS 
ICALL_REGS 
GENERAL_REGS 
CARRY_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BR_REGS 
FP_REGS 
ACC_REG 
SP_REG 
RL_REGS 
GR_REGS 
AR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R2 
R0_1 
INDEX_REGS 
BASE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LR0_REGS 
GENERAL_REGS 
BP_REGS 
FC_REGS 
CR_REGS 
Q_REGS 
SPECIAL_REGS 
ACCUM0_REGS 
ACCUM_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R24_REG 
R25_REG 
R27_REG 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LPCOUNT_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPU_REGS 
LO_REGS 
STACK_REG 
BASE_REGS 
HI_REGS 
CC_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
POINTER_X_REGS 
POINTER_Y_REGS 
POINTER_Z_REGS 
STACK_REG 
BASE_POINTER_REGS 
POINTER_REGS 
ADDW_REGS 
SIMPLE_LD_REGS 
LD_REGS 
NO_LD_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0R1_REGS 
R2R3_REGS 
EXT_LOW_REGS 
EXT_REGS 
ADDR_REGS 
INDEX_REGS 
BK_REG 
SP_REG 
RC_REG 
COUNTER_REGS 
INT_REGS 
GENERAL_REGS 
DP_REG 
ST_REG 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
S_REGS 
INDEX_REGS 
SP_REGS 
A_REGS 
SI_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
REPEAT_REGS 
CR_REGS 
ACCUM_REGS 
OTHER_FLAG_REGS 
F0_REGS 
F1_REGS 
BR_FLAG_REGS 
FLAG_REGS 
EVEN_REGS 
GPR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
A0H_REG 
A0L_REG 
A0_REG 
A1H_REG 
ACCUM_HIGH_REGS 
A1L_REG 
ACCUM_LOW_REGS 
A1_REG 
ACCUM_REGS 
X_REG 
X_OR_ACCUM_LOW_REGS 
X_OR_ACCUM_REGS 
YH_REG 
YH_OR_ACCUM_HIGH_REGS 
X_OR_YH_REGS 
YL_REG 
YL_OR_ACCUM_LOW_REGS 
X_OR_YL_REGS 
X_OR_Y_REGS 
Y_REG 
ACCUM_OR_Y_REGS 
PH_REG 
X_OR_PH_REGS 
PL_REG 
PL_OR_ACCUM_LOW_REGS 
X_OR_PL_REGS 
YL_OR_PL_OR_ACCUM_LOW_REGS 
P_REG 
ACCUM_OR_P_REGS 
YL_OR_P_REGS 
ACCUM_LOW_OR_YL_OR_P_REGS 
Y_OR_P_REGS 
ACCUM_Y_OR_P_REGS 
NO_FRAME_Y_ADDR_REGS 
Y_ADDR_REGS 
ACCUM_LOW_OR_Y_ADDR_REGS 
ACCUM_OR_Y_ADDR_REGS 
X_OR_Y_ADDR_REGS 
Y_OR_Y_ADDR_REGS 
P_OR_Y_ADDR_REGS 
NON_HIGH_YBASE_ELIGIBLE_REGS 
YBASE_ELIGIBLE_REGS 
J_REG 
J_OR_DAU_16_BIT_REGS 
BMU_REGS 
NOHIGH_NON_ADDR_REGS 
NON_ADDR_REGS 
SLOW_MEM_LOAD_REGS 
NOHIGH_NON_YBASE_REGS 
NO_ACCUM_NON_YBASE_REGS 
NON_YBASE_REGS 
YBASE_VIRT_REGS 
ACCUM_LOW_OR_YBASE_REGS 
ACCUM_OR_YBASE_REGS 
X_OR_YBASE_REGS 
Y_OR_YBASE_REGS 
ACCUM_LOW_YL_PL_OR_YBASE_REGS 
P_OR_YBASE_REGS 
ACCUM_Y_P_OR_YBASE_REGS 
Y_ADDR_OR_YBASE_REGS 
YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS 
YBASE_OR_YBASE_ELIGIBLE_REGS 
NO_HIGH_ALL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MULTIPLY_32_REG 
MULTIPLY_64_REG 
LOW_REGS 
HIGH_REGS 
REAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
MAC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ADDR_REGS 
DATA_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AREG 
DREG 
CREG 
BREG 
SIREG 
DIREG 
AD_REGS 
Q_REGS 
NON_Q_REGS 
INDEX_REGS 
LEGACY_REGS 
GENERAL_REGS 
FP_TOP_REG 
FP_SECOND_REG 
FLOAT_REGS 
SSE_REGS 
MMX_REGS 
FP_TOP_SSE_REGS 
FP_SECOND_SSE_REGS 
FLOAT_SSE_REGS 
FLOAT_INT_REGS 
INT_SSE_REGS 
FLOAT_INT_SSE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GLOBAL_REGS 
LOCAL_REGS 
LOCAL_OR_GLOBAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
PR_REGS 
BR_REGS 
AR_M_REGS 
AR_I_REGS 
ADDL_REGS 
GR_REGS 
FR_REGS 
GR_AND_BR_REGS 
GR_AND_FR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CARRY_REG 
ACCUM_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
D_REGS 
X_REGS 
Y_REGS 
SP_REGS 
DA_REGS 
DB_REGS 
Z_REGS 
D8_REGS 
Q_REGS 
D_OR_X_REGS 
D_OR_Y_REGS 
D_OR_SP_REGS 
X_OR_Y_REGS 
A_REGS 
X_OR_SP_REGS 
Y_OR_SP_REGS 
X_OR_Y_OR_D_REGS 
A_OR_D_REGS 
A_OR_SP_REGS 
H_REGS 
S_REGS 
D_OR_S_REGS 
X_OR_S_REGS 
Y_OR_S_REGS 
SP_OR_S_REGS 
D_OR_X_OR_S_REGS 
D_OR_Y_OR_S_REGS 
D_OR_SP_OR_S_REGS 
A_OR_S_REGS 
D_OR_A_OR_S_REGS 
TMP_REGS 
D_OR_A_OR_TMP_REGS 
G_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDR_REGS 
FP_REGS 
GENERAL_REGS 
DATA_OR_FP_REGS 
ADDR_OR_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AP_REG 
XRF_REGS 
GENERAL_REGS 
AGRF_REGS 
XGRF_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ONLYR1_REGS 
LRW_REGS 
GENERAL_REGS 
C_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
REMAINDER_REG 
HIMULT_REG 
SYSTEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
SP_REGS 
DATA_OR_ADDRESS_REGS 
SP_OR_ADDRESS_REGS 
EXTENDED_REGS 
DATA_OR_EXTENDED_REGS 
ADDRESS_OR_EXTENDED_REGS 
SP_OR_EXTENDED_REGS 
SP_OR_ADDRESS_OR_EXTENDED_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REG0 
LONG_FLOAT_REG0 
FLOAT_REGS 
FP_REGS 
GEN_AND_FP_REGS 
FRAME_POINTER_REG 
STACK_POINTER_REG 
GEN_AND_MEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MUL_REGS 
GENERAL_REGS 
LOAD_FPU_REGS 
NO_LOAD_FPU_REGS 
FPU_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
OUT_REGS 
STD_REGS 
ARG_REGS 
SRC_REGS 
DST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R15_REGS 
BASE_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BASE_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALTIVEC_REGS 
VRSAVE_REGS 
NON_SPECIAL_REGS 
MQ_REGS 
LINK_REGS 
CTR_REGS 
LINK_OR_CTR_REGS 
SPECIAL_REGS 
SPEC_OR_GEN_REGS 
CR0_REGS 
CR_REGS 
NON_FLOAT_REGS 
XER_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ADDR_REGS 
GENERAL_REGS 
FP_REGS 
ADDR_FP_REGS 
GENERAL_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
PR_REGS 
T_REGS 
MAC_REGS 
FPUL_REGS 
SIBCALL_REGS 
GENERAL_REGS 
FP0_REGS 
FP_REGS 
DF_REGS 
FPSCR_REGS 
GENERAL_FP_REGS 
TARGET_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPCC_REGS 
I64_REGS 
GENERAL_REGS 
FP_REGS 
EXTRA_FP_REGS 
GENERAL_OR_FP_REGS 
GENERAL_OR_EXTRA_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R1_REGS 
TWO_REGS 
R2_REGS 
EIGHT_REGS 
R8_REGS 
ICALL_REGS 
GENERAL_REGS 
CARRY_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BR_REGS 
FP_REGS 
ACC_REG 
SP_REG 
RL_REGS 
GR_REGS 
AR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
R24_REG 
R25_REG 
R27_REG 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LPCOUNT_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPA_REGS 
CIRRUS_REGS 
VFP_REGS 
IWMMXT_GR_REGS 
IWMMXT_REGS 
LO_REGS 
STACK_REG 
BASE_REGS 
HI_REGS 
CC_REG 
VFPCC_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
POINTER_X_REGS 
POINTER_Y_REGS 
POINTER_Z_REGS 
STACK_REG 
BASE_POINTER_REGS 
POINTER_REGS 
ADDW_REGS 
SIMPLE_LD_REGS 
LD_REGS 
NO_LD_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
IREGS 
BREGS 
LREGS 
MREGS 
CIRCREGS 
DAGREGS 
EVEN_AREGS 
ODD_AREGS 
AREGS 
CCREGS 
EVEN_DREGS 
ODD_DREGS 
DREGS 
PREGS_CLOBBERED 
PREGS 
DPREGS 
MOST_REGS 
PROLOGUE_REGS 
NON_A_CC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0R1_REGS 
R2R3_REGS 
EXT_LOW_REGS 
EXT_REGS 
ADDR_REGS 
INDEX_REGS 
BK_REG 
SP_REG 
RC_REG 
COUNTER_REGS 
INT_REGS 
GENERAL_REGS 
DP_REG 
ST_REG 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MULTIPLY_32_REG 
MULTIPLY_64_REG 
LOW_REGS 
HIGH_REGS 
REAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ICC_REGS 
FCC_REGS 
CC_REGS 
ICR_REGS 
FCR_REGS 
CR_REGS 
LCR_REG 
LR_REG 
GR8_REGS 
GR9_REGS 
GR89_REGS 
FDPIC_REGS 
FDPIC_FPTR_REGS 
FDPIC_CALL_REGS 
SPR_REGS 
QUAD_ACC_REGS 
EVEN_ACC_REGS 
ACC_REGS 
ACCG_REGS 
QUAD_FPR_REGS 
FEVEN_REGS 
FPR_REGS 
QUAD_REGS 
EVEN_REGS 
GPR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
COUNTER_REGS 
SOURCE_REGS 
DESTINATION_REGS 
GENERAL_REGS 
MAC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AREG 
DREG 
CREG 
BREG 
SIREG 
DIREG 
AD_REGS 
Q_REGS 
NON_Q_REGS 
INDEX_REGS 
LEGACY_REGS 
GENERAL_REGS 
FP_TOP_REG 
FP_SECOND_REG 
FLOAT_REGS 
SSE_REGS 
MMX_REGS 
FP_TOP_SSE_REGS 
FP_SECOND_SSE_REGS 
FLOAT_SSE_REGS 
FLOAT_INT_REGS 
INT_SSE_REGS 
FLOAT_INT_SSE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
PR_REGS 
BR_REGS 
AR_M_REGS 
AR_I_REGS 
ADDL_REGS 
GR_REGS 
FR_REGS 
GR_AND_BR_REGS 
GR_AND_FR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DPH_REGS 
DPL_REGS 
DP_REGS 
SP_REGS 
IPH_REGS 
IPL_REGS 
IP_REGS 
DP_SP_REGS 
PTR_REGS 
NONPTR_REGS 
NONSP_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CARRY_REG 
ACCUM_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
D_REGS 
X_REGS 
Y_REGS 
SP_REGS 
DA_REGS 
DB_REGS 
Z_REGS 
D8_REGS 
Q_REGS 
D_OR_X_REGS 
D_OR_Y_REGS 
D_OR_SP_REGS 
X_OR_Y_REGS 
A_REGS 
X_OR_SP_REGS 
Y_OR_SP_REGS 
X_OR_Y_OR_D_REGS 
A_OR_D_REGS 
A_OR_SP_REGS 
H_REGS 
S_REGS 
D_OR_S_REGS 
X_OR_S_REGS 
Y_OR_S_REGS 
Z_OR_S_REGS 
SP_OR_S_REGS 
D_OR_X_OR_S_REGS 
D_OR_Y_OR_S_REGS 
D_OR_SP_OR_S_REGS 
A_OR_S_REGS 
D_OR_A_OR_S_REGS 
TMP_REGS 
D_OR_A_OR_TMP_REGS 
G_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDR_REGS 
FP_REGS 
GENERAL_REGS 
DATA_OR_FP_REGS 
ADDR_OR_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ONLYR1_REGS 
LRW_REGS 
GENERAL_REGS 
C_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
PIC_FN_ADDR_REG 
LEA_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
REMAINDER_REG 
HIMULT_REG 
SYSTEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
SP_REGS 
DATA_OR_ADDRESS_REGS 
SP_OR_ADDRESS_REGS 
EXTENDED_REGS 
DATA_OR_EXTENDED_REGS 
ADDRESS_OR_EXTENDED_REGS 
SP_OR_EXTENDED_REGS 
SP_OR_ADDRESS_OR_EXTENDED_REGS 
FP_REGS 
FP_ACC_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REG0 
LONG_FLOAT_REG0 
FLOAT_REGS 
LONG_REGS 
FP_REGS 
GEN_AND_FP_REGS 
FRAME_POINTER_REG 
STACK_POINTER_REG 
GEN_AND_MEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MUL_REGS 
GENERAL_REGS 
LOAD_FPU_REGS 
NO_LOAD_FPU_REGS 
FPU_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BASE_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALTIVEC_REGS 
VRSAVE_REGS 
VSCR_REGS 
SPE_ACC_REGS 
SPEFSCR_REGS 
NON_SPECIAL_REGS 
MQ_REGS 
LINK_REGS 
CTR_REGS 
LINK_OR_CTR_REGS 
SPECIAL_REGS 
SPEC_OR_GEN_REGS 
CR0_REGS 
CR_REGS 
NON_FLOAT_REGS 
XER_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CC_REGS 
ADDR_REGS 
GENERAL_REGS 
ACCESS_REGS 
ADDR_CC_REGS 
GENERAL_CC_REGS 
FP_REGS 
ADDR_FP_REGS 
GENERAL_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
PR_REGS 
T_REGS 
MAC_REGS 
FPUL_REGS 
SIBCALL_REGS 
GENERAL_REGS 
FP0_REGS 
FP_REGS 
DF_HI_REGS 
DF_REGS 
FPSCR_REGS 
GENERAL_FP_REGS 
TARGET_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPCC_REGS 
I64_REGS 
GENERAL_REGS 
FP_REGS 
EXTRA_FP_REGS 
GENERAL_OR_FP_REGS 
GENERAL_OR_EXTRA_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R1_REGS 
TWO_REGS 
R2_REGS 
EIGHT_REGS 
R8_REGS 
ICALL_REGS 
GENERAL_REGS 
CARRY_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BR_REGS 
FP_REGS 
ACC_REG 
SP_REG 
RL_REGS 
GR_REGS 
AR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
R24_REG 
R25_REG 
R27_REG 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LPCOUNT_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPA_REGS 
CIRRUS_REGS 
VFP_REGS 
IWMMXT_GR_REGS 
IWMMXT_REGS 
LO_REGS 
STACK_REG 
BASE_REGS 
HI_REGS 
CC_REG 
VFPCC_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
POINTER_X_REGS 
POINTER_Y_REGS 
POINTER_Z_REGS 
STACK_REG 
BASE_POINTER_REGS 
POINTER_REGS 
ADDW_REGS 
SIMPLE_LD_REGS 
LD_REGS 
NO_LD_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
IREGS 
BREGS 
LREGS 
MREGS 
CIRCREGS 
DAGREGS 
EVEN_AREGS 
ODD_AREGS 
AREGS 
CCREGS 
EVEN_DREGS 
ODD_DREGS 
DREGS 
FDPIC_REGS 
FDPIC_FPTR_REGS 
PREGS_CLOBBERED 
PREGS 
IPREGS 
DPREGS 
MOST_REGS 
LT_REGS 
LC_REGS 
LB_REGS 
PROLOGUE_REGS 
NON_A_CC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0R1_REGS 
R2R3_REGS 
EXT_LOW_REGS 
EXT_REGS 
ADDR_REGS 
INDEX_REGS 
BK_REG 
SP_REG 
RC_REG 
COUNTER_REGS 
INT_REGS 
GENERAL_REGS 
DP_REG 
ST_REG 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MOF_REGS 
CC0_REGS 
SPECIAL_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LO_REGS 
HI_REGS 
HILO_REGS 
NOSP_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MULTIPLY_32_REG 
MULTIPLY_64_REG 
LOW_REGS 
HIGH_REGS 
REAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ICC_REGS 
FCC_REGS 
CC_REGS 
ICR_REGS 
FCR_REGS 
CR_REGS 
LCR_REG 
LR_REG 
GR8_REGS 
GR9_REGS 
GR89_REGS 
FDPIC_REGS 
FDPIC_FPTR_REGS 
FDPIC_CALL_REGS 
SPR_REGS 
QUAD_ACC_REGS 
EVEN_ACC_REGS 
ACC_REGS 
ACCG_REGS 
QUAD_FPR_REGS 
FEVEN_REGS 
FPR_REGS 
QUAD_REGS 
EVEN_REGS 
GPR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
COUNTER_REGS 
SOURCE_REGS 
DESTINATION_REGS 
GENERAL_REGS 
MAC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AREG 
DREG 
CREG 
BREG 
SIREG 
DIREG 
AD_REGS 
Q_REGS 
NON_Q_REGS 
INDEX_REGS 
LEGACY_REGS 
GENERAL_REGS 
FP_TOP_REG 
FP_SECOND_REG 
FLOAT_REGS 
SSE_REGS 
MMX_REGS 
FP_TOP_SSE_REGS 
FP_SECOND_SSE_REGS 
FLOAT_SSE_REGS 
FLOAT_INT_REGS 
INT_SSE_REGS 
FLOAT_INT_SSE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
PR_REGS 
BR_REGS 
AR_M_REGS 
AR_I_REGS 
ADDL_REGS 
GR_REGS 
FP_REGS 
FR_REGS 
GR_AND_BR_REGS 
GR_AND_FR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
SP_REGS 
FB_REGS 
SB_REGS 
CR_REGS 
R0_REGS 
R1_REGS 
R2_REGS 
R3_REGS 
R02_REGS 
HL_REGS 
QI_REGS 
R23_REGS 
R03_REGS 
DI_REGS 
A0_REGS 
A1_REGS 
A_REGS 
AD_REGS 
PS_REGS 
SI_REGS 
HI_REGS 
RA_REGS 
GENERAL_REGS 
FLG_REGS 
HC_REGS 
MEM_REGS 
R02_A_MEM_REGS 
A_HL_MEM_REGS 
R1_R3_A_MEM_REGS 
R03_MEM_REGS 
A_HI_MEM_REGS 
A_AD_CR_MEM_SI_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CARRY_REG 
ACCUM_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
D_REGS 
X_REGS 
Y_REGS 
SP_REGS 
DA_REGS 
DB_REGS 
Z_REGS 
D8_REGS 
Q_REGS 
D_OR_X_REGS 
D_OR_Y_REGS 
D_OR_SP_REGS 
X_OR_Y_REGS 
A_REGS 
X_OR_SP_REGS 
Y_OR_SP_REGS 
X_OR_Y_OR_D_REGS 
A_OR_D_REGS 
A_OR_SP_REGS 
H_REGS 
S_REGS 
D_OR_S_REGS 
X_OR_S_REGS 
Y_OR_S_REGS 
Z_OR_S_REGS 
SP_OR_S_REGS 
D_OR_X_OR_S_REGS 
D_OR_Y_OR_S_REGS 
D_OR_SP_OR_S_REGS 
A_OR_S_REGS 
D_OR_A_OR_S_REGS 
TMP_REGS 
D_OR_A_OR_TMP_REGS 
G_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDR_REGS 
FP_REGS 
GENERAL_REGS 
DATA_OR_FP_REGS 
ADDR_OR_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ONLYR1_REGS 
LRW_REGS 
GENERAL_REGS 
C_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
PIC_FN_ADDR_REG 
V1_REG 
LEA_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
DSP_ACC_REGS 
ACC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
REMAINDER_REG 
HIMULT_REG 
SYSTEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
SP_REGS 
DATA_OR_ADDRESS_REGS 
SP_OR_ADDRESS_REGS 
EXTENDED_REGS 
DATA_OR_EXTENDED_REGS 
ADDRESS_OR_EXTENDED_REGS 
SP_OR_EXTENDED_REGS 
SP_OR_ADDRESS_OR_EXTENDED_REGS 
FP_REGS 
FP_ACC_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MUL_REGS 
GENERAL_REGS 
LOAD_FPU_REGS 
NO_LOAD_FPU_REGS 
FPU_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BASE_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALTIVEC_REGS 
VRSAVE_REGS 
VSCR_REGS 
SPE_ACC_REGS 
SPEFSCR_REGS 
NON_SPECIAL_REGS 
MQ_REGS 
LINK_REGS 
CTR_REGS 
LINK_OR_CTR_REGS 
SPECIAL_REGS 
SPEC_OR_GEN_REGS 
CR0_REGS 
CR_REGS 
NON_FLOAT_REGS 
XER_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CC_REGS 
ADDR_REGS 
GENERAL_REGS 
ACCESS_REGS 
ADDR_CC_REGS 
GENERAL_CC_REGS 
FP_REGS 
ADDR_FP_REGS 
GENERAL_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
G16_REGS 
G32_REGS 
T32_REGS 
HI_REG 
LO_REG 
CE_REGS 
CN_REG 
LC_REG 
SC_REG 
SP_REGS 
CR_REGS 
CP1_REGS 
CP2_REGS 
CP3_REGS 
CPA_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
PR_REGS 
T_REGS 
MAC_REGS 
FPUL_REGS 
SIBCALL_REGS 
GENERAL_REGS 
FP0_REGS 
FP_REGS 
DF_HI_REGS 
DF_REGS 
FPSCR_REGS 
GENERAL_FP_REGS 
GENERAL_DF_REGS 
TARGET_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPCC_REGS 
I64_REGS 
GENERAL_REGS 
FP_REGS 
EXTRA_FP_REGS 
GENERAL_OR_FP_REGS 
GENERAL_OR_EXTRA_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R1_REGS 
TWO_REGS 
R2_REGS 
EIGHT_REGS 
R8_REGS 
ICALL_REGS 
GENERAL_REGS 
CARRY_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BR_REGS 
FP_REGS 
ACC_REG 
SP_REG 
RL_REGS 
GR_REGS 
AR_REGS 
ALL_REGS 
LIM_REG_CLASSES 

Definition at line 1211 of file i386.h.

Enumerator:
TLS_DIALECT_GNU 
TLS_DIALECT_SUN 
TLS_DIALECT_GNU 
TLS_DIALECT_SUN 
TLS_DIALECT_GNU 
TLS_DIALECT_SUN 
TLS_DIALECT_GNU 
TLS_DIALECT_GNU2 
TLS_DIALECT_SUN 

Definition at line 3389 of file i386.h.


Variable Documentation

int const dbx64_register_map[FIRST_PSEUDO_REGISTER]

Definition at line 518 of file i386.c.

int const dbx_register_map[FIRST_PSEUDO_REGISTER]

Definition at line 495 of file i386.c.

Definition at line 710 of file i386.c.

Definition at line 697 of file i386.c.

Definition at line 694 of file i386.c.

Definition at line 675 of file i386.c.

const char* ix86_arch_string

Definition at line 679 of file i386.c.

Definition at line 664 of file i386.c.

const char* ix86_asm_string

Definition at line 663 of file i386.c.

Definition at line 706 of file i386.c.

Definition at line 707 of file i386.c.

Definition at line 661 of file i386.c.

const char* ix86_cmodel_string

Definition at line 659 of file i386.c.

Definition at line 597 of file i386.c.

Definition at line 598 of file i386.c.

Definition at line 401 of file i386.c.

Definition at line 673 of file i386.c.

const char* ix86_cpu_string

Definition at line 678 of file i386.c.

Definition at line 657 of file i386.c.

const char* ix86_debug_arg_string

Definition at line 657 of file i386.c.

Definition at line 670 of file i386.c.

const char* ix86_fpmath_string

Definition at line 680 of file i386.c.

Definition at line 703 of file i386.c.

Definition at line 700 of file i386.c.

Definition at line 689 of file i386.c.

const char* ix86_regparm_string

Definition at line 683 of file i386.c.

Definition at line 667 of file i386.c.

Definition at line 666 of file i386.c.

enum reg_class const regclass_map[FIRST_PSEUDO_REGISTER]

Definition at line 470 of file i386.c.

int const svr4_dbx_register_map[FIRST_PSEUDO_REGISTER]

Definition at line 583 of file i386.c.

Definition at line 35 of file gensupport.c.

Definition at line 446 of file i386.c.

const int x86_add_esp_4

Definition at line 441 of file i386.c.

const int x86_add_esp_8

Definition at line 442 of file i386.c.

Definition at line 451 of file i386.c.

const int x86_branch_hints

Definition at line 422 of file i386.c.

const int x86_cmove

Definition at line 419 of file i386.c.

const int x86_decompose_lea

Definition at line 449 of file i386.c.

const int x86_deep_branch

Definition at line 421 of file i386.c.

Definition at line 416 of file i386.c.

Definition at line 448 of file i386.c.

const int x86_fast_prefix

Definition at line 433 of file i386.c.

const int x86_himode_math

Definition at line 437 of file i386.c.

Definition at line 443 of file i386.c.

Definition at line 445 of file i386.c.

const int x86_movx

Definition at line 415 of file i386.c.

Definition at line 444 of file i386.c.

Definition at line 424 of file i386.c.

Definition at line 686 of file i386.c.

Definition at line 447 of file i386.c.

Definition at line 438 of file i386.c.

Definition at line 436 of file i386.c.

const int x86_promote_QImode

Definition at line 432 of file i386.c.

const int x86_push_memory

Definition at line 413 of file i386.c.

const int x86_qimode_math

Definition at line 435 of file i386.c.

const int x86_read_modify

Definition at line 430 of file i386.c.

Definition at line 429 of file i386.c.

const int x86_shift1

Definition at line 450 of file i386.c.

Definition at line 434 of file i386.c.

Definition at line 431 of file i386.c.

const int x86_sub_esp_4

Definition at line 439 of file i386.c.

const int x86_sub_esp_8

Definition at line 440 of file i386.c.

const int x86_unroll_strlen

Definition at line 418 of file i386.c.

const int x86_use_bit_test

Definition at line 417 of file i386.c.

const int x86_use_cltd

Definition at line 428 of file i386.c.

const int x86_use_fiop

Definition at line 426 of file i386.c.

const int x86_use_leave

Definition at line 412 of file i386.c.

const int x86_use_loop

Definition at line 425 of file i386.c.

const int x86_use_mov0

Definition at line 427 of file i386.c.

Definition at line 414 of file i386.c.


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