|
Data Types |
| type | cum_args |
Defines |
| #define | REG_S_P(x) (REG_P (x) || (GET_CODE (x) == SUBREG && REG_P (XEXP (x, 0)))) |
| #define | CRIS_LAST_GENERAL_REGISTER 15 |
| #define | CRIS_FIRST_ARG_REG 10 |
| #define | CRIS_MAX_ARGS_IN_REGS 4 |
| #define | CRIS_PC_REGNUM 15 |
| #define | CRIS_SRP_REGNUM 16 |
| #define | CRIS_CANONICAL_SRP_REGNUM (16 + 11) |
| #define | CRIS_CANONICAL_MOF_REGNUM (16 + 7) |
| #define | CRIS_GOTPLT_SUFFIX ":GOTPLT" |
| #define | CRIS_PLT_GOTOFFSET_SUFFIX ":PLTG" |
| #define | CRIS_PLT_PCOFFSET_SUFFIX ":PLT" |
| #define | CRIS_FUNCTION_ARG_SIZE(MODE, TYPE) |
| #define | WORD_SWITCH_TAKES_ARG(STR) |
| #define | CPP_SPEC "-$ -D__CRIS_ABI_version=2\ %{mtune=*:-D__tune_%* %{mtune=v*:-D__CRIS_arch_tune=%*}}\ %{mtune=etrax4:-D__tune_v3 -D__CRIS_arch_tune=3}\ %{mtune=etrax100:-D__tune_v8 -D__CRIS_arch_tune=8}\ %{mtune=svinto:-D__tune_v8 -D__CRIS_arch_tune=8}\ %{mtune=etrax100lx:-D__tune_v10 -D__CRIS_arch_tune=10}\ %{mtune=ng:-D__tune_v10 -D__CRIS_arch_tune=10}\ %{mcpu=*:-D__arch_%* %{mcpu=v*:-D__CRIS_arch_version=%*}}\ %{mcpu=etrax4:-D__arch_v3 -D__CRIS_arch_version=3}\ %{mcpu=etrax100:-D__arch_v8 -D__CRIS_arch_version=8}\ %{mcpu=svinto:-D__arch_v8 -D__CRIS_arch_version=8}\ %{mcpu=etrax100lx:-D__arch_v10 -D__CRIS_arch_version=10}\ %{mcpu=ng:-D__arch_v10 -D__CRIS_arch_version=10}\ %{march=*:-D__arch_%* %{march=v*:-D__CRIS_arch_version=%*}}\ %{march=etrax4:-D__arch_v3 -D__CRIS_arch_version=3}\ %{march=etrax100:-D__arch_v8 -D__CRIS_arch_version=8}\ %{march=svinto:-D__arch_v8 -D__CRIS_arch_version=8}\ %{march=etrax100lx:-D__arch_v10 -D__CRIS_arch_version=10}\ %{march=ng:-D__arch_v10 -D__CRIS_arch_version=10}\ %{metrax100:-D__arch__v8 -D__CRIS_arch_version=8}\ %{metrax4:-D__arch__v3 -D__CRIS_arch_version=3}\ %(cpp_subtarget)" |
| #define | CRIS_CPP_SUBTARGET_SPEC "-D__ELF__\ %{mbest-lib-options:\ %{!moverride-best-lib-options:\ %{!march=*:%{!metrax*:%{!mcpu=*:-D__tune_v10 -D__CRIS_arch_tune=10}}}}}" |
| #define | CC1_SPEC "%{target*:}\ %{metrax4:-march=v3}\ %{metrax100:-march=v8}\ %(cc1_subtarget)" |
| #define | CRIS_CC1_SUBTARGET_SPEC "-melf\ %{mbest-lib-options:\ %{!moverride-best-lib-options:\ %{!march=*:%{!mcpu=*:-mtune=v10 -D__CRIS_arch_tune=10}}\ %{!finhibit-size-directive:\ %{!fno-function-sections: -ffunction-sections}\ %{!fno-data-sections: -fdata-sections}}}}" |
| #define | CC1PLUS_SPEC "" |
| #define | ASM_SPEC "%{v:-v}\ %(asm_subtarget)" |
| #define | CRIS_ASM_SUBTARGET_SPEC "--em=criself" |
| #define | LINK_SPEC "%{v:--verbose}\ %(link_subtarget)" |
| #define | CRIS_LINK_SUBTARGET_SPEC "-mcriself\ %{sim2:%{!T*:-Tdata 0x4000000 -Tbss 0x8000000}}\ %{O2|O3: --gc-sections}" |
| #define | LIB_SPEC "%{sim*:-lc -lsyssim -lc -lsyssim}\ %{!sim*:%{g*:-lg}\ %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p} -lbsp}\ -lnosys" |
| #define | STARTFILE_SPEC "%{sim2:s2crt0.o%s}\ %{!sim2:%{sim:scrt0.o%s}\ %{!sim:%{pg:gcrt0.o%s}\ %{!pg:%{p:mcrt0.o%s}%{!p:crt0.o%s}}}}\ crtbegin.o%s" |
| #define | ENDFILE_SPEC "crtend.o%s" |
| #define | EXTRA_SPECS |
| #define | CRIS_SUBTARGET_EXTRA_SPECS |
| #define | CPP_PREDEFINES "-Dcris -DCRIS -DGNU_CRIS" |
| #define | TARGET_MASK_SVINTO 1 |
| #define | TARGET_SVINTO (target_flags & TARGET_MASK_SVINTO) |
| #define | TARGET_MASK_CCINIT 2 |
| #define | TARGET_CCINIT (target_flags & TARGET_MASK_CCINIT) |
| #define | TARGET_MASK_PDEBUG 4 |
| #define | TARGET_PDEBUG (target_flags & TARGET_MASK_PDEBUG) |
| #define | TARGET_MASK_SIDE_EFFECT_PREFIXES 8 |
| #define | TARGET_SIDE_EFFECT_PREFIXES (target_flags & TARGET_MASK_SIDE_EFFECT_PREFIXES) |
| #define | TARGET_MASK_EXPAND_MUL 16 |
| #define | TARGET_EXPAND_MUL (target_flags & TARGET_MASK_EXPAND_MUL) |
| #define | TARGET_MASK_STACK_ALIGN 32 |
| #define | TARGET_STACK_ALIGN (target_flags & TARGET_MASK_STACK_ALIGN) |
| #define | TARGET_MASK_CONST_ALIGN 64 |
| #define | TARGET_CONST_ALIGN (target_flags & TARGET_MASK_CONST_ALIGN) |
| #define | TARGET_MASK_DATA_ALIGN 128 |
| #define | TARGET_DATA_ALIGN (target_flags & TARGET_MASK_DATA_ALIGN) |
| #define | TARGET_MASK_PROLOGUE_EPILOGUE 256 |
| #define | TARGET_PROLOGUE_EPILOGUE (target_flags & TARGET_MASK_PROLOGUE_EPILOGUE) |
| #define | TARGET_MASK_ETRAX4_ADD 512 |
| #define | TARGET_ETRAX4_ADD (target_flags & TARGET_MASK_ETRAX4_ADD) |
| #define | TARGET_MASK_ALIGN_BY_32 1024 |
| #define | TARGET_ALIGN_BY_32 (target_flags & TARGET_MASK_ALIGN_BY_32) |
| #define | TARGET_MASK_ELF 2048 |
| #define | TARGET_ELF (target_flags & TARGET_MASK_ELF) |
| #define | TARGET_MASK_LINUX 4096 |
| #define | TARGET_LINUX (target_flags & TARGET_MASK_LINUX) |
| #define | TARGET_MASK_AVOID_GOTPLT 8192 |
| #define | TARGET_AVOID_GOTPLT (target_flags & TARGET_MASK_AVOID_GOTPLT) |
| #define | TARGET_SWITCHES |
| #define | CRIS_SUBTARGET_SWITCHES {"elf", 0, ""}, |
| #define | TARGET_DEFAULT |
| #define | CRIS_SUBTARGET_DEFAULT TARGET_MASK_ELF |
| #define | CRIS_CPU_BASE 0 |
| #define | CRIS_CPU_ETRAX4 3 |
| #define | CRIS_CPU_SVINTO 8 |
| #define | CRIS_CPU_NG 10 |
| #define | CRIS_DEFAULT_CPU_VERSION CRIS_CPU_BASE |
| #define | TARGET_HAS_MUL_INSNS (cris_cpu_version >= CRIS_CPU_NG) |
| #define | TARGET_OPTIONS |
| #define | CRIS_SUBTARGET_LONG_OPTIONS |
| #define | TARGET_VERSION fprintf (stderr, " [Axis CRIS%s]", CRIS_SUBTARGET_VERSION) |
| #define | CRIS_SUBTARGET_VERSION " - generic ELF" |
| #define | OVERRIDE_OPTIONS cris_override_options () |
| #define | OPTIMIZATION_OPTIONS(OPTIMIZE, SIZE) |
| #define | BITS_BIG_ENDIAN 0 |
| #define | BYTES_BIG_ENDIAN 0 |
| #define | WORDS_BIG_ENDIAN 0 |
| #define | BITS_PER_UNIT 8 |
| #define | BITS_PER_WORD 32 |
| #define | UNITS_PER_WORD 4 |
| #define | POINTER_SIZE 32 |
| #define | CRIS_PROMOTED_MODE(MODE, UNSIGNEDP, TYPE) |
| #define | PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) (MODE) = CRIS_PROMOTED_MODE (MODE, UNSIGNEDP, TYPE) |
| #define | PROMOTE_FUNCTION_ARGS |
| #define | PROMOTE_FOR_CALL_ONLY |
| #define | PARM_BOUNDARY 32 |
| #define | STACK_BOUNDARY (TARGET_STACK_ALIGN ? (TARGET_ALIGN_BY_32 ? 32 : 16) : 8) |
| #define | FUNCTION_BOUNDARY 16 |
| #define | BIGGEST_ALIGNMENT 8 |
| #define | DATA_ALIGNMENT(TYPE, BASIC_ALIGN) |
| #define | CONSTANT_ALIGNMENT(CONSTANT, BASIC_ALIGN) |
| #define | EMPTY_FIELD_BOUNDARY 8 |
| #define | STRUCTURE_SIZE_BOUNDARY 8 |
| #define | STRICT_ALIGNMENT 0 |
| #define | MAX_FIXED_MODE_SIZE 32 |
| #define | DEFAULT_SIGNED_CHAR 1 |
| #define | WCHAR_TYPE "long int" |
| #define | WCHAR_TYPE_SIZE 32 |
| #define | FIRST_PSEUDO_REGISTER (16 + 1 + 1) |
| #define | FIXED_REGISTERS {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1} |
| #define | CALL_USED_REGISTERS {0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 0, 1} |
| #define | CONDITIONAL_REGISTER_USAGE cris_conditional_register_usage () |
| #define | REG_ALLOC_ORDER {9, 13, 12, 11, 10, 0, 1, 2, 3, 4, 5, 6, 7, 8, 14, 15, 16, 17} |
| #define | HARD_REGNO_NREGS(REGNO, MODE) |
| #define | HARD_REGNO_MODE_OK(REGNO, MODE) 1 |
| #define | MODES_TIEABLE_P(MODE1, MODE2) 1 |
| #define | N_REG_CLASSES (int) LIM_REG_CLASSES |
| #define | REG_CLASS_NAMES {"NO_REGS", "ALL_REGS"} |
| #define | GENERAL_REGS ALL_REGS |
| #define | REG_CLASS_CONTENTS {{0}, {0x2ffff}} |
| #define | REGNO_REG_CLASS(REGNO) GENERAL_REGS |
| #define | BASE_REG_CLASS GENERAL_REGS |
| #define | INDEX_REG_CLASS GENERAL_REGS |
| #define | REG_CLASS_FROM_LETTER(C) NO_REGS |
| #define | REGNO_OK_FOR_BASE_P(REGNO) |
| #define | REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_BASE_P(REGNO) |
| #define | PREFERRED_RELOAD_CLASS(X, CLASS) ((CLASS) == NO_REGS ? GENERAL_REGS : (CLASS)) |
| #define | CLASS_MAX_NREGS(CLASS, MODE) |
| #define | CONST_OK_FOR_LETTER_P(VALUE, C) |
| #define | CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) |
| #define | EXTRA_CONSTRAINT(X, C) |
| #define | EXTRA_CONSTRAINT_Q(X) |
| #define | EXTRA_CONSTRAINT_R(X) |
| #define | EXTRA_CONSTRAINT_T(X) |
| #define | EXTRA_CONSTRAINT_S(X) (flag_pic && CONSTANT_P (X) && cris_gotless_symbol (X)) |
| #define | EXTRA_CONSTRAINT_U(X) (flag_pic && CONSTANT_P (X) && cris_got_symbol (X)) |
| #define | STACK_GROWS_DOWNWARD |
| #define | FRAME_GROWS_DOWNWARD |
| #define | STARTING_FRAME_OFFSET 0 |
| #define | FIRST_PARM_OFFSET(FNDECL) 0 |
| #define | RETURN_ADDR_RTX(COUNT, FRAMEADDR) cris_return_addr_rtx (COUNT, FRAMEADDR) |
| #define | INCOMING_RETURN_ADDR_RTX gen_rtx (REG, Pmode, CRIS_SRP_REGNUM) |
| #define | EH_RETURN_DATA_REGNO(N) (IN_RANGE ((N), 0, 3) ? (CRIS_FIRST_ARG_REG + 3 - (N)) : INVALID_REGNUM) |
| #define | CRIS_STACKADJ_REG STRUCT_VALUE_REGNUM |
| #define | EH_RETURN_STACKADJ_RTX gen_rtx_REG (SImode, CRIS_STACKADJ_REG) |
| #define | EH_RETURN_HANDLER_RTX cris_return_addr_rtx (0, NULL) |
| #define | INIT_EXPANDERS cris_init_expanders () |
| #define | DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (CRIS_SRP_REGNUM) |
| #define | DWARF_CIE_DATA_ALIGNMENT -1 |
| #define | DWARF_FRAME_REGNUM(REG) (REG) |
| #define | STACK_POINTER_REGNUM 14 |
| #define | FRAME_POINTER_REGNUM 8 |
| #define | ARG_POINTER_REGNUM 17 |
| #define | STATIC_CHAIN_REGNUM 7 |
| #define | FRAME_POINTER_REQUIRED 0 |
| #define | ELIMINABLE_REGS |
| #define | CAN_ELIMINATE(FROM, TO) 1 |
| #define | INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) (OFFSET) = cris_initial_elimination_offset (FROM, TO) |
| #define | ACCUMULATE_OUTGOING_ARGS 1 |
| #define | RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACKSIZE) 0 |
| #define | FUNCTION_ARG(CUM, MODE, TYPE, NAMED) |
| #define | FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) |
| #define | FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) |
| #define | FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) |
| #define | CUMULATIVE_ARGS struct cum_args |
| #define | INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) ((CUM).regs = 0) |
| #define | FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) |
| #define | FUNCTION_ARG_REGNO_P(REGNO) |
| #define | FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx (REG, TYPE_MODE (VALTYPE), CRIS_FIRST_ARG_REG) |
| #define | LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, CRIS_FIRST_ARG_REG) |
| #define | FUNCTION_VALUE_REGNO_P(N) ((N) == CRIS_FIRST_ARG_REG) |
| #define | STRUCT_VALUE_REGNUM ((CRIS_FIRST_ARG_REG) - 1) |
| #define | DELAY_SLOTS_FOR_EPILOGUE cris_delay_slots_for_epilogue () |
| #define | ELIGIBLE_FOR_EPILOGUE_DELAY(INSN, N) cris_eligible_for_epilogue_delay (INSN) |
| #define | ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) cris_asm_output_mi_thunk(FILE, THUNK_FNDECL, DELTA, FUNCTION) |
| #define | FUNCTION_PROFILER(FILE, LABELNO) error ("no FUNCTION_PROFILER for CRIS") |
| #define | SETUP_INCOMING_VARARGS(ARGSSF, MODE, TYPE, PRETEND, SECOND) |
| #define | EXPAND_BUILTIN_VA_ARG(VALIST, TYPE) cris_expand_builtin_va_arg (VALIST, TYPE) |
| #define | TRAMPOLINE_TEMPLATE(FILE) |
| #define | TRAMPOLINE_SIZE 32 |
| #define | TRAMPOLINE_ALIGNMENT 16 |
| #define | INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) |
| #define | MULSI3_LIBCALL "__Mul" |
| #define | DIVSI3_LIBCALL "__Div" |
| #define | UDIVSI3_LIBCALL "__Udiv" |
| #define | MODSI3_LIBCALL "__Mod" |
| #define | UMODSI3_LIBCALL "__Umod" |
| #define | TARGET_EDOM 33 |
| #define | HAVE_POST_INCREMENT 1 |
| #define | CONSTANT_ADDRESS_P(X) CONSTANT_P (X) |
| #define | MAX_REGS_PER_ADDRESS 2 |
| #define | CONSTANT_INDEX_P(X) (CONSTANT_P (X) && !(flag_pic && cris_symbol (X))) |
| #define | BASE_P(X) (REG_P (X) && REG_OK_FOR_BASE_P (X)) |
| #define | BASE_OR_AUTOINCR_P(X) (BASE_P (X) || (GET_CODE (X) == POST_INC && BASE_P (XEXP (X, 0)))) |
| #define | BDAP_INDEX_P(X) |
| #define | BIAP_INDEX_P(X) |
| #define | SIMPLE_ADDRESS_P(X) |
| #define | GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) |
| #define | REG_OK_FOR_BASE_P(X) |
| #define | REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X) |
| #define | LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) {} |
| #define | LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_LEVELS, WIN) |
| #define | GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) |
| #define | LEGITIMATE_CONSTANT_P(X) 1 |
| #define | NOTICE_UPDATE_CC(EXP, INSN) cris_notice_update_cc (EXP, INSN) |
| #define | CONST_COSTS(RTX, CODE, OUTER_CODE) |
| #define | RTX_COSTS(X, CODE, OUTER_CODE) |
| #define | ADDRESS_COST(X) cris_address_cost (X) |
| #define | MEMORY_MOVE_COST(M, CLASS, IN) (((M) == QImode) ? 4 : ((M) == HImode) ? 4 : 6) |
| #define | SLOW_BYTE_ACCESS 0 |
| #define | MOVE_RATIO 9 |
| #define | TEXT_SECTION_ASM_OP "\t.text" |
| #define | DATA_SECTION_ASM_OP "\t.data" |
| #define | FORCE_EH_FRAME_INFO_IN_DATA_SECTION (! TARGET_ELF) |
| #define | JUMP_TABLES_IN_TEXT_SECTION 1 |
| #define | ENCODE_SECTION_INFO(EXP) cris_encode_section_info (EXP) |
| #define | PIC_OFFSET_TABLE_REGNUM (flag_pic ? 0 : INVALID_REGNUM) |
| #define | LEGITIMATE_PIC_OPERAND_P(X) cris_legitimate_pic_operand (X) |
| #define | ASM_FILE_START(STREAM) |
| #define | ASM_FILE_END(STREAM) |
| #define | ASM_OUTPUT_IDENT(FILE, NAME) fprintf (FILE, "%s\"%s\"\n", "\t.ident\t", NAME); |
| #define | ASM_APP_ON "#APP\n" |
| #define | ASM_APP_OFF "#NO_APP\n" |
| #define | IS_ASM_LOGICAL_LINE_SEPARATOR(C) (C) == '@' |
| #define | CRIS_ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN, LOCAL) |
| #define | ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN) CRIS_ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN, 0) |
| #define | ASM_OUTPUT_ALIGNED_DECL_LOCAL(FILE, DECL, NAME, SIZE, ALIGN) CRIS_ASM_OUTPUT_ALIGNED_DECL_COMMON(FILE, DECL, NAME, SIZE, ALIGN, 1) |
| #define | ASM_OUTPUT_LABEL(FILE, NAME) |
| #define | ASM_GLOBALIZE_LABEL(FILE, NAME) |
| #define | SUPPORTS_WEAK 1 |
| #define | HAVE_GAS_HIDDEN 1 |
| #define | ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) |
| #define | ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) sprintf (LABEL, "*%s%s%ld", LOCAL_LABEL_PREFIX, PREFIX, (long) NUM) |
| #define | ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) |
| #define | REGISTER_NAMES |
| #define | ADDITIONAL_REGISTER_NAMES {{"r14", 14}, {"r15", 15}} |
| #define | PRINT_OPERAND(FILE, X, CODE) cris_print_operand (FILE, X, CODE) |
| #define | PRINT_OPERAND_PUNCT_VALID_P(CODE) (CODE == '#') |
| #define | PRINT_OPERAND_ADDRESS(FILE, ADDR) cris_print_operand_address (FILE, ADDR) |
| #define | DBR_OUTPUT_SEQEND(FILE) fprintf (FILE, "\n") |
| #define | LOCAL_LABEL_PREFIX (TARGET_ELF ? "." : "") |
| #define | REGISTER_PREFIX "$" |
| #define | USER_LABEL_PREFIX "_" |
| #define | ASM_OUTPUT_REG_PUSH(FILE, REGNO) fprintf (FILE, "\tpush $%s\n", reg_names[REGNO]) |
| #define | ASM_OUTPUT_REG_POP(FILE, REGNO) fprintf (FILE, "\tpop $%s\n", reg_names[REGNO]) |
| #define | ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) asm_fprintf (FILE, "\t.word %LL%d-%LL%d\n", VALUE, REL) |
| #define | ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) asm_fprintf (FILE, "\t.dword %LL%d\n", VALUE) |
| #define | ASM_OUTPUT_CASE_END(STREAM, NUM, TABLE) |
| #define | ASM_OUTPUT_ALIGN(FILE, LOG) fprintf (FILE, "\t.align %d\n", (LOG)) |
| #define | DBX_REGISTER_NUMBER(REGNO) ((REGNO) == CRIS_SRP_REGNUM ? CRIS_CANONICAL_SRP_REGNUM : (REGNO)) |
| #define | DBX_NO_XREFS |
| #define | DBX_CONTIN_LENGTH 0 |
| #define | DBX_CONTIN_CHAR '?' |
| #define | REAL_ARITHMETIC |
| #define | PREDICATE_CODES |
| #define | CASE_VECTOR_MODE HImode |
| #define | CASE_VECTOR_PC_RELATIVE 1 |
| #define | FIXUNS_TRUNC_LIKE_FIX_TRUNC |
| #define | MOVE_MAX 4 |
| #define | TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 |
| #define | STORE_FLAG_VALUE 1 |
| #define | Pmode SImode |
| #define | FUNCTION_MODE QImode |
| #define | NO_IMPLICIT_EXTERN_C |
Enumerations |
| enum | reg_class {
NO_REGS,
R2,
R0_1,
INDEX_REGS,
BASE_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
LR0_REGS,
GENERAL_REGS,
BP_REGS,
FC_REGS,
CR_REGS,
Q_REGS,
SPECIAL_REGS,
ACCUM0_REGS,
ACCUM_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R24_REG,
R25_REG,
R27_REG,
GENERAL_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
LPCOUNT_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPU_REGS,
LO_REGS,
STACK_REG,
BASE_REGS,
HI_REGS,
CC_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REG,
POINTER_X_REGS,
POINTER_Y_REGS,
POINTER_Z_REGS,
STACK_REG,
BASE_POINTER_REGS,
POINTER_REGS,
ADDW_REGS,
SIMPLE_LD_REGS,
LD_REGS,
NO_LD_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0R1_REGS,
R2R3_REGS,
EXT_LOW_REGS,
EXT_REGS,
ADDR_REGS,
INDEX_REGS,
BK_REG,
SP_REG,
RC_REG,
COUNTER_REGS,
INT_REGS,
GENERAL_REGS,
DP_REG,
ST_REG,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
S_REGS,
INDEX_REGS,
SP_REGS,
A_REGS,
SI_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
REPEAT_REGS,
CR_REGS,
ACCUM_REGS,
OTHER_FLAG_REGS,
F0_REGS,
F1_REGS,
BR_FLAG_REGS,
FLAG_REGS,
EVEN_REGS,
GPR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
A0H_REG,
A0L_REG,
A0_REG,
A1H_REG,
ACCUM_HIGH_REGS,
A1L_REG,
ACCUM_LOW_REGS,
A1_REG,
ACCUM_REGS,
X_REG,
X_OR_ACCUM_LOW_REGS,
X_OR_ACCUM_REGS,
YH_REG,
YH_OR_ACCUM_HIGH_REGS,
X_OR_YH_REGS,
YL_REG,
YL_OR_ACCUM_LOW_REGS,
X_OR_YL_REGS,
X_OR_Y_REGS,
Y_REG,
ACCUM_OR_Y_REGS,
PH_REG,
X_OR_PH_REGS,
PL_REG,
PL_OR_ACCUM_LOW_REGS,
X_OR_PL_REGS,
YL_OR_PL_OR_ACCUM_LOW_REGS,
P_REG,
ACCUM_OR_P_REGS,
YL_OR_P_REGS,
ACCUM_LOW_OR_YL_OR_P_REGS,
Y_OR_P_REGS,
ACCUM_Y_OR_P_REGS,
NO_FRAME_Y_ADDR_REGS,
Y_ADDR_REGS,
ACCUM_LOW_OR_Y_ADDR_REGS,
ACCUM_OR_Y_ADDR_REGS,
X_OR_Y_ADDR_REGS,
Y_OR_Y_ADDR_REGS,
P_OR_Y_ADDR_REGS,
NON_HIGH_YBASE_ELIGIBLE_REGS,
YBASE_ELIGIBLE_REGS,
J_REG,
J_OR_DAU_16_BIT_REGS,
BMU_REGS,
NOHIGH_NON_ADDR_REGS,
NON_ADDR_REGS,
SLOW_MEM_LOAD_REGS,
NOHIGH_NON_YBASE_REGS,
NO_ACCUM_NON_YBASE_REGS,
NON_YBASE_REGS,
YBASE_VIRT_REGS,
ACCUM_LOW_OR_YBASE_REGS,
ACCUM_OR_YBASE_REGS,
X_OR_YBASE_REGS,
Y_OR_YBASE_REGS,
ACCUM_LOW_YL_PL_OR_YBASE_REGS,
P_OR_YBASE_REGS,
ACCUM_Y_P_OR_YBASE_REGS,
Y_ADDR_OR_YBASE_REGS,
YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS,
YBASE_OR_YBASE_ELIGIBLE_REGS,
NO_HIGH_ALL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MULTIPLY_32_REG,
MULTIPLY_64_REG,
LOW_REGS,
HIGH_REGS,
REAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
MAC_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ADDR_REGS,
DATA_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
AREG,
DREG,
CREG,
BREG,
SIREG,
DIREG,
AD_REGS,
Q_REGS,
NON_Q_REGS,
INDEX_REGS,
LEGACY_REGS,
GENERAL_REGS,
FP_TOP_REG,
FP_SECOND_REG,
FLOAT_REGS,
SSE_REGS,
MMX_REGS,
FP_TOP_SSE_REGS,
FP_SECOND_SSE_REGS,
FLOAT_SSE_REGS,
FLOAT_INT_REGS,
INT_SSE_REGS,
FLOAT_INT_SSE_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GLOBAL_REGS,
LOCAL_REGS,
LOCAL_OR_GLOBAL_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
PR_REGS,
BR_REGS,
AR_M_REGS,
AR_I_REGS,
ADDL_REGS,
GR_REGS,
FR_REGS,
GR_AND_BR_REGS,
GR_AND_FR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
CARRY_REG,
ACCUM_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
D_REGS,
X_REGS,
Y_REGS,
SP_REGS,
DA_REGS,
DB_REGS,
Z_REGS,
D8_REGS,
Q_REGS,
D_OR_X_REGS,
D_OR_Y_REGS,
D_OR_SP_REGS,
X_OR_Y_REGS,
A_REGS,
X_OR_SP_REGS,
Y_OR_SP_REGS,
X_OR_Y_OR_D_REGS,
A_OR_D_REGS,
A_OR_SP_REGS,
H_REGS,
S_REGS,
D_OR_S_REGS,
X_OR_S_REGS,
Y_OR_S_REGS,
SP_OR_S_REGS,
D_OR_X_OR_S_REGS,
D_OR_Y_OR_S_REGS,
D_OR_SP_OR_S_REGS,
A_OR_S_REGS,
D_OR_A_OR_S_REGS,
TMP_REGS,
D_OR_A_OR_TMP_REGS,
G_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDR_REGS,
FP_REGS,
GENERAL_REGS,
DATA_OR_FP_REGS,
ADDR_OR_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
AP_REG,
XRF_REGS,
GENERAL_REGS,
AGRF_REGS,
XGRF_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ONLYR1_REGS,
LRW_REGS,
GENERAL_REGS,
C_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
REMAINDER_REG,
HIMULT_REG,
SYSTEM_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDRESS_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDRESS_REGS,
SP_REGS,
DATA_OR_ADDRESS_REGS,
SP_OR_ADDRESS_REGS,
EXTENDED_REGS,
DATA_OR_EXTENDED_REGS,
ADDRESS_OR_EXTENDED_REGS,
SP_OR_EXTENDED_REGS,
SP_OR_ADDRESS_OR_EXTENDED_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FLOAT_REG0,
LONG_FLOAT_REG0,
FLOAT_REGS,
FP_REGS,
GEN_AND_FP_REGS,
FRAME_POINTER_REG,
STACK_POINTER_REG,
GEN_AND_MEM_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MUL_REGS,
GENERAL_REGS,
LOAD_FPU_REGS,
NO_LOAD_FPU_REGS,
FPU_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
OUT_REGS,
STD_REGS,
ARG_REGS,
SRC_REGS,
DST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
R15_REGS,
BASE_REGS,
GENERAL_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BASE_REGS,
GENERAL_REGS,
FLOAT_REGS,
ALTIVEC_REGS,
VRSAVE_REGS,
NON_SPECIAL_REGS,
MQ_REGS,
LINK_REGS,
CTR_REGS,
LINK_OR_CTR_REGS,
SPECIAL_REGS,
SPEC_OR_GEN_REGS,
CR0_REGS,
CR_REGS,
NON_FLOAT_REGS,
XER_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ADDR_REGS,
GENERAL_REGS,
FP_REGS,
ADDR_FP_REGS,
GENERAL_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
PR_REGS,
T_REGS,
MAC_REGS,
FPUL_REGS,
SIBCALL_REGS,
GENERAL_REGS,
FP0_REGS,
FP_REGS,
DF_REGS,
FPSCR_REGS,
GENERAL_FP_REGS,
TARGET_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
HILO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HILO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPCC_REGS,
I64_REGS,
GENERAL_REGS,
FP_REGS,
EXTRA_FP_REGS,
GENERAL_OR_FP_REGS,
GENERAL_OR_EXTRA_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
R1_REGS,
TWO_REGS,
R2_REGS,
EIGHT_REGS,
R8_REGS,
ICALL_REGS,
GENERAL_REGS,
CARRY_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BR_REGS,
FP_REGS,
ACC_REG,
SP_REG,
RL_REGS,
GR_REGS,
AR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
HILO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HILO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
HILO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HILO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R2,
R0_1,
INDEX_REGS,
BASE_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
LR0_REGS,
GENERAL_REGS,
BP_REGS,
FC_REGS,
CR_REGS,
Q_REGS,
SPECIAL_REGS,
ACCUM0_REGS,
ACCUM_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R24_REG,
R25_REG,
R27_REG,
GENERAL_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
LPCOUNT_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPU_REGS,
LO_REGS,
STACK_REG,
BASE_REGS,
HI_REGS,
CC_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REG,
POINTER_X_REGS,
POINTER_Y_REGS,
POINTER_Z_REGS,
STACK_REG,
BASE_POINTER_REGS,
POINTER_REGS,
ADDW_REGS,
SIMPLE_LD_REGS,
LD_REGS,
NO_LD_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0R1_REGS,
R2R3_REGS,
EXT_LOW_REGS,
EXT_REGS,
ADDR_REGS,
INDEX_REGS,
BK_REG,
SP_REG,
RC_REG,
COUNTER_REGS,
INT_REGS,
GENERAL_REGS,
DP_REG,
ST_REG,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
S_REGS,
INDEX_REGS,
SP_REGS,
A_REGS,
SI_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
REPEAT_REGS,
CR_REGS,
ACCUM_REGS,
OTHER_FLAG_REGS,
F0_REGS,
F1_REGS,
BR_FLAG_REGS,
FLAG_REGS,
EVEN_REGS,
GPR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
A0H_REG,
A0L_REG,
A0_REG,
A1H_REG,
ACCUM_HIGH_REGS,
A1L_REG,
ACCUM_LOW_REGS,
A1_REG,
ACCUM_REGS,
X_REG,
X_OR_ACCUM_LOW_REGS,
X_OR_ACCUM_REGS,
YH_REG,
YH_OR_ACCUM_HIGH_REGS,
X_OR_YH_REGS,
YL_REG,
YL_OR_ACCUM_LOW_REGS,
X_OR_YL_REGS,
X_OR_Y_REGS,
Y_REG,
ACCUM_OR_Y_REGS,
PH_REG,
X_OR_PH_REGS,
PL_REG,
PL_OR_ACCUM_LOW_REGS,
X_OR_PL_REGS,
YL_OR_PL_OR_ACCUM_LOW_REGS,
P_REG,
ACCUM_OR_P_REGS,
YL_OR_P_REGS,
ACCUM_LOW_OR_YL_OR_P_REGS,
Y_OR_P_REGS,
ACCUM_Y_OR_P_REGS,
NO_FRAME_Y_ADDR_REGS,
Y_ADDR_REGS,
ACCUM_LOW_OR_Y_ADDR_REGS,
ACCUM_OR_Y_ADDR_REGS,
X_OR_Y_ADDR_REGS,
Y_OR_Y_ADDR_REGS,
P_OR_Y_ADDR_REGS,
NON_HIGH_YBASE_ELIGIBLE_REGS,
YBASE_ELIGIBLE_REGS,
J_REG,
J_OR_DAU_16_BIT_REGS,
BMU_REGS,
NOHIGH_NON_ADDR_REGS,
NON_ADDR_REGS,
SLOW_MEM_LOAD_REGS,
NOHIGH_NON_YBASE_REGS,
NO_ACCUM_NON_YBASE_REGS,
NON_YBASE_REGS,
YBASE_VIRT_REGS,
ACCUM_LOW_OR_YBASE_REGS,
ACCUM_OR_YBASE_REGS,
X_OR_YBASE_REGS,
Y_OR_YBASE_REGS,
ACCUM_LOW_YL_PL_OR_YBASE_REGS,
P_OR_YBASE_REGS,
ACCUM_Y_P_OR_YBASE_REGS,
Y_ADDR_OR_YBASE_REGS,
YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS,
YBASE_OR_YBASE_ELIGIBLE_REGS,
NO_HIGH_ALL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MULTIPLY_32_REG,
MULTIPLY_64_REG,
LOW_REGS,
HIGH_REGS,
REAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
MAC_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ADDR_REGS,
DATA_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
AREG,
DREG,
CREG,
BREG,
SIREG,
DIREG,
AD_REGS,
Q_REGS,
NON_Q_REGS,
INDEX_REGS,
LEGACY_REGS,
GENERAL_REGS,
FP_TOP_REG,
FP_SECOND_REG,
FLOAT_REGS,
SSE_REGS,
MMX_REGS,
FP_TOP_SSE_REGS,
FP_SECOND_SSE_REGS,
FLOAT_SSE_REGS,
FLOAT_INT_REGS,
INT_SSE_REGS,
FLOAT_INT_SSE_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GLOBAL_REGS,
LOCAL_REGS,
LOCAL_OR_GLOBAL_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
PR_REGS,
BR_REGS,
AR_M_REGS,
AR_I_REGS,
ADDL_REGS,
GR_REGS,
FR_REGS,
GR_AND_BR_REGS,
GR_AND_FR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
CARRY_REG,
ACCUM_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
D_REGS,
X_REGS,
Y_REGS,
SP_REGS,
DA_REGS,
DB_REGS,
Z_REGS,
D8_REGS,
Q_REGS,
D_OR_X_REGS,
D_OR_Y_REGS,
D_OR_SP_REGS,
X_OR_Y_REGS,
A_REGS,
X_OR_SP_REGS,
Y_OR_SP_REGS,
X_OR_Y_OR_D_REGS,
A_OR_D_REGS,
A_OR_SP_REGS,
H_REGS,
S_REGS,
D_OR_S_REGS,
X_OR_S_REGS,
Y_OR_S_REGS,
SP_OR_S_REGS,
D_OR_X_OR_S_REGS,
D_OR_Y_OR_S_REGS,
D_OR_SP_OR_S_REGS,
A_OR_S_REGS,
D_OR_A_OR_S_REGS,
TMP_REGS,
D_OR_A_OR_TMP_REGS,
G_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDR_REGS,
FP_REGS,
GENERAL_REGS,
DATA_OR_FP_REGS,
ADDR_OR_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
AP_REG,
XRF_REGS,
GENERAL_REGS,
AGRF_REGS,
XGRF_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ONLYR1_REGS,
LRW_REGS,
GENERAL_REGS,
C_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
REMAINDER_REG,
HIMULT_REG,
SYSTEM_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDRESS_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDRESS_REGS,
SP_REGS,
DATA_OR_ADDRESS_REGS,
SP_OR_ADDRESS_REGS,
EXTENDED_REGS,
DATA_OR_EXTENDED_REGS,
ADDRESS_OR_EXTENDED_REGS,
SP_OR_EXTENDED_REGS,
SP_OR_ADDRESS_OR_EXTENDED_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FLOAT_REG0,
LONG_FLOAT_REG0,
FLOAT_REGS,
FP_REGS,
GEN_AND_FP_REGS,
FRAME_POINTER_REG,
STACK_POINTER_REG,
GEN_AND_MEM_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MUL_REGS,
GENERAL_REGS,
LOAD_FPU_REGS,
NO_LOAD_FPU_REGS,
FPU_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
OUT_REGS,
STD_REGS,
ARG_REGS,
SRC_REGS,
DST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
R15_REGS,
BASE_REGS,
GENERAL_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BASE_REGS,
GENERAL_REGS,
FLOAT_REGS,
ALTIVEC_REGS,
VRSAVE_REGS,
NON_SPECIAL_REGS,
MQ_REGS,
LINK_REGS,
CTR_REGS,
LINK_OR_CTR_REGS,
SPECIAL_REGS,
SPEC_OR_GEN_REGS,
CR0_REGS,
CR_REGS,
NON_FLOAT_REGS,
XER_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ADDR_REGS,
GENERAL_REGS,
FP_REGS,
ADDR_FP_REGS,
GENERAL_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
PR_REGS,
T_REGS,
MAC_REGS,
FPUL_REGS,
SIBCALL_REGS,
GENERAL_REGS,
FP0_REGS,
FP_REGS,
DF_REGS,
FPSCR_REGS,
GENERAL_FP_REGS,
TARGET_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
HILO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HILO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPCC_REGS,
I64_REGS,
GENERAL_REGS,
FP_REGS,
EXTRA_FP_REGS,
GENERAL_OR_FP_REGS,
GENERAL_OR_EXTRA_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
R1_REGS,
TWO_REGS,
R2_REGS,
EIGHT_REGS,
R8_REGS,
ICALL_REGS,
GENERAL_REGS,
CARRY_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BR_REGS,
FP_REGS,
ACC_REG,
SP_REG,
RL_REGS,
GR_REGS,
AR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
HILO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HILO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
HILO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HILO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REG,
R24_REG,
R25_REG,
R27_REG,
GENERAL_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
LPCOUNT_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPA_REGS,
CIRRUS_REGS,
VFP_REGS,
IWMMXT_GR_REGS,
IWMMXT_REGS,
LO_REGS,
STACK_REG,
BASE_REGS,
HI_REGS,
CC_REG,
VFPCC_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REG,
POINTER_X_REGS,
POINTER_Y_REGS,
POINTER_Z_REGS,
STACK_REG,
BASE_POINTER_REGS,
POINTER_REGS,
ADDW_REGS,
SIMPLE_LD_REGS,
LD_REGS,
NO_LD_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
IREGS,
BREGS,
LREGS,
MREGS,
CIRCREGS,
DAGREGS,
EVEN_AREGS,
ODD_AREGS,
AREGS,
CCREGS,
EVEN_DREGS,
ODD_DREGS,
DREGS,
PREGS_CLOBBERED,
PREGS,
DPREGS,
MOST_REGS,
PROLOGUE_REGS,
NON_A_CC_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0R1_REGS,
R2R3_REGS,
EXT_LOW_REGS,
EXT_REGS,
ADDR_REGS,
INDEX_REGS,
BK_REG,
SP_REG,
RC_REG,
COUNTER_REGS,
INT_REGS,
GENERAL_REGS,
DP_REG,
ST_REG,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MULTIPLY_32_REG,
MULTIPLY_64_REG,
LOW_REGS,
HIGH_REGS,
REAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ICC_REGS,
FCC_REGS,
CC_REGS,
ICR_REGS,
FCR_REGS,
CR_REGS,
LCR_REG,
LR_REG,
GR8_REGS,
GR9_REGS,
GR89_REGS,
FDPIC_REGS,
FDPIC_FPTR_REGS,
FDPIC_CALL_REGS,
SPR_REGS,
QUAD_ACC_REGS,
EVEN_ACC_REGS,
ACC_REGS,
ACCG_REGS,
QUAD_FPR_REGS,
FEVEN_REGS,
FPR_REGS,
QUAD_REGS,
EVEN_REGS,
GPR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
COUNTER_REGS,
SOURCE_REGS,
DESTINATION_REGS,
GENERAL_REGS,
MAC_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
AREG,
DREG,
CREG,
BREG,
SIREG,
DIREG,
AD_REGS,
Q_REGS,
NON_Q_REGS,
INDEX_REGS,
LEGACY_REGS,
GENERAL_REGS,
FP_TOP_REG,
FP_SECOND_REG,
FLOAT_REGS,
SSE_REGS,
MMX_REGS,
FP_TOP_SSE_REGS,
FP_SECOND_SSE_REGS,
FLOAT_SSE_REGS,
FLOAT_INT_REGS,
INT_SSE_REGS,
FLOAT_INT_SSE_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
PR_REGS,
BR_REGS,
AR_M_REGS,
AR_I_REGS,
ADDL_REGS,
GR_REGS,
FR_REGS,
GR_AND_BR_REGS,
GR_AND_FR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DPH_REGS,
DPL_REGS,
DP_REGS,
SP_REGS,
IPH_REGS,
IPL_REGS,
IP_REGS,
DP_SP_REGS,
PTR_REGS,
NONPTR_REGS,
NONSP_REGS,
GENERAL_REGS,
ALL_REGS = GENERAL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
CARRY_REG,
ACCUM_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
D_REGS,
X_REGS,
Y_REGS,
SP_REGS,
DA_REGS,
DB_REGS,
Z_REGS,
D8_REGS,
Q_REGS,
D_OR_X_REGS,
D_OR_Y_REGS,
D_OR_SP_REGS,
X_OR_Y_REGS,
A_REGS,
X_OR_SP_REGS,
Y_OR_SP_REGS,
X_OR_Y_OR_D_REGS,
A_OR_D_REGS,
A_OR_SP_REGS,
H_REGS,
S_REGS,
D_OR_S_REGS,
X_OR_S_REGS,
Y_OR_S_REGS,
Z_OR_S_REGS,
SP_OR_S_REGS,
D_OR_X_OR_S_REGS,
D_OR_Y_OR_S_REGS,
D_OR_SP_OR_S_REGS,
A_OR_S_REGS,
D_OR_A_OR_S_REGS,
TMP_REGS,
D_OR_A_OR_TMP_REGS,
G_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDR_REGS,
FP_REGS,
GENERAL_REGS,
DATA_OR_FP_REGS,
ADDR_OR_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ONLYR1_REGS,
LRW_REGS,
GENERAL_REGS,
C_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
PIC_FN_ADDR_REG,
LEA_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
REMAINDER_REG,
HIMULT_REG,
SYSTEM_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDRESS_REGS,
SP_REGS,
DATA_OR_ADDRESS_REGS,
SP_OR_ADDRESS_REGS,
EXTENDED_REGS,
DATA_OR_EXTENDED_REGS,
ADDRESS_OR_EXTENDED_REGS,
SP_OR_EXTENDED_REGS,
SP_OR_ADDRESS_OR_EXTENDED_REGS,
FP_REGS,
FP_ACC_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FLOAT_REG0,
LONG_FLOAT_REG0,
FLOAT_REGS,
LONG_REGS,
FP_REGS,
GEN_AND_FP_REGS,
FRAME_POINTER_REG,
STACK_POINTER_REG,
GEN_AND_MEM_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MUL_REGS,
GENERAL_REGS,
LOAD_FPU_REGS,
NO_LOAD_FPU_REGS,
FPU_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BASE_REGS,
GENERAL_REGS,
FLOAT_REGS,
ALTIVEC_REGS,
VRSAVE_REGS,
VSCR_REGS,
SPE_ACC_REGS,
SPEFSCR_REGS,
NON_SPECIAL_REGS,
MQ_REGS,
LINK_REGS,
CTR_REGS,
LINK_OR_CTR_REGS,
SPECIAL_REGS,
SPEC_OR_GEN_REGS,
CR0_REGS,
CR_REGS,
NON_FLOAT_REGS,
XER_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
CC_REGS,
ADDR_REGS,
GENERAL_REGS,
ACCESS_REGS,
ADDR_CC_REGS,
GENERAL_CC_REGS,
FP_REGS,
ADDR_FP_REGS,
GENERAL_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
PR_REGS,
T_REGS,
MAC_REGS,
FPUL_REGS,
SIBCALL_REGS,
GENERAL_REGS,
FP0_REGS,
FP_REGS,
DF_HI_REGS,
DF_REGS,
FPSCR_REGS,
GENERAL_FP_REGS,
TARGET_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPCC_REGS,
I64_REGS,
GENERAL_REGS,
FP_REGS,
EXTRA_FP_REGS,
GENERAL_OR_FP_REGS,
GENERAL_OR_EXTRA_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
R1_REGS,
TWO_REGS,
R2_REGS,
EIGHT_REGS,
R8_REGS,
ICALL_REGS,
GENERAL_REGS,
CARRY_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BR_REGS,
FP_REGS,
ACC_REG,
SP_REG,
RL_REGS,
GR_REGS,
AR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REG,
R24_REG,
R25_REG,
R27_REG,
GENERAL_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
LPCOUNT_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPA_REGS,
CIRRUS_REGS,
VFP_REGS,
IWMMXT_GR_REGS,
IWMMXT_REGS,
LO_REGS,
STACK_REG,
BASE_REGS,
HI_REGS,
CC_REG,
VFPCC_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REG,
POINTER_X_REGS,
POINTER_Y_REGS,
POINTER_Z_REGS,
STACK_REG,
BASE_POINTER_REGS,
POINTER_REGS,
ADDW_REGS,
SIMPLE_LD_REGS,
LD_REGS,
NO_LD_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
IREGS,
BREGS,
LREGS,
MREGS,
CIRCREGS,
DAGREGS,
EVEN_AREGS,
ODD_AREGS,
AREGS,
CCREGS,
EVEN_DREGS,
ODD_DREGS,
DREGS,
FDPIC_REGS,
FDPIC_FPTR_REGS,
PREGS_CLOBBERED,
PREGS,
IPREGS,
DPREGS,
MOST_REGS,
LT_REGS,
LC_REGS,
LB_REGS,
PROLOGUE_REGS,
NON_A_CC_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0R1_REGS,
R2R3_REGS,
EXT_LOW_REGS,
EXT_REGS,
ADDR_REGS,
INDEX_REGS,
BK_REG,
SP_REG,
RC_REG,
COUNTER_REGS,
INT_REGS,
GENERAL_REGS,
DP_REG,
ST_REG,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MOF_REGS,
CC0_REGS,
SPECIAL_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
LO_REGS,
HI_REGS,
HILO_REGS,
NOSP_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MULTIPLY_32_REG,
MULTIPLY_64_REG,
LOW_REGS,
HIGH_REGS,
REAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ICC_REGS,
FCC_REGS,
CC_REGS,
ICR_REGS,
FCR_REGS,
CR_REGS,
LCR_REG,
LR_REG,
GR8_REGS,
GR9_REGS,
GR89_REGS,
FDPIC_REGS,
FDPIC_FPTR_REGS,
FDPIC_CALL_REGS,
SPR_REGS,
QUAD_ACC_REGS,
EVEN_ACC_REGS,
ACC_REGS,
ACCG_REGS,
QUAD_FPR_REGS,
FEVEN_REGS,
FPR_REGS,
QUAD_REGS,
EVEN_REGS,
GPR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
COUNTER_REGS,
SOURCE_REGS,
DESTINATION_REGS,
GENERAL_REGS,
MAC_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
AREG,
DREG,
CREG,
BREG,
SIREG,
DIREG,
AD_REGS,
Q_REGS,
NON_Q_REGS,
INDEX_REGS,
LEGACY_REGS,
GENERAL_REGS,
FP_TOP_REG,
FP_SECOND_REG,
FLOAT_REGS,
SSE_REGS,
MMX_REGS,
FP_TOP_SSE_REGS,
FP_SECOND_SSE_REGS,
FLOAT_SSE_REGS,
FLOAT_INT_REGS,
INT_SSE_REGS,
FLOAT_INT_SSE_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
PR_REGS,
BR_REGS,
AR_M_REGS,
AR_I_REGS,
ADDL_REGS,
GR_REGS,
FP_REGS,
FR_REGS,
GR_AND_BR_REGS,
GR_AND_FR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
SP_REGS,
FB_REGS,
SB_REGS,
CR_REGS,
R0_REGS,
R1_REGS,
R2_REGS,
R3_REGS,
R02_REGS,
HL_REGS,
QI_REGS,
R23_REGS,
R03_REGS,
DI_REGS,
A0_REGS,
A1_REGS,
A_REGS,
AD_REGS,
PS_REGS,
SI_REGS,
HI_REGS,
RA_REGS,
GENERAL_REGS,
FLG_REGS,
HC_REGS,
MEM_REGS,
R02_A_MEM_REGS,
A_HL_MEM_REGS,
R1_R3_A_MEM_REGS,
R03_MEM_REGS,
A_HI_MEM_REGS,
A_AD_CR_MEM_SI_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
CARRY_REG,
ACCUM_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
D_REGS,
X_REGS,
Y_REGS,
SP_REGS,
DA_REGS,
DB_REGS,
Z_REGS,
D8_REGS,
Q_REGS,
D_OR_X_REGS,
D_OR_Y_REGS,
D_OR_SP_REGS,
X_OR_Y_REGS,
A_REGS,
X_OR_SP_REGS,
Y_OR_SP_REGS,
X_OR_Y_OR_D_REGS,
A_OR_D_REGS,
A_OR_SP_REGS,
H_REGS,
S_REGS,
D_OR_S_REGS,
X_OR_S_REGS,
Y_OR_S_REGS,
Z_OR_S_REGS,
SP_OR_S_REGS,
D_OR_X_OR_S_REGS,
D_OR_Y_OR_S_REGS,
D_OR_SP_OR_S_REGS,
A_OR_S_REGS,
D_OR_A_OR_S_REGS,
TMP_REGS,
D_OR_A_OR_TMP_REGS,
G_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDR_REGS,
FP_REGS,
GENERAL_REGS,
DATA_OR_FP_REGS,
ADDR_OR_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ONLYR1_REGS,
LRW_REGS,
GENERAL_REGS,
C_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
PIC_FN_ADDR_REG,
V1_REG,
LEA_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
DSP_ACC_REGS,
ACC_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
REMAINDER_REG,
HIMULT_REG,
SYSTEM_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDRESS_REGS,
SP_REGS,
DATA_OR_ADDRESS_REGS,
SP_OR_ADDRESS_REGS,
EXTENDED_REGS,
DATA_OR_EXTENDED_REGS,
ADDRESS_OR_EXTENDED_REGS,
SP_OR_EXTENDED_REGS,
SP_OR_ADDRESS_OR_EXTENDED_REGS,
FP_REGS,
FP_ACC_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MUL_REGS,
GENERAL_REGS,
LOAD_FPU_REGS,
NO_LOAD_FPU_REGS,
FPU_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BASE_REGS,
GENERAL_REGS,
FLOAT_REGS,
ALTIVEC_REGS,
VRSAVE_REGS,
VSCR_REGS,
SPE_ACC_REGS,
SPEFSCR_REGS,
NON_SPECIAL_REGS,
MQ_REGS,
LINK_REGS,
CTR_REGS,
LINK_OR_CTR_REGS,
SPECIAL_REGS,
SPEC_OR_GEN_REGS,
CR0_REGS,
CR_REGS,
NON_FLOAT_REGS,
XER_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
CC_REGS,
ADDR_REGS,
GENERAL_REGS,
ACCESS_REGS,
ADDR_CC_REGS,
GENERAL_CC_REGS,
FP_REGS,
ADDR_FP_REGS,
GENERAL_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
G16_REGS,
G32_REGS,
T32_REGS,
HI_REG,
LO_REG,
CE_REGS,
CN_REG,
LC_REG,
SC_REG,
SP_REGS,
CR_REGS,
CP1_REGS,
CP2_REGS,
CP3_REGS,
CPA_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
PR_REGS,
T_REGS,
MAC_REGS,
FPUL_REGS,
SIBCALL_REGS,
GENERAL_REGS,
FP0_REGS,
FP_REGS,
DF_HI_REGS,
DF_REGS,
FPSCR_REGS,
GENERAL_FP_REGS,
GENERAL_DF_REGS,
TARGET_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPCC_REGS,
I64_REGS,
GENERAL_REGS,
FP_REGS,
EXTRA_FP_REGS,
GENERAL_OR_FP_REGS,
GENERAL_OR_EXTRA_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
R1_REGS,
TWO_REGS,
R2_REGS,
EIGHT_REGS,
R8_REGS,
ICALL_REGS,
GENERAL_REGS,
CARRY_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BR_REGS,
FP_REGS,
ACC_REG,
SP_REG,
RL_REGS,
GR_REGS,
AR_REGS,
ALL_REGS,
LIM_REG_CLASSES
} |
Variables |
| const char * | cris_max_stackframe_str |
| const char * | cris_cpu_str |
| int | cris_cpu_version |
| const char * | cris_tune_str |
| const char * | cris_elinux_stacksize_str |
| int | target_flags |