osprey-gcc/gcc/config/arm/arm.h File Reference

#include "arm-cores.def"

Include dependency graph for arm.h:

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Data Types

type  arm_cpu_select
type  CUMULATIVE_ARGS

Defines

#define TARGET_CPU_CPP_BUILTINS()
#define ARM_CORE(NAME, IDENT, ARCH, FLAGS, COSTS)   IDENT,
#define ARM_CORE(NAME, IDENT, ARCH, FLAGS, COSTS)   TARGET_CPU_##IDENT,
#define ARM_INVERSE_CONDITION_CODE(X)   ((arm_cc) (((int)X) ^ 1))
#define TARGET_CPU_DEFAULT   TARGET_CPU_generic
#define CPP_SPEC   "%(subtarget_cpp_spec) \%{msoft-float:%{mhard-float: \ %e-msoft-float and -mhard_float may not be used together}} \%{mbig-endian:%{mlittle-endian: \ %e-mbig-endian and -mlittle-endian may not be used together}}"
#define CC1_SPEC   ""
#define EXTRA_SPECS
#define SUBTARGET_CPP_SPEC   ""
#define TARGET_VERSION   fputs (" (ARM/generic)", stderr);
#define ARM_FLAG_APCS_FRAME   (1 << 0)
#define ARM_FLAG_POKE   (1 << 1)
#define ARM_FLAG_FPE   (1 << 2)
#define ARM_FLAG_APCS_STACK   (1 << 4)
#define ARM_FLAG_APCS_FLOAT   (1 << 5)
#define ARM_FLAG_APCS_REENT   (1 << 6)
#define ARM_FLAG_BIG_END   (1 << 9)
#define ARM_FLAG_INTERWORK   (1 << 10)
#define ARM_FLAG_LITTLE_WORDS   (1 << 11)
#define ARM_FLAG_NO_SCHED_PRO   (1 << 12)
#define ARM_FLAG_ABORT_NORETURN   (1 << 13)
#define ARM_FLAG_SINGLE_PIC_BASE   (1 << 14)
#define ARM_FLAG_LONG_CALLS   (1 << 15)
#define ARM_FLAG_THUMB   (1 << 16)
#define THUMB_FLAG_BACKTRACE   (1 << 17)
#define THUMB_FLAG_LEAF_BACKTRACE   (1 << 18)
#define THUMB_FLAG_CALLEE_SUPER_INTERWORKING   (1 << 19)
#define THUMB_FLAG_CALLER_SUPER_INTERWORKING   (1 << 20)
#define CIRRUS_FIX_INVALID_INSNS   (1 << 21)
#define TARGET_APCS_FRAME   (target_flags & ARM_FLAG_APCS_FRAME)
#define TARGET_POKE_FUNCTION_NAME   (target_flags & ARM_FLAG_POKE)
#define TARGET_FPE   (target_flags & ARM_FLAG_FPE)
#define TARGET_APCS_STACK   (target_flags & ARM_FLAG_APCS_STACK)
#define TARGET_APCS_FLOAT   (target_flags & ARM_FLAG_APCS_FLOAT)
#define TARGET_APCS_REENT   (target_flags & ARM_FLAG_APCS_REENT)
#define TARGET_SOFT_FLOAT   (arm_float_abi == ARM_FLOAT_ABI_SOFT)
#define TARGET_HARD_FLOAT   (arm_float_abi != ARM_FLOAT_ABI_SOFT)
#define TARGET_HARD_FLOAT_ABI   (arm_float_abi == ARM_FLOAT_ABI_HARD)
#define TARGET_FPA   (arm_fp_model == ARM_FP_MODEL_FPA)
#define TARGET_MAVERICK   (arm_fp_model == ARM_FP_MODEL_MAVERICK)
#define TARGET_VFP   (arm_fp_model == ARM_FP_MODEL_VFP)
#define TARGET_IWMMXT   (arm_arch_iwmmxt)
#define TARGET_REALLY_IWMMXT   (TARGET_IWMMXT && TARGET_ARM)
#define TARGET_IWMMXT_ABI   (TARGET_ARM && arm_abi == ARM_ABI_IWMMXT)
#define TARGET_BIG_END   (target_flags & ARM_FLAG_BIG_END)
#define TARGET_INTERWORK   (target_flags & ARM_FLAG_INTERWORK)
#define TARGET_LITTLE_WORDS   (target_flags & ARM_FLAG_LITTLE_WORDS)
#define TARGET_NO_SCHED_PRO   (target_flags & ARM_FLAG_NO_SCHED_PRO)
#define TARGET_ABORT_NORETURN   (target_flags & ARM_FLAG_ABORT_NORETURN)
#define TARGET_SINGLE_PIC_BASE   (target_flags & ARM_FLAG_SINGLE_PIC_BASE)
#define TARGET_LONG_CALLS   (target_flags & ARM_FLAG_LONG_CALLS)
#define TARGET_THUMB   (target_flags & ARM_FLAG_THUMB)
#define TARGET_ARM   (! TARGET_THUMB)
#define TARGET_EITHER   1
#define TARGET_CALLEE_INTERWORKING   (target_flags & THUMB_FLAG_CALLEE_SUPER_INTERWORKING)
#define TARGET_CALLER_INTERWORKING   (target_flags & THUMB_FLAG_CALLER_SUPER_INTERWORKING)
#define TARGET_BACKTRACE
#define TARGET_CIRRUS_FIX_INVALID_INSNS   (target_flags & CIRRUS_FIX_INVALID_INSNS)
#define TARGET_LDRD   (arm_arch5e && ARM_DOUBLEWORD_ALIGN)
#define TARGET_AAPCS_BASED   (arm_abi != ARM_ABI_APCS && arm_abi != ARM_ABI_ATPCS)
#define TARGET_BPABI   false
#define TARGET_SWITCHES
#define TARGET_OPTIONS
#define OPTION_DEFAULT_SPECS
#define arm_fpu_attr   ((enum attr_fpu) arm_fpu_tune)
#define TARGET_DEFAULT_FLOAT_ABI   ARM_FLOAT_ABI_SOFT
#define ARM_DEFAULT_ABI   ARM_ABI_APCS
#define TARGET_DEFAULT   (ARM_FLAG_APCS_FRAME)
#define CAN_DEBUG_WITHOUT_FP
#define OVERRIDE_OPTIONS   arm_override_options ()
#define NEED_GOT_RELOC   0
#define NEED_PLT_RELOC   0
#define GOT_PCREL   1
#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)
#define PROMOTE_FUNCTION_MODE(MODE, UNSIGNEDP, TYPE)
#define BITS_BIG_ENDIAN   0
#define BYTES_BIG_ENDIAN   (TARGET_BIG_END != 0)
#define WORDS_BIG_ENDIAN   (BYTES_BIG_ENDIAN && ! TARGET_LITTLE_WORDS)
#define LIBGCC2_WORDS_BIG_ENDIAN   0
#define FLOAT_WORDS_BIG_ENDIAN   (arm_float_words_big_endian ())
#define UNITS_PER_WORD   4
#define ARM_DOUBLEWORD_ALIGN   TARGET_AAPCS_BASED
#define DOUBLEWORD_ALIGNMENT   64
#define PARM_BOUNDARY   32
#define STACK_BOUNDARY   (ARM_DOUBLEWORD_ALIGN ? DOUBLEWORD_ALIGNMENT : 32)
#define PREFERRED_STACK_BOUNDARY   (arm_abi == ARM_ABI_ATPCS ? 64 : STACK_BOUNDARY)
#define FUNCTION_BOUNDARY   32
#define TARGET_PTRMEMFUNC_VBIT_LOCATION   ptrmemfunc_vbit_in_delta
#define EMPTY_FIELD_BOUNDARY   32
#define BIGGEST_ALIGNMENT   (ARM_DOUBLEWORD_ALIGN ? DOUBLEWORD_ALIGNMENT : 32)
#define CONSTANT_ALIGNMENT_FACTOR   (TARGET_THUMB || ! arm_tune_xscale ? 1 : 2)
#define CONSTANT_ALIGNMENT(EXP, ALIGN)
#define STRUCTURE_SIZE_BOUNDARY   arm_structure_size_boundary
#define DEFAULT_STRUCTURE_SIZE_BOUNDARY   32
#define STRICT_ALIGNMENT   1
#define WCHAR_TYPE   (TARGET_AAPCS_BASED ? "unsigned int" : "int")
#define WCHAR_TYPE_SIZE   BITS_PER_WORD
#define SIZE_TYPE   (TARGET_AAPCS_BASED ? "unsigned int" : "long unsigned int")
#define PCC_BITFIELD_TYPE_MATTERS   TARGET_AAPCS_BASED
#define FIXED_REGISTERS
#define CALL_USED_REGISTERS
#define CONDITIONAL_REGISTER_USAGE
#define ASM_FPRINTF_EXTENSIONS(FILE, ARGS, P)
#define ROUND_UP_WORD(X)   (((X) + 3) & ~3)
#define ARM_NUM_INTS(X)   (((X) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
#define ARM_NUM_REGS(MODE)   ARM_NUM_INTS (GET_MODE_SIZE (MODE))
#define ARM_NUM_REGS2(MODE, TYPE)
#define NUM_ARG_REGS   4
#define ARG_REGISTER(N)   (N - 1)
#define LAST_ARG_REGNUM   ARG_REGISTER (NUM_ARG_REGS)
#define FIRST_LO_REGNUM   0
#define LAST_LO_REGNUM   7
#define FIRST_HI_REGNUM   8
#define LAST_HI_REGNUM   11
#define MUST_USE_SJLJ_EXCEPTIONS   1
#define DWARF2_UNWIND_INFO   1
#define EH_RETURN_DATA_REGNO(N)   (((N) < 2) ? N : INVALID_REGNUM)
#define ARM_EH_STACKADJ_REGNUM   2
#define EH_RETURN_STACKADJ_RTX   gen_rtx_REG (SImode, ARM_EH_STACKADJ_REGNUM)
#define STATIC_CHAIN_REGNUM   (TARGET_ARM ? 12 : 9)
#define ARM_HARD_FRAME_POINTER_REGNUM   11
#define THUMB_HARD_FRAME_POINTER_REGNUM   7
#define HARD_FRAME_POINTER_REGNUM
#define FP_REGNUM   HARD_FRAME_POINTER_REGNUM
#define STACK_POINTER_REGNUM   SP_REGNUM
#define FIRST_FPA_REGNUM   16
#define LAST_FPA_REGNUM   23
#define FIRST_IWMMXT_GR_REGNUM   43
#define LAST_IWMMXT_GR_REGNUM   46
#define FIRST_IWMMXT_REGNUM   47
#define LAST_IWMMXT_REGNUM   62
#define IS_IWMMXT_REGNUM(REGNUM)   (((REGNUM) >= FIRST_IWMMXT_REGNUM) && ((REGNUM) <= LAST_IWMMXT_REGNUM))
#define IS_IWMMXT_GR_REGNUM(REGNUM)   (((REGNUM) >= FIRST_IWMMXT_GR_REGNUM) && ((REGNUM) <= LAST_IWMMXT_GR_REGNUM))
#define FRAME_POINTER_REGNUM   25
#define ARG_POINTER_REGNUM   26
#define FIRST_CIRRUS_FP_REGNUM   27
#define LAST_CIRRUS_FP_REGNUM   42
#define IS_CIRRUS_REGNUM(REGNUM)   (((REGNUM) >= FIRST_CIRRUS_FP_REGNUM) && ((REGNUM) <= LAST_CIRRUS_FP_REGNUM))
#define FIRST_VFP_REGNUM   63
#define LAST_VFP_REGNUM   94
#define IS_VFP_REGNUM(REGNUM)   (((REGNUM) >= FIRST_VFP_REGNUM) && ((REGNUM) <= LAST_VFP_REGNUM))
#define FIRST_PSEUDO_REGISTER   96
#define FRAME_POINTER_REQUIRED
#define HARD_REGNO_NREGS(REGNO, MODE)
#define HARD_REGNO_MODE_OK(REGNO, MODE)   arm_hard_regno_mode_ok ((REGNO), (MODE))
#define MODES_TIEABLE_P(MODE1, MODE2)   (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
#define VALID_IWMMXT_REG_MODE(MODE)   (arm_vector_mode_supported_p (MODE) || (MODE) == DImode)
#define REG_ALLOC_ORDER
#define HARD_REGNO_RENAME_OK(SRC, DST)
#define N_REG_CLASSES   (int) LIM_REG_CLASSES
#define REG_CLASS_NAMES
#define REG_CLASS_CONTENTS
#define REGNO_REG_CLASS(REGNO)   arm_regno_class (REGNO)
#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS)
#define CLASS_LIKELY_SPILLED_P(CLASS)
#define INDEX_REG_CLASS   (TARGET_THUMB ? LO_REGS : GENERAL_REGS)
#define BASE_REG_CLASS   (TARGET_THUMB ? LO_REGS : GENERAL_REGS)
#define MODE_BASE_REG_CLASS(MODE)
#define MODE_BASE_REG_REG_CLASS(MODE)   BASE_REG_CLASS
#define SMALL_REGISTER_CLASSES   TARGET_THUMB
#define REG_CLASS_FROM_LETTER(C)
#define CONST_OK_FOR_ARM_LETTER(VALUE, C)
#define CONST_OK_FOR_THUMB_LETTER(VAL, C)
#define CONST_OK_FOR_LETTER_P(VALUE, C)
#define CONST_DOUBLE_OK_FOR_ARM_LETTER(X, C)
#define CONST_DOUBLE_OK_FOR_LETTER_P(X, C)
#define EXTRA_CONSTRAINT_STR_ARM(OP, C, STR)
#define CONSTRAINT_LEN(C, STR)   (((C) == 'U' || (C) == 'D') ? 2 : DEFAULT_CONSTRAINT_LEN (C, STR))
#define EXTRA_CONSTRAINT_THUMB(X, C)
#define EXTRA_CONSTRAINT_STR(X, C, STR)
#define EXTRA_MEMORY_CONSTRAINT(C, STR)   ((C) == 'U')
#define PREFERRED_RELOAD_CLASS(X, CLASS)
#define THUMB_SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X)
#define THUMB_SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X)
#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X)
#define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X)
#define ARM_LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND, WIN)
#define THUMB_LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_LEVELS, WIN)
#define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_LEVELS, WIN)
#define CLASS_MAX_NREGS(CLASS, MODE)   (((CLASS) == FPA_REGS || (CLASS) == CIRRUS_REGS) ? 1 : ARM_NUM_REGS (MODE))
#define REGISTER_MOVE_COST(MODE, FROM, TO)
#define STACK_GROWS_DOWNWARD   1
#define FRAME_GROWS_DOWNWARD   1
#define CALLER_INTERWORKING_SLOT_SIZE
#define STARTING_FRAME_OFFSET   0
#define ACCUMULATE_OUTGOING_ARGS   1
#define FIRST_PARM_OFFSET(FNDECL)   (TARGET_ARM ? 4 : 0)
#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE)   0
#define LIBCALL_VALUE(MODE)
#define FUNCTION_VALUE(VALTYPE, FUNC)   arm_function_value (VALTYPE, FUNC);
#define FUNCTION_VALUE_REGNO_P(REGNO)
#define APPLY_RESULT_SIZE   arm_apply_result_size()
#define RETURN_IN_MEMORY(TYPE)   arm_return_in_memory (TYPE)
#define DEFAULT_PCC_STRUCT_RETURN   0
#define CALL_NORMAL   0x00000000
#define CALL_LONG   0x00000001
#define CALL_SHORT   0x00000002
#define ARM_FT_UNKNOWN   0
#define ARM_FT_NORMAL   1
#define ARM_FT_INTERWORKED   2
#define ARM_FT_ISR   4
#define ARM_FT_FIQ   5
#define ARM_FT_EXCEPTION   6
#define ARM_FT_TYPE_MASK   ((1 << 3) - 1)
#define ARM_FT_INTERRUPT   (1 << 2)
#define ARM_FT_NAKED   (1 << 3)
#define ARM_FT_VOLATILE   (1 << 4)
#define ARM_FT_NESTED   (1 << 5)
#define ARM_FUNC_TYPE(t)   (t & ARM_FT_TYPE_MASK)
#define IS_INTERRUPT(t)   (t & ARM_FT_INTERRUPT)
#define IS_VOLATILE(t)   (t & ARM_FT_VOLATILE)
#define IS_NAKED(t)   (t & ARM_FT_NAKED)
#define IS_NESTED(t)   (t & ARM_FT_NESTED)
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED)   arm_function_arg (&(CUM), (MODE), (TYPE), (NAMED))
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS)   arm_init_cumulative_args (&(CUM), (FNTYPE), (LIBNAME), (FNDECL))
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)
#define FUNCTION_ARG_BOUNDARY(MODE, TYPE)
#define FUNCTION_ARG_REGNO_P(REGNO)
#define ARM_MCOUNT_NAME   "*mcount"
#define ARM_FUNCTION_PROFILER(STREAM, LABELNO)
#define FUNCTION_PROFILER(STREAM, LABELNO)   ARM_FUNCTION_PROFILER (STREAM, LABELNO)
#define EXIT_IGNORE_STACK   1
#define EPILOGUE_USES(REGNO)   (reload_completed && (REGNO) == LR_REGNUM)
#define USE_RETURN_INSN(ISCOND)   (TARGET_ARM ? use_return_insn (ISCOND, NULL) : 0)
#define ELIMINABLE_REGS
#define CAN_ELIMINATE(FROM, TO)
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)
#define DEBUGGER_ARG_OFFSET(value, addr)   value ? value : arm_debugger_arg_offset (value, addr)
#define INIT_EXPANDERS   arm_init_expanders ()
#define ARM_TRAMPOLINE_TEMPLATE(FILE)
#define THUMB_TRAMPOLINE_TEMPLATE(FILE)
#define TRAMPOLINE_TEMPLATE(FILE)
#define TRAMPOLINE_SIZE   (TARGET_ARM ? 16 : 24)
#define TRAMPOLINE_ALIGNMENT   32
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT)
#define HAVE_POST_INCREMENT   1
#define HAVE_PRE_INCREMENT   TARGET_ARM
#define HAVE_POST_DECREMENT   TARGET_ARM
#define HAVE_PRE_DECREMENT   TARGET_ARM
#define HAVE_PRE_MODIFY_DISP   TARGET_ARM
#define HAVE_POST_MODIFY_DISP   TARGET_ARM
#define HAVE_PRE_MODIFY_REG   TARGET_ARM
#define HAVE_POST_MODIFY_REG   TARGET_ARM
#define TEST_REGNO(R, TEST, VALUE)   ((R TEST VALUE) || ((unsigned) reg_renumber[R] TEST VALUE))
#define ARM_REGNO_OK_FOR_BASE_P(REGNO)
#define THUMB_REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE)
#define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE)
#define REGNO_MODE_OK_FOR_REG_BASE_P(X, MODE)   REGNO_OK_FOR_INDEX_P (X)
#define REGNO_OK_FOR_INDEX_P(REGNO)   REGNO_MODE_OK_FOR_BASE_P (REGNO, QImode)
#define MAX_REGS_PER_ADDRESS   2
#define CONSTANT_ADDRESS_P(X)
#define ARM_LEGITIMATE_CONSTANT_P(X)   (flag_pic || ! label_mentioned_p (X))
#define THUMB_LEGITIMATE_CONSTANT_P(X)
#define LEGITIMATE_CONSTANT_P(X)   (TARGET_ARM ? ARM_LEGITIMATE_CONSTANT_P (X) : THUMB_LEGITIMATE_CONSTANT_P (X))
#define SHORT_CALL_FLAG_CHAR   '^'
#define LONG_CALL_FLAG_CHAR   '#'
#define ENCODED_SHORT_CALL_ATTR_P(SYMBOL_NAME)   (*(SYMBOL_NAME) == SHORT_CALL_FLAG_CHAR)
#define ENCODED_LONG_CALL_ATTR_P(SYMBOL_NAME)   (*(SYMBOL_NAME) == LONG_CALL_FLAG_CHAR)
#define ARM_NAME_ENCODING_LENGTHS
#define ASM_OUTPUT_LABELREF(FILE, NAME)   arm_asm_output_labelref (FILE, NAME)
#define ARM_DECLARE_FUNCTION_SIZE(STREAM, NAME, DECL)
#define ARM_REG_OK_FOR_BASE_P(X)
#define THUMB_REG_MODE_OK_FOR_BASE_P(X, MODE)
#define REG_STRICT_P   0
#define REG_MODE_OK_FOR_BASE_P(X, MODE)
#define ARM_REG_OK_FOR_INDEX_P(X)   ARM_REG_OK_FOR_BASE_P (X)
#define THUMB_REG_OK_FOR_INDEX_P(X)   THUMB_REG_MODE_OK_FOR_BASE_P (X, QImode)
#define REG_OK_FOR_INDEX_P(X)
#define REG_MODE_OK_FOR_REG_BASE_P(X, MODE)   REG_OK_FOR_INDEX_P (X)
#define ARM_BASE_REGISTER_RTX_P(X)   (GET_CODE (X) == REG && ARM_REG_OK_FOR_BASE_P (X))
#define ARM_INDEX_REGISTER_RTX_P(X)   (GET_CODE (X) == REG && ARM_REG_OK_FOR_INDEX_P (X))
#define ARM_GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN)
#define THUMB_GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN)
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN)
#define ARM_LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
#define THUMB_LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
#define ARM_GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
#define CASE_VECTOR_MODE   Pmode
#define DEFAULT_SIGNED_CHAR   0
#define MOVE_MAX   4
#define MOVE_RATIO   (arm_tune_xscale ? 4 : 2)
#define WORD_REGISTER_OPERATIONS
#define LOAD_EXTEND_OP(MODE)
#define SLOW_BYTE_ACCESS   0
#define SLOW_UNALIGNED_ACCESS(MODE, ALIGN)   1
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC)   1
#define NO_FUNCTION_CSE   1
#define Pmode   SImode
#define FUNCTION_MODE   Pmode
#define ARM_FRAME_RTX(X)
#define MEMORY_MOVE_COST(M, CLASS, IN)
#define BRANCH_COST   (TARGET_ARM ? 4 : (optimize > 1 ? 1 : 0))
#define PIC_OFFSET_TABLE_REGNUM   arm_pic_register
#define LEGITIMATE_PIC_OPERAND_P(X)
#define REGISTER_TARGET_PRAGMAS()
#define SELECT_CC_MODE(OP, X, Y)   arm_select_cc_mode (OP, X, Y)
#define REVERSIBLE_CC_MODE(MODE)   1
#define REVERSE_CONDITION(CODE, MODE)
#define CANONICALIZE_COMPARISON(CODE, OP0, OP1)
#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE)   ((VALUE) = 32, 1)
#define ASM_APP_OFF   (TARGET_THUMB ? "\t.code\t16\n" : "")
#define ASM_OUTPUT_REG_PUSH(STREAM, REGNO)
#define ASM_OUTPUT_REG_POP(STREAM, REGNO)
#define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, JUMPTABLE)
#define ARM_DECLARE_FUNCTION_NAME(STREAM, NAME, DECL)
#define ASM_OUTPUT_DEF_FROM_DECLS(FILE, DECL1, DECL2)
#define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS)
#define PRINT_OPERAND_PUNCT_VALID_P(CODE)
#define PRINT_OPERAND(STREAM, X, CODE)   arm_print_operand (STREAM, X, CODE)
#define ARM_SIGN_EXTEND(x)
#define ARM_PRINT_OPERAND_ADDRESS(STREAM, X)
#define THUMB_PRINT_OPERAND_ADDRESS(STREAM, X)
#define PRINT_OPERAND_ADDRESS(STREAM, X)
#define OUTPUT_ADDR_CONST_EXTRA(FILE, X, FAIL)
#define RETURN_ADDR_RTX(COUNT, FRAME)   arm_return_addr (COUNT, FRAME)
#define RETURN_ADDR_MASK26   (0x03fffffc)
#define INCOMING_RETURN_ADDR_RTX   gen_rtx_REG (Pmode, LR_REGNUM)
#define DWARF_FRAME_RETURN_COLUMN   DWARF_FRAME_REGNUM (LR_REGNUM)
#define MASK_RETURN_ADDR

Typedefs

typedef enum arm_cond_code arm_cc

Enumerations

enum  processor_type {
  PROCESSOR_EV4, PROCESSOR_EV5, PROCESSOR_EV6, PROCESSOR_I386,
  PROCESSOR_I486, PROCESSOR_PENTIUM, PROCESSOR_PENTIUMPRO, PROCESSOR_K6,
  PROCESSOR_ATHLON, PROCESSOR_PENTIUM4, PROCESSOR_max, PROCESSOR_M88100,
  PROCESSOR_M88110, PROCESSOR_M88000, PROCESSOR_700, PROCESSOR_7100,
  PROCESSOR_7100LC, PROCESSOR_7200, PROCESSOR_8000, PROCESSOR_RIOS1,
  PROCESSOR_RIOS2, PROCESSOR_RS64A, PROCESSOR_MPCCORE, PROCESSOR_PPC403,
  PROCESSOR_PPC405, PROCESSOR_PPC601, PROCESSOR_PPC603, PROCESSOR_PPC604,
  PROCESSOR_PPC604e, PROCESSOR_PPC620, PROCESSOR_PPC630, PROCESSOR_PPC750,
  PROCESSOR_PPC7400, PROCESSOR_PPC7450, PROCESSOR_SH1, PROCESSOR_SH2,
  PROCESSOR_SH3, PROCESSOR_SH3E, PROCESSOR_SH4, PROCESSOR_SH5,
  PROCESSOR_DEFAULT, PROCESSOR_R3000, PROCESSOR_R3900, PROCESSOR_R6000,
  PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111, PROCESSOR_R4120,
  PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650, PROCESSOR_R5000,
  PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R8000, PROCESSOR_R4KC,
  PROCESSOR_R5KC, PROCESSOR_R20KC, PROCESSOR_SR71000, PROCESSOR_SB1,
  PROCESSOR_V7, PROCESSOR_CYPRESS, PROCESSOR_V8, PROCESSOR_SUPERSPARC,
  PROCESSOR_SPARCLITE, PROCESSOR_F930, PROCESSOR_F934, PROCESSOR_HYPERSPARC,
  PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET, PROCESSOR_TSC701, PROCESSOR_V9,
  PROCESSOR_ULTRASPARC, PROCESSOR_DEFAULT, PROCESSOR_R3000, PROCESSOR_R3900,
  PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111,
  PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650,
  PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R8000,
  PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC, PROCESSOR_SR71000,
  PROCESSOR_SB1, PROCESSOR_DEFAULT, PROCESSOR_R3000, PROCESSOR_R3900,
  PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111,
  PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650,
  PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R8000,
  PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC, PROCESSOR_SR71000,
  PROCESSOR_SB1, PROCESSOR_EV4, PROCESSOR_EV5, PROCESSOR_EV6,
  PROCESSOR_I386, PROCESSOR_I486, PROCESSOR_PENTIUM, PROCESSOR_PENTIUMPRO,
  PROCESSOR_K6, PROCESSOR_ATHLON, PROCESSOR_PENTIUM4, PROCESSOR_max,
  PROCESSOR_M88100, PROCESSOR_M88110, PROCESSOR_M88000, PROCESSOR_700,
  PROCESSOR_7100, PROCESSOR_7100LC, PROCESSOR_7200, PROCESSOR_8000,
  PROCESSOR_RIOS1, PROCESSOR_RIOS2, PROCESSOR_RS64A, PROCESSOR_MPCCORE,
  PROCESSOR_PPC403, PROCESSOR_PPC405, PROCESSOR_PPC601, PROCESSOR_PPC603,
  PROCESSOR_PPC604, PROCESSOR_PPC604e, PROCESSOR_PPC620, PROCESSOR_PPC630,
  PROCESSOR_PPC750, PROCESSOR_PPC7400, PROCESSOR_PPC7450, PROCESSOR_SH1,
  PROCESSOR_SH2, PROCESSOR_SH3, PROCESSOR_SH3E, PROCESSOR_SH4,
  PROCESSOR_SH5, PROCESSOR_DEFAULT, PROCESSOR_R3000, PROCESSOR_R3900,
  PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111,
  PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650,
  PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R8000,
  PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC, PROCESSOR_SR71000,
  PROCESSOR_SB1, PROCESSOR_V7, PROCESSOR_CYPRESS, PROCESSOR_V8,
  PROCESSOR_SUPERSPARC, PROCESSOR_SPARCLITE, PROCESSOR_F930, PROCESSOR_F934,
  PROCESSOR_HYPERSPARC, PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET, PROCESSOR_TSC701,
  PROCESSOR_V9, PROCESSOR_ULTRASPARC, PROCESSOR_DEFAULT, PROCESSOR_R3000,
  PROCESSOR_R3900, PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100,
  PROCESSOR_R4111, PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600,
  PROCESSOR_R4650, PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500,
  PROCESSOR_R8000, PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC,
  PROCESSOR_SR71000, PROCESSOR_SB1, PROCESSOR_DEFAULT, PROCESSOR_R3000,
  PROCESSOR_R3900, PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100,
  PROCESSOR_R4111, PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600,
  PROCESSOR_R4650, PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500,
  PROCESSOR_R8000, PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC,
  PROCESSOR_SR71000, PROCESSOR_SB1, PROCESSOR_EV4, PROCESSOR_EV5,
  PROCESSOR_EV6, PROCESSOR_MAX, ARM_CORE, PROCESSOR_I386,
  PROCESSOR_I486, PROCESSOR_PENTIUM, PROCESSOR_PENTIUMPRO, PROCESSOR_K6,
  PROCESSOR_ATHLON, PROCESSOR_PENTIUM4, PROCESSOR_K8, PROCESSOR_NOCONA,
  PROCESSOR_max, PROCESSOR_ITANIUM, PROCESSOR_ITANIUM2, PROCESSOR_max,
  PROCESSOR_DEFAULT, PROCESSOR_IQ2000, PROCESSOR_IQ10, PROCESSOR_DEFAULT,
  PROCESSOR_4KC, PROCESSOR_5KC, PROCESSOR_20KC, PROCESSOR_M4K,
  PROCESSOR_R3000, PROCESSOR_R3900, PROCESSOR_R6000, PROCESSOR_R4000,
  PROCESSOR_R4100, PROCESSOR_R4111, PROCESSOR_R4120, PROCESSOR_R4130,
  PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650, PROCESSOR_R5000,
  PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R7000, PROCESSOR_R8000,
  PROCESSOR_R9000, PROCESSOR_SB1, PROCESSOR_SR71000, PROCESSOR_700,
  PROCESSOR_7100, PROCESSOR_7100LC, PROCESSOR_7200, PROCESSOR_7300,
  PROCESSOR_8000, PROCESSOR_RIOS1, PROCESSOR_RIOS2, PROCESSOR_RS64A,
  PROCESSOR_MPCCORE, PROCESSOR_PPC403, PROCESSOR_PPC405, PROCESSOR_PPC440,
  PROCESSOR_PPC601, PROCESSOR_PPC603, PROCESSOR_PPC604, PROCESSOR_PPC604e,
  PROCESSOR_PPC620, PROCESSOR_PPC630, PROCESSOR_PPC750, PROCESSOR_PPC7400,
  PROCESSOR_PPC7450, PROCESSOR_PPC8540, PROCESSOR_POWER4, PROCESSOR_POWER5,
  PROCESSOR_9672_G5, PROCESSOR_9672_G6, PROCESSOR_2064_Z900, PROCESSOR_2084_Z990,
  PROCESSOR_max, PROCESSOR_SH1, PROCESSOR_SH2, PROCESSOR_SH2E,
  PROCESSOR_SH2A, PROCESSOR_SH3, PROCESSOR_SH3E, PROCESSOR_SH4,
  PROCESSOR_SH4A, PROCESSOR_SH5, PROCESSOR_V7, PROCESSOR_CYPRESS,
  PROCESSOR_V8, PROCESSOR_SUPERSPARC, PROCESSOR_SPARCLITE, PROCESSOR_F930,
  PROCESSOR_F934, PROCESSOR_HYPERSPARC, PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET,
  PROCESSOR_TSC701, PROCESSOR_V9, PROCESSOR_ULTRASPARC, PROCESSOR_ULTRASPARC3,
  PROCESSOR_EV4, PROCESSOR_EV5, PROCESSOR_EV6, PROCESSOR_MAX,
  ARM_CORE, PROCESSOR_I386, PROCESSOR_I486, PROCESSOR_PENTIUM,
  PROCESSOR_PENTIUMPRO, PROCESSOR_K6, PROCESSOR_ATHLON, PROCESSOR_PENTIUM4,
  PROCESSOR_K8, PROCESSOR_NOCONA, PROCESSOR_GENERIC32, PROCESSOR_GENERIC64,
  PROCESSOR_AMDFAM10, PROCESSOR_max, PROCESSOR_ITANIUM, PROCESSOR_ITANIUM2,
  PROCESSOR_max, PROCESSOR_DEFAULT, PROCESSOR_IQ2000, PROCESSOR_IQ10,
  PROCESSOR_R3000, PROCESSOR_4KC, PROCESSOR_4KP, PROCESSOR_5KC,
  PROCESSOR_5KF, PROCESSOR_20KC, PROCESSOR_24K, PROCESSOR_24KX,
  PROCESSOR_M4K, PROCESSOR_R3900, PROCESSOR_R6000, PROCESSOR_R4000,
  PROCESSOR_R4100, PROCESSOR_R4111, PROCESSOR_R4120, PROCESSOR_R4130,
  PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650, PROCESSOR_R5000,
  PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R7000, PROCESSOR_R8000,
  PROCESSOR_R9000, PROCESSOR_SB1, PROCESSOR_SB1A, PROCESSOR_SR71000,
  PROCESSOR_MAX, PROCESSOR_MN10300, PROCESSOR_AM33, PROCESSOR_AM33_2,
  PROCESSOR_MS1_64_001, PROCESSOR_MS1_16_002, PROCESSOR_MS1_16_003, PROCESSOR_MS2,
  PROCESSOR_700, PROCESSOR_7100, PROCESSOR_7100LC, PROCESSOR_7200,
  PROCESSOR_7300, PROCESSOR_8000, PROCESSOR_RIOS1, PROCESSOR_RIOS2,
  PROCESSOR_RS64A, PROCESSOR_MPCCORE, PROCESSOR_PPC403, PROCESSOR_PPC405,
  PROCESSOR_PPC440, PROCESSOR_PPC601, PROCESSOR_PPC603, PROCESSOR_PPC604,
  PROCESSOR_PPC604e, PROCESSOR_PPC620, PROCESSOR_PPC630, PROCESSOR_PPC750,
  PROCESSOR_PPC7400, PROCESSOR_PPC7450, PROCESSOR_PPC8540, PROCESSOR_POWER4,
  PROCESSOR_POWER5, PROCESSOR_9672_G5, PROCESSOR_9672_G6, PROCESSOR_2064_Z900,
  PROCESSOR_2084_Z990, PROCESSOR_2094_Z9_109, PROCESSOR_max, PROCESSOR_SH1,
  PROCESSOR_SH2, PROCESSOR_SH2E, PROCESSOR_SH2A, PROCESSOR_SH3,
  PROCESSOR_SH3E, PROCESSOR_SH4, PROCESSOR_SH4A, PROCESSOR_SH5,
  PROCESSOR_V7, PROCESSOR_CYPRESS, PROCESSOR_V8, PROCESSOR_SUPERSPARC,
  PROCESSOR_SPARCLITE, PROCESSOR_F930, PROCESSOR_F934, PROCESSOR_HYPERSPARC,
  PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET, PROCESSOR_TSC701, PROCESSOR_V9,
  PROCESSOR_ULTRASPARC, PROCESSOR_ULTRASPARC3, PROCESSOR_NIAGARA
}
enum  target_cpus { ARM_CORE, ARM_CORE }
enum  arm_cond_code {
  ARM_EQ = 0, ARM_NE, ARM_CS, ARM_CC,
  ARM_MI, ARM_PL, ARM_VS, ARM_VC,
  ARM_HI, ARM_LS, ARM_GE, ARM_LT,
  ARM_GT, ARM_LE, ARM_AL, ARM_NV,
  ARM_EQ = 0, ARM_NE, ARM_CS, ARM_CC,
  ARM_MI, ARM_PL, ARM_VS, ARM_VC,
  ARM_HI, ARM_LS, ARM_GE, ARM_LT,
  ARM_GT, ARM_LE, ARM_AL, ARM_NV,
  ARM_EQ = 0, ARM_NE, ARM_CS, ARM_CC,
  ARM_MI, ARM_PL, ARM_VS, ARM_VC,
  ARM_HI, ARM_LS, ARM_GE, ARM_LT,
  ARM_GT, ARM_LE, ARM_AL, ARM_NV,
  ARM_EQ = 0, ARM_NE, ARM_CS, ARM_CC,
  ARM_MI, ARM_PL, ARM_VS, ARM_VC,
  ARM_HI, ARM_LS, ARM_GE, ARM_LT,
  ARM_GT, ARM_LE, ARM_AL, ARM_NV
}
enum  arm_fp_model {
  ARM_FP_MODEL_UNKNOWN, ARM_FP_MODEL_FPA, ARM_FP_MODEL_MAVERICK, ARM_FP_MODEL_VFP,
  ARM_FP_MODEL_UNKNOWN, ARM_FP_MODEL_FPA, ARM_FP_MODEL_MAVERICK, ARM_FP_MODEL_VFP
}
enum  fputype {
  FPUTYPE_NONE, FPUTYPE_FPA, FPUTYPE_FPA_EMU2, FPUTYPE_FPA_EMU3,
  FPUTYPE_MAVERICK, FPUTYPE_VFP, FPUTYPE_NONE, FPUTYPE_FPA,
  FPUTYPE_FPA_EMU2, FPUTYPE_FPA_EMU3, FPUTYPE_MAVERICK, FPUTYPE_VFP
}
enum  float_abi_type {
  ARM_FLOAT_ABI_SOFT, ARM_FLOAT_ABI_SOFTFP, ARM_FLOAT_ABI_HARD, ARM_FLOAT_ABI_SOFT,
  ARM_FLOAT_ABI_SOFTFP, ARM_FLOAT_ABI_HARD
}
enum  arm_abi_type {
  ARM_ABI_APCS, ARM_ABI_ATPCS, ARM_ABI_AAPCS, ARM_ABI_IWMMXT,
  ARM_ABI_APCS, ARM_ABI_ATPCS, ARM_ABI_AAPCS, ARM_ABI_IWMMXT,
  ARM_ABI_AAPCS_LINUX
}
enum  reg_class {
  NO_REGS, R2, R0_1, INDEX_REGS,
  BASE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  LR0_REGS, GENERAL_REGS, BP_REGS, FC_REGS,
  CR_REGS, Q_REGS, SPECIAL_REGS, ACCUM0_REGS,
  ACCUM_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R24_REG, R25_REG, R27_REG,
  GENERAL_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, LPCOUNT_REG, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, FPU_REGS, LO_REGS,
  STACK_REG, BASE_REGS, HI_REGS, CC_REG,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REG, POINTER_X_REGS, POINTER_Y_REGS, POINTER_Z_REGS,
  STACK_REG, BASE_POINTER_REGS, POINTER_REGS, ADDW_REGS,
  SIMPLE_LD_REGS, LD_REGS, NO_LD_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0R1_REGS,
  R2R3_REGS, EXT_LOW_REGS, EXT_REGS, ADDR_REGS,
  INDEX_REGS, BK_REG, SP_REG, RC_REG,
  COUNTER_REGS, INT_REGS, GENERAL_REGS, DP_REG,
  ST_REG, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, S_REGS, INDEX_REGS, SP_REGS,
  A_REGS, SI_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  REPEAT_REGS, CR_REGS, ACCUM_REGS, OTHER_FLAG_REGS,
  F0_REGS, F1_REGS, BR_FLAG_REGS, FLAG_REGS,
  EVEN_REGS, GPR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, A0H_REG, A0L_REG, A0_REG,
  A1H_REG, ACCUM_HIGH_REGS, A1L_REG, ACCUM_LOW_REGS,
  A1_REG, ACCUM_REGS, X_REG, X_OR_ACCUM_LOW_REGS,
  X_OR_ACCUM_REGS, YH_REG, YH_OR_ACCUM_HIGH_REGS, X_OR_YH_REGS,
  YL_REG, YL_OR_ACCUM_LOW_REGS, X_OR_YL_REGS, X_OR_Y_REGS,
  Y_REG, ACCUM_OR_Y_REGS, PH_REG, X_OR_PH_REGS,
  PL_REG, PL_OR_ACCUM_LOW_REGS, X_OR_PL_REGS, YL_OR_PL_OR_ACCUM_LOW_REGS,
  P_REG, ACCUM_OR_P_REGS, YL_OR_P_REGS, ACCUM_LOW_OR_YL_OR_P_REGS,
  Y_OR_P_REGS, ACCUM_Y_OR_P_REGS, NO_FRAME_Y_ADDR_REGS, Y_ADDR_REGS,
  ACCUM_LOW_OR_Y_ADDR_REGS, ACCUM_OR_Y_ADDR_REGS, X_OR_Y_ADDR_REGS, Y_OR_Y_ADDR_REGS,
  P_OR_Y_ADDR_REGS, NON_HIGH_YBASE_ELIGIBLE_REGS, YBASE_ELIGIBLE_REGS, J_REG,
  J_OR_DAU_16_BIT_REGS, BMU_REGS, NOHIGH_NON_ADDR_REGS, NON_ADDR_REGS,
  SLOW_MEM_LOAD_REGS, NOHIGH_NON_YBASE_REGS, NO_ACCUM_NON_YBASE_REGS, NON_YBASE_REGS,
  YBASE_VIRT_REGS, ACCUM_LOW_OR_YBASE_REGS, ACCUM_OR_YBASE_REGS, X_OR_YBASE_REGS,
  Y_OR_YBASE_REGS, ACCUM_LOW_YL_PL_OR_YBASE_REGS, P_OR_YBASE_REGS, ACCUM_Y_P_OR_YBASE_REGS,
  Y_ADDR_OR_YBASE_REGS, YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS, YBASE_OR_YBASE_ELIGIBLE_REGS, NO_HIGH_ALL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG,
  MULTIPLY_64_REG, LOW_REGS, HIGH_REGS, REAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,
  MAC_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ADDR_REGS, DATA_REGS, FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, AREG, DREG,
  CREG, BREG, SIREG, DIREG,
  AD_REGS, Q_REGS, NON_Q_REGS, INDEX_REGS,
  LEGACY_REGS, GENERAL_REGS, FP_TOP_REG, FP_SECOND_REG,
  FLOAT_REGS, SSE_REGS, MMX_REGS, FP_TOP_SSE_REGS,
  FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS, INT_SSE_REGS,
  FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GLOBAL_REGS, LOCAL_REGS, LOCAL_OR_GLOBAL_REGS,
  FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  PR_REGS, BR_REGS, AR_M_REGS, AR_I_REGS,
  ADDL_REGS, GR_REGS, FR_REGS, GR_AND_BR_REGS,
  GR_AND_FR_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  CARRY_REG, ACCUM_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, D_REGS, X_REGS,
  Y_REGS, SP_REGS, DA_REGS, DB_REGS,
  Z_REGS, D8_REGS, Q_REGS, D_OR_X_REGS,
  D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS, A_REGS,
  X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS, A_OR_D_REGS,
  A_OR_SP_REGS, H_REGS, S_REGS, D_OR_S_REGS,
  X_OR_S_REGS, Y_OR_S_REGS, SP_OR_S_REGS, D_OR_X_OR_S_REGS,
  D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS, A_OR_S_REGS, D_OR_A_OR_S_REGS,
  TMP_REGS, D_OR_A_OR_TMP_REGS, G_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, DATA_REGS, ADDR_REGS,
  FP_REGS, GENERAL_REGS, DATA_OR_FP_REGS, ADDR_OR_FP_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, AP_REG,
  XRF_REGS, GENERAL_REGS, AGRF_REGS, XGRF_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, ONLYR1_REGS,
  LRW_REGS, GENERAL_REGS, C_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, REMAINDER_REG,
  HIMULT_REG, SYSTEM_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, DATA_REGS, ADDRESS_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,
  ADDRESS_REGS, SP_REGS, DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,
  EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS,
  SP_OR_ADDRESS_OR_EXTENDED_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, FLOAT_REG0, LONG_FLOAT_REG0,
  FLOAT_REGS, FP_REGS, GEN_AND_FP_REGS, FRAME_POINTER_REG,
  STACK_POINTER_REG, GEN_AND_MEM_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R1_REGS, GENERAL_REGS, FPUPPER_REGS,
  FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,
  FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, MUL_REGS,
  GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS, FPU_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, OUT_REGS,
  STD_REGS, ARG_REGS, SRC_REGS, DST_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0_REGS,
  R15_REGS, BASE_REGS, GENERAL_REGS, FP_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, BASE_REGS,
  GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS, VRSAVE_REGS,
  NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,
  LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,
  CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, ADDR_REGS, GENERAL_REGS,
  FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REGS, PR_REGS,
  T_REGS, MAC_REGS, FPUL_REGS, SIBCALL_REGS,
  GENERAL_REGS, FP0_REGS, FP_REGS, DF_REGS,
  FPSCR_REGS, GENERAL_FP_REGS, TARGET_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, M16_NA_REGS, M16_REGS,
  T_REG, M16_T_REGS, GR_REGS, FP_REGS,
  HI_REG, LO_REG, HILO_REG, MD_REGS,
  COP0_REGS, COP2_REGS, COP3_REGS, HI_AND_GR_REGS,
  LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS,
  COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS,
  ST_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  FPCC_REGS, I64_REGS, GENERAL_REGS, FP_REGS,
  EXTRA_FP_REGS, GENERAL_OR_FP_REGS, GENERAL_OR_EXTRA_FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REGS, R1_REGS,
  TWO_REGS, R2_REGS, EIGHT_REGS, R8_REGS,
  ICALL_REGS, GENERAL_REGS, CARRY_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, BR_REGS, FP_REGS, ACC_REG,
  SP_REG, RL_REGS, GR_REGS, AR_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,
  M16_REGS, T_REG, M16_T_REGS, GR_REGS,
  FP_REGS, HI_REG, LO_REG, HILO_REG,
  MD_REGS, COP0_REGS, COP2_REGS, COP3_REGS,
  HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS,
  COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS,
  ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, M16_NA_REGS, M16_REGS, T_REG,
  M16_T_REGS, GR_REGS, FP_REGS, HI_REG,
  LO_REG, HILO_REG, MD_REGS, COP0_REGS,
  COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,
  HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS,
  COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R2,
  R0_1, INDEX_REGS, BASE_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, LR0_REGS, GENERAL_REGS,
  BP_REGS, FC_REGS, CR_REGS, Q_REGS,
  SPECIAL_REGS, ACCUM0_REGS, ACCUM_REGS, FLOAT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R24_REG,
  R25_REG, R27_REG, GENERAL_REGS, FLOAT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  FPU_REGS, LO_REGS, STACK_REG, BASE_REGS,
  HI_REGS, CC_REG, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REG, POINTER_X_REGS,
  POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG, BASE_POINTER_REGS,
  POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS, LD_REGS,
  NO_LD_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R0R1_REGS, R2R3_REGS, EXT_LOW_REGS,
  EXT_REGS, ADDR_REGS, INDEX_REGS, BK_REG,
  SP_REG, RC_REG, COUNTER_REGS, INT_REGS,
  GENERAL_REGS, DP_REG, ST_REG, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, FLOAT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, S_REGS,
  INDEX_REGS, SP_REGS, A_REGS, SI_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, REPEAT_REGS, CR_REGS,
  ACCUM_REGS, OTHER_FLAG_REGS, F0_REGS, F1_REGS,
  BR_FLAG_REGS, FLAG_REGS, EVEN_REGS, GPR_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, A0H_REG,
  A0L_REG, A0_REG, A1H_REG, ACCUM_HIGH_REGS,
  A1L_REG, ACCUM_LOW_REGS, A1_REG, ACCUM_REGS,
  X_REG, X_OR_ACCUM_LOW_REGS, X_OR_ACCUM_REGS, YH_REG,
  YH_OR_ACCUM_HIGH_REGS, X_OR_YH_REGS, YL_REG, YL_OR_ACCUM_LOW_REGS,
  X_OR_YL_REGS, X_OR_Y_REGS, Y_REG, ACCUM_OR_Y_REGS,
  PH_REG, X_OR_PH_REGS, PL_REG, PL_OR_ACCUM_LOW_REGS,
  X_OR_PL_REGS, YL_OR_PL_OR_ACCUM_LOW_REGS, P_REG, ACCUM_OR_P_REGS,
  YL_OR_P_REGS, ACCUM_LOW_OR_YL_OR_P_REGS, Y_OR_P_REGS, ACCUM_Y_OR_P_REGS,
  NO_FRAME_Y_ADDR_REGS, Y_ADDR_REGS, ACCUM_LOW_OR_Y_ADDR_REGS, ACCUM_OR_Y_ADDR_REGS,
  X_OR_Y_ADDR_REGS, Y_OR_Y_ADDR_REGS, P_OR_Y_ADDR_REGS, NON_HIGH_YBASE_ELIGIBLE_REGS,
  YBASE_ELIGIBLE_REGS, J_REG, J_OR_DAU_16_BIT_REGS, BMU_REGS,
  NOHIGH_NON_ADDR_REGS, NON_ADDR_REGS, SLOW_MEM_LOAD_REGS, NOHIGH_NON_YBASE_REGS,
  NO_ACCUM_NON_YBASE_REGS, NON_YBASE_REGS, YBASE_VIRT_REGS, ACCUM_LOW_OR_YBASE_REGS,
  ACCUM_OR_YBASE_REGS, X_OR_YBASE_REGS, Y_OR_YBASE_REGS, ACCUM_LOW_YL_PL_OR_YBASE_REGS,
  P_OR_YBASE_REGS, ACCUM_Y_P_OR_YBASE_REGS, Y_ADDR_OR_YBASE_REGS, YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS,
  YBASE_OR_YBASE_ELIGIBLE_REGS, NO_HIGH_ALL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, MULTIPLY_32_REG, MULTIPLY_64_REG, LOW_REGS,
  HIGH_REGS, REAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, MAC_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, ADDR_REGS, DATA_REGS,
  FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  AREG, DREG, CREG, BREG,
  SIREG, DIREG, AD_REGS, Q_REGS,
  NON_Q_REGS, INDEX_REGS, LEGACY_REGS, GENERAL_REGS,
  FP_TOP_REG, FP_SECOND_REG, FLOAT_REGS, SSE_REGS,
  MMX_REGS, FP_TOP_SSE_REGS, FP_SECOND_SSE_REGS, FLOAT_SSE_REGS,
  FLOAT_INT_REGS, INT_SSE_REGS, FLOAT_INT_SSE_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, FP_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GLOBAL_REGS,
  LOCAL_REGS, LOCAL_OR_GLOBAL_REGS, FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, PR_REGS, BR_REGS,
  AR_M_REGS, AR_I_REGS, ADDL_REGS, GR_REGS,
  FR_REGS, GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, CARRY_REG, ACCUM_REGS,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  D_REGS, X_REGS, Y_REGS, SP_REGS,
  DA_REGS, DB_REGS, Z_REGS, D8_REGS,
  Q_REGS, D_OR_X_REGS, D_OR_Y_REGS, D_OR_SP_REGS,
  X_OR_Y_REGS, A_REGS, X_OR_SP_REGS, Y_OR_SP_REGS,
  X_OR_Y_OR_D_REGS, A_OR_D_REGS, A_OR_SP_REGS, H_REGS,
  S_REGS, D_OR_S_REGS, X_OR_S_REGS, Y_OR_S_REGS,
  SP_OR_S_REGS, D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS,
  A_OR_S_REGS, D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS,
  G_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  DATA_REGS, ADDR_REGS, FP_REGS, GENERAL_REGS,
  DATA_OR_FP_REGS, ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS,
  AGRF_REGS, XGRF_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, ONLYR1_REGS, LRW_REGS, GENERAL_REGS,
  C_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, REMAINDER_REG, HIMULT_REG, SYSTEM_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,
  ADDRESS_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS,
  DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS, EXTENDED_REGS, DATA_OR_EXTENDED_REGS,
  ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,
  FLOAT_REG0, LONG_FLOAT_REG0, FLOAT_REGS, FP_REGS,
  GEN_AND_FP_REGS, FRAME_POINTER_REG, STACK_POINTER_REG, GEN_AND_MEM_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,
  GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,
  SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R1_REGS, GENERAL_REGS, FPUPPER_REGS, FP_REGS,
  GENERAL_OR_FP_REGS, SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS,
  NO_LOAD_FPU_REGS, FPU_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, OUT_REGS, STD_REGS, ARG_REGS,
  SRC_REGS, DST_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R0_REGS, R15_REGS, BASE_REGS,
  GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, BASE_REGS, GENERAL_REGS, FLOAT_REGS,
  ALTIVEC_REGS, VRSAVE_REGS, NON_SPECIAL_REGS, MQ_REGS,
  LINK_REGS, CTR_REGS, LINK_OR_CTR_REGS, SPECIAL_REGS,
  SPEC_OR_GEN_REGS, CR0_REGS, CR_REGS, NON_FLOAT_REGS,
  XER_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ADDR_REGS, GENERAL_REGS, FP_REGS, ADDR_FP_REGS,
  GENERAL_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REGS, PR_REGS, T_REGS, MAC_REGS,
  FPUL_REGS, SIBCALL_REGS, GENERAL_REGS, FP0_REGS,
  FP_REGS, DF_REGS, FPSCR_REGS, GENERAL_FP_REGS,
  TARGET_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  M16_NA_REGS, M16_REGS, T_REG, M16_T_REGS,
  GR_REGS, FP_REGS, HI_REG, LO_REG,
  HILO_REG, MD_REGS, COP0_REGS, COP2_REGS,
  COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS,
  HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,
  ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, FPCC_REGS, I64_REGS,
  GENERAL_REGS, FP_REGS, EXTRA_FP_REGS, GENERAL_OR_FP_REGS,
  GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REGS, R1_REGS, TWO_REGS, R2_REGS,
  EIGHT_REGS, R8_REGS, ICALL_REGS, GENERAL_REGS,
  CARRY_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, BR_REGS,
  FP_REGS, ACC_REG, SP_REG, RL_REGS,
  GR_REGS, AR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, M16_NA_REGS, M16_REGS, T_REG,
  M16_T_REGS, GR_REGS, FP_REGS, HI_REG,
  LO_REG, HILO_REG, MD_REGS, COP0_REGS,
  COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,
  HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS,
  COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,
  M16_REGS, T_REG, M16_T_REGS, GR_REGS,
  FP_REGS, HI_REG, LO_REG, HILO_REG,
  MD_REGS, COP0_REGS, COP2_REGS, COP3_REGS,
  HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS,
  COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS,
  ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R0_REG, R24_REG, R25_REG,
  R27_REG, GENERAL_REGS, FLOAT_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, FPA_REGS,
  CIRRUS_REGS, VFP_REGS, IWMMXT_GR_REGS, IWMMXT_REGS,
  LO_REGS, STACK_REG, BASE_REGS, HI_REGS,
  CC_REG, VFPCC_REG, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REG, POINTER_X_REGS,
  POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG, BASE_POINTER_REGS,
  POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS, LD_REGS,
  NO_LD_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, IREGS, BREGS, LREGS,
  MREGS, CIRCREGS, DAGREGS, EVEN_AREGS,
  ODD_AREGS, AREGS, CCREGS, EVEN_DREGS,
  ODD_DREGS, DREGS, PREGS_CLOBBERED, PREGS,
  DPREGS, MOST_REGS, PROLOGUE_REGS, NON_A_CC_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0R1_REGS,
  R2R3_REGS, EXT_LOW_REGS, EXT_REGS, ADDR_REGS,
  INDEX_REGS, BK_REG, SP_REG, RC_REG,
  COUNTER_REGS, INT_REGS, GENERAL_REGS, DP_REG,
  ST_REG, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG,
  MULTIPLY_64_REG, LOW_REGS, HIGH_REGS, REAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, ICC_REGS,
  FCC_REGS, CC_REGS, ICR_REGS, FCR_REGS,
  CR_REGS, LCR_REG, LR_REG, GR8_REGS,
  GR9_REGS, GR89_REGS, FDPIC_REGS, FDPIC_FPTR_REGS,
  FDPIC_CALL_REGS, SPR_REGS, QUAD_ACC_REGS, EVEN_ACC_REGS,
  ACC_REGS, ACCG_REGS, QUAD_FPR_REGS, FEVEN_REGS,
  FPR_REGS, QUAD_REGS, EVEN_REGS, GPR_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, COUNTER_REGS,
  SOURCE_REGS, DESTINATION_REGS, GENERAL_REGS, MAC_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, AREG,
  DREG, CREG, BREG, SIREG,
  DIREG, AD_REGS, Q_REGS, NON_Q_REGS,
  INDEX_REGS, LEGACY_REGS, GENERAL_REGS, FP_TOP_REG,
  FP_SECOND_REG, FLOAT_REGS, SSE_REGS, MMX_REGS,
  FP_TOP_SSE_REGS, FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS,
  INT_SSE_REGS, FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, PR_REGS, BR_REGS,
  AR_M_REGS, AR_I_REGS, ADDL_REGS, GR_REGS,
  FR_REGS, GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, DPH_REGS, DPL_REGS,
  DP_REGS, SP_REGS, IPH_REGS, IPL_REGS,
  IP_REGS, DP_SP_REGS, PTR_REGS, NONPTR_REGS,
  NONSP_REGS, GENERAL_REGS, ALL_REGS = GENERAL_REGS, LIM_REG_CLASSES,
  NO_REGS, GR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, CARRY_REG, ACCUM_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, D_REGS,
  X_REGS, Y_REGS, SP_REGS, DA_REGS,
  DB_REGS, Z_REGS, D8_REGS, Q_REGS,
  D_OR_X_REGS, D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS,
  A_REGS, X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS,
  A_OR_D_REGS, A_OR_SP_REGS, H_REGS, S_REGS,
  D_OR_S_REGS, X_OR_S_REGS, Y_OR_S_REGS, Z_OR_S_REGS,
  SP_OR_S_REGS, D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS,
  A_OR_S_REGS, D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS,
  G_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  DATA_REGS, ADDR_REGS, FP_REGS, GENERAL_REGS,
  DATA_OR_FP_REGS, ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, ONLYR1_REGS, LRW_REGS, GENERAL_REGS,
  C_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  M16_NA_REGS, M16_REGS, T_REG, M16_T_REGS,
  PIC_FN_ADDR_REG, LEA_REGS, GR_REGS, FP_REGS,
  HI_REG, LO_REG, MD_REGS, COP0_REGS,
  COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,
  HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,
  ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, REMAINDER_REG,
  HIMULT_REG, SYSTEM_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS,
  DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS, EXTENDED_REGS, DATA_OR_EXTENDED_REGS,
  ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS, FP_REGS,
  FP_ACC_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, FLOAT_REG0, LONG_FLOAT_REG0,
  FLOAT_REGS, LONG_REGS, FP_REGS, GEN_AND_FP_REGS,
  FRAME_POINTER_REG, STACK_POINTER_REG, GEN_AND_MEM_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,
  FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,
  GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,
  SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS,
  FPU_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  BASE_REGS, GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS,
  VRSAVE_REGS, VSCR_REGS, SPE_ACC_REGS, SPEFSCR_REGS,
  NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,
  LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,
  CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, CC_REGS, ADDR_REGS,
  GENERAL_REGS, ACCESS_REGS, ADDR_CC_REGS, GENERAL_CC_REGS,
  FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REGS, PR_REGS,
  T_REGS, MAC_REGS, FPUL_REGS, SIBCALL_REGS,
  GENERAL_REGS, FP0_REGS, FP_REGS, DF_HI_REGS,
  DF_REGS, FPSCR_REGS, GENERAL_FP_REGS, TARGET_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, FPCC_REGS,
  I64_REGS, GENERAL_REGS, FP_REGS, EXTRA_FP_REGS,
  GENERAL_OR_FP_REGS, GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R0_REGS, R1_REGS, TWO_REGS,
  R2_REGS, EIGHT_REGS, R8_REGS, ICALL_REGS,
  GENERAL_REGS, CARRY_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  BR_REGS, FP_REGS, ACC_REG, SP_REG,
  RL_REGS, GR_REGS, AR_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REG, R24_REG,
  R25_REG, R27_REG, GENERAL_REGS, FLOAT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  FPA_REGS, CIRRUS_REGS, VFP_REGS, IWMMXT_GR_REGS,
  IWMMXT_REGS, LO_REGS, STACK_REG, BASE_REGS,
  HI_REGS, CC_REG, VFPCC_REG, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0_REG,
  POINTER_X_REGS, POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG,
  BASE_POINTER_REGS, POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS,
  LD_REGS, NO_LD_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, IREGS, BREGS,
  LREGS, MREGS, CIRCREGS, DAGREGS,
  EVEN_AREGS, ODD_AREGS, AREGS, CCREGS,
  EVEN_DREGS, ODD_DREGS, DREGS, FDPIC_REGS,
  FDPIC_FPTR_REGS, PREGS_CLOBBERED, PREGS, IPREGS,
  DPREGS, MOST_REGS, LT_REGS, LC_REGS,
  LB_REGS, PROLOGUE_REGS, NON_A_CC_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0R1_REGS, R2R3_REGS,
  EXT_LOW_REGS, EXT_REGS, ADDR_REGS, INDEX_REGS,
  BK_REG, SP_REG, RC_REG, COUNTER_REGS,
  INT_REGS, GENERAL_REGS, DP_REG, ST_REG,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, MOF_REGS,
  CC0_REGS, SPECIAL_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, LO_REGS, HI_REGS,
  HILO_REGS, NOSP_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG, MULTIPLY_64_REG,
  LOW_REGS, HIGH_REGS, REAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, ICC_REGS, FCC_REGS,
  CC_REGS, ICR_REGS, FCR_REGS, CR_REGS,
  LCR_REG, LR_REG, GR8_REGS, GR9_REGS,
  GR89_REGS, FDPIC_REGS, FDPIC_FPTR_REGS, FDPIC_CALL_REGS,
  SPR_REGS, QUAD_ACC_REGS, EVEN_ACC_REGS, ACC_REGS,
  ACCG_REGS, QUAD_FPR_REGS, FEVEN_REGS, FPR_REGS,
  QUAD_REGS, EVEN_REGS, GPR_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, COUNTER_REGS, SOURCE_REGS,
  DESTINATION_REGS, GENERAL_REGS, MAC_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, AREG, DREG,
  CREG, BREG, SIREG, DIREG,
  AD_REGS, Q_REGS, NON_Q_REGS, INDEX_REGS,
  LEGACY_REGS, GENERAL_REGS, FP_TOP_REG, FP_SECOND_REG,
  FLOAT_REGS, SSE_REGS, MMX_REGS, FP_TOP_SSE_REGS,
  FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS, INT_SSE_REGS,
  FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  PR_REGS, BR_REGS, AR_M_REGS, AR_I_REGS,
  ADDL_REGS, GR_REGS, FP_REGS, FR_REGS,
  GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, SP_REGS, FB_REGS, SB_REGS,
  CR_REGS, R0_REGS, R1_REGS, R2_REGS,
  R3_REGS, R02_REGS, HL_REGS, QI_REGS,
  R23_REGS, R03_REGS, DI_REGS, A0_REGS,
  A1_REGS, A_REGS, AD_REGS, PS_REGS,
  SI_REGS, HI_REGS, RA_REGS, GENERAL_REGS,
  FLG_REGS, HC_REGS, MEM_REGS, R02_A_MEM_REGS,
  A_HL_MEM_REGS, R1_R3_A_MEM_REGS, R03_MEM_REGS, A_HI_MEM_REGS,
  A_AD_CR_MEM_SI_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  CARRY_REG, ACCUM_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, D_REGS, X_REGS,
  Y_REGS, SP_REGS, DA_REGS, DB_REGS,
  Z_REGS, D8_REGS, Q_REGS, D_OR_X_REGS,
  D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS, A_REGS,
  X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS, A_OR_D_REGS,
  A_OR_SP_REGS, H_REGS, S_REGS, D_OR_S_REGS,
  X_OR_S_REGS, Y_OR_S_REGS, Z_OR_S_REGS, SP_OR_S_REGS,
  D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS, A_OR_S_REGS,
  D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS, G_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,
  ADDR_REGS, FP_REGS, GENERAL_REGS, DATA_OR_FP_REGS,
  ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ONLYR1_REGS, LRW_REGS, GENERAL_REGS, C_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,
  M16_REGS, T_REG, M16_T_REGS, PIC_FN_ADDR_REG,
  V1_REG, LEA_REGS, GR_REGS, FP_REGS,
  HI_REG, LO_REG, MD_REGS, COP0_REGS,
  COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,
  HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,
  ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, DSP_ACC_REGS,
  ACC_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, REMAINDER_REG, HIMULT_REG, SYSTEM_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,
  ADDRESS_REGS, SP_REGS, DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,
  EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS,
  SP_OR_ADDRESS_OR_EXTENDED_REGS, FP_REGS, FP_ACC_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,
  FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,
  GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,
  SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS,
  FPU_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  BASE_REGS, GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS,
  VRSAVE_REGS, VSCR_REGS, SPE_ACC_REGS, SPEFSCR_REGS,
  NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,
  LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,
  CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, CC_REGS, ADDR_REGS,
  GENERAL_REGS, ACCESS_REGS, ADDR_CC_REGS, GENERAL_CC_REGS,
  FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, G16_REGS, G32_REGS,
  T32_REGS, HI_REG, LO_REG, CE_REGS,
  CN_REG, LC_REG, SC_REG, SP_REGS,
  CR_REGS, CP1_REGS, CP2_REGS, CP3_REGS,
  CPA_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REGS, PR_REGS, T_REGS, MAC_REGS,
  FPUL_REGS, SIBCALL_REGS, GENERAL_REGS, FP0_REGS,
  FP_REGS, DF_HI_REGS, DF_REGS, FPSCR_REGS,
  GENERAL_FP_REGS, GENERAL_DF_REGS, TARGET_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, FPCC_REGS, I64_REGS,
  GENERAL_REGS, FP_REGS, EXTRA_FP_REGS, GENERAL_OR_FP_REGS,
  GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REGS, R1_REGS, TWO_REGS, R2_REGS,
  EIGHT_REGS, R8_REGS, ICALL_REGS, GENERAL_REGS,
  CARRY_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, BR_REGS,
  FP_REGS, ACC_REG, SP_REG, RL_REGS,
  GR_REGS, AR_REGS, ALL_REGS, LIM_REG_CLASSES
}
enum  arm_builtins {
  ARM_BUILTIN_CLZ, ARM_BUILTIN_MAX, ARM_BUILTIN_CLZ, ARM_BUILTIN_MAX,
  ARM_BUILTIN_GETWCX, ARM_BUILTIN_SETWCX, ARM_BUILTIN_WZERO, ARM_BUILTIN_WAVG2BR,
  ARM_BUILTIN_WAVG2HR, ARM_BUILTIN_WAVG2B, ARM_BUILTIN_WAVG2H, ARM_BUILTIN_WACCB,
  ARM_BUILTIN_WACCH, ARM_BUILTIN_WACCW, ARM_BUILTIN_WMACS, ARM_BUILTIN_WMACSZ,
  ARM_BUILTIN_WMACU, ARM_BUILTIN_WMACUZ, ARM_BUILTIN_WSADB, ARM_BUILTIN_WSADBZ,
  ARM_BUILTIN_WSADH, ARM_BUILTIN_WSADHZ, ARM_BUILTIN_WALIGN, ARM_BUILTIN_TMIA,
  ARM_BUILTIN_TMIAPH, ARM_BUILTIN_TMIABB, ARM_BUILTIN_TMIABT, ARM_BUILTIN_TMIATB,
  ARM_BUILTIN_TMIATT, ARM_BUILTIN_TMOVMSKB, ARM_BUILTIN_TMOVMSKH, ARM_BUILTIN_TMOVMSKW,
  ARM_BUILTIN_TBCSTB, ARM_BUILTIN_TBCSTH, ARM_BUILTIN_TBCSTW, ARM_BUILTIN_WMADDS,
  ARM_BUILTIN_WMADDU, ARM_BUILTIN_WPACKHSS, ARM_BUILTIN_WPACKWSS, ARM_BUILTIN_WPACKDSS,
  ARM_BUILTIN_WPACKHUS, ARM_BUILTIN_WPACKWUS, ARM_BUILTIN_WPACKDUS, ARM_BUILTIN_WADDB,
  ARM_BUILTIN_WADDH, ARM_BUILTIN_WADDW, ARM_BUILTIN_WADDSSB, ARM_BUILTIN_WADDSSH,
  ARM_BUILTIN_WADDSSW, ARM_BUILTIN_WADDUSB, ARM_BUILTIN_WADDUSH, ARM_BUILTIN_WADDUSW,
  ARM_BUILTIN_WSUBB, ARM_BUILTIN_WSUBH, ARM_BUILTIN_WSUBW, ARM_BUILTIN_WSUBSSB,
  ARM_BUILTIN_WSUBSSH, ARM_BUILTIN_WSUBSSW, ARM_BUILTIN_WSUBUSB, ARM_BUILTIN_WSUBUSH,
  ARM_BUILTIN_WSUBUSW, ARM_BUILTIN_WAND, ARM_BUILTIN_WANDN, ARM_BUILTIN_WOR,
  ARM_BUILTIN_WXOR, ARM_BUILTIN_WCMPEQB, ARM_BUILTIN_WCMPEQH, ARM_BUILTIN_WCMPEQW,
  ARM_BUILTIN_WCMPGTUB, ARM_BUILTIN_WCMPGTUH, ARM_BUILTIN_WCMPGTUW, ARM_BUILTIN_WCMPGTSB,
  ARM_BUILTIN_WCMPGTSH, ARM_BUILTIN_WCMPGTSW, ARM_BUILTIN_TEXTRMSB, ARM_BUILTIN_TEXTRMSH,
  ARM_BUILTIN_TEXTRMSW, ARM_BUILTIN_TEXTRMUB, ARM_BUILTIN_TEXTRMUH, ARM_BUILTIN_TEXTRMUW,
  ARM_BUILTIN_TINSRB, ARM_BUILTIN_TINSRH, ARM_BUILTIN_TINSRW, ARM_BUILTIN_WMAXSW,
  ARM_BUILTIN_WMAXSH, ARM_BUILTIN_WMAXSB, ARM_BUILTIN_WMAXUW, ARM_BUILTIN_WMAXUH,
  ARM_BUILTIN_WMAXUB, ARM_BUILTIN_WMINSW, ARM_BUILTIN_WMINSH, ARM_BUILTIN_WMINSB,
  ARM_BUILTIN_WMINUW, ARM_BUILTIN_WMINUH, ARM_BUILTIN_WMINUB, ARM_BUILTIN_WMULUM,
  ARM_BUILTIN_WMULSM, ARM_BUILTIN_WMULUL, ARM_BUILTIN_PSADBH, ARM_BUILTIN_WSHUFH,
  ARM_BUILTIN_WSLLH, ARM_BUILTIN_WSLLW, ARM_BUILTIN_WSLLD, ARM_BUILTIN_WSRAH,
  ARM_BUILTIN_WSRAW, ARM_BUILTIN_WSRAD, ARM_BUILTIN_WSRLH, ARM_BUILTIN_WSRLW,
  ARM_BUILTIN_WSRLD, ARM_BUILTIN_WRORH, ARM_BUILTIN_WRORW, ARM_BUILTIN_WRORD,
  ARM_BUILTIN_WSLLHI, ARM_BUILTIN_WSLLWI, ARM_BUILTIN_WSLLDI, ARM_BUILTIN_WSRAHI,
  ARM_BUILTIN_WSRAWI, ARM_BUILTIN_WSRADI, ARM_BUILTIN_WSRLHI, ARM_BUILTIN_WSRLWI,
  ARM_BUILTIN_WSRLDI, ARM_BUILTIN_WRORHI, ARM_BUILTIN_WRORWI, ARM_BUILTIN_WRORDI,
  ARM_BUILTIN_WUNPCKIHB, ARM_BUILTIN_WUNPCKIHH, ARM_BUILTIN_WUNPCKIHW, ARM_BUILTIN_WUNPCKILB,
  ARM_BUILTIN_WUNPCKILH, ARM_BUILTIN_WUNPCKILW, ARM_BUILTIN_WUNPCKEHSB, ARM_BUILTIN_WUNPCKEHSH,
  ARM_BUILTIN_WUNPCKEHSW, ARM_BUILTIN_WUNPCKEHUB, ARM_BUILTIN_WUNPCKEHUH, ARM_BUILTIN_WUNPCKEHUW,
  ARM_BUILTIN_WUNPCKELSB, ARM_BUILTIN_WUNPCKELSH, ARM_BUILTIN_WUNPCKELSW, ARM_BUILTIN_WUNPCKELUB,
  ARM_BUILTIN_WUNPCKELUH, ARM_BUILTIN_WUNPCKELUW, ARM_BUILTIN_MAX, ARM_BUILTIN_GETWCX,
  ARM_BUILTIN_SETWCX, ARM_BUILTIN_WZERO, ARM_BUILTIN_WAVG2BR, ARM_BUILTIN_WAVG2HR,
  ARM_BUILTIN_WAVG2B, ARM_BUILTIN_WAVG2H, ARM_BUILTIN_WACCB, ARM_BUILTIN_WACCH,
  ARM_BUILTIN_WACCW, ARM_BUILTIN_WMACS, ARM_BUILTIN_WMACSZ, ARM_BUILTIN_WMACU,
  ARM_BUILTIN_WMACUZ, ARM_BUILTIN_WSADB, ARM_BUILTIN_WSADBZ, ARM_BUILTIN_WSADH,
  ARM_BUILTIN_WSADHZ, ARM_BUILTIN_WALIGN, ARM_BUILTIN_TMIA, ARM_BUILTIN_TMIAPH,
  ARM_BUILTIN_TMIABB, ARM_BUILTIN_TMIABT, ARM_BUILTIN_TMIATB, ARM_BUILTIN_TMIATT,
  ARM_BUILTIN_TMOVMSKB, ARM_BUILTIN_TMOVMSKH, ARM_BUILTIN_TMOVMSKW, ARM_BUILTIN_TBCSTB,
  ARM_BUILTIN_TBCSTH, ARM_BUILTIN_TBCSTW, ARM_BUILTIN_WMADDS, ARM_BUILTIN_WMADDU,
  ARM_BUILTIN_WPACKHSS, ARM_BUILTIN_WPACKWSS, ARM_BUILTIN_WPACKDSS, ARM_BUILTIN_WPACKHUS,
  ARM_BUILTIN_WPACKWUS, ARM_BUILTIN_WPACKDUS, ARM_BUILTIN_WADDB, ARM_BUILTIN_WADDH,
  ARM_BUILTIN_WADDW, ARM_BUILTIN_WADDSSB, ARM_BUILTIN_WADDSSH, ARM_BUILTIN_WADDSSW,
  ARM_BUILTIN_WADDUSB, ARM_BUILTIN_WADDUSH, ARM_BUILTIN_WADDUSW, ARM_BUILTIN_WSUBB,
  ARM_BUILTIN_WSUBH, ARM_BUILTIN_WSUBW, ARM_BUILTIN_WSUBSSB, ARM_BUILTIN_WSUBSSH,
  ARM_BUILTIN_WSUBSSW, ARM_BUILTIN_WSUBUSB, ARM_BUILTIN_WSUBUSH, ARM_BUILTIN_WSUBUSW,
  ARM_BUILTIN_WAND, ARM_BUILTIN_WANDN, ARM_BUILTIN_WOR, ARM_BUILTIN_WXOR,
  ARM_BUILTIN_WCMPEQB, ARM_BUILTIN_WCMPEQH, ARM_BUILTIN_WCMPEQW, ARM_BUILTIN_WCMPGTUB,
  ARM_BUILTIN_WCMPGTUH, ARM_BUILTIN_WCMPGTUW, ARM_BUILTIN_WCMPGTSB, ARM_BUILTIN_WCMPGTSH,
  ARM_BUILTIN_WCMPGTSW, ARM_BUILTIN_TEXTRMSB, ARM_BUILTIN_TEXTRMSH, ARM_BUILTIN_TEXTRMSW,
  ARM_BUILTIN_TEXTRMUB, ARM_BUILTIN_TEXTRMUH, ARM_BUILTIN_TEXTRMUW, ARM_BUILTIN_TINSRB,
  ARM_BUILTIN_TINSRH, ARM_BUILTIN_TINSRW, ARM_BUILTIN_WMAXSW, ARM_BUILTIN_WMAXSH,
  ARM_BUILTIN_WMAXSB, ARM_BUILTIN_WMAXUW, ARM_BUILTIN_WMAXUH, ARM_BUILTIN_WMAXUB,
  ARM_BUILTIN_WMINSW, ARM_BUILTIN_WMINSH, ARM_BUILTIN_WMINSB, ARM_BUILTIN_WMINUW,
  ARM_BUILTIN_WMINUH, ARM_BUILTIN_WMINUB, ARM_BUILTIN_WMULUM, ARM_BUILTIN_WMULSM,
  ARM_BUILTIN_WMULUL, ARM_BUILTIN_PSADBH, ARM_BUILTIN_WSHUFH, ARM_BUILTIN_WSLLH,
  ARM_BUILTIN_WSLLW, ARM_BUILTIN_WSLLD, ARM_BUILTIN_WSRAH, ARM_BUILTIN_WSRAW,
  ARM_BUILTIN_WSRAD, ARM_BUILTIN_WSRLH, ARM_BUILTIN_WSRLW, ARM_BUILTIN_WSRLD,
  ARM_BUILTIN_WRORH, ARM_BUILTIN_WRORW, ARM_BUILTIN_WRORD, ARM_BUILTIN_WSLLHI,
  ARM_BUILTIN_WSLLWI, ARM_BUILTIN_WSLLDI, ARM_BUILTIN_WSRAHI, ARM_BUILTIN_WSRAWI,
  ARM_BUILTIN_WSRADI, ARM_BUILTIN_WSRLHI, ARM_BUILTIN_WSRLWI, ARM_BUILTIN_WSRLDI,
  ARM_BUILTIN_WRORHI, ARM_BUILTIN_WRORWI, ARM_BUILTIN_WRORDI, ARM_BUILTIN_WUNPCKIHB,
  ARM_BUILTIN_WUNPCKIHH, ARM_BUILTIN_WUNPCKIHW, ARM_BUILTIN_WUNPCKILB, ARM_BUILTIN_WUNPCKILH,
  ARM_BUILTIN_WUNPCKILW, ARM_BUILTIN_WUNPCKEHSB, ARM_BUILTIN_WUNPCKEHSH, ARM_BUILTIN_WUNPCKEHSW,
  ARM_BUILTIN_WUNPCKEHUB, ARM_BUILTIN_WUNPCKEHUH, ARM_BUILTIN_WUNPCKEHUW, ARM_BUILTIN_WUNPCKELSB,
  ARM_BUILTIN_WUNPCKELSH, ARM_BUILTIN_WUNPCKELSW, ARM_BUILTIN_WUNPCKELUB, ARM_BUILTIN_WUNPCKELUH,
  ARM_BUILTIN_WUNPCKELUW, ARM_BUILTIN_THREAD_POINTER, ARM_BUILTIN_MAX
}

Functions/Subroutines

 GTY (()) rtx arm_target_insn

Variables

char arm_arch_name []
enum processor_type arm_tune
arm_cc arm_current_cc
int arm_target_label
int arm_ccfsm_state
int target_flags
const char * target_fpu_name
const char * target_fpe_name
const char * target_float_abi_name
const char * target_float_switch
const char * target_abi_name
rtx pool_vector_label
int return_used_this_function
struct arm_cpu_select arm_select []
enum arm_fp_model arm_fp_model
enum fputype arm_fpu_tune
enum fputype arm_fpu_arch
enum float_abi_type arm_float_abi
enum arm_abi_type arm_abi
int arm_arch3m
int arm_arch4
int arm_arch4t
int arm_arch5
int arm_arch5e
int arm_arch6
int arm_ld_sched
int thumb_code
int arm_is_strong
int arm_arch_cirrus
int arm_arch_iwmmxt
int arm_arch_xscale
int arm_tune_xscale
int arm_is_6_or_7
int arm_cpp_interwork
int arm_structure_size_boundary
const char * structure_size_string
 arm_stack_offsets
 machine_function
int arm_pic_register
const char * arm_pic_register_string
int making_const_table

Define Documentation

#define ACCUMULATE_OUTGOING_ARGS   1

Definition at line 1561 of file arm.h.

#define APPLY_RESULT_SIZE   arm_apply_result_size()

Definition at line 1610 of file arm.h.

#define ARG_POINTER_REGNUM   26

Definition at line 1036 of file arm.h.

#define ARG_REGISTER ( N   )     (N - 1)

Definition at line 959 of file arm.h.

#define ARM_BASE_REGISTER_RTX_P ( X   )     (GET_CODE (X) == REG && ARM_REG_OK_FOR_BASE_P (X))

Definition at line 2169 of file arm.h.

#define ARM_CORE ( NAME,
IDENT,
ARCH,
FLAGS,
COSTS   )     TARGET_CPU_##IDENT,

#define ARM_CORE ( NAME,
IDENT,
ARCH,
FLAGS,
COSTS   )     IDENT,

#define ARM_DECLARE_FUNCTION_NAME ( STREAM,
NAME,
DECL   ) 

Value:

do              \
    {             \
      if (TARGET_THUMB)         \
        {           \
          if (is_called_in_ARM_mode (DECL)      \
        || current_function_is_thunk)   \
            fprintf (STREAM, "\t.code 32\n") ;    \
          else            \
           fprintf (STREAM, "\t.code 16\n\t.thumb_func\n") ;  \
        }           \
      if (TARGET_POKE_FUNCTION_NAME)      \
        arm_poke_function_name (STREAM, (char *) NAME); \
    }             \
  while (0)

Definition at line 2405 of file arm.h.

#define ARM_DECLARE_FUNCTION_SIZE ( STREAM,
NAME,
DECL   ) 

Value:

if (!TARGET_LONG_CALLS || ! DECL_SECTION_NAME (DECL)) \
    arm_encode_call_attribute (DECL, SHORT_CALL_FLAG_CHAR)

Definition at line 2098 of file arm.h.

#define ARM_DEFAULT_ABI   ARM_ABI_APCS

Definition at line 498 of file arm.h.

Referenced by arm_override_options().

#define ARM_DOUBLEWORD_ALIGN   TARGET_AAPCS_BASED

Definition at line 643 of file arm.h.

Referenced by add_minipool_backward_ref(), add_minipool_forward_ref(), arm_function_arg(), arm_get_frame_offsets(), arm_override_options(), dump_minipool(), push_minipool_fix(), and thumb_far_jump_used_p().

#define ARM_EH_STACKADJ_REGNUM   2

Definition at line 982 of file arm.h.

Referenced by arm_output_epilogue(), and thumb_exit().

#define ARM_FLAG_ABORT_NORETURN   (1 << 13)

Definition at line 232 of file arm.h.

#define ARM_FLAG_APCS_FLOAT   (1 << 5)

Definition at line 208 of file arm.h.

#define ARM_FLAG_APCS_FRAME   (1 << 0)

Definition at line 187 of file arm.h.

#define ARM_FLAG_APCS_REENT   (1 << 6)

Definition at line 212 of file arm.h.

#define ARM_FLAG_APCS_STACK   (1 << 4)

Definition at line 204 of file arm.h.

#define ARM_FLAG_BIG_END   (1 << 9)

Definition at line 218 of file arm.h.

#define ARM_FLAG_FPE   (1 << 2)

Definition at line 198 of file arm.h.

#define ARM_FLAG_INTERWORK   (1 << 10)

Definition at line 221 of file arm.h.

#define ARM_FLAG_LITTLE_WORDS   (1 << 11)

Definition at line 225 of file arm.h.

#define ARM_FLAG_LONG_CALLS   (1 << 15)

Definition at line 238 of file arm.h.

#define ARM_FLAG_NO_SCHED_PRO   (1 << 12)

Definition at line 228 of file arm.h.

#define ARM_FLAG_POKE   (1 << 1)

Definition at line 194 of file arm.h.

#define ARM_FLAG_SINGLE_PIC_BASE   (1 << 14)

Definition at line 235 of file arm.h.

#define ARM_FLAG_THUMB   (1 << 16)

Definition at line 241 of file arm.h.

#define arm_fpu_attr   ((enum attr_fpu) arm_fpu_tune)

Definition at line 465 of file arm.h.

#define ARM_FRAME_RTX ( X   ) 

Value:

(   (X) == frame_pointer_rtx || (X) == stack_pointer_rtx  \
   || (X) == arg_pointer_rtx)

Definition at line 2288 of file arm.h.

#define ARM_FT_EXCEPTION   6

Definition at line 1643 of file arm.h.

#define ARM_FT_FIQ   5

Definition at line 1642 of file arm.h.

#define ARM_FT_INTERRUPT   (1 << 2)

Definition at line 1649 of file arm.h.

#define ARM_FT_INTERWORKED   2

Definition at line 1640 of file arm.h.

#define ARM_FT_ISR   4

Definition at line 1641 of file arm.h.

#define ARM_FT_NAKED   (1 << 3)

Definition at line 1650 of file arm.h.

#define ARM_FT_NESTED   (1 << 5)

Definition at line 1652 of file arm.h.

#define ARM_FT_NORMAL   1

Definition at line 1639 of file arm.h.

#define ARM_FT_TYPE_MASK   ((1 << 3) - 1)

Definition at line 1645 of file arm.h.

#define ARM_FT_UNKNOWN   0

Definition at line 1638 of file arm.h.

#define ARM_FT_VOLATILE   (1 << 4)

Definition at line 1651 of file arm.h.

#define ARM_FUNC_TYPE ( t   )     (t & ARM_FT_TYPE_MASK)

Definition at line 1655 of file arm.h.

#define ARM_FUNCTION_PROFILER ( STREAM,
LABELNO   ) 

Value:

{             \
  char temp[20];          \
  rtx sym;            \
              \
  asm_fprintf (STREAM, "\tmov\t%r, %r\n\tbl\t",   \
     IP_REGNUM, LR_REGNUM);     \
  assemble_name (STREAM, ARM_MCOUNT_NAME);    \
  fputc ('\n', STREAM);         \
  ASM_GENERATE_INTERNAL_LABEL (temp, "LP", LABELNO);  \
  sym = gen_rtx_SYMBOL_REF (Pmode, temp);   \
  assemble_aligned_integer (UNITS_PER_WORD, sym); \
}

Definition at line 1807 of file arm.h.

#define ARM_GO_IF_LEGITIMATE_ADDRESS ( MODE,
X,
WIN   ) 

Value:

{               \
    if (arm_legitimate_address_p (MODE, X, SET, REG_STRICT_P))  \
      goto WIN;             \
  }

Definition at line 2175 of file arm.h.

#define ARM_GO_IF_MODE_DEPENDENT_ADDRESS ( ADDR,
LABEL   ) 

Value:

{                 \
  if (   GET_CODE (ADDR) == PRE_DEC || GET_CODE (ADDR) == POST_DEC  \
      || GET_CODE (ADDR) == PRE_INC || GET_CODE (ADDR) == POST_INC) \
    goto LABEL;               \
}

Definition at line 2219 of file arm.h.

#define ARM_HARD_FRAME_POINTER_REGNUM   11

Definition at line 1006 of file arm.h.

#define ARM_INDEX_REGISTER_RTX_P ( X   )     (GET_CODE (X) == REG && ARM_REG_OK_FOR_INDEX_P (X))

Definition at line 2172 of file arm.h.

#define ARM_INVERSE_CONDITION_CODE ( X   )     ((arm_cc) (((int)X) ^ 1))

Definition at line 113 of file arm.h.

#define ARM_LEGITIMATE_CONSTANT_P ( X   )     (flag_pic || ! label_mentioned_p (X))

Definition at line 2050 of file arm.h.

#define ARM_LEGITIMIZE_ADDRESS ( X,
OLDX,
MODE,
WIN   ) 

Value:

do {              \
  X = arm_legitimize_address (X, OLDX, MODE);   \
} while (0)

Definition at line 2196 of file arm.h.

#define ARM_LEGITIMIZE_RELOAD_ADDRESS ( X,
MODE,
OPNUM,
TYPE,
IND,
WIN   ) 

Definition at line 1411 of file arm.h.

#define ARM_MCOUNT_NAME   "*mcount"

Definition at line 1784 of file arm.h.

#define ARM_NAME_ENCODING_LENGTHS

Value:

case SHORT_CALL_FLAG_CHAR: return 1;    \
  case LONG_CALL_FLAG_CHAR:  return 1;    \
  case '*':  return 1;        \
  SUBTARGET_NAME_ENCODING_LENGTHS

Definition at line 2081 of file arm.h.

#define ARM_NUM_INTS ( X   )     (((X) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)

Definition at line 943 of file arm.h.

Referenced by arm_compute_save_reg_mask(), arm_gen_movmemqi(), and thumb_output_function_prologue().

#define ARM_NUM_REGS ( MODE   )     ARM_NUM_INTS (GET_MODE_SIZE (MODE))

Definition at line 947 of file arm.h.

Referenced by arm_hard_regno_mode_ok(), arm_print_operand(), arm_rtx_costs_1(), and arm_size_rtx_costs().

#define ARM_NUM_REGS2 ( MODE,
TYPE   ) 

Value:

ARM_NUM_INTS ((MODE) == BLKmode ?     \
  int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE))

Definition at line 951 of file arm.h.

Referenced by arm_arg_partial_bytes(), and arm_function_arg().

#define ARM_PRINT_OPERAND_ADDRESS ( STREAM,
X   ) 

Definition at line 2482 of file arm.h.

#define ARM_REG_OK_FOR_BASE_P ( X   ) 

Value:

(REGNO (X) <= LAST_ARM_REGNUM     \
   || REGNO (X) >= FIRST_PSEUDO_REGISTER  \
   || REGNO (X) == FRAME_POINTER_REGNUM   \
   || REGNO (X) == ARG_POINTER_REGNUM)

Definition at line 2110 of file arm.h.

#define ARM_REG_OK_FOR_INDEX_P ( X   )     ARM_REG_OK_FOR_BASE_P (X)

Definition at line 2145 of file arm.h.

#define ARM_REGNO_OK_FOR_BASE_P ( REGNO   ) 

Value:

(TEST_REGNO (REGNO, <, PC_REGNUM)     \
   || TEST_REGNO (REGNO, ==, FRAME_POINTER_REGNUM)  \
   || TEST_REGNO (REGNO, ==, ARG_POINTER_REGNUM))

Definition at line 1996 of file arm.h.

#define ARM_SIGN_EXTEND ( x   ) 

Value:

((HOST_WIDE_INT)      \
  (HOST_BITS_PER_WIDE_INT <= 32 ? (unsigned HOST_WIDE_INT) (x)  \
   : ((((unsigned HOST_WIDE_INT)(x)) & (unsigned HOST_WIDE_INT) 0xffffffff) |\
      ((((unsigned HOST_WIDE_INT)(x)) & (unsigned HOST_WIDE_INT) 0x80000000) \
       ? ((~ (unsigned HOST_WIDE_INT) 0)      \
    & ~ (unsigned HOST_WIDE_INT) 0xffffffff)    \
       : 0))))

Definition at line 2473 of file arm.h.

#define ARM_TRAMPOLINE_TEMPLATE ( FILE   ) 

Value:

{               \
  asm_fprintf (FILE, "\tldr\t%r, [%r, #0]\n",     \
         STATIC_CHAIN_REGNUM, PC_REGNUM);     \
  asm_fprintf (FILE, "\tldr\t%r, [%r, #0]\n",     \
         PC_REGNUM, PC_REGNUM);       \
  assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);  \
  assemble_aligned_integer (UNITS_PER_WORD, const0_rtx);  \
}

Definition at line 1912 of file arm.h.

#define ASM_APP_OFF   (TARGET_THUMB ? "\t.code\t16\n" : "")

Definition at line 2369 of file arm.h.

#define ASM_FPRINTF_EXTENSIONS ( FILE,
ARGS,
P   ) 

Value:

case '@':           \
    fputs (ASM_COMMENT_START, FILE);      \
    break;            \
              \
  case 'r':           \
    fputs (REGISTER_PREFIX, FILE);      \
    fputs (reg_names [va_arg (ARGS, int)], FILE); \
    break;

Definition at line 929 of file arm.h.

#define ASM_OUTPUT_CASE_LABEL ( FILE,
PREFIX,
NUM,
JUMPTABLE   ) 

Value:

do                \
    {               \
      if (TARGET_THUMB)           \
        ASM_OUTPUT_ALIGN (FILE, 2);       \
      (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM);  \
    }               \
  while (0)

Definition at line 2396 of file arm.h.

#define ASM_OUTPUT_DEF_FROM_DECLS ( FILE,
DECL1,
DECL2   ) 

Value:

do                  \
    {               \
      const char *const LABEL1 = XSTR (XEXP (DECL_RTL (decl), 0), 0); \
      const char *const LABEL2 = IDENTIFIER_POINTER (DECL2);  \
                \
      if (TARGET_THUMB && TREE_CODE (DECL1) == FUNCTION_DECL) \
  {             \
    fprintf (FILE, "\t.thumb_set ");      \
    assemble_name (FILE, LABEL1);         \
    fprintf (FILE, ",");            \
    assemble_name (FILE, LABEL2);         \
    fprintf (FILE, "\n");         \
  }             \
      else              \
  ASM_OUTPUT_DEF (FILE, LABEL1, LABEL2);      \
    }               \
  while (0)

Definition at line 2422 of file arm.h.

#define ASM_OUTPUT_LABELREF ( FILE,
NAME   )     arm_asm_output_labelref (FILE, NAME)

Definition at line 2090 of file arm.h.

#define ASM_OUTPUT_REG_POP ( STREAM,
REGNO   ) 

Value:

do              \
    {             \
      if (TARGET_ARM)         \
  asm_fprintf (STREAM, "\tldmfd\t%r!,{%r}\n", \
         STACK_POINTER_REGNUM, REGNO);  \
      else            \
  asm_fprintf (STREAM, "\tpop {%r}\n", REGNO);  \
    } while (0)

Definition at line 2383 of file arm.h.

#define ASM_OUTPUT_REG_PUSH ( STREAM,
REGNO   ) 

Value:

do              \
    {             \
      if (TARGET_ARM)         \
  asm_fprintf (STREAM,"\tstmfd\t%r!,{%r}\n",  \
         STACK_POINTER_REGNUM, REGNO);  \
      else            \
  asm_fprintf (STREAM, "\tpush {%r}\n", REGNO); \
    } while (0)

Definition at line 2372 of file arm.h.

#define BASE_REG_CLASS   (TARGET_THUMB ? LO_REGS : GENERAL_REGS)

Definition at line 1214 of file arm.h.

#define BIGGEST_ALIGNMENT   (ARM_DOUBLEWORD_ALIGN ? DOUBLEWORD_ALIGNMENT : 32)

Definition at line 663 of file arm.h.

#define BITS_BIG_ENDIAN   0

Definition at line 614 of file arm.h.

#define BRANCH_COST   (TARGET_ARM ? 4 : (optimize > 1 ? 1 : 0))

Definition at line 2300 of file arm.h.

#define BYTES_BIG_ENDIAN   (TARGET_BIG_END != 0)

Definition at line 620 of file arm.h.

#define CALL_LONG   0x00000001

Definition at line 1624 of file arm.h.

#define CALL_NORMAL   0x00000000

Definition at line 1623 of file arm.h.

#define CALL_SHORT   0x00000002

Definition at line 1625 of file arm.h.

#define CALL_USED_REGISTERS

Value:

{                            \
  1,1,1,1,0,0,0,0,       \
  0,0,0,0,1,1,1,1,       \
  1,1,1,1,0,0,0,0,       \
  1,1,1,         \
  1,1,1,1,1,1,1,1,       \
  1,1,1,1,1,1,1,1,       \
  1,1,1,1,1,1,1,1,       \
  1,1,1,1,1,1,1,1,       \
  1,1,1,1,         \
  1,1,1,1,1,1,1,1,       \
  1,1,1,1,1,1,1,1,       \
  1,1,1,1,1,1,1,1,       \
  1,1,1,1,1,1,1,1,       \
  1          \
}

Definition at line 818 of file arm.h.

#define CALLER_INTERWORKING_SLOT_SIZE

Value:

(TARGET_CALLER_INTERWORKING       \
   && current_function_outgoing_args_size != 0    \
   ? UNITS_PER_WORD : 0)

Definition at line 1541 of file arm.h.

Referenced by arm_get_frame_offsets(), thumb_compute_save_reg_mask(), and thumb_expand_prologue().

#define CAN_DEBUG_WITHOUT_FP

Definition at line 556 of file arm.h.

#define CAN_ELIMINATE ( FROM,
TO   ) 

Value:

(((TO) == FRAME_POINTER_REGNUM && (FROM) == ARG_POINTER_REGNUM) ? 0 : \
   ((TO) == STACK_POINTER_REGNUM && frame_pointer_needed) ? 0 :   \
   ((TO) == ARM_HARD_FRAME_POINTER_REGNUM && TARGET_THUMB) ? 0 :  \
   ((TO) == THUMB_HARD_FRAME_POINTER_REGNUM && TARGET_ARM) ? 0 :  \
   1)

Definition at line 1880 of file arm.h.

#define CANNOT_CHANGE_MODE_CLASS ( FROM,
TO,
CLASS   ) 

Value:

(GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO)   \
   ? reg_classes_intersect_p (FPA_REGS, (CLASS))  \
     || reg_classes_intersect_p (VFP_REGS, (CLASS)) \
   : 0)

Definition at line 1199 of file arm.h.

#define CANONICALIZE_COMPARISON ( CODE,
OP0,
OP1   ) 

Value:

do                  \
    {                 \
      if (GET_CODE (OP1) == CONST_INT         \
          && ! (const_ok_for_arm (INTVAL (OP1))       \
          || (const_ok_for_arm (- INTVAL (OP1)))))    \
        {               \
          rtx const_op = OP1;           \
          CODE = arm_canonicalize_comparison ((CODE), &const_op); \
          OP1 = const_op;           \
        }               \
    }                 \
  while (0)

Definition at line 2351 of file arm.h.

#define CASE_VECTOR_MODE   Pmode

Definition at line 2234 of file arm.h.

#define CC1_SPEC   ""

Definition at line 156 of file arm.h.

#define CIRRUS_FIX_INVALID_INSNS   (1 << 21)

Definition at line 260 of file arm.h.

#define CLASS_LIKELY_SPILLED_P ( CLASS   ) 

Value:

((TARGET_THUMB && (CLASS) == LO_REGS) \
     || (CLASS) == CC_REG)

Definition at line 1208 of file arm.h.

#define CLASS_MAX_NREGS ( CLASS,
MODE   )     (((CLASS) == FPA_REGS || (CLASS) == CIRRUS_REGS) ? 1 : ARM_NUM_REGS (MODE))

Definition at line 1498 of file arm.h.

#define CLZ_DEFINED_VALUE_AT_ZERO ( MODE,
VALUE   )     ((VALUE) = 32, 1)

Definition at line 2366 of file arm.h.

#define CONDITIONAL_REGISTER_USAGE

Definition at line 840 of file arm.h.

#define CONST_DOUBLE_OK_FOR_ARM_LETTER ( X,
C   ) 

Value:

((C) == 'G' ? arm_const_double_rtx (X) :      \
     (C) == 'H' ? neg_const_double_rtx_ok_for_fpa (X) : 0)

Definition at line 1286 of file arm.h.

#define CONST_DOUBLE_OK_FOR_LETTER_P ( X,
C   ) 

Value:

(TARGET_ARM ?             \
   CONST_DOUBLE_OK_FOR_ARM_LETTER (X, C) : 0)

Definition at line 1290 of file arm.h.

#define CONST_OK_FOR_ARM_LETTER ( VALUE,
C   ) 

Value:

((C) == 'I' ? const_ok_for_arm (VALUE) :    \
   (C) == 'J' ? ((VALUE) < 4096 && (VALUE) > -4096) : \
   (C) == 'K' ? (const_ok_for_arm (~(VALUE))) :   \
   (C) == 'L' ? (const_ok_for_arm (-(VALUE))) :   \
   (C) == 'M' ? (((VALUE >= 0 && VALUE <= 32))    \
     || (((VALUE) & ((VALUE) - 1)) == 0)) \
   : 0)

Definition at line 1260 of file arm.h.

#define CONST_OK_FOR_LETTER_P ( VALUE,
C   ) 

Value:

(TARGET_ARM ?               \
   CONST_OK_FOR_ARM_LETTER (VALUE, C) : CONST_OK_FOR_THUMB_LETTER (VALUE, C))

Definition at line 1280 of file arm.h.

#define CONST_OK_FOR_THUMB_LETTER ( VAL,
C   ) 

Value:

((C) == 'I' ? (unsigned HOST_WIDE_INT) (VAL) < 256 :  \
   (C) == 'J' ? (VAL) > -256 && (VAL) < 0 :   \
   (C) == 'K' ? thumb_shiftable_const (VAL) :   \
   (C) == 'L' ? (VAL) > -8 && (VAL) < 8 :   \
   (C) == 'M' ? ((unsigned HOST_WIDE_INT) (VAL) < 1024  \
       && ((VAL) & 3) == 0) :   \
   (C) == 'N' ? ((unsigned HOST_WIDE_INT) (VAL) < 32) : \
   (C) == 'O' ? ((VAL) >= -508 && (VAL) <= 508)   \
   : 0)

Definition at line 1269 of file arm.h.

#define CONSTANT_ADDRESS_P ( X   ) 

Value:

(GET_CODE (X) == SYMBOL_REF       \
   && (CONSTANT_POOL_ADDRESS_P (X)    \
       || (TARGET_ARM && optimize > 0 && SYMBOL_REF_FLAG (X))))

Definition at line 2035 of file arm.h.

#define CONSTANT_ALIGNMENT ( EXP,
ALIGN   ) 

Value:

((TREE_CODE (EXP) == STRING_CST       \
     && (ALIGN) < BITS_PER_WORD * CONSTANT_ALIGNMENT_FACTOR)  \
    ? BITS_PER_WORD * CONSTANT_ALIGNMENT_FACTOR : (ALIGN))

Definition at line 675 of file arm.h.

#define CONSTANT_ALIGNMENT_FACTOR   (TARGET_THUMB || ! arm_tune_xscale ? 1 : 2)

Definition at line 673 of file arm.h.

#define CONSTRAINT_LEN ( C,
STR   )     (((C) == 'U' || (C) == 'D') ? 2 : DEFAULT_CONSTRAINT_LEN (C, STR))

Definition at line 1332 of file arm.h.

Referenced by alternative_allows_memconst(), asm_operand_ok(), check_earlyclobber(), constrain_operands(), constraint_len(), find_matches(), find_reloads(), m32c_extra_constraint_p(), maybe_fix_stack_asms(), parse_input_constraint(), parse_output_constraint(), preprocess_constraints(), record_reg_classes(), reload_cse_simplify_operands(), requires_inout(), validate_insn_alternatives(), and VEC().

#define CPP_SPEC   "%(subtarget_cpp_spec) \%{msoft-float:%{mhard-float: \ %e-msoft-float and -mhard_float may not be used together}} \%{mbig-endian:%{mlittle-endian: \ %e-mbig-endian and -mlittle-endian may not be used together}}"

Definition at line 149 of file arm.h.

#define DEBUGGER_ARG_OFFSET ( value,
addr   )     value ? value : arm_debugger_arg_offset (value, addr)

Definition at line 1896 of file arm.h.

#define DEFAULT_PCC_STRUCT_RETURN   0

Definition at line 1620 of file arm.h.

#define DEFAULT_SIGNED_CHAR   0

Definition at line 2239 of file arm.h.

#define DEFAULT_STRUCTURE_SIZE_BOUNDARY   32

Definition at line 695 of file arm.h.

#define DOUBLEWORD_ALIGNMENT   64

Definition at line 645 of file arm.h.

#define DWARF2_UNWIND_INFO   1

Definition at line 976 of file arm.h.

#define DWARF_FRAME_RETURN_COLUMN   DWARF_FRAME_REGNUM (LR_REGNUM)

Definition at line 2625 of file arm.h.

#define EH_RETURN_DATA_REGNO ( N   )     (((N) < 2) ? N : INVALID_REGNUM)

Definition at line 979 of file arm.h.

#define EH_RETURN_STACKADJ_RTX   gen_rtx_REG (SImode, ARM_EH_STACKADJ_REGNUM)

Definition at line 983 of file arm.h.

#define ELIMINABLE_REGS

Value:

{{ ARG_POINTER_REGNUM,        STACK_POINTER_REGNUM            },\
 { ARG_POINTER_REGNUM,        FRAME_POINTER_REGNUM            },\
 { ARG_POINTER_REGNUM,        ARM_HARD_FRAME_POINTER_REGNUM   },\
 { ARG_POINTER_REGNUM,        THUMB_HARD_FRAME_POINTER_REGNUM },\
 { FRAME_POINTER_REGNUM,      STACK_POINTER_REGNUM            },\
 { FRAME_POINTER_REGNUM,      ARM_HARD_FRAME_POINTER_REGNUM   },\
 { FRAME_POINTER_REGNUM,      THUMB_HARD_FRAME_POINTER_REGNUM }}

Definition at line 1863 of file arm.h.

#define EMPTY_FIELD_BOUNDARY   32

Definition at line 661 of file arm.h.

#define ENCODED_LONG_CALL_ATTR_P ( SYMBOL_NAME   )     (*(SYMBOL_NAME) == LONG_CALL_FLAG_CHAR)

Definition at line 2070 of file arm.h.

#define ENCODED_SHORT_CALL_ATTR_P ( SYMBOL_NAME   )     (*(SYMBOL_NAME) == SHORT_CALL_FLAG_CHAR)

Definition at line 2067 of file arm.h.

#define EPILOGUE_USES ( REGNO   )     (reload_completed && (REGNO) == LR_REGNUM)

Definition at line 1842 of file arm.h.

#define EXIT_IGNORE_STACK   1

Definition at line 1840 of file arm.h.

#define EXTRA_CONSTRAINT_STR ( X,
C,
STR   ) 

Value:

(TARGET_ARM         \
   ? EXTRA_CONSTRAINT_STR_ARM (X, C, STR) \
   : EXTRA_CONSTRAINT_THUMB (X, C))

Definition at line 1339 of file arm.h.

Referenced by asm_operand_ok(), constrain_operands(), find_reloads(), and record_reg_classes().

#define EXTRA_CONSTRAINT_STR_ARM ( OP,
C,
STR   ) 

Value:

(((C) == 'D') ? ((GET_CODE (OP) == CONST_DOUBLE     \
        || GET_CODE (OP) == CONST_INT     \
        || GET_CODE (OP) == CONST_VECTOR)     \
       && (((STR)[1] == 'a'         \
      && arm_const_double_inline_cost (OP) == 2)  \
           || ((STR)[1] == 'b'        \
         && arm_const_double_inline_cost (OP) == 3) \
           || ((STR)[1] == 'c'        \
         && arm_const_double_inline_cost (OP) == 4  \
         && !(optimize_size || arm_ld_sched)))) : \
   ((C) == 'Q') ? (GET_CODE (OP) == MEM         \
     && GET_CODE (XEXP (OP, 0)) == REG) :     \
   ((C) == 'R') ? (GET_CODE (OP) == MEM         \
       && GET_CODE (XEXP (OP, 0)) == SYMBOL_REF   \
       && CONSTANT_POOL_ADDRESS_P (XEXP (OP, 0))) :   \
   ((C) == 'S') ? (optimize > 0 && CONSTANT_ADDRESS_P (OP)) :   \
   ((C) == 'T') ? cirrus_memory_offset (OP) :       \
   ((C) == 'U' && (STR)[1] == 'v') ? arm_coproc_mem_operand (OP, FALSE) : \
   ((C) == 'U' && (STR)[1] == 'y') ? arm_coproc_mem_operand (OP, TRUE) : \
   ((C) == 'U' && (STR)[1] == 'q')          \
    ? arm_extendqisi_mem_op (OP, GET_MODE (OP))       \
   : 0)

Definition at line 1308 of file arm.h.

#define EXTRA_CONSTRAINT_THUMB ( X,
C   ) 

Value:

((C) == 'Q' ? (GET_CODE (X) == MEM          \
     && GET_CODE (XEXP (X, 0)) == LABEL_REF) : 0)

Definition at line 1335 of file arm.h.

#define EXTRA_MEMORY_CONSTRAINT ( C,
STR   )     ((C) == 'U')

Definition at line 1344 of file arm.h.

#define EXTRA_SPECS

Value:

{ "subtarget_cpp_spec", SUBTARGET_CPP_SPEC },           \
  SUBTARGET_EXTRA_SPECS

Definition at line 168 of file arm.h.

#define FINAL_PRESCAN_INSN ( INSN,
OPVEC,
NOPERANDS   ) 

Value:

if (TARGET_ARM && optimize)       \
    arm_final_prescan_insn (INSN);      \
  else if (TARGET_THUMB)        \
    thumb_final_prescan_insn (INSN)

Definition at line 2458 of file arm.h.

#define FIRST_CIRRUS_FP_REGNUM   27

Definition at line 1038 of file arm.h.

#define FIRST_FPA_REGNUM   16

Definition at line 1020 of file arm.h.

Referenced by arm_dbx_register_number(), arm_expand_prologue(), arm_get_frame_offsets(), arm_hard_regno_mode_ok(), arm_output_epilogue(), and use_return_insn().

#define FIRST_HI_REGNUM   8

Definition at line 970 of file arm.h.

#define FIRST_IWMMXT_GR_REGNUM   43

Definition at line 1023 of file arm.h.

Referenced by arm_dbx_register_number(), and arm_print_operand().

#define FIRST_IWMMXT_REGNUM   47

Definition at line 1025 of file arm.h.

Referenced by arm_dbx_register_number(), arm_expand_prologue(), arm_function_arg(), arm_get_frame_offsets(), arm_output_epilogue(), and use_return_insn().

#define FIRST_LO_REGNUM   0

Definition at line 968 of file arm.h.

#define FIRST_PARM_OFFSET ( FNDECL   )     (TARGET_ARM ? 4 : 0)

Definition at line 1564 of file arm.h.

#define FIRST_PSEUDO_REGISTER   96

Definition at line 1052 of file arm.h.

#define FIRST_VFP_REGNUM   63

Definition at line 1043 of file arm.h.

Referenced by arm_dbx_register_number(), arm_expand_prologue(), arm_get_vfp_saved_size(), arm_hard_regno_mode_ok(), arm_output_epilogue(), arm_print_operand(), use_return_insn(), and vfp_output_fstmx().

#define FIXED_REGISTERS

Value:

{                       \
  0,0,0,0,0,0,0,0,  \
  0,0,0,0,0,1,0,1,  \
  0,0,0,0,0,0,0,0,  \
  1,1,1,    \
  1,1,1,1,1,1,1,1,  \
  1,1,1,1,1,1,1,1,  \
  1,1,1,1,1,1,1,1,  \
  1,1,1,1,1,1,1,1,  \
  1,1,1,1,    \
  1,1,1,1,1,1,1,1,  \
  1,1,1,1,1,1,1,1,  \
  1,1,1,1,1,1,1,1,  \
  1,1,1,1,1,1,1,1,  \
  1     \
}

Definition at line 792 of file arm.h.

#define FLOAT_WORDS_BIG_ENDIAN   (arm_float_words_big_endian ())

Definition at line 638 of file arm.h.

#define FP_REGNUM   HARD_FRAME_POINTER_REGNUM

Definition at line 1014 of file arm.h.

#define FRAME_GROWS_DOWNWARD   1

Definition at line 1530 of file arm.h.

#define FRAME_POINTER_REGNUM   25

Definition at line 1033 of file arm.h.

#define FRAME_POINTER_REQUIRED

Value:

(current_function_has_nonlocal_label        \
   || (TARGET_ARM && TARGET_APCS_FRAME && ! leaf_function_p ()))

Definition at line 1060 of file arm.h.

#define FUNCTION_ARG ( CUM,
MODE,
TYPE,
NAMED   )     arm_function_arg (&(CUM), (MODE), (TYPE), (NAMED))

Definition at line 1743 of file arm.h.

#define FUNCTION_ARG_ADVANCE ( CUM,
MODE,
TYPE,
NAMED   ) 

Value:

(CUM).nargs += 1;         \
  if (arm_vector_mode_supported_p (MODE)          \
      && (CUM).named_count > (CUM).nargs)   \
    (CUM).iwmmxt_nregs += 1;        \
  else              \
    (CUM).nregs += ARM_NUM_REGS2 (MODE, TYPE)

Definition at line 1756 of file arm.h.

#define FUNCTION_ARG_BOUNDARY ( MODE,
TYPE   ) 

Value:

((ARM_DOUBLEWORD_ALIGN && arm_needs_doubleword_align (MODE, TYPE)) \
   ? DOUBLEWORD_ALIGNMENT \
   : PARM_BOUNDARY )

Definition at line 1767 of file arm.h.

#define FUNCTION_ARG_REGNO_P ( REGNO   ) 

Value:

(IN_RANGE ((REGNO), 0, 3)   \
    || (TARGET_IWMMXT_ABI   \
  && IN_RANGE ((REGNO), FIRST_IWMMXT_REGNUM, FIRST_IWMMXT_REGNUM + 9)))

Definition at line 1774 of file arm.h.

#define FUNCTION_BOUNDARY   32

Definition at line 654 of file arm.h.

#define FUNCTION_MODE   Pmode

Definition at line 2286 of file arm.h.

#define FUNCTION_PROFILER ( STREAM,
LABELNO   )     ARM_FUNCTION_PROFILER (STREAM, LABELNO)

Definition at line 1829 of file arm.h.

#define FUNCTION_VALUE ( VALTYPE,
FUNC   )     arm_function_value (VALTYPE, FUNC);

Definition at line 1594 of file arm.h.

#define FUNCTION_VALUE_REGNO_P ( REGNO   ) 

Value:

((REGNO) == ARG_REGISTER (1) \
   || (TARGET_ARM && ((REGNO) == FIRST_CIRRUS_FP_REGNUM)    \
       && TARGET_HARD_FLOAT_ABI && TARGET_MAVERICK)     \
   || ((REGNO) == FIRST_IWMMXT_REGNUM && TARGET_IWMMXT_ABI) \
   || (TARGET_ARM && ((REGNO) == FIRST_FPA_REGNUM)      \
       && TARGET_HARD_FLOAT_ABI && TARGET_FPA))

Definition at line 1600 of file arm.h.

#define GO_IF_LEGITIMATE_ADDRESS ( MODE,
X,
WIN   ) 

Value:

if (TARGET_ARM)             \
    ARM_GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN)       \
  else /* if (TARGET_THUMB) */            \
    THUMB_GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN)

Definition at line 2187 of file arm.h.

#define GO_IF_MODE_DEPENDENT_ADDRESS ( ADDR,
LABEL   ) 

Value:

if (TARGET_ARM)         \
    ARM_GO_IF_MODE_DEPENDENT_ADDRESS (ADDR, LABEL)

Definition at line 2227 of file arm.h.

#define GOT_PCREL   1

Definition at line 582 of file arm.h.

#define HARD_FRAME_POINTER_REGNUM

Value:

(TARGET_ARM         \
   ? ARM_HARD_FRAME_POINTER_REGNUM    \
   : THUMB_HARD_FRAME_POINTER_REGNUM)

Definition at line 1009 of file arm.h.

#define HARD_REGNO_MODE_OK ( REGNO,
MODE   )     arm_hard_regno_mode_ok ((REGNO), (MODE))

Definition at line 1080 of file arm.h.

#define HARD_REGNO_NREGS ( REGNO,
MODE   ) 

Value:

((TARGET_ARM        \
    && REGNO >= FIRST_FPA_REGNUM  \
    && REGNO != FRAME_POINTER_REGNUM  \
    && REGNO != ARG_POINTER_REGNUM) \
    && !IS_VFP_REGNUM (REGNO)   \
   ? 1 : ARM_NUM_REGS (MODE))

Definition at line 1071 of file arm.h.

#define HARD_REGNO_RENAME_OK ( SRC,
DST   ) 

Value:

(! IS_INTERRUPT (cfun->machine->func_type) ||     \
    regs_ever_live[DST])

Definition at line 1121 of file arm.h.

#define HAVE_POST_DECREMENT   TARGET_ARM

Definition at line 1978 of file arm.h.

#define HAVE_POST_INCREMENT   1

Definition at line 1976 of file arm.h.

#define HAVE_POST_MODIFY_DISP   TARGET_ARM

Definition at line 1981 of file arm.h.

#define HAVE_POST_MODIFY_REG   TARGET_ARM

Definition at line 1983 of file arm.h.

#define HAVE_PRE_DECREMENT   TARGET_ARM

Definition at line 1979 of file arm.h.

#define HAVE_PRE_INCREMENT   TARGET_ARM

Definition at line 1977 of file arm.h.

#define HAVE_PRE_MODIFY_DISP   TARGET_ARM

Definition at line 1980 of file arm.h.

#define HAVE_PRE_MODIFY_REG   TARGET_ARM

Definition at line 1982 of file arm.h.

#define INCOMING_RETURN_ADDR_RTX   gen_rtx_REG (Pmode, LR_REGNUM)

Definition at line 2624 of file arm.h.

#define INDEX_REG_CLASS   (TARGET_THUMB ? LO_REGS : GENERAL_REGS)

Definition at line 1213 of file arm.h.

#define INIT_CUMULATIVE_ARGS ( CUM,
FNTYPE,
LIBNAME,
FNDECL,
N_NAMED_ARGS   )     arm_init_cumulative_args (&(CUM), (FNTYPE), (LIBNAME), (FNDECL))

Definition at line 1750 of file arm.h.

#define INIT_EXPANDERS   arm_init_expanders ()

Definition at line 1900 of file arm.h.

#define INITIAL_ELIMINATION_OFFSET ( FROM,
TO,
OFFSET   ) 

Value:

if (TARGET_ARM)             \
    (OFFSET) = arm_compute_initial_elimination_offset (FROM, TO); \
  else                  \
    (OFFSET) = thumb_compute_initial_elimination_offset (FROM, TO)

Definition at line 1889 of file arm.h.

#define INITIALIZE_TRAMPOLINE ( TRAMP,
FNADDR,
CXT   ) 

Value:

{                 \
  emit_move_insn (gen_rtx_MEM (SImode,          \
             plus_constant (TRAMP,      \
                TARGET_ARM ? 8 : 16)),  \
      CXT);             \
  emit_move_insn (gen_rtx_MEM (SImode,          \
             plus_constant (TRAMP,      \
                TARGET_ARM ? 12 : 20)), \
      FNADDR);            \
}

Definition at line 1961 of file arm.h.

#define IS_CIRRUS_REGNUM ( REGNUM   )     (((REGNUM) >= FIRST_CIRRUS_FP_REGNUM) && ((REGNUM) <= LAST_CIRRUS_FP_REGNUM))

Definition at line 1040 of file arm.h.

Referenced by arm_hard_regno_mode_ok(), and arm_regno_class().

#define IS_INTERRUPT ( t   )     (t & ARM_FT_INTERRUPT)

Definition at line 1656 of file arm.h.

#define IS_IWMMXT_GR_REGNUM ( REGNUM   )     (((REGNUM) >= FIRST_IWMMXT_GR_REGNUM) && ((REGNUM) <= LAST_IWMMXT_GR_REGNUM))

Definition at line 1029 of file arm.h.

Referenced by arm_dbx_register_number(), arm_hard_regno_mode_ok(), and arm_regno_class().

#define IS_IWMMXT_REGNUM ( REGNUM   )     (((REGNUM) >= FIRST_IWMMXT_REGNUM) && ((REGNUM) <= LAST_IWMMXT_REGNUM))

Definition at line 1027 of file arm.h.

Referenced by arm_dbx_register_number(), arm_hard_regno_mode_ok(), and arm_regno_class().

#define IS_NAKED ( t   )     (t & ARM_FT_NAKED)

Definition at line 1658 of file arm.h.

#define IS_NESTED ( t   )     (t & ARM_FT_NESTED)

Definition at line 1659 of file arm.h.

#define IS_VFP_REGNUM ( REGNUM   )     (((REGNUM) >= FIRST_VFP_REGNUM) && ((REGNUM) <= LAST_VFP_REGNUM))

Definition at line 1045 of file arm.h.

Referenced by arm_dbx_register_number(), arm_hard_regno_mode_ok(), arm_print_operand(), and arm_regno_class().

#define IS_VOLATILE ( t   )     (t & ARM_FT_VOLATILE)

Definition at line 1657 of file arm.h.

#define LAST_ARG_REGNUM   ARG_REGISTER (NUM_ARG_REGS)

Definition at line 965 of file arm.h.

#define LAST_CIRRUS_FP_REGNUM   42

Definition at line 1039 of file arm.h.

#define LAST_FPA_REGNUM   23

Definition at line 1021 of file arm.h.

Referenced by arm_expand_prologue(), arm_get_frame_offsets(), arm_hard_regno_mode_ok(), arm_output_epilogue(), and use_return_insn().

#define LAST_HI_REGNUM   11

Definition at line 971 of file arm.h.

#define LAST_IWMMXT_GR_REGNUM   46

Definition at line 1024 of file arm.h.

Referenced by arm_print_operand().

#define LAST_IWMMXT_REGNUM   62

Definition at line 1026 of file arm.h.

Referenced by arm_expand_prologue(), arm_get_frame_offsets(), arm_output_epilogue(), and use_return_insn().

#define LAST_LO_REGNUM   7

Definition at line 969 of file arm.h.

#define LAST_VFP_REGNUM   94

Definition at line 1044 of file arm.h.

Referenced by arm_expand_prologue(), arm_get_vfp_saved_size(), arm_output_epilogue(), use_return_insn(), and vfp_emit_fstmx().

#define LEGITIMATE_CONSTANT_P ( X   )     (TARGET_ARM ? ARM_LEGITIMATE_CONSTANT_P (X) : THUMB_LEGITIMATE_CONSTANT_P (X))

Definition at line 2058 of file arm.h.

#define LEGITIMATE_PIC_OPERAND_P ( X   ) 

Value:

(!(symbol_mentioned_p (X)         \
     || label_mentioned_p (X)         \
     || (GET_CODE (X) == SYMBOL_REF       \
         && CONSTANT_POOL_ADDRESS_P (X)       \
         && (symbol_mentioned_p (get_pool_constant (X))   \
       || label_mentioned_p (get_pool_constant (X))))))

Definition at line 2318 of file arm.h.

#define LEGITIMIZE_ADDRESS ( X,
OLDX,
MODE,
WIN   ) 

Value:

do {              \
  if (TARGET_ARM)         \
    ARM_LEGITIMIZE_ADDRESS (X, OLDX, MODE, WIN);  \
  else              \
    THUMB_LEGITIMIZE_ADDRESS (X, OLDX, MODE, WIN);  \
              \
  if (memory_address_p (MODE, X))     \
    goto WIN;           \
} while (0)

Definition at line 2206 of file arm.h.

#define LEGITIMIZE_RELOAD_ADDRESS ( X,
MODE,
OPNUM,
TYPE,
IND_LEVELS,
WIN   ) 

Value:

if (TARGET_ARM)                \
    ARM_LEGITIMIZE_RELOAD_ADDRESS (X, MODE, OPNUM, TYPE, IND_LEVELS, WIN); \
  else                     \
    THUMB_LEGITIMIZE_RELOAD_ADDRESS (X, MODE, OPNUM, TYPE, IND_LEVELS, WIN)

Definition at line 1489 of file arm.h.

#define LIBCALL_VALUE ( MODE   ) 

Value:

(TARGET_ARM && TARGET_HARD_FLOAT_ABI && TARGET_FPA      \
   && GET_MODE_CLASS (MODE) == MODE_FLOAT       \
   ? gen_rtx_REG (MODE, FIRST_FPA_REGNUM)       \
   : TARGET_ARM && TARGET_HARD_FLOAT_ABI && TARGET_MAVERICK   \
     && GET_MODE_CLASS (MODE) == MODE_FLOAT       \
   ? gen_rtx_REG (MODE, FIRST_CIRRUS_FP_REGNUM)       \
   : TARGET_IWMMXT_ABI && arm_vector_mode_supported_p (MODE)      \
   ? gen_rtx_REG (MODE, FIRST_IWMMXT_REGNUM)        \
   : gen_rtx_REG (MODE, ARG_REGISTER (1)))

Definition at line 1579 of file arm.h.

#define LIBGCC2_WORDS_BIG_ENDIAN   0

Definition at line 632 of file arm.h.

#define LOAD_EXTEND_OP ( MODE   ) 

Value:

(TARGET_THUMB ? ZERO_EXTEND :           \
   ((arm_arch4 || (MODE) == QImode) ? ZERO_EXTEND     \
    : ((BYTES_BIG_ENDIAN && (MODE) == HImode) ? SIGN_EXTEND : UNKNOWN)))

Definition at line 2257 of file arm.h.

#define LONG_CALL_FLAG_CHAR   '#'

Definition at line 2065 of file arm.h.

#define MASK_RETURN_ADDR

Value:

/* If we are generating code for an ARM2/ARM3 machine or for an ARM6  \
     in 26 bit mode, the condition codes must be masked out of the  \
     return address.  This does not apply to ARM6 and later processors  \
     when running in 32 bit mode.  */         \
  ((arm_arch4 || TARGET_THUMB)            \
   ? (gen_int_mode ((unsigned long)0xffffffff, Pmode))      \
   : arm_gen_return_addr_mask ())

Definition at line 2629 of file arm.h.

#define MAX_REGS_PER_ADDRESS   2

Definition at line 2023 of file arm.h.

#define MEMORY_MOVE_COST ( M,
CLASS,
IN   ) 

Value:

(TARGET_ARM ? 10 :          \
   ((GET_MODE_SIZE (M) < 4 ? 8 : 2 * GET_MODE_SIZE (M)) \
    * (CLASS == LO_REGS ? 1 : 2)))

Definition at line 2293 of file arm.h.

#define MODE_BASE_REG_CLASS ( MODE   ) 

Value:

(TARGET_ARM ? GENERAL_REGS :          \
     (((MODE) == SImode) ? BASE_REGS : LO_REGS))

Definition at line 1219 of file arm.h.

#define MODE_BASE_REG_REG_CLASS ( MODE   )     BASE_REG_CLASS

Definition at line 1225 of file arm.h.

Referenced by base_reg_class(), find_reloads_address_1(), record_address_regs(), replace_oldest_value_addr(), and scan_rtx_address().

#define MODES_TIEABLE_P ( MODE1,
MODE2   )     (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))

Definition at line 1087 of file arm.h.

#define MOVE_MAX   4

Definition at line 2244 of file arm.h.

#define MOVE_RATIO   (arm_tune_xscale ? 4 : 2)

Definition at line 2247 of file arm.h.

#define MUST_USE_SJLJ_EXCEPTIONS   1

Definition at line 974 of file arm.h.

#define N_REG_CLASSES   (int) LIM_REG_CLASSES

Definition at line 1148 of file arm.h.

#define NEED_GOT_RELOC   0

Definition at line 564 of file arm.h.

#define NEED_PLT_RELOC   0

Definition at line 567 of file arm.h.

#define NO_FUNCTION_CSE   1

Definition at line 2282 of file arm.h.

#define NUM_ARG_REGS   4

Definition at line 956 of file arm.h.

#define OPTION_DEFAULT_SPECS

Value:

{"arch", "%{!march=*:%{!mcpu=*:-march=%(VALUE)}}" }, \
  {"cpu", "%{!march=*:%{!mcpu=*:-mcpu=%(VALUE)}}" }, \
  {"tune", "%{!mcpu=*:%{!mtune=*:-mtune=%(VALUE)}}" }, \
  {"float", \
    "%{!msoft-float:%{!mhard-float:%{!mfloat-abi=*:-mfloat-abi=%(VALUE)}}}" }, \
  {"fpu", "%{!mfpu=*:-mfpu=%(VALUE)}"}, \
  {"abi", "%{!mabi=*:-mabi=%(VALUE)}"},

Definition at line 411 of file arm.h.

#define OUTPUT_ADDR_CONST_EXTRA ( FILE,
X,
FAIL   ) 

Value:

if (GET_CODE (X) != CONST_VECTOR    \
      || ! arm_emit_vector_const (FILE, X)) \
    goto FAIL;

Definition at line 2606 of file arm.h.

#define OVERRIDE_OPTIONS   arm_override_options ()

Definition at line 558 of file arm.h.

#define PARM_BOUNDARY   32

Definition at line 647 of file arm.h.

#define PCC_BITFIELD_TYPE_MATTERS   TARGET_AAPCS_BASED

Definition at line 718 of file arm.h.

#define PIC_OFFSET_TABLE_REGNUM   arm_pic_register

Definition at line 2314 of file arm.h.

#define Pmode   SImode

Definition at line 2285 of file arm.h.

#define PREFERRED_RELOAD_CLASS ( X,
CLASS   ) 

Value:

(TARGET_ARM ? (CLASS) :     \
   ((CLASS) == BASE_REGS ? (CLASS) : LO_REGS))

Definition at line 1350 of file arm.h.

#define PREFERRED_STACK_BOUNDARY   (arm_abi == ARM_ABI_ATPCS ? 64 : STACK_BOUNDARY)

Definition at line 651 of file arm.h.

#define PRINT_OPERAND ( STREAM,
X,
CODE   )     arm_print_operand (STREAM, X, CODE)

Definition at line 2470 of file arm.h.

#define PRINT_OPERAND_ADDRESS ( STREAM,
X   ) 

Value:

if (TARGET_ARM)       \
    ARM_PRINT_OPERAND_ADDRESS (STREAM, X) \
  else            \
    THUMB_PRINT_OPERAND_ADDRESS (STREAM, X)

Definition at line 2600 of file arm.h.

#define PRINT_OPERAND_PUNCT_VALID_P ( CODE   ) 

Value:

(CODE == '@' || CODE == '|'     \
   || (TARGET_ARM   && (CODE == '?'))   \
   || (TARGET_THUMB && (CODE == '_')))

Definition at line 2464 of file arm.h.

#define PROMOTE_FUNCTION_MODE ( MODE,
UNSIGNEDP,
TYPE   ) 

Value:

if (GET_MODE_CLASS (MODE) == MODE_INT   \
      && GET_MODE_SIZE (MODE) < 4)        \
    (MODE) = SImode;        \

Definition at line 607 of file arm.h.

Referenced by arm_function_value(), and promote_mode().

#define PROMOTE_MODE ( MODE,
UNSIGNEDP,
TYPE   ) 

Value:

if (GET_MODE_CLASS (MODE) == MODE_INT   \
      && GET_MODE_SIZE (MODE) < 4)        \
    {           \
      if (MODE == QImode)     \
  UNSIGNEDP = 1;        \
      else if (MODE == HImode)      \
  UNSIGNEDP = 1;        \
      (MODE) = SImode;        \
    }

Definition at line 596 of file arm.h.

#define REG_ALLOC_ORDER

Value:

{                                   \
     3,  2,  1,  0, 12, 14,  4,  5, \
     6,  7,  8, 10,  9, 11, 13, 15, \
    16, 17, 18, 19, 20, 21, 22, 23, \
    27, 28, 29, 30, 31, 32, 33, 34, \
    35, 36, 37, 38, 39, 40, 41, 42, \
    43, 44, 45, 46, 47, 48, 49, 50, \
    51, 52, 53, 54, 55, 56, 57, 58, \
    59, 60, 61, 62,       \
    24, 25, 26,         \
    78, 77, 76, 75, 74, 73, 72, 71, \
    70, 69, 68, 67, 66, 65, 64, 63, \
    79, 80, 81, 82, 83, 84, 85, 86, \
    87, 88, 89, 90, 91, 92, 93, 94, \
    95            \
}

Definition at line 1100 of file arm.h.

#define REG_CLASS_CONTENTS

Value:

{               \
  { 0x00000000, 0x00000000, 0x00000000 }, /* NO_REGS  */  \
  { 0x00FF0000, 0x00000000, 0x00000000 }, /* FPA_REGS */  \
  { 0xF8000000, 0x000007FF, 0x00000000 }, /* CIRRUS_REGS */ \
  { 0x00000000, 0x80000000, 0x7FFFFFFF }, /* VFP_REGS  */ \
  { 0x00000000, 0x00007800, 0x00000000 }, /* IWMMXT_GR_REGS */  \
  { 0x00000000, 0x7FFF8000, 0x00000000 }, /* IWMMXT_REGS */ \
  { 0x000000FF, 0x00000000, 0x00000000 }, /* LO_REGS */   \
  { 0x00002000, 0x00000000, 0x00000000 }, /* STACK_REG */ \
  { 0x000020FF, 0x00000000, 0x00000000 }, /* BASE_REGS */ \
  { 0x0000FF00, 0x00000000, 0x00000000 }, /* HI_REGS */   \
  { 0x01000000, 0x00000000, 0x00000000 }, /* CC_REG */    \
  { 0x00000000, 0x00000000, 0x80000000 }, /* VFPCC_REG */ \
  { 0x0200FFFF, 0x00000000, 0x00000000 }, /* GENERAL_REGS */  \
  { 0xFAFFFFFF, 0xFFFFFFFF, 0x7FFFFFFF }  /* ALL_REGS */  \
}

Definition at line 1172 of file arm.h.

#define REG_CLASS_FROM_LETTER ( C   ) 

Value:

(  (C) == 'f' ? FPA_REGS    \
   : (C) == 'v' ? CIRRUS_REGS   \
   : (C) == 'w' ? VFP_REGS    \
   : (C) == 'y' ? IWMMXT_REGS   \
   : (C) == 'z' ? IWMMXT_GR_REGS  \
   : (C) == 'l' ? (TARGET_ARM ? GENERAL_REGS : LO_REGS) \
   : TARGET_ARM ? NO_REGS   \
   : (C) == 'h' ? HI_REGS   \
   : (C) == 'b' ? BASE_REGS   \
   : (C) == 'k' ? STACK_REG   \
   : (C) == 'c' ? CC_REG    \
   : NO_REGS)

Definition at line 1236 of file arm.h.

#define REG_CLASS_NAMES

Value:

{     \
  "NO_REGS",    \
  "FPA_REGS",   \
  "CIRRUS_REGS",  \
  "VFP_REGS",   \
  "IWMMXT_GR_REGS", \
  "IWMMXT_REGS",  \
  "LO_REGS",    \
  "STACK_REG",    \
  "BASE_REGS",    \
  "HI_REGS",    \
  "CC_REG",   \
  "VFPCC_REG",    \
  "GENERAL_REGS", \
  "ALL_REGS",   \
}

Definition at line 1151 of file arm.h.

#define REG_MODE_OK_FOR_BASE_P ( X,
MODE   ) 

Value:

(TARGET_THUMB         \
   ? THUMB_REG_MODE_OK_FOR_BASE_P (X, MODE) \
   : ARM_REG_OK_FOR_BASE_P (X))

Definition at line 2140 of file arm.h.

#define REG_MODE_OK_FOR_REG_BASE_P ( X,
MODE   )     REG_OK_FOR_INDEX_P (X)

Definition at line 2161 of file arm.h.

Referenced by find_reloads_address_1(), record_address_regs(), replace_oldest_value_addr(), scan_rtx_address(), and thumb_legitimize_reload_address().

#define REG_OK_FOR_INDEX_P ( X   ) 

Value:

(TARGET_THUMB         \
   ? THUMB_REG_OK_FOR_INDEX_P (X)   \
   : ARM_REG_OK_FOR_INDEX_P (X))

Definition at line 2154 of file arm.h.

#define REG_STRICT_P   0

Definition at line 2124 of file arm.h.

#define REGISTER_MOVE_COST ( MODE,
FROM,
TO   ) 

Value:

(TARGET_ARM ?           \
   ((FROM) == FPA_REGS && (TO) != FPA_REGS ? 20 : \
    (FROM) != FPA_REGS && (TO) == FPA_REGS ? 20 : \
    (FROM) == VFP_REGS && (TO) != VFP_REGS ? 10 :  \
    (FROM) != VFP_REGS && (TO) == VFP_REGS ? 10 :  \
    (FROM) == IWMMXT_REGS && (TO) != IWMMXT_REGS ? 4 :  \
    (FROM) != IWMMXT_REGS && (TO) == IWMMXT_REGS ? 4 :  \
    (FROM) == IWMMXT_GR_REGS || (TO) == IWMMXT_GR_REGS ? 20 :  \
    (FROM) == CIRRUS_REGS && (TO) != CIRRUS_REGS ? 20 : \
    (FROM) != CIRRUS_REGS && (TO) == CIRRUS_REGS ? 20 : \
   2)             \
   :              \
   ((FROM) == HI_REGS || (TO) == HI_REGS) ? 4 : 2)

Definition at line 1505 of file arm.h.

 
#define REGISTER_TARGET_PRAGMAS (  ) 

Value:

do {          \
  c_register_pragma (0, "long_calls", arm_pr_long_calls);   \
  c_register_pragma (0, "no_long_calls", arm_pr_no_long_calls);   \
  c_register_pragma (0, "long_calls_off", arm_pr_long_calls_off); \
} while (0)

Definition at line 2332 of file arm.h.

#define REGNO_MODE_OK_FOR_BASE_P ( REGNO,
MODE   ) 

Value:

(TARGET_THUMB           \
   ? THUMB_REGNO_MODE_OK_FOR_BASE_P (REGNO, MODE) \
   : ARM_REGNO_OK_FOR_BASE_P (REGNO))

Definition at line 2006 of file arm.h.

#define REGNO_MODE_OK_FOR_REG_BASE_P ( X,
MODE   )     REGNO_OK_FOR_INDEX_P (X)

Definition at line 2013 of file arm.h.

Referenced by ok_for_base_p_1().

#define REGNO_OK_FOR_INDEX_P ( REGNO   )     REGNO_MODE_OK_FOR_BASE_P (REGNO, QImode)

Definition at line 2018 of file arm.h.

#define REGNO_REG_CLASS ( REGNO   )     arm_regno_class (REGNO)

Definition at line 1194 of file arm.h.

#define RETURN_ADDR_MASK26   (0x03fffffc)

Definition at line 2619 of file arm.h.

#define RETURN_ADDR_RTX ( COUNT,
FRAME   )     arm_return_addr (COUNT, FRAME)

Definition at line 2614 of file arm.h.

#define RETURN_IN_MEMORY ( TYPE   )     arm_return_in_memory (TYPE)

Definition at line 1615 of file arm.h.

#define RETURN_POPS_ARGS ( FUNDECL,
FUNTYPE,
SIZE   )     0

Definition at line 1575 of file arm.h.

#define REVERSE_CONDITION ( CODE,
MODE   ) 

Value:

(((MODE) == CCFPmode || (MODE) == CCFPEmode) \
   ? reverse_condition_maybe_unordered (code) \
   : reverse_condition (code))

Definition at line 2346 of file arm.h.

#define REVERSIBLE_CC_MODE ( MODE   )     1

Definition at line 2344 of file arm.h.

#define ROUND_UP_WORD ( X   )     (((X) + 3) & ~3)

Definition at line 940 of file arm.h.

Referenced by arm_get_frame_offsets(), and arm_poke_function_name().

#define SECONDARY_INPUT_RELOAD_CLASS ( CLASS,
MODE,
X   ) 

Value:

/* Restrict which direct reloads are allowed for VFP regs.  */ \
  ((TARGET_VFP && TARGET_HARD_FLOAT       \
    && (CLASS) == VFP_REGS)         \
    ? vfp_secondary_reload_class (MODE, X) :      \
  /* Cannot load constants into Cirrus registers.  */   \
   (TARGET_MAVERICK && TARGET_HARD_FLOAT      \
     && (CLASS) == CIRRUS_REGS          \
     && (CONSTANT_P (X) || GET_CODE (X) == SYMBOL_REF))   \
    ? GENERAL_REGS :            \
  (TARGET_ARM ?             \
   (((CLASS) == IWMMXT_REGS || (CLASS) == IWMMXT_GR_REGS) \
      && CONSTANT_P (X))          \
   ? GENERAL_REGS :           \
   (((MODE) == HImode && ! arm_arch4        \
     && (GET_CODE (X) == MEM          \
   || ((GET_CODE (X) == REG || GET_CODE (X) == SUBREG)  \
       && true_regnum (X) == -1)))      \
    ? GENERAL_REGS : NO_REGS)         \
   : THUMB_SECONDARY_INPUT_RELOAD_CLASS (CLASS, MODE, X)))

Definition at line 1383 of file arm.h.

#define SECONDARY_OUTPUT_RELOAD_CLASS ( CLASS,
MODE,
X   ) 

Value:

/* Restrict which direct reloads are allowed for VFP regs.  */ \
  ((TARGET_VFP && TARGET_HARD_FLOAT       \
    && (CLASS) == VFP_REGS)         \
   ? vfp_secondary_reload_class (MODE, X)     \
   : TARGET_ARM             \
   ? (((MODE) == HImode && ! arm_arch4 && true_regnum (X) == -1) \
    ? GENERAL_REGS : NO_REGS)         \
   : THUMB_SECONDARY_OUTPUT_RELOAD_CLASS (CLASS, MODE, X))

Definition at line 1372 of file arm.h.

#define SELECT_CC_MODE ( OP,
X,
Y   )     arm_select_cc_mode (OP, X, Y)

Definition at line 2342 of file arm.h.

#define SHORT_CALL_FLAG_CHAR   '^'

Definition at line 2064 of file arm.h.

#define SIZE_TYPE   (TARGET_AAPCS_BASED ? "unsigned int" : "long unsigned int")

Definition at line 713 of file arm.h.

#define SLOW_BYTE_ACCESS   0

Definition at line 2263 of file arm.h.

#define SLOW_UNALIGNED_ACCESS ( MODE,
ALIGN   )     1

Definition at line 2265 of file arm.h.

#define SMALL_REGISTER_CLASSES   TARGET_THUMB

Definition at line 1231 of file arm.h.

#define STACK_BOUNDARY   (ARM_DOUBLEWORD_ALIGN ? DOUBLEWORD_ALIGNMENT : 32)

Definition at line 649 of file arm.h.

#define STACK_GROWS_DOWNWARD   1

Definition at line 1524 of file arm.h.

#define STACK_POINTER_REGNUM   SP_REGNUM

Definition at line 1017 of file arm.h.

#define STARTING_FRAME_OFFSET   0

Definition at line 1550 of file arm.h.

#define STATIC_CHAIN_REGNUM   (TARGET_ARM ? 12 : 9)

Definition at line 988 of file arm.h.

#define STRICT_ALIGNMENT   1

Definition at line 703 of file arm.h.

#define STRUCTURE_SIZE_BOUNDARY   arm_structure_size_boundary

Definition at line 687 of file arm.h.

#define SUBTARGET_CPP_SPEC   ""

Definition at line 177 of file arm.h.

#define TARGET_AAPCS_BASED   (arm_abi != ARM_ABI_APCS && arm_abi != ARM_ABI_ATPCS)

Definition at line 296 of file arm.h.

Referenced by arm_align_anon_bitfield(), arm_cookie_has_size(), arm_cxx_cdtor_returns_this(), arm_cxx_class_data_always_comdat(), arm_cxx_determine_class_data_visibility(), arm_cxx_export_class_data(), arm_cxx_guard_mask_bit(), arm_cxx_guard_type(), arm_cxx_key_method_may_be_inline(), arm_cxx_use_aeabi_atexit(), arm_dbx_register_number(), arm_default_short_enums(), arm_elf_asm_constructor(), arm_get_cookie_size(), arm_must_pass_in_stack(), arm_override_options(), arm_pad_arg_upward(), arm_pad_reg_upward(), arm_promote_prototypes(), arm_return_in_memory(), and arm_return_in_msb().

#define TARGET_ABORT_NORETURN   (target_flags & ARM_FLAG_ABORT_NORETURN)

Definition at line 283 of file arm.h.

#define TARGET_APCS_FLOAT   (target_flags & ARM_FLAG_APCS_FLOAT)

Definition at line 266 of file arm.h.

#define TARGET_APCS_FRAME   (target_flags & ARM_FLAG_APCS_FRAME)

Definition at line 262 of file arm.h.

#define TARGET_APCS_REENT   (target_flags & ARM_FLAG_APCS_REENT)

Definition at line 267 of file arm.h.

#define TARGET_APCS_STACK   (target_flags & ARM_FLAG_APCS_STACK)

Definition at line 265 of file arm.h.

#define TARGET_ARM   (! TARGET_THUMB)

Definition at line 287 of file arm.h.

#define TARGET_BACKTRACE

Value:

(leaf_function_p ()             \
                 ? (target_flags & THUMB_FLAG_LEAF_BACKTRACE) \
                 : (target_flags & THUMB_FLAG_BACKTRACE))

Definition at line 291 of file arm.h.

#define TARGET_BIG_END   (target_flags & ARM_FLAG_BIG_END)

Definition at line 279 of file arm.h.

#define TARGET_BPABI   false

Definition at line 304 of file arm.h.

Referenced by arm_init_libfuncs().

#define TARGET_CALLEE_INTERWORKING   (target_flags & THUMB_FLAG_CALLEE_SUPER_INTERWORKING)

Definition at line 289 of file arm.h.

#define TARGET_CALLER_INTERWORKING   (target_flags & THUMB_FLAG_CALLER_SUPER_INTERWORKING)

Definition at line 290 of file arm.h.

#define TARGET_CIRRUS_FIX_INVALID_INSNS   (target_flags & CIRRUS_FIX_INVALID_INSNS)

Definition at line 294 of file arm.h.

Referenced by arm_reorg().

 
#define TARGET_CPU_CPP_BUILTINS (  ) 

Definition at line 33 of file arm.h.

#define TARGET_CPU_DEFAULT   TARGET_CPU_generic

Definition at line 144 of file arm.h.

#define TARGET_DEFAULT   (ARM_FLAG_APCS_FRAME)

Definition at line 551 of file arm.h.

#define TARGET_DEFAULT_FLOAT_ABI   ARM_FLOAT_ABI_SOFT

Definition at line 483 of file arm.h.

Referenced by arm_override_options().

#define TARGET_EITHER   1

Definition at line 288 of file arm.h.

#define TARGET_FPA   (arm_fp_model == ARM_FP_MODEL_FPA)

Definition at line 273 of file arm.h.

#define TARGET_FPE   (target_flags & ARM_FLAG_FPE)

Definition at line 264 of file arm.h.

#define TARGET_HARD_FLOAT   (arm_float_abi != ARM_FLOAT_ABI_SOFT)

Definition at line 270 of file arm.h.

#define TARGET_HARD_FLOAT_ABI   (arm_float_abi == ARM_FLOAT_ABI_HARD)

Definition at line 272 of file arm.h.

Referenced by arm_apply_result_size().

#define TARGET_INTERWORK   (target_flags & ARM_FLAG_INTERWORK)

Definition at line 280 of file arm.h.

#define TARGET_IWMMXT   (arm_arch_iwmmxt)

Definition at line 276 of file arm.h.

Referenced by arm_expand_prologue(), arm_output_epilogue(), and arm_override_options().

#define TARGET_IWMMXT_ABI   (TARGET_ARM && arm_abi == ARM_ABI_IWMMXT)

Definition at line 278 of file arm.h.

Referenced by arm_apply_result_size(), arm_function_arg(), and arm_override_options().

#define TARGET_LDRD   (arm_arch5e && ARM_DOUBLEWORD_ALIGN)

Definition at line 295 of file arm.h.

Referenced by arm_hard_regno_mode_ok(), arm_legitimate_address_p(), arm_legitimate_index_p(), and output_move_double().

#define TARGET_LITTLE_WORDS   (target_flags & ARM_FLAG_LITTLE_WORDS)

Definition at line 281 of file arm.h.

#define TARGET_LONG_CALLS   (target_flags & ARM_FLAG_LONG_CALLS)

Definition at line 285 of file arm.h.

#define TARGET_MAVERICK   (arm_fp_model == ARM_FP_MODEL_MAVERICK)

Definition at line 274 of file arm.h.

Referenced by arm_apply_result_size(), arm_float_words_big_endian(), arm_hard_regno_mode_ok(), arm_legitimate_index_p(), and arm_select_cc_mode().

#define TARGET_NO_SCHED_PRO   (target_flags & ARM_FLAG_NO_SCHED_PRO)

Definition at line 282 of file arm.h.

#define TARGET_OPTIONS

Value:

{                 \
  {"cpu=",  & arm_select[0].string,         \
   N_("Specify the name of the target CPU"), 0},      \
  {"arch=", & arm_select[1].string,         \
   N_("Specify the name of the target architecture"), 0},   \
  {"tune=", & arm_select[2].string, "", 0},       \
  {"fpe=",  & target_fpe_name, "", 0},          \
  {"fp=",  & target_fpe_name, "", 0},         \
  {"fpu=",  & target_fpu_name,            \
   N_("Specify the name of the target floating point hardware/format"), 0}, \
  {"float-abi=", & target_float_abi_name,       \
   N_("Specify if floating point hardware should be used"), 0},   \
  {"structure-size-boundary=", & structure_size_string,     \
   N_("Specify the minimum bit alignment of structures"), 0},   \
  {"pic-register=", & arm_pic_register_string,        \
   N_("Specify the register to be used for PIC addressing"), 0},  \
  {"abi=", &target_abi_name, N_("Specify an ABI"), 0},      \
  {"soft-float", &target_float_switch,          \
   N_("Alias for -mfloat-abi=soft"), "s"},        \
  {"hard-float", &target_float_switch,          \
   N_("Alias for -mfloat-abi=hard"), "h"}       \
}

Definition at line 377 of file arm.h.

#define TARGET_POKE_FUNCTION_NAME   (target_flags & ARM_FLAG_POKE)

Definition at line 263 of file arm.h.

#define TARGET_PTRMEMFUNC_VBIT_LOCATION   ptrmemfunc_vbit_in_delta

Definition at line 659 of file arm.h.

#define TARGET_REALLY_IWMMXT   (TARGET_IWMMXT && TARGET_ARM)

Definition at line 277 of file arm.h.

Referenced by arm_compute_save_reg_mask(), arm_get_frame_offsets(), arm_hard_regno_mode_ok(), arm_init_cumulative_args(), arm_legitimate_index_p(), output_return_instruction(), and use_return_insn().

#define TARGET_SINGLE_PIC_BASE   (target_flags & ARM_FLAG_SINGLE_PIC_BASE)

Definition at line 284 of file arm.h.

#define TARGET_SOFT_FLOAT   (arm_float_abi == ARM_FLOAT_ABI_SOFT)

Definition at line 268 of file arm.h.

#define TARGET_SWITCHES

Definition at line 312 of file arm.h.

#define TARGET_THUMB   (target_flags & ARM_FLAG_THUMB)

Definition at line 286 of file arm.h.

#define TARGET_VERSION   fputs (" (ARM/generic)", stderr);

Definition at line 182 of file arm.h.

#define TARGET_VFP   (arm_fp_model == ARM_FP_MODEL_VFP)

Definition at line 275 of file arm.h.

Referenced by arm_expand_prologue(), arm_float_words_big_endian(), arm_get_frame_offsets(), arm_get_vfp_saved_size(), arm_hard_regno_mode_ok(), arm_legitimate_address_p(), arm_legitimize_address(), arm_output_epilogue(), arm_override_options(), init_fp_table(), and use_return_insn().

#define TEST_REGNO ( R,
TEST,
VALUE   )     ((R TEST VALUE) || ((unsigned) reg_renumber[R] TEST VALUE))

Definition at line 1992 of file arm.h.

#define THUMB_FLAG_BACKTRACE   (1 << 17)

Definition at line 245 of file arm.h.

#define THUMB_FLAG_CALLEE_SUPER_INTERWORKING   (1 << 19)

Definition at line 253 of file arm.h.

#define THUMB_FLAG_CALLER_SUPER_INTERWORKING   (1 << 20)

Definition at line 257 of file arm.h.

#define THUMB_FLAG_LEAF_BACKTRACE   (1 << 18)

Definition at line 249 of file arm.h.

#define THUMB_GO_IF_LEGITIMATE_ADDRESS ( MODE,
X,
WIN   ) 

Value:

{               \
    if (thumb_legitimate_address_p (MODE, X, REG_STRICT_P)) \
      goto WIN;             \
  }

Definition at line 2181 of file arm.h.

#define THUMB_HARD_FRAME_POINTER_REGNUM   7

Definition at line 1007 of file arm.h.

#define THUMB_LEGITIMATE_CONSTANT_P ( X   ) 

Value:

(   GET_CODE (X) == CONST_INT   \
  || GET_CODE (X) == CONST_DOUBLE \
  || CONSTANT_ADDRESS_P (X)   \
  || flag_pic)

Definition at line 2052 of file arm.h.

#define THUMB_LEGITIMIZE_ADDRESS ( X,
OLDX,
MODE,
WIN   ) 

Value:

do {              \
  X = thumb_legitimize_address (X, OLDX, MODE);   \
} while (0)

Definition at line 2201 of file arm.h.

#define THUMB_LEGITIMIZE_RELOAD_ADDRESS ( X,
MODE,
OPNUM,
TYPE,
IND_LEVELS,
WIN   ) 

Value:

{                 \
  if (GET_CODE (X) == PLUS            \
      && GET_MODE_SIZE (MODE) < 4         \
      && GET_CODE (XEXP (X, 0)) == REG          \
      && XEXP (X, 0) == stack_pointer_rtx       \
      && GET_CODE (XEXP (X, 1)) == CONST_INT        \
      && ! thumb_legitimate_offset_p (MODE, INTVAL (XEXP (X, 1))))  \
    {                 \
      rtx orig_X = X;             \
      X = copy_rtx (X);             \
      push_reload (orig_X, NULL_RTX, &X, NULL,        \
       MODE_BASE_REG_CLASS (MODE),        \
       Pmode, VOIDmode, 0, 0, OPNUM, TYPE);     \
      goto WIN;               \
    }                 \
}

Definition at line 1471 of file arm.h.

#define THUMB_PRINT_OPERAND_ADDRESS ( STREAM,
X   ) 

Value:

{             \
  if (GET_CODE (X) == REG)        \
    asm_fprintf (STREAM, "[%r]", REGNO (X));    \
  else if (GET_CODE (X) == POST_INC)      \
    asm_fprintf (STREAM, "%r!", REGNO (XEXP (X, 0))); \
  else if (GET_CODE (X) == PLUS)      \
    {             \
      if (GET_CODE (XEXP (X, 0)) != REG)    \
        abort ();         \
      if (GET_CODE (XEXP (X, 1)) == CONST_INT)    \
  asm_fprintf (STREAM, "[%r, #%wd]",    \
         REGNO (XEXP (X, 0)),   \
         INTVAL (XEXP (X, 1)));   \
      else            \
  asm_fprintf (STREAM, "[%r, %r]",    \
         REGNO (XEXP (X, 0)),   \
         REGNO (XEXP (X, 1)));    \
    }             \
  else              \
    output_addr_const (STREAM, X);      \
}

Definition at line 2577 of file arm.h.

#define THUMB_REG_MODE_OK_FOR_BASE_P ( X,
MODE   ) 

Value:

(REGNO (X) <= LAST_LO_REGNUM      \
   || REGNO (X) >= FIRST_PSEUDO_REGISTER  \
   || (GET_MODE_SIZE (MODE) >= 4    \
       && (REGNO (X) == STACK_POINTER_REGNUM  \
     || (X) == hard_frame_pointer_rtx \
     || (X) == arg_pointer_rtx)))

Definition at line 2116 of file arm.h.

#define THUMB_REG_OK_FOR_INDEX_P ( X   )     THUMB_REG_MODE_OK_FOR_BASE_P (X, QImode)

Definition at line 2149 of file arm.h.

#define THUMB_REGNO_MODE_OK_FOR_BASE_P ( REGNO,
MODE   ) 

Value:

(TEST_REGNO (REGNO, <=, LAST_LO_REGNUM)     \
   || (GET_MODE_SIZE (MODE) >= 4        \
       && TEST_REGNO (REGNO, ==, STACK_POINTER_REGNUM)))

Definition at line 2001 of file arm.h.

#define THUMB_SECONDARY_INPUT_RELOAD_CLASS ( CLASS,
MODE,
X   ) 

Value:

((CLASS) != LO_REGS && (CLASS) != BASE_REGS       \
   ? ((true_regnum (X) == -1 ? LO_REGS          \
       : (true_regnum (X) + HARD_REGNO_NREGS (0, MODE) > 8) ? LO_REGS \
       : NO_REGS))              \
   : NO_REGS)

Definition at line 1355 of file arm.h.

#define THUMB_SECONDARY_OUTPUT_RELOAD_CLASS ( CLASS,
MODE,
X   ) 

Value:

((CLASS) != LO_REGS && (CLASS) != BASE_REGS       \
   ? ((true_regnum (X) == -1 ? LO_REGS          \
       : (true_regnum (X) + HARD_REGNO_NREGS (0, MODE) > 8) ? LO_REGS \
       : NO_REGS))              \
   : NO_REGS)

Definition at line 1362 of file arm.h.

#define THUMB_TRAMPOLINE_TEMPLATE ( FILE   ) 

Value:

{           \
  fprintf (FILE, "\t.code 32\n");   \
  fprintf (FILE, ".Ltrampoline_start:\n");  \
  asm_fprintf (FILE, "\tldr\t%r, [%r, #8]\n", \
         STATIC_CHAIN_REGNUM, PC_REGNUM); \
  asm_fprintf (FILE, "\tldr\t%r, [%r, #8]\n", \
         IP_REGNUM, PC_REGNUM);   \
  asm_fprintf (FILE, "\torr\t%r, %r, #1\n",     \
         IP_REGNUM, IP_REGNUM);       \
  asm_fprintf (FILE, "\tbx\t%r\n", IP_REGNUM);  \
  fprintf (FILE, "\t.word\t0\n");   \
  fprintf (FILE, "\t.word\t0\n");   \
  fprintf (FILE, "\t.code 16\n");   \
}

Definition at line 1929 of file arm.h.

#define TRAMPOLINE_ALIGNMENT   32

Definition at line 1955 of file arm.h.

#define TRAMPOLINE_SIZE   (TARGET_ARM ? 16 : 24)

Definition at line 1952 of file arm.h.

#define TRAMPOLINE_TEMPLATE ( FILE   ) 

Value:

if (TARGET_ARM)       \
    ARM_TRAMPOLINE_TEMPLATE (FILE)    \
  else            \
    THUMB_TRAMPOLINE_TEMPLATE (FILE)

Definition at line 1945 of file arm.h.

#define TRULY_NOOP_TRUNCATION ( OUTPREC,
INPREC   )     1

Definition at line 2279 of file arm.h.

#define UNITS_PER_WORD   4

Definition at line 640 of file arm.h.

#define USE_RETURN_INSN ( ISCOND   )     (TARGET_ARM ? use_return_insn (ISCOND, NULL) : 0)

Definition at line 1846 of file arm.h.

#define VALID_IWMMXT_REG_MODE ( MODE   )     (arm_vector_mode_supported_p (MODE) || (MODE) == DImode)

Definition at line 1090 of file arm.h.

Referenced by arm_hard_regno_mode_ok(), and arm_legitimate_index_p().

#define WCHAR_TYPE   (TARGET_AAPCS_BASED ? "unsigned int" : "int")

Definition at line 707 of file arm.h.

#define WCHAR_TYPE_SIZE   BITS_PER_WORD

Definition at line 709 of file arm.h.

#define WORD_REGISTER_OPERATIONS

Definition at line 2251 of file arm.h.

#define WORDS_BIG_ENDIAN   (BYTES_BIG_ENDIAN && ! TARGET_LITTLE_WORDS)

Definition at line 625 of file arm.h.

Typedef Documentation

typedef enum arm_cond_code arm_cc

Enumeration Type Documentation

enum arm_abi_type

Enumerator:
ARM_ABI_APCS 
ARM_ABI_ATPCS 
ARM_ABI_AAPCS 
ARM_ABI_IWMMXT 
ARM_ABI_APCS 
ARM_ABI_ATPCS 
ARM_ABI_AAPCS 
ARM_ABI_IWMMXT 
ARM_ABI_AAPCS_LINUX 

Definition at line 487 of file arm.h.

enum arm_builtins

Enumerator:
ARM_BUILTIN_CLZ 
ARM_BUILTIN_MAX 
ARM_BUILTIN_CLZ 
ARM_BUILTIN_MAX 
ARM_BUILTIN_GETWCX 
ARM_BUILTIN_SETWCX 
ARM_BUILTIN_WZERO 
ARM_BUILTIN_WAVG2BR 
ARM_BUILTIN_WAVG2HR 
ARM_BUILTIN_WAVG2B 
ARM_BUILTIN_WAVG2H 
ARM_BUILTIN_WACCB 
ARM_BUILTIN_WACCH 
ARM_BUILTIN_WACCW 
ARM_BUILTIN_WMACS 
ARM_BUILTIN_WMACSZ 
ARM_BUILTIN_WMACU 
ARM_BUILTIN_WMACUZ 
ARM_BUILTIN_WSADB 
ARM_BUILTIN_WSADBZ 
ARM_BUILTIN_WSADH 
ARM_BUILTIN_WSADHZ 
ARM_BUILTIN_WALIGN 
ARM_BUILTIN_TMIA 
ARM_BUILTIN_TMIAPH 
ARM_BUILTIN_TMIABB 
ARM_BUILTIN_TMIABT 
ARM_BUILTIN_TMIATB 
ARM_BUILTIN_TMIATT 
ARM_BUILTIN_TMOVMSKB 
ARM_BUILTIN_TMOVMSKH 
ARM_BUILTIN_TMOVMSKW 
ARM_BUILTIN_TBCSTB 
ARM_BUILTIN_TBCSTH 
ARM_BUILTIN_TBCSTW 
ARM_BUILTIN_WMADDS 
ARM_BUILTIN_WMADDU 
ARM_BUILTIN_WPACKHSS 
ARM_BUILTIN_WPACKWSS 
ARM_BUILTIN_WPACKDSS 
ARM_BUILTIN_WPACKHUS 
ARM_BUILTIN_WPACKWUS 
ARM_BUILTIN_WPACKDUS 
ARM_BUILTIN_WADDB 
ARM_BUILTIN_WADDH 
ARM_BUILTIN_WADDW 
ARM_BUILTIN_WADDSSB 
ARM_BUILTIN_WADDSSH 
ARM_BUILTIN_WADDSSW 
ARM_BUILTIN_WADDUSB 
ARM_BUILTIN_WADDUSH 
ARM_BUILTIN_WADDUSW 
ARM_BUILTIN_WSUBB 
ARM_BUILTIN_WSUBH 
ARM_BUILTIN_WSUBW 
ARM_BUILTIN_WSUBSSB 
ARM_BUILTIN_WSUBSSH 
ARM_BUILTIN_WSUBSSW 
ARM_BUILTIN_WSUBUSB 
ARM_BUILTIN_WSUBUSH 
ARM_BUILTIN_WSUBUSW 
ARM_BUILTIN_WAND 
ARM_BUILTIN_WANDN 
ARM_BUILTIN_WOR 
ARM_BUILTIN_WXOR 
ARM_BUILTIN_WCMPEQB 
ARM_BUILTIN_WCMPEQH 
ARM_BUILTIN_WCMPEQW 
ARM_BUILTIN_WCMPGTUB 
ARM_BUILTIN_WCMPGTUH 
ARM_BUILTIN_WCMPGTUW 
ARM_BUILTIN_WCMPGTSB 
ARM_BUILTIN_WCMPGTSH 
ARM_BUILTIN_WCMPGTSW 
ARM_BUILTIN_TEXTRMSB 
ARM_BUILTIN_TEXTRMSH 
ARM_BUILTIN_TEXTRMSW 
ARM_BUILTIN_TEXTRMUB 
ARM_BUILTIN_TEXTRMUH 
ARM_BUILTIN_TEXTRMUW 
ARM_BUILTIN_TINSRB 
ARM_BUILTIN_TINSRH 
ARM_BUILTIN_TINSRW 
ARM_BUILTIN_WMAXSW 
ARM_BUILTIN_WMAXSH 
ARM_BUILTIN_WMAXSB 
ARM_BUILTIN_WMAXUW 
ARM_BUILTIN_WMAXUH 
ARM_BUILTIN_WMAXUB 
ARM_BUILTIN_WMINSW 
ARM_BUILTIN_WMINSH 
ARM_BUILTIN_WMINSB 
ARM_BUILTIN_WMINUW 
ARM_BUILTIN_WMINUH 
ARM_BUILTIN_WMINUB 
ARM_BUILTIN_WMULUM 
ARM_BUILTIN_WMULSM 
ARM_BUILTIN_WMULUL 
ARM_BUILTIN_PSADBH 
ARM_BUILTIN_WSHUFH 
ARM_BUILTIN_WSLLH 
ARM_BUILTIN_WSLLW 
ARM_BUILTIN_WSLLD 
ARM_BUILTIN_WSRAH 
ARM_BUILTIN_WSRAW 
ARM_BUILTIN_WSRAD 
ARM_BUILTIN_WSRLH 
ARM_BUILTIN_WSRLW 
ARM_BUILTIN_WSRLD 
ARM_BUILTIN_WRORH 
ARM_BUILTIN_WRORW 
ARM_BUILTIN_WRORD 
ARM_BUILTIN_WSLLHI 
ARM_BUILTIN_WSLLWI 
ARM_BUILTIN_WSLLDI 
ARM_BUILTIN_WSRAHI 
ARM_BUILTIN_WSRAWI 
ARM_BUILTIN_WSRADI 
ARM_BUILTIN_WSRLHI 
ARM_BUILTIN_WSRLWI 
ARM_BUILTIN_WSRLDI 
ARM_BUILTIN_WRORHI 
ARM_BUILTIN_WRORWI 
ARM_BUILTIN_WRORDI 
ARM_BUILTIN_WUNPCKIHB 
ARM_BUILTIN_WUNPCKIHH 
ARM_BUILTIN_WUNPCKIHW 
ARM_BUILTIN_WUNPCKILB 
ARM_BUILTIN_WUNPCKILH 
ARM_BUILTIN_WUNPCKILW 
ARM_BUILTIN_WUNPCKEHSB 
ARM_BUILTIN_WUNPCKEHSH 
ARM_BUILTIN_WUNPCKEHSW 
ARM_BUILTIN_WUNPCKEHUB 
ARM_BUILTIN_WUNPCKEHUH 
ARM_BUILTIN_WUNPCKEHUW 
ARM_BUILTIN_WUNPCKELSB 
ARM_BUILTIN_WUNPCKELSH 
ARM_BUILTIN_WUNPCKELSW 
ARM_BUILTIN_WUNPCKELUB 
ARM_BUILTIN_WUNPCKELUH 
ARM_BUILTIN_WUNPCKELUW 
ARM_BUILTIN_MAX 
ARM_BUILTIN_GETWCX 
ARM_BUILTIN_SETWCX 
ARM_BUILTIN_WZERO 
ARM_BUILTIN_WAVG2BR 
ARM_BUILTIN_WAVG2HR 
ARM_BUILTIN_WAVG2B 
ARM_BUILTIN_WAVG2H 
ARM_BUILTIN_WACCB 
ARM_BUILTIN_WACCH 
ARM_BUILTIN_WACCW 
ARM_BUILTIN_WMACS 
ARM_BUILTIN_WMACSZ 
ARM_BUILTIN_WMACU 
ARM_BUILTIN_WMACUZ 
ARM_BUILTIN_WSADB 
ARM_BUILTIN_WSADBZ 
ARM_BUILTIN_WSADH 
ARM_BUILTIN_WSADHZ 
ARM_BUILTIN_WALIGN 
ARM_BUILTIN_TMIA 
ARM_BUILTIN_TMIAPH 
ARM_BUILTIN_TMIABB 
ARM_BUILTIN_TMIABT 
ARM_BUILTIN_TMIATB 
ARM_BUILTIN_TMIATT 
ARM_BUILTIN_TMOVMSKB 
ARM_BUILTIN_TMOVMSKH 
ARM_BUILTIN_TMOVMSKW 
ARM_BUILTIN_TBCSTB 
ARM_BUILTIN_TBCSTH 
ARM_BUILTIN_TBCSTW 
ARM_BUILTIN_WMADDS 
ARM_BUILTIN_WMADDU 
ARM_BUILTIN_WPACKHSS 
ARM_BUILTIN_WPACKWSS 
ARM_BUILTIN_WPACKDSS 
ARM_BUILTIN_WPACKHUS 
ARM_BUILTIN_WPACKWUS 
ARM_BUILTIN_WPACKDUS 
ARM_BUILTIN_WADDB 
ARM_BUILTIN_WADDH 
ARM_BUILTIN_WADDW 
ARM_BUILTIN_WADDSSB 
ARM_BUILTIN_WADDSSH 
ARM_BUILTIN_WADDSSW 
ARM_BUILTIN_WADDUSB 
ARM_BUILTIN_WADDUSH 
ARM_BUILTIN_WADDUSW 
ARM_BUILTIN_WSUBB 
ARM_BUILTIN_WSUBH 
ARM_BUILTIN_WSUBW 
ARM_BUILTIN_WSUBSSB 
ARM_BUILTIN_WSUBSSH 
ARM_BUILTIN_WSUBSSW 
ARM_BUILTIN_WSUBUSB 
ARM_BUILTIN_WSUBUSH 
ARM_BUILTIN_WSUBUSW 
ARM_BUILTIN_WAND 
ARM_BUILTIN_WANDN 
ARM_BUILTIN_WOR 
ARM_BUILTIN_WXOR 
ARM_BUILTIN_WCMPEQB 
ARM_BUILTIN_WCMPEQH 
ARM_BUILTIN_WCMPEQW 
ARM_BUILTIN_WCMPGTUB 
ARM_BUILTIN_WCMPGTUH 
ARM_BUILTIN_WCMPGTUW 
ARM_BUILTIN_WCMPGTSB 
ARM_BUILTIN_WCMPGTSH 
ARM_BUILTIN_WCMPGTSW 
ARM_BUILTIN_TEXTRMSB 
ARM_BUILTIN_TEXTRMSH 
ARM_BUILTIN_TEXTRMSW 
ARM_BUILTIN_TEXTRMUB 
ARM_BUILTIN_TEXTRMUH 
ARM_BUILTIN_TEXTRMUW 
ARM_BUILTIN_TINSRB 
ARM_BUILTIN_TINSRH 
ARM_BUILTIN_TINSRW 
ARM_BUILTIN_WMAXSW 
ARM_BUILTIN_WMAXSH 
ARM_BUILTIN_WMAXSB 
ARM_BUILTIN_WMAXUW 
ARM_BUILTIN_WMAXUH 
ARM_BUILTIN_WMAXUB 
ARM_BUILTIN_WMINSW 
ARM_BUILTIN_WMINSH 
ARM_BUILTIN_WMINSB 
ARM_BUILTIN_WMINUW 
ARM_BUILTIN_WMINUH 
ARM_BUILTIN_WMINUB 
ARM_BUILTIN_WMULUM 
ARM_BUILTIN_WMULSM 
ARM_BUILTIN_WMULUL 
ARM_BUILTIN_PSADBH 
ARM_BUILTIN_WSHUFH 
ARM_BUILTIN_WSLLH 
ARM_BUILTIN_WSLLW 
ARM_BUILTIN_WSLLD 
ARM_BUILTIN_WSRAH 
ARM_BUILTIN_WSRAW 
ARM_BUILTIN_WSRAD 
ARM_BUILTIN_WSRLH 
ARM_BUILTIN_WSRLW 
ARM_BUILTIN_WSRLD 
ARM_BUILTIN_WRORH 
ARM_BUILTIN_WRORW 
ARM_BUILTIN_WRORD 
ARM_BUILTIN_WSLLHI 
ARM_BUILTIN_WSLLWI 
ARM_BUILTIN_WSLLDI 
ARM_BUILTIN_WSRAHI 
ARM_BUILTIN_WSRAWI 
ARM_BUILTIN_WSRADI 
ARM_BUILTIN_WSRLHI 
ARM_BUILTIN_WSRLWI 
ARM_BUILTIN_WSRLDI 
ARM_BUILTIN_WRORHI 
ARM_BUILTIN_WRORWI 
ARM_BUILTIN_WRORDI 
ARM_BUILTIN_WUNPCKIHB 
ARM_BUILTIN_WUNPCKIHH 
ARM_BUILTIN_WUNPCKIHW 
ARM_BUILTIN_WUNPCKILB 
ARM_BUILTIN_WUNPCKILH 
ARM_BUILTIN_WUNPCKILW 
ARM_BUILTIN_WUNPCKEHSB 
ARM_BUILTIN_WUNPCKEHSH 
ARM_BUILTIN_WUNPCKEHSW 
ARM_BUILTIN_WUNPCKEHUB 
ARM_BUILTIN_WUNPCKEHUH 
ARM_BUILTIN_WUNPCKEHUW 
ARM_BUILTIN_WUNPCKELSB 
ARM_BUILTIN_WUNPCKELSH 
ARM_BUILTIN_WUNPCKELSW 
ARM_BUILTIN_WUNPCKELUB 
ARM_BUILTIN_WUNPCKELUH 
ARM_BUILTIN_WUNPCKELUW 
ARM_BUILTIN_THREAD_POINTER 
ARM_BUILTIN_MAX 

Definition at line 2636 of file arm.h.

enum arm_cond_code

Enumerator:
ARM_EQ 
ARM_NE 
ARM_CS 
ARM_CC 
ARM_MI 
ARM_PL 
ARM_VS 
ARM_VC 
ARM_HI 
ARM_LS 
ARM_GE 
ARM_LT 
ARM_GT 
ARM_LE 
ARM_AL 
ARM_NV 
ARM_EQ 
ARM_NE 
ARM_CS 
ARM_CC 
ARM_MI 
ARM_PL 
ARM_VS 
ARM_VC 
ARM_HI 
ARM_LS 
ARM_GE 
ARM_LT 
ARM_GT 
ARM_LE 
ARM_AL 
ARM_NV 
ARM_EQ 
ARM_NE 
ARM_CS 
ARM_CC 
ARM_MI 
ARM_PL 
ARM_VS 
ARM_VC 
ARM_HI 
ARM_LS 
ARM_GE 
ARM_LT 
ARM_GT 
ARM_LE 
ARM_AL 
ARM_NV 
ARM_EQ 
ARM_NE 
ARM_CS 
ARM_CC 
ARM_MI 
ARM_PL 
ARM_VS 
ARM_VC 
ARM_HI 
ARM_LS 
ARM_GE 
ARM_LT 
ARM_GT 
ARM_LE 
ARM_AL 
ARM_NV 

Definition at line 104 of file arm.h.

enum arm_fp_model

Enumerator:
ARM_FP_MODEL_UNKNOWN 
ARM_FP_MODEL_FPA 
ARM_FP_MODEL_MAVERICK 
ARM_FP_MODEL_VFP 
ARM_FP_MODEL_UNKNOWN 
ARM_FP_MODEL_FPA 
ARM_FP_MODEL_MAVERICK 
ARM_FP_MODEL_VFP 

Definition at line 433 of file arm.h.

enum float_abi_type

Enumerator:
ARM_FLOAT_ABI_SOFT 
ARM_FLOAT_ABI_SOFTFP 
ARM_FLOAT_ABI_HARD 
ARM_FLOAT_ABI_SOFT 
ARM_FLOAT_ABI_SOFTFP 
ARM_FLOAT_ABI_HARD 

Definition at line 473 of file arm.h.

enum fputype

Enumerator:
FPUTYPE_NONE 
FPUTYPE_FPA 
FPUTYPE_FPA_EMU2 
FPUTYPE_FPA_EMU3 
FPUTYPE_MAVERICK 
FPUTYPE_VFP 
FPUTYPE_NONE 
FPUTYPE_FPA 
FPUTYPE_FPA_EMU2 
FPUTYPE_FPA_EMU3 
FPUTYPE_MAVERICK 
FPUTYPE_VFP 

Definition at line 448 of file arm.h.

enum processor_type

Enumerator:
PROCESSOR_EV4 
PROCESSOR_EV5 
PROCESSOR_EV6 
PROCESSOR_I386 
PROCESSOR_I486 
PROCESSOR_PENTIUM 
PROCESSOR_PENTIUMPRO 
PROCESSOR_K6 
PROCESSOR_ATHLON 
PROCESSOR_PENTIUM4 
PROCESSOR_max 
PROCESSOR_M88100 
PROCESSOR_M88110 
PROCESSOR_M88000 
PROCESSOR_700 
PROCESSOR_7100 
PROCESSOR_7100LC 
PROCESSOR_7200 
PROCESSOR_8000 
PROCESSOR_RIOS1 
PROCESSOR_RIOS2 
PROCESSOR_RS64A 
PROCESSOR_MPCCORE 
PROCESSOR_PPC403 
PROCESSOR_PPC405 
PROCESSOR_PPC601 
PROCESSOR_PPC603 
PROCESSOR_PPC604 
PROCESSOR_PPC604e 
PROCESSOR_PPC620 
PROCESSOR_PPC630 
PROCESSOR_PPC750 
PROCESSOR_PPC7400 
PROCESSOR_PPC7450 
PROCESSOR_SH1 
PROCESSOR_SH2 
PROCESSOR_SH3 
PROCESSOR_SH3E 
PROCESSOR_SH4 
PROCESSOR_SH5 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_V7 
PROCESSOR_CYPRESS 
PROCESSOR_V8 
PROCESSOR_SUPERSPARC 
PROCESSOR_SPARCLITE 
PROCESSOR_F930 
PROCESSOR_F934 
PROCESSOR_HYPERSPARC 
PROCESSOR_SPARCLITE86X 
PROCESSOR_SPARCLET 
PROCESSOR_TSC701 
PROCESSOR_V9 
PROCESSOR_ULTRASPARC 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_EV4 
PROCESSOR_EV5 
PROCESSOR_EV6 
PROCESSOR_I386 
PROCESSOR_I486 
PROCESSOR_PENTIUM 
PROCESSOR_PENTIUMPRO 
PROCESSOR_K6 
PROCESSOR_ATHLON 
PROCESSOR_PENTIUM4 
PROCESSOR_max 
PROCESSOR_M88100 
PROCESSOR_M88110 
PROCESSOR_M88000 
PROCESSOR_700 
PROCESSOR_7100 
PROCESSOR_7100LC 
PROCESSOR_7200 
PROCESSOR_8000 
PROCESSOR_RIOS1 
PROCESSOR_RIOS2 
PROCESSOR_RS64A 
PROCESSOR_MPCCORE 
PROCESSOR_PPC403 
PROCESSOR_PPC405 
PROCESSOR_PPC601 
PROCESSOR_PPC603 
PROCESSOR_PPC604 
PROCESSOR_PPC604e 
PROCESSOR_PPC620 
PROCESSOR_PPC630 
PROCESSOR_PPC750 
PROCESSOR_PPC7400 
PROCESSOR_PPC7450 
PROCESSOR_SH1 
PROCESSOR_SH2 
PROCESSOR_SH3 
PROCESSOR_SH3E 
PROCESSOR_SH4 
PROCESSOR_SH5 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_V7 
PROCESSOR_CYPRESS 
PROCESSOR_V8 
PROCESSOR_SUPERSPARC 
PROCESSOR_SPARCLITE 
PROCESSOR_F930 
PROCESSOR_F934 
PROCESSOR_HYPERSPARC 
PROCESSOR_SPARCLITE86X 
PROCESSOR_SPARCLET 
PROCESSOR_TSC701 
PROCESSOR_V9 
PROCESSOR_ULTRASPARC 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_EV4 
PROCESSOR_EV5 
PROCESSOR_EV6 
PROCESSOR_MAX 
ARM_CORE 
PROCESSOR_I386 
PROCESSOR_I486 
PROCESSOR_PENTIUM 
PROCESSOR_PENTIUMPRO 
PROCESSOR_K6 
PROCESSOR_ATHLON 
PROCESSOR_PENTIUM4 
PROCESSOR_K8 
PROCESSOR_NOCONA 
PROCESSOR_max 
PROCESSOR_ITANIUM 
PROCESSOR_ITANIUM2 
PROCESSOR_max 
PROCESSOR_DEFAULT 
PROCESSOR_IQ2000 
PROCESSOR_IQ10 
PROCESSOR_DEFAULT 
PROCESSOR_4KC 
PROCESSOR_5KC 
PROCESSOR_20KC 
PROCESSOR_M4K 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4130 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R7000 
PROCESSOR_R8000 
PROCESSOR_R9000 
PROCESSOR_SB1 
PROCESSOR_SR71000 
PROCESSOR_700 
PROCESSOR_7100 
PROCESSOR_7100LC 
PROCESSOR_7200 
PROCESSOR_7300 
PROCESSOR_8000 
PROCESSOR_RIOS1 
PROCESSOR_RIOS2 
PROCESSOR_RS64A 
PROCESSOR_MPCCORE 
PROCESSOR_PPC403 
PROCESSOR_PPC405 
PROCESSOR_PPC440 
PROCESSOR_PPC601 
PROCESSOR_PPC603 
PROCESSOR_PPC604 
PROCESSOR_PPC604e 
PROCESSOR_PPC620 
PROCESSOR_PPC630 
PROCESSOR_PPC750 
PROCESSOR_PPC7400 
PROCESSOR_PPC7450 
PROCESSOR_PPC8540 
PROCESSOR_POWER4 
PROCESSOR_POWER5 
PROCESSOR_9672_G5 
PROCESSOR_9672_G6 
PROCESSOR_2064_Z900 
PROCESSOR_2084_Z990 
PROCESSOR_max 
PROCESSOR_SH1 
PROCESSOR_SH2 
PROCESSOR_SH2E 
PROCESSOR_SH2A 
PROCESSOR_SH3 
PROCESSOR_SH3E 
PROCESSOR_SH4 
PROCESSOR_SH4A 
PROCESSOR_SH5 
PROCESSOR_V7 
PROCESSOR_CYPRESS 
PROCESSOR_V8 
PROCESSOR_SUPERSPARC 
PROCESSOR_SPARCLITE 
PROCESSOR_F930 
PROCESSOR_F934 
PROCESSOR_HYPERSPARC 
PROCESSOR_SPARCLITE86X 
PROCESSOR_SPARCLET 
PROCESSOR_TSC701 
PROCESSOR_V9 
PROCESSOR_ULTRASPARC 
PROCESSOR_ULTRASPARC3 
PROCESSOR_EV4 
PROCESSOR_EV5 
PROCESSOR_EV6 
PROCESSOR_MAX 
ARM_CORE 
PROCESSOR_I386 
PROCESSOR_I486 
PROCESSOR_PENTIUM 
PROCESSOR_PENTIUMPRO 
PROCESSOR_K6 
PROCESSOR_ATHLON 
PROCESSOR_PENTIUM4 
PROCESSOR_K8 
PROCESSOR_NOCONA 
PROCESSOR_GENERIC32 
PROCESSOR_GENERIC64 
PROCESSOR_AMDFAM10 
PROCESSOR_max 
PROCESSOR_ITANIUM 
PROCESSOR_ITANIUM2 
PROCESSOR_max 
PROCESSOR_DEFAULT 
PROCESSOR_IQ2000 
PROCESSOR_IQ10 
PROCESSOR_R3000 
PROCESSOR_4KC 
PROCESSOR_4KP 
PROCESSOR_5KC 
PROCESSOR_5KF 
PROCESSOR_20KC 
PROCESSOR_24K 
PROCESSOR_24KX 
PROCESSOR_M4K 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4130 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R7000 
PROCESSOR_R8000 
PROCESSOR_R9000 
PROCESSOR_SB1 
PROCESSOR_SB1A 
PROCESSOR_SR71000 
PROCESSOR_MAX 
PROCESSOR_MN10300 
PROCESSOR_AM33 
PROCESSOR_AM33_2 
PROCESSOR_MS1_64_001 
PROCESSOR_MS1_16_002 
PROCESSOR_MS1_16_003 
PROCESSOR_MS2 
PROCESSOR_700 
PROCESSOR_7100 
PROCESSOR_7100LC 
PROCESSOR_7200 
PROCESSOR_7300 
PROCESSOR_8000 
PROCESSOR_RIOS1 
PROCESSOR_RIOS2 
PROCESSOR_RS64A 
PROCESSOR_MPCCORE 
PROCESSOR_PPC403 
PROCESSOR_PPC405 
PROCESSOR_PPC440 
PROCESSOR_PPC601 
PROCESSOR_PPC603 
PROCESSOR_PPC604 
PROCESSOR_PPC604e 
PROCESSOR_PPC620 
PROCESSOR_PPC630 
PROCESSOR_PPC750 
PROCESSOR_PPC7400 
PROCESSOR_PPC7450 
PROCESSOR_PPC8540 
PROCESSOR_POWER4 
PROCESSOR_POWER5 
PROCESSOR_9672_G5 
PROCESSOR_9672_G6 
PROCESSOR_2064_Z900 
PROCESSOR_2084_Z990 
PROCESSOR_2094_Z9_109 
PROCESSOR_max 
PROCESSOR_SH1 
PROCESSOR_SH2 
PROCESSOR_SH2E 
PROCESSOR_SH2A 
PROCESSOR_SH3 
PROCESSOR_SH3E 
PROCESSOR_SH4 
PROCESSOR_SH4A 
PROCESSOR_SH5 
PROCESSOR_V7 
PROCESSOR_CYPRESS 
PROCESSOR_V8 
PROCESSOR_SUPERSPARC 
PROCESSOR_SPARCLITE 
PROCESSOR_F930 
PROCESSOR_F934 
PROCESSOR_HYPERSPARC 
PROCESSOR_SPARCLITE86X 
PROCESSOR_SPARCLET 
PROCESSOR_TSC701 
PROCESSOR_V9 
PROCESSOR_ULTRASPARC 
PROCESSOR_ULTRASPARC3 
PROCESSOR_NIAGARA 

Definition at line 82 of file arm.h.

enum reg_class

Enumerator:
NO_REGS 
R2 
R0_1 
INDEX_REGS 
BASE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LR0_REGS 
GENERAL_REGS 
BP_REGS 
FC_REGS 
CR_REGS 
Q_REGS 
SPECIAL_REGS 
ACCUM0_REGS 
ACCUM_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R24_REG 
R25_REG 
R27_REG 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LPCOUNT_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPU_REGS 
LO_REGS 
STACK_REG 
BASE_REGS 
HI_REGS 
CC_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
POINTER_X_REGS 
POINTER_Y_REGS 
POINTER_Z_REGS 
STACK_REG 
BASE_POINTER_REGS 
POINTER_REGS 
ADDW_REGS 
SIMPLE_LD_REGS 
LD_REGS 
NO_LD_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0R1_REGS 
R2R3_REGS 
EXT_LOW_REGS 
EXT_REGS 
ADDR_REGS 
INDEX_REGS 
BK_REG 
SP_REG 
RC_REG 
COUNTER_REGS 
INT_REGS 
GENERAL_REGS 
DP_REG 
ST_REG 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
S_REGS 
INDEX_REGS 
SP_REGS 
A_REGS 
SI_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
REPEAT_REGS 
CR_REGS 
ACCUM_REGS 
OTHER_FLAG_REGS 
F0_REGS 
F1_REGS 
BR_FLAG_REGS 
FLAG_REGS 
EVEN_REGS 
GPR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
A0H_REG 
A0L_REG 
A0_REG 
A1H_REG 
ACCUM_HIGH_REGS 
A1L_REG 
ACCUM_LOW_REGS 
A1_REG 
ACCUM_REGS 
X_REG 
X_OR_ACCUM_LOW_REGS 
X_OR_ACCUM_REGS 
YH_REG 
YH_OR_ACCUM_HIGH_REGS 
X_OR_YH_REGS 
YL_REG 
YL_OR_ACCUM_LOW_REGS 
X_OR_YL_REGS 
X_OR_Y_REGS 
Y_REG 
ACCUM_OR_Y_REGS 
PH_REG 
X_OR_PH_REGS 
PL_REG 
PL_OR_ACCUM_LOW_REGS 
X_OR_PL_REGS 
YL_OR_PL_OR_ACCUM_LOW_REGS 
P_REG 
ACCUM_OR_P_REGS 
YL_OR_P_REGS 
ACCUM_LOW_OR_YL_OR_P_REGS 
Y_OR_P_REGS 
ACCUM_Y_OR_P_REGS 
NO_FRAME_Y_ADDR_REGS 
Y_ADDR_REGS 
ACCUM_LOW_OR_Y_ADDR_REGS 
ACCUM_OR_Y_ADDR_REGS 
X_OR_Y_ADDR_REGS 
Y_OR_Y_ADDR_REGS 
P_OR_Y_ADDR_REGS 
NON_HIGH_YBASE_ELIGIBLE_REGS 
YBASE_ELIGIBLE_REGS 
J_REG 
J_OR_DAU_16_BIT_REGS 
BMU_REGS 
NOHIGH_NON_ADDR_REGS 
NON_ADDR_REGS 
SLOW_MEM_LOAD_REGS 
NOHIGH_NON_YBASE_REGS 
NO_ACCUM_NON_YBASE_REGS 
NON_YBASE_REGS 
YBASE_VIRT_REGS 
ACCUM_LOW_OR_YBASE_REGS 
ACCUM_OR_YBASE_REGS 
X_OR_YBASE_REGS 
Y_OR_YBASE_REGS 
ACCUM_LOW_YL_PL_OR_YBASE_REGS 
P_OR_YBASE_REGS 
ACCUM_Y_P_OR_YBASE_REGS 
Y_ADDR_OR_YBASE_REGS 
YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS 
YBASE_OR_YBASE_ELIGIBLE_REGS 
NO_HIGH_ALL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MULTIPLY_32_REG 
MULTIPLY_64_REG 
LOW_REGS 
HIGH_REGS 
REAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
MAC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ADDR_REGS 
DATA_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AREG 
DREG 
CREG 
BREG 
SIREG 
DIREG 
AD_REGS 
Q_REGS 
NON_Q_REGS 
INDEX_REGS 
LEGACY_REGS 
GENERAL_REGS 
FP_TOP_REG 
FP_SECOND_REG 
FLOAT_REGS 
SSE_REGS 
MMX_REGS 
FP_TOP_SSE_REGS 
FP_SECOND_SSE_REGS 
FLOAT_SSE_REGS 
FLOAT_INT_REGS 
INT_SSE_REGS 
FLOAT_INT_SSE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GLOBAL_REGS 
LOCAL_REGS 
LOCAL_OR_GLOBAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
PR_REGS 
BR_REGS 
AR_M_REGS 
AR_I_REGS 
ADDL_REGS 
GR_REGS 
FR_REGS 
GR_AND_BR_REGS 
GR_AND_FR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CARRY_REG 
ACCUM_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
D_REGS 
X_REGS 
Y_REGS 
SP_REGS 
DA_REGS 
DB_REGS 
Z_REGS 
D8_REGS 
Q_REGS 
D_OR_X_REGS 
D_OR_Y_REGS 
D_OR_SP_REGS 
X_OR_Y_REGS 
A_REGS 
X_OR_SP_REGS 
Y_OR_SP_REGS 
X_OR_Y_OR_D_REGS 
A_OR_D_REGS 
A_OR_SP_REGS 
H_REGS 
S_REGS 
D_OR_S_REGS 
X_OR_S_REGS 
Y_OR_S_REGS 
SP_OR_S_REGS 
D_OR_X_OR_S_REGS 
D_OR_Y_OR_S_REGS 
D_OR_SP_OR_S_REGS 
A_OR_S_REGS 
D_OR_A_OR_S_REGS 
TMP_REGS 
D_OR_A_OR_TMP_REGS 
G_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDR_REGS 
FP_REGS 
GENERAL_REGS 
DATA_OR_FP_REGS 
ADDR_OR_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AP_REG 
XRF_REGS 
GENERAL_REGS 
AGRF_REGS 
XGRF_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ONLYR1_REGS 
LRW_REGS 
GENERAL_REGS 
C_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
REMAINDER_REG 
HIMULT_REG 
SYSTEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
SP_REGS 
DATA_OR_ADDRESS_REGS 
SP_OR_ADDRESS_REGS 
EXTENDED_REGS 
DATA_OR_EXTENDED_REGS 
ADDRESS_OR_EXTENDED_REGS 
SP_OR_EXTENDED_REGS 
SP_OR_ADDRESS_OR_EXTENDED_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REG0 
LONG_FLOAT_REG0 
FLOAT_REGS 
FP_REGS 
GEN_AND_FP_REGS 
FRAME_POINTER_REG 
STACK_POINTER_REG 
GEN_AND_MEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MUL_REGS 
GENERAL_REGS 
LOAD_FPU_REGS 
NO_LOAD_FPU_REGS 
FPU_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
OUT_REGS 
STD_REGS 
ARG_REGS 
SRC_REGS 
DST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R15_REGS 
BASE_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BASE_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALTIVEC_REGS 
VRSAVE_REGS 
NON_SPECIAL_REGS 
MQ_REGS 
LINK_REGS 
CTR_REGS 
LINK_OR_CTR_REGS 
SPECIAL_REGS 
SPEC_OR_GEN_REGS 
CR0_REGS 
CR_REGS 
NON_FLOAT_REGS 
XER_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ADDR_REGS 
GENERAL_REGS 
FP_REGS 
ADDR_FP_REGS 
GENERAL_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
PR_REGS 
T_REGS 
MAC_REGS 
FPUL_REGS 
SIBCALL_REGS 
GENERAL_REGS 
FP0_REGS 
FP_REGS 
DF_REGS 
FPSCR_REGS 
GENERAL_FP_REGS 
TARGET_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPCC_REGS 
I64_REGS 
GENERAL_REGS 
FP_REGS 
EXTRA_FP_REGS 
GENERAL_OR_FP_REGS 
GENERAL_OR_EXTRA_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R1_REGS 
TWO_REGS 
R2_REGS 
EIGHT_REGS 
R8_REGS 
ICALL_REGS 
GENERAL_REGS 
CARRY_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BR_REGS 
FP_REGS 
ACC_REG 
SP_REG 
RL_REGS 
GR_REGS 
AR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R2 
R0_1 
INDEX_REGS 
BASE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LR0_REGS 
GENERAL_REGS 
BP_REGS 
FC_REGS 
CR_REGS 
Q_REGS 
SPECIAL_REGS 
ACCUM0_REGS 
ACCUM_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R24_REG 
R25_REG 
R27_REG 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LPCOUNT_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPU_REGS 
LO_REGS 
STACK_REG 
BASE_REGS 
HI_REGS 
CC_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
POINTER_X_REGS 
POINTER_Y_REGS 
POINTER_Z_REGS 
STACK_REG 
BASE_POINTER_REGS 
POINTER_REGS 
ADDW_REGS 
SIMPLE_LD_REGS 
LD_REGS 
NO_LD_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0R1_REGS 
R2R3_REGS 
EXT_LOW_REGS 
EXT_REGS 
ADDR_REGS 
INDEX_REGS 
BK_REG 
SP_REG 
RC_REG 
COUNTER_REGS 
INT_REGS 
GENERAL_REGS 
DP_REG 
ST_REG 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
S_REGS 
INDEX_REGS 
SP_REGS 
A_REGS 
SI_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
REPEAT_REGS 
CR_REGS 
ACCUM_REGS 
OTHER_FLAG_REGS 
F0_REGS 
F1_REGS 
BR_FLAG_REGS 
FLAG_REGS 
EVEN_REGS 
GPR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
A0H_REG 
A0L_REG 
A0_REG 
A1H_REG 
ACCUM_HIGH_REGS 
A1L_REG 
ACCUM_LOW_REGS 
A1_REG 
ACCUM_REGS 
X_REG 
X_OR_ACCUM_LOW_REGS 
X_OR_ACCUM_REGS 
YH_REG 
YH_OR_ACCUM_HIGH_REGS 
X_OR_YH_REGS 
YL_REG 
YL_OR_ACCUM_LOW_REGS 
X_OR_YL_REGS 
X_OR_Y_REGS 
Y_REG 
ACCUM_OR_Y_REGS 
PH_REG 
X_OR_PH_REGS 
PL_REG 
PL_OR_ACCUM_LOW_REGS 
X_OR_PL_REGS 
YL_OR_PL_OR_ACCUM_LOW_REGS 
P_REG 
ACCUM_OR_P_REGS 
YL_OR_P_REGS 
ACCUM_LOW_OR_YL_OR_P_REGS 
Y_OR_P_REGS 
ACCUM_Y_OR_P_REGS 
NO_FRAME_Y_ADDR_REGS 
Y_ADDR_REGS 
ACCUM_LOW_OR_Y_ADDR_REGS 
ACCUM_OR_Y_ADDR_REGS 
X_OR_Y_ADDR_REGS 
Y_OR_Y_ADDR_REGS 
P_OR_Y_ADDR_REGS 
NON_HIGH_YBASE_ELIGIBLE_REGS 
YBASE_ELIGIBLE_REGS 
J_REG 
J_OR_DAU_16_BIT_REGS 
BMU_REGS 
NOHIGH_NON_ADDR_REGS 
NON_ADDR_REGS 
SLOW_MEM_LOAD_REGS 
NOHIGH_NON_YBASE_REGS 
NO_ACCUM_NON_YBASE_REGS 
NON_YBASE_REGS 
YBASE_VIRT_REGS 
ACCUM_LOW_OR_YBASE_REGS 
ACCUM_OR_YBASE_REGS 
X_OR_YBASE_REGS 
Y_OR_YBASE_REGS 
ACCUM_LOW_YL_PL_OR_YBASE_REGS 
P_OR_YBASE_REGS 
ACCUM_Y_P_OR_YBASE_REGS 
Y_ADDR_OR_YBASE_REGS 
YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS 
YBASE_OR_YBASE_ELIGIBLE_REGS 
NO_HIGH_ALL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MULTIPLY_32_REG 
MULTIPLY_64_REG 
LOW_REGS 
HIGH_REGS 
REAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
MAC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ADDR_REGS 
DATA_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AREG 
DREG 
CREG 
BREG 
SIREG 
DIREG 
AD_REGS 
Q_REGS 
NON_Q_REGS 
INDEX_REGS 
LEGACY_REGS 
GENERAL_REGS 
FP_TOP_REG 
FP_SECOND_REG 
FLOAT_REGS 
SSE_REGS 
MMX_REGS 
FP_TOP_SSE_REGS 
FP_SECOND_SSE_REGS 
FLOAT_SSE_REGS 
FLOAT_INT_REGS 
INT_SSE_REGS 
FLOAT_INT_SSE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GLOBAL_REGS 
LOCAL_REGS 
LOCAL_OR_GLOBAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
PR_REGS 
BR_REGS 
AR_M_REGS 
AR_I_REGS 
ADDL_REGS 
GR_REGS 
FR_REGS 
GR_AND_BR_REGS 
GR_AND_FR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CARRY_REG 
ACCUM_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
D_REGS 
X_REGS 
Y_REGS 
SP_REGS 
DA_REGS 
DB_REGS 
Z_REGS 
D8_REGS 
Q_REGS 
D_OR_X_REGS 
D_OR_Y_REGS 
D_OR_SP_REGS 
X_OR_Y_REGS 
A_REGS 
X_OR_SP_REGS 
Y_OR_SP_REGS 
X_OR_Y_OR_D_REGS 
A_OR_D_REGS 
A_OR_SP_REGS 
H_REGS 
S_REGS 
D_OR_S_REGS 
X_OR_S_REGS 
Y_OR_S_REGS 
SP_OR_S_REGS 
D_OR_X_OR_S_REGS 
D_OR_Y_OR_S_REGS 
D_OR_SP_OR_S_REGS 
A_OR_S_REGS 
D_OR_A_OR_S_REGS 
TMP_REGS 
D_OR_A_OR_TMP_REGS 
G_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDR_REGS 
FP_REGS 
GENERAL_REGS 
DATA_OR_FP_REGS 
ADDR_OR_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AP_REG 
XRF_REGS 
GENERAL_REGS 
AGRF_REGS 
XGRF_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ONLYR1_REGS 
LRW_REGS 
GENERAL_REGS 
C_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
REMAINDER_REG 
HIMULT_REG 
SYSTEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
SP_REGS 
DATA_OR_ADDRESS_REGS 
SP_OR_ADDRESS_REGS 
EXTENDED_REGS 
DATA_OR_EXTENDED_REGS 
ADDRESS_OR_EXTENDED_REGS 
SP_OR_EXTENDED_REGS 
SP_OR_ADDRESS_OR_EXTENDED_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REG0 
LONG_FLOAT_REG0 
FLOAT_REGS 
FP_REGS 
GEN_AND_FP_REGS 
FRAME_POINTER_REG 
STACK_POINTER_REG 
GEN_AND_MEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MUL_REGS 
GENERAL_REGS 
LOAD_FPU_REGS 
NO_LOAD_FPU_REGS 
FPU_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
OUT_REGS 
STD_REGS 
ARG_REGS 
SRC_REGS 
DST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R15_REGS 
BASE_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BASE_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALTIVEC_REGS 
VRSAVE_REGS 
NON_SPECIAL_REGS 
MQ_REGS 
LINK_REGS 
CTR_REGS 
LINK_OR_CTR_REGS 
SPECIAL_REGS 
SPEC_OR_GEN_REGS 
CR0_REGS 
CR_REGS 
NON_FLOAT_REGS 
XER_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ADDR_REGS 
GENERAL_REGS 
FP_REGS 
ADDR_FP_REGS 
GENERAL_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
PR_REGS 
T_REGS 
MAC_REGS 
FPUL_REGS 
SIBCALL_REGS 
GENERAL_REGS 
FP0_REGS 
FP_REGS 
DF_REGS 
FPSCR_REGS 
GENERAL_FP_REGS 
TARGET_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPCC_REGS 
I64_REGS 
GENERAL_REGS 
FP_REGS 
EXTRA_FP_REGS 
GENERAL_OR_FP_REGS 
GENERAL_OR_EXTRA_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R1_REGS 
TWO_REGS 
R2_REGS 
EIGHT_REGS 
R8_REGS 
ICALL_REGS 
GENERAL_REGS 
CARRY_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BR_REGS 
FP_REGS 
ACC_REG 
SP_REG 
RL_REGS 
GR_REGS 
AR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
R24_REG 
R25_REG 
R27_REG 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LPCOUNT_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPA_REGS 
CIRRUS_REGS 
VFP_REGS 
IWMMXT_GR_REGS 
IWMMXT_REGS 
LO_REGS 
STACK_REG 
BASE_REGS 
HI_REGS 
CC_REG 
VFPCC_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
POINTER_X_REGS 
POINTER_Y_REGS 
POINTER_Z_REGS 
STACK_REG 
BASE_POINTER_REGS 
POINTER_REGS 
ADDW_REGS 
SIMPLE_LD_REGS 
LD_REGS 
NO_LD_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
IREGS 
BREGS 
LREGS 
MREGS 
CIRCREGS 
DAGREGS 
EVEN_AREGS 
ODD_AREGS 
AREGS 
CCREGS 
EVEN_DREGS 
ODD_DREGS 
DREGS 
PREGS_CLOBBERED 
PREGS 
DPREGS 
MOST_REGS 
PROLOGUE_REGS 
NON_A_CC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0R1_REGS 
R2R3_REGS 
EXT_LOW_REGS 
EXT_REGS 
ADDR_REGS 
INDEX_REGS 
BK_REG 
SP_REG 
RC_REG 
COUNTER_REGS 
INT_REGS 
GENERAL_REGS 
DP_REG 
ST_REG 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MULTIPLY_32_REG 
MULTIPLY_64_REG 
LOW_REGS 
HIGH_REGS 
REAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ICC_REGS 
FCC_REGS 
CC_REGS 
ICR_REGS 
FCR_REGS 
CR_REGS 
LCR_REG 
LR_REG 
GR8_REGS 
GR9_REGS 
GR89_REGS 
FDPIC_REGS 
FDPIC_FPTR_REGS 
FDPIC_CALL_REGS 
SPR_REGS 
QUAD_ACC_REGS 
EVEN_ACC_REGS 
ACC_REGS 
ACCG_REGS 
QUAD_FPR_REGS 
FEVEN_REGS 
FPR_REGS 
QUAD_REGS 
EVEN_REGS 
GPR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
COUNTER_REGS 
SOURCE_REGS 
DESTINATION_REGS 
GENERAL_REGS 
MAC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AREG 
DREG 
CREG 
BREG 
SIREG 
DIREG 
AD_REGS 
Q_REGS 
NON_Q_REGS 
INDEX_REGS 
LEGACY_REGS 
GENERAL_REGS 
FP_TOP_REG 
FP_SECOND_REG 
FLOAT_REGS 
SSE_REGS 
MMX_REGS 
FP_TOP_SSE_REGS 
FP_SECOND_SSE_REGS 
FLOAT_SSE_REGS 
FLOAT_INT_REGS 
INT_SSE_REGS 
FLOAT_INT_SSE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
PR_REGS 
BR_REGS 
AR_M_REGS 
AR_I_REGS 
ADDL_REGS 
GR_REGS 
FR_REGS 
GR_AND_BR_REGS 
GR_AND_FR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DPH_REGS 
DPL_REGS 
DP_REGS 
SP_REGS 
IPH_REGS 
IPL_REGS 
IP_REGS 
DP_SP_REGS 
PTR_REGS 
NONPTR_REGS 
NONSP_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CARRY_REG 
ACCUM_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
D_REGS 
X_REGS 
Y_REGS 
SP_REGS 
DA_REGS 
DB_REGS 
Z_REGS 
D8_REGS 
Q_REGS 
D_OR_X_REGS 
D_OR_Y_REGS 
D_OR_SP_REGS 
X_OR_Y_REGS 
A_REGS 
X_OR_SP_REGS 
Y_OR_SP_REGS 
X_OR_Y_OR_D_REGS 
A_OR_D_REGS 
A_OR_SP_REGS 
H_REGS 
S_REGS 
D_OR_S_REGS 
X_OR_S_REGS 
Y_OR_S_REGS 
Z_OR_S_REGS 
SP_OR_S_REGS 
D_OR_X_OR_S_REGS 
D_OR_Y_OR_S_REGS 
D_OR_SP_OR_S_REGS 
A_OR_S_REGS 
D_OR_A_OR_S_REGS 
TMP_REGS 
D_OR_A_OR_TMP_REGS 
G_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDR_REGS 
FP_REGS 
GENERAL_REGS 
DATA_OR_FP_REGS 
ADDR_OR_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ONLYR1_REGS 
LRW_REGS 
GENERAL_REGS 
C_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
PIC_FN_ADDR_REG 
LEA_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
REMAINDER_REG 
HIMULT_REG 
SYSTEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
SP_REGS 
DATA_OR_ADDRESS_REGS 
SP_OR_ADDRESS_REGS 
EXTENDED_REGS 
DATA_OR_EXTENDED_REGS 
ADDRESS_OR_EXTENDED_REGS 
SP_OR_EXTENDED_REGS 
SP_OR_ADDRESS_OR_EXTENDED_REGS 
FP_REGS 
FP_ACC_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REG0 
LONG_FLOAT_REG0 
FLOAT_REGS 
LONG_REGS 
FP_REGS 
GEN_AND_FP_REGS 
FRAME_POINTER_REG 
STACK_POINTER_REG 
GEN_AND_MEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MUL_REGS 
GENERAL_REGS 
LOAD_FPU_REGS 
NO_LOAD_FPU_REGS 
FPU_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BASE_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALTIVEC_REGS 
VRSAVE_REGS 
VSCR_REGS 
SPE_ACC_REGS 
SPEFSCR_REGS 
NON_SPECIAL_REGS 
MQ_REGS 
LINK_REGS 
CTR_REGS 
LINK_OR_CTR_REGS 
SPECIAL_REGS 
SPEC_OR_GEN_REGS 
CR0_REGS 
CR_REGS 
NON_FLOAT_REGS 
XER_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CC_REGS 
ADDR_REGS 
GENERAL_REGS 
ACCESS_REGS 
ADDR_CC_REGS 
GENERAL_CC_REGS 
FP_REGS 
ADDR_FP_REGS 
GENERAL_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
PR_REGS 
T_REGS 
MAC_REGS 
FPUL_REGS 
SIBCALL_REGS 
GENERAL_REGS 
FP0_REGS 
FP_REGS 
DF_HI_REGS 
DF_REGS 
FPSCR_REGS 
GENERAL_FP_REGS 
TARGET_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPCC_REGS 
I64_REGS 
GENERAL_REGS 
FP_REGS 
EXTRA_FP_REGS 
GENERAL_OR_FP_REGS 
GENERAL_OR_EXTRA_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R1_REGS 
TWO_REGS 
R2_REGS 
EIGHT_REGS 
R8_REGS 
ICALL_REGS 
GENERAL_REGS 
CARRY_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BR_REGS 
FP_REGS 
ACC_REG 
SP_REG 
RL_REGS 
GR_REGS 
AR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
R24_REG 
R25_REG 
R27_REG 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LPCOUNT_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPA_REGS 
CIRRUS_REGS 
VFP_REGS 
IWMMXT_GR_REGS 
IWMMXT_REGS 
LO_REGS 
STACK_REG 
BASE_REGS 
HI_REGS 
CC_REG 
VFPCC_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
POINTER_X_REGS 
POINTER_Y_REGS 
POINTER_Z_REGS 
STACK_REG 
BASE_POINTER_REGS 
POINTER_REGS 
ADDW_REGS 
SIMPLE_LD_REGS 
LD_REGS 
NO_LD_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
IREGS 
BREGS 
LREGS 
MREGS 
CIRCREGS 
DAGREGS 
EVEN_AREGS 
ODD_AREGS 
AREGS 
CCREGS 
EVEN_DREGS 
ODD_DREGS 
DREGS 
FDPIC_REGS 
FDPIC_FPTR_REGS 
PREGS_CLOBBERED 
PREGS 
IPREGS 
DPREGS 
MOST_REGS 
LT_REGS 
LC_REGS 
LB_REGS 
PROLOGUE_REGS 
NON_A_CC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0R1_REGS 
R2R3_REGS 
EXT_LOW_REGS 
EXT_REGS 
ADDR_REGS 
INDEX_REGS 
BK_REG 
SP_REG 
RC_REG 
COUNTER_REGS 
INT_REGS 
GENERAL_REGS 
DP_REG 
ST_REG 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MOF_REGS 
CC0_REGS 
SPECIAL_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LO_REGS 
HI_REGS 
HILO_REGS 
NOSP_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MULTIPLY_32_REG 
MULTIPLY_64_REG 
LOW_REGS 
HIGH_REGS 
REAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ICC_REGS 
FCC_REGS 
CC_REGS 
ICR_REGS 
FCR_REGS 
CR_REGS 
LCR_REG 
LR_REG 
GR8_REGS 
GR9_REGS 
GR89_REGS 
FDPIC_REGS 
FDPIC_FPTR_REGS 
FDPIC_CALL_REGS 
SPR_REGS 
QUAD_ACC_REGS 
EVEN_ACC_REGS 
ACC_REGS 
ACCG_REGS 
QUAD_FPR_REGS 
FEVEN_REGS 
FPR_REGS 
QUAD_REGS 
EVEN_REGS 
GPR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
COUNTER_REGS 
SOURCE_REGS 
DESTINATION_REGS 
GENERAL_REGS 
MAC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AREG 
DREG 
CREG 
BREG 
SIREG 
DIREG 
AD_REGS 
Q_REGS 
NON_Q_REGS 
INDEX_REGS 
LEGACY_REGS 
GENERAL_REGS 
FP_TOP_REG 
FP_SECOND_REG 
FLOAT_REGS 
SSE_REGS 
MMX_REGS 
FP_TOP_SSE_REGS 
FP_SECOND_SSE_REGS 
FLOAT_SSE_REGS 
FLOAT_INT_REGS 
INT_SSE_REGS 
FLOAT_INT_SSE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
PR_REGS 
BR_REGS 
AR_M_REGS 
AR_I_REGS 
ADDL_REGS 
GR_REGS 
FP_REGS 
FR_REGS 
GR_AND_BR_REGS 
GR_AND_FR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
SP_REGS 
FB_REGS 
SB_REGS 
CR_REGS 
R0_REGS 
R1_REGS 
R2_REGS 
R3_REGS 
R02_REGS 
HL_REGS 
QI_REGS 
R23_REGS 
R03_REGS 
DI_REGS 
A0_REGS 
A1_REGS 
A_REGS 
AD_REGS 
PS_REGS 
SI_REGS 
HI_REGS 
RA_REGS 
GENERAL_REGS 
FLG_REGS 
HC_REGS 
MEM_REGS 
R02_A_MEM_REGS 
A_HL_MEM_REGS 
R1_R3_A_MEM_REGS 
R03_MEM_REGS 
A_HI_MEM_REGS 
A_AD_CR_MEM_SI_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CARRY_REG 
ACCUM_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
D_REGS 
X_REGS 
Y_REGS 
SP_REGS 
DA_REGS 
DB_REGS 
Z_REGS 
D8_REGS 
Q_REGS 
D_OR_X_REGS 
D_OR_Y_REGS 
D_OR_SP_REGS 
X_OR_Y_REGS 
A_REGS 
X_OR_SP_REGS 
Y_OR_SP_REGS 
X_OR_Y_OR_D_REGS 
A_OR_D_REGS 
A_OR_SP_REGS 
H_REGS 
S_REGS 
D_OR_S_REGS 
X_OR_S_REGS 
Y_OR_S_REGS 
Z_OR_S_REGS 
SP_OR_S_REGS 
D_OR_X_OR_S_REGS 
D_OR_Y_OR_S_REGS 
D_OR_SP_OR_S_REGS 
A_OR_S_REGS 
D_OR_A_OR_S_REGS 
TMP_REGS 
D_OR_A_OR_TMP_REGS 
G_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDR_REGS 
FP_REGS 
GENERAL_REGS 
DATA_OR_FP_REGS 
ADDR_OR_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ONLYR1_REGS 
LRW_REGS 
GENERAL_REGS 
C_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
PIC_FN_ADDR_REG 
V1_REG 
LEA_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
DSP_ACC_REGS 
ACC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
REMAINDER_REG 
HIMULT_REG 
SYSTEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
SP_REGS 
DATA_OR_ADDRESS_REGS 
SP_OR_ADDRESS_REGS 
EXTENDED_REGS 
DATA_OR_EXTENDED_REGS 
ADDRESS_OR_EXTENDED_REGS 
SP_OR_EXTENDED_REGS 
SP_OR_ADDRESS_OR_EXTENDED_REGS 
FP_REGS 
FP_ACC_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MUL_REGS 
GENERAL_REGS 
LOAD_FPU_REGS 
NO_LOAD_FPU_REGS 
FPU_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BASE_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALTIVEC_REGS 
VRSAVE_REGS 
VSCR_REGS 
SPE_ACC_REGS 
SPEFSCR_REGS 
NON_SPECIAL_REGS 
MQ_REGS 
LINK_REGS 
CTR_REGS 
LINK_OR_CTR_REGS 
SPECIAL_REGS 
SPEC_OR_GEN_REGS 
CR0_REGS 
CR_REGS 
NON_FLOAT_REGS 
XER_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CC_REGS 
ADDR_REGS 
GENERAL_REGS 
ACCESS_REGS 
ADDR_CC_REGS 
GENERAL_CC_REGS 
FP_REGS 
ADDR_FP_REGS 
GENERAL_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
G16_REGS 
G32_REGS 
T32_REGS 
HI_REG 
LO_REG 
CE_REGS 
CN_REG 
LC_REG 
SC_REG 
SP_REGS 
CR_REGS 
CP1_REGS 
CP2_REGS 
CP3_REGS 
CPA_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
PR_REGS 
T_REGS 
MAC_REGS 
FPUL_REGS 
SIBCALL_REGS 
GENERAL_REGS 
FP0_REGS 
FP_REGS 
DF_HI_REGS 
DF_REGS 
FPSCR_REGS 
GENERAL_FP_REGS 
GENERAL_DF_REGS 
TARGET_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPCC_REGS 
I64_REGS 
GENERAL_REGS 
FP_REGS 
EXTRA_FP_REGS 
GENERAL_OR_FP_REGS 
GENERAL_OR_EXTRA_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R1_REGS 
TWO_REGS 
R2_REGS 
EIGHT_REGS 
R8_REGS 
ICALL_REGS 
GENERAL_REGS 
CARRY_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BR_REGS 
FP_REGS 
ACC_REG 
SP_REG 
RL_REGS 
GR_REGS 
AR_REGS 
ALL_REGS 
LIM_REG_CLASSES 

Definition at line 1129 of file arm.h.

enum target_cpus

Enumerator:
ARM_CORE 
ARM_CORE 

Definition at line 92 of file arm.h.

Function Documentation

GTY ( ()   )  [read, write]

Definition at line 94 of file hashtab.h.

Variable Documentation

enum arm_abi_type arm_abi

Definition at line 354 of file arm.c.

int arm_arch3m

Definition at line 426 of file arm.c.

int arm_arch4

Definition at line 241 of file arm.c.

int arm_arch4t

Definition at line 432 of file arm.c.

int arm_arch5

Definition at line 244 of file arm.c.

int arm_arch5e

Definition at line 247 of file arm.c.

int arm_arch6

Definition at line 441 of file arm.c.

int arm_arch_cirrus

Definition at line 450 of file arm.c.

int arm_arch_iwmmxt

Definition at line 453 of file arm.c.

char arm_arch_name[]

Definition at line 578 of file arm.c.

int arm_arch_xscale

Definition at line 456 of file arm.c.

int arm_ccfsm_state

Definition at line 285 of file arm.c.

int arm_cpp_interwork

Definition at line 472 of file arm.c.

arm_cc arm_current_cc

Definition at line 286 of file arm.c.

enum float_abi_type arm_float_abi

Definition at line 351 of file arm.c.

enum arm_fp_model arm_fp_model

Definition at line 342 of file arm.c.

enum fputype arm_fpu_arch

Definition at line 199 of file arm.c.

enum fputype arm_fpu_tune

Definition at line 348 of file arm.c.

int arm_is_6_or_7

Definition at line 259 of file arm.c.

Referenced by arm_override_options().

int arm_is_strong

Definition at line 253 of file arm.c.

Referenced by arm_override_options(), and use_return_insn().

int arm_ld_sched

Definition at line 250 of file arm.c.

int arm_pic_register

Definition at line 271 of file arm.c.

const char* arm_pic_register_string

Definition at line 270 of file arm.c.

Referenced by arm_override_options().

struct arm_cpu_select arm_select[]

Definition at line 384 of file arm.c.

arm_stack_offsets

Definition at line 1675 of file arm.h.

Referenced by arm_compute_initial_elimination_offset(), arm_expand_prologue(), arm_get_frame_offsets(), arm_output_epilogue(), arm_output_function_epilogue(), arm_set_return_address(), output_return_instruction(), thumb_compute_initial_elimination_offset(), thumb_expand_epilogue(), thumb_expand_prologue(), thumb_set_return_address(), and use_return_insn().

int arm_structure_size_boundary

Definition at line 209 of file arm.c.

int arm_target_label

Definition at line 288 of file arm.c.

enum processor_type arm_tune

Definition at line 339 of file arm.c.

int arm_tune_xscale

Definition at line 459 of file arm.c.

machine_function

Definition at line 1703 of file arm.h.

int making_const_table

Definition at line 189 of file arm.c.

rtx pool_vector_label

int return_used_this_function

Definition at line 275 of file arm.c.

const char* structure_size_string

Definition at line 208 of file arm.c.

Referenced by arm_override_options().

const char* target_abi_name

Definition at line 369 of file arm.c.

Referenced by arm_override_options().

int target_flags

Definition at line 35 of file gensupport.c.

const char* target_float_abi_name

Definition at line 363 of file arm.c.

Referenced by arm_handle_option(), and arm_override_options().

const char* target_float_switch

Definition at line 366 of file arm.c.

Referenced by arm_override_options().

const char* target_fpe_name

Definition at line 360 of file arm.c.

Referenced by arm_override_options().

const char* target_fpu_name

Definition at line 357 of file arm.c.

Referenced by arm_override_options().

int thumb_code

Definition at line 262 of file arm.c.

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