osprey-gcc/gcc/config/alpha/alpha.h File Reference

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Data Types

type  alpha_compare

Defines

#define TARGET_CPU_CPP_BUILTINS()
#define SUBTARGET_LANGUAGE_CPP_BUILTINS()
#define CPP_SPEC   "%(cpp_subtarget)"
#define CPP_SUBTARGET_SPEC   ""
#define WORD_SWITCH_TAKES_ARG(STR)   (!strcmp (STR, "rpath") || DEFAULT_WORD_SWITCH_TAKES_ARG(STR))
#define TARGET_VERSION
#define MASK_FP   (1 << 0)
#define TARGET_FP   ((target_flags & MASK_FP) != 0)
#define MASK_FPREGS   (1 << 1)
#define TARGET_FPREGS   ((target_flags & MASK_FPREGS) != 0)
#define MASK_GAS   (1 << 2)
#define TARGET_GAS   ((target_flags & MASK_GAS) != 0)
#define MASK_IEEE_CONFORMANT   (1 << 3)
#define TARGET_IEEE_CONFORMANT   ((target_flags & MASK_IEEE_CONFORMANT) != 0)
#define MASK_IEEE   (1 << 4)
#define TARGET_IEEE   ((target_flags & MASK_IEEE) != 0)
#define MASK_IEEE_WITH_INEXACT   (1 << 5)
#define TARGET_IEEE_WITH_INEXACT   ((target_flags & MASK_IEEE_WITH_INEXACT) != 0)
#define MASK_BUILD_CONSTANTS   (1 << 6)
#define TARGET_BUILD_CONSTANTS   ((target_flags & MASK_BUILD_CONSTANTS) != 0)
#define MASK_FLOAT_VAX   (1 << 7)
#define TARGET_FLOAT_VAX   ((target_flags & MASK_FLOAT_VAX) != 0)
#define MASK_BWX   (1 << 8)
#define TARGET_BWX   ((target_flags & MASK_BWX) != 0)
#define MASK_MAX   (1 << 9)
#define TARGET_MAX   ((target_flags & MASK_MAX) != 0)
#define MASK_FIX   (1 << 10)
#define TARGET_FIX   ((target_flags & MASK_FIX) != 0)
#define MASK_CIX   (1 << 11)
#define TARGET_CIX   ((target_flags & MASK_CIX) != 0)
#define MASK_EXPLICIT_RELOCS   (1 << 12)
#define TARGET_EXPLICIT_RELOCS   ((target_flags & MASK_EXPLICIT_RELOCS) != 0)
#define MASK_SMALL_DATA   (1 << 13)
#define TARGET_SMALL_DATA   ((target_flags & MASK_SMALL_DATA) != 0)
#define MASK_TLS_KERNEL   (1 << 14)
#define TARGET_TLS_KERNEL   ((target_flags & MASK_TLS_KERNEL) != 0)
#define MASK_SMALL_TEXT   (1 << 15)
#define TARGET_SMALL_TEXT   ((target_flags & MASK_SMALL_TEXT) != 0)
#define MASK_LONG_DOUBLE_128   (1 << 16)
#define TARGET_LONG_DOUBLE_128   ((target_flags & MASK_LONG_DOUBLE_128) != 0)
#define MASK_CPU_EV5   (1 << 28)
#define TARGET_CPU_EV5   ((target_flags & MASK_CPU_EV5) != 0)
#define MASK_CPU_EV6   (1 << 29)
#define TARGET_CPU_EV6   ((target_flags & MASK_CPU_EV6) != 0)
#define MASK_SUPPORT_ARCH   (1 << 30)
#define TARGET_SUPPORT_ARCH   ((target_flags & MASK_SUPPORT_ARCH) != 0)
#define TARGET_ABI_WINDOWS_NT   0
#define TARGET_ABI_OPEN_VMS   0
#define TARGET_ABI_UNICOSMK   0
#define TARGET_ABI_OSF
#define TARGET_AS_CAN_SUBTRACT_LABELS   TARGET_GAS
#define TARGET_AS_SLASH_BEFORE_SUFFIX   TARGET_GAS
#define TARGET_CAN_FAULT_IN_PROLOGUE   0
#define TARGET_HAS_XFLOATING_LIBS   TARGET_LONG_DOUBLE_128
#define TARGET_PROFILING_NEEDS_GP   0
#define TARGET_LD_BUGGY_LDGP   0
#define TARGET_FIXUP_EV5_PREFETCH   0
#define HAVE_AS_TLS   0
#define TARGET_SWITCHES
#define TARGET_DEFAULT   MASK_FP|MASK_FPREGS
#define TARGET_CPU_DEFAULT   0
#define TARGET_DEFAULT_EXPLICIT_RELOCS   0
#define TARGET_OPTIONS
#define OPTION_DEFAULT_SPECS
#define EXTRA_SPECS
#define OVERRIDE_OPTIONS   override_options ()
#define CONDITIONAL_REGISTER_USAGE
#define CAN_DEBUG_WITHOUT_FP
#define INT_TYPE_SIZE   32
#define LONG_LONG_TYPE_SIZE   64
#define TARGET_FLOAT_FORMAT   (TARGET_FLOAT_VAX ? VAX_FLOAT_FORMAT : IEEE_FLOAT_FORMAT)
#define FLOAT_TYPE_SIZE   32
#define DOUBLE_TYPE_SIZE   64
#define LONG_DOUBLE_TYPE_SIZE   (TARGET_LONG_DOUBLE_128 ? 128 : 64)
#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE   64
#define WIDEST_HARDWARE_FP_SIZE   64
#define WCHAR_TYPE   "unsigned int"
#define WCHAR_TYPE_SIZE   32
#define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)
#define BITS_BIG_ENDIAN   0
#define BYTES_BIG_ENDIAN   0
#define WORDS_BIG_ENDIAN   0
#define UNITS_PER_WORD   8
#define POINTER_SIZE   64
#define PARM_BOUNDARY   64
#define STACK_BOUNDARY   128
#define FUNCTION_BOUNDARY   32
#define EMPTY_FIELD_BOUNDARY   64
#define STRUCTURE_SIZE_BOUNDARY   8
#define PCC_BITFIELD_TYPE_MATTERS   1
#define BIGGEST_ALIGNMENT   128
#define MINIMUM_ATOMIC_ALIGNMENT   ((unsigned int) (TARGET_BWX ? 8 : 32))
#define STRICT_ALIGNMENT   1
#define SLOW_UNALIGNED_ACCESS(MODE, ALIGN)   1
#define UNITS_PER_SIMD_WORD   UNITS_PER_WORD
#define FIRST_PSEUDO_REGISTER   64
#define FIXED_REGISTERS
#define CALL_USED_REGISTERS
#define REG_ALLOC_ORDER
#define HARD_REGNO_NREGS(REGNO, MODE)   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
#define HARD_REGNO_MODE_OK(REGNO, MODE)
#define MODES_TIEABLE_P(MODE1, MODE2)
#define STACK_POINTER_REGNUM   30
#define HARD_FRAME_POINTER_REGNUM   15
#define FRAME_POINTER_REQUIRED   0
#define ARG_POINTER_REGNUM   31
#define FRAME_POINTER_REGNUM   63
#define STATIC_CHAIN_REGNUM   1
#define PIC_OFFSET_TABLE_REGNUM   29
#define N_REG_CLASSES   (int) LIM_REG_CLASSES
#define REG_CLASS_NAMES
#define REG_CLASS_CONTENTS
#define REGNO_REG_CLASS(REGNO)
#define INDEX_REG_CLASS   NO_REGS
#define BASE_REG_CLASS   GENERAL_REGS
#define REG_CLASS_FROM_LETTER(C)
#define CONST_OK_FOR_LETTER_P   alpha_const_ok_for_letter_p
#define CONST_DOUBLE_OK_FOR_LETTER_P   alpha_const_double_ok_for_letter_p
#define EXTRA_CONSTRAINT   alpha_extra_constraint
#define PREFERRED_RELOAD_CLASS   alpha_preferred_reload_class
#define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN)   secondary_reload_class((CLASS), (MODE), (IN), 1)
#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT)   secondary_reload_class((CLASS), (MODE), (OUT), 0)
#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE)
#define SECONDARY_MEMORY_NEEDED_MODE(MODE)
#define CLASS_MAX_NREGS(CLASS, MODE)   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS)
#define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2)
#define MEMORY_MOVE_COST(MODE, CLASS, IN)   (2*alpha_memory_latency)
#define BRANCH_COST   5
#define STACK_GROWS_DOWNWARD
#define STARTING_FRAME_OFFSET   0
#define STACK_CHECK_BUILTIN   1
#define ACCUMULATE_OUTGOING_ARGS   1
#define FIRST_PARM_OFFSET(FNDECL)   0
#define ELIMINABLE_REGS
#define CAN_ELIMINATE(FROM, TO)   1
#define ALPHA_ROUND(X)   (((X) + 15) & ~ 15)
#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)   ((OFFSET) = alpha_initial_elimination_offset(FROM, TO))
#define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE)   0
#define FUNCTION_VALUE(VALTYPE, FUNC)   function_value (VALTYPE, FUNC, VOIDmode)
#define LIBCALL_VALUE(MODE)   function_value (NULL, NULL, MODE)
#define FUNCTION_VALUE_REGNO_P(N)   ((N) == 0 || (N) == 1 || (N) == 32 || (N) == 33)
#define FUNCTION_ARG_REGNO_P(N)   (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32))
#define CUMULATIVE_ARGS   int
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS)   (CUM) = 0
#define ALPHA_ARG_SIZE(MODE, TYPE, NAMED)
#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)
#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED)   function_arg((CUM), (MODE), (TYPE), (NAMED))
#define ASM_COMMENT_START   " #"
#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL)   alpha_start_function(FILE,NAME,DECL);
#define ASM_DECLARE_FUNCTION_SIZE(FILE, NAME, DECL)   alpha_end_function(FILE,NAME,DECL)
#define PROFILE_BEFORE_PROLOGUE   1
#define NO_PROFILE_COUNTERS   1
#define FUNCTION_PROFILER(FILE, LABELNO)
#define EXIT_IGNORE_STACK   1
#define EPILOGUE_USES(REGNO)   ((REGNO) == 26)
#define TRAMPOLINE_TEMPLATE(FILE)
#define TRAMPOLINE_SECTION   text_section
#define TRAMPOLINE_SIZE   32
#define TRAMPOLINE_ALIGNMENT   64
#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT)   alpha_initialize_trampoline (TRAMP, FNADDR, CXT, 16, 24, 8)
#define RETURN_ADDR_RTX   alpha_return_addr
#define INCOMING_RETURN_ADDR_RTX   gen_rtx_REG (Pmode, 26)
#define DWARF_FRAME_RETURN_COLUMN   DWARF_FRAME_REGNUM (26)
#define DWARF_ALT_FRAME_RETURN_COLUMN   DWARF_FRAME_REGNUM (64)
#define DWARF_ZERO_REG   31
#define EH_RETURN_DATA_REGNO(N)   ((N) < 4 ? (N) + 16 : INVALID_REGNUM)
#define EH_RETURN_STACKADJ_RTX   gen_rtx_REG (Pmode, 28)
#define EH_RETURN_HANDLER_RTX
#define REGNO_OK_FOR_INDEX_P(REGNO)   0
#define REGNO_OK_FOR_BASE_P(REGNO)
#define MAX_REGS_PER_ADDRESS   1
#define CONSTANT_ADDRESS_P(X)
#define LEGITIMATE_CONSTANT_P   alpha_legitimate_constant_p
#define REG_OK_FOR_INDEX_P(X)   0
#define NONSTRICT_REG_OK_FOR_BASE_P(X)   (REGNO (X) < 32 || REGNO (X) == 63 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
#define NONSTRICT_REG_OK_FP_BASE_P(X)
#define STRICT_REG_OK_FOR_BASE_P(X)   REGNO_OK_FOR_BASE_P (REGNO (X))
#define REG_OK_FOR_BASE_P(X)   NONSTRICT_REG_OK_FOR_BASE_P (X)
#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN)
#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
#define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_L, WIN)
#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)   { if (GET_CODE (ADDR) == AND) goto LABEL; }
#define CASE_VECTOR_MODE   SImode
#define CASE_VECTOR_PC_RELATIVE   1
#define DEFAULT_SIGNED_CHAR   1
#define MOVE_MAX   8
#define MOVE_RATIO   (TARGET_BWX ? 7 : 2)
#define MAX_FIXED_MODE_SIZE   GET_MODE_BITSIZE (TImode)
#define SLOW_BYTE_ACCESS   1
#define WORD_REGISTER_OPERATIONS
#define LOAD_EXTEND_OP(MODE)   ((MODE) == SImode ? SIGN_EXTEND : ZERO_EXTEND)
#define SHORT_IMMEDIATES_SIGN_EXTEND
#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC)   1
#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE)   ((VALUE) = 64, TARGET_CIX)
#define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE)   ((VALUE) = 64, TARGET_CIX)
#define FLOAT_STORE_FLAG_VALUE(MODE)   REAL_VALUE_ATOF ((TARGET_FLOAT_VAX ? "0.5" : "2.0"), (MODE))
#define CANONICALIZE_COMPARISON(CODE, OP0, OP1)
#define Pmode   DImode
#define FUNCTION_MODE   Pmode
#define NO_FUNCTION_CSE
#define SHIFT_COUNT_TRUNCATED   1
#define ASM_APP_ON   (TARGET_EXPLICIT_RELOCS ? "\t.set\tmacro\n" : "")
#define ASM_APP_OFF   (TARGET_EXPLICIT_RELOCS ? "\t.set\tnomacro\n" : "")
#define TEXT_SECTION_ASM_OP   "\t.text"
#define READONLY_DATA_SECTION_ASM_OP   "\t.rdata"
#define DATA_SECTION_ASM_OP   "\t.data"
#define REGISTER_NAMES
#define ASM_OUTPUT_LABELREF(STREAM, NAME)
#define GLOBAL_ASM_OP   "\t.globl "
#define USER_LABEL_PREFIX   ""
#define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLEINSN)   { ASM_OUTPUT_ALIGN (FILE, 2); (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); }
#define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM)   sprintf ((LABEL), "*$%s%ld", (PREFIX), (long)(NUM))
#define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH)
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)   abort ()
#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)
#define ASM_OUTPUT_ALIGN(FILE, LOG)
#define ASM_OUTPUT_SKIP(FILE, SIZE)   fprintf (FILE, "\t.space "HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
#define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED)
#define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED)
#define PRINT_OPERAND(FILE, X, CODE)   print_operand (FILE, X, CODE)
#define PRINT_OPERAND_PUNCT_VALID_P(CODE)
#define PRINT_OPERAND_ADDRESS(FILE, ADDR)   print_operand_address((FILE), (ADDR))
#define EXPAND_BUILTIN_VA_START(valist, nextarg)   alpha_va_start (valist, nextarg)
#define OBJECT_FORMAT_COFF
#define EXTENDED_COFF
#define NM_FLAGS   "-pg"
#define SDB_DEBUGGING_INFO   1
#define DBX_DEBUGGING_INFO   1
#define MIPS_DEBUGGING_INFO   1
#define PREFERRED_DEBUGGING_TYPE   SDB_DEBUG
#define DEBUGGER_AUTO_OFFSET(X)   ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset)
#define DEBUGGER_ARG_OFFSET(OFFSET, X)   (OFFSET + alpha_arg_offset)
#define DBX_OUTPUT_SOURCE_LINE(STREAM, LINE, COUNTER)
#define SDB_OUTPUT_SOURCE_LINE(STREAM, LINE)   fprintf (STREAM, "\t.loc\t%d %d\n", num_source_filenames, LINE)
#define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME)   alpha_output_filename (STREAM, NAME)
#define DBX_CONTIN_LENGTH   3000
#define DEFAULT_GDB_EXTENSIONS   1
#define NO_DBX_FUNCTION_END   1
#define ASM_STABS_OP   ((TARGET_GAS) ? "\t.stabs\t" : " #.stabs\t")
#define ASM_STABN_OP   ((TARGET_GAS) ? "\t.stabn\t" : " #.stabn\t")
#define ASM_STABD_OP   ((TARGET_GAS) ? "\t.stabd\t" : " #.stabd\t")
#define SDB_ALLOW_FORWARD_REFERENCES
#define SDB_ALLOW_UNKNOWN_REFERENCES
#define PUT_SDB_DEF(a)
#define PUT_SDB_PLAIN_DEF(a)
#define PUT_SDB_TYPE(a)
#define PUT_SDB_BLOCK_START(LINE)
#define PUT_SDB_BLOCK_END(LINE)
#define PUT_SDB_FUNCTION_START(LINE)
#define PUT_SDB_FUNCTION_END(LINE)
#define PUT_SDB_EPILOGUE_END(NAME)   ((void)(NAME))
#define CODE_MASK   0x8F300
#define MIPS_IS_STAB(sym)   (((sym)->index & 0xFFF00) == CODE_MASK)
#define MIPS_MARK_STAB(code)   ((code)+CODE_MASK)
#define MIPS_UNMARK_STAB(code)   ((code)-CODE_MASK)
#define SHASH_SIZE   511
#define THASH_SIZE   55
#define ALIGN_SYMTABLE_OFFSET(OFFSET)   (((OFFSET) + 7) & ~7)
#define NO_IMPLICIT_EXTERN_C

Enumerations

enum  processor_type {
  PROCESSOR_EV4, PROCESSOR_EV5, PROCESSOR_EV6, PROCESSOR_I386,
  PROCESSOR_I486, PROCESSOR_PENTIUM, PROCESSOR_PENTIUMPRO, PROCESSOR_K6,
  PROCESSOR_ATHLON, PROCESSOR_PENTIUM4, PROCESSOR_max, PROCESSOR_M88100,
  PROCESSOR_M88110, PROCESSOR_M88000, PROCESSOR_700, PROCESSOR_7100,
  PROCESSOR_7100LC, PROCESSOR_7200, PROCESSOR_8000, PROCESSOR_RIOS1,
  PROCESSOR_RIOS2, PROCESSOR_RS64A, PROCESSOR_MPCCORE, PROCESSOR_PPC403,
  PROCESSOR_PPC405, PROCESSOR_PPC601, PROCESSOR_PPC603, PROCESSOR_PPC604,
  PROCESSOR_PPC604e, PROCESSOR_PPC620, PROCESSOR_PPC630, PROCESSOR_PPC750,
  PROCESSOR_PPC7400, PROCESSOR_PPC7450, PROCESSOR_SH1, PROCESSOR_SH2,
  PROCESSOR_SH3, PROCESSOR_SH3E, PROCESSOR_SH4, PROCESSOR_SH5,
  PROCESSOR_DEFAULT, PROCESSOR_R3000, PROCESSOR_R3900, PROCESSOR_R6000,
  PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111, PROCESSOR_R4120,
  PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650, PROCESSOR_R5000,
  PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R8000, PROCESSOR_R4KC,
  PROCESSOR_R5KC, PROCESSOR_R20KC, PROCESSOR_SR71000, PROCESSOR_SB1,
  PROCESSOR_V7, PROCESSOR_CYPRESS, PROCESSOR_V8, PROCESSOR_SUPERSPARC,
  PROCESSOR_SPARCLITE, PROCESSOR_F930, PROCESSOR_F934, PROCESSOR_HYPERSPARC,
  PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET, PROCESSOR_TSC701, PROCESSOR_V9,
  PROCESSOR_ULTRASPARC, PROCESSOR_DEFAULT, PROCESSOR_R3000, PROCESSOR_R3900,
  PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111,
  PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650,
  PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R8000,
  PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC, PROCESSOR_SR71000,
  PROCESSOR_SB1, PROCESSOR_DEFAULT, PROCESSOR_R3000, PROCESSOR_R3900,
  PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111,
  PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650,
  PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R8000,
  PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC, PROCESSOR_SR71000,
  PROCESSOR_SB1, PROCESSOR_EV4, PROCESSOR_EV5, PROCESSOR_EV6,
  PROCESSOR_I386, PROCESSOR_I486, PROCESSOR_PENTIUM, PROCESSOR_PENTIUMPRO,
  PROCESSOR_K6, PROCESSOR_ATHLON, PROCESSOR_PENTIUM4, PROCESSOR_max,
  PROCESSOR_M88100, PROCESSOR_M88110, PROCESSOR_M88000, PROCESSOR_700,
  PROCESSOR_7100, PROCESSOR_7100LC, PROCESSOR_7200, PROCESSOR_8000,
  PROCESSOR_RIOS1, PROCESSOR_RIOS2, PROCESSOR_RS64A, PROCESSOR_MPCCORE,
  PROCESSOR_PPC403, PROCESSOR_PPC405, PROCESSOR_PPC601, PROCESSOR_PPC603,
  PROCESSOR_PPC604, PROCESSOR_PPC604e, PROCESSOR_PPC620, PROCESSOR_PPC630,
  PROCESSOR_PPC750, PROCESSOR_PPC7400, PROCESSOR_PPC7450, PROCESSOR_SH1,
  PROCESSOR_SH2, PROCESSOR_SH3, PROCESSOR_SH3E, PROCESSOR_SH4,
  PROCESSOR_SH5, PROCESSOR_DEFAULT, PROCESSOR_R3000, PROCESSOR_R3900,
  PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100, PROCESSOR_R4111,
  PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650,
  PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R8000,
  PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC, PROCESSOR_SR71000,
  PROCESSOR_SB1, PROCESSOR_V7, PROCESSOR_CYPRESS, PROCESSOR_V8,
  PROCESSOR_SUPERSPARC, PROCESSOR_SPARCLITE, PROCESSOR_F930, PROCESSOR_F934,
  PROCESSOR_HYPERSPARC, PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET, PROCESSOR_TSC701,
  PROCESSOR_V9, PROCESSOR_ULTRASPARC, PROCESSOR_DEFAULT, PROCESSOR_R3000,
  PROCESSOR_R3900, PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100,
  PROCESSOR_R4111, PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600,
  PROCESSOR_R4650, PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500,
  PROCESSOR_R8000, PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC,
  PROCESSOR_SR71000, PROCESSOR_SB1, PROCESSOR_DEFAULT, PROCESSOR_R3000,
  PROCESSOR_R3900, PROCESSOR_R6000, PROCESSOR_R4000, PROCESSOR_R4100,
  PROCESSOR_R4111, PROCESSOR_R4120, PROCESSOR_R4300, PROCESSOR_R4600,
  PROCESSOR_R4650, PROCESSOR_R5000, PROCESSOR_R5400, PROCESSOR_R5500,
  PROCESSOR_R8000, PROCESSOR_R4KC, PROCESSOR_R5KC, PROCESSOR_R20KC,
  PROCESSOR_SR71000, PROCESSOR_SB1, PROCESSOR_EV4, PROCESSOR_EV5,
  PROCESSOR_EV6, PROCESSOR_MAX, ARM_CORE, PROCESSOR_I386,
  PROCESSOR_I486, PROCESSOR_PENTIUM, PROCESSOR_PENTIUMPRO, PROCESSOR_K6,
  PROCESSOR_ATHLON, PROCESSOR_PENTIUM4, PROCESSOR_K8, PROCESSOR_NOCONA,
  PROCESSOR_max, PROCESSOR_ITANIUM, PROCESSOR_ITANIUM2, PROCESSOR_max,
  PROCESSOR_DEFAULT, PROCESSOR_IQ2000, PROCESSOR_IQ10, PROCESSOR_DEFAULT,
  PROCESSOR_4KC, PROCESSOR_5KC, PROCESSOR_20KC, PROCESSOR_M4K,
  PROCESSOR_R3000, PROCESSOR_R3900, PROCESSOR_R6000, PROCESSOR_R4000,
  PROCESSOR_R4100, PROCESSOR_R4111, PROCESSOR_R4120, PROCESSOR_R4130,
  PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650, PROCESSOR_R5000,
  PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R7000, PROCESSOR_R8000,
  PROCESSOR_R9000, PROCESSOR_SB1, PROCESSOR_SR71000, PROCESSOR_700,
  PROCESSOR_7100, PROCESSOR_7100LC, PROCESSOR_7200, PROCESSOR_7300,
  PROCESSOR_8000, PROCESSOR_RIOS1, PROCESSOR_RIOS2, PROCESSOR_RS64A,
  PROCESSOR_MPCCORE, PROCESSOR_PPC403, PROCESSOR_PPC405, PROCESSOR_PPC440,
  PROCESSOR_PPC601, PROCESSOR_PPC603, PROCESSOR_PPC604, PROCESSOR_PPC604e,
  PROCESSOR_PPC620, PROCESSOR_PPC630, PROCESSOR_PPC750, PROCESSOR_PPC7400,
  PROCESSOR_PPC7450, PROCESSOR_PPC8540, PROCESSOR_POWER4, PROCESSOR_POWER5,
  PROCESSOR_9672_G5, PROCESSOR_9672_G6, PROCESSOR_2064_Z900, PROCESSOR_2084_Z990,
  PROCESSOR_max, PROCESSOR_SH1, PROCESSOR_SH2, PROCESSOR_SH2E,
  PROCESSOR_SH2A, PROCESSOR_SH3, PROCESSOR_SH3E, PROCESSOR_SH4,
  PROCESSOR_SH4A, PROCESSOR_SH5, PROCESSOR_V7, PROCESSOR_CYPRESS,
  PROCESSOR_V8, PROCESSOR_SUPERSPARC, PROCESSOR_SPARCLITE, PROCESSOR_F930,
  PROCESSOR_F934, PROCESSOR_HYPERSPARC, PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET,
  PROCESSOR_TSC701, PROCESSOR_V9, PROCESSOR_ULTRASPARC, PROCESSOR_ULTRASPARC3,
  PROCESSOR_EV4, PROCESSOR_EV5, PROCESSOR_EV6, PROCESSOR_MAX,
  ARM_CORE, PROCESSOR_I386, PROCESSOR_I486, PROCESSOR_PENTIUM,
  PROCESSOR_PENTIUMPRO, PROCESSOR_K6, PROCESSOR_ATHLON, PROCESSOR_PENTIUM4,
  PROCESSOR_K8, PROCESSOR_NOCONA, PROCESSOR_GENERIC32, PROCESSOR_GENERIC64,
  PROCESSOR_AMDFAM10, PROCESSOR_max, PROCESSOR_ITANIUM, PROCESSOR_ITANIUM2,
  PROCESSOR_max, PROCESSOR_DEFAULT, PROCESSOR_IQ2000, PROCESSOR_IQ10,
  PROCESSOR_R3000, PROCESSOR_4KC, PROCESSOR_4KP, PROCESSOR_5KC,
  PROCESSOR_5KF, PROCESSOR_20KC, PROCESSOR_24K, PROCESSOR_24KX,
  PROCESSOR_M4K, PROCESSOR_R3900, PROCESSOR_R6000, PROCESSOR_R4000,
  PROCESSOR_R4100, PROCESSOR_R4111, PROCESSOR_R4120, PROCESSOR_R4130,
  PROCESSOR_R4300, PROCESSOR_R4600, PROCESSOR_R4650, PROCESSOR_R5000,
  PROCESSOR_R5400, PROCESSOR_R5500, PROCESSOR_R7000, PROCESSOR_R8000,
  PROCESSOR_R9000, PROCESSOR_SB1, PROCESSOR_SB1A, PROCESSOR_SR71000,
  PROCESSOR_MAX, PROCESSOR_MN10300, PROCESSOR_AM33, PROCESSOR_AM33_2,
  PROCESSOR_MS1_64_001, PROCESSOR_MS1_16_002, PROCESSOR_MS1_16_003, PROCESSOR_MS2,
  PROCESSOR_700, PROCESSOR_7100, PROCESSOR_7100LC, PROCESSOR_7200,
  PROCESSOR_7300, PROCESSOR_8000, PROCESSOR_RIOS1, PROCESSOR_RIOS2,
  PROCESSOR_RS64A, PROCESSOR_MPCCORE, PROCESSOR_PPC403, PROCESSOR_PPC405,
  PROCESSOR_PPC440, PROCESSOR_PPC601, PROCESSOR_PPC603, PROCESSOR_PPC604,
  PROCESSOR_PPC604e, PROCESSOR_PPC620, PROCESSOR_PPC630, PROCESSOR_PPC750,
  PROCESSOR_PPC7400, PROCESSOR_PPC7450, PROCESSOR_PPC8540, PROCESSOR_POWER4,
  PROCESSOR_POWER5, PROCESSOR_9672_G5, PROCESSOR_9672_G6, PROCESSOR_2064_Z900,
  PROCESSOR_2084_Z990, PROCESSOR_2094_Z9_109, PROCESSOR_max, PROCESSOR_SH1,
  PROCESSOR_SH2, PROCESSOR_SH2E, PROCESSOR_SH2A, PROCESSOR_SH3,
  PROCESSOR_SH3E, PROCESSOR_SH4, PROCESSOR_SH4A, PROCESSOR_SH5,
  PROCESSOR_V7, PROCESSOR_CYPRESS, PROCESSOR_V8, PROCESSOR_SUPERSPARC,
  PROCESSOR_SPARCLITE, PROCESSOR_F930, PROCESSOR_F934, PROCESSOR_HYPERSPARC,
  PROCESSOR_SPARCLITE86X, PROCESSOR_SPARCLET, PROCESSOR_TSC701, PROCESSOR_V9,
  PROCESSOR_ULTRASPARC, PROCESSOR_ULTRASPARC3, PROCESSOR_NIAGARA
}
enum  alpha_trap_precision {
  ALPHA_TP_PROG, ALPHA_TP_FUNC, ALPHA_TP_INSN, ALPHA_TP_PROG,
  ALPHA_TP_FUNC, ALPHA_TP_INSN, ALPHA_TP_PROG, ALPHA_TP_FUNC,
  ALPHA_TP_INSN, ALPHA_TP_PROG, ALPHA_TP_FUNC, ALPHA_TP_INSN
}
enum  alpha_fp_rounding_mode {
  ALPHA_FPRM_NORM, ALPHA_FPRM_MINF, ALPHA_FPRM_CHOP, ALPHA_FPRM_DYN,
  ALPHA_FPRM_NORM, ALPHA_FPRM_MINF, ALPHA_FPRM_CHOP, ALPHA_FPRM_DYN,
  ALPHA_FPRM_NORM, ALPHA_FPRM_MINF, ALPHA_FPRM_CHOP, ALPHA_FPRM_DYN,
  ALPHA_FPRM_NORM, ALPHA_FPRM_MINF, ALPHA_FPRM_CHOP, ALPHA_FPRM_DYN
}
enum  alpha_fp_trap_mode {
  ALPHA_FPTM_N, ALPHA_FPTM_U, ALPHA_FPTM_SU, ALPHA_FPTM_SUI,
  ALPHA_FPTM_N, ALPHA_FPTM_U, ALPHA_FPTM_SU, ALPHA_FPTM_SUI,
  ALPHA_FPTM_N, ALPHA_FPTM_U, ALPHA_FPTM_SU, ALPHA_FPTM_SUI,
  ALPHA_FPTM_N, ALPHA_FPTM_U, ALPHA_FPTM_SU, ALPHA_FPTM_SUI
}
enum  reg_class {
  NO_REGS, R2, R0_1, INDEX_REGS,
  BASE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  LR0_REGS, GENERAL_REGS, BP_REGS, FC_REGS,
  CR_REGS, Q_REGS, SPECIAL_REGS, ACCUM0_REGS,
  ACCUM_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R24_REG, R25_REG, R27_REG,
  GENERAL_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, LPCOUNT_REG, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, FPU_REGS, LO_REGS,
  STACK_REG, BASE_REGS, HI_REGS, CC_REG,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REG, POINTER_X_REGS, POINTER_Y_REGS, POINTER_Z_REGS,
  STACK_REG, BASE_POINTER_REGS, POINTER_REGS, ADDW_REGS,
  SIMPLE_LD_REGS, LD_REGS, NO_LD_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0R1_REGS,
  R2R3_REGS, EXT_LOW_REGS, EXT_REGS, ADDR_REGS,
  INDEX_REGS, BK_REG, SP_REG, RC_REG,
  COUNTER_REGS, INT_REGS, GENERAL_REGS, DP_REG,
  ST_REG, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, FLOAT_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, S_REGS, INDEX_REGS, SP_REGS,
  A_REGS, SI_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  REPEAT_REGS, CR_REGS, ACCUM_REGS, OTHER_FLAG_REGS,
  F0_REGS, F1_REGS, BR_FLAG_REGS, FLAG_REGS,
  EVEN_REGS, GPR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, A0H_REG, A0L_REG, A0_REG,
  A1H_REG, ACCUM_HIGH_REGS, A1L_REG, ACCUM_LOW_REGS,
  A1_REG, ACCUM_REGS, X_REG, X_OR_ACCUM_LOW_REGS,
  X_OR_ACCUM_REGS, YH_REG, YH_OR_ACCUM_HIGH_REGS, X_OR_YH_REGS,
  YL_REG, YL_OR_ACCUM_LOW_REGS, X_OR_YL_REGS, X_OR_Y_REGS,
  Y_REG, ACCUM_OR_Y_REGS, PH_REG, X_OR_PH_REGS,
  PL_REG, PL_OR_ACCUM_LOW_REGS, X_OR_PL_REGS, YL_OR_PL_OR_ACCUM_LOW_REGS,
  P_REG, ACCUM_OR_P_REGS, YL_OR_P_REGS, ACCUM_LOW_OR_YL_OR_P_REGS,
  Y_OR_P_REGS, ACCUM_Y_OR_P_REGS, NO_FRAME_Y_ADDR_REGS, Y_ADDR_REGS,
  ACCUM_LOW_OR_Y_ADDR_REGS, ACCUM_OR_Y_ADDR_REGS, X_OR_Y_ADDR_REGS, Y_OR_Y_ADDR_REGS,
  P_OR_Y_ADDR_REGS, NON_HIGH_YBASE_ELIGIBLE_REGS, YBASE_ELIGIBLE_REGS, J_REG,
  J_OR_DAU_16_BIT_REGS, BMU_REGS, NOHIGH_NON_ADDR_REGS, NON_ADDR_REGS,
  SLOW_MEM_LOAD_REGS, NOHIGH_NON_YBASE_REGS, NO_ACCUM_NON_YBASE_REGS, NON_YBASE_REGS,
  YBASE_VIRT_REGS, ACCUM_LOW_OR_YBASE_REGS, ACCUM_OR_YBASE_REGS, X_OR_YBASE_REGS,
  Y_OR_YBASE_REGS, ACCUM_LOW_YL_PL_OR_YBASE_REGS, P_OR_YBASE_REGS, ACCUM_Y_P_OR_YBASE_REGS,
  Y_ADDR_OR_YBASE_REGS, YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS, YBASE_OR_YBASE_ELIGIBLE_REGS, NO_HIGH_ALL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG,
  MULTIPLY_64_REG, LOW_REGS, HIGH_REGS, REAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,
  MAC_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ADDR_REGS, DATA_REGS, FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, AREG, DREG,
  CREG, BREG, SIREG, DIREG,
  AD_REGS, Q_REGS, NON_Q_REGS, INDEX_REGS,
  LEGACY_REGS, GENERAL_REGS, FP_TOP_REG, FP_SECOND_REG,
  FLOAT_REGS, SSE_REGS, MMX_REGS, FP_TOP_SSE_REGS,
  FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS, INT_SSE_REGS,
  FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GLOBAL_REGS, LOCAL_REGS, LOCAL_OR_GLOBAL_REGS,
  FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  PR_REGS, BR_REGS, AR_M_REGS, AR_I_REGS,
  ADDL_REGS, GR_REGS, FR_REGS, GR_AND_BR_REGS,
  GR_AND_FR_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  CARRY_REG, ACCUM_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, D_REGS, X_REGS,
  Y_REGS, SP_REGS, DA_REGS, DB_REGS,
  Z_REGS, D8_REGS, Q_REGS, D_OR_X_REGS,
  D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS, A_REGS,
  X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS, A_OR_D_REGS,
  A_OR_SP_REGS, H_REGS, S_REGS, D_OR_S_REGS,
  X_OR_S_REGS, Y_OR_S_REGS, SP_OR_S_REGS, D_OR_X_OR_S_REGS,
  D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS, A_OR_S_REGS, D_OR_A_OR_S_REGS,
  TMP_REGS, D_OR_A_OR_TMP_REGS, G_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, DATA_REGS, ADDR_REGS,
  FP_REGS, GENERAL_REGS, DATA_OR_FP_REGS, ADDR_OR_FP_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, AP_REG,
  XRF_REGS, GENERAL_REGS, AGRF_REGS, XGRF_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, ONLYR1_REGS,
  LRW_REGS, GENERAL_REGS, C_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, REMAINDER_REG,
  HIMULT_REG, SYSTEM_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, DATA_REGS, ADDRESS_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,
  ADDRESS_REGS, SP_REGS, DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,
  EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS,
  SP_OR_ADDRESS_OR_EXTENDED_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, FLOAT_REG0, LONG_FLOAT_REG0,
  FLOAT_REGS, FP_REGS, GEN_AND_FP_REGS, FRAME_POINTER_REG,
  STACK_POINTER_REG, GEN_AND_MEM_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R1_REGS, GENERAL_REGS, FPUPPER_REGS,
  FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,
  FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, MUL_REGS,
  GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS, FPU_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, OUT_REGS,
  STD_REGS, ARG_REGS, SRC_REGS, DST_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0_REGS,
  R15_REGS, BASE_REGS, GENERAL_REGS, FP_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, BASE_REGS,
  GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS, VRSAVE_REGS,
  NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,
  LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,
  CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, ADDR_REGS, GENERAL_REGS,
  FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REGS, PR_REGS,
  T_REGS, MAC_REGS, FPUL_REGS, SIBCALL_REGS,
  GENERAL_REGS, FP0_REGS, FP_REGS, DF_REGS,
  FPSCR_REGS, GENERAL_FP_REGS, TARGET_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, M16_NA_REGS, M16_REGS,
  T_REG, M16_T_REGS, GR_REGS, FP_REGS,
  HI_REG, LO_REG, HILO_REG, MD_REGS,
  COP0_REGS, COP2_REGS, COP3_REGS, HI_AND_GR_REGS,
  LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS,
  COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS,
  ST_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  FPCC_REGS, I64_REGS, GENERAL_REGS, FP_REGS,
  EXTRA_FP_REGS, GENERAL_OR_FP_REGS, GENERAL_OR_EXTRA_FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REGS, R1_REGS,
  TWO_REGS, R2_REGS, EIGHT_REGS, R8_REGS,
  ICALL_REGS, GENERAL_REGS, CARRY_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, BR_REGS, FP_REGS, ACC_REG,
  SP_REG, RL_REGS, GR_REGS, AR_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,
  M16_REGS, T_REG, M16_T_REGS, GR_REGS,
  FP_REGS, HI_REG, LO_REG, HILO_REG,
  MD_REGS, COP0_REGS, COP2_REGS, COP3_REGS,
  HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS,
  COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS,
  ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, M16_NA_REGS, M16_REGS, T_REG,
  M16_T_REGS, GR_REGS, FP_REGS, HI_REG,
  LO_REG, HILO_REG, MD_REGS, COP0_REGS,
  COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,
  HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS,
  COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R2,
  R0_1, INDEX_REGS, BASE_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, LR0_REGS, GENERAL_REGS,
  BP_REGS, FC_REGS, CR_REGS, Q_REGS,
  SPECIAL_REGS, ACCUM0_REGS, ACCUM_REGS, FLOAT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R24_REG,
  R25_REG, R27_REG, GENERAL_REGS, FLOAT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  FPU_REGS, LO_REGS, STACK_REG, BASE_REGS,
  HI_REGS, CC_REG, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REG, POINTER_X_REGS,
  POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG, BASE_POINTER_REGS,
  POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS, LD_REGS,
  NO_LD_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R0R1_REGS, R2R3_REGS, EXT_LOW_REGS,
  EXT_REGS, ADDR_REGS, INDEX_REGS, BK_REG,
  SP_REG, RC_REG, COUNTER_REGS, INT_REGS,
  GENERAL_REGS, DP_REG, ST_REG, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, FLOAT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, S_REGS,
  INDEX_REGS, SP_REGS, A_REGS, SI_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, REPEAT_REGS, CR_REGS,
  ACCUM_REGS, OTHER_FLAG_REGS, F0_REGS, F1_REGS,
  BR_FLAG_REGS, FLAG_REGS, EVEN_REGS, GPR_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, A0H_REG,
  A0L_REG, A0_REG, A1H_REG, ACCUM_HIGH_REGS,
  A1L_REG, ACCUM_LOW_REGS, A1_REG, ACCUM_REGS,
  X_REG, X_OR_ACCUM_LOW_REGS, X_OR_ACCUM_REGS, YH_REG,
  YH_OR_ACCUM_HIGH_REGS, X_OR_YH_REGS, YL_REG, YL_OR_ACCUM_LOW_REGS,
  X_OR_YL_REGS, X_OR_Y_REGS, Y_REG, ACCUM_OR_Y_REGS,
  PH_REG, X_OR_PH_REGS, PL_REG, PL_OR_ACCUM_LOW_REGS,
  X_OR_PL_REGS, YL_OR_PL_OR_ACCUM_LOW_REGS, P_REG, ACCUM_OR_P_REGS,
  YL_OR_P_REGS, ACCUM_LOW_OR_YL_OR_P_REGS, Y_OR_P_REGS, ACCUM_Y_OR_P_REGS,
  NO_FRAME_Y_ADDR_REGS, Y_ADDR_REGS, ACCUM_LOW_OR_Y_ADDR_REGS, ACCUM_OR_Y_ADDR_REGS,
  X_OR_Y_ADDR_REGS, Y_OR_Y_ADDR_REGS, P_OR_Y_ADDR_REGS, NON_HIGH_YBASE_ELIGIBLE_REGS,
  YBASE_ELIGIBLE_REGS, J_REG, J_OR_DAU_16_BIT_REGS, BMU_REGS,
  NOHIGH_NON_ADDR_REGS, NON_ADDR_REGS, SLOW_MEM_LOAD_REGS, NOHIGH_NON_YBASE_REGS,
  NO_ACCUM_NON_YBASE_REGS, NON_YBASE_REGS, YBASE_VIRT_REGS, ACCUM_LOW_OR_YBASE_REGS,
  ACCUM_OR_YBASE_REGS, X_OR_YBASE_REGS, Y_OR_YBASE_REGS, ACCUM_LOW_YL_PL_OR_YBASE_REGS,
  P_OR_YBASE_REGS, ACCUM_Y_P_OR_YBASE_REGS, Y_ADDR_OR_YBASE_REGS, YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS,
  YBASE_OR_YBASE_ELIGIBLE_REGS, NO_HIGH_ALL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, MULTIPLY_32_REG, MULTIPLY_64_REG, LOW_REGS,
  HIGH_REGS, REAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, MAC_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, ADDR_REGS, DATA_REGS,
  FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  AREG, DREG, CREG, BREG,
  SIREG, DIREG, AD_REGS, Q_REGS,
  NON_Q_REGS, INDEX_REGS, LEGACY_REGS, GENERAL_REGS,
  FP_TOP_REG, FP_SECOND_REG, FLOAT_REGS, SSE_REGS,
  MMX_REGS, FP_TOP_SSE_REGS, FP_SECOND_SSE_REGS, FLOAT_SSE_REGS,
  FLOAT_INT_REGS, INT_SSE_REGS, FLOAT_INT_SSE_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, FP_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GLOBAL_REGS,
  LOCAL_REGS, LOCAL_OR_GLOBAL_REGS, FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, PR_REGS, BR_REGS,
  AR_M_REGS, AR_I_REGS, ADDL_REGS, GR_REGS,
  FR_REGS, GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, CARRY_REG, ACCUM_REGS,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  D_REGS, X_REGS, Y_REGS, SP_REGS,
  DA_REGS, DB_REGS, Z_REGS, D8_REGS,
  Q_REGS, D_OR_X_REGS, D_OR_Y_REGS, D_OR_SP_REGS,
  X_OR_Y_REGS, A_REGS, X_OR_SP_REGS, Y_OR_SP_REGS,
  X_OR_Y_OR_D_REGS, A_OR_D_REGS, A_OR_SP_REGS, H_REGS,
  S_REGS, D_OR_S_REGS, X_OR_S_REGS, Y_OR_S_REGS,
  SP_OR_S_REGS, D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS,
  A_OR_S_REGS, D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS,
  G_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  DATA_REGS, ADDR_REGS, FP_REGS, GENERAL_REGS,
  DATA_OR_FP_REGS, ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS,
  AGRF_REGS, XGRF_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, ONLYR1_REGS, LRW_REGS, GENERAL_REGS,
  C_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, REMAINDER_REG, HIMULT_REG, SYSTEM_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,
  ADDRESS_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS,
  DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS, EXTENDED_REGS, DATA_OR_EXTENDED_REGS,
  ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,
  FLOAT_REG0, LONG_FLOAT_REG0, FLOAT_REGS, FP_REGS,
  GEN_AND_FP_REGS, FRAME_POINTER_REG, STACK_POINTER_REG, GEN_AND_MEM_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,
  GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,
  SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R1_REGS, GENERAL_REGS, FPUPPER_REGS, FP_REGS,
  GENERAL_OR_FP_REGS, SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS,
  NO_LOAD_FPU_REGS, FPU_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, OUT_REGS, STD_REGS, ARG_REGS,
  SRC_REGS, DST_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R0_REGS, R15_REGS, BASE_REGS,
  GENERAL_REGS, FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, BASE_REGS, GENERAL_REGS, FLOAT_REGS,
  ALTIVEC_REGS, VRSAVE_REGS, NON_SPECIAL_REGS, MQ_REGS,
  LINK_REGS, CTR_REGS, LINK_OR_CTR_REGS, SPECIAL_REGS,
  SPEC_OR_GEN_REGS, CR0_REGS, CR_REGS, NON_FLOAT_REGS,
  XER_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ADDR_REGS, GENERAL_REGS, FP_REGS, ADDR_FP_REGS,
  GENERAL_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REGS, PR_REGS, T_REGS, MAC_REGS,
  FPUL_REGS, SIBCALL_REGS, GENERAL_REGS, FP0_REGS,
  FP_REGS, DF_REGS, FPSCR_REGS, GENERAL_FP_REGS,
  TARGET_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  M16_NA_REGS, M16_REGS, T_REG, M16_T_REGS,
  GR_REGS, FP_REGS, HI_REG, LO_REG,
  HILO_REG, MD_REGS, COP0_REGS, COP2_REGS,
  COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS,
  HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,
  ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, FPCC_REGS, I64_REGS,
  GENERAL_REGS, FP_REGS, EXTRA_FP_REGS, GENERAL_OR_FP_REGS,
  GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REGS, R1_REGS, TWO_REGS, R2_REGS,
  EIGHT_REGS, R8_REGS, ICALL_REGS, GENERAL_REGS,
  CARRY_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, BR_REGS,
  FP_REGS, ACC_REG, SP_REG, RL_REGS,
  GR_REGS, AR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, M16_NA_REGS, M16_REGS, T_REG,
  M16_T_REGS, GR_REGS, FP_REGS, HI_REG,
  LO_REG, HILO_REG, MD_REGS, COP0_REGS,
  COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,
  HILO_AND_GR_REGS, HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS,
  COP3_AND_GR_REGS, ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,
  M16_REGS, T_REG, M16_T_REGS, GR_REGS,
  FP_REGS, HI_REG, LO_REG, HILO_REG,
  MD_REGS, COP0_REGS, COP2_REGS, COP3_REGS,
  HI_AND_GR_REGS, LO_AND_GR_REGS, HILO_AND_GR_REGS, HI_AND_FP_REGS,
  COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS, ALL_COP_REGS,
  ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R0_REG, R24_REG, R25_REG,
  R27_REG, GENERAL_REGS, FLOAT_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, FPA_REGS,
  CIRRUS_REGS, VFP_REGS, IWMMXT_GR_REGS, IWMMXT_REGS,
  LO_REGS, STACK_REG, BASE_REGS, HI_REGS,
  CC_REG, VFPCC_REG, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REG, POINTER_X_REGS,
  POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG, BASE_POINTER_REGS,
  POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS, LD_REGS,
  NO_LD_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, IREGS, BREGS, LREGS,
  MREGS, CIRCREGS, DAGREGS, EVEN_AREGS,
  ODD_AREGS, AREGS, CCREGS, EVEN_DREGS,
  ODD_DREGS, DREGS, PREGS_CLOBBERED, PREGS,
  DPREGS, MOST_REGS, PROLOGUE_REGS, NON_A_CC_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0R1_REGS,
  R2R3_REGS, EXT_LOW_REGS, EXT_REGS, ADDR_REGS,
  INDEX_REGS, BK_REG, SP_REG, RC_REG,
  COUNTER_REGS, INT_REGS, GENERAL_REGS, DP_REG,
  ST_REG, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG,
  MULTIPLY_64_REG, LOW_REGS, HIGH_REGS, REAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, ICC_REGS,
  FCC_REGS, CC_REGS, ICR_REGS, FCR_REGS,
  CR_REGS, LCR_REG, LR_REG, GR8_REGS,
  GR9_REGS, GR89_REGS, FDPIC_REGS, FDPIC_FPTR_REGS,
  FDPIC_CALL_REGS, SPR_REGS, QUAD_ACC_REGS, EVEN_ACC_REGS,
  ACC_REGS, ACCG_REGS, QUAD_FPR_REGS, FEVEN_REGS,
  FPR_REGS, QUAD_REGS, EVEN_REGS, GPR_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, COUNTER_REGS,
  SOURCE_REGS, DESTINATION_REGS, GENERAL_REGS, MAC_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, AREG,
  DREG, CREG, BREG, SIREG,
  DIREG, AD_REGS, Q_REGS, NON_Q_REGS,
  INDEX_REGS, LEGACY_REGS, GENERAL_REGS, FP_TOP_REG,
  FP_SECOND_REG, FLOAT_REGS, SSE_REGS, MMX_REGS,
  FP_TOP_SSE_REGS, FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS,
  INT_SSE_REGS, FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, PR_REGS, BR_REGS,
  AR_M_REGS, AR_I_REGS, ADDL_REGS, GR_REGS,
  FR_REGS, GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, DPH_REGS, DPL_REGS,
  DP_REGS, SP_REGS, IPH_REGS, IPL_REGS,
  IP_REGS, DP_SP_REGS, PTR_REGS, NONPTR_REGS,
  NONSP_REGS, GENERAL_REGS, ALL_REGS = GENERAL_REGS, LIM_REG_CLASSES,
  NO_REGS, GR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, CARRY_REG, ACCUM_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, D_REGS,
  X_REGS, Y_REGS, SP_REGS, DA_REGS,
  DB_REGS, Z_REGS, D8_REGS, Q_REGS,
  D_OR_X_REGS, D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS,
  A_REGS, X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS,
  A_OR_D_REGS, A_OR_SP_REGS, H_REGS, S_REGS,
  D_OR_S_REGS, X_OR_S_REGS, Y_OR_S_REGS, Z_OR_S_REGS,
  SP_OR_S_REGS, D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS,
  A_OR_S_REGS, D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS,
  G_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  DATA_REGS, ADDR_REGS, FP_REGS, GENERAL_REGS,
  DATA_OR_FP_REGS, ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, ONLYR1_REGS, LRW_REGS, GENERAL_REGS,
  C_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  M16_NA_REGS, M16_REGS, T_REG, M16_T_REGS,
  PIC_FN_ADDR_REG, LEA_REGS, GR_REGS, FP_REGS,
  HI_REG, LO_REG, MD_REGS, COP0_REGS,
  COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,
  HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,
  ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, GENERAL_REGS, REMAINDER_REG,
  HIMULT_REG, SYSTEM_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS,
  DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS, EXTENDED_REGS, DATA_OR_EXTENDED_REGS,
  ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS, FP_REGS,
  FP_ACC_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, FLOAT_REG0, LONG_FLOAT_REG0,
  FLOAT_REGS, LONG_REGS, FP_REGS, GEN_AND_FP_REGS,
  FRAME_POINTER_REG, STACK_POINTER_REG, GEN_AND_MEM_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,
  FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,
  GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,
  SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS,
  FPU_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  BASE_REGS, GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS,
  VRSAVE_REGS, VSCR_REGS, SPE_ACC_REGS, SPEFSCR_REGS,
  NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,
  LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,
  CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, CC_REGS, ADDR_REGS,
  GENERAL_REGS, ACCESS_REGS, ADDR_CC_REGS, GENERAL_CC_REGS,
  FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REGS, PR_REGS,
  T_REGS, MAC_REGS, FPUL_REGS, SIBCALL_REGS,
  GENERAL_REGS, FP0_REGS, FP_REGS, DF_HI_REGS,
  DF_REGS, FPSCR_REGS, GENERAL_FP_REGS, TARGET_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, FPCC_REGS,
  I64_REGS, GENERAL_REGS, FP_REGS, EXTRA_FP_REGS,
  GENERAL_OR_FP_REGS, GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, R0_REGS, R1_REGS, TWO_REGS,
  R2_REGS, EIGHT_REGS, R8_REGS, ICALL_REGS,
  GENERAL_REGS, CARRY_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  BR_REGS, FP_REGS, ACC_REG, SP_REG,
  RL_REGS, GR_REGS, AR_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0_REG, R24_REG,
  R25_REG, R27_REG, GENERAL_REGS, FLOAT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, LPCOUNT_REG,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  FPA_REGS, CIRRUS_REGS, VFP_REGS, IWMMXT_GR_REGS,
  IWMMXT_REGS, LO_REGS, STACK_REG, BASE_REGS,
  HI_REGS, CC_REG, VFPCC_REG, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R0_REG,
  POINTER_X_REGS, POINTER_Y_REGS, POINTER_Z_REGS, STACK_REG,
  BASE_POINTER_REGS, POINTER_REGS, ADDW_REGS, SIMPLE_LD_REGS,
  LD_REGS, NO_LD_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, IREGS, BREGS,
  LREGS, MREGS, CIRCREGS, DAGREGS,
  EVEN_AREGS, ODD_AREGS, AREGS, CCREGS,
  EVEN_DREGS, ODD_DREGS, DREGS, FDPIC_REGS,
  FDPIC_FPTR_REGS, PREGS_CLOBBERED, PREGS, IPREGS,
  DPREGS, MOST_REGS, LT_REGS, LC_REGS,
  LB_REGS, PROLOGUE_REGS, NON_A_CC_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R0R1_REGS, R2R3_REGS,
  EXT_LOW_REGS, EXT_REGS, ADDR_REGS, INDEX_REGS,
  BK_REG, SP_REG, RC_REG, COUNTER_REGS,
  INT_REGS, GENERAL_REGS, DP_REG, ST_REG,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, MOF_REGS,
  CC0_REGS, SPECIAL_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, LO_REGS, HI_REGS,
  HILO_REGS, NOSP_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, MULTIPLY_32_REG, MULTIPLY_64_REG,
  LOW_REGS, HIGH_REGS, REAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, ICC_REGS, FCC_REGS,
  CC_REGS, ICR_REGS, FCR_REGS, CR_REGS,
  LCR_REG, LR_REG, GR8_REGS, GR9_REGS,
  GR89_REGS, FDPIC_REGS, FDPIC_FPTR_REGS, FDPIC_CALL_REGS,
  SPR_REGS, QUAD_ACC_REGS, EVEN_ACC_REGS, ACC_REGS,
  ACCG_REGS, QUAD_FPR_REGS, FEVEN_REGS, FPR_REGS,
  QUAD_REGS, EVEN_REGS, GPR_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, COUNTER_REGS, SOURCE_REGS,
  DESTINATION_REGS, GENERAL_REGS, MAC_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, AREG, DREG,
  CREG, BREG, SIREG, DIREG,
  AD_REGS, Q_REGS, NON_Q_REGS, INDEX_REGS,
  LEGACY_REGS, GENERAL_REGS, FP_TOP_REG, FP_SECOND_REG,
  FLOAT_REGS, SSE_REGS, MMX_REGS, FP_TOP_SSE_REGS,
  FP_SECOND_SSE_REGS, FLOAT_SSE_REGS, FLOAT_INT_REGS, INT_SSE_REGS,
  FLOAT_INT_SSE_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  PR_REGS, BR_REGS, AR_M_REGS, AR_I_REGS,
  ADDL_REGS, GR_REGS, FP_REGS, FR_REGS,
  GR_AND_BR_REGS, GR_AND_FR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, GR_REGS, ALL_REGS, LIM_REG_CLASSES,
  NO_REGS, SP_REGS, FB_REGS, SB_REGS,
  CR_REGS, R0_REGS, R1_REGS, R2_REGS,
  R3_REGS, R02_REGS, HL_REGS, QI_REGS,
  R23_REGS, R03_REGS, DI_REGS, A0_REGS,
  A1_REGS, A_REGS, AD_REGS, PS_REGS,
  SI_REGS, HI_REGS, RA_REGS, GENERAL_REGS,
  FLG_REGS, HC_REGS, MEM_REGS, R02_A_MEM_REGS,
  A_HL_MEM_REGS, R1_R3_A_MEM_REGS, R03_MEM_REGS, A_HI_MEM_REGS,
  A_AD_CR_MEM_SI_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  CARRY_REG, ACCUM_REGS, GENERAL_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, D_REGS, X_REGS,
  Y_REGS, SP_REGS, DA_REGS, DB_REGS,
  Z_REGS, D8_REGS, Q_REGS, D_OR_X_REGS,
  D_OR_Y_REGS, D_OR_SP_REGS, X_OR_Y_REGS, A_REGS,
  X_OR_SP_REGS, Y_OR_SP_REGS, X_OR_Y_OR_D_REGS, A_OR_D_REGS,
  A_OR_SP_REGS, H_REGS, S_REGS, D_OR_S_REGS,
  X_OR_S_REGS, Y_OR_S_REGS, Z_OR_S_REGS, SP_OR_S_REGS,
  D_OR_X_OR_S_REGS, D_OR_Y_OR_S_REGS, D_OR_SP_OR_S_REGS, A_OR_S_REGS,
  D_OR_A_OR_S_REGS, TMP_REGS, D_OR_A_OR_TMP_REGS, G_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,
  ADDR_REGS, FP_REGS, GENERAL_REGS, DATA_OR_FP_REGS,
  ADDR_OR_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ONLYR1_REGS, LRW_REGS, GENERAL_REGS, C_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, M16_NA_REGS,
  M16_REGS, T_REG, M16_T_REGS, PIC_FN_ADDR_REG,
  V1_REG, LEA_REGS, GR_REGS, FP_REGS,
  HI_REG, LO_REG, MD_REGS, COP0_REGS,
  COP2_REGS, COP3_REGS, HI_AND_GR_REGS, LO_AND_GR_REGS,
  HI_AND_FP_REGS, COP0_AND_GR_REGS, COP2_AND_GR_REGS, COP3_AND_GR_REGS,
  ALL_COP_REGS, ALL_COP_AND_GR_REGS, ST_REGS, DSP_ACC_REGS,
  ACC_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, REMAINDER_REG, HIMULT_REG, SYSTEM_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, DATA_REGS,
  ADDRESS_REGS, SP_REGS, DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,
  EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS, SP_OR_EXTENDED_REGS,
  SP_OR_ADDRESS_OR_EXTENDED_REGS, FP_REGS, FP_ACC_REGS, GENERAL_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, R1_REGS, GENERAL_REGS,
  FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS, SHIFT_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, R1_REGS,
  GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,
  SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  MUL_REGS, GENERAL_REGS, LOAD_FPU_REGS, NO_LOAD_FPU_REGS,
  FPU_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  BASE_REGS, GENERAL_REGS, FLOAT_REGS, ALTIVEC_REGS,
  VRSAVE_REGS, VSCR_REGS, SPE_ACC_REGS, SPEFSCR_REGS,
  NON_SPECIAL_REGS, MQ_REGS, LINK_REGS, CTR_REGS,
  LINK_OR_CTR_REGS, SPECIAL_REGS, SPEC_OR_GEN_REGS, CR0_REGS,
  CR_REGS, NON_FLOAT_REGS, XER_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, CC_REGS, ADDR_REGS,
  GENERAL_REGS, ACCESS_REGS, ADDR_CC_REGS, GENERAL_CC_REGS,
  FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, G16_REGS, G32_REGS,
  T32_REGS, HI_REG, LO_REG, CE_REGS,
  CN_REG, LC_REG, SC_REG, SP_REGS,
  CR_REGS, CP1_REGS, CP2_REGS, CP3_REGS,
  CPA_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REGS, PR_REGS, T_REGS, MAC_REGS,
  FPUL_REGS, SIBCALL_REGS, GENERAL_REGS, FP0_REGS,
  FP_REGS, DF_HI_REGS, DF_REGS, FPSCR_REGS,
  GENERAL_FP_REGS, GENERAL_DF_REGS, TARGET_REGS, ALL_REGS,
  LIM_REG_CLASSES, NO_REGS, FPCC_REGS, I64_REGS,
  GENERAL_REGS, FP_REGS, EXTRA_FP_REGS, GENERAL_OR_FP_REGS,
  GENERAL_OR_EXTRA_FP_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  R0_REGS, R1_REGS, TWO_REGS, R2_REGS,
  EIGHT_REGS, R8_REGS, ICALL_REGS, GENERAL_REGS,
  CARRY_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES, NO_REGS,
  ALL_REGS, LIM_REG_CLASSES, NO_REGS, BR_REGS,
  FP_REGS, ACC_REG, SP_REG, RL_REGS,
  GR_REGS, AR_REGS, ALL_REGS, LIM_REG_CLASSES
}

Variables

enum processor_type alpha_cpu
int target_flags
enum alpha_trap_precision alpha_tp
enum alpha_fp_rounding_mode alpha_fprm
enum alpha_fp_trap_mode alpha_fptm
int alpha_tls_size
const char * alpha_cpu_string
const char * alpha_tune_string
const char * alpha_fprm_string
const char * alpha_fptm_string
const char * alpha_tp_string
const char * alpha_mlat_string
const char * alpha_tls_size_string
int alpha_memory_latency
struct alpha_compare alpha_compare
long alpha_arg_offset
long alpha_auto_offset
int num_source_filenames
int sdb_label_count


Define Documentation

#define ACCUMULATE_OUTGOING_ARGS   1

Definition at line 933 of file alpha.h.

#define ALIGN_SYMTABLE_OFFSET ( OFFSET   )     (((OFFSET) + 7) & ~7)

Definition at line 1762 of file alpha.h.

#define ALPHA_ARG_SIZE ( MODE,
TYPE,
NAMED   ) 

Value:

((MODE) == TFmode || (MODE) == TCmode ? 1       \
   : (((MODE) == BLKmode ? int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE)) \
      + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)

Definition at line 1037 of file alpha.h.

#define ALPHA_ROUND ( X   )     (((X) + 15) & ~ 15)

Definition at line 966 of file alpha.h.

#define ARG_POINTER_REGNUM   31

Definition at line 686 of file alpha.h.

#define ASM_APP_OFF   (TARGET_EXPLICIT_RELOCS ? "\t.set\tnomacro\n" : "")

Definition at line 1434 of file alpha.h.

#define ASM_APP_ON   (TARGET_EXPLICIT_RELOCS ? "\t.set\tmacro\n" : "")

Definition at line 1430 of file alpha.h.

#define ASM_COMMENT_START   " #"

Definition at line 1093 of file alpha.h.

#define ASM_DECLARE_FUNCTION_NAME ( FILE,
NAME,
DECL   )     alpha_start_function(FILE,NAME,DECL);

Definition at line 1097 of file alpha.h.

#define ASM_DECLARE_FUNCTION_SIZE ( FILE,
NAME,
DECL   )     alpha_end_function(FILE,NAME,DECL)

Definition at line 1102 of file alpha.h.

#define ASM_GENERATE_INTERNAL_LABEL ( LABEL,
PREFIX,
NUM   )     sprintf ((LABEL), "*$%s%ld", (PREFIX), (long)(NUM))

Definition at line 1492 of file alpha.h.

#define ASM_OUTPUT_ADDR_DIFF_ELT ( FILE,
BODY,
VALUE,
REL   ) 

Value:

fprintf (FILE, "\t.%s $L%d\n", TARGET_ABI_WINDOWS_NT ? "long" : "gprel32", \
     (VALUE))

Definition at line 1542 of file alpha.h.

#define ASM_OUTPUT_ADDR_VEC_ELT ( FILE,
VALUE   )     abort ()

Definition at line 1538 of file alpha.h.

#define ASM_OUTPUT_ALIGN ( FILE,
LOG   ) 

Value:

if ((LOG) != 0)     \
    fprintf (FILE, "\t.align %d\n", LOG);

Definition at line 1550 of file alpha.h.

#define ASM_OUTPUT_ASCII ( MYFILE,
MYSTRING,
MYLENGTH   ) 

Definition at line 1498 of file alpha.h.

#define ASM_OUTPUT_CASE_LABEL ( FILE,
PREFIX,
NUM,
TABLEINSN   )     { ASM_OUTPUT_ALIGN (FILE, 2); (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); }

Definition at line 1484 of file alpha.h.

#define ASM_OUTPUT_COMMON ( FILE,
NAME,
SIZE,
ROUNDED   ) 

Value:

( fputs ("\t.comm ", (FILE)),     \
  assemble_name ((FILE), (NAME)),   \
  fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE)))

Definition at line 1562 of file alpha.h.

#define ASM_OUTPUT_LABELREF ( STREAM,
NAME   ) 

Value:

do {            \
  const char *name_ = NAME;     \
  if (*name_ == '@' || *name_ == '%')   \
    name_ += 2;         \
  if (*name_ == '*')        \
    name_++;          \
  else            \
    fputs (user_label_prefix, STREAM);    \
  fputs (name_, STREAM);      \
} while (0)

Definition at line 1461 of file alpha.h.

#define ASM_OUTPUT_LOCAL ( FILE,
NAME,
SIZE,
ROUNDED   ) 

Value:

( fputs ("\t.lcomm ", (FILE)),        \
  assemble_name ((FILE), (NAME)),     \
  fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE)))

Definition at line 1570 of file alpha.h.

#define ASM_OUTPUT_SKIP ( FILE,
SIZE   )     fprintf (FILE, "\t.space "HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))

Definition at line 1556 of file alpha.h.

#define ASM_OUTPUT_SOURCE_FILENAME ( STREAM,
NAME   )     alpha_output_filename (STREAM, NAME)

Definition at line 1661 of file alpha.h.

#define ASM_STABD_OP   ((TARGET_GAS) ? "\t.stabd\t" : " #.stabd\t")

Definition at line 1682 of file alpha.h.

#define ASM_STABN_OP   ((TARGET_GAS) ? "\t.stabn\t" : " #.stabn\t")

Definition at line 1681 of file alpha.h.

#define ASM_STABS_OP   ((TARGET_GAS) ? "\t.stabs\t" : " #.stabs\t")

Definition at line 1680 of file alpha.h.

#define BASE_REG_CLASS   GENERAL_REGS

Definition at line 772 of file alpha.h.

#define BIGGEST_ALIGNMENT   128

Definition at line 536 of file alpha.h.

#define BITS_BIG_ENDIAN   0

Definition at line 497 of file alpha.h.

#define BRANCH_COST   5

Definition at line 901 of file alpha.h.

#define BYTES_BIG_ENDIAN   0

Definition at line 501 of file alpha.h.

#define CALL_USED_REGISTERS

Value:

{1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \
  1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }

Definition at line 606 of file alpha.h.

#define CAN_DEBUG_WITHOUT_FP

Definition at line 432 of file alpha.h.

#define CAN_ELIMINATE ( FROM,
TO   )     1

Definition at line 963 of file alpha.h.

#define CANNOT_CHANGE_MODE_CLASS ( FROM,
TO,
CLASS   ) 

Value:

Definition at line 876 of file alpha.h.

#define CANONICALIZE_COMPARISON ( CODE,
OP0,
OP1   ) 

Value:

do {                  \
    if (((CODE) == GE || (CODE) == GT || (CODE) == GEU || (CODE) == GTU) \
  && (GET_CODE (OP1) == REG || (OP1) == const0_rtx))    \
      {                 \
  rtx tem = (OP0);            \
  (OP0) = (OP1);              \
  (OP1) = tem;              \
  (CODE) = swap_condition (CODE);         \
      }                 \
    if (((CODE) == LT || (CODE) == LTU)         \
  && GET_CODE (OP1) == CONST_INT && INTVAL (OP1) == 256)    \
      {                 \
  (CODE) = (CODE) == LT ? LE : LEU;       \
  (OP1) = GEN_INT (255);            \
      }                 \
  } while (0)

Definition at line 1383 of file alpha.h.

#define CASE_VECTOR_MODE   SImode

Definition at line 1314 of file alpha.h.

#define CASE_VECTOR_PC_RELATIVE   1

Definition at line 1324 of file alpha.h.

#define CLASS_MAX_NREGS ( CLASS,
MODE   )     ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)

Definition at line 871 of file alpha.h.

#define CLZ_DEFINED_VALUE_AT_ZERO ( MODE,
VALUE   )     ((VALUE) = 64, TARGET_CIX)

#define CODE_MASK   0x8F300

Definition at line 1750 of file alpha.h.

#define CONDITIONAL_REGISTER_USAGE

Value:

{           \
  int i;          \
  if (! TARGET_FPREGS)        \
    for (i = 32; i < 63; i++)     \
      fixed_regs[i] = call_used_regs[i] = 1;  \
}

Definition at line 422 of file alpha.h.

#define CONST_DOUBLE_OK_FOR_LETTER_P   alpha_const_double_ok_for_letter_p

Definition at line 811 of file alpha.h.

#define CONST_OK_FOR_LETTER_P   alpha_const_ok_for_letter_p

Definition at line 803 of file alpha.h.

#define CONSTANT_ADDRESS_P ( X   ) 

Value:

(GET_CODE (X) == CONST_INT  \
   && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)

Definition at line 1209 of file alpha.h.

#define CPP_SPEC   "%(cpp_subtarget)"

Definition at line 99 of file alpha.h.

#define CPP_SUBTARGET_SPEC   ""

Definition at line 102 of file alpha.h.

#define CTZ_DEFINED_VALUE_AT_ZERO ( MODE,
VALUE   )     ((VALUE) = 64, TARGET_CIX)

#define CUMULATIVE_ARGS   int

Definition at line 1025 of file alpha.h.

#define DATA_SECTION_ASM_OP   "\t.data"

Definition at line 1444 of file alpha.h.

#define DBX_CONTIN_LENGTH   3000

Definition at line 1667 of file alpha.h.

#define DBX_DEBUGGING_INFO   1

Definition at line 1623 of file alpha.h.

#define DBX_OUTPUT_SOURCE_LINE ( STREAM,
LINE,
COUNTER   ) 

Value:

do {  \
  dbxout_begin_stabn_sline (LINE);        \
  dbxout_stab_value_internal_label ("LM", &COUNTER);    \
} while (0)

Definition at line 1651 of file alpha.h.

#define DEBUGGER_ARG_OFFSET ( OFFSET,
X   )     (OFFSET + alpha_arg_offset)

Definition at line 1648 of file alpha.h.

#define DEBUGGER_AUTO_OFFSET ( X   )     ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset)

Definition at line 1646 of file alpha.h.

#define DEFAULT_GDB_EXTENSIONS   1

Definition at line 1670 of file alpha.h.

#define DEFAULT_SIGNED_CHAR   1

Definition at line 1327 of file alpha.h.

#define DOUBLE_TYPE_SIZE   64

Definition at line 451 of file alpha.h.

#define DWARF_ALT_FRAME_RETURN_COLUMN   DWARF_FRAME_REGNUM (64)

Definition at line 1177 of file alpha.h.

Referenced by pa32_fallback_frame_state(), and pa_fallback_frame_state().

#define DWARF_FRAME_RETURN_COLUMN   DWARF_FRAME_REGNUM (26)

Definition at line 1176 of file alpha.h.

#define DWARF_ZERO_REG   31

Definition at line 1178 of file alpha.h.

Referenced by _Unwind_GetGR().

#define EH_RETURN_DATA_REGNO (  )     ((N) < 4 ? (N) + 16 : INVALID_REGNUM)

Definition at line 1181 of file alpha.h.

#define EH_RETURN_HANDLER_RTX

#define EH_RETURN_STACKADJ_RTX   gen_rtx_REG (Pmode, 28)

Definition at line 1182 of file alpha.h.

#define ELIMINABLE_REGS

#define EMPTY_FIELD_BOUNDARY   64

Definition at line 527 of file alpha.h.

#define EPILOGUE_USES ( REGNO   )     ((REGNO) == 26)

Definition at line 1128 of file alpha.h.

#define EXIT_IGNORE_STACK   1

Definition at line 1124 of file alpha.h.

#define EXPAND_BUILTIN_VA_START ( valist,
nextarg   )     alpha_va_start (valist, nextarg)

Definition at line 1610 of file alpha.h.

#define EXTENDED_COFF

Definition at line 1615 of file alpha.h.

#define EXTRA_CONSTRAINT   alpha_extra_constraint

Definition at line 829 of file alpha.h.

#define EXTRA_SPECS

Value:

{ "cpp_subtarget", CPP_SUBTARGET_SPEC },  \
  SUBTARGET_EXTRA_SPECS

Definition at line 400 of file alpha.h.

#define FIRST_PARM_OFFSET ( FNDECL   )     0

Definition at line 937 of file alpha.h.

#define FIRST_PSEUDO_REGISTER   64

Definition at line 589 of file alpha.h.

#define FIXED_REGISTERS

Value:

{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }

Definition at line 594 of file alpha.h.

#define FLOAT_STORE_FLAG_VALUE ( MODE   )     REAL_VALUE_ATOF ((TARGET_FLOAT_VAX ? "0.5" : "2.0"), (MODE))

Definition at line 1378 of file alpha.h.

#define FLOAT_TYPE_SIZE   32

Definition at line 450 of file alpha.h.

#define FRAME_POINTER_REGNUM   63

Definition at line 689 of file alpha.h.

#define FRAME_POINTER_REQUIRED   0

Definition at line 683 of file alpha.h.

#define FUNCTION_ARG ( CUM,
MODE,
TYPE,
NAMED   )     function_arg((CUM), (MODE), (TYPE), (NAMED))

Definition at line 1067 of file alpha.h.

#define FUNCTION_ARG_ADVANCE ( CUM,
MODE,
TYPE,
NAMED   ) 

Value:

((CUM) +=                 \
   (targetm.calls.must_pass_in_stack (MODE, TYPE))      \
    ? 6 : ALPHA_ARG_SIZE (MODE, TYPE, NAMED))

Definition at line 1046 of file alpha.h.

#define FUNCTION_ARG_REGNO_P (  )     (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32))

Definition at line 1012 of file alpha.h.

#define FUNCTION_BOUNDARY   32

Definition at line 524 of file alpha.h.

#define FUNCTION_MODE   Pmode

Definition at line 1408 of file alpha.h.

#define FUNCTION_PROFILER ( FILE,
LABELNO   ) 

Definition at line 1117 of file alpha.h.

#define FUNCTION_VALUE ( VALTYPE,
FUNC   )     function_value (VALTYPE, FUNC, VOIDmode)

Definition at line 994 of file alpha.h.

#define FUNCTION_VALUE_REGNO_P (  )     ((N) == 0 || (N) == 1 || (N) == 32 || (N) == 33)

Definition at line 1006 of file alpha.h.

#define GLOBAL_ASM_OP   "\t.globl "

Definition at line 1474 of file alpha.h.

#define GO_IF_LEGITIMATE_ADDRESS ( MODE,
X,
WIN   ) 

Value:

do {            \
  if (alpha_legitimate_address_p (MODE, X, 0))  \
    goto WIN;         \
} while (0)

Definition at line 1269 of file alpha.h.

#define GO_IF_MODE_DEPENDENT_ADDRESS ( ADDR,
LABEL   )     { if (GET_CODE (ADDR) == AND) goto LABEL; }

Definition at line 1309 of file alpha.h.

#define HARD_FRAME_POINTER_REGNUM   15

Definition at line 677 of file alpha.h.

#define HARD_REGNO_MODE_OK ( REGNO,
MODE   ) 

Value:

((REGNO) >= 32 && (REGNO) <= 62           \
   ? (MODE) == SFmode || (MODE) == DFmode || (MODE) == DImode   \
     || (MODE) == SCmode || (MODE) == DCmode        \
   : 1)

Definition at line 650 of file alpha.h.

#define HARD_REGNO_NREGS ( REGNO,
MODE   )     ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)

Definition at line 643 of file alpha.h.

#define HAVE_AS_TLS   0

Definition at line 283 of file alpha.h.

#define INCOMING_RETURN_ADDR_RTX   gen_rtx_REG (Pmode, 26)

Definition at line 1175 of file alpha.h.

#define INDEX_REG_CLASS   NO_REGS

Definition at line 771 of file alpha.h.

#define INIT_CUMULATIVE_ARGS ( CUM,
FNTYPE,
LIBNAME,
INDIRECT,
N_NAMED_ARGS   )     (CUM) = 0

Definition at line 1031 of file alpha.h.

#define INITIAL_ELIMINATION_OFFSET ( FROM,
TO,
OFFSET   )     ((OFFSET) = alpha_initial_elimination_offset(FROM, TO))

Definition at line 970 of file alpha.h.

#define INITIALIZE_TRAMPOLINE ( TRAMP,
FNADDR,
CXT   )     alpha_initialize_trampoline (TRAMP, FNADDR, CXT, 16, 24, 8)

Definition at line 1164 of file alpha.h.

#define INT_TYPE_SIZE   32

Definition at line 437 of file alpha.h.

#define LEGITIMATE_CONSTANT_P   alpha_legitimate_constant_p

Definition at line 1216 of file alpha.h.

#define LEGITIMIZE_ADDRESS ( X,
OLDX,
MODE,
WIN   ) 

Value:

do {                \
  rtx new_x = alpha_legitimize_address (X, NULL_RTX, MODE); \
  if (new_x)              \
    {               \
      X = new_x;            \
      goto WIN;             \
    }               \
} while (0)

Definition at line 1280 of file alpha.h.

#define LEGITIMIZE_RELOAD_ADDRESS ( X,
MODE,
OPNUM,
TYPE,
IND_L,
WIN   ) 

Value:

do {                       \
  rtx new_x = alpha_legitimize_reload_address (X, MODE, OPNUM, TYPE, IND_L); \
  if (new_x)                     \
    {                      \
      X = new_x;                   \
      goto WIN;                    \
    }                      \
} while (0)

Definition at line 1294 of file alpha.h.

#define LIBCALL_VALUE ( MODE   )     function_value (NULL, NULL, MODE)

Definition at line 1000 of file alpha.h.

#define LIBGCC2_LONG_DOUBLE_TYPE_SIZE   64

Definition at line 459 of file alpha.h.

#define LOAD_EXTEND_OP ( MODE   )     ((MODE) == SImode ? SIGN_EXTEND : ZERO_EXTEND)

Definition at line 1363 of file alpha.h.

#define LONG_DOUBLE_TYPE_SIZE   (TARGET_LONG_DOUBLE_128 ? 128 : 64)

Definition at line 452 of file alpha.h.

#define LONG_LONG_TYPE_SIZE   64

Definition at line 440 of file alpha.h.

#define MASK_BUILD_CONSTANTS   (1 << 6)

Definition at line 191 of file alpha.h.

#define MASK_BWX   (1 << 8)

Definition at line 203 of file alpha.h.

#define MASK_CIX   (1 << 11)

Definition at line 215 of file alpha.h.

#define MASK_CPU_EV5   (1 << 28)

Definition at line 241 of file alpha.h.

#define MASK_CPU_EV6   (1 << 29)

Definition at line 245 of file alpha.h.

#define MASK_EXPLICIT_RELOCS   (1 << 12)

Definition at line 219 of file alpha.h.

#define MASK_FIX   (1 << 10)

Definition at line 211 of file alpha.h.

#define MASK_FLOAT_VAX   (1 << 7)

Definition at line 197 of file alpha.h.

#define MASK_FP   (1 << 0)

Definition at line 158 of file alpha.h.

#define MASK_FPREGS   (1 << 1)

Definition at line 165 of file alpha.h.

#define MASK_GAS   (1 << 2)

Definition at line 170 of file alpha.h.

#define MASK_IEEE   (1 << 4)

Definition at line 180 of file alpha.h.

#define MASK_IEEE_CONFORMANT   (1 << 3)

Definition at line 175 of file alpha.h.

#define MASK_IEEE_WITH_INEXACT   (1 << 5)

Definition at line 185 of file alpha.h.

#define MASK_LONG_DOUBLE_128   (1 << 16)

Definition at line 236 of file alpha.h.

#define MASK_MAX   (1 << 9)

Definition at line 207 of file alpha.h.

#define MASK_SMALL_DATA   (1 << 13)

Definition at line 223 of file alpha.h.

#define MASK_SMALL_TEXT   (1 << 15)

Definition at line 231 of file alpha.h.

#define MASK_SUPPORT_ARCH   (1 << 30)

Definition at line 250 of file alpha.h.

#define MASK_TLS_KERNEL   (1 << 14)

Definition at line 227 of file alpha.h.

#define MAX_FIXED_MODE_SIZE   GET_MODE_BITSIZE (TImode)

Definition at line 1344 of file alpha.h.

#define MAX_REGS_PER_ADDRESS   1

Definition at line 1203 of file alpha.h.

#define MEMORY_MOVE_COST ( MODE,
CLASS,
IN   )     (2*alpha_memory_latency)

Definition at line 898 of file alpha.h.

#define MINIMUM_ATOMIC_ALIGNMENT   ((unsigned int) (TARGET_BWX ? 8 : 32))

Definition at line 540 of file alpha.h.

#define MIPS_DEBUGGING_INFO   1

Definition at line 1624 of file alpha.h.

#define MIPS_IS_STAB ( sym   )     (((sym)->index & 0xFFF00) == CODE_MASK)

Definition at line 1751 of file alpha.h.

#define MIPS_MARK_STAB ( code   )     ((code)+CODE_MASK)

Definition at line 1752 of file alpha.h.

#define MIPS_UNMARK_STAB ( code   )     ((code)-CODE_MASK)

Definition at line 1753 of file alpha.h.

#define MODES_TIEABLE_P ( MODE1,
MODE2   ) 

Value:

(HARD_REGNO_MODE_OK (32, (MODE1))       \
   ? HARD_REGNO_MODE_OK (32, (MODE2))       \
   : 1)

Definition at line 662 of file alpha.h.

#define MOVE_MAX   8

Definition at line 1332 of file alpha.h.

#define MOVE_RATIO   (TARGET_BWX ? 7 : 2)

Definition at line 1340 of file alpha.h.

#define N_REG_CLASSES   (int) LIM_REG_CLASSES

Definition at line 735 of file alpha.h.

#define NM_FLAGS   "-pg"

Definition at line 1618 of file alpha.h.

#define NO_DBX_FUNCTION_END   1

Definition at line 1673 of file alpha.h.

#define NO_FUNCTION_CSE

Definition at line 1420 of file alpha.h.

#define NO_IMPLICIT_EXTERN_C

Definition at line 1765 of file alpha.h.

#define NO_PROFILE_COUNTERS   1

Definition at line 1111 of file alpha.h.

#define NONSTRICT_REG_OK_FOR_BASE_P ( X   )     (REGNO (X) < 32 || REGNO (X) == 63 || REGNO (X) >= FIRST_PSEUDO_REGISTER)

Definition at line 1237 of file alpha.h.

#define NONSTRICT_REG_OK_FP_BASE_P ( X   ) 

Value:

(REGNO (X) == 31 || REGNO (X) == 63   \
   || (REGNO (X) >= FIRST_PSEUDO_REGISTER \
       && REGNO (X) < LAST_VIRTUAL_REGISTER))

Definition at line 1245 of file alpha.h.

#define OBJECT_FORMAT_COFF

Definition at line 1614 of file alpha.h.

#define OPTION_DEFAULT_SPECS

Value:

{"cpu", "%{!mcpu=*:-mcpu=%(VALUE)}" }, \
  {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }

Definition at line 382 of file alpha.h.

#define OVERRIDE_OPTIONS   override_options ()

Definition at line 414 of file alpha.h.

#define PARM_BOUNDARY   64

Definition at line 518 of file alpha.h.

#define PCC_BITFIELD_TYPE_MATTERS   1

Definition at line 533 of file alpha.h.

#define PIC_OFFSET_TABLE_REGNUM   29

Definition at line 699 of file alpha.h.

#define Pmode   DImode

Definition at line 1404 of file alpha.h.

#define POINTER_SIZE   64

Definition at line 515 of file alpha.h.

#define PREFERRED_DEBUGGING_TYPE   SDB_DEBUG

Definition at line 1627 of file alpha.h.

#define PREFERRED_RELOAD_CLASS   alpha_preferred_reload_class

Definition at line 836 of file alpha.h.

#define PRINT_OPERAND ( FILE,
X,
CODE   )     print_operand (FILE, X, CODE)

Definition at line 1580 of file alpha.h.

#define PRINT_OPERAND_ADDRESS ( FILE,
ADDR   )     print_operand_address((FILE), (ADDR))

Definition at line 1606 of file alpha.h.

#define PRINT_OPERAND_PUNCT_VALID_P ( CODE   ) 

Value:

((CODE) == '/' || (CODE) == ',' || (CODE) == '-' || (CODE) == '~' \
   || (CODE) == '#' || (CODE) == '*' || (CODE) == '&' || (CODE) == '+')

Definition at line 1600 of file alpha.h.

#define PROFILE_BEFORE_PROLOGUE   1

Definition at line 1107 of file alpha.h.

#define PROMOTE_MODE ( MODE,
UNSIGNEDP,
TYPE   ) 

Value:

if (GET_MODE_CLASS (MODE) == MODE_INT       \
      && (TYPE == NULL || TREE_CODE (TYPE) != VECTOR_TYPE)  \
      && GET_MODE_SIZE (MODE) < UNITS_PER_WORD)     \
    {               \
      if ((MODE) == SImode)         \
  (UNSIGNEDP) = 0;          \
      (MODE) = DImode;            \
    }

Definition at line 482 of file alpha.h.

#define PUT_SDB_BLOCK_END ( LINE   ) 

Value:

do {              \
  fprintf (asm_out_file,        \
     "$Le%d:\n\t%s.bend\t$Le%d\t%d\n",    \
     sdb_label_count,       \
     (TARGET_GAS) ? "" : "#",     \
     sdb_label_count,       \
     (LINE));         \
  sdb_label_count++;          \
} while (0)

Definition at line 1727 of file alpha.h.

#define PUT_SDB_BLOCK_START ( LINE   ) 

Value:

do {              \
  fprintf (asm_out_file,        \
     "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n",   \
     sdb_label_count,       \
     (TARGET_GAS) ? "" : "#",     \
     sdb_label_count,       \
     (LINE));         \
  sdb_label_count++;          \
} while (0)

Definition at line 1716 of file alpha.h.

#define PUT_SDB_DEF ( a   ) 

Value:

do {              \
  fprintf (asm_out_file, "\t%s.def\t",      \
     (TARGET_GAS) ? "" : "#");      \
  ASM_OUTPUT_LABELREF (asm_out_file, a);    \
  fputc (';', asm_out_file);        \
} while (0)

Definition at line 1690 of file alpha.h.

#define PUT_SDB_EPILOGUE_END ( NAME   )     ((void)(NAME))

Definition at line 1742 of file alpha.h.

#define PUT_SDB_FUNCTION_END ( LINE   ) 

Definition at line 1740 of file alpha.h.

#define PUT_SDB_FUNCTION_START ( LINE   ) 

Definition at line 1738 of file alpha.h.

#define PUT_SDB_PLAIN_DEF ( a   ) 

Value:

do {              \
  fprintf (asm_out_file, "\t%s.def\t.%s;",    \
     (TARGET_GAS) ? "" : "#", (a));   \
} while (0)

Definition at line 1698 of file alpha.h.

#define PUT_SDB_TYPE ( a   ) 

Value:

do {              \
  fprintf (asm_out_file, "\t.type\t0x%x;", (a));  \
} while (0)

Definition at line 1704 of file alpha.h.

#define READONLY_DATA_SECTION_ASM_OP   "\t.rdata"

Definition at line 1440 of file alpha.h.

#define REG_ALLOC_ORDER

Value:

{ \
   1, 2, 3, 4, 5, 6, 7, 8,  /* nonsaved integer registers */  \
   22, 23, 24, 25, 28,    /* likewise */        \
   0,       /* likewise, but return value */  \
   21, 20, 19, 18, 17, 16,  /* likewise, but input args */    \
   27,        /* likewise, but OSF procedure value */ \
                  \
   42, 43, 44, 45, 46, 47,  /* nonsaved floating-point registers */ \
   54, 55, 56, 57, 58, 59,  /* likewise */        \
   60, 61, 62,      /* likewise */        \
   32, 33,      /* likewise, but return values */ \
   53, 52, 51, 50, 49, 48,  /* likewise, but input args */    \
                  \
   9, 10, 11, 12, 13, 14, /* saved integer registers */   \
   26,        /* return address */      \
   15,        /* hard frame pointer */    \
                  \
   34, 35, 36, 37, 38, 39,  /* saved floating-point registers */  \
   40, 41,      /* likewise */        \
                  \
   29, 30, 31, 63   /* gp, sp, ap, sfp */     \
}

Definition at line 615 of file alpha.h.

#define REG_CLASS_CONTENTS

Value:

{ {0x00000000, 0x00000000}, /* NO_REGS */   \
  {0x00000001, 0x00000000}, /* R0_REG */    \
  {0x01000000, 0x00000000}, /* R24_REG */   \
  {0x02000000, 0x00000000}, /* R25_REG */   \
  {0x08000000, 0x00000000}, /* R27_REG */   \
  {0xffffffff, 0x80000000}, /* GENERAL_REGS */  \
  {0x00000000, 0x7fffffff}, /* FLOAT_REGS */  \
  {0xffffffff, 0xffffffff} }

Definition at line 747 of file alpha.h.

#define REG_CLASS_FROM_LETTER (  ) 

Value:

((C) == 'a' ? R24_REG     \
  : (C) == 'b' ? R25_REG    \
  : (C) == 'c' ? R27_REG    \
  : (C) == 'f' ? FLOAT_REGS   \
  : (C) == 'v' ? R0_REG     \
  : NO_REGS)

Definition at line 776 of file alpha.h.

#define REG_CLASS_NAMES

Value:

{"NO_REGS", "R0_REG", "R24_REG", "R25_REG", "R27_REG",  \
  "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" }

Definition at line 739 of file alpha.h.

#define REG_OK_FOR_BASE_P ( X   )     NONSTRICT_REG_OK_FOR_BASE_P (X)

Definition at line 1256 of file alpha.h.

#define REG_OK_FOR_INDEX_P ( X   )     0

Definition at line 1233 of file alpha.h.

#define REGISTER_MOVE_COST ( MODE,
CLASS1,
CLASS2   ) 

Value:

(((CLASS1) == FLOAT_REGS) == ((CLASS2) == FLOAT_REGS) ? 2 \
   : TARGET_FIX ? ((CLASS1) == FLOAT_REGS ? 6 : 8)    \
   : 4+2*alpha_memory_latency)

Definition at line 887 of file alpha.h.

#define REGISTER_NAMES

Value:

{"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8",    \
 "$9", "$10", "$11", "$12", "$13", "$14", "$15",    \
 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23",  \
 "$24", "$25", "$26", "$27", "$28", "$29", "$30", "AP",   \
 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \
 "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",   \
 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\
 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "FP"}

Definition at line 1449 of file alpha.h.

#define REGNO_OK_FOR_BASE_P ( REGNO   ) 

Value:

((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32  \
 || (REGNO) == 63 || reg_renumber[REGNO] == 63)

Definition at line 1198 of file alpha.h.

#define REGNO_OK_FOR_INDEX_P ( REGNO   )     0

Definition at line 1197 of file alpha.h.

#define REGNO_REG_CLASS ( REGNO   ) 

Value:

((REGNO) == 0 ? R0_REG        \
  : (REGNO) == 24 ? R24_REG     \
  : (REGNO) == 25 ? R25_REG     \
  : (REGNO) == 27 ? R27_REG     \
  : (REGNO) >= 32 && (REGNO) <= 62 ? FLOAT_REGS \
  : GENERAL_REGS)

Definition at line 762 of file alpha.h.

#define RETURN_ADDR_RTX   alpha_return_addr

Definition at line 1172 of file alpha.h.

#define RETURN_POPS_ARGS ( FUNDECL,
FUNTYPE,
SIZE   )     0

Definition at line 984 of file alpha.h.

#define SDB_ALLOW_FORWARD_REFERENCES

Definition at line 1685 of file alpha.h.

#define SDB_ALLOW_UNKNOWN_REFERENCES

Definition at line 1688 of file alpha.h.

#define SDB_DEBUGGING_INFO   1

Definition at line 1622 of file alpha.h.

#define SDB_OUTPUT_SOURCE_LINE ( STREAM,
LINE   )     fprintf (STREAM, "\t.loc\t%d %d\n", num_source_filenames, LINE)

Definition at line 1658 of file alpha.h.

Referenced by alpha_start_function(), and mips_output_function_prologue().

#define SECONDARY_INPUT_RELOAD_CLASS ( CLASS,
MODE,
IN   )     secondary_reload_class((CLASS), (MODE), (IN), 1)

Definition at line 845 of file alpha.h.

#define SECONDARY_MEMORY_NEEDED ( CLASS1,
CLASS2,
MODE   ) 

Value:

(! TARGET_FIX && (((CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS) \
                   || ((CLASS2) == FLOAT_REGS && (CLASS1) != FLOAT_REGS)))

Definition at line 854 of file alpha.h.

#define SECONDARY_MEMORY_NEEDED_MODE ( MODE   ) 

Value:

Definition at line 863 of file alpha.h.

#define SECONDARY_OUTPUT_RELOAD_CLASS ( CLASS,
MODE,
OUT   )     secondary_reload_class((CLASS), (MODE), (OUT), 0)

Definition at line 848 of file alpha.h.

#define SHASH_SIZE   511

Definition at line 1757 of file alpha.h.

#define SHIFT_COUNT_TRUNCATED   1

Definition at line 1424 of file alpha.h.

#define SHORT_IMMEDIATES_SIGN_EXTEND

Definition at line 1366 of file alpha.h.

#define SLOW_BYTE_ACCESS   1

Definition at line 1353 of file alpha.h.

#define SLOW_UNALIGNED_ACCESS ( MODE,
ALIGN   )     1

Definition at line 562 of file alpha.h.

#define STACK_BOUNDARY   128

Definition at line 521 of file alpha.h.

#define STACK_CHECK_BUILTIN   1

Definition at line 928 of file alpha.h.

#define STACK_GROWS_DOWNWARD

Definition at line 907 of file alpha.h.

#define STACK_POINTER_REGNUM   30

Definition at line 674 of file alpha.h.

#define STARTING_FRAME_OFFSET   0

Definition at line 920 of file alpha.h.

#define STATIC_CHAIN_REGNUM   1

Definition at line 695 of file alpha.h.

#define STRICT_ALIGNMENT   1

Definition at line 556 of file alpha.h.

#define STRICT_REG_OK_FOR_BASE_P ( X   )     REGNO_OK_FOR_BASE_P (REGNO (X))

Definition at line 1251 of file alpha.h.

#define STRUCTURE_SIZE_BOUNDARY   8

Definition at line 530 of file alpha.h.

 
#define SUBTARGET_LANGUAGE_CPP_BUILTINS (  ) 

Value:

do              \
    {             \
      if (preprocessing_asm_p ())     \
  builtin_define_std ("LANGUAGE_ASSEMBLY"); \
      else if (c_dialect_cxx ())      \
  {           \
    builtin_define ("__LANGUAGE_C_PLUS_PLUS");  \
    builtin_define ("__LANGUAGE_C_PLUS_PLUS__");  \
  }           \
      else            \
  builtin_define_std ("LANGUAGE_C");    \
      if (c_dialect_objc ())        \
  {           \
    builtin_define ("__LANGUAGE_OBJECTIVE_C");  \
    builtin_define ("__LANGUAGE_OBJECTIVE_C__");  \
  }           \
    }             \
  while (0)

Definition at line 78 of file alpha.h.

#define TARGET_ABI_OPEN_VMS   0

Definition at line 255 of file alpha.h.

#define TARGET_ABI_OSF

Value:

Definition at line 257 of file alpha.h.

#define TARGET_ABI_UNICOSMK   0

Definition at line 256 of file alpha.h.

#define TARGET_ABI_WINDOWS_NT   0

Definition at line 254 of file alpha.h.

#define TARGET_AS_CAN_SUBTRACT_LABELS   TARGET_GAS

Definition at line 262 of file alpha.h.

#define TARGET_AS_SLASH_BEFORE_SUFFIX   TARGET_GAS

Definition at line 265 of file alpha.h.

#define TARGET_BUILD_CONSTANTS   ((target_flags & MASK_BUILD_CONSTANTS) != 0)

Definition at line 192 of file alpha.h.

#define TARGET_BWX   ((target_flags & MASK_BWX) != 0)

Definition at line 204 of file alpha.h.

#define TARGET_CAN_FAULT_IN_PROLOGUE   0

Definition at line 268 of file alpha.h.

#define TARGET_CIX   ((target_flags & MASK_CIX) != 0)

Definition at line 216 of file alpha.h.

 
#define TARGET_CPU_CPP_BUILTINS (  ) 

Definition at line 24 of file alpha.h.

#define TARGET_CPU_DEFAULT   0

Definition at line 342 of file alpha.h.

#define TARGET_CPU_EV5   ((target_flags & MASK_CPU_EV5) != 0)

Definition at line 242 of file alpha.h.

#define TARGET_CPU_EV6   ((target_flags & MASK_CPU_EV6) != 0)

Definition at line 246 of file alpha.h.

#define TARGET_DEFAULT   MASK_FP|MASK_FPREGS

Definition at line 339 of file alpha.h.

#define TARGET_DEFAULT_EXPLICIT_RELOCS   0

Definition at line 349 of file alpha.h.

#define TARGET_EXPLICIT_RELOCS   ((target_flags & MASK_EXPLICIT_RELOCS) != 0)

Definition at line 220 of file alpha.h.

#define TARGET_FIX   ((target_flags & MASK_FIX) != 0)

Definition at line 212 of file alpha.h.

#define TARGET_FIXUP_EV5_PREFETCH   0

Definition at line 280 of file alpha.h.

#define TARGET_FLOAT_FORMAT   (TARGET_FLOAT_VAX ? VAX_FLOAT_FORMAT : IEEE_FLOAT_FORMAT)

Definition at line 443 of file alpha.h.

#define TARGET_FLOAT_VAX   ((target_flags & MASK_FLOAT_VAX) != 0)

Definition at line 198 of file alpha.h.

#define TARGET_FP   ((target_flags & MASK_FP) != 0)

Definition at line 159 of file alpha.h.

#define TARGET_FPREGS   ((target_flags & MASK_FPREGS) != 0)

Definition at line 166 of file alpha.h.

#define TARGET_GAS   ((target_flags & MASK_GAS) != 0)

Definition at line 171 of file alpha.h.

#define TARGET_HAS_XFLOATING_LIBS   TARGET_LONG_DOUBLE_128

Definition at line 271 of file alpha.h.

#define TARGET_IEEE   ((target_flags & MASK_IEEE) != 0)

Definition at line 181 of file alpha.h.

#define TARGET_IEEE_CONFORMANT   ((target_flags & MASK_IEEE_CONFORMANT) != 0)

Definition at line 176 of file alpha.h.

#define TARGET_IEEE_WITH_INEXACT   ((target_flags & MASK_IEEE_WITH_INEXACT) != 0)

Definition at line 186 of file alpha.h.

#define TARGET_LD_BUGGY_LDGP   0

Definition at line 277 of file alpha.h.

#define TARGET_LONG_DOUBLE_128   ((target_flags & MASK_LONG_DOUBLE_128) != 0)

Definition at line 237 of file alpha.h.

#define TARGET_MAX   ((target_flags & MASK_MAX) != 0)

Definition at line 208 of file alpha.h.

#define TARGET_OPTIONS

Value:

{             \
  {"cpu=",    &alpha_cpu_string,    \
   N_("Use features of and schedule given CPU"), 0},  \
  {"tune=",   &alpha_tune_string,   \
   N_("Schedule given CPU"), 0},      \
  {"fp-rounding-mode=", &alpha_fprm_string,   \
   N_("Control the generated fp rounding mode"), 0},  \
  {"fp-trap-mode=", &alpha_fptm_string,   \
   N_("Control the IEEE trap mode"), 0},    \
  {"trap-precision=", &alpha_tp_string,   \
   N_("Control the precision given to fp exceptions"), 0},  \
  {"memory-latency=", &alpha_mlat_string,   \
   N_("Tune expected memory latency"), 0},    \
  {"tls-size=",   &alpha_tls_size_string,   \
   N_("Specify bit size of immediate TLS offsets"), 0}, \
}

Definition at line 361 of file alpha.h.

#define TARGET_PROFILING_NEEDS_GP   0

Definition at line 274 of file alpha.h.

#define TARGET_SMALL_DATA   ((target_flags & MASK_SMALL_DATA) != 0)

Definition at line 224 of file alpha.h.

#define TARGET_SMALL_TEXT   ((target_flags & MASK_SMALL_TEXT) != 0)

Definition at line 232 of file alpha.h.

#define TARGET_SUPPORT_ARCH   ((target_flags & MASK_SUPPORT_ARCH) != 0)

Definition at line 251 of file alpha.h.

#define TARGET_SWITCHES

Definition at line 292 of file alpha.h.

#define TARGET_TLS_KERNEL   ((target_flags & MASK_TLS_KERNEL) != 0)

Definition at line 228 of file alpha.h.

#define TARGET_VERSION

Definition at line 109 of file alpha.h.

#define TEXT_SECTION_ASM_OP   "\t.text"

Definition at line 1436 of file alpha.h.

#define THASH_SIZE   55

Definition at line 1758 of file alpha.h.

#define TRAMPOLINE_ALIGNMENT   64

Definition at line 1158 of file alpha.h.

#define TRAMPOLINE_SECTION   text_section

Definition at line 1150 of file alpha.h.

#define TRAMPOLINE_SIZE   32

Definition at line 1154 of file alpha.h.

#define TRAMPOLINE_TEMPLATE ( FILE   ) 

Value:

do {            \
  fprintf (FILE, "\tldq $1,24($27)\n");   \
  fprintf (FILE, "\tldq $27,16($27)\n");  \
  fprintf (FILE, "\tjmp $31,($27),0\n");  \
  fprintf (FILE, "\tnop\n");      \
  fprintf (FILE, "\t.quad 0,0\n");    \
} while (0)

Definition at line 1138 of file alpha.h.

#define TRULY_NOOP_TRUNCATION ( OUTPREC,
INPREC   )     1

Definition at line 1370 of file alpha.h.

#define UNITS_PER_SIMD_WORD   UNITS_PER_WORD

#define UNITS_PER_WORD   8

Definition at line 511 of file alpha.h.

#define USER_LABEL_PREFIX   ""

Definition at line 1478 of file alpha.h.

#define WCHAR_TYPE   "unsigned int"

Definition at line 465 of file alpha.h.

#define WCHAR_TYPE_SIZE   32

Definition at line 466 of file alpha.h.

#define WIDEST_HARDWARE_FP_SIZE   64

Definition at line 463 of file alpha.h.

#define WORD_REGISTER_OPERATIONS

Definition at line 1357 of file alpha.h.

#define WORD_SWITCH_TAKES_ARG ( STR   )     (!strcmp (STR, "rpath") || DEFAULT_WORD_SWITCH_TAKES_ARG(STR))

Definition at line 105 of file alpha.h.

#define WORDS_BIG_ENDIAN   0

Definition at line 508 of file alpha.h.


Enumeration Type Documentation

Enumerator:
ALPHA_FPRM_NORM 
ALPHA_FPRM_MINF 
ALPHA_FPRM_CHOP 
ALPHA_FPRM_DYN 
ALPHA_FPRM_NORM 
ALPHA_FPRM_MINF 
ALPHA_FPRM_CHOP 
ALPHA_FPRM_DYN 
ALPHA_FPRM_NORM 
ALPHA_FPRM_MINF 
ALPHA_FPRM_CHOP 
ALPHA_FPRM_DYN 
ALPHA_FPRM_NORM 
ALPHA_FPRM_MINF 
ALPHA_FPRM_CHOP 
ALPHA_FPRM_DYN 

Definition at line 133 of file alpha.h.

Enumerator:
ALPHA_FPTM_N 
ALPHA_FPTM_U 
ALPHA_FPTM_SU 
ALPHA_FPTM_SUI 
ALPHA_FPTM_N 
ALPHA_FPTM_U 
ALPHA_FPTM_SU 
ALPHA_FPTM_SUI 
ALPHA_FPTM_N 
ALPHA_FPTM_U 
ALPHA_FPTM_SU 
ALPHA_FPTM_SUI 
ALPHA_FPTM_N 
ALPHA_FPTM_U 
ALPHA_FPTM_SU 
ALPHA_FPTM_SUI 

Definition at line 141 of file alpha.h.

Enumerator:
ALPHA_TP_PROG 
ALPHA_TP_FUNC 
ALPHA_TP_INSN 
ALPHA_TP_PROG 
ALPHA_TP_FUNC 
ALPHA_TP_INSN 
ALPHA_TP_PROG 
ALPHA_TP_FUNC 
ALPHA_TP_INSN 
ALPHA_TP_PROG 
ALPHA_TP_FUNC 
ALPHA_TP_INSN 

Definition at line 126 of file alpha.h.

Enumerator:
PROCESSOR_EV4 
PROCESSOR_EV5 
PROCESSOR_EV6 
PROCESSOR_I386 
PROCESSOR_I486 
PROCESSOR_PENTIUM 
PROCESSOR_PENTIUMPRO 
PROCESSOR_K6 
PROCESSOR_ATHLON 
PROCESSOR_PENTIUM4 
PROCESSOR_max 
PROCESSOR_M88100 
PROCESSOR_M88110 
PROCESSOR_M88000 
PROCESSOR_700 
PROCESSOR_7100 
PROCESSOR_7100LC 
PROCESSOR_7200 
PROCESSOR_8000 
PROCESSOR_RIOS1 
PROCESSOR_RIOS2 
PROCESSOR_RS64A 
PROCESSOR_MPCCORE 
PROCESSOR_PPC403 
PROCESSOR_PPC405 
PROCESSOR_PPC601 
PROCESSOR_PPC603 
PROCESSOR_PPC604 
PROCESSOR_PPC604e 
PROCESSOR_PPC620 
PROCESSOR_PPC630 
PROCESSOR_PPC750 
PROCESSOR_PPC7400 
PROCESSOR_PPC7450 
PROCESSOR_SH1 
PROCESSOR_SH2 
PROCESSOR_SH3 
PROCESSOR_SH3E 
PROCESSOR_SH4 
PROCESSOR_SH5 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_V7 
PROCESSOR_CYPRESS 
PROCESSOR_V8 
PROCESSOR_SUPERSPARC 
PROCESSOR_SPARCLITE 
PROCESSOR_F930 
PROCESSOR_F934 
PROCESSOR_HYPERSPARC 
PROCESSOR_SPARCLITE86X 
PROCESSOR_SPARCLET 
PROCESSOR_TSC701 
PROCESSOR_V9 
PROCESSOR_ULTRASPARC 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_EV4 
PROCESSOR_EV5 
PROCESSOR_EV6 
PROCESSOR_I386 
PROCESSOR_I486 
PROCESSOR_PENTIUM 
PROCESSOR_PENTIUMPRO 
PROCESSOR_K6 
PROCESSOR_ATHLON 
PROCESSOR_PENTIUM4 
PROCESSOR_max 
PROCESSOR_M88100 
PROCESSOR_M88110 
PROCESSOR_M88000 
PROCESSOR_700 
PROCESSOR_7100 
PROCESSOR_7100LC 
PROCESSOR_7200 
PROCESSOR_8000 
PROCESSOR_RIOS1 
PROCESSOR_RIOS2 
PROCESSOR_RS64A 
PROCESSOR_MPCCORE 
PROCESSOR_PPC403 
PROCESSOR_PPC405 
PROCESSOR_PPC601 
PROCESSOR_PPC603 
PROCESSOR_PPC604 
PROCESSOR_PPC604e 
PROCESSOR_PPC620 
PROCESSOR_PPC630 
PROCESSOR_PPC750 
PROCESSOR_PPC7400 
PROCESSOR_PPC7450 
PROCESSOR_SH1 
PROCESSOR_SH2 
PROCESSOR_SH3 
PROCESSOR_SH3E 
PROCESSOR_SH4 
PROCESSOR_SH5 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_V7 
PROCESSOR_CYPRESS 
PROCESSOR_V8 
PROCESSOR_SUPERSPARC 
PROCESSOR_SPARCLITE 
PROCESSOR_F930 
PROCESSOR_F934 
PROCESSOR_HYPERSPARC 
PROCESSOR_SPARCLITE86X 
PROCESSOR_SPARCLET 
PROCESSOR_TSC701 
PROCESSOR_V9 
PROCESSOR_ULTRASPARC 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_DEFAULT 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R8000 
PROCESSOR_R4KC 
PROCESSOR_R5KC 
PROCESSOR_R20KC 
PROCESSOR_SR71000 
PROCESSOR_SB1 
PROCESSOR_EV4 
PROCESSOR_EV5 
PROCESSOR_EV6 
PROCESSOR_MAX 
ARM_CORE 
PROCESSOR_I386 
PROCESSOR_I486 
PROCESSOR_PENTIUM 
PROCESSOR_PENTIUMPRO 
PROCESSOR_K6 
PROCESSOR_ATHLON 
PROCESSOR_PENTIUM4 
PROCESSOR_K8 
PROCESSOR_NOCONA 
PROCESSOR_max 
PROCESSOR_ITANIUM 
PROCESSOR_ITANIUM2 
PROCESSOR_max 
PROCESSOR_DEFAULT 
PROCESSOR_IQ2000 
PROCESSOR_IQ10 
PROCESSOR_DEFAULT 
PROCESSOR_4KC 
PROCESSOR_5KC 
PROCESSOR_20KC 
PROCESSOR_M4K 
PROCESSOR_R3000 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4130 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R7000 
PROCESSOR_R8000 
PROCESSOR_R9000 
PROCESSOR_SB1 
PROCESSOR_SR71000 
PROCESSOR_700 
PROCESSOR_7100 
PROCESSOR_7100LC 
PROCESSOR_7200 
PROCESSOR_7300 
PROCESSOR_8000 
PROCESSOR_RIOS1 
PROCESSOR_RIOS2 
PROCESSOR_RS64A 
PROCESSOR_MPCCORE 
PROCESSOR_PPC403 
PROCESSOR_PPC405 
PROCESSOR_PPC440 
PROCESSOR_PPC601 
PROCESSOR_PPC603 
PROCESSOR_PPC604 
PROCESSOR_PPC604e 
PROCESSOR_PPC620 
PROCESSOR_PPC630 
PROCESSOR_PPC750 
PROCESSOR_PPC7400 
PROCESSOR_PPC7450 
PROCESSOR_PPC8540 
PROCESSOR_POWER4 
PROCESSOR_POWER5 
PROCESSOR_9672_G5 
PROCESSOR_9672_G6 
PROCESSOR_2064_Z900 
PROCESSOR_2084_Z990 
PROCESSOR_max 
PROCESSOR_SH1 
PROCESSOR_SH2 
PROCESSOR_SH2E 
PROCESSOR_SH2A 
PROCESSOR_SH3 
PROCESSOR_SH3E 
PROCESSOR_SH4 
PROCESSOR_SH4A 
PROCESSOR_SH5 
PROCESSOR_V7 
PROCESSOR_CYPRESS 
PROCESSOR_V8 
PROCESSOR_SUPERSPARC 
PROCESSOR_SPARCLITE 
PROCESSOR_F930 
PROCESSOR_F934 
PROCESSOR_HYPERSPARC 
PROCESSOR_SPARCLITE86X 
PROCESSOR_SPARCLET 
PROCESSOR_TSC701 
PROCESSOR_V9 
PROCESSOR_ULTRASPARC 
PROCESSOR_ULTRASPARC3 
PROCESSOR_EV4 
PROCESSOR_EV5 
PROCESSOR_EV6 
PROCESSOR_MAX 
ARM_CORE 
PROCESSOR_I386 
PROCESSOR_I486 
PROCESSOR_PENTIUM 
PROCESSOR_PENTIUMPRO 
PROCESSOR_K6 
PROCESSOR_ATHLON 
PROCESSOR_PENTIUM4 
PROCESSOR_K8 
PROCESSOR_NOCONA 
PROCESSOR_GENERIC32 
PROCESSOR_GENERIC64 
PROCESSOR_AMDFAM10 
PROCESSOR_max 
PROCESSOR_ITANIUM 
PROCESSOR_ITANIUM2 
PROCESSOR_max 
PROCESSOR_DEFAULT 
PROCESSOR_IQ2000 
PROCESSOR_IQ10 
PROCESSOR_R3000 
PROCESSOR_4KC 
PROCESSOR_4KP 
PROCESSOR_5KC 
PROCESSOR_5KF 
PROCESSOR_20KC 
PROCESSOR_24K 
PROCESSOR_24KX 
PROCESSOR_M4K 
PROCESSOR_R3900 
PROCESSOR_R6000 
PROCESSOR_R4000 
PROCESSOR_R4100 
PROCESSOR_R4111 
PROCESSOR_R4120 
PROCESSOR_R4130 
PROCESSOR_R4300 
PROCESSOR_R4600 
PROCESSOR_R4650 
PROCESSOR_R5000 
PROCESSOR_R5400 
PROCESSOR_R5500 
PROCESSOR_R7000 
PROCESSOR_R8000 
PROCESSOR_R9000 
PROCESSOR_SB1 
PROCESSOR_SB1A 
PROCESSOR_SR71000 
PROCESSOR_MAX 
PROCESSOR_MN10300 
PROCESSOR_AM33 
PROCESSOR_AM33_2 
PROCESSOR_MS1_64_001 
PROCESSOR_MS1_16_002 
PROCESSOR_MS1_16_003 
PROCESSOR_MS2 
PROCESSOR_700 
PROCESSOR_7100 
PROCESSOR_7100LC 
PROCESSOR_7200 
PROCESSOR_7300 
PROCESSOR_8000 
PROCESSOR_RIOS1 
PROCESSOR_RIOS2 
PROCESSOR_RS64A 
PROCESSOR_MPCCORE 
PROCESSOR_PPC403 
PROCESSOR_PPC405 
PROCESSOR_PPC440 
PROCESSOR_PPC601 
PROCESSOR_PPC603 
PROCESSOR_PPC604 
PROCESSOR_PPC604e 
PROCESSOR_PPC620 
PROCESSOR_PPC630 
PROCESSOR_PPC750 
PROCESSOR_PPC7400 
PROCESSOR_PPC7450 
PROCESSOR_PPC8540 
PROCESSOR_POWER4 
PROCESSOR_POWER5 
PROCESSOR_9672_G5 
PROCESSOR_9672_G6 
PROCESSOR_2064_Z900 
PROCESSOR_2084_Z990 
PROCESSOR_2094_Z9_109 
PROCESSOR_max 
PROCESSOR_SH1 
PROCESSOR_SH2 
PROCESSOR_SH2E 
PROCESSOR_SH2A 
PROCESSOR_SH3 
PROCESSOR_SH3E 
PROCESSOR_SH4 
PROCESSOR_SH4A 
PROCESSOR_SH5 
PROCESSOR_V7 
PROCESSOR_CYPRESS 
PROCESSOR_V8 
PROCESSOR_SUPERSPARC 
PROCESSOR_SPARCLITE 
PROCESSOR_F930 
PROCESSOR_F934 
PROCESSOR_HYPERSPARC 
PROCESSOR_SPARCLITE86X 
PROCESSOR_SPARCLET 
PROCESSOR_TSC701 
PROCESSOR_V9 
PROCESSOR_ULTRASPARC 
PROCESSOR_ULTRASPARC3 
PROCESSOR_NIAGARA 

Definition at line 116 of file alpha.h.

enum reg_class

Enumerator:
NO_REGS 
R2 
R0_1 
INDEX_REGS 
BASE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LR0_REGS 
GENERAL_REGS 
BP_REGS 
FC_REGS 
CR_REGS 
Q_REGS 
SPECIAL_REGS 
ACCUM0_REGS 
ACCUM_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R24_REG 
R25_REG 
R27_REG 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LPCOUNT_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPU_REGS 
LO_REGS 
STACK_REG 
BASE_REGS 
HI_REGS 
CC_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
POINTER_X_REGS 
POINTER_Y_REGS 
POINTER_Z_REGS 
STACK_REG 
BASE_POINTER_REGS 
POINTER_REGS 
ADDW_REGS 
SIMPLE_LD_REGS 
LD_REGS 
NO_LD_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0R1_REGS 
R2R3_REGS 
EXT_LOW_REGS 
EXT_REGS 
ADDR_REGS 
INDEX_REGS 
BK_REG 
SP_REG 
RC_REG 
COUNTER_REGS 
INT_REGS 
GENERAL_REGS 
DP_REG 
ST_REG 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
S_REGS 
INDEX_REGS 
SP_REGS 
A_REGS 
SI_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
REPEAT_REGS 
CR_REGS 
ACCUM_REGS 
OTHER_FLAG_REGS 
F0_REGS 
F1_REGS 
BR_FLAG_REGS 
FLAG_REGS 
EVEN_REGS 
GPR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
A0H_REG 
A0L_REG 
A0_REG 
A1H_REG 
ACCUM_HIGH_REGS 
A1L_REG 
ACCUM_LOW_REGS 
A1_REG 
ACCUM_REGS 
X_REG 
X_OR_ACCUM_LOW_REGS 
X_OR_ACCUM_REGS 
YH_REG 
YH_OR_ACCUM_HIGH_REGS 
X_OR_YH_REGS 
YL_REG 
YL_OR_ACCUM_LOW_REGS 
X_OR_YL_REGS 
X_OR_Y_REGS 
Y_REG 
ACCUM_OR_Y_REGS 
PH_REG 
X_OR_PH_REGS 
PL_REG 
PL_OR_ACCUM_LOW_REGS 
X_OR_PL_REGS 
YL_OR_PL_OR_ACCUM_LOW_REGS 
P_REG 
ACCUM_OR_P_REGS 
YL_OR_P_REGS 
ACCUM_LOW_OR_YL_OR_P_REGS 
Y_OR_P_REGS 
ACCUM_Y_OR_P_REGS 
NO_FRAME_Y_ADDR_REGS 
Y_ADDR_REGS 
ACCUM_LOW_OR_Y_ADDR_REGS 
ACCUM_OR_Y_ADDR_REGS 
X_OR_Y_ADDR_REGS 
Y_OR_Y_ADDR_REGS 
P_OR_Y_ADDR_REGS 
NON_HIGH_YBASE_ELIGIBLE_REGS 
YBASE_ELIGIBLE_REGS 
J_REG 
J_OR_DAU_16_BIT_REGS 
BMU_REGS 
NOHIGH_NON_ADDR_REGS 
NON_ADDR_REGS 
SLOW_MEM_LOAD_REGS 
NOHIGH_NON_YBASE_REGS 
NO_ACCUM_NON_YBASE_REGS 
NON_YBASE_REGS 
YBASE_VIRT_REGS 
ACCUM_LOW_OR_YBASE_REGS 
ACCUM_OR_YBASE_REGS 
X_OR_YBASE_REGS 
Y_OR_YBASE_REGS 
ACCUM_LOW_YL_PL_OR_YBASE_REGS 
P_OR_YBASE_REGS 
ACCUM_Y_P_OR_YBASE_REGS 
Y_ADDR_OR_YBASE_REGS 
YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS 
YBASE_OR_YBASE_ELIGIBLE_REGS 
NO_HIGH_ALL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MULTIPLY_32_REG 
MULTIPLY_64_REG 
LOW_REGS 
HIGH_REGS 
REAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
MAC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ADDR_REGS 
DATA_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AREG 
DREG 
CREG 
BREG 
SIREG 
DIREG 
AD_REGS 
Q_REGS 
NON_Q_REGS 
INDEX_REGS 
LEGACY_REGS 
GENERAL_REGS 
FP_TOP_REG 
FP_SECOND_REG 
FLOAT_REGS 
SSE_REGS 
MMX_REGS 
FP_TOP_SSE_REGS 
FP_SECOND_SSE_REGS 
FLOAT_SSE_REGS 
FLOAT_INT_REGS 
INT_SSE_REGS 
FLOAT_INT_SSE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GLOBAL_REGS 
LOCAL_REGS 
LOCAL_OR_GLOBAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
PR_REGS 
BR_REGS 
AR_M_REGS 
AR_I_REGS 
ADDL_REGS 
GR_REGS 
FR_REGS 
GR_AND_BR_REGS 
GR_AND_FR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CARRY_REG 
ACCUM_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
D_REGS 
X_REGS 
Y_REGS 
SP_REGS 
DA_REGS 
DB_REGS 
Z_REGS 
D8_REGS 
Q_REGS 
D_OR_X_REGS 
D_OR_Y_REGS 
D_OR_SP_REGS 
X_OR_Y_REGS 
A_REGS 
X_OR_SP_REGS 
Y_OR_SP_REGS 
X_OR_Y_OR_D_REGS 
A_OR_D_REGS 
A_OR_SP_REGS 
H_REGS 
S_REGS 
D_OR_S_REGS 
X_OR_S_REGS 
Y_OR_S_REGS 
SP_OR_S_REGS 
D_OR_X_OR_S_REGS 
D_OR_Y_OR_S_REGS 
D_OR_SP_OR_S_REGS 
A_OR_S_REGS 
D_OR_A_OR_S_REGS 
TMP_REGS 
D_OR_A_OR_TMP_REGS 
G_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDR_REGS 
FP_REGS 
GENERAL_REGS 
DATA_OR_FP_REGS 
ADDR_OR_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AP_REG 
XRF_REGS 
GENERAL_REGS 
AGRF_REGS 
XGRF_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ONLYR1_REGS 
LRW_REGS 
GENERAL_REGS 
C_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
REMAINDER_REG 
HIMULT_REG 
SYSTEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
SP_REGS 
DATA_OR_ADDRESS_REGS 
SP_OR_ADDRESS_REGS 
EXTENDED_REGS 
DATA_OR_EXTENDED_REGS 
ADDRESS_OR_EXTENDED_REGS 
SP_OR_EXTENDED_REGS 
SP_OR_ADDRESS_OR_EXTENDED_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REG0 
LONG_FLOAT_REG0 
FLOAT_REGS 
FP_REGS 
GEN_AND_FP_REGS 
FRAME_POINTER_REG 
STACK_POINTER_REG 
GEN_AND_MEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MUL_REGS 
GENERAL_REGS 
LOAD_FPU_REGS 
NO_LOAD_FPU_REGS 
FPU_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
OUT_REGS 
STD_REGS 
ARG_REGS 
SRC_REGS 
DST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R15_REGS 
BASE_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BASE_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALTIVEC_REGS 
VRSAVE_REGS 
NON_SPECIAL_REGS 
MQ_REGS 
LINK_REGS 
CTR_REGS 
LINK_OR_CTR_REGS 
SPECIAL_REGS 
SPEC_OR_GEN_REGS 
CR0_REGS 
CR_REGS 
NON_FLOAT_REGS 
XER_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ADDR_REGS 
GENERAL_REGS 
FP_REGS 
ADDR_FP_REGS 
GENERAL_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
PR_REGS 
T_REGS 
MAC_REGS 
FPUL_REGS 
SIBCALL_REGS 
GENERAL_REGS 
FP0_REGS 
FP_REGS 
DF_REGS 
FPSCR_REGS 
GENERAL_FP_REGS 
TARGET_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPCC_REGS 
I64_REGS 
GENERAL_REGS 
FP_REGS 
EXTRA_FP_REGS 
GENERAL_OR_FP_REGS 
GENERAL_OR_EXTRA_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R1_REGS 
TWO_REGS 
R2_REGS 
EIGHT_REGS 
R8_REGS 
ICALL_REGS 
GENERAL_REGS 
CARRY_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BR_REGS 
FP_REGS 
ACC_REG 
SP_REG 
RL_REGS 
GR_REGS 
AR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R2 
R0_1 
INDEX_REGS 
BASE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LR0_REGS 
GENERAL_REGS 
BP_REGS 
FC_REGS 
CR_REGS 
Q_REGS 
SPECIAL_REGS 
ACCUM0_REGS 
ACCUM_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R24_REG 
R25_REG 
R27_REG 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LPCOUNT_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPU_REGS 
LO_REGS 
STACK_REG 
BASE_REGS 
HI_REGS 
CC_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
POINTER_X_REGS 
POINTER_Y_REGS 
POINTER_Z_REGS 
STACK_REG 
BASE_POINTER_REGS 
POINTER_REGS 
ADDW_REGS 
SIMPLE_LD_REGS 
LD_REGS 
NO_LD_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0R1_REGS 
R2R3_REGS 
EXT_LOW_REGS 
EXT_REGS 
ADDR_REGS 
INDEX_REGS 
BK_REG 
SP_REG 
RC_REG 
COUNTER_REGS 
INT_REGS 
GENERAL_REGS 
DP_REG 
ST_REG 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
S_REGS 
INDEX_REGS 
SP_REGS 
A_REGS 
SI_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
REPEAT_REGS 
CR_REGS 
ACCUM_REGS 
OTHER_FLAG_REGS 
F0_REGS 
F1_REGS 
BR_FLAG_REGS 
FLAG_REGS 
EVEN_REGS 
GPR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
A0H_REG 
A0L_REG 
A0_REG 
A1H_REG 
ACCUM_HIGH_REGS 
A1L_REG 
ACCUM_LOW_REGS 
A1_REG 
ACCUM_REGS 
X_REG 
X_OR_ACCUM_LOW_REGS 
X_OR_ACCUM_REGS 
YH_REG 
YH_OR_ACCUM_HIGH_REGS 
X_OR_YH_REGS 
YL_REG 
YL_OR_ACCUM_LOW_REGS 
X_OR_YL_REGS 
X_OR_Y_REGS 
Y_REG 
ACCUM_OR_Y_REGS 
PH_REG 
X_OR_PH_REGS 
PL_REG 
PL_OR_ACCUM_LOW_REGS 
X_OR_PL_REGS 
YL_OR_PL_OR_ACCUM_LOW_REGS 
P_REG 
ACCUM_OR_P_REGS 
YL_OR_P_REGS 
ACCUM_LOW_OR_YL_OR_P_REGS 
Y_OR_P_REGS 
ACCUM_Y_OR_P_REGS 
NO_FRAME_Y_ADDR_REGS 
Y_ADDR_REGS 
ACCUM_LOW_OR_Y_ADDR_REGS 
ACCUM_OR_Y_ADDR_REGS 
X_OR_Y_ADDR_REGS 
Y_OR_Y_ADDR_REGS 
P_OR_Y_ADDR_REGS 
NON_HIGH_YBASE_ELIGIBLE_REGS 
YBASE_ELIGIBLE_REGS 
J_REG 
J_OR_DAU_16_BIT_REGS 
BMU_REGS 
NOHIGH_NON_ADDR_REGS 
NON_ADDR_REGS 
SLOW_MEM_LOAD_REGS 
NOHIGH_NON_YBASE_REGS 
NO_ACCUM_NON_YBASE_REGS 
NON_YBASE_REGS 
YBASE_VIRT_REGS 
ACCUM_LOW_OR_YBASE_REGS 
ACCUM_OR_YBASE_REGS 
X_OR_YBASE_REGS 
Y_OR_YBASE_REGS 
ACCUM_LOW_YL_PL_OR_YBASE_REGS 
P_OR_YBASE_REGS 
ACCUM_Y_P_OR_YBASE_REGS 
Y_ADDR_OR_YBASE_REGS 
YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS 
YBASE_OR_YBASE_ELIGIBLE_REGS 
NO_HIGH_ALL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MULTIPLY_32_REG 
MULTIPLY_64_REG 
LOW_REGS 
HIGH_REGS 
REAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
MAC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ADDR_REGS 
DATA_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AREG 
DREG 
CREG 
BREG 
SIREG 
DIREG 
AD_REGS 
Q_REGS 
NON_Q_REGS 
INDEX_REGS 
LEGACY_REGS 
GENERAL_REGS 
FP_TOP_REG 
FP_SECOND_REG 
FLOAT_REGS 
SSE_REGS 
MMX_REGS 
FP_TOP_SSE_REGS 
FP_SECOND_SSE_REGS 
FLOAT_SSE_REGS 
FLOAT_INT_REGS 
INT_SSE_REGS 
FLOAT_INT_SSE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GLOBAL_REGS 
LOCAL_REGS 
LOCAL_OR_GLOBAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
PR_REGS 
BR_REGS 
AR_M_REGS 
AR_I_REGS 
ADDL_REGS 
GR_REGS 
FR_REGS 
GR_AND_BR_REGS 
GR_AND_FR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CARRY_REG 
ACCUM_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
D_REGS 
X_REGS 
Y_REGS 
SP_REGS 
DA_REGS 
DB_REGS 
Z_REGS 
D8_REGS 
Q_REGS 
D_OR_X_REGS 
D_OR_Y_REGS 
D_OR_SP_REGS 
X_OR_Y_REGS 
A_REGS 
X_OR_SP_REGS 
Y_OR_SP_REGS 
X_OR_Y_OR_D_REGS 
A_OR_D_REGS 
A_OR_SP_REGS 
H_REGS 
S_REGS 
D_OR_S_REGS 
X_OR_S_REGS 
Y_OR_S_REGS 
SP_OR_S_REGS 
D_OR_X_OR_S_REGS 
D_OR_Y_OR_S_REGS 
D_OR_SP_OR_S_REGS 
A_OR_S_REGS 
D_OR_A_OR_S_REGS 
TMP_REGS 
D_OR_A_OR_TMP_REGS 
G_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDR_REGS 
FP_REGS 
GENERAL_REGS 
DATA_OR_FP_REGS 
ADDR_OR_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AP_REG 
XRF_REGS 
GENERAL_REGS 
AGRF_REGS 
XGRF_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ONLYR1_REGS 
LRW_REGS 
GENERAL_REGS 
C_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
REMAINDER_REG 
HIMULT_REG 
SYSTEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
SP_REGS 
DATA_OR_ADDRESS_REGS 
SP_OR_ADDRESS_REGS 
EXTENDED_REGS 
DATA_OR_EXTENDED_REGS 
ADDRESS_OR_EXTENDED_REGS 
SP_OR_EXTENDED_REGS 
SP_OR_ADDRESS_OR_EXTENDED_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REG0 
LONG_FLOAT_REG0 
FLOAT_REGS 
FP_REGS 
GEN_AND_FP_REGS 
FRAME_POINTER_REG 
STACK_POINTER_REG 
GEN_AND_MEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MUL_REGS 
GENERAL_REGS 
LOAD_FPU_REGS 
NO_LOAD_FPU_REGS 
FPU_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
OUT_REGS 
STD_REGS 
ARG_REGS 
SRC_REGS 
DST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R15_REGS 
BASE_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BASE_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALTIVEC_REGS 
VRSAVE_REGS 
NON_SPECIAL_REGS 
MQ_REGS 
LINK_REGS 
CTR_REGS 
LINK_OR_CTR_REGS 
SPECIAL_REGS 
SPEC_OR_GEN_REGS 
CR0_REGS 
CR_REGS 
NON_FLOAT_REGS 
XER_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ADDR_REGS 
GENERAL_REGS 
FP_REGS 
ADDR_FP_REGS 
GENERAL_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
PR_REGS 
T_REGS 
MAC_REGS 
FPUL_REGS 
SIBCALL_REGS 
GENERAL_REGS 
FP0_REGS 
FP_REGS 
DF_REGS 
FPSCR_REGS 
GENERAL_FP_REGS 
TARGET_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPCC_REGS 
I64_REGS 
GENERAL_REGS 
FP_REGS 
EXTRA_FP_REGS 
GENERAL_OR_FP_REGS 
GENERAL_OR_EXTRA_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R1_REGS 
TWO_REGS 
R2_REGS 
EIGHT_REGS 
R8_REGS 
ICALL_REGS 
GENERAL_REGS 
CARRY_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BR_REGS 
FP_REGS 
ACC_REG 
SP_REG 
RL_REGS 
GR_REGS 
AR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
HILO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HILO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
R24_REG 
R25_REG 
R27_REG 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LPCOUNT_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPA_REGS 
CIRRUS_REGS 
VFP_REGS 
IWMMXT_GR_REGS 
IWMMXT_REGS 
LO_REGS 
STACK_REG 
BASE_REGS 
HI_REGS 
CC_REG 
VFPCC_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
POINTER_X_REGS 
POINTER_Y_REGS 
POINTER_Z_REGS 
STACK_REG 
BASE_POINTER_REGS 
POINTER_REGS 
ADDW_REGS 
SIMPLE_LD_REGS 
LD_REGS 
NO_LD_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
IREGS 
BREGS 
LREGS 
MREGS 
CIRCREGS 
DAGREGS 
EVEN_AREGS 
ODD_AREGS 
AREGS 
CCREGS 
EVEN_DREGS 
ODD_DREGS 
DREGS 
PREGS_CLOBBERED 
PREGS 
DPREGS 
MOST_REGS 
PROLOGUE_REGS 
NON_A_CC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0R1_REGS 
R2R3_REGS 
EXT_LOW_REGS 
EXT_REGS 
ADDR_REGS 
INDEX_REGS 
BK_REG 
SP_REG 
RC_REG 
COUNTER_REGS 
INT_REGS 
GENERAL_REGS 
DP_REG 
ST_REG 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MULTIPLY_32_REG 
MULTIPLY_64_REG 
LOW_REGS 
HIGH_REGS 
REAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ICC_REGS 
FCC_REGS 
CC_REGS 
ICR_REGS 
FCR_REGS 
CR_REGS 
LCR_REG 
LR_REG 
GR8_REGS 
GR9_REGS 
GR89_REGS 
FDPIC_REGS 
FDPIC_FPTR_REGS 
FDPIC_CALL_REGS 
SPR_REGS 
QUAD_ACC_REGS 
EVEN_ACC_REGS 
ACC_REGS 
ACCG_REGS 
QUAD_FPR_REGS 
FEVEN_REGS 
FPR_REGS 
QUAD_REGS 
EVEN_REGS 
GPR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
COUNTER_REGS 
SOURCE_REGS 
DESTINATION_REGS 
GENERAL_REGS 
MAC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AREG 
DREG 
CREG 
BREG 
SIREG 
DIREG 
AD_REGS 
Q_REGS 
NON_Q_REGS 
INDEX_REGS 
LEGACY_REGS 
GENERAL_REGS 
FP_TOP_REG 
FP_SECOND_REG 
FLOAT_REGS 
SSE_REGS 
MMX_REGS 
FP_TOP_SSE_REGS 
FP_SECOND_SSE_REGS 
FLOAT_SSE_REGS 
FLOAT_INT_REGS 
INT_SSE_REGS 
FLOAT_INT_SSE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
PR_REGS 
BR_REGS 
AR_M_REGS 
AR_I_REGS 
ADDL_REGS 
GR_REGS 
FR_REGS 
GR_AND_BR_REGS 
GR_AND_FR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DPH_REGS 
DPL_REGS 
DP_REGS 
SP_REGS 
IPH_REGS 
IPL_REGS 
IP_REGS 
DP_SP_REGS 
PTR_REGS 
NONPTR_REGS 
NONSP_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CARRY_REG 
ACCUM_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
D_REGS 
X_REGS 
Y_REGS 
SP_REGS 
DA_REGS 
DB_REGS 
Z_REGS 
D8_REGS 
Q_REGS 
D_OR_X_REGS 
D_OR_Y_REGS 
D_OR_SP_REGS 
X_OR_Y_REGS 
A_REGS 
X_OR_SP_REGS 
Y_OR_SP_REGS 
X_OR_Y_OR_D_REGS 
A_OR_D_REGS 
A_OR_SP_REGS 
H_REGS 
S_REGS 
D_OR_S_REGS 
X_OR_S_REGS 
Y_OR_S_REGS 
Z_OR_S_REGS 
SP_OR_S_REGS 
D_OR_X_OR_S_REGS 
D_OR_Y_OR_S_REGS 
D_OR_SP_OR_S_REGS 
A_OR_S_REGS 
D_OR_A_OR_S_REGS 
TMP_REGS 
D_OR_A_OR_TMP_REGS 
G_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDR_REGS 
FP_REGS 
GENERAL_REGS 
DATA_OR_FP_REGS 
ADDR_OR_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ONLYR1_REGS 
LRW_REGS 
GENERAL_REGS 
C_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
PIC_FN_ADDR_REG 
LEA_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
REMAINDER_REG 
HIMULT_REG 
SYSTEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
SP_REGS 
DATA_OR_ADDRESS_REGS 
SP_OR_ADDRESS_REGS 
EXTENDED_REGS 
DATA_OR_EXTENDED_REGS 
ADDRESS_OR_EXTENDED_REGS 
SP_OR_EXTENDED_REGS 
SP_OR_ADDRESS_OR_EXTENDED_REGS 
FP_REGS 
FP_ACC_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
FLOAT_REG0 
LONG_FLOAT_REG0 
FLOAT_REGS 
LONG_REGS 
FP_REGS 
GEN_AND_FP_REGS 
FRAME_POINTER_REG 
STACK_POINTER_REG 
GEN_AND_MEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MUL_REGS 
GENERAL_REGS 
LOAD_FPU_REGS 
NO_LOAD_FPU_REGS 
FPU_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BASE_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALTIVEC_REGS 
VRSAVE_REGS 
VSCR_REGS 
SPE_ACC_REGS 
SPEFSCR_REGS 
NON_SPECIAL_REGS 
MQ_REGS 
LINK_REGS 
CTR_REGS 
LINK_OR_CTR_REGS 
SPECIAL_REGS 
SPEC_OR_GEN_REGS 
CR0_REGS 
CR_REGS 
NON_FLOAT_REGS 
XER_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CC_REGS 
ADDR_REGS 
GENERAL_REGS 
ACCESS_REGS 
ADDR_CC_REGS 
GENERAL_CC_REGS 
FP_REGS 
ADDR_FP_REGS 
GENERAL_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
PR_REGS 
T_REGS 
MAC_REGS 
FPUL_REGS 
SIBCALL_REGS 
GENERAL_REGS 
FP0_REGS 
FP_REGS 
DF_HI_REGS 
DF_REGS 
FPSCR_REGS 
GENERAL_FP_REGS 
TARGET_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPCC_REGS 
I64_REGS 
GENERAL_REGS 
FP_REGS 
EXTRA_FP_REGS 
GENERAL_OR_FP_REGS 
GENERAL_OR_EXTRA_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R1_REGS 
TWO_REGS 
R2_REGS 
EIGHT_REGS 
R8_REGS 
ICALL_REGS 
GENERAL_REGS 
CARRY_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BR_REGS 
FP_REGS 
ACC_REG 
SP_REG 
RL_REGS 
GR_REGS 
AR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
R24_REG 
R25_REG 
R27_REG 
GENERAL_REGS 
FLOAT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LPCOUNT_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPA_REGS 
CIRRUS_REGS 
VFP_REGS 
IWMMXT_GR_REGS 
IWMMXT_REGS 
LO_REGS 
STACK_REG 
BASE_REGS 
HI_REGS 
CC_REG 
VFPCC_REG 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REG 
POINTER_X_REGS 
POINTER_Y_REGS 
POINTER_Z_REGS 
STACK_REG 
BASE_POINTER_REGS 
POINTER_REGS 
ADDW_REGS 
SIMPLE_LD_REGS 
LD_REGS 
NO_LD_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
IREGS 
BREGS 
LREGS 
MREGS 
CIRCREGS 
DAGREGS 
EVEN_AREGS 
ODD_AREGS 
AREGS 
CCREGS 
EVEN_DREGS 
ODD_DREGS 
DREGS 
FDPIC_REGS 
FDPIC_FPTR_REGS 
PREGS_CLOBBERED 
PREGS 
IPREGS 
DPREGS 
MOST_REGS 
LT_REGS 
LC_REGS 
LB_REGS 
PROLOGUE_REGS 
NON_A_CC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0R1_REGS 
R2R3_REGS 
EXT_LOW_REGS 
EXT_REGS 
ADDR_REGS 
INDEX_REGS 
BK_REG 
SP_REG 
RC_REG 
COUNTER_REGS 
INT_REGS 
GENERAL_REGS 
DP_REG 
ST_REG 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MOF_REGS 
CC0_REGS 
SPECIAL_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
LO_REGS 
HI_REGS 
HILO_REGS 
NOSP_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MULTIPLY_32_REG 
MULTIPLY_64_REG 
LOW_REGS 
HIGH_REGS 
REAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ICC_REGS 
FCC_REGS 
CC_REGS 
ICR_REGS 
FCR_REGS 
CR_REGS 
LCR_REG 
LR_REG 
GR8_REGS 
GR9_REGS 
GR89_REGS 
FDPIC_REGS 
FDPIC_FPTR_REGS 
FDPIC_CALL_REGS 
SPR_REGS 
QUAD_ACC_REGS 
EVEN_ACC_REGS 
ACC_REGS 
ACCG_REGS 
QUAD_FPR_REGS 
FEVEN_REGS 
FPR_REGS 
QUAD_REGS 
EVEN_REGS 
GPR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
COUNTER_REGS 
SOURCE_REGS 
DESTINATION_REGS 
GENERAL_REGS 
MAC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
AREG 
DREG 
CREG 
BREG 
SIREG 
DIREG 
AD_REGS 
Q_REGS 
NON_Q_REGS 
INDEX_REGS 
LEGACY_REGS 
GENERAL_REGS 
FP_TOP_REG 
FP_SECOND_REG 
FLOAT_REGS 
SSE_REGS 
MMX_REGS 
FP_TOP_SSE_REGS 
FP_SECOND_SSE_REGS 
FLOAT_SSE_REGS 
FLOAT_INT_REGS 
INT_SSE_REGS 
FLOAT_INT_SSE_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
PR_REGS 
BR_REGS 
AR_M_REGS 
AR_I_REGS 
ADDL_REGS 
GR_REGS 
FP_REGS 
FR_REGS 
GR_AND_BR_REGS 
GR_AND_FR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GR_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
SP_REGS 
FB_REGS 
SB_REGS 
CR_REGS 
R0_REGS 
R1_REGS 
R2_REGS 
R3_REGS 
R02_REGS 
HL_REGS 
QI_REGS 
R23_REGS 
R03_REGS 
DI_REGS 
A0_REGS 
A1_REGS 
A_REGS 
AD_REGS 
PS_REGS 
SI_REGS 
HI_REGS 
RA_REGS 
GENERAL_REGS 
FLG_REGS 
HC_REGS 
MEM_REGS 
R02_A_MEM_REGS 
A_HL_MEM_REGS 
R1_R3_A_MEM_REGS 
R03_MEM_REGS 
A_HI_MEM_REGS 
A_AD_CR_MEM_SI_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CARRY_REG 
ACCUM_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
D_REGS 
X_REGS 
Y_REGS 
SP_REGS 
DA_REGS 
DB_REGS 
Z_REGS 
D8_REGS 
Q_REGS 
D_OR_X_REGS 
D_OR_Y_REGS 
D_OR_SP_REGS 
X_OR_Y_REGS 
A_REGS 
X_OR_SP_REGS 
Y_OR_SP_REGS 
X_OR_Y_OR_D_REGS 
A_OR_D_REGS 
A_OR_SP_REGS 
H_REGS 
S_REGS 
D_OR_S_REGS 
X_OR_S_REGS 
Y_OR_S_REGS 
Z_OR_S_REGS 
SP_OR_S_REGS 
D_OR_X_OR_S_REGS 
D_OR_Y_OR_S_REGS 
D_OR_SP_OR_S_REGS 
A_OR_S_REGS 
D_OR_A_OR_S_REGS 
TMP_REGS 
D_OR_A_OR_TMP_REGS 
G_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDR_REGS 
FP_REGS 
GENERAL_REGS 
DATA_OR_FP_REGS 
ADDR_OR_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ONLYR1_REGS 
LRW_REGS 
GENERAL_REGS 
C_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
M16_NA_REGS 
M16_REGS 
T_REG 
M16_T_REGS 
PIC_FN_ADDR_REG 
V1_REG 
LEA_REGS 
GR_REGS 
FP_REGS 
HI_REG 
LO_REG 
MD_REGS 
COP0_REGS 
COP2_REGS 
COP3_REGS 
HI_AND_GR_REGS 
LO_AND_GR_REGS 
HI_AND_FP_REGS 
COP0_AND_GR_REGS 
COP2_AND_GR_REGS 
COP3_AND_GR_REGS 
ALL_COP_REGS 
ALL_COP_AND_GR_REGS 
ST_REGS 
DSP_ACC_REGS 
ACC_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
REMAINDER_REG 
HIMULT_REG 
SYSTEM_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
DATA_REGS 
ADDRESS_REGS 
SP_REGS 
DATA_OR_ADDRESS_REGS 
SP_OR_ADDRESS_REGS 
EXTENDED_REGS 
DATA_OR_EXTENDED_REGS 
ADDRESS_OR_EXTENDED_REGS 
SP_OR_EXTENDED_REGS 
SP_OR_ADDRESS_OR_EXTENDED_REGS 
FP_REGS 
FP_ACC_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R1_REGS 
GENERAL_REGS 
FPUPPER_REGS 
FP_REGS 
GENERAL_OR_FP_REGS 
SHIFT_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
MUL_REGS 
GENERAL_REGS 
LOAD_FPU_REGS 
NO_LOAD_FPU_REGS 
FPU_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BASE_REGS 
GENERAL_REGS 
FLOAT_REGS 
ALTIVEC_REGS 
VRSAVE_REGS 
VSCR_REGS 
SPE_ACC_REGS 
SPEFSCR_REGS 
NON_SPECIAL_REGS 
MQ_REGS 
LINK_REGS 
CTR_REGS 
LINK_OR_CTR_REGS 
SPECIAL_REGS 
SPEC_OR_GEN_REGS 
CR0_REGS 
CR_REGS 
NON_FLOAT_REGS 
XER_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
CC_REGS 
ADDR_REGS 
GENERAL_REGS 
ACCESS_REGS 
ADDR_CC_REGS 
GENERAL_CC_REGS 
FP_REGS 
ADDR_FP_REGS 
GENERAL_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
G16_REGS 
G32_REGS 
T32_REGS 
HI_REG 
LO_REG 
CE_REGS 
CN_REG 
LC_REG 
SC_REG 
SP_REGS 
CR_REGS 
CP1_REGS 
CP2_REGS 
CP3_REGS 
CPA_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
PR_REGS 
T_REGS 
MAC_REGS 
FPUL_REGS 
SIBCALL_REGS 
GENERAL_REGS 
FP0_REGS 
FP_REGS 
DF_HI_REGS 
DF_REGS 
FPSCR_REGS 
GENERAL_FP_REGS 
GENERAL_DF_REGS 
TARGET_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
FPCC_REGS 
I64_REGS 
GENERAL_REGS 
FP_REGS 
EXTRA_FP_REGS 
GENERAL_OR_FP_REGS 
GENERAL_OR_EXTRA_FP_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
R0_REGS 
R1_REGS 
TWO_REGS 
R2_REGS 
EIGHT_REGS 
R8_REGS 
ICALL_REGS 
GENERAL_REGS 
CARRY_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
GENERAL_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
ALL_REGS 
LIM_REG_CLASSES 
NO_REGS 
BR_REGS 
FP_REGS 
ACC_REG 
SP_REG 
RL_REGS 
GR_REGS 
AR_REGS 
ALL_REGS 
LIM_REG_CLASSES 

Definition at line 729 of file alpha.h.


Variable Documentation

Definition at line 7140 of file alpha.c.

Definition at line 7141 of file alpha.c.

Definition at line 83 of file alpha.c.

Definition at line 53 of file alpha.c.

const char* alpha_cpu_string

Definition at line 73 of file alpha.c.

Referenced by override_options().

Definition at line 65 of file alpha.c.

const char* alpha_fprm_string

Definition at line 76 of file alpha.c.

Referenced by override_options().

Definition at line 69 of file alpha.c.

const char* alpha_fptm_string

Definition at line 77 of file alpha.c.

Referenced by override_options().

Definition at line 92 of file alpha.c.

const char* alpha_mlat_string

Definition at line 78 of file alpha.c.

Referenced by override_options().

const char* alpha_tls_size_string

Definition at line 89 of file alpha.c.

Referenced by override_options().

Definition at line 61 of file alpha.c.

const char* alpha_tp_string

Definition at line 75 of file alpha.c.

Referenced by override_options().

const char* alpha_tune_string

Definition at line 74 of file alpha.c.

Referenced by override_options().

Definition at line 234 of file mips.c.

Definition at line 7124 of file alpha.c.

Definition at line 35 of file gensupport.c.


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