|
Data Types |
| type | alpha_compare |
Defines |
| #define | TARGET_CPU_CPP_BUILTINS() |
| #define | SUBTARGET_LANGUAGE_CPP_BUILTINS() |
| #define | CPP_SPEC "%(cpp_subtarget)" |
| #define | CPP_SUBTARGET_SPEC "" |
| #define | WORD_SWITCH_TAKES_ARG(STR) (!strcmp (STR, "rpath") || DEFAULT_WORD_SWITCH_TAKES_ARG(STR)) |
| #define | TARGET_VERSION |
| #define | MASK_FP (1 << 0) |
| #define | TARGET_FP ((target_flags & MASK_FP) != 0) |
| #define | MASK_FPREGS (1 << 1) |
| #define | TARGET_FPREGS ((target_flags & MASK_FPREGS) != 0) |
| #define | MASK_GAS (1 << 2) |
| #define | TARGET_GAS ((target_flags & MASK_GAS) != 0) |
| #define | MASK_IEEE_CONFORMANT (1 << 3) |
| #define | TARGET_IEEE_CONFORMANT ((target_flags & MASK_IEEE_CONFORMANT) != 0) |
| #define | MASK_IEEE (1 << 4) |
| #define | TARGET_IEEE ((target_flags & MASK_IEEE) != 0) |
| #define | MASK_IEEE_WITH_INEXACT (1 << 5) |
| #define | TARGET_IEEE_WITH_INEXACT ((target_flags & MASK_IEEE_WITH_INEXACT) != 0) |
| #define | MASK_BUILD_CONSTANTS (1 << 6) |
| #define | TARGET_BUILD_CONSTANTS ((target_flags & MASK_BUILD_CONSTANTS) != 0) |
| #define | MASK_FLOAT_VAX (1 << 7) |
| #define | TARGET_FLOAT_VAX ((target_flags & MASK_FLOAT_VAX) != 0) |
| #define | MASK_BWX (1 << 8) |
| #define | TARGET_BWX ((target_flags & MASK_BWX) != 0) |
| #define | MASK_MAX (1 << 9) |
| #define | TARGET_MAX ((target_flags & MASK_MAX) != 0) |
| #define | MASK_FIX (1 << 10) |
| #define | TARGET_FIX ((target_flags & MASK_FIX) != 0) |
| #define | MASK_CIX (1 << 11) |
| #define | TARGET_CIX ((target_flags & MASK_CIX) != 0) |
| #define | MASK_EXPLICIT_RELOCS (1 << 12) |
| #define | TARGET_EXPLICIT_RELOCS ((target_flags & MASK_EXPLICIT_RELOCS) != 0) |
| #define | MASK_SMALL_DATA (1 << 13) |
| #define | TARGET_SMALL_DATA ((target_flags & MASK_SMALL_DATA) != 0) |
| #define | MASK_TLS_KERNEL (1 << 14) |
| #define | TARGET_TLS_KERNEL ((target_flags & MASK_TLS_KERNEL) != 0) |
| #define | MASK_SMALL_TEXT (1 << 15) |
| #define | TARGET_SMALL_TEXT ((target_flags & MASK_SMALL_TEXT) != 0) |
| #define | MASK_LONG_DOUBLE_128 (1 << 16) |
| #define | TARGET_LONG_DOUBLE_128 ((target_flags & MASK_LONG_DOUBLE_128) != 0) |
| #define | MASK_CPU_EV5 (1 << 28) |
| #define | TARGET_CPU_EV5 ((target_flags & MASK_CPU_EV5) != 0) |
| #define | MASK_CPU_EV6 (1 << 29) |
| #define | TARGET_CPU_EV6 ((target_flags & MASK_CPU_EV6) != 0) |
| #define | MASK_SUPPORT_ARCH (1 << 30) |
| #define | TARGET_SUPPORT_ARCH ((target_flags & MASK_SUPPORT_ARCH) != 0) |
| #define | TARGET_ABI_WINDOWS_NT 0 |
| #define | TARGET_ABI_OPEN_VMS 0 |
| #define | TARGET_ABI_UNICOSMK 0 |
| #define | TARGET_ABI_OSF |
| #define | TARGET_AS_CAN_SUBTRACT_LABELS TARGET_GAS |
| #define | TARGET_AS_SLASH_BEFORE_SUFFIX TARGET_GAS |
| #define | TARGET_CAN_FAULT_IN_PROLOGUE 0 |
| #define | TARGET_HAS_XFLOATING_LIBS TARGET_LONG_DOUBLE_128 |
| #define | TARGET_PROFILING_NEEDS_GP 0 |
| #define | TARGET_LD_BUGGY_LDGP 0 |
| #define | TARGET_FIXUP_EV5_PREFETCH 0 |
| #define | HAVE_AS_TLS 0 |
| #define | TARGET_SWITCHES |
| #define | TARGET_DEFAULT MASK_FP|MASK_FPREGS |
| #define | TARGET_CPU_DEFAULT 0 |
| #define | TARGET_DEFAULT_EXPLICIT_RELOCS 0 |
| #define | TARGET_OPTIONS |
| #define | OPTION_DEFAULT_SPECS |
| #define | EXTRA_SPECS |
| #define | OVERRIDE_OPTIONS override_options () |
| #define | CONDITIONAL_REGISTER_USAGE |
| #define | CAN_DEBUG_WITHOUT_FP |
| #define | INT_TYPE_SIZE 32 |
| #define | LONG_LONG_TYPE_SIZE 64 |
| #define | TARGET_FLOAT_FORMAT (TARGET_FLOAT_VAX ? VAX_FLOAT_FORMAT : IEEE_FLOAT_FORMAT) |
| #define | FLOAT_TYPE_SIZE 32 |
| #define | DOUBLE_TYPE_SIZE 64 |
| #define | LONG_DOUBLE_TYPE_SIZE (TARGET_LONG_DOUBLE_128 ? 128 : 64) |
| #define | LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64 |
| #define | WIDEST_HARDWARE_FP_SIZE 64 |
| #define | WCHAR_TYPE "unsigned int" |
| #define | WCHAR_TYPE_SIZE 32 |
| #define | PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) |
| #define | BITS_BIG_ENDIAN 0 |
| #define | BYTES_BIG_ENDIAN 0 |
| #define | WORDS_BIG_ENDIAN 0 |
| #define | UNITS_PER_WORD 8 |
| #define | POINTER_SIZE 64 |
| #define | PARM_BOUNDARY 64 |
| #define | STACK_BOUNDARY 128 |
| #define | FUNCTION_BOUNDARY 32 |
| #define | EMPTY_FIELD_BOUNDARY 64 |
| #define | STRUCTURE_SIZE_BOUNDARY 8 |
| #define | PCC_BITFIELD_TYPE_MATTERS 1 |
| #define | BIGGEST_ALIGNMENT 128 |
| #define | MINIMUM_ATOMIC_ALIGNMENT ((unsigned int) (TARGET_BWX ? 8 : 32)) |
| #define | STRICT_ALIGNMENT 1 |
| #define | SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 1 |
| #define | UNITS_PER_SIMD_WORD UNITS_PER_WORD |
| #define | FIRST_PSEUDO_REGISTER 64 |
| #define | FIXED_REGISTERS |
| #define | CALL_USED_REGISTERS |
| #define | REG_ALLOC_ORDER |
| #define | HARD_REGNO_NREGS(REGNO, MODE) ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) |
| #define | HARD_REGNO_MODE_OK(REGNO, MODE) |
| #define | MODES_TIEABLE_P(MODE1, MODE2) |
| #define | STACK_POINTER_REGNUM 30 |
| #define | HARD_FRAME_POINTER_REGNUM 15 |
| #define | FRAME_POINTER_REQUIRED 0 |
| #define | ARG_POINTER_REGNUM 31 |
| #define | FRAME_POINTER_REGNUM 63 |
| #define | STATIC_CHAIN_REGNUM 1 |
| #define | PIC_OFFSET_TABLE_REGNUM 29 |
| #define | N_REG_CLASSES (int) LIM_REG_CLASSES |
| #define | REG_CLASS_NAMES |
| #define | REG_CLASS_CONTENTS |
| #define | REGNO_REG_CLASS(REGNO) |
| #define | INDEX_REG_CLASS NO_REGS |
| #define | BASE_REG_CLASS GENERAL_REGS |
| #define | REG_CLASS_FROM_LETTER(C) |
| #define | CONST_OK_FOR_LETTER_P alpha_const_ok_for_letter_p |
| #define | CONST_DOUBLE_OK_FOR_LETTER_P alpha_const_double_ok_for_letter_p |
| #define | EXTRA_CONSTRAINT alpha_extra_constraint |
| #define | PREFERRED_RELOAD_CLASS alpha_preferred_reload_class |
| #define | SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) secondary_reload_class((CLASS), (MODE), (IN), 1) |
| #define | SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT) secondary_reload_class((CLASS), (MODE), (OUT), 0) |
| #define | SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) |
| #define | SECONDARY_MEMORY_NEEDED_MODE(MODE) |
| #define | CLASS_MAX_NREGS(CLASS, MODE) ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) |
| #define | CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) |
| #define | REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) |
| #define | MEMORY_MOVE_COST(MODE, CLASS, IN) (2*alpha_memory_latency) |
| #define | BRANCH_COST 5 |
| #define | STACK_GROWS_DOWNWARD |
| #define | STARTING_FRAME_OFFSET 0 |
| #define | STACK_CHECK_BUILTIN 1 |
| #define | ACCUMULATE_OUTGOING_ARGS 1 |
| #define | FIRST_PARM_OFFSET(FNDECL) 0 |
| #define | ELIMINABLE_REGS |
| #define | CAN_ELIMINATE(FROM, TO) 1 |
| #define | ALPHA_ROUND(X) (((X) + 15) & ~ 15) |
| #define | INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) ((OFFSET) = alpha_initial_elimination_offset(FROM, TO)) |
| #define | RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0 |
| #define | FUNCTION_VALUE(VALTYPE, FUNC) function_value (VALTYPE, FUNC, VOIDmode) |
| #define | LIBCALL_VALUE(MODE) function_value (NULL, NULL, MODE) |
| #define | FUNCTION_VALUE_REGNO_P(N) ((N) == 0 || (N) == 1 || (N) == 32 || (N) == 33) |
| #define | FUNCTION_ARG_REGNO_P(N) (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32)) |
| #define | CUMULATIVE_ARGS int |
| #define | INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) (CUM) = 0 |
| #define | ALPHA_ARG_SIZE(MODE, TYPE, NAMED) |
| #define | FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) |
| #define | FUNCTION_ARG(CUM, MODE, TYPE, NAMED) function_arg((CUM), (MODE), (TYPE), (NAMED)) |
| #define | ASM_COMMENT_START " #" |
| #define | ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) alpha_start_function(FILE,NAME,DECL); |
| #define | ASM_DECLARE_FUNCTION_SIZE(FILE, NAME, DECL) alpha_end_function(FILE,NAME,DECL) |
| #define | PROFILE_BEFORE_PROLOGUE 1 |
| #define | NO_PROFILE_COUNTERS 1 |
| #define | FUNCTION_PROFILER(FILE, LABELNO) |
| #define | EXIT_IGNORE_STACK 1 |
| #define | EPILOGUE_USES(REGNO) ((REGNO) == 26) |
| #define | TRAMPOLINE_TEMPLATE(FILE) |
| #define | TRAMPOLINE_SECTION text_section |
| #define | TRAMPOLINE_SIZE 32 |
| #define | TRAMPOLINE_ALIGNMENT 64 |
| #define | INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) alpha_initialize_trampoline (TRAMP, FNADDR, CXT, 16, 24, 8) |
| #define | RETURN_ADDR_RTX alpha_return_addr |
| #define | INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, 26) |
| #define | DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (26) |
| #define | DWARF_ALT_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (64) |
| #define | DWARF_ZERO_REG 31 |
| #define | EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 16 : INVALID_REGNUM) |
| #define | EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 28) |
| #define | EH_RETURN_HANDLER_RTX |
| #define | REGNO_OK_FOR_INDEX_P(REGNO) 0 |
| #define | REGNO_OK_FOR_BASE_P(REGNO) |
| #define | MAX_REGS_PER_ADDRESS 1 |
| #define | CONSTANT_ADDRESS_P(X) |
| #define | LEGITIMATE_CONSTANT_P alpha_legitimate_constant_p |
| #define | REG_OK_FOR_INDEX_P(X) 0 |
| #define | NONSTRICT_REG_OK_FOR_BASE_P(X) (REGNO (X) < 32 || REGNO (X) == 63 || REGNO (X) >= FIRST_PSEUDO_REGISTER) |
| #define | NONSTRICT_REG_OK_FP_BASE_P(X) |
| #define | STRICT_REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) |
| #define | REG_OK_FOR_BASE_P(X) NONSTRICT_REG_OK_FOR_BASE_P (X) |
| #define | GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) |
| #define | LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) |
| #define | LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_L, WIN) |
| #define | GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) { if (GET_CODE (ADDR) == AND) goto LABEL; } |
| #define | CASE_VECTOR_MODE SImode |
| #define | CASE_VECTOR_PC_RELATIVE 1 |
| #define | DEFAULT_SIGNED_CHAR 1 |
| #define | MOVE_MAX 8 |
| #define | MOVE_RATIO (TARGET_BWX ? 7 : 2) |
| #define | MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode) |
| #define | SLOW_BYTE_ACCESS 1 |
| #define | WORD_REGISTER_OPERATIONS |
| #define | LOAD_EXTEND_OP(MODE) ((MODE) == SImode ? SIGN_EXTEND : ZERO_EXTEND) |
| #define | SHORT_IMMEDIATES_SIGN_EXTEND |
| #define | TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 |
| #define | CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, TARGET_CIX) |
| #define | CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, TARGET_CIX) |
| #define | FLOAT_STORE_FLAG_VALUE(MODE) REAL_VALUE_ATOF ((TARGET_FLOAT_VAX ? "0.5" : "2.0"), (MODE)) |
| #define | CANONICALIZE_COMPARISON(CODE, OP0, OP1) |
| #define | Pmode DImode |
| #define | FUNCTION_MODE Pmode |
| #define | NO_FUNCTION_CSE |
| #define | SHIFT_COUNT_TRUNCATED 1 |
| #define | ASM_APP_ON (TARGET_EXPLICIT_RELOCS ? "\t.set\tmacro\n" : "") |
| #define | ASM_APP_OFF (TARGET_EXPLICIT_RELOCS ? "\t.set\tnomacro\n" : "") |
| #define | TEXT_SECTION_ASM_OP "\t.text" |
| #define | READONLY_DATA_SECTION_ASM_OP "\t.rdata" |
| #define | DATA_SECTION_ASM_OP "\t.data" |
| #define | REGISTER_NAMES |
| #define | ASM_OUTPUT_LABELREF(STREAM, NAME) |
| #define | GLOBAL_ASM_OP "\t.globl " |
| #define | USER_LABEL_PREFIX "" |
| #define | ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLEINSN) { ASM_OUTPUT_ALIGN (FILE, 2); (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); } |
| #define | ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) sprintf ((LABEL), "*$%s%ld", (PREFIX), (long)(NUM)) |
| #define | ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) |
| #define | ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) abort () |
| #define | ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) |
| #define | ASM_OUTPUT_ALIGN(FILE, LOG) |
| #define | ASM_OUTPUT_SKIP(FILE, SIZE) fprintf (FILE, "\t.space "HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE)) |
| #define | ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) |
| #define | ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) |
| #define | PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) |
| #define | PRINT_OPERAND_PUNCT_VALID_P(CODE) |
| #define | PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address((FILE), (ADDR)) |
| #define | EXPAND_BUILTIN_VA_START(valist, nextarg) alpha_va_start (valist, nextarg) |
| #define | OBJECT_FORMAT_COFF |
| #define | EXTENDED_COFF |
| #define | NM_FLAGS "-pg" |
| #define | SDB_DEBUGGING_INFO 1 |
| #define | DBX_DEBUGGING_INFO 1 |
| #define | MIPS_DEBUGGING_INFO 1 |
| #define | PREFERRED_DEBUGGING_TYPE SDB_DEBUG |
| #define | DEBUGGER_AUTO_OFFSET(X) ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset) |
| #define | DEBUGGER_ARG_OFFSET(OFFSET, X) (OFFSET + alpha_arg_offset) |
| #define | DBX_OUTPUT_SOURCE_LINE(STREAM, LINE, COUNTER) |
| #define | SDB_OUTPUT_SOURCE_LINE(STREAM, LINE) fprintf (STREAM, "\t.loc\t%d %d\n", num_source_filenames, LINE) |
| #define | ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) alpha_output_filename (STREAM, NAME) |
| #define | DBX_CONTIN_LENGTH 3000 |
| #define | DEFAULT_GDB_EXTENSIONS 1 |
| #define | NO_DBX_FUNCTION_END 1 |
| #define | ASM_STABS_OP ((TARGET_GAS) ? "\t.stabs\t" : " #.stabs\t") |
| #define | ASM_STABN_OP ((TARGET_GAS) ? "\t.stabn\t" : " #.stabn\t") |
| #define | ASM_STABD_OP ((TARGET_GAS) ? "\t.stabd\t" : " #.stabd\t") |
| #define | SDB_ALLOW_FORWARD_REFERENCES |
| #define | SDB_ALLOW_UNKNOWN_REFERENCES |
| #define | PUT_SDB_DEF(a) |
| #define | PUT_SDB_PLAIN_DEF(a) |
| #define | PUT_SDB_TYPE(a) |
| #define | PUT_SDB_BLOCK_START(LINE) |
| #define | PUT_SDB_BLOCK_END(LINE) |
| #define | PUT_SDB_FUNCTION_START(LINE) |
| #define | PUT_SDB_FUNCTION_END(LINE) |
| #define | PUT_SDB_EPILOGUE_END(NAME) ((void)(NAME)) |
| #define | CODE_MASK 0x8F300 |
| #define | MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK) |
| #define | MIPS_MARK_STAB(code) ((code)+CODE_MASK) |
| #define | MIPS_UNMARK_STAB(code) ((code)-CODE_MASK) |
| #define | SHASH_SIZE 511 |
| #define | THASH_SIZE 55 |
| #define | ALIGN_SYMTABLE_OFFSET(OFFSET) (((OFFSET) + 7) & ~7) |
| #define | NO_IMPLICIT_EXTERN_C |
Enumerations |
| enum | processor_type {
PROCESSOR_EV4,
PROCESSOR_EV5,
PROCESSOR_EV6,
PROCESSOR_I386,
PROCESSOR_I486,
PROCESSOR_PENTIUM,
PROCESSOR_PENTIUMPRO,
PROCESSOR_K6,
PROCESSOR_ATHLON,
PROCESSOR_PENTIUM4,
PROCESSOR_max,
PROCESSOR_M88100,
PROCESSOR_M88110,
PROCESSOR_M88000,
PROCESSOR_700,
PROCESSOR_7100,
PROCESSOR_7100LC,
PROCESSOR_7200,
PROCESSOR_8000,
PROCESSOR_RIOS1,
PROCESSOR_RIOS2,
PROCESSOR_RS64A,
PROCESSOR_MPCCORE,
PROCESSOR_PPC403,
PROCESSOR_PPC405,
PROCESSOR_PPC601,
PROCESSOR_PPC603,
PROCESSOR_PPC604,
PROCESSOR_PPC604e,
PROCESSOR_PPC620,
PROCESSOR_PPC630,
PROCESSOR_PPC750,
PROCESSOR_PPC7400,
PROCESSOR_PPC7450,
PROCESSOR_SH1,
PROCESSOR_SH2,
PROCESSOR_SH3,
PROCESSOR_SH3E,
PROCESSOR_SH4,
PROCESSOR_SH5,
PROCESSOR_DEFAULT,
PROCESSOR_R3000,
PROCESSOR_R3900,
PROCESSOR_R6000,
PROCESSOR_R4000,
PROCESSOR_R4100,
PROCESSOR_R4111,
PROCESSOR_R4120,
PROCESSOR_R4300,
PROCESSOR_R4600,
PROCESSOR_R4650,
PROCESSOR_R5000,
PROCESSOR_R5400,
PROCESSOR_R5500,
PROCESSOR_R8000,
PROCESSOR_R4KC,
PROCESSOR_R5KC,
PROCESSOR_R20KC,
PROCESSOR_SR71000,
PROCESSOR_SB1,
PROCESSOR_V7,
PROCESSOR_CYPRESS,
PROCESSOR_V8,
PROCESSOR_SUPERSPARC,
PROCESSOR_SPARCLITE,
PROCESSOR_F930,
PROCESSOR_F934,
PROCESSOR_HYPERSPARC,
PROCESSOR_SPARCLITE86X,
PROCESSOR_SPARCLET,
PROCESSOR_TSC701,
PROCESSOR_V9,
PROCESSOR_ULTRASPARC,
PROCESSOR_DEFAULT,
PROCESSOR_R3000,
PROCESSOR_R3900,
PROCESSOR_R6000,
PROCESSOR_R4000,
PROCESSOR_R4100,
PROCESSOR_R4111,
PROCESSOR_R4120,
PROCESSOR_R4300,
PROCESSOR_R4600,
PROCESSOR_R4650,
PROCESSOR_R5000,
PROCESSOR_R5400,
PROCESSOR_R5500,
PROCESSOR_R8000,
PROCESSOR_R4KC,
PROCESSOR_R5KC,
PROCESSOR_R20KC,
PROCESSOR_SR71000,
PROCESSOR_SB1,
PROCESSOR_DEFAULT,
PROCESSOR_R3000,
PROCESSOR_R3900,
PROCESSOR_R6000,
PROCESSOR_R4000,
PROCESSOR_R4100,
PROCESSOR_R4111,
PROCESSOR_R4120,
PROCESSOR_R4300,
PROCESSOR_R4600,
PROCESSOR_R4650,
PROCESSOR_R5000,
PROCESSOR_R5400,
PROCESSOR_R5500,
PROCESSOR_R8000,
PROCESSOR_R4KC,
PROCESSOR_R5KC,
PROCESSOR_R20KC,
PROCESSOR_SR71000,
PROCESSOR_SB1,
PROCESSOR_EV4,
PROCESSOR_EV5,
PROCESSOR_EV6,
PROCESSOR_I386,
PROCESSOR_I486,
PROCESSOR_PENTIUM,
PROCESSOR_PENTIUMPRO,
PROCESSOR_K6,
PROCESSOR_ATHLON,
PROCESSOR_PENTIUM4,
PROCESSOR_max,
PROCESSOR_M88100,
PROCESSOR_M88110,
PROCESSOR_M88000,
PROCESSOR_700,
PROCESSOR_7100,
PROCESSOR_7100LC,
PROCESSOR_7200,
PROCESSOR_8000,
PROCESSOR_RIOS1,
PROCESSOR_RIOS2,
PROCESSOR_RS64A,
PROCESSOR_MPCCORE,
PROCESSOR_PPC403,
PROCESSOR_PPC405,
PROCESSOR_PPC601,
PROCESSOR_PPC603,
PROCESSOR_PPC604,
PROCESSOR_PPC604e,
PROCESSOR_PPC620,
PROCESSOR_PPC630,
PROCESSOR_PPC750,
PROCESSOR_PPC7400,
PROCESSOR_PPC7450,
PROCESSOR_SH1,
PROCESSOR_SH2,
PROCESSOR_SH3,
PROCESSOR_SH3E,
PROCESSOR_SH4,
PROCESSOR_SH5,
PROCESSOR_DEFAULT,
PROCESSOR_R3000,
PROCESSOR_R3900,
PROCESSOR_R6000,
PROCESSOR_R4000,
PROCESSOR_R4100,
PROCESSOR_R4111,
PROCESSOR_R4120,
PROCESSOR_R4300,
PROCESSOR_R4600,
PROCESSOR_R4650,
PROCESSOR_R5000,
PROCESSOR_R5400,
PROCESSOR_R5500,
PROCESSOR_R8000,
PROCESSOR_R4KC,
PROCESSOR_R5KC,
PROCESSOR_R20KC,
PROCESSOR_SR71000,
PROCESSOR_SB1,
PROCESSOR_V7,
PROCESSOR_CYPRESS,
PROCESSOR_V8,
PROCESSOR_SUPERSPARC,
PROCESSOR_SPARCLITE,
PROCESSOR_F930,
PROCESSOR_F934,
PROCESSOR_HYPERSPARC,
PROCESSOR_SPARCLITE86X,
PROCESSOR_SPARCLET,
PROCESSOR_TSC701,
PROCESSOR_V9,
PROCESSOR_ULTRASPARC,
PROCESSOR_DEFAULT,
PROCESSOR_R3000,
PROCESSOR_R3900,
PROCESSOR_R6000,
PROCESSOR_R4000,
PROCESSOR_R4100,
PROCESSOR_R4111,
PROCESSOR_R4120,
PROCESSOR_R4300,
PROCESSOR_R4600,
PROCESSOR_R4650,
PROCESSOR_R5000,
PROCESSOR_R5400,
PROCESSOR_R5500,
PROCESSOR_R8000,
PROCESSOR_R4KC,
PROCESSOR_R5KC,
PROCESSOR_R20KC,
PROCESSOR_SR71000,
PROCESSOR_SB1,
PROCESSOR_DEFAULT,
PROCESSOR_R3000,
PROCESSOR_R3900,
PROCESSOR_R6000,
PROCESSOR_R4000,
PROCESSOR_R4100,
PROCESSOR_R4111,
PROCESSOR_R4120,
PROCESSOR_R4300,
PROCESSOR_R4600,
PROCESSOR_R4650,
PROCESSOR_R5000,
PROCESSOR_R5400,
PROCESSOR_R5500,
PROCESSOR_R8000,
PROCESSOR_R4KC,
PROCESSOR_R5KC,
PROCESSOR_R20KC,
PROCESSOR_SR71000,
PROCESSOR_SB1,
PROCESSOR_EV4,
PROCESSOR_EV5,
PROCESSOR_EV6,
PROCESSOR_MAX,
ARM_CORE,
PROCESSOR_I386,
PROCESSOR_I486,
PROCESSOR_PENTIUM,
PROCESSOR_PENTIUMPRO,
PROCESSOR_K6,
PROCESSOR_ATHLON,
PROCESSOR_PENTIUM4,
PROCESSOR_K8,
PROCESSOR_NOCONA,
PROCESSOR_max,
PROCESSOR_ITANIUM,
PROCESSOR_ITANIUM2,
PROCESSOR_max,
PROCESSOR_DEFAULT,
PROCESSOR_IQ2000,
PROCESSOR_IQ10,
PROCESSOR_DEFAULT,
PROCESSOR_4KC,
PROCESSOR_5KC,
PROCESSOR_20KC,
PROCESSOR_M4K,
PROCESSOR_R3000,
PROCESSOR_R3900,
PROCESSOR_R6000,
PROCESSOR_R4000,
PROCESSOR_R4100,
PROCESSOR_R4111,
PROCESSOR_R4120,
PROCESSOR_R4130,
PROCESSOR_R4300,
PROCESSOR_R4600,
PROCESSOR_R4650,
PROCESSOR_R5000,
PROCESSOR_R5400,
PROCESSOR_R5500,
PROCESSOR_R7000,
PROCESSOR_R8000,
PROCESSOR_R9000,
PROCESSOR_SB1,
PROCESSOR_SR71000,
PROCESSOR_700,
PROCESSOR_7100,
PROCESSOR_7100LC,
PROCESSOR_7200,
PROCESSOR_7300,
PROCESSOR_8000,
PROCESSOR_RIOS1,
PROCESSOR_RIOS2,
PROCESSOR_RS64A,
PROCESSOR_MPCCORE,
PROCESSOR_PPC403,
PROCESSOR_PPC405,
PROCESSOR_PPC440,
PROCESSOR_PPC601,
PROCESSOR_PPC603,
PROCESSOR_PPC604,
PROCESSOR_PPC604e,
PROCESSOR_PPC620,
PROCESSOR_PPC630,
PROCESSOR_PPC750,
PROCESSOR_PPC7400,
PROCESSOR_PPC7450,
PROCESSOR_PPC8540,
PROCESSOR_POWER4,
PROCESSOR_POWER5,
PROCESSOR_9672_G5,
PROCESSOR_9672_G6,
PROCESSOR_2064_Z900,
PROCESSOR_2084_Z990,
PROCESSOR_max,
PROCESSOR_SH1,
PROCESSOR_SH2,
PROCESSOR_SH2E,
PROCESSOR_SH2A,
PROCESSOR_SH3,
PROCESSOR_SH3E,
PROCESSOR_SH4,
PROCESSOR_SH4A,
PROCESSOR_SH5,
PROCESSOR_V7,
PROCESSOR_CYPRESS,
PROCESSOR_V8,
PROCESSOR_SUPERSPARC,
PROCESSOR_SPARCLITE,
PROCESSOR_F930,
PROCESSOR_F934,
PROCESSOR_HYPERSPARC,
PROCESSOR_SPARCLITE86X,
PROCESSOR_SPARCLET,
PROCESSOR_TSC701,
PROCESSOR_V9,
PROCESSOR_ULTRASPARC,
PROCESSOR_ULTRASPARC3,
PROCESSOR_EV4,
PROCESSOR_EV5,
PROCESSOR_EV6,
PROCESSOR_MAX,
ARM_CORE,
PROCESSOR_I386,
PROCESSOR_I486,
PROCESSOR_PENTIUM,
PROCESSOR_PENTIUMPRO,
PROCESSOR_K6,
PROCESSOR_ATHLON,
PROCESSOR_PENTIUM4,
PROCESSOR_K8,
PROCESSOR_NOCONA,
PROCESSOR_GENERIC32,
PROCESSOR_GENERIC64,
PROCESSOR_AMDFAM10,
PROCESSOR_max,
PROCESSOR_ITANIUM,
PROCESSOR_ITANIUM2,
PROCESSOR_max,
PROCESSOR_DEFAULT,
PROCESSOR_IQ2000,
PROCESSOR_IQ10,
PROCESSOR_R3000,
PROCESSOR_4KC,
PROCESSOR_4KP,
PROCESSOR_5KC,
PROCESSOR_5KF,
PROCESSOR_20KC,
PROCESSOR_24K,
PROCESSOR_24KX,
PROCESSOR_M4K,
PROCESSOR_R3900,
PROCESSOR_R6000,
PROCESSOR_R4000,
PROCESSOR_R4100,
PROCESSOR_R4111,
PROCESSOR_R4120,
PROCESSOR_R4130,
PROCESSOR_R4300,
PROCESSOR_R4600,
PROCESSOR_R4650,
PROCESSOR_R5000,
PROCESSOR_R5400,
PROCESSOR_R5500,
PROCESSOR_R7000,
PROCESSOR_R8000,
PROCESSOR_R9000,
PROCESSOR_SB1,
PROCESSOR_SB1A,
PROCESSOR_SR71000,
PROCESSOR_MAX,
PROCESSOR_MN10300,
PROCESSOR_AM33,
PROCESSOR_AM33_2,
PROCESSOR_MS1_64_001,
PROCESSOR_MS1_16_002,
PROCESSOR_MS1_16_003,
PROCESSOR_MS2,
PROCESSOR_700,
PROCESSOR_7100,
PROCESSOR_7100LC,
PROCESSOR_7200,
PROCESSOR_7300,
PROCESSOR_8000,
PROCESSOR_RIOS1,
PROCESSOR_RIOS2,
PROCESSOR_RS64A,
PROCESSOR_MPCCORE,
PROCESSOR_PPC403,
PROCESSOR_PPC405,
PROCESSOR_PPC440,
PROCESSOR_PPC601,
PROCESSOR_PPC603,
PROCESSOR_PPC604,
PROCESSOR_PPC604e,
PROCESSOR_PPC620,
PROCESSOR_PPC630,
PROCESSOR_PPC750,
PROCESSOR_PPC7400,
PROCESSOR_PPC7450,
PROCESSOR_PPC8540,
PROCESSOR_POWER4,
PROCESSOR_POWER5,
PROCESSOR_9672_G5,
PROCESSOR_9672_G6,
PROCESSOR_2064_Z900,
PROCESSOR_2084_Z990,
PROCESSOR_2094_Z9_109,
PROCESSOR_max,
PROCESSOR_SH1,
PROCESSOR_SH2,
PROCESSOR_SH2E,
PROCESSOR_SH2A,
PROCESSOR_SH3,
PROCESSOR_SH3E,
PROCESSOR_SH4,
PROCESSOR_SH4A,
PROCESSOR_SH5,
PROCESSOR_V7,
PROCESSOR_CYPRESS,
PROCESSOR_V8,
PROCESSOR_SUPERSPARC,
PROCESSOR_SPARCLITE,
PROCESSOR_F930,
PROCESSOR_F934,
PROCESSOR_HYPERSPARC,
PROCESSOR_SPARCLITE86X,
PROCESSOR_SPARCLET,
PROCESSOR_TSC701,
PROCESSOR_V9,
PROCESSOR_ULTRASPARC,
PROCESSOR_ULTRASPARC3,
PROCESSOR_NIAGARA
} |
| enum | alpha_trap_precision {
ALPHA_TP_PROG,
ALPHA_TP_FUNC,
ALPHA_TP_INSN,
ALPHA_TP_PROG,
ALPHA_TP_FUNC,
ALPHA_TP_INSN,
ALPHA_TP_PROG,
ALPHA_TP_FUNC,
ALPHA_TP_INSN,
ALPHA_TP_PROG,
ALPHA_TP_FUNC,
ALPHA_TP_INSN
} |
| enum | alpha_fp_rounding_mode {
ALPHA_FPRM_NORM,
ALPHA_FPRM_MINF,
ALPHA_FPRM_CHOP,
ALPHA_FPRM_DYN,
ALPHA_FPRM_NORM,
ALPHA_FPRM_MINF,
ALPHA_FPRM_CHOP,
ALPHA_FPRM_DYN,
ALPHA_FPRM_NORM,
ALPHA_FPRM_MINF,
ALPHA_FPRM_CHOP,
ALPHA_FPRM_DYN,
ALPHA_FPRM_NORM,
ALPHA_FPRM_MINF,
ALPHA_FPRM_CHOP,
ALPHA_FPRM_DYN
} |
| enum | alpha_fp_trap_mode {
ALPHA_FPTM_N,
ALPHA_FPTM_U,
ALPHA_FPTM_SU,
ALPHA_FPTM_SUI,
ALPHA_FPTM_N,
ALPHA_FPTM_U,
ALPHA_FPTM_SU,
ALPHA_FPTM_SUI,
ALPHA_FPTM_N,
ALPHA_FPTM_U,
ALPHA_FPTM_SU,
ALPHA_FPTM_SUI,
ALPHA_FPTM_N,
ALPHA_FPTM_U,
ALPHA_FPTM_SU,
ALPHA_FPTM_SUI
} |
| enum | reg_class {
NO_REGS,
R2,
R0_1,
INDEX_REGS,
BASE_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
LR0_REGS,
GENERAL_REGS,
BP_REGS,
FC_REGS,
CR_REGS,
Q_REGS,
SPECIAL_REGS,
ACCUM0_REGS,
ACCUM_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R24_REG,
R25_REG,
R27_REG,
GENERAL_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
LPCOUNT_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPU_REGS,
LO_REGS,
STACK_REG,
BASE_REGS,
HI_REGS,
CC_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REG,
POINTER_X_REGS,
POINTER_Y_REGS,
POINTER_Z_REGS,
STACK_REG,
BASE_POINTER_REGS,
POINTER_REGS,
ADDW_REGS,
SIMPLE_LD_REGS,
LD_REGS,
NO_LD_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0R1_REGS,
R2R3_REGS,
EXT_LOW_REGS,
EXT_REGS,
ADDR_REGS,
INDEX_REGS,
BK_REG,
SP_REG,
RC_REG,
COUNTER_REGS,
INT_REGS,
GENERAL_REGS,
DP_REG,
ST_REG,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
S_REGS,
INDEX_REGS,
SP_REGS,
A_REGS,
SI_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
REPEAT_REGS,
CR_REGS,
ACCUM_REGS,
OTHER_FLAG_REGS,
F0_REGS,
F1_REGS,
BR_FLAG_REGS,
FLAG_REGS,
EVEN_REGS,
GPR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
A0H_REG,
A0L_REG,
A0_REG,
A1H_REG,
ACCUM_HIGH_REGS,
A1L_REG,
ACCUM_LOW_REGS,
A1_REG,
ACCUM_REGS,
X_REG,
X_OR_ACCUM_LOW_REGS,
X_OR_ACCUM_REGS,
YH_REG,
YH_OR_ACCUM_HIGH_REGS,
X_OR_YH_REGS,
YL_REG,
YL_OR_ACCUM_LOW_REGS,
X_OR_YL_REGS,
X_OR_Y_REGS,
Y_REG,
ACCUM_OR_Y_REGS,
PH_REG,
X_OR_PH_REGS,
PL_REG,
PL_OR_ACCUM_LOW_REGS,
X_OR_PL_REGS,
YL_OR_PL_OR_ACCUM_LOW_REGS,
P_REG,
ACCUM_OR_P_REGS,
YL_OR_P_REGS,
ACCUM_LOW_OR_YL_OR_P_REGS,
Y_OR_P_REGS,
ACCUM_Y_OR_P_REGS,
NO_FRAME_Y_ADDR_REGS,
Y_ADDR_REGS,
ACCUM_LOW_OR_Y_ADDR_REGS,
ACCUM_OR_Y_ADDR_REGS,
X_OR_Y_ADDR_REGS,
Y_OR_Y_ADDR_REGS,
P_OR_Y_ADDR_REGS,
NON_HIGH_YBASE_ELIGIBLE_REGS,
YBASE_ELIGIBLE_REGS,
J_REG,
J_OR_DAU_16_BIT_REGS,
BMU_REGS,
NOHIGH_NON_ADDR_REGS,
NON_ADDR_REGS,
SLOW_MEM_LOAD_REGS,
NOHIGH_NON_YBASE_REGS,
NO_ACCUM_NON_YBASE_REGS,
NON_YBASE_REGS,
YBASE_VIRT_REGS,
ACCUM_LOW_OR_YBASE_REGS,
ACCUM_OR_YBASE_REGS,
X_OR_YBASE_REGS,
Y_OR_YBASE_REGS,
ACCUM_LOW_YL_PL_OR_YBASE_REGS,
P_OR_YBASE_REGS,
ACCUM_Y_P_OR_YBASE_REGS,
Y_ADDR_OR_YBASE_REGS,
YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS,
YBASE_OR_YBASE_ELIGIBLE_REGS,
NO_HIGH_ALL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MULTIPLY_32_REG,
MULTIPLY_64_REG,
LOW_REGS,
HIGH_REGS,
REAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
MAC_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ADDR_REGS,
DATA_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
AREG,
DREG,
CREG,
BREG,
SIREG,
DIREG,
AD_REGS,
Q_REGS,
NON_Q_REGS,
INDEX_REGS,
LEGACY_REGS,
GENERAL_REGS,
FP_TOP_REG,
FP_SECOND_REG,
FLOAT_REGS,
SSE_REGS,
MMX_REGS,
FP_TOP_SSE_REGS,
FP_SECOND_SSE_REGS,
FLOAT_SSE_REGS,
FLOAT_INT_REGS,
INT_SSE_REGS,
FLOAT_INT_SSE_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GLOBAL_REGS,
LOCAL_REGS,
LOCAL_OR_GLOBAL_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
PR_REGS,
BR_REGS,
AR_M_REGS,
AR_I_REGS,
ADDL_REGS,
GR_REGS,
FR_REGS,
GR_AND_BR_REGS,
GR_AND_FR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
CARRY_REG,
ACCUM_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
D_REGS,
X_REGS,
Y_REGS,
SP_REGS,
DA_REGS,
DB_REGS,
Z_REGS,
D8_REGS,
Q_REGS,
D_OR_X_REGS,
D_OR_Y_REGS,
D_OR_SP_REGS,
X_OR_Y_REGS,
A_REGS,
X_OR_SP_REGS,
Y_OR_SP_REGS,
X_OR_Y_OR_D_REGS,
A_OR_D_REGS,
A_OR_SP_REGS,
H_REGS,
S_REGS,
D_OR_S_REGS,
X_OR_S_REGS,
Y_OR_S_REGS,
SP_OR_S_REGS,
D_OR_X_OR_S_REGS,
D_OR_Y_OR_S_REGS,
D_OR_SP_OR_S_REGS,
A_OR_S_REGS,
D_OR_A_OR_S_REGS,
TMP_REGS,
D_OR_A_OR_TMP_REGS,
G_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDR_REGS,
FP_REGS,
GENERAL_REGS,
DATA_OR_FP_REGS,
ADDR_OR_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
AP_REG,
XRF_REGS,
GENERAL_REGS,
AGRF_REGS,
XGRF_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ONLYR1_REGS,
LRW_REGS,
GENERAL_REGS,
C_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
REMAINDER_REG,
HIMULT_REG,
SYSTEM_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDRESS_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDRESS_REGS,
SP_REGS,
DATA_OR_ADDRESS_REGS,
SP_OR_ADDRESS_REGS,
EXTENDED_REGS,
DATA_OR_EXTENDED_REGS,
ADDRESS_OR_EXTENDED_REGS,
SP_OR_EXTENDED_REGS,
SP_OR_ADDRESS_OR_EXTENDED_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FLOAT_REG0,
LONG_FLOAT_REG0,
FLOAT_REGS,
FP_REGS,
GEN_AND_FP_REGS,
FRAME_POINTER_REG,
STACK_POINTER_REG,
GEN_AND_MEM_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MUL_REGS,
GENERAL_REGS,
LOAD_FPU_REGS,
NO_LOAD_FPU_REGS,
FPU_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
OUT_REGS,
STD_REGS,
ARG_REGS,
SRC_REGS,
DST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
R15_REGS,
BASE_REGS,
GENERAL_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BASE_REGS,
GENERAL_REGS,
FLOAT_REGS,
ALTIVEC_REGS,
VRSAVE_REGS,
NON_SPECIAL_REGS,
MQ_REGS,
LINK_REGS,
CTR_REGS,
LINK_OR_CTR_REGS,
SPECIAL_REGS,
SPEC_OR_GEN_REGS,
CR0_REGS,
CR_REGS,
NON_FLOAT_REGS,
XER_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ADDR_REGS,
GENERAL_REGS,
FP_REGS,
ADDR_FP_REGS,
GENERAL_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
PR_REGS,
T_REGS,
MAC_REGS,
FPUL_REGS,
SIBCALL_REGS,
GENERAL_REGS,
FP0_REGS,
FP_REGS,
DF_REGS,
FPSCR_REGS,
GENERAL_FP_REGS,
TARGET_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
HILO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HILO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPCC_REGS,
I64_REGS,
GENERAL_REGS,
FP_REGS,
EXTRA_FP_REGS,
GENERAL_OR_FP_REGS,
GENERAL_OR_EXTRA_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
R1_REGS,
TWO_REGS,
R2_REGS,
EIGHT_REGS,
R8_REGS,
ICALL_REGS,
GENERAL_REGS,
CARRY_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BR_REGS,
FP_REGS,
ACC_REG,
SP_REG,
RL_REGS,
GR_REGS,
AR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
HILO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HILO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
HILO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HILO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R2,
R0_1,
INDEX_REGS,
BASE_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
LR0_REGS,
GENERAL_REGS,
BP_REGS,
FC_REGS,
CR_REGS,
Q_REGS,
SPECIAL_REGS,
ACCUM0_REGS,
ACCUM_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R24_REG,
R25_REG,
R27_REG,
GENERAL_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
LPCOUNT_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPU_REGS,
LO_REGS,
STACK_REG,
BASE_REGS,
HI_REGS,
CC_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REG,
POINTER_X_REGS,
POINTER_Y_REGS,
POINTER_Z_REGS,
STACK_REG,
BASE_POINTER_REGS,
POINTER_REGS,
ADDW_REGS,
SIMPLE_LD_REGS,
LD_REGS,
NO_LD_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0R1_REGS,
R2R3_REGS,
EXT_LOW_REGS,
EXT_REGS,
ADDR_REGS,
INDEX_REGS,
BK_REG,
SP_REG,
RC_REG,
COUNTER_REGS,
INT_REGS,
GENERAL_REGS,
DP_REG,
ST_REG,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
S_REGS,
INDEX_REGS,
SP_REGS,
A_REGS,
SI_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
REPEAT_REGS,
CR_REGS,
ACCUM_REGS,
OTHER_FLAG_REGS,
F0_REGS,
F1_REGS,
BR_FLAG_REGS,
FLAG_REGS,
EVEN_REGS,
GPR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
A0H_REG,
A0L_REG,
A0_REG,
A1H_REG,
ACCUM_HIGH_REGS,
A1L_REG,
ACCUM_LOW_REGS,
A1_REG,
ACCUM_REGS,
X_REG,
X_OR_ACCUM_LOW_REGS,
X_OR_ACCUM_REGS,
YH_REG,
YH_OR_ACCUM_HIGH_REGS,
X_OR_YH_REGS,
YL_REG,
YL_OR_ACCUM_LOW_REGS,
X_OR_YL_REGS,
X_OR_Y_REGS,
Y_REG,
ACCUM_OR_Y_REGS,
PH_REG,
X_OR_PH_REGS,
PL_REG,
PL_OR_ACCUM_LOW_REGS,
X_OR_PL_REGS,
YL_OR_PL_OR_ACCUM_LOW_REGS,
P_REG,
ACCUM_OR_P_REGS,
YL_OR_P_REGS,
ACCUM_LOW_OR_YL_OR_P_REGS,
Y_OR_P_REGS,
ACCUM_Y_OR_P_REGS,
NO_FRAME_Y_ADDR_REGS,
Y_ADDR_REGS,
ACCUM_LOW_OR_Y_ADDR_REGS,
ACCUM_OR_Y_ADDR_REGS,
X_OR_Y_ADDR_REGS,
Y_OR_Y_ADDR_REGS,
P_OR_Y_ADDR_REGS,
NON_HIGH_YBASE_ELIGIBLE_REGS,
YBASE_ELIGIBLE_REGS,
J_REG,
J_OR_DAU_16_BIT_REGS,
BMU_REGS,
NOHIGH_NON_ADDR_REGS,
NON_ADDR_REGS,
SLOW_MEM_LOAD_REGS,
NOHIGH_NON_YBASE_REGS,
NO_ACCUM_NON_YBASE_REGS,
NON_YBASE_REGS,
YBASE_VIRT_REGS,
ACCUM_LOW_OR_YBASE_REGS,
ACCUM_OR_YBASE_REGS,
X_OR_YBASE_REGS,
Y_OR_YBASE_REGS,
ACCUM_LOW_YL_PL_OR_YBASE_REGS,
P_OR_YBASE_REGS,
ACCUM_Y_P_OR_YBASE_REGS,
Y_ADDR_OR_YBASE_REGS,
YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS,
YBASE_OR_YBASE_ELIGIBLE_REGS,
NO_HIGH_ALL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MULTIPLY_32_REG,
MULTIPLY_64_REG,
LOW_REGS,
HIGH_REGS,
REAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
MAC_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ADDR_REGS,
DATA_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
AREG,
DREG,
CREG,
BREG,
SIREG,
DIREG,
AD_REGS,
Q_REGS,
NON_Q_REGS,
INDEX_REGS,
LEGACY_REGS,
GENERAL_REGS,
FP_TOP_REG,
FP_SECOND_REG,
FLOAT_REGS,
SSE_REGS,
MMX_REGS,
FP_TOP_SSE_REGS,
FP_SECOND_SSE_REGS,
FLOAT_SSE_REGS,
FLOAT_INT_REGS,
INT_SSE_REGS,
FLOAT_INT_SSE_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GLOBAL_REGS,
LOCAL_REGS,
LOCAL_OR_GLOBAL_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
PR_REGS,
BR_REGS,
AR_M_REGS,
AR_I_REGS,
ADDL_REGS,
GR_REGS,
FR_REGS,
GR_AND_BR_REGS,
GR_AND_FR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
CARRY_REG,
ACCUM_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
D_REGS,
X_REGS,
Y_REGS,
SP_REGS,
DA_REGS,
DB_REGS,
Z_REGS,
D8_REGS,
Q_REGS,
D_OR_X_REGS,
D_OR_Y_REGS,
D_OR_SP_REGS,
X_OR_Y_REGS,
A_REGS,
X_OR_SP_REGS,
Y_OR_SP_REGS,
X_OR_Y_OR_D_REGS,
A_OR_D_REGS,
A_OR_SP_REGS,
H_REGS,
S_REGS,
D_OR_S_REGS,
X_OR_S_REGS,
Y_OR_S_REGS,
SP_OR_S_REGS,
D_OR_X_OR_S_REGS,
D_OR_Y_OR_S_REGS,
D_OR_SP_OR_S_REGS,
A_OR_S_REGS,
D_OR_A_OR_S_REGS,
TMP_REGS,
D_OR_A_OR_TMP_REGS,
G_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDR_REGS,
FP_REGS,
GENERAL_REGS,
DATA_OR_FP_REGS,
ADDR_OR_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
AP_REG,
XRF_REGS,
GENERAL_REGS,
AGRF_REGS,
XGRF_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ONLYR1_REGS,
LRW_REGS,
GENERAL_REGS,
C_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
REMAINDER_REG,
HIMULT_REG,
SYSTEM_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDRESS_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDRESS_REGS,
SP_REGS,
DATA_OR_ADDRESS_REGS,
SP_OR_ADDRESS_REGS,
EXTENDED_REGS,
DATA_OR_EXTENDED_REGS,
ADDRESS_OR_EXTENDED_REGS,
SP_OR_EXTENDED_REGS,
SP_OR_ADDRESS_OR_EXTENDED_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FLOAT_REG0,
LONG_FLOAT_REG0,
FLOAT_REGS,
FP_REGS,
GEN_AND_FP_REGS,
FRAME_POINTER_REG,
STACK_POINTER_REG,
GEN_AND_MEM_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MUL_REGS,
GENERAL_REGS,
LOAD_FPU_REGS,
NO_LOAD_FPU_REGS,
FPU_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
OUT_REGS,
STD_REGS,
ARG_REGS,
SRC_REGS,
DST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
R15_REGS,
BASE_REGS,
GENERAL_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BASE_REGS,
GENERAL_REGS,
FLOAT_REGS,
ALTIVEC_REGS,
VRSAVE_REGS,
NON_SPECIAL_REGS,
MQ_REGS,
LINK_REGS,
CTR_REGS,
LINK_OR_CTR_REGS,
SPECIAL_REGS,
SPEC_OR_GEN_REGS,
CR0_REGS,
CR_REGS,
NON_FLOAT_REGS,
XER_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ADDR_REGS,
GENERAL_REGS,
FP_REGS,
ADDR_FP_REGS,
GENERAL_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
PR_REGS,
T_REGS,
MAC_REGS,
FPUL_REGS,
SIBCALL_REGS,
GENERAL_REGS,
FP0_REGS,
FP_REGS,
DF_REGS,
FPSCR_REGS,
GENERAL_FP_REGS,
TARGET_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
HILO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HILO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPCC_REGS,
I64_REGS,
GENERAL_REGS,
FP_REGS,
EXTRA_FP_REGS,
GENERAL_OR_FP_REGS,
GENERAL_OR_EXTRA_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
R1_REGS,
TWO_REGS,
R2_REGS,
EIGHT_REGS,
R8_REGS,
ICALL_REGS,
GENERAL_REGS,
CARRY_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BR_REGS,
FP_REGS,
ACC_REG,
SP_REG,
RL_REGS,
GR_REGS,
AR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
HILO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HILO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
HILO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HILO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REG,
R24_REG,
R25_REG,
R27_REG,
GENERAL_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
LPCOUNT_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPA_REGS,
CIRRUS_REGS,
VFP_REGS,
IWMMXT_GR_REGS,
IWMMXT_REGS,
LO_REGS,
STACK_REG,
BASE_REGS,
HI_REGS,
CC_REG,
VFPCC_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REG,
POINTER_X_REGS,
POINTER_Y_REGS,
POINTER_Z_REGS,
STACK_REG,
BASE_POINTER_REGS,
POINTER_REGS,
ADDW_REGS,
SIMPLE_LD_REGS,
LD_REGS,
NO_LD_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
IREGS,
BREGS,
LREGS,
MREGS,
CIRCREGS,
DAGREGS,
EVEN_AREGS,
ODD_AREGS,
AREGS,
CCREGS,
EVEN_DREGS,
ODD_DREGS,
DREGS,
PREGS_CLOBBERED,
PREGS,
DPREGS,
MOST_REGS,
PROLOGUE_REGS,
NON_A_CC_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0R1_REGS,
R2R3_REGS,
EXT_LOW_REGS,
EXT_REGS,
ADDR_REGS,
INDEX_REGS,
BK_REG,
SP_REG,
RC_REG,
COUNTER_REGS,
INT_REGS,
GENERAL_REGS,
DP_REG,
ST_REG,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MULTIPLY_32_REG,
MULTIPLY_64_REG,
LOW_REGS,
HIGH_REGS,
REAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ICC_REGS,
FCC_REGS,
CC_REGS,
ICR_REGS,
FCR_REGS,
CR_REGS,
LCR_REG,
LR_REG,
GR8_REGS,
GR9_REGS,
GR89_REGS,
FDPIC_REGS,
FDPIC_FPTR_REGS,
FDPIC_CALL_REGS,
SPR_REGS,
QUAD_ACC_REGS,
EVEN_ACC_REGS,
ACC_REGS,
ACCG_REGS,
QUAD_FPR_REGS,
FEVEN_REGS,
FPR_REGS,
QUAD_REGS,
EVEN_REGS,
GPR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
COUNTER_REGS,
SOURCE_REGS,
DESTINATION_REGS,
GENERAL_REGS,
MAC_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
AREG,
DREG,
CREG,
BREG,
SIREG,
DIREG,
AD_REGS,
Q_REGS,
NON_Q_REGS,
INDEX_REGS,
LEGACY_REGS,
GENERAL_REGS,
FP_TOP_REG,
FP_SECOND_REG,
FLOAT_REGS,
SSE_REGS,
MMX_REGS,
FP_TOP_SSE_REGS,
FP_SECOND_SSE_REGS,
FLOAT_SSE_REGS,
FLOAT_INT_REGS,
INT_SSE_REGS,
FLOAT_INT_SSE_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
PR_REGS,
BR_REGS,
AR_M_REGS,
AR_I_REGS,
ADDL_REGS,
GR_REGS,
FR_REGS,
GR_AND_BR_REGS,
GR_AND_FR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DPH_REGS,
DPL_REGS,
DP_REGS,
SP_REGS,
IPH_REGS,
IPL_REGS,
IP_REGS,
DP_SP_REGS,
PTR_REGS,
NONPTR_REGS,
NONSP_REGS,
GENERAL_REGS,
ALL_REGS = GENERAL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
CARRY_REG,
ACCUM_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
D_REGS,
X_REGS,
Y_REGS,
SP_REGS,
DA_REGS,
DB_REGS,
Z_REGS,
D8_REGS,
Q_REGS,
D_OR_X_REGS,
D_OR_Y_REGS,
D_OR_SP_REGS,
X_OR_Y_REGS,
A_REGS,
X_OR_SP_REGS,
Y_OR_SP_REGS,
X_OR_Y_OR_D_REGS,
A_OR_D_REGS,
A_OR_SP_REGS,
H_REGS,
S_REGS,
D_OR_S_REGS,
X_OR_S_REGS,
Y_OR_S_REGS,
Z_OR_S_REGS,
SP_OR_S_REGS,
D_OR_X_OR_S_REGS,
D_OR_Y_OR_S_REGS,
D_OR_SP_OR_S_REGS,
A_OR_S_REGS,
D_OR_A_OR_S_REGS,
TMP_REGS,
D_OR_A_OR_TMP_REGS,
G_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDR_REGS,
FP_REGS,
GENERAL_REGS,
DATA_OR_FP_REGS,
ADDR_OR_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ONLYR1_REGS,
LRW_REGS,
GENERAL_REGS,
C_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
PIC_FN_ADDR_REG,
LEA_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
REMAINDER_REG,
HIMULT_REG,
SYSTEM_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDRESS_REGS,
SP_REGS,
DATA_OR_ADDRESS_REGS,
SP_OR_ADDRESS_REGS,
EXTENDED_REGS,
DATA_OR_EXTENDED_REGS,
ADDRESS_OR_EXTENDED_REGS,
SP_OR_EXTENDED_REGS,
SP_OR_ADDRESS_OR_EXTENDED_REGS,
FP_REGS,
FP_ACC_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
FLOAT_REG0,
LONG_FLOAT_REG0,
FLOAT_REGS,
LONG_REGS,
FP_REGS,
GEN_AND_FP_REGS,
FRAME_POINTER_REG,
STACK_POINTER_REG,
GEN_AND_MEM_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MUL_REGS,
GENERAL_REGS,
LOAD_FPU_REGS,
NO_LOAD_FPU_REGS,
FPU_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BASE_REGS,
GENERAL_REGS,
FLOAT_REGS,
ALTIVEC_REGS,
VRSAVE_REGS,
VSCR_REGS,
SPE_ACC_REGS,
SPEFSCR_REGS,
NON_SPECIAL_REGS,
MQ_REGS,
LINK_REGS,
CTR_REGS,
LINK_OR_CTR_REGS,
SPECIAL_REGS,
SPEC_OR_GEN_REGS,
CR0_REGS,
CR_REGS,
NON_FLOAT_REGS,
XER_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
CC_REGS,
ADDR_REGS,
GENERAL_REGS,
ACCESS_REGS,
ADDR_CC_REGS,
GENERAL_CC_REGS,
FP_REGS,
ADDR_FP_REGS,
GENERAL_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
PR_REGS,
T_REGS,
MAC_REGS,
FPUL_REGS,
SIBCALL_REGS,
GENERAL_REGS,
FP0_REGS,
FP_REGS,
DF_HI_REGS,
DF_REGS,
FPSCR_REGS,
GENERAL_FP_REGS,
TARGET_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPCC_REGS,
I64_REGS,
GENERAL_REGS,
FP_REGS,
EXTRA_FP_REGS,
GENERAL_OR_FP_REGS,
GENERAL_OR_EXTRA_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
R1_REGS,
TWO_REGS,
R2_REGS,
EIGHT_REGS,
R8_REGS,
ICALL_REGS,
GENERAL_REGS,
CARRY_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BR_REGS,
FP_REGS,
ACC_REG,
SP_REG,
RL_REGS,
GR_REGS,
AR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REG,
R24_REG,
R25_REG,
R27_REG,
GENERAL_REGS,
FLOAT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
LPCOUNT_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPA_REGS,
CIRRUS_REGS,
VFP_REGS,
IWMMXT_GR_REGS,
IWMMXT_REGS,
LO_REGS,
STACK_REG,
BASE_REGS,
HI_REGS,
CC_REG,
VFPCC_REG,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REG,
POINTER_X_REGS,
POINTER_Y_REGS,
POINTER_Z_REGS,
STACK_REG,
BASE_POINTER_REGS,
POINTER_REGS,
ADDW_REGS,
SIMPLE_LD_REGS,
LD_REGS,
NO_LD_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
IREGS,
BREGS,
LREGS,
MREGS,
CIRCREGS,
DAGREGS,
EVEN_AREGS,
ODD_AREGS,
AREGS,
CCREGS,
EVEN_DREGS,
ODD_DREGS,
DREGS,
FDPIC_REGS,
FDPIC_FPTR_REGS,
PREGS_CLOBBERED,
PREGS,
IPREGS,
DPREGS,
MOST_REGS,
LT_REGS,
LC_REGS,
LB_REGS,
PROLOGUE_REGS,
NON_A_CC_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0R1_REGS,
R2R3_REGS,
EXT_LOW_REGS,
EXT_REGS,
ADDR_REGS,
INDEX_REGS,
BK_REG,
SP_REG,
RC_REG,
COUNTER_REGS,
INT_REGS,
GENERAL_REGS,
DP_REG,
ST_REG,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MOF_REGS,
CC0_REGS,
SPECIAL_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
LO_REGS,
HI_REGS,
HILO_REGS,
NOSP_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MULTIPLY_32_REG,
MULTIPLY_64_REG,
LOW_REGS,
HIGH_REGS,
REAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ICC_REGS,
FCC_REGS,
CC_REGS,
ICR_REGS,
FCR_REGS,
CR_REGS,
LCR_REG,
LR_REG,
GR8_REGS,
GR9_REGS,
GR89_REGS,
FDPIC_REGS,
FDPIC_FPTR_REGS,
FDPIC_CALL_REGS,
SPR_REGS,
QUAD_ACC_REGS,
EVEN_ACC_REGS,
ACC_REGS,
ACCG_REGS,
QUAD_FPR_REGS,
FEVEN_REGS,
FPR_REGS,
QUAD_REGS,
EVEN_REGS,
GPR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
COUNTER_REGS,
SOURCE_REGS,
DESTINATION_REGS,
GENERAL_REGS,
MAC_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
AREG,
DREG,
CREG,
BREG,
SIREG,
DIREG,
AD_REGS,
Q_REGS,
NON_Q_REGS,
INDEX_REGS,
LEGACY_REGS,
GENERAL_REGS,
FP_TOP_REG,
FP_SECOND_REG,
FLOAT_REGS,
SSE_REGS,
MMX_REGS,
FP_TOP_SSE_REGS,
FP_SECOND_SSE_REGS,
FLOAT_SSE_REGS,
FLOAT_INT_REGS,
INT_SSE_REGS,
FLOAT_INT_SSE_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
PR_REGS,
BR_REGS,
AR_M_REGS,
AR_I_REGS,
ADDL_REGS,
GR_REGS,
FP_REGS,
FR_REGS,
GR_AND_BR_REGS,
GR_AND_FR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GR_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
SP_REGS,
FB_REGS,
SB_REGS,
CR_REGS,
R0_REGS,
R1_REGS,
R2_REGS,
R3_REGS,
R02_REGS,
HL_REGS,
QI_REGS,
R23_REGS,
R03_REGS,
DI_REGS,
A0_REGS,
A1_REGS,
A_REGS,
AD_REGS,
PS_REGS,
SI_REGS,
HI_REGS,
RA_REGS,
GENERAL_REGS,
FLG_REGS,
HC_REGS,
MEM_REGS,
R02_A_MEM_REGS,
A_HL_MEM_REGS,
R1_R3_A_MEM_REGS,
R03_MEM_REGS,
A_HI_MEM_REGS,
A_AD_CR_MEM_SI_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
CARRY_REG,
ACCUM_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
D_REGS,
X_REGS,
Y_REGS,
SP_REGS,
DA_REGS,
DB_REGS,
Z_REGS,
D8_REGS,
Q_REGS,
D_OR_X_REGS,
D_OR_Y_REGS,
D_OR_SP_REGS,
X_OR_Y_REGS,
A_REGS,
X_OR_SP_REGS,
Y_OR_SP_REGS,
X_OR_Y_OR_D_REGS,
A_OR_D_REGS,
A_OR_SP_REGS,
H_REGS,
S_REGS,
D_OR_S_REGS,
X_OR_S_REGS,
Y_OR_S_REGS,
Z_OR_S_REGS,
SP_OR_S_REGS,
D_OR_X_OR_S_REGS,
D_OR_Y_OR_S_REGS,
D_OR_SP_OR_S_REGS,
A_OR_S_REGS,
D_OR_A_OR_S_REGS,
TMP_REGS,
D_OR_A_OR_TMP_REGS,
G_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDR_REGS,
FP_REGS,
GENERAL_REGS,
DATA_OR_FP_REGS,
ADDR_OR_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ONLYR1_REGS,
LRW_REGS,
GENERAL_REGS,
C_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
M16_NA_REGS,
M16_REGS,
T_REG,
M16_T_REGS,
PIC_FN_ADDR_REG,
V1_REG,
LEA_REGS,
GR_REGS,
FP_REGS,
HI_REG,
LO_REG,
MD_REGS,
COP0_REGS,
COP2_REGS,
COP3_REGS,
HI_AND_GR_REGS,
LO_AND_GR_REGS,
HI_AND_FP_REGS,
COP0_AND_GR_REGS,
COP2_AND_GR_REGS,
COP3_AND_GR_REGS,
ALL_COP_REGS,
ALL_COP_AND_GR_REGS,
ST_REGS,
DSP_ACC_REGS,
ACC_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
REMAINDER_REG,
HIMULT_REG,
SYSTEM_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
DATA_REGS,
ADDRESS_REGS,
SP_REGS,
DATA_OR_ADDRESS_REGS,
SP_OR_ADDRESS_REGS,
EXTENDED_REGS,
DATA_OR_EXTENDED_REGS,
ADDRESS_OR_EXTENDED_REGS,
SP_OR_EXTENDED_REGS,
SP_OR_ADDRESS_OR_EXTENDED_REGS,
FP_REGS,
FP_ACC_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R1_REGS,
GENERAL_REGS,
FPUPPER_REGS,
FP_REGS,
GENERAL_OR_FP_REGS,
SHIFT_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
MUL_REGS,
GENERAL_REGS,
LOAD_FPU_REGS,
NO_LOAD_FPU_REGS,
FPU_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BASE_REGS,
GENERAL_REGS,
FLOAT_REGS,
ALTIVEC_REGS,
VRSAVE_REGS,
VSCR_REGS,
SPE_ACC_REGS,
SPEFSCR_REGS,
NON_SPECIAL_REGS,
MQ_REGS,
LINK_REGS,
CTR_REGS,
LINK_OR_CTR_REGS,
SPECIAL_REGS,
SPEC_OR_GEN_REGS,
CR0_REGS,
CR_REGS,
NON_FLOAT_REGS,
XER_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
CC_REGS,
ADDR_REGS,
GENERAL_REGS,
ACCESS_REGS,
ADDR_CC_REGS,
GENERAL_CC_REGS,
FP_REGS,
ADDR_FP_REGS,
GENERAL_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
G16_REGS,
G32_REGS,
T32_REGS,
HI_REG,
LO_REG,
CE_REGS,
CN_REG,
LC_REG,
SC_REG,
SP_REGS,
CR_REGS,
CP1_REGS,
CP2_REGS,
CP3_REGS,
CPA_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
PR_REGS,
T_REGS,
MAC_REGS,
FPUL_REGS,
SIBCALL_REGS,
GENERAL_REGS,
FP0_REGS,
FP_REGS,
DF_HI_REGS,
DF_REGS,
FPSCR_REGS,
GENERAL_FP_REGS,
GENERAL_DF_REGS,
TARGET_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
FPCC_REGS,
I64_REGS,
GENERAL_REGS,
FP_REGS,
EXTRA_FP_REGS,
GENERAL_OR_FP_REGS,
GENERAL_OR_EXTRA_FP_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
R0_REGS,
R1_REGS,
TWO_REGS,
R2_REGS,
EIGHT_REGS,
R8_REGS,
ICALL_REGS,
GENERAL_REGS,
CARRY_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
GENERAL_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
ALL_REGS,
LIM_REG_CLASSES,
NO_REGS,
BR_REGS,
FP_REGS,
ACC_REG,
SP_REG,
RL_REGS,
GR_REGS,
AR_REGS,
ALL_REGS,
LIM_REG_CLASSES
} |
Variables |
| enum processor_type | alpha_cpu |
| int | target_flags |
| enum alpha_trap_precision | alpha_tp |
| enum alpha_fp_rounding_mode | alpha_fprm |
| enum alpha_fp_trap_mode | alpha_fptm |
| int | alpha_tls_size |
| const char * | alpha_cpu_string |
| const char * | alpha_tune_string |
| const char * | alpha_fprm_string |
| const char * | alpha_fptm_string |
| const char * | alpha_tp_string |
| const char * | alpha_mlat_string |
| const char * | alpha_tls_size_string |
| int | alpha_memory_latency |
| struct alpha_compare | alpha_compare |
| long | alpha_arg_offset |
| long | alpha_auto_offset |
| int | num_source_filenames |
| int | sdb_label_count |